amdgpu/addrlib: Add new interface to support macro mode index query
[mesa.git] / src / amd / addrlib / core / addrlib1.h
1 /*
2 * Copyright © 2016 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ***************************************************************************************************
29 * @file addrlib1.h
30 * @brief Contains the AddrLib1 base class definition.
31 ***************************************************************************************************
32 */
33
34 #ifndef __ADDR_LIB1_H__
35 #define __ADDR_LIB1_H__
36
37 #include "addrlib.h"
38
39
40 /**
41 ***************************************************************************************************
42 * @brief Neutral enums that define bank swap size
43 ***************************************************************************************************
44 */
45 enum AddrSampleSplitSize
46 {
47 ADDR_SAMPLESPLIT_1KB = 1024,
48 ADDR_SAMPLESPLIT_2KB = 2048,
49 ADDR_SAMPLESPLIT_4KB = 4096,
50 ADDR_SAMPLESPLIT_8KB = 8192,
51 };
52
53 /**
54 ***************************************************************************************************
55 * @brief Flags for AddrTileMode
56 ***************************************************************************************************
57 */
58 struct AddrTileModeFlags
59 {
60 UINT_32 thickness : 4;
61 UINT_32 isLinear : 1;
62 UINT_32 isMicro : 1;
63 UINT_32 isMacro : 1;
64 UINT_32 isMacro3d : 1;
65 UINT_32 isPrt : 1;
66 UINT_32 isPrtNoRotation : 1;
67 UINT_32 isBankSwapped : 1;
68 };
69
70 /**
71 ***************************************************************************************************
72 * @brief This class contains asic independent address lib functionalities
73 ***************************************************************************************************
74 */
75 class AddrLib1 : public AddrLib
76 {
77 public:
78 virtual ~AddrLib1();
79
80 static AddrLib1* GetAddrLib1(
81 ADDR_HANDLE hLib);
82
83 /// Returns tileIndex support
84 BOOL_32 UseTileIndex(INT_32 index) const
85 {
86 return m_configFlags.useTileIndex && (index != TileIndexInvalid);
87 }
88
89 /// Returns combined swizzle support
90 BOOL_32 UseCombinedSwizzle() const
91 {
92 return m_configFlags.useCombinedSwizzle;
93 }
94
95 //
96 // Interface stubs
97 //
98 ADDR_E_RETURNCODE ComputeSurfaceInfo(
99 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
100 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
101
102 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord(
103 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
104 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
105
106 ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr(
107 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
108 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const;
109
110 ADDR_E_RETURNCODE ComputeSliceTileSwizzle(
111 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
112 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const;
113
114 ADDR_E_RETURNCODE ExtractBankPipeSwizzle(
115 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
116 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
117
118 ADDR_E_RETURNCODE CombineBankPipeSwizzle(
119 const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
120 ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const;
121
122 ADDR_E_RETURNCODE ComputeBaseSwizzle(
123 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
124 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const;
125
126 ADDR_E_RETURNCODE ComputeFmaskInfo(
127 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
128 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
129
130 ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord(
131 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
132 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
133
134 ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr(
135 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
136 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const;
137
138 ADDR_E_RETURNCODE ConvertTileInfoToHW(
139 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
140 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const;
141
142 ADDR_E_RETURNCODE ConvertTileIndex(
143 const ADDR_CONVERT_TILEINDEX_INPUT* pIn,
144 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
145
146 ADDR_E_RETURNCODE GetMacroModeIndex(
147 const ADDR_GET_MACROMODEINDEX_INPUT* pIn,
148 ADDR_GET_MACROMODEINDEX_OUTPUT* pOut) const;
149
150 ADDR_E_RETURNCODE ConvertTileIndex1(
151 const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
152 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const;
153
154 ADDR_E_RETURNCODE GetTileIndex(
155 const ADDR_GET_TILEINDEX_INPUT* pIn,
156 ADDR_GET_TILEINDEX_OUTPUT* pOut) const;
157
158 ADDR_E_RETURNCODE ComputeHtileInfo(
159 const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
160 ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
161
162 ADDR_E_RETURNCODE ComputeCmaskInfo(
163 const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
164 ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const;
165
166 ADDR_E_RETURNCODE ComputeDccInfo(
167 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
168 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
169
170 ADDR_E_RETURNCODE ComputeHtileAddrFromCoord(
171 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
172 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const;
173
174 ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord(
175 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
176 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
177
178 ADDR_E_RETURNCODE ComputeHtileCoordFromAddr(
179 const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
180 ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const;
181
182 ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr(
183 const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
184 ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const;
185
186 ADDR_E_RETURNCODE ComputePrtInfo(
187 const ADDR_PRT_INFO_INPUT* pIn,
188 ADDR_PRT_INFO_OUTPUT* pOut) const;
189 protected:
190 AddrLib1(); // Constructor is protected
191 AddrLib1(const AddrClient* pClient);
192
193 /// Pure Virtual function for Hwl computing surface info
194 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
195 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
196 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
197
198 /// Pure Virtual function for Hwl computing surface address from coord
199 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord(
200 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
201 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
202
203 /// Pure Virtual function for Hwl computing surface coord from address
204 virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr(
205 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
206 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0;
207
208 /// Pure Virtual function for Hwl computing surface tile swizzle
209 virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle(
210 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
211 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0;
212
213 /// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b
214 virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle(
215 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
216 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0;
217
218 /// Pure Virtual function for Hwl combining bank/pipe swizzle
219 virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle(
220 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
221 UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0;
222
223 /// Pure Virtual function for Hwl computing base swizzle
224 virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle(
225 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
226 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0;
227
228 /// Pure Virtual function for Hwl computing HTILE base align
229 virtual UINT_32 HwlComputeHtileBaseAlign(
230 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0;
231
232 /// Pure Virtual function for Hwl computing HTILE bpp
233 virtual UINT_32 HwlComputeHtileBpp(
234 BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0;
235
236 /// Pure Virtual function for Hwl computing HTILE bytes
237 virtual UINT_64 HwlComputeHtileBytes(
238 UINT_32 pitch, UINT_32 height, UINT_32 bpp,
239 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0;
240
241 /// Pure Virtual function for Hwl computing FMASK info
242 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo(
243 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
244 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0;
245
246 /// Pure Virtual function for Hwl FMASK address from coord
247 virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord(
248 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
249 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0;
250
251 /// Pure Virtual function for Hwl FMASK coord from address
252 virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr(
253 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
254 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0;
255
256 /// Pure Virtual function for Hwl convert tile info from real value to HW value
257 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW(
258 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
259 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0;
260
261 /// Pure Virtual function for Hwl compute mipmap info
262 virtual BOOL_32 HwlComputeMipLevel(
263 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
264
265 /// Pure Virtual function for Hwl compute max cmask blockMax value
266 virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0;
267
268 /// Pure Virtual function for Hwl compute fmask bits
269 virtual UINT_32 HwlComputeFmaskBits(
270 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
271 UINT_32* pNumSamples) const = 0;
272
273 /// Virtual function to get index (not pure then no need to implement this in all hwls
274 virtual ADDR_E_RETURNCODE HwlGetTileIndex(
275 const ADDR_GET_TILEINDEX_INPUT* pIn,
276 ADDR_GET_TILEINDEX_OUTPUT* pOut) const
277 {
278 return ADDR_NOTSUPPORTED;
279 }
280
281 /// Virtual function for Hwl to compute Dcc info
282 virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
283 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
284 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const
285 {
286 return ADDR_NOTSUPPORTED;
287 }
288
289 /// Virtual function to get cmask address for tc compatible cmask
290 virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
291 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
292 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const
293 {
294 return ADDR_NOTSUPPORTED;
295 }
296
297 /// Virtual function to get htile address for tc compatible htile
298 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
299 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
300 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const
301 {
302 return ADDR_NOTSUPPORTED;
303 }
304
305 // Compute attributes
306
307 // HTILE
308 UINT_32 ComputeHtileInfo(
309 ADDR_HTILE_FLAGS flags,
310 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices,
311 BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
312 ADDR_TILEINFO* pTileInfo,
313 UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes,
314 UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL,
315 UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const;
316
317 // CMASK
318 ADDR_E_RETURNCODE ComputeCmaskInfo(
319 ADDR_CMASK_FLAGS flags,
320 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear,
321 ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes,
322 UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL,
323 UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const;
324
325 virtual VOID HwlComputeTileDataWidthAndHeightLinear(
326 UINT_32* pMacroWidth, UINT_32* pMacroHeight,
327 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
328
329 // CMASK & HTILE addressing
330 virtual UINT_64 HwlComputeXmaskAddrFromCoord(
331 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice,
332 UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8,
333 BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo,
334 UINT_32* bitPosition) const;
335
336 virtual VOID HwlComputeXmaskCoordFromAddr(
337 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
338 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
339 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
340
341 // Surface mipmap
342 VOID ComputeMipLevel(
343 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
344
345 /// Pure Virtual function for Hwl checking degrade for base level
346 virtual BOOL_32 HwlDegradeBaseLevel(
347 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0;
348
349 virtual BOOL_32 HwlOverrideTileMode(
350 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
351 AddrTileMode* pTileMode,
352 AddrTileType* pTileType) const
353 {
354 // not supported in hwl layer, FALSE for not-overrided
355 return FALSE;
356 }
357
358 AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const;
359
360 VOID PadDimensions(
361 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
362 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
363 UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
364 UINT_32* pSlices, UINT_32 sliceAlign) const;
365
366 virtual VOID HwlPadDimensions(
367 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
368 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
369 UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
370 UINT_32* pSlices, UINT_32 sliceAlign) const
371 {
372 }
373
374 //
375 // Addressing shared for linear/1D tiling
376 //
377 UINT_64 ComputeSurfaceAddrFromCoordLinear(
378 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample,
379 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
380 UINT_32* pBitPosition) const;
381
382 VOID ComputeSurfaceCoordFromAddrLinear(
383 UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp,
384 UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
385 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const;
386
387 VOID ComputeSurfaceCoordFromAddrMicroTiled(
388 UINT_64 addr, UINT_32 bitPosition,
389 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
390 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
391 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
392 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const;
393
394 UINT_32 ComputePixelIndexWithinMicroTile(
395 UINT_32 x, UINT_32 y, UINT_32 z,
396 UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const;
397
398 /// Pure Virtual function for Hwl computing coord from offset inside micro tile
399 virtual VOID HwlComputePixelCoordFromOffset(
400 UINT_32 offset, UINT_32 bpp, UINT_32 numSamples,
401 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits,
402 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample,
403 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0;
404
405 //
406 // Addressing shared by all
407 //
408 virtual UINT_32 HwlGetPipes(
409 const ADDR_TILEINFO* pTileInfo) const;
410
411 UINT_32 ComputePipeFromAddr(
412 UINT_64 addr, UINT_32 numPipes) const;
413
414 /// Pure Virtual function for Hwl computing pipe from coord
415 virtual UINT_32 ComputePipeFromCoord(
416 UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode,
417 UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0;
418
419 /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile
420 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe(
421 UINT_32 pipe, UINT_32 x) const = 0;
422
423 //
424 // Misc helper
425 //
426 static const AddrTileModeFlags m_modeFlags[ADDR_TM_COUNT];
427
428 static UINT_32 ComputeSurfaceThickness(
429 AddrTileMode tileMode);
430
431 // Checking tile mode
432 static BOOL_32 IsMacroTiled(AddrTileMode tileMode);
433 static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode);
434 static BOOL_32 IsLinear(AddrTileMode tileMode);
435 static BOOL_32 IsMicroTiled(AddrTileMode tileMode);
436 static BOOL_32 IsPrtTileMode(AddrTileMode tileMode);
437 static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode);
438
439 /// Return TRUE if tile info is needed
440 BOOL_32 UseTileInfo() const
441 {
442 return !m_configFlags.ignoreTileInfo;
443 }
444
445 /// Adjusts pitch alignment for flipping surface
446 VOID AdjustPitchAlignment(
447 ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const;
448
449 /// Overwrite tile config according to tile index
450 virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
451 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex,
452 ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const;
453
454 /// Overwrite macro tile config according to tile index
455 virtual INT_32 HwlComputeMacroModeIndex(
456 INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples,
457 ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL
458 ) const
459 {
460 return TileIndexNoMacroIndex;
461 }
462
463 /// Pre-handler of 3x pitch (96 bit) adjustment
464 virtual UINT_32 HwlPreHandleBaseLvl3xPitch(
465 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
466 /// Post-handler of 3x pitch adjustment
467 virtual UINT_32 HwlPostHandleBaseLvl3xPitch(
468 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
469 /// Check miplevel after surface adjustment
470 ADDR_E_RETURNCODE PostComputeMipLevel(
471 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
472 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
473
474 /// Quad buffer stereo support, has its implementation in ind. layer
475 virtual BOOL_32 ComputeQbStereoInfo(
476 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
477
478 /// Pure virutual function to compute stereo bank swizzle for right eye
479 virtual UINT_32 HwlComputeQbStereoRightSwizzle(
480 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0;
481
482 private:
483 // Disallow the copy constructor
484 AddrLib1(const AddrLib1& a);
485
486 // Disallow the assignment operator
487 AddrLib1& operator=(const AddrLib1& a);
488
489 UINT_32 ComputeCmaskBaseAlign(
490 ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const;
491
492 UINT_64 ComputeCmaskBytes(
493 UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const;
494
495 //
496 // CMASK/HTILE shared methods
497 //
498 VOID ComputeTileDataWidthAndHeight(
499 UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo,
500 UINT_32* pMacroWidth, UINT_32* pMacroHeight) const;
501
502 UINT_32 ComputeXmaskCoordYFromPipe(
503 UINT_32 pipe, UINT_32 x) const;
504
505 BOOL_32 OptimizeTileMode(
506 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, AddrTileMode* pTileMode) const;
507 };
508
509 #endif
510