amd/addrlib: update to the latest version
[mesa.git] / src / amd / addrlib / inc / addrtypes.h
1 /*
2 * Copyright © 2007-2019 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file addrtypes.h
30 * @brief Contains the helper function and constants
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_TYPES_H__
34 #define __ADDR_TYPES_H__
35
36 #if defined(__APPLE__) && !defined(HAVE_TSERVER)
37 // External definitions header maintained by Apple driver team, but not for diag team under Mac.
38 // Helps address compilation issues & reduces code covered by NDA
39 #include "addrExtDef.h"
40
41 #else
42
43 // Windows and/or Linux
44 #if !defined(VOID)
45 typedef void VOID;
46 #endif
47
48 #if !defined(FLOAT)
49 typedef float FLOAT;
50 #endif
51
52 #if !defined(CHAR)
53 typedef char CHAR;
54 #endif
55
56 #if !defined(INT)
57 typedef int INT;
58 #endif
59
60 #include <stdarg.h> // va_list...etc need this header
61
62 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
63
64 /**
65 ****************************************************************************************************
66 * Calling conventions
67 ****************************************************************************************************
68 */
69 #ifndef ADDR_CDECL
70 #if defined(__GNUC__)
71 #define ADDR_CDECL __attribute__((cdecl))
72 #else
73 #define ADDR_CDECL __cdecl
74 #endif
75 #endif
76
77 #ifndef ADDR_STDCALL
78 #if defined(__GNUC__)
79 #if defined(__amd64__) || defined(__x86_64__)
80 #define ADDR_STDCALL
81 #else
82 #define ADDR_STDCALL __attribute__((stdcall))
83 #endif
84 #else
85 #define ADDR_STDCALL __stdcall
86 #endif
87 #endif
88
89 #ifndef ADDR_FASTCALL
90 #if defined(BRAHMA_ARM)
91 #define ADDR_FASTCALL
92 #elif defined(__GNUC__)
93 #define ADDR_FASTCALL __attribute__((regparm(0)))
94 #else
95 #define ADDR_FASTCALL __fastcall
96 #endif
97 #endif
98
99 #ifndef GC_CDECL
100 #define GC_CDECL ADDR_CDECL
101 #endif
102
103 #ifndef GC_STDCALL
104 #define GC_STDCALL ADDR_STDCALL
105 #endif
106
107 #ifndef GC_FASTCALL
108 #define GC_FASTCALL ADDR_FASTCALL
109 #endif
110
111 #if defined(__GNUC__)
112 #define ADDR_INLINE static inline // inline needs to be static to link
113 #else
114 // win32, win64, other platforms
115 #define ADDR_INLINE __inline
116 #endif // #if defined(__GNUC__)
117
118 #define ADDR_API ADDR_FASTCALL //default call convention is fast call
119
120 /**
121 ****************************************************************************************************
122 * Global defines used by other modules
123 ****************************************************************************************************
124 */
125 #if !defined(TILEINDEX_INVALID)
126 #define TILEINDEX_INVALID -1
127 #endif
128
129 #if !defined(TILEINDEX_LINEAR_GENERAL)
130 #define TILEINDEX_LINEAR_GENERAL -2
131 #endif
132
133 #if !defined(TILEINDEX_LINEAR_ALIGNED)
134 #define TILEINDEX_LINEAR_ALIGNED 8
135 #endif
136
137 /**
138 ****************************************************************************************************
139 * Return codes
140 ****************************************************************************************************
141 */
142 typedef enum _ADDR_E_RETURNCODE
143 {
144 // General Return
145 ADDR_OK = 0,
146 ADDR_ERROR = 1,
147
148 // Specific Errors
149 ADDR_OUTOFMEMORY,
150 ADDR_INVALIDPARAMS,
151 ADDR_NOTSUPPORTED,
152 ADDR_NOTIMPLEMENTED,
153 ADDR_PARAMSIZEMISMATCH,
154 ADDR_INVALIDGBREGVALUES,
155
156 } ADDR_E_RETURNCODE;
157
158 /**
159 ****************************************************************************************************
160 * @brief
161 * Neutral enums that define tile modes for all H/W
162 * @note
163 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
164 * ADDR_TM_2D_TILED_XTHICK
165 *
166 ****************************************************************************************************
167 */
168 typedef enum _AddrTileMode
169 {
170 ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer
171 ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels
172 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles
173 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles
174 ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles
175 ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4
176 ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16
177 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles
178 ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap
179 ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4
180 ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16
181 ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
182 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices
183 ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick
184 ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap
185 ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick
186 ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI
187 ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI
188 ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI
189 ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size
190 ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only
191 ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only
192 ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size
193 ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only
194 ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only
195 ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib
196 ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode
197 } AddrTileMode;
198
199 /**
200 ****************************************************************************************************
201 * @brief
202 * Neutral enums that define swizzle modes for Gfx9+ ASIC
203 * @note
204 *
205 * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource
206 * ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resource
207 * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource
208 * ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resource
209 *
210 * ADDR_SW_*_Z For GFX9:
211 - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask
212 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode
213 For GFX10:
214 - represents Z-order swizzle mode for depth/stencil/FMask
215 * ADDR_SW_*_S For GFX9+:
216 - represents standard swizzle mode defined by MS
217 * ADDR_SW_*_D For GFX9:
218 - for 2D resource, represents a swizzle mode for displayable resource
219 * - for 3D resource, represents a swizzle mode which places each slice in order & pixel
220 For GFX10:
221 - for 2D resource, represents a swizzle mode for displayable resource
222 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode
223 within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
224 * ADDR_SW_*_R For GFX9:
225 - 2D resource only, represents a swizzle mode for rotated displayable resource
226 For GFX10:
227 - represents a swizzle mode for render target resource
228 *
229 ****************************************************************************************************
230 */
231 typedef enum _AddrSwizzleMode
232 {
233 ADDR_SW_LINEAR = 0,
234 ADDR_SW_256B_S = 1,
235 ADDR_SW_256B_D = 2,
236 ADDR_SW_256B_R = 3,
237 ADDR_SW_4KB_Z = 4,
238 ADDR_SW_4KB_S = 5,
239 ADDR_SW_4KB_D = 6,
240 ADDR_SW_4KB_R = 7,
241 ADDR_SW_64KB_Z = 8,
242 ADDR_SW_64KB_S = 9,
243 ADDR_SW_64KB_D = 10,
244 ADDR_SW_64KB_R = 11,
245 ADDR_SW_RESERVED0 = 12,
246 ADDR_SW_RESERVED1 = 13,
247 ADDR_SW_RESERVED2 = 14,
248 ADDR_SW_RESERVED3 = 15,
249 ADDR_SW_64KB_Z_T = 16,
250 ADDR_SW_64KB_S_T = 17,
251 ADDR_SW_64KB_D_T = 18,
252 ADDR_SW_64KB_R_T = 19,
253 ADDR_SW_4KB_Z_X = 20,
254 ADDR_SW_4KB_S_X = 21,
255 ADDR_SW_4KB_D_X = 22,
256 ADDR_SW_4KB_R_X = 23,
257 ADDR_SW_64KB_Z_X = 24,
258 ADDR_SW_64KB_S_X = 25,
259 ADDR_SW_64KB_D_X = 26,
260 ADDR_SW_64KB_R_X = 27,
261 ADDR_SW_VAR_Z_X = 28,
262 ADDR_SW_RESERVED4 = 29,
263 ADDR_SW_RESERVED5 = 30,
264 ADDR_SW_VAR_R_X = 31,
265 ADDR_SW_LINEAR_GENERAL = 32,
266 ADDR_SW_MAX_TYPE = 33,
267 } AddrSwizzleMode;
268
269 /**
270 ****************************************************************************************************
271 * @brief
272 * Neutral enums that define image type
273 * @note
274 * this is new for address library interface version 2
275 *
276 ****************************************************************************************************
277 */
278 typedef enum _AddrResourceType
279 {
280 ADDR_RSRC_TEX_1D = 0,
281 ADDR_RSRC_TEX_2D = 1,
282 ADDR_RSRC_TEX_3D = 2,
283 ADDR_RSRC_MAX_TYPE = 3,
284 } AddrResourceType;
285
286 /**
287 ****************************************************************************************************
288 * @brief
289 * Neutral enums that define resource heap location
290 * @note
291 * this is new for address library interface version 2
292 *
293 ****************************************************************************************************
294 */
295 typedef enum _AddrResrouceLocation
296 {
297 ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown
298 ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap
299 ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap
300 ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap
301 ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only
302 ADDR_RSRC_LOC_MAX_TYPE = 5,
303 } AddrResrouceLocation;
304
305 /**
306 ****************************************************************************************************
307 * @brief
308 * Neutral enums that define resource basic swizzle mode
309 * @note
310 * this is new for address library interface version 2
311 *
312 ****************************************************************************************************
313 */
314 typedef enum _AddrSwType
315 {
316 ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder
317 ADDR_SW_S = 1, // Resource basic swizzle mode is Standard
318 ADDR_SW_D = 2, // Resource basic swizzle mode is Display
319 ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated/Render optimized
320 ADDR_SW_L = 4, // Resource basic swizzle mode is Linear
321 ADDR_SW_MAX_SWTYPE
322 } AddrSwType;
323
324 /**
325 ****************************************************************************************************
326 * @brief
327 * Neutral enums that define mipmap major mode
328 * @note
329 * this is new for address library interface version 2
330 *
331 ****************************************************************************************************
332 */
333 typedef enum _AddrMajorMode
334 {
335 ADDR_MAJOR_X = 0,
336 ADDR_MAJOR_Y = 1,
337 ADDR_MAJOR_Z = 2,
338 ADDR_MAJOR_MAX_TYPE = 3,
339 } AddrMajorMode;
340
341 /**
342 ****************************************************************************************************
343 * AddrFormat
344 *
345 * @brief
346 * Neutral enum for SurfaceFormat
347 *
348 ****************************************************************************************************
349 */
350 typedef enum _AddrFormat {
351 ADDR_FMT_INVALID = 0x00000000,
352 ADDR_FMT_8 = 0x00000001,
353 ADDR_FMT_4_4 = 0x00000002,
354 ADDR_FMT_3_3_2 = 0x00000003,
355 ADDR_FMT_RESERVED_4 = 0x00000004,
356 ADDR_FMT_16 = 0x00000005,
357 ADDR_FMT_16_FLOAT = ADDR_FMT_16,
358 ADDR_FMT_8_8 = 0x00000007,
359 ADDR_FMT_5_6_5 = 0x00000008,
360 ADDR_FMT_6_5_5 = 0x00000009,
361 ADDR_FMT_1_5_5_5 = 0x0000000a,
362 ADDR_FMT_4_4_4_4 = 0x0000000b,
363 ADDR_FMT_5_5_5_1 = 0x0000000c,
364 ADDR_FMT_32 = 0x0000000d,
365 ADDR_FMT_32_FLOAT = ADDR_FMT_32,
366 ADDR_FMT_16_16 = 0x0000000f,
367 ADDR_FMT_16_16_FLOAT = ADDR_FMT_16_16,
368 ADDR_FMT_8_24 = 0x00000011,
369 ADDR_FMT_8_24_FLOAT = ADDR_FMT_8_24,
370 ADDR_FMT_24_8 = 0x00000013,
371 ADDR_FMT_24_8_FLOAT = ADDR_FMT_24_8,
372 ADDR_FMT_10_11_11 = 0x00000015,
373 ADDR_FMT_10_11_11_FLOAT = ADDR_FMT_10_11_11,
374 ADDR_FMT_11_11_10 = 0x00000017,
375 ADDR_FMT_11_11_10_FLOAT = ADDR_FMT_11_11_10,
376 ADDR_FMT_2_10_10_10 = 0x00000019,
377 ADDR_FMT_8_8_8_8 = 0x0000001a,
378 ADDR_FMT_10_10_10_2 = 0x0000001b,
379 ADDR_FMT_X24_8_32_FLOAT = 0x0000001c,
380 ADDR_FMT_32_32 = 0x0000001d,
381 ADDR_FMT_32_32_FLOAT = ADDR_FMT_32_32,
382 ADDR_FMT_16_16_16_16 = 0x0000001f,
383 ADDR_FMT_16_16_16_16_FLOAT = ADDR_FMT_16_16_16_16,
384 ADDR_FMT_RESERVED_33 = 0x00000021,
385 ADDR_FMT_32_32_32_32 = 0x00000022,
386 ADDR_FMT_32_32_32_32_FLOAT = ADDR_FMT_32_32_32_32,
387 ADDR_FMT_RESERVED_36 = 0x00000024,
388 ADDR_FMT_1 = 0x00000025,
389 ADDR_FMT_1_REVERSED = 0x00000026,
390 ADDR_FMT_GB_GR = 0x00000027,
391 ADDR_FMT_BG_RG = 0x00000028,
392 ADDR_FMT_32_AS_8 = 0x00000029,
393 ADDR_FMT_32_AS_8_8 = 0x0000002a,
394 ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b,
395 ADDR_FMT_8_8_8 = 0x0000002c,
396 ADDR_FMT_16_16_16 = 0x0000002d,
397 ADDR_FMT_16_16_16_FLOAT = ADDR_FMT_16_16_16,
398 ADDR_FMT_32_32_32 = 0x0000002f,
399 ADDR_FMT_32_32_32_FLOAT = ADDR_FMT_32_32_32,
400 ADDR_FMT_BC1 = 0x00000031,
401 ADDR_FMT_BC2 = 0x00000032,
402 ADDR_FMT_BC3 = 0x00000033,
403 ADDR_FMT_BC4 = 0x00000034,
404 ADDR_FMT_BC5 = 0x00000035,
405 ADDR_FMT_BC6 = 0x00000036,
406 ADDR_FMT_BC7 = 0x00000037,
407 ADDR_FMT_32_AS_32_32_32_32 = 0x00000038,
408 ADDR_FMT_APC3 = 0x00000039,
409 ADDR_FMT_APC4 = 0x0000003a,
410 ADDR_FMT_APC5 = 0x0000003b,
411 ADDR_FMT_APC6 = 0x0000003c,
412 ADDR_FMT_APC7 = 0x0000003d,
413 ADDR_FMT_CTX1 = 0x0000003e,
414 ADDR_FMT_RESERVED_63 = 0x0000003f,
415 ADDR_FMT_ASTC_4x4 = 0x00000040,
416 ADDR_FMT_ASTC_5x4 = 0x00000041,
417 ADDR_FMT_ASTC_5x5 = 0x00000042,
418 ADDR_FMT_ASTC_6x5 = 0x00000043,
419 ADDR_FMT_ASTC_6x6 = 0x00000044,
420 ADDR_FMT_ASTC_8x5 = 0x00000045,
421 ADDR_FMT_ASTC_8x6 = 0x00000046,
422 ADDR_FMT_ASTC_8x8 = 0x00000047,
423 ADDR_FMT_ASTC_10x5 = 0x00000048,
424 ADDR_FMT_ASTC_10x6 = 0x00000049,
425 ADDR_FMT_ASTC_10x8 = 0x0000004a,
426 ADDR_FMT_ASTC_10x10 = 0x0000004b,
427 ADDR_FMT_ASTC_12x10 = 0x0000004c,
428 ADDR_FMT_ASTC_12x12 = 0x0000004d,
429 ADDR_FMT_ETC2_64BPP = 0x0000004e,
430 ADDR_FMT_ETC2_128BPP = 0x0000004f,
431 } AddrFormat;
432
433 /**
434 ****************************************************************************************************
435 * AddrDepthFormat
436 *
437 * @brief
438 * Neutral enum for addrFlt32ToDepthPixel
439 *
440 ****************************************************************************************************
441 */
442 typedef enum _AddrDepthFormat
443 {
444 ADDR_DEPTH_INVALID = 0x00000000,
445 ADDR_DEPTH_16 = 0x00000001,
446 ADDR_DEPTH_X8_24 = 0x00000002,
447 ADDR_DEPTH_8_24 = 0x00000003,
448 ADDR_DEPTH_X8_24_FLOAT = 0x00000004,
449 ADDR_DEPTH_8_24_FLOAT = 0x00000005,
450 ADDR_DEPTH_32_FLOAT = 0x00000006,
451 ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007,
452
453 } AddrDepthFormat;
454
455 /**
456 ****************************************************************************************************
457 * AddrColorFormat
458 *
459 * @brief
460 * Neutral enum for ColorFormat
461 *
462 ****************************************************************************************************
463 */
464 typedef enum _AddrColorFormat
465 {
466 ADDR_COLOR_INVALID = 0x00000000,
467 ADDR_COLOR_8 = 0x00000001,
468 ADDR_COLOR_4_4 = 0x00000002,
469 ADDR_COLOR_3_3_2 = 0x00000003,
470 ADDR_COLOR_RESERVED_4 = 0x00000004,
471 ADDR_COLOR_16 = 0x00000005,
472 ADDR_COLOR_16_FLOAT = 0x00000006,
473 ADDR_COLOR_8_8 = 0x00000007,
474 ADDR_COLOR_5_6_5 = 0x00000008,
475 ADDR_COLOR_6_5_5 = 0x00000009,
476 ADDR_COLOR_1_5_5_5 = 0x0000000a,
477 ADDR_COLOR_4_4_4_4 = 0x0000000b,
478 ADDR_COLOR_5_5_5_1 = 0x0000000c,
479 ADDR_COLOR_32 = 0x0000000d,
480 ADDR_COLOR_32_FLOAT = 0x0000000e,
481 ADDR_COLOR_16_16 = 0x0000000f,
482 ADDR_COLOR_16_16_FLOAT = 0x00000010,
483 ADDR_COLOR_8_24 = 0x00000011,
484 ADDR_COLOR_8_24_FLOAT = 0x00000012,
485 ADDR_COLOR_24_8 = 0x00000013,
486 ADDR_COLOR_24_8_FLOAT = 0x00000014,
487 ADDR_COLOR_10_11_11 = 0x00000015,
488 ADDR_COLOR_10_11_11_FLOAT = 0x00000016,
489 ADDR_COLOR_11_11_10 = 0x00000017,
490 ADDR_COLOR_11_11_10_FLOAT = 0x00000018,
491 ADDR_COLOR_2_10_10_10 = 0x00000019,
492 ADDR_COLOR_8_8_8_8 = 0x0000001a,
493 ADDR_COLOR_10_10_10_2 = 0x0000001b,
494 ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c,
495 ADDR_COLOR_32_32 = 0x0000001d,
496 ADDR_COLOR_32_32_FLOAT = 0x0000001e,
497 ADDR_COLOR_16_16_16_16 = 0x0000001f,
498 ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020,
499 ADDR_COLOR_RESERVED_33 = 0x00000021,
500 ADDR_COLOR_32_32_32_32 = 0x00000022,
501 ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023,
502 } AddrColorFormat;
503
504 /**
505 ****************************************************************************************************
506 * AddrSurfaceNumber
507 *
508 * @brief
509 * Neutral enum for SurfaceNumber
510 *
511 ****************************************************************************************************
512 */
513 typedef enum _AddrSurfaceNumber {
514 ADDR_NUMBER_UNORM = 0x00000000,
515 ADDR_NUMBER_SNORM = 0x00000001,
516 ADDR_NUMBER_USCALED = 0x00000002,
517 ADDR_NUMBER_SSCALED = 0x00000003,
518 ADDR_NUMBER_UINT = 0x00000004,
519 ADDR_NUMBER_SINT = 0x00000005,
520 ADDR_NUMBER_SRGB = 0x00000006,
521 ADDR_NUMBER_FLOAT = 0x00000007,
522 } AddrSurfaceNumber;
523
524 /**
525 ****************************************************************************************************
526 * AddrSurfaceSwap
527 *
528 * @brief
529 * Neutral enum for SurfaceSwap
530 *
531 ****************************************************************************************************
532 */
533 typedef enum _AddrSurfaceSwap {
534 ADDR_SWAP_STD = 0x00000000,
535 ADDR_SWAP_ALT = 0x00000001,
536 ADDR_SWAP_STD_REV = 0x00000002,
537 ADDR_SWAP_ALT_REV = 0x00000003,
538 } AddrSurfaceSwap;
539
540 /**
541 ****************************************************************************************************
542 * AddrHtileBlockSize
543 *
544 * @brief
545 * Size of HTILE blocks, valid values are 4 or 8 for now
546 ****************************************************************************************************
547 */
548 typedef enum _AddrHtileBlockSize
549 {
550 ADDR_HTILE_BLOCKSIZE_4 = 4,
551 ADDR_HTILE_BLOCKSIZE_8 = 8,
552 } AddrHtileBlockSize;
553
554 /**
555 ****************************************************************************************************
556 * AddrPipeCfg
557 *
558 * @brief
559 * The pipe configuration field specifies both the number of pipes and
560 * how pipes are interleaved on the surface.
561 * The expression of number of pipes, the shader engine tile size, and packer tile size
562 * is encoded in a PIPE_CONFIG register field.
563 * In general the number of pipes usually matches the number of memory channels of the
564 * hardware configuration.
565 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
566 * the number of ROP units(? TODO: which registers??)
567 * The enum value = hw enum + 1 which is to reserve 0 for requesting default.
568 ****************************************************************************************************
569 */
570 typedef enum _AddrPipeCfg
571 {
572 ADDR_PIPECFG_INVALID = 0,
573 ADDR_PIPECFG_P2 = 1, /// 2 pipes,
574 ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes,
575 ADDR_PIPECFG_P4_16x16 = 6,
576 ADDR_PIPECFG_P4_16x32 = 7,
577 ADDR_PIPECFG_P4_32x32 = 8,
578 ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes
579 ADDR_PIPECFG_P8_16x32_8x16 = 10,
580 ADDR_PIPECFG_P8_32x32_8x16 = 11,
581 ADDR_PIPECFG_P8_16x32_16x16 = 12,
582 ADDR_PIPECFG_P8_32x32_16x16 = 13,
583 ADDR_PIPECFG_P8_32x32_16x32 = 14,
584 ADDR_PIPECFG_P8_32x64_32x32 = 15,
585 ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes
586 ADDR_PIPECFG_P16_32x32_16x16 = 18,
587 ADDR_PIPECFG_UNUSED = 19,
588 ADDR_PIPECFG_MAX = 20,
589 } AddrPipeCfg;
590
591 /**
592 ****************************************************************************************************
593 * AddrTileType
594 *
595 * @brief
596 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
597 ****************************************************************************************************
598 */
599 typedef enum _AddrTileType
600 {
601 ADDR_DISPLAYABLE = 0, ///< Displayable tiling
602 ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling
603 ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order
604 ADDR_ROTATED = 3, ///< Rotated displayable tiling
605 ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK
606 } AddrTileType;
607
608 ////////////////////////////////////////////////////////////////////////////////////////////////////
609 //
610 // Type definitions: short system-independent names for address library types
611 //
612 ////////////////////////////////////////////////////////////////////////////////////////////////////
613
614 #if !defined(__APPLE__) || defined(HAVE_TSERVER)
615
616 #ifndef BOOL_32 // no bool type in C
617 /// @brief Boolean type, since none is defined in C
618 /// @ingroup type
619 #define BOOL_32 int
620 #endif
621
622 #ifndef INT_32
623 #define INT_32 int
624 #endif
625
626 #ifndef UINT_32
627 #define UINT_32 unsigned int
628 #endif
629
630 #ifndef INT_16
631 #define INT_16 short
632 #endif
633
634 #ifndef UINT_16
635 #define UINT_16 unsigned short
636 #endif
637
638 #ifndef INT_8
639 #define INT_8 char
640 #endif
641
642 #ifndef UINT_8
643 #define UINT_8 unsigned char
644 #endif
645
646 #ifndef NULL
647 #define NULL 0
648 #endif
649
650 #ifndef TRUE
651 #define TRUE 1
652 #endif
653
654 #ifndef FALSE
655 #define FALSE 0
656 #endif
657
658 //
659 // 64-bit integer types depend on the compiler
660 //
661 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
662 #define INT_64 long long
663 #define UINT_64 unsigned long long
664
665 #elif defined( _WIN32 )
666 #define INT_64 __int64
667 #define UINT_64 unsigned __int64
668
669 #else
670 #error Unsupported compiler and/or operating system for 64-bit integers
671
672 /// @brief 64-bit signed integer type (compiler dependent)
673 /// @ingroup type
674 ///
675 /// The addrlib defines a 64-bit signed integer type for either
676 /// Gnu/Watcom compilers (which use the first syntax) or for
677 /// the Windows VCC compiler (which uses the second syntax).
678 #define INT_64 long long OR __int64
679
680 /// @brief 64-bit unsigned integer type (compiler dependent)
681 /// @ingroup type
682 ///
683 /// The addrlib defines a 64-bit unsigned integer type for either
684 /// Gnu/Watcom compilers (which use the first syntax) or for
685 /// the Windows VCC compiler (which uses the second syntax).
686 ///
687 #define UINT_64 unsigned long long OR unsigned __int64
688 #endif
689
690 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
691
692 // ADDR64X is used to print addresses in hex form on both Windows and Linux
693 //
694 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
695 #define ADDR64X "llx"
696 #define ADDR64D "lld"
697
698 #elif defined( _WIN32 )
699 #define ADDR64X "I64x"
700 #define ADDR64D "I64d"
701
702 #else
703 #error Unsupported compiler and/or operating system for 64-bit integers
704
705 /// @brief Addrlib device address 64-bit printf tag (compiler dependent)
706 /// @ingroup type
707 ///
708 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler
709 /// (which used this value) or the Gnu/Watcom compilers (which use "llx".
710 /// An example of use is printf("addr 0x%"ADDR64X"\n", address);
711 ///
712 #define ADDR64X "llx" OR "I64x"
713 #define ADDR64D "lld" OR "I64d"
714 #endif
715
716 /// @brief Union for storing a 32-bit float or 32-bit integer
717 /// @ingroup type
718 ///
719 /// This union provides a simple way to convert between a 32-bit float
720 /// and a 32-bit integer. It also prevents the compiler from producing
721 /// code that alters NaN values when assiging or coying floats.
722 /// Therefore, all address library routines that pass or return 32-bit
723 /// floating point data do so by passing or returning a FLT_32.
724 ///
725 typedef union {
726 INT_32 i;
727 UINT_32 u;
728 float f;
729 } ADDR_FLT_32;
730
731 ////////////////////////////////////////////////////////////////////////////////////////////////////
732 //
733 // Macros for controlling linking and building on multiple systems
734 //
735 ////////////////////////////////////////////////////////////////////////////////////////////////////
736 #if defined(_MSC_VER)
737 #if defined(va_copy)
738 #undef va_copy //redefine va_copy to support VC2013
739 #endif
740 #endif
741
742 #if !defined(va_copy)
743 #define va_copy(dst, src) \
744 ((void) memcpy(&(dst), &(src), sizeof(va_list)))
745 #endif
746
747 #endif // __ADDR_TYPES_H__
748