amd/addrlib: update Mesa's copy of addrlib
[mesa.git] / src / amd / addrlib / inc / addrtypes.h
1 /*
2 * Copyright © 2007-2018 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file addrtypes.h
30 * @brief Contains the helper function and constants
31 ****************************************************************************************************
32 */
33 #ifndef __ADDR_TYPES_H__
34 #define __ADDR_TYPES_H__
35
36 #if defined(__APPLE__) && !defined(HAVE_TSERVER)
37 // External definitions header maintained by Apple driver team, but not for diag team under Mac.
38 // Helps address compilation issues & reduces code covered by NDA
39 #include "addrExtDef.h"
40
41 #else
42
43 // Windows and/or Linux
44 #if !defined(VOID)
45 typedef void VOID;
46 #endif
47
48 #if !defined(FLOAT)
49 typedef float FLOAT;
50 #endif
51
52 #if !defined(CHAR)
53 typedef char CHAR;
54 #endif
55
56 #if !defined(INT)
57 typedef int INT;
58 #endif
59
60 #include <stdarg.h> // va_list...etc need this header
61
62 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER)
63
64 /**
65 ****************************************************************************************************
66 * Calling conventions
67 ****************************************************************************************************
68 */
69 #ifndef ADDR_CDECL
70 #if defined(__GNUC__)
71 #define ADDR_CDECL __attribute__((cdecl))
72 #else
73 #define ADDR_CDECL __cdecl
74 #endif
75 #endif
76
77 #ifndef ADDR_STDCALL
78 #if defined(__GNUC__)
79 #if defined(__amd64__) || defined(__x86_64__)
80 #define ADDR_STDCALL
81 #else
82 #define ADDR_STDCALL __attribute__((stdcall))
83 #endif
84 #else
85 #define ADDR_STDCALL __stdcall
86 #endif
87 #endif
88
89 #ifndef ADDR_FASTCALL
90 #if defined(BRAHMA_ARM)
91 #define ADDR_FASTCALL
92 #elif defined(__GNUC__)
93 #if defined(__i386__)
94 #define ADDR_FASTCALL __attribute__((regparm(0)))
95 #else
96 #define ADDR_FASTCALL
97 #endif
98 #else
99 #define ADDR_FASTCALL __fastcall
100 #endif
101 #endif
102
103 #ifndef GC_CDECL
104 #define GC_CDECL ADDR_CDECL
105 #endif
106
107 #ifndef GC_STDCALL
108 #define GC_STDCALL ADDR_STDCALL
109 #endif
110
111 #ifndef GC_FASTCALL
112 #define GC_FASTCALL ADDR_FASTCALL
113 #endif
114
115 #if defined(__GNUC__)
116 #define ADDR_INLINE static inline // inline needs to be static to link
117 #else
118 // win32, win64, other platforms
119 #define ADDR_INLINE __inline
120 #endif // #if defined(__GNUC__)
121
122 #define ADDR_API ADDR_FASTCALL //default call convention is fast call
123
124 /**
125 ****************************************************************************************************
126 * Global defines used by other modules
127 ****************************************************************************************************
128 */
129 #if !defined(TILEINDEX_INVALID)
130 #define TILEINDEX_INVALID -1
131 #endif
132
133 #if !defined(TILEINDEX_LINEAR_GENERAL)
134 #define TILEINDEX_LINEAR_GENERAL -2
135 #endif
136
137 #if !defined(TILEINDEX_LINEAR_ALIGNED)
138 #define TILEINDEX_LINEAR_ALIGNED 8
139 #endif
140
141 /**
142 ****************************************************************************************************
143 * Return codes
144 ****************************************************************************************************
145 */
146 typedef enum _ADDR_E_RETURNCODE
147 {
148 // General Return
149 ADDR_OK = 0,
150 ADDR_ERROR = 1,
151
152 // Specific Errors
153 ADDR_OUTOFMEMORY,
154 ADDR_INVALIDPARAMS,
155 ADDR_NOTSUPPORTED,
156 ADDR_NOTIMPLEMENTED,
157 ADDR_PARAMSIZEMISMATCH,
158 ADDR_INVALIDGBREGVALUES,
159
160 } ADDR_E_RETURNCODE;
161
162 /**
163 ****************************************************************************************************
164 * @brief
165 * Neutral enums that define tile modes for all H/W
166 * @note
167 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from
168 * ADDR_TM_2D_TILED_XTHICK
169 *
170 ****************************************************************************************************
171 */
172 typedef enum _AddrTileMode
173 {
174 ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer
175 ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels
176 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles
177 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles
178 ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles
179 ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4
180 ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16
181 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles
182 ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap
183 ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4
184 ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16
185 ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles
186 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices
187 ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick
188 ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap
189 ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick
190 ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI
191 ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI
192 ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI
193 ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size
194 ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only
195 ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only
196 ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size
197 ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only
198 ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only
199 ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib
200 ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode
201 } AddrTileMode;
202
203 /**
204 ****************************************************************************************************
205 * @brief
206 * Neutral enums that define swizzle modes for Gfx9 ASIC
207 * @note
208 *
209 * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resouce
210 * ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resouce
211 * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resouce
212 * ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resouce
213 * ADDR_SW_VAR_* addressing block aligned size is ASIC specific, for 2D/3D resouce
214 *
215 * ADDR_SW_*_Z For 2D resouce, represents Z-order swizzle mode for depth/stencil/FMask
216 For 3D resouce, represents a swizzle mode similar to legacy thick tile mode
217 * ADDR_SW_*_S represents standard swizzle mode defined by MS
218 * ADDR_SW_*_D For 2D resouce, represents a swizzle mode for displayable resource
219 * For 3D resouce, represents a swizzle mode which places each slice in order & pixel
220 within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible!
221 * ADDR_SW_*_R For 2D resouce only, represents a swizzle mode for rotated displayable resource
222 *
223 ****************************************************************************************************
224 */
225 typedef enum _AddrSwizzleMode
226 {
227 ADDR_SW_LINEAR = 0,
228 ADDR_SW_256B_S = 1,
229 ADDR_SW_256B_D = 2,
230 ADDR_SW_256B_R = 3,
231 ADDR_SW_4KB_Z = 4,
232 ADDR_SW_4KB_S = 5,
233 ADDR_SW_4KB_D = 6,
234 ADDR_SW_4KB_R = 7,
235 ADDR_SW_64KB_Z = 8,
236 ADDR_SW_64KB_S = 9,
237 ADDR_SW_64KB_D = 10,
238 ADDR_SW_64KB_R = 11,
239 ADDR_SW_VAR_Z = 12,
240 ADDR_SW_VAR_S = 13,
241 ADDR_SW_VAR_D = 14,
242 ADDR_SW_VAR_R = 15,
243 ADDR_SW_64KB_Z_T = 16,
244 ADDR_SW_64KB_S_T = 17,
245 ADDR_SW_64KB_D_T = 18,
246 ADDR_SW_64KB_R_T = 19,
247 ADDR_SW_4KB_Z_X = 20,
248 ADDR_SW_4KB_S_X = 21,
249 ADDR_SW_4KB_D_X = 22,
250 ADDR_SW_4KB_R_X = 23,
251 ADDR_SW_64KB_Z_X = 24,
252 ADDR_SW_64KB_S_X = 25,
253 ADDR_SW_64KB_D_X = 26,
254 ADDR_SW_64KB_R_X = 27,
255 ADDR_SW_VAR_Z_X = 28,
256 ADDR_SW_VAR_S_X = 29,
257 ADDR_SW_VAR_D_X = 30,
258 ADDR_SW_VAR_R_X = 31,
259 ADDR_SW_LINEAR_GENERAL = 32,
260 ADDR_SW_MAX_TYPE = 33,
261
262 // Used for represent block with identical size
263 ADDR_SW_256B = ADDR_SW_256B_S,
264 ADDR_SW_4KB = ADDR_SW_4KB_S_X,
265 ADDR_SW_64KB = ADDR_SW_64KB_S_X,
266 ADDR_SW_VAR = ADDR_SW_VAR_S_X,
267 } AddrSwizzleMode;
268
269 /**
270 ****************************************************************************************************
271 * @brief
272 * Neutral enums that define image type
273 * @note
274 * this is new for address library interface version 2
275 *
276 ****************************************************************************************************
277 */
278 typedef enum _AddrResourceType
279 {
280 ADDR_RSRC_TEX_1D = 0,
281 ADDR_RSRC_TEX_2D = 1,
282 ADDR_RSRC_TEX_3D = 2,
283 ADDR_RSRC_MAX_TYPE = 3,
284 } AddrResourceType;
285
286 /**
287 ****************************************************************************************************
288 * @brief
289 * Neutral enums that define resource heap location
290 * @note
291 * this is new for address library interface version 2
292 *
293 ****************************************************************************************************
294 */
295 typedef enum _AddrResrouceLocation
296 {
297 ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown
298 ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap
299 ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap
300 ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap
301 ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only
302 ADDR_RSRC_LOC_MAX_TYPE = 5,
303 } AddrResrouceLocation;
304
305 /**
306 ****************************************************************************************************
307 * @brief
308 * Neutral enums that define resource basic swizzle mode
309 * @note
310 * this is new for address library interface version 2
311 *
312 ****************************************************************************************************
313 */
314 typedef enum _AddrSwType
315 {
316 ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder
317 ADDR_SW_S = 1, // Resource basic swizzle mode is Standard
318 ADDR_SW_D = 2, // Resource basic swizzle mode is Display
319 ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated
320 } AddrSwType;
321
322 /**
323 ****************************************************************************************************
324 * @brief
325 * Neutral enums that define mipmap major mode
326 * @note
327 * this is new for address library interface version 2
328 *
329 ****************************************************************************************************
330 */
331 typedef enum _AddrMajorMode
332 {
333 ADDR_MAJOR_X = 0,
334 ADDR_MAJOR_Y = 1,
335 ADDR_MAJOR_Z = 2,
336 ADDR_MAJOR_MAX_TYPE = 3,
337 } AddrMajorMode;
338
339 /**
340 ****************************************************************************************************
341 * AddrFormat
342 *
343 * @brief
344 * Neutral enum for SurfaceFormat
345 *
346 ****************************************************************************************************
347 */
348 typedef enum _AddrFormat {
349 ADDR_FMT_INVALID = 0x00000000,
350 ADDR_FMT_8 = 0x00000001,
351 ADDR_FMT_4_4 = 0x00000002,
352 ADDR_FMT_3_3_2 = 0x00000003,
353 ADDR_FMT_RESERVED_4 = 0x00000004,
354 ADDR_FMT_16 = 0x00000005,
355 ADDR_FMT_16_FLOAT = ADDR_FMT_16,
356 ADDR_FMT_8_8 = 0x00000007,
357 ADDR_FMT_5_6_5 = 0x00000008,
358 ADDR_FMT_6_5_5 = 0x00000009,
359 ADDR_FMT_1_5_5_5 = 0x0000000a,
360 ADDR_FMT_4_4_4_4 = 0x0000000b,
361 ADDR_FMT_5_5_5_1 = 0x0000000c,
362 ADDR_FMT_32 = 0x0000000d,
363 ADDR_FMT_32_FLOAT = ADDR_FMT_32,
364 ADDR_FMT_16_16 = 0x0000000f,
365 ADDR_FMT_16_16_FLOAT = ADDR_FMT_16_16,
366 ADDR_FMT_8_24 = 0x00000011,
367 ADDR_FMT_8_24_FLOAT = ADDR_FMT_8_24,
368 ADDR_FMT_24_8 = 0x00000013,
369 ADDR_FMT_24_8_FLOAT = ADDR_FMT_24_8,
370 ADDR_FMT_10_11_11 = 0x00000015,
371 ADDR_FMT_10_11_11_FLOAT = ADDR_FMT_10_11_11,
372 ADDR_FMT_11_11_10 = 0x00000017,
373 ADDR_FMT_11_11_10_FLOAT = ADDR_FMT_11_11_10,
374 ADDR_FMT_2_10_10_10 = 0x00000019,
375 ADDR_FMT_8_8_8_8 = 0x0000001a,
376 ADDR_FMT_10_10_10_2 = 0x0000001b,
377 ADDR_FMT_X24_8_32_FLOAT = 0x0000001c,
378 ADDR_FMT_32_32 = 0x0000001d,
379 ADDR_FMT_32_32_FLOAT = ADDR_FMT_32_32,
380 ADDR_FMT_16_16_16_16 = 0x0000001f,
381 ADDR_FMT_16_16_16_16_FLOAT = ADDR_FMT_16_16_16_16,
382 ADDR_FMT_RESERVED_33 = 0x00000021,
383 ADDR_FMT_32_32_32_32 = 0x00000022,
384 ADDR_FMT_32_32_32_32_FLOAT = ADDR_FMT_32_32_32_32,
385 ADDR_FMT_RESERVED_36 = 0x00000024,
386 ADDR_FMT_1 = 0x00000025,
387 ADDR_FMT_1_REVERSED = 0x00000026,
388 ADDR_FMT_GB_GR = 0x00000027,
389 ADDR_FMT_BG_RG = 0x00000028,
390 ADDR_FMT_32_AS_8 = 0x00000029,
391 ADDR_FMT_32_AS_8_8 = 0x0000002a,
392 ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b,
393 ADDR_FMT_8_8_8 = 0x0000002c,
394 ADDR_FMT_16_16_16 = 0x0000002d,
395 ADDR_FMT_16_16_16_FLOAT = ADDR_FMT_16_16_16,
396 ADDR_FMT_32_32_32 = 0x0000002f,
397 ADDR_FMT_32_32_32_FLOAT = ADDR_FMT_32_32_32,
398 ADDR_FMT_BC1 = 0x00000031,
399 ADDR_FMT_BC2 = 0x00000032,
400 ADDR_FMT_BC3 = 0x00000033,
401 ADDR_FMT_BC4 = 0x00000034,
402 ADDR_FMT_BC5 = 0x00000035,
403 ADDR_FMT_BC6 = 0x00000036,
404 ADDR_FMT_BC7 = 0x00000037,
405 ADDR_FMT_32_AS_32_32_32_32 = 0x00000038,
406 ADDR_FMT_APC3 = 0x00000039,
407 ADDR_FMT_APC4 = 0x0000003a,
408 ADDR_FMT_APC5 = 0x0000003b,
409 ADDR_FMT_APC6 = 0x0000003c,
410 ADDR_FMT_APC7 = 0x0000003d,
411 ADDR_FMT_CTX1 = 0x0000003e,
412 ADDR_FMT_RESERVED_63 = 0x0000003f,
413 ADDR_FMT_ASTC_4x4 = 0x00000040,
414 ADDR_FMT_ASTC_5x4 = 0x00000041,
415 ADDR_FMT_ASTC_5x5 = 0x00000042,
416 ADDR_FMT_ASTC_6x5 = 0x00000043,
417 ADDR_FMT_ASTC_6x6 = 0x00000044,
418 ADDR_FMT_ASTC_8x5 = 0x00000045,
419 ADDR_FMT_ASTC_8x6 = 0x00000046,
420 ADDR_FMT_ASTC_8x8 = 0x00000047,
421 ADDR_FMT_ASTC_10x5 = 0x00000048,
422 ADDR_FMT_ASTC_10x6 = 0x00000049,
423 ADDR_FMT_ASTC_10x8 = 0x0000004a,
424 ADDR_FMT_ASTC_10x10 = 0x0000004b,
425 ADDR_FMT_ASTC_12x10 = 0x0000004c,
426 ADDR_FMT_ASTC_12x12 = 0x0000004d,
427 ADDR_FMT_ETC2_64BPP = 0x0000004e,
428 ADDR_FMT_ETC2_128BPP = 0x0000004f,
429 } AddrFormat;
430
431 /**
432 ****************************************************************************************************
433 * AddrDepthFormat
434 *
435 * @brief
436 * Neutral enum for addrFlt32ToDepthPixel
437 *
438 ****************************************************************************************************
439 */
440 typedef enum _AddrDepthFormat
441 {
442 ADDR_DEPTH_INVALID = 0x00000000,
443 ADDR_DEPTH_16 = 0x00000001,
444 ADDR_DEPTH_X8_24 = 0x00000002,
445 ADDR_DEPTH_8_24 = 0x00000003,
446 ADDR_DEPTH_X8_24_FLOAT = 0x00000004,
447 ADDR_DEPTH_8_24_FLOAT = 0x00000005,
448 ADDR_DEPTH_32_FLOAT = 0x00000006,
449 ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007,
450
451 } AddrDepthFormat;
452
453 /**
454 ****************************************************************************************************
455 * AddrColorFormat
456 *
457 * @brief
458 * Neutral enum for ColorFormat
459 *
460 ****************************************************************************************************
461 */
462 typedef enum _AddrColorFormat
463 {
464 ADDR_COLOR_INVALID = 0x00000000,
465 ADDR_COLOR_8 = 0x00000001,
466 ADDR_COLOR_4_4 = 0x00000002,
467 ADDR_COLOR_3_3_2 = 0x00000003,
468 ADDR_COLOR_RESERVED_4 = 0x00000004,
469 ADDR_COLOR_16 = 0x00000005,
470 ADDR_COLOR_16_FLOAT = 0x00000006,
471 ADDR_COLOR_8_8 = 0x00000007,
472 ADDR_COLOR_5_6_5 = 0x00000008,
473 ADDR_COLOR_6_5_5 = 0x00000009,
474 ADDR_COLOR_1_5_5_5 = 0x0000000a,
475 ADDR_COLOR_4_4_4_4 = 0x0000000b,
476 ADDR_COLOR_5_5_5_1 = 0x0000000c,
477 ADDR_COLOR_32 = 0x0000000d,
478 ADDR_COLOR_32_FLOAT = 0x0000000e,
479 ADDR_COLOR_16_16 = 0x0000000f,
480 ADDR_COLOR_16_16_FLOAT = 0x00000010,
481 ADDR_COLOR_8_24 = 0x00000011,
482 ADDR_COLOR_8_24_FLOAT = 0x00000012,
483 ADDR_COLOR_24_8 = 0x00000013,
484 ADDR_COLOR_24_8_FLOAT = 0x00000014,
485 ADDR_COLOR_10_11_11 = 0x00000015,
486 ADDR_COLOR_10_11_11_FLOAT = 0x00000016,
487 ADDR_COLOR_11_11_10 = 0x00000017,
488 ADDR_COLOR_11_11_10_FLOAT = 0x00000018,
489 ADDR_COLOR_2_10_10_10 = 0x00000019,
490 ADDR_COLOR_8_8_8_8 = 0x0000001a,
491 ADDR_COLOR_10_10_10_2 = 0x0000001b,
492 ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c,
493 ADDR_COLOR_32_32 = 0x0000001d,
494 ADDR_COLOR_32_32_FLOAT = 0x0000001e,
495 ADDR_COLOR_16_16_16_16 = 0x0000001f,
496 ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020,
497 ADDR_COLOR_RESERVED_33 = 0x00000021,
498 ADDR_COLOR_32_32_32_32 = 0x00000022,
499 ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023,
500 } AddrColorFormat;
501
502 /**
503 ****************************************************************************************************
504 * AddrSurfaceNumber
505 *
506 * @brief
507 * Neutral enum for SurfaceNumber
508 *
509 ****************************************************************************************************
510 */
511 typedef enum _AddrSurfaceNumber {
512 ADDR_NUMBER_UNORM = 0x00000000,
513 ADDR_NUMBER_SNORM = 0x00000001,
514 ADDR_NUMBER_USCALED = 0x00000002,
515 ADDR_NUMBER_SSCALED = 0x00000003,
516 ADDR_NUMBER_UINT = 0x00000004,
517 ADDR_NUMBER_SINT = 0x00000005,
518 ADDR_NUMBER_SRGB = 0x00000006,
519 ADDR_NUMBER_FLOAT = 0x00000007,
520 } AddrSurfaceNumber;
521
522 /**
523 ****************************************************************************************************
524 * AddrSurfaceSwap
525 *
526 * @brief
527 * Neutral enum for SurfaceSwap
528 *
529 ****************************************************************************************************
530 */
531 typedef enum _AddrSurfaceSwap {
532 ADDR_SWAP_STD = 0x00000000,
533 ADDR_SWAP_ALT = 0x00000001,
534 ADDR_SWAP_STD_REV = 0x00000002,
535 ADDR_SWAP_ALT_REV = 0x00000003,
536 } AddrSurfaceSwap;
537
538 /**
539 ****************************************************************************************************
540 * AddrHtileBlockSize
541 *
542 * @brief
543 * Size of HTILE blocks, valid values are 4 or 8 for now
544 ****************************************************************************************************
545 */
546 typedef enum _AddrHtileBlockSize
547 {
548 ADDR_HTILE_BLOCKSIZE_4 = 4,
549 ADDR_HTILE_BLOCKSIZE_8 = 8,
550 } AddrHtileBlockSize;
551
552 /**
553 ****************************************************************************************************
554 * AddrPipeCfg
555 *
556 * @brief
557 * The pipe configuration field specifies both the number of pipes and
558 * how pipes are interleaved on the surface.
559 * The expression of number of pipes, the shader engine tile size, and packer tile size
560 * is encoded in a PIPE_CONFIG register field.
561 * In general the number of pipes usually matches the number of memory channels of the
562 * hardware configuration.
563 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches
564 * the number of ROP units(? TODO: which registers??)
565 * The enum value = hw enum + 1 which is to reserve 0 for requesting default.
566 ****************************************************************************************************
567 */
568 typedef enum _AddrPipeCfg
569 {
570 ADDR_PIPECFG_INVALID = 0,
571 ADDR_PIPECFG_P2 = 1, /// 2 pipes,
572 ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes,
573 ADDR_PIPECFG_P4_16x16 = 6,
574 ADDR_PIPECFG_P4_16x32 = 7,
575 ADDR_PIPECFG_P4_32x32 = 8,
576 ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes
577 ADDR_PIPECFG_P8_16x32_8x16 = 10,
578 ADDR_PIPECFG_P8_32x32_8x16 = 11,
579 ADDR_PIPECFG_P8_16x32_16x16 = 12,
580 ADDR_PIPECFG_P8_32x32_16x16 = 13,
581 ADDR_PIPECFG_P8_32x32_16x32 = 14,
582 ADDR_PIPECFG_P8_32x64_32x32 = 15,
583 ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes
584 ADDR_PIPECFG_P16_32x32_16x16 = 18,
585 ADDR_PIPECFG_RESERVED = 19, /// reserved for internal use
586 ADDR_PIPECFG_MAX = 20,
587 } AddrPipeCfg;
588
589 /**
590 ****************************************************************************************************
591 * AddrTileType
592 *
593 * @brief
594 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE)
595 ****************************************************************************************************
596 */
597 typedef enum _AddrTileType
598 {
599 ADDR_DISPLAYABLE = 0, ///< Displayable tiling
600 ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling
601 ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order
602 ADDR_ROTATED = 3, ///< Rotated displayable tiling
603 ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK
604 } AddrTileType;
605
606 ////////////////////////////////////////////////////////////////////////////////////////////////////
607 //
608 // Type definitions: short system-independent names for address library types
609 //
610 ////////////////////////////////////////////////////////////////////////////////////////////////////
611
612 #if !defined(__APPLE__) || defined(HAVE_TSERVER)
613
614 #ifndef BOOL_32 // no bool type in C
615 /// @brief Boolean type, since none is defined in C
616 /// @ingroup type
617 #define BOOL_32 int
618 #endif
619
620 #ifndef INT_32
621 #define INT_32 int
622 #endif
623
624 #ifndef UINT_32
625 #define UINT_32 unsigned int
626 #endif
627
628 #ifndef INT_16
629 #define INT_16 short
630 #endif
631
632 #ifndef UINT_16
633 #define UINT_16 unsigned short
634 #endif
635
636 #ifndef INT_8
637 #define INT_8 char
638 #endif
639
640 #ifndef UINT_8
641 #define UINT_8 unsigned char
642 #endif
643
644 #ifndef NULL
645 #define NULL 0
646 #endif
647
648 #ifndef TRUE
649 #define TRUE 1
650 #endif
651
652 #ifndef FALSE
653 #define FALSE 0
654 #endif
655
656 //
657 // 64-bit integer types depend on the compiler
658 //
659 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
660 #define INT_64 long long
661 #define UINT_64 unsigned long long
662
663 #elif defined( _WIN32 )
664 #define INT_64 __int64
665 #define UINT_64 unsigned __int64
666
667 #else
668 #error Unsupported compiler and/or operating system for 64-bit integers
669
670 /// @brief 64-bit signed integer type (compiler dependent)
671 /// @ingroup type
672 ///
673 /// The addrlib defines a 64-bit signed integer type for either
674 /// Gnu/Watcom compilers (which use the first syntax) or for
675 /// the Windows VCC compiler (which uses the second syntax).
676 #define INT_64 long long OR __int64
677
678 /// @brief 64-bit unsigned integer type (compiler dependent)
679 /// @ingroup type
680 ///
681 /// The addrlib defines a 64-bit unsigned integer type for either
682 /// Gnu/Watcom compilers (which use the first syntax) or for
683 /// the Windows VCC compiler (which uses the second syntax).
684 ///
685 #define UINT_64 unsigned long long OR unsigned __int64
686 #endif
687
688 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER)
689
690 // ADDR64X is used to print addresses in hex form on both Windows and Linux
691 //
692 #if defined( __GNUC__ ) || defined( __WATCOMC__ )
693 #define ADDR64X "llx"
694 #define ADDR64D "lld"
695
696 #elif defined( _WIN32 )
697 #define ADDR64X "I64x"
698 #define ADDR64D "I64d"
699
700 #else
701 #error Unsupported compiler and/or operating system for 64-bit integers
702
703 /// @brief Addrlib device address 64-bit printf tag (compiler dependent)
704 /// @ingroup type
705 ///
706 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler
707 /// (which used this value) or the Gnu/Watcom compilers (which use "llx".
708 /// An example of use is printf("addr 0x%"ADDR64X"\n", address);
709 ///
710 #define ADDR64X "llx" OR "I64x"
711 #define ADDR64D "lld" OR "I64d"
712 #endif
713
714 /// @brief Union for storing a 32-bit float or 32-bit integer
715 /// @ingroup type
716 ///
717 /// This union provides a simple way to convert between a 32-bit float
718 /// and a 32-bit integer. It also prevents the compiler from producing
719 /// code that alters NaN values when assiging or coying floats.
720 /// Therefore, all address library routines that pass or return 32-bit
721 /// floating point data do so by passing or returning a FLT_32.
722 ///
723 typedef union {
724 INT_32 i;
725 UINT_32 u;
726 float f;
727 } ADDR_FLT_32;
728
729 ////////////////////////////////////////////////////////////////////////////////////////////////////
730 //
731 // Macros for controlling linking and building on multiple systems
732 //
733 ////////////////////////////////////////////////////////////////////////////////////////////////////
734 #if defined(_MSC_VER)
735 #if defined(va_copy)
736 #undef va_copy //redefine va_copy to support VC2013
737 #endif
738 #endif
739
740 #if !defined(va_copy)
741 #define va_copy(dst, src) \
742 ((void) memcpy(&(dst), &(src), sizeof(va_list)))
743 #endif
744
745 #endif // __ADDR_TYPES_H__
746