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amd: fix empty-body issues
[mesa.git] / src / amd / common / ac_debug.c
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "ac_debug.h"
25
26 #ifdef HAVE_VALGRIND
27 #include <valgrind.h>
28 #include <memcheck.h>
29 #define VG(x) x
30 #else
31 #define VG(x) ((void)0)
32 #endif
33
34 #include <inttypes.h>
35
36 #include "sid.h"
37 #include "sid_tables.h"
38 #include "util/u_math.h"
39 #include "util/u_memory.h"
40 #include "util/u_string.h"
41
42 #include <assert.h>
43
44 /* Parsed IBs are difficult to read without colors. Use "less -R file" to
45 * read them, or use "aha -b -f file" to convert them to html.
46 */
47 #define COLOR_RESET "\033[0m"
48 #define COLOR_RED "\033[31m"
49 #define COLOR_GREEN "\033[1;32m"
50 #define COLOR_YELLOW "\033[1;33m"
51 #define COLOR_CYAN "\033[1;36m"
52
53 #define INDENT_PKT 8
54
55 struct ac_ib_parser {
56 FILE *f;
57 uint32_t *ib;
58 unsigned num_dw;
59 const int *trace_ids;
60 unsigned trace_id_count;
61 enum chip_class chip_class;
62 ac_debug_addr_callback addr_callback;
63 void *addr_callback_data;
64
65 unsigned cur_dw;
66 };
67
68 static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib);
69
70 static void print_spaces(FILE *f, unsigned num)
71 {
72 fprintf(f, "%*s", num, "");
73 }
74
75 static void print_value(FILE *file, uint32_t value, int bits)
76 {
77 /* Guess if it's int or float */
78 if (value <= (1 << 15)) {
79 if (value <= 9)
80 fprintf(file, "%u\n", value);
81 else
82 fprintf(file, "%u (0x%0*x)\n", value, bits / 4, value);
83 } else {
84 float f = uif(value);
85
86 if (fabs(f) < 100000 && f*10 == floor(f*10))
87 fprintf(file, "%.1ff (0x%0*x)\n", f, bits / 4, value);
88 else
89 /* Don't print more leading zeros than there are bits. */
90 fprintf(file, "0x%0*x\n", bits / 4, value);
91 }
92 }
93
94 static void print_named_value(FILE *file, const char *name, uint32_t value,
95 int bits)
96 {
97 print_spaces(file, INDENT_PKT);
98 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ", name);
99 print_value(file, value, bits);
100 }
101
102 static const struct si_reg *find_register(const struct si_reg *table,
103 unsigned table_size,
104 unsigned offset)
105 {
106 for (unsigned i = 0; i < table_size; i++) {
107 const struct si_reg *reg = &table[i];
108
109 if (reg->offset == offset)
110 return reg;
111 }
112
113 return NULL;
114 }
115
116 void ac_dump_reg(FILE *file, enum chip_class chip_class, unsigned offset,
117 uint32_t value, uint32_t field_mask)
118 {
119 const struct si_reg *reg = NULL;
120
121 if (chip_class >= GFX10)
122 reg = find_register(gfx10_reg_table, ARRAY_SIZE(gfx10_reg_table), offset);
123 else if (chip_class >= GFX9)
124 reg = find_register(gfx9_reg_table, ARRAY_SIZE(gfx9_reg_table), offset);
125 else if (chip_class >= GFX8)
126 reg = find_register(gfx8_reg_table, ARRAY_SIZE(gfx8_reg_table), offset);
127 else if (chip_class >= GFX7)
128 reg = find_register(gfx7_reg_table, ARRAY_SIZE(gfx7_reg_table), offset);
129 else
130 reg = find_register(gfx6_reg_table, ARRAY_SIZE(gfx6_reg_table), offset);
131
132 if (reg) {
133 const char *reg_name = sid_strings + reg->name_offset;
134 bool first_field = true;
135
136 print_spaces(file, INDENT_PKT);
137 fprintf(file, COLOR_YELLOW "%s" COLOR_RESET " <- ",
138 reg_name);
139
140 if (!reg->num_fields) {
141 print_value(file, value, 32);
142 return;
143 }
144
145 for (unsigned f = 0; f < reg->num_fields; f++) {
146 const struct si_field *field = sid_fields_table + reg->fields_offset + f;
147 const int *values_offsets = sid_strings_offsets + field->values_offset;
148 uint32_t val = (value & field->mask) >>
149 (ffs(field->mask) - 1);
150
151 if (!(field->mask & field_mask))
152 continue;
153
154 /* Indent the field. */
155 if (!first_field)
156 print_spaces(file,
157 INDENT_PKT + strlen(reg_name) + 4);
158
159 /* Print the field. */
160 fprintf(file, "%s = ", sid_strings + field->name_offset);
161
162 if (val < field->num_values && values_offsets[val] >= 0)
163 fprintf(file, "%s\n", sid_strings + values_offsets[val]);
164 else
165 print_value(file, val,
166 util_bitcount(field->mask));
167
168 first_field = false;
169 }
170 return;
171 }
172
173 print_spaces(file, INDENT_PKT);
174 fprintf(file, COLOR_YELLOW "0x%05x" COLOR_RESET " <- 0x%08x\n", offset, value);
175 }
176
177 static uint32_t ac_ib_get(struct ac_ib_parser *ib)
178 {
179 uint32_t v = 0;
180
181 if (ib->cur_dw < ib->num_dw) {
182 v = ib->ib[ib->cur_dw];
183 #ifdef HAVE_VALGRIND
184 /* Help figure out where garbage data is written to IBs.
185 *
186 * Arguably we should do this already when the IBs are written,
187 * see RADEON_VALGRIND. The problem is that client-requests to
188 * Valgrind have an overhead even when Valgrind isn't running,
189 * and radeon_emit is performance sensitive...
190 */
191 if (VALGRIND_CHECK_VALUE_IS_DEFINED(v))
192 fprintf(ib->f, COLOR_RED "Valgrind: The next DWORD is garbage"
193 COLOR_RESET "\n");
194 #endif
195 fprintf(ib->f, "\n\035#%08x ", v);
196 } else {
197 fprintf(ib->f, "\n\035#???????? ");
198 }
199
200 ib->cur_dw++;
201 return v;
202 }
203
204 static void ac_parse_set_reg_packet(FILE *f, unsigned count, unsigned reg_offset,
205 struct ac_ib_parser *ib)
206 {
207 unsigned reg_dw = ac_ib_get(ib);
208 unsigned reg = ((reg_dw & 0xFFFF) << 2) + reg_offset;
209 unsigned index = reg_dw >> 28;
210 int i;
211
212 if (index != 0) {
213 print_spaces(f, INDENT_PKT);
214 fprintf(f, "INDEX = %u\n", index);
215 }
216
217 for (i = 0; i < count; i++)
218 ac_dump_reg(f, ib->chip_class, reg + i*4, ac_ib_get(ib), ~0);
219 }
220
221 static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib,
222 int *current_trace_id)
223 {
224 unsigned first_dw = ib->cur_dw;
225 int count = PKT_COUNT_G(header);
226 unsigned op = PKT3_IT_OPCODE_G(header);
227 const char *predicate = PKT3_PREDICATE(header) ? "(predicate)" : "";
228 int i;
229
230 /* Print the name first. */
231 for (i = 0; i < ARRAY_SIZE(packet3_table); i++)
232 if (packet3_table[i].op == op)
233 break;
234
235 if (i < ARRAY_SIZE(packet3_table)) {
236 const char *name = sid_strings + packet3_table[i].name_offset;
237
238 if (op == PKT3_SET_CONTEXT_REG ||
239 op == PKT3_SET_CONFIG_REG ||
240 op == PKT3_SET_UCONFIG_REG ||
241 op == PKT3_SET_UCONFIG_REG_INDEX ||
242 op == PKT3_SET_SH_REG)
243 fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n",
244 name, predicate);
245 else
246 fprintf(f, COLOR_GREEN "%s%s" COLOR_RESET ":\n",
247 name, predicate);
248 } else
249 fprintf(f, COLOR_RED "PKT3_UNKNOWN 0x%x%s" COLOR_RESET ":\n",
250 op, predicate);
251
252 /* Print the contents. */
253 switch (op) {
254 case PKT3_SET_CONTEXT_REG:
255 ac_parse_set_reg_packet(f, count, SI_CONTEXT_REG_OFFSET, ib);
256 break;
257 case PKT3_SET_CONFIG_REG:
258 ac_parse_set_reg_packet(f, count, SI_CONFIG_REG_OFFSET, ib);
259 break;
260 case PKT3_SET_UCONFIG_REG:
261 case PKT3_SET_UCONFIG_REG_INDEX:
262 ac_parse_set_reg_packet(f, count, CIK_UCONFIG_REG_OFFSET, ib);
263 break;
264 case PKT3_SET_SH_REG:
265 ac_parse_set_reg_packet(f, count, SI_SH_REG_OFFSET, ib);
266 break;
267 case PKT3_ACQUIRE_MEM:
268 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
269 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
270 ac_dump_reg(f, ib->chip_class, R_030230_CP_COHER_SIZE_HI, ac_ib_get(ib), ~0);
271 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
272 ac_dump_reg(f, ib->chip_class, R_0301E4_CP_COHER_BASE_HI, ac_ib_get(ib), ~0);
273 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
274 if (ib->chip_class >= GFX10)
275 ac_dump_reg(f, ib->chip_class, R_586_GCR_CNTL, ac_ib_get(ib), ~0);
276 break;
277 case PKT3_SURFACE_SYNC:
278 if (ib->chip_class >= GFX7) {
279 ac_dump_reg(f, ib->chip_class, R_0301F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
280 ac_dump_reg(f, ib->chip_class, R_0301F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
281 ac_dump_reg(f, ib->chip_class, R_0301F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
282 } else {
283 ac_dump_reg(f, ib->chip_class, R_0085F0_CP_COHER_CNTL, ac_ib_get(ib), ~0);
284 ac_dump_reg(f, ib->chip_class, R_0085F4_CP_COHER_SIZE, ac_ib_get(ib), ~0);
285 ac_dump_reg(f, ib->chip_class, R_0085F8_CP_COHER_BASE, ac_ib_get(ib), ~0);
286 }
287 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
288 break;
289 case PKT3_EVENT_WRITE: {
290 uint32_t event_dw = ac_ib_get(ib);
291 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
292 S_028A90_EVENT_TYPE(~0));
293 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
294 print_named_value(f, "INV_L2", (event_dw >> 20) & 0x1, 1);
295 if (count > 0) {
296 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
297 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 16);
298 }
299 break;
300 }
301 case PKT3_EVENT_WRITE_EOP: {
302 uint32_t event_dw = ac_ib_get(ib);
303 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
304 S_028A90_EVENT_TYPE(~0));
305 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
306 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
307 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
308 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
309 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
310 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
311 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
312 uint32_t addr_hi_dw = ac_ib_get(ib);
313 print_named_value(f, "ADDRESS_HI", addr_hi_dw, 16);
314 print_named_value(f, "DST_SEL", (addr_hi_dw >> 16) & 0x3, 2);
315 print_named_value(f, "INT_SEL", (addr_hi_dw >> 24) & 0x7, 3);
316 print_named_value(f, "DATA_SEL", addr_hi_dw >> 29, 3);
317 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
318 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
319 break;
320 }
321 case PKT3_RELEASE_MEM: {
322 uint32_t event_dw = ac_ib_get(ib);
323 if (ib->chip_class >= GFX10) {
324 ac_dump_reg(f, ib->chip_class, R_490_RELEASE_MEM_OP, event_dw, ~0u);
325 } else {
326 ac_dump_reg(f, ib->chip_class, R_028A90_VGT_EVENT_INITIATOR, event_dw,
327 S_028A90_EVENT_TYPE(~0));
328 print_named_value(f, "EVENT_INDEX", (event_dw >> 8) & 0xf, 4);
329 print_named_value(f, "TCL1_VOL_ACTION_ENA", (event_dw >> 12) & 0x1, 1);
330 print_named_value(f, "TC_VOL_ACTION_ENA", (event_dw >> 13) & 0x1, 1);
331 print_named_value(f, "TC_WB_ACTION_ENA", (event_dw >> 15) & 0x1, 1);
332 print_named_value(f, "TCL1_ACTION_ENA", (event_dw >> 16) & 0x1, 1);
333 print_named_value(f, "TC_ACTION_ENA", (event_dw >> 17) & 0x1, 1);
334 print_named_value(f, "TC_NC_ACTION_ENA", (event_dw >> 19) & 0x1, 1);
335 print_named_value(f, "TC_WC_ACTION_ENA", (event_dw >> 20) & 0x1, 1);
336 print_named_value(f, "TC_MD_ACTION_ENA", (event_dw >> 21) & 0x1, 1);
337 }
338 uint32_t sel_dw = ac_ib_get(ib);
339 print_named_value(f, "DST_SEL", (sel_dw >> 16) & 0x3, 2);
340 print_named_value(f, "INT_SEL", (sel_dw >> 24) & 0x7, 3);
341 print_named_value(f, "DATA_SEL", sel_dw >> 29, 3);
342 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
343 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
344 print_named_value(f, "DATA_LO", ac_ib_get(ib), 32);
345 print_named_value(f, "DATA_HI", ac_ib_get(ib), 32);
346 print_named_value(f, "CTXID", ac_ib_get(ib), 32);
347 break;
348 }
349 case PKT3_WAIT_REG_MEM:
350 print_named_value(f, "OP", ac_ib_get(ib), 32);
351 print_named_value(f, "ADDRESS_LO", ac_ib_get(ib), 32);
352 print_named_value(f, "ADDRESS_HI", ac_ib_get(ib), 32);
353 print_named_value(f, "REF", ac_ib_get(ib), 32);
354 print_named_value(f, "MASK", ac_ib_get(ib), 32);
355 print_named_value(f, "POLL_INTERVAL", ac_ib_get(ib), 16);
356 break;
357 case PKT3_DRAW_INDEX_AUTO:
358 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
359 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
360 break;
361 case PKT3_DRAW_INDEX_2:
362 ac_dump_reg(f, ib->chip_class, R_028A78_VGT_DMA_MAX_SIZE, ac_ib_get(ib), ~0);
363 ac_dump_reg(f, ib->chip_class, R_0287E8_VGT_DMA_BASE, ac_ib_get(ib), ~0);
364 ac_dump_reg(f, ib->chip_class, R_0287E4_VGT_DMA_BASE_HI, ac_ib_get(ib), ~0);
365 ac_dump_reg(f, ib->chip_class, R_030930_VGT_NUM_INDICES, ac_ib_get(ib), ~0);
366 ac_dump_reg(f, ib->chip_class, R_0287F0_VGT_DRAW_INITIATOR, ac_ib_get(ib), ~0);
367 break;
368 case PKT3_INDEX_TYPE:
369 ac_dump_reg(f, ib->chip_class, R_028A7C_VGT_DMA_INDEX_TYPE, ac_ib_get(ib), ~0);
370 break;
371 case PKT3_NUM_INSTANCES:
372 ac_dump_reg(f, ib->chip_class, R_030934_VGT_NUM_INSTANCES, ac_ib_get(ib), ~0);
373 break;
374 case PKT3_WRITE_DATA:
375 ac_dump_reg(f, ib->chip_class, R_370_CONTROL, ac_ib_get(ib), ~0);
376 ac_dump_reg(f, ib->chip_class, R_371_DST_ADDR_LO, ac_ib_get(ib), ~0);
377 ac_dump_reg(f, ib->chip_class, R_372_DST_ADDR_HI, ac_ib_get(ib), ~0);
378 /* The payload is written automatically */
379 break;
380 case PKT3_CP_DMA:
381 ac_dump_reg(f, ib->chip_class, R_410_CP_DMA_WORD0, ac_ib_get(ib), ~0);
382 ac_dump_reg(f, ib->chip_class, R_411_CP_DMA_WORD1, ac_ib_get(ib), ~0);
383 ac_dump_reg(f, ib->chip_class, R_412_CP_DMA_WORD2, ac_ib_get(ib), ~0);
384 ac_dump_reg(f, ib->chip_class, R_413_CP_DMA_WORD3, ac_ib_get(ib), ~0);
385 ac_dump_reg(f, ib->chip_class, R_414_COMMAND, ac_ib_get(ib), ~0);
386 break;
387 case PKT3_DMA_DATA:
388 ac_dump_reg(f, ib->chip_class, R_500_DMA_DATA_WORD0, ac_ib_get(ib), ~0);
389 ac_dump_reg(f, ib->chip_class, R_501_SRC_ADDR_LO, ac_ib_get(ib), ~0);
390 ac_dump_reg(f, ib->chip_class, R_502_SRC_ADDR_HI, ac_ib_get(ib), ~0);
391 ac_dump_reg(f, ib->chip_class, R_503_DST_ADDR_LO, ac_ib_get(ib), ~0);
392 ac_dump_reg(f, ib->chip_class, R_504_DST_ADDR_HI, ac_ib_get(ib), ~0);
393 ac_dump_reg(f, ib->chip_class, R_414_COMMAND, ac_ib_get(ib), ~0);
394 break;
395 case PKT3_INDIRECT_BUFFER_SI:
396 case PKT3_INDIRECT_BUFFER_CONST:
397 case PKT3_INDIRECT_BUFFER_CIK: {
398 uint32_t base_lo_dw = ac_ib_get(ib);
399 ac_dump_reg(f, ib->chip_class, R_3F0_IB_BASE_LO, base_lo_dw, ~0);
400 uint32_t base_hi_dw = ac_ib_get(ib);
401 ac_dump_reg(f, ib->chip_class, R_3F1_IB_BASE_HI, base_hi_dw, ~0);
402 uint32_t control_dw = ac_ib_get(ib);
403 ac_dump_reg(f, ib->chip_class, R_3F2_IB_CONTROL, control_dw, ~0);
404
405 if (!ib->addr_callback)
406 break;
407
408 uint64_t addr = ((uint64_t)base_hi_dw << 32) | base_lo_dw;
409 void *data = ib->addr_callback(ib->addr_callback_data, addr);
410 if (!data)
411 break;
412
413 if (G_3F2_CHAIN(control_dw)) {
414 ib->ib = data;
415 ib->num_dw = G_3F2_IB_SIZE(control_dw);
416 ib->cur_dw = 0;
417 return;
418 }
419
420 struct ac_ib_parser ib_recurse;
421 memcpy(&ib_recurse, ib, sizeof(ib_recurse));
422 ib_recurse.ib = data;
423 ib_recurse.num_dw = G_3F2_IB_SIZE(control_dw);
424 ib_recurse.cur_dw = 0;
425 if(ib_recurse.trace_id_count) {
426 if (*current_trace_id == *ib->trace_ids) {
427 ++ib_recurse.trace_ids;
428 --ib_recurse.trace_id_count;
429 } else {
430 ib_recurse.trace_id_count = 0;
431 }
432 }
433
434 fprintf(f, "\n\035>------------------ nested begin ------------------\n");
435 ac_do_parse_ib(f, &ib_recurse);
436 fprintf(f, "\n\035<------------------- nested end -------------------\n");
437 break;
438 }
439 case PKT3_CLEAR_STATE:
440 case PKT3_INCREMENT_DE_COUNTER:
441 case PKT3_PFP_SYNC_ME:
442 break;
443 case PKT3_NOP:
444 if (header == 0xffff1000) {
445 count = -1; /* One dword NOP. */
446 } else if (count == 0 && ib->cur_dw < ib->num_dw &&
447 AC_IS_TRACE_POINT(ib->ib[ib->cur_dw])) {
448 unsigned packet_id = AC_GET_TRACE_POINT_ID(ib->ib[ib->cur_dw]);
449
450 print_spaces(f, INDENT_PKT);
451 fprintf(f, COLOR_RED "Trace point ID: %u\n", packet_id);
452
453 if (!ib->trace_id_count)
454 break; /* tracing was disabled */
455
456 *current_trace_id = packet_id;
457
458 print_spaces(f, INDENT_PKT);
459 if (packet_id < *ib->trace_ids)
460 fprintf(f, COLOR_RED
461 "This trace point was reached by the CP."
462 COLOR_RESET "\n");
463 else if (packet_id == *ib->trace_ids)
464 fprintf(f, COLOR_RED
465 "!!!!! This is the last trace point that "
466 "was reached by the CP !!!!!"
467 COLOR_RESET "\n");
468 else if (packet_id+1 == *ib->trace_ids)
469 fprintf(f, COLOR_RED
470 "!!!!! This is the first trace point that "
471 "was NOT been reached by the CP !!!!!"
472 COLOR_RESET "\n");
473 else
474 fprintf(f, COLOR_RED
475 "!!!!! This trace point was NOT reached "
476 "by the CP !!!!!"
477 COLOR_RESET "\n");
478 break;
479 }
480 break;
481 }
482
483 /* print additional dwords */
484 while (ib->cur_dw <= first_dw + count)
485 ac_ib_get(ib);
486
487 if (ib->cur_dw > first_dw + count + 1)
488 fprintf(f, COLOR_RED "\n!!!!! count in header too low !!!!!"
489 COLOR_RESET "\n");
490 }
491
492 /**
493 * Parse and print an IB into a file.
494 */
495 static void ac_do_parse_ib(FILE *f, struct ac_ib_parser *ib)
496 {
497 int current_trace_id = -1;
498
499 while (ib->cur_dw < ib->num_dw) {
500 uint32_t header = ac_ib_get(ib);
501 unsigned type = PKT_TYPE_G(header);
502
503 switch (type) {
504 case 3:
505 ac_parse_packet3(f, header, ib, &current_trace_id);
506 break;
507 case 2:
508 /* type-2 nop */
509 if (header == 0x80000000) {
510 fprintf(f, COLOR_GREEN "NOP (type 2)" COLOR_RESET "\n");
511 break;
512 }
513 /* fall through */
514 default:
515 fprintf(f, "Unknown packet type %i\n", type);
516 break;
517 }
518 }
519 }
520
521 static void format_ib_output(FILE *f, char *out)
522 {
523 unsigned depth = 0;
524
525 for (;;) {
526 char op = 0;
527
528 if (out[0] == '\n' && out[1] == '\035')
529 out++;
530 if (out[0] == '\035') {
531 op = out[1];
532 out += 2;
533 }
534
535 if (op == '<')
536 depth--;
537
538 unsigned indent = 4 * depth;
539 if (op != '#')
540 indent += 9;
541
542 if (indent)
543 print_spaces(f, indent);
544
545 char *end = strchrnul(out, '\n');
546 fwrite(out, end - out, 1, f);
547 fputc('\n', f); /* always end with a new line */
548 if (!*end)
549 break;
550
551 out = end + 1;
552
553 if (op == '>')
554 depth++;
555 }
556 }
557
558 /**
559 * Parse and print an IB into a file.
560 *
561 * \param f file
562 * \param ib_ptr IB
563 * \param num_dw size of the IB
564 * \param chip_class chip class
565 * \param trace_ids the last trace IDs that are known to have been reached
566 * and executed by the CP, typically read from a buffer
567 * \param trace_id_count The number of entries in the trace_ids array.
568 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
569 * be NULL.
570 * \param addr_callback_data user data for addr_callback
571 */
572 void ac_parse_ib_chunk(FILE *f, uint32_t *ib_ptr, int num_dw, const int *trace_ids,
573 unsigned trace_id_count, enum chip_class chip_class,
574 ac_debug_addr_callback addr_callback, void *addr_callback_data)
575 {
576 struct ac_ib_parser ib = {};
577 ib.ib = ib_ptr;
578 ib.num_dw = num_dw;
579 ib.trace_ids = trace_ids;
580 ib.trace_id_count = trace_id_count;
581 ib.chip_class = chip_class;
582 ib.addr_callback = addr_callback;
583 ib.addr_callback_data = addr_callback_data;
584
585 char *out;
586 size_t outsize;
587 FILE *memf = open_memstream(&out, &outsize);
588 ib.f = memf;
589 ac_do_parse_ib(memf, &ib);
590 fclose(memf);
591
592 if (out) {
593 format_ib_output(f, out);
594 free(out);
595 }
596
597 if (ib.cur_dw > ib.num_dw) {
598 printf("\nPacket ends after the end of IB.\n");
599 exit(1);
600 }
601 }
602
603 /**
604 * Parse and print an IB into a file.
605 *
606 * \param f file
607 * \param ib IB
608 * \param num_dw size of the IB
609 * \param chip_class chip class
610 * \param trace_ids the last trace IDs that are known to have been reached
611 * and executed by the CP, typically read from a buffer
612 * \param trace_id_count The number of entries in the trace_ids array.
613 * \param addr_callback Get a mapped pointer of the IB at a given address. Can
614 * be NULL.
615 * \param addr_callback_data user data for addr_callback
616 */
617 void ac_parse_ib(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids,
618 unsigned trace_id_count, const char *name,
619 enum chip_class chip_class, ac_debug_addr_callback addr_callback,
620 void *addr_callback_data)
621 {
622 fprintf(f, "------------------ %s begin ------------------\n", name);
623
624 ac_parse_ib_chunk(f, ib, num_dw, trace_ids, trace_id_count,
625 chip_class, addr_callback, addr_callback_data);
626
627 fprintf(f, "------------------- %s end -------------------\n\n", name);
628 }
629
630 /**
631 * Parse dmesg and return TRUE if a VM fault has been detected.
632 *
633 * \param chip_class chip class
634 * \param old_dmesg_timestamp previous dmesg timestamp parsed at init time
635 * \param out_addr detected VM fault addr
636 */
637 bool ac_vm_fault_occured(enum chip_class chip_class,
638 uint64_t *old_dmesg_timestamp, uint64_t *out_addr)
639 {
640 char line[2000];
641 unsigned sec, usec;
642 int progress = 0;
643 uint64_t dmesg_timestamp = 0;
644 bool fault = false;
645
646 FILE *p = popen("dmesg", "r");
647 if (!p)
648 return false;
649
650 while (fgets(line, sizeof(line), p)) {
651 char *msg, len;
652
653 if (!line[0] || line[0] == '\n')
654 continue;
655
656 /* Get the timestamp. */
657 if (sscanf(line, "[%u.%u]", &sec, &usec) != 2) {
658 static bool hit = false;
659 if (!hit) {
660 fprintf(stderr, "%s: failed to parse line '%s'\n",
661 __func__, line);
662 hit = true;
663 }
664 continue;
665 }
666 dmesg_timestamp = sec * 1000000ull + usec;
667
668 /* If just updating the timestamp. */
669 if (!out_addr)
670 continue;
671
672 /* Process messages only if the timestamp is newer. */
673 if (dmesg_timestamp <= *old_dmesg_timestamp)
674 continue;
675
676 /* Only process the first VM fault. */
677 if (fault)
678 continue;
679
680 /* Remove trailing \n */
681 len = strlen(line);
682 if (len && line[len-1] == '\n')
683 line[len-1] = 0;
684
685 /* Get the message part. */
686 msg = strchr(line, ']');
687 if (!msg)
688 continue;
689 msg++;
690
691 const char *header_line, *addr_line_prefix, *addr_line_format;
692
693 if (chip_class >= GFX9) {
694 /* Match this:
695 * ..: [gfxhub] VMC page fault (src_id:0 ring:158 vm_id:2 pas_id:0)
696 * ..: at page 0x0000000219f8f000 from 27
697 * ..: VM_L2_PROTECTION_FAULT_STATUS:0x0020113C
698 */
699 header_line = "VMC page fault";
700 addr_line_prefix = " at page";
701 addr_line_format = "%"PRIx64;
702 } else {
703 header_line = "GPU fault detected:";
704 addr_line_prefix = "VM_CONTEXT1_PROTECTION_FAULT_ADDR";
705 addr_line_format = "%"PRIX64;
706 }
707
708 switch (progress) {
709 case 0:
710 if (strstr(msg, header_line))
711 progress = 1;
712 break;
713 case 1:
714 msg = strstr(msg, addr_line_prefix);
715 if (msg) {
716 msg = strstr(msg, "0x");
717 if (msg) {
718 msg += 2;
719 if (sscanf(msg, addr_line_format, out_addr) == 1)
720 fault = true;
721 }
722 }
723 progress = 0;
724 break;
725 default:
726 progress = 0;
727 }
728 }
729 pclose(p);
730
731 if (dmesg_timestamp > *old_dmesg_timestamp)
732 *old_dmesg_timestamp = dmesg_timestamp;
733
734 return fault;
735 }
736
737 static int compare_wave(const void *p1, const void *p2)
738 {
739 struct ac_wave_info *w1 = (struct ac_wave_info *)p1;
740 struct ac_wave_info *w2 = (struct ac_wave_info *)p2;
741
742 /* Sort waves according to PC and then SE, SH, CU, etc. */
743 if (w1->pc < w2->pc)
744 return -1;
745 if (w1->pc > w2->pc)
746 return 1;
747 if (w1->se < w2->se)
748 return -1;
749 if (w1->se > w2->se)
750 return 1;
751 if (w1->sh < w2->sh)
752 return -1;
753 if (w1->sh > w2->sh)
754 return 1;
755 if (w1->cu < w2->cu)
756 return -1;
757 if (w1->cu > w2->cu)
758 return 1;
759 if (w1->simd < w2->simd)
760 return -1;
761 if (w1->simd > w2->simd)
762 return 1;
763 if (w1->wave < w2->wave)
764 return -1;
765 if (w1->wave > w2->wave)
766 return 1;
767
768 return 0;
769 }
770
771 /* Return wave information. "waves" should be a large enough array. */
772 unsigned ac_get_wave_info(enum chip_class chip_class,
773 struct ac_wave_info waves[AC_MAX_WAVES_PER_CHIP])
774 {
775 char line[2000], cmd[128];
776 unsigned num_waves = 0;
777
778 sprintf(cmd, "umr -O halt_waves -wa %s", chip_class >= GFX10 ? "gfx_0.0.0" : "gfx");
779
780 FILE *p = popen(cmd, "r");
781 if (!p)
782 return 0;
783
784 if (!fgets(line, sizeof(line), p) ||
785 strncmp(line, "SE", 2) != 0) {
786 pclose(p);
787 return 0;
788 }
789
790 while (fgets(line, sizeof(line), p)) {
791 struct ac_wave_info *w;
792 uint32_t pc_hi, pc_lo, exec_hi, exec_lo;
793
794 assert(num_waves < AC_MAX_WAVES_PER_CHIP);
795 w = &waves[num_waves];
796
797 if (sscanf(line, "%u %u %u %u %u %x %x %x %x %x %x %x",
798 &w->se, &w->sh, &w->cu, &w->simd, &w->wave,
799 &w->status, &pc_hi, &pc_lo, &w->inst_dw0,
800 &w->inst_dw1, &exec_hi, &exec_lo) == 12) {
801 w->pc = ((uint64_t)pc_hi << 32) | pc_lo;
802 w->exec = ((uint64_t)exec_hi << 32) | exec_lo;
803 w->matched = false;
804 num_waves++;
805 }
806 }
807
808 qsort(waves, num_waves, sizeof(struct ac_wave_info), compare_wave);
809
810 pclose(p);
811 return num_waves;
812 }