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radeonsi: move emit_optimization_barrier() to ac
[mesa.git] / src / amd / common / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29
30 #include "c11/threads.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "ac_llvm_util.h"
36 #include "ac_exp_param.h"
37 #include "util/bitscan.h"
38 #include "util/macros.h"
39 #include "util/u_atomic.h"
40 #include "sid.h"
41
42 #include "shader_enums.h"
43
44 /* Initialize module-independent parts of the context.
45 *
46 * The caller is responsible for initializing ctx::module and ctx::builder.
47 */
48 void
49 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context)
50 {
51 LLVMValueRef args[1];
52
53 ctx->context = context;
54 ctx->module = NULL;
55 ctx->builder = NULL;
56
57 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
58 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
59 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
60 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
61 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
62 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
63 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
64 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
65 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
66 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
67 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
68 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
69
70 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
71 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
72 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
73 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
74
75 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
76 "range", 5);
77
78 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
79 "invariant.load", 14);
80
81 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
82
83 args[0] = LLVMConstReal(ctx->f32, 2.5);
84 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
85
86 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
87 "amdgpu.uniform", 14);
88
89 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
90 }
91
92 unsigned
93 ac_get_type_size(LLVMTypeRef type)
94 {
95 LLVMTypeKind kind = LLVMGetTypeKind(type);
96
97 switch (kind) {
98 case LLVMIntegerTypeKind:
99 return LLVMGetIntTypeWidth(type) / 8;
100 case LLVMFloatTypeKind:
101 return 4;
102 case LLVMPointerTypeKind:
103 return 8;
104 case LLVMVectorTypeKind:
105 return LLVMGetVectorSize(type) *
106 ac_get_type_size(LLVMGetElementType(type));
107 case LLVMArrayTypeKind:
108 return LLVMGetArrayLength(type) *
109 ac_get_type_size(LLVMGetElementType(type));
110 default:
111 assert(0);
112 return 0;
113 }
114 }
115
116 LLVMValueRef
117 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
118 LLVMTypeRef return_type, LLVMValueRef *params,
119 unsigned param_count, unsigned attrib_mask)
120 {
121 LLVMValueRef function, call;
122 bool set_callsite_attrs = HAVE_LLVM >= 0x0400 &&
123 !(attrib_mask & AC_FUNC_ATTR_LEGACY);
124
125 function = LLVMGetNamedFunction(ctx->module, name);
126 if (!function) {
127 LLVMTypeRef param_types[32], function_type;
128 unsigned i;
129
130 assert(param_count <= 32);
131
132 for (i = 0; i < param_count; ++i) {
133 assert(params[i]);
134 param_types[i] = LLVMTypeOf(params[i]);
135 }
136 function_type =
137 LLVMFunctionType(return_type, param_types, param_count, 0);
138 function = LLVMAddFunction(ctx->module, name, function_type);
139
140 LLVMSetFunctionCallConv(function, LLVMCCallConv);
141 LLVMSetLinkage(function, LLVMExternalLinkage);
142
143 if (!set_callsite_attrs)
144 ac_add_func_attributes(ctx->context, function, attrib_mask);
145 }
146
147 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
148 if (set_callsite_attrs)
149 ac_add_func_attributes(ctx->context, call, attrib_mask);
150 return call;
151 }
152
153 static LLVMValueRef bitcast_to_float(struct ac_llvm_context *ctx,
154 LLVMValueRef value)
155 {
156 LLVMTypeRef type = LLVMTypeOf(value);
157 LLVMTypeRef new_type;
158
159 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
160 new_type = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
161 else
162 new_type = ctx->f32;
163
164 return LLVMBuildBitCast(ctx->builder, value, new_type, "");
165 }
166
167 /**
168 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
169 * intrinsic names).
170 */
171 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
172 {
173 LLVMTypeRef elem_type = type;
174
175 assert(bufsize >= 8);
176
177 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
178 int ret = snprintf(buf, bufsize, "v%u",
179 LLVMGetVectorSize(type));
180 if (ret < 0) {
181 char *type_name = LLVMPrintTypeToString(type);
182 fprintf(stderr, "Error building type name for: %s\n",
183 type_name);
184 return;
185 }
186 elem_type = LLVMGetElementType(type);
187 buf += ret;
188 bufsize -= ret;
189 }
190 switch (LLVMGetTypeKind(elem_type)) {
191 default: break;
192 case LLVMIntegerTypeKind:
193 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
194 break;
195 case LLVMFloatTypeKind:
196 snprintf(buf, bufsize, "f32");
197 break;
198 case LLVMDoubleTypeKind:
199 snprintf(buf, bufsize, "f64");
200 break;
201 }
202 }
203
204 /* Prevent optimizations (at least of memory accesses) across the current
205 * point in the program by emitting empty inline assembly that is marked as
206 * having side effects.
207 *
208 * Optionally, a value can be passed through the inline assembly to prevent
209 * LLVM from hoisting calls to ReadNone functions.
210 */
211 void
212 ac_build_optimization_barrier(struct ac_llvm_context *ctx,
213 LLVMValueRef *pvgpr)
214 {
215 static int counter = 0;
216
217 LLVMBuilderRef builder = ctx->builder;
218 char code[16];
219
220 snprintf(code, sizeof(code), "; %d", p_atomic_inc_return(&counter));
221
222 if (!pvgpr) {
223 LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
224 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "", true, false);
225 LLVMBuildCall(builder, inlineasm, NULL, 0, "");
226 } else {
227 LLVMTypeRef ftype = LLVMFunctionType(ctx->i32, &ctx->i32, 1, false);
228 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "=v,0", true, false);
229 LLVMValueRef vgpr = *pvgpr;
230 LLVMTypeRef vgpr_type = LLVMTypeOf(vgpr);
231 unsigned vgpr_size = ac_get_type_size(vgpr_type);
232 LLVMValueRef vgpr0;
233
234 assert(vgpr_size % 4 == 0);
235
236 vgpr = LLVMBuildBitCast(builder, vgpr, LLVMVectorType(ctx->i32, vgpr_size / 4), "");
237 vgpr0 = LLVMBuildExtractElement(builder, vgpr, ctx->i32_0, "");
238 vgpr0 = LLVMBuildCall(builder, inlineasm, &vgpr0, 1, "");
239 vgpr = LLVMBuildInsertElement(builder, vgpr, vgpr0, ctx->i32_0, "");
240 vgpr = LLVMBuildBitCast(builder, vgpr, vgpr_type, "");
241
242 *pvgpr = vgpr;
243 }
244 }
245
246 LLVMValueRef
247 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
248 LLVMValueRef *values,
249 unsigned value_count,
250 unsigned value_stride,
251 bool load,
252 bool always_vector)
253 {
254 LLVMBuilderRef builder = ctx->builder;
255 LLVMValueRef vec = NULL;
256 unsigned i;
257
258 if (value_count == 1 && !always_vector) {
259 if (load)
260 return LLVMBuildLoad(builder, values[0], "");
261 return values[0];
262 } else if (!value_count)
263 unreachable("value_count is 0");
264
265 for (i = 0; i < value_count; i++) {
266 LLVMValueRef value = values[i * value_stride];
267 if (load)
268 value = LLVMBuildLoad(builder, value, "");
269
270 if (!i)
271 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
272 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
273 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
274 }
275 return vec;
276 }
277
278 LLVMValueRef
279 ac_build_gather_values(struct ac_llvm_context *ctx,
280 LLVMValueRef *values,
281 unsigned value_count)
282 {
283 return ac_build_gather_values_extended(ctx, values, value_count, 1, false, false);
284 }
285
286 LLVMValueRef
287 ac_build_fdiv(struct ac_llvm_context *ctx,
288 LLVMValueRef num,
289 LLVMValueRef den)
290 {
291 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
292
293 if (!LLVMIsConstant(ret))
294 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
295 return ret;
296 }
297
298 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
299 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
300 * already multiplied by two. id is the cube face number.
301 */
302 struct cube_selection_coords {
303 LLVMValueRef stc[2];
304 LLVMValueRef ma;
305 LLVMValueRef id;
306 };
307
308 static void
309 build_cube_intrinsic(struct ac_llvm_context *ctx,
310 LLVMValueRef in[3],
311 struct cube_selection_coords *out)
312 {
313 LLVMTypeRef f32 = ctx->f32;
314
315 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
316 f32, in, 3, AC_FUNC_ATTR_READNONE);
317 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
318 f32, in, 3, AC_FUNC_ATTR_READNONE);
319 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
320 f32, in, 3, AC_FUNC_ATTR_READNONE);
321 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
322 f32, in, 3, AC_FUNC_ATTR_READNONE);
323 }
324
325 /**
326 * Build a manual selection sequence for cube face sc/tc coordinates and
327 * major axis vector (multiplied by 2 for consistency) for the given
328 * vec3 \p coords, for the face implied by \p selcoords.
329 *
330 * For the major axis, we always adjust the sign to be in the direction of
331 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
332 * the selcoords major axis.
333 */
334 static void build_cube_select(LLVMBuilderRef builder,
335 const struct cube_selection_coords *selcoords,
336 const LLVMValueRef *coords,
337 LLVMValueRef *out_st,
338 LLVMValueRef *out_ma)
339 {
340 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
341 LLVMValueRef is_ma_positive;
342 LLVMValueRef sgn_ma;
343 LLVMValueRef is_ma_z, is_not_ma_z;
344 LLVMValueRef is_ma_y;
345 LLVMValueRef is_ma_x;
346 LLVMValueRef sgn;
347 LLVMValueRef tmp;
348
349 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
350 selcoords->ma, LLVMConstReal(f32, 0.0), "");
351 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
352 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
353
354 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
355 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
356 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
357 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
358 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
359
360 /* Select sc */
361 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2], coords[0], "");
362 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
363 LLVMBuildSelect(builder, is_ma_x, sgn_ma,
364 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
365 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
366
367 /* Select tc */
368 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
369 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMBuildFNeg(builder, sgn_ma, ""),
370 LLVMConstReal(f32, -1.0), "");
371 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
372
373 /* Select ma */
374 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
375 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
376 sgn = LLVMBuildSelect(builder, is_ma_positive,
377 LLVMConstReal(f32, 2.0), LLVMConstReal(f32, -2.0), "");
378 *out_ma = LLVMBuildFMul(builder, tmp, sgn, "");
379 }
380
381 void
382 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
383 bool is_deriv, bool is_array,
384 LLVMValueRef *coords_arg,
385 LLVMValueRef *derivs_arg)
386 {
387
388 LLVMBuilderRef builder = ctx->builder;
389 struct cube_selection_coords selcoords;
390 LLVMValueRef coords[3];
391 LLVMValueRef invma;
392
393 build_cube_intrinsic(ctx, coords_arg, &selcoords);
394
395 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
396 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
397 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
398
399 for (int i = 0; i < 2; ++i)
400 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
401
402 coords[2] = selcoords.id;
403
404 if (is_deriv && derivs_arg) {
405 LLVMValueRef derivs[4];
406 int axis;
407
408 /* Convert cube derivatives to 2D derivatives. */
409 for (axis = 0; axis < 2; axis++) {
410 LLVMValueRef deriv_st[2];
411 LLVMValueRef deriv_ma;
412
413 /* Transform the derivative alongside the texture
414 * coordinate. Mathematically, the correct formula is
415 * as follows. Assume we're projecting onto the +Z face
416 * and denote by dx/dh the derivative of the (original)
417 * X texture coordinate with respect to horizontal
418 * window coordinates. The projection onto the +Z face
419 * plane is:
420 *
421 * f(x,z) = x/z
422 *
423 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
424 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
425 *
426 * This motivatives the implementation below.
427 *
428 * Whether this actually gives the expected results for
429 * apps that might feed in derivatives obtained via
430 * finite differences is anyone's guess. The OpenGL spec
431 * seems awfully quiet about how textureGrad for cube
432 * maps should be handled.
433 */
434 build_cube_select(builder, &selcoords, &derivs_arg[axis * 3],
435 deriv_st, &deriv_ma);
436
437 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
438
439 for (int i = 0; i < 2; ++i)
440 derivs[axis * 2 + i] =
441 LLVMBuildFSub(builder,
442 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
443 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
444 }
445
446 memcpy(derivs_arg, derivs, sizeof(derivs));
447 }
448
449 /* Shift the texture coordinate. This must be applied after the
450 * derivative calculation.
451 */
452 for (int i = 0; i < 2; ++i)
453 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
454
455 if (is_array) {
456 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
457 /* coords_arg.w component - array_index for cube arrays */
458 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
459 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
460 }
461
462 memcpy(coords_arg, coords, sizeof(coords));
463 }
464
465
466 LLVMValueRef
467 ac_build_fs_interp(struct ac_llvm_context *ctx,
468 LLVMValueRef llvm_chan,
469 LLVMValueRef attr_number,
470 LLVMValueRef params,
471 LLVMValueRef i,
472 LLVMValueRef j)
473 {
474 LLVMValueRef args[5];
475 LLVMValueRef p1;
476
477 if (HAVE_LLVM < 0x0400) {
478 LLVMValueRef ij[2];
479 ij[0] = LLVMBuildBitCast(ctx->builder, i, ctx->i32, "");
480 ij[1] = LLVMBuildBitCast(ctx->builder, j, ctx->i32, "");
481
482 args[0] = llvm_chan;
483 args[1] = attr_number;
484 args[2] = params;
485 args[3] = ac_build_gather_values(ctx, ij, 2);
486 return ac_build_intrinsic(ctx, "llvm.SI.fs.interp",
487 ctx->f32, args, 4,
488 AC_FUNC_ATTR_READNONE);
489 }
490
491 args[0] = i;
492 args[1] = llvm_chan;
493 args[2] = attr_number;
494 args[3] = params;
495
496 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
497 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
498
499 args[0] = p1;
500 args[1] = j;
501 args[2] = llvm_chan;
502 args[3] = attr_number;
503 args[4] = params;
504
505 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
506 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
507 }
508
509 LLVMValueRef
510 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
511 LLVMValueRef parameter,
512 LLVMValueRef llvm_chan,
513 LLVMValueRef attr_number,
514 LLVMValueRef params)
515 {
516 LLVMValueRef args[4];
517 if (HAVE_LLVM < 0x0400) {
518 args[0] = llvm_chan;
519 args[1] = attr_number;
520 args[2] = params;
521
522 return ac_build_intrinsic(ctx,
523 "llvm.SI.fs.constant",
524 ctx->f32, args, 3,
525 AC_FUNC_ATTR_READNONE);
526 }
527
528 args[0] = parameter;
529 args[1] = llvm_chan;
530 args[2] = attr_number;
531 args[3] = params;
532
533 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
534 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
535 }
536
537 LLVMValueRef
538 ac_build_gep0(struct ac_llvm_context *ctx,
539 LLVMValueRef base_ptr,
540 LLVMValueRef index)
541 {
542 LLVMValueRef indices[2] = {
543 LLVMConstInt(ctx->i32, 0, 0),
544 index,
545 };
546 return LLVMBuildGEP(ctx->builder, base_ptr,
547 indices, 2, "");
548 }
549
550 void
551 ac_build_indexed_store(struct ac_llvm_context *ctx,
552 LLVMValueRef base_ptr, LLVMValueRef index,
553 LLVMValueRef value)
554 {
555 LLVMBuildStore(ctx->builder, value,
556 ac_build_gep0(ctx, base_ptr, index));
557 }
558
559 /**
560 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
561 * It's equivalent to doing a load from &base_ptr[index].
562 *
563 * \param base_ptr Where the array starts.
564 * \param index The element index into the array.
565 * \param uniform Whether the base_ptr and index can be assumed to be
566 * dynamically uniform
567 */
568 LLVMValueRef
569 ac_build_indexed_load(struct ac_llvm_context *ctx,
570 LLVMValueRef base_ptr, LLVMValueRef index,
571 bool uniform)
572 {
573 LLVMValueRef pointer;
574
575 pointer = ac_build_gep0(ctx, base_ptr, index);
576 if (uniform)
577 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
578 return LLVMBuildLoad(ctx->builder, pointer, "");
579 }
580
581 /**
582 * Do a load from &base_ptr[index], but also add a flag that it's loading
583 * a constant from a dynamically uniform index.
584 */
585 LLVMValueRef
586 ac_build_indexed_load_const(struct ac_llvm_context *ctx,
587 LLVMValueRef base_ptr, LLVMValueRef index)
588 {
589 LLVMValueRef result = ac_build_indexed_load(ctx, base_ptr, index, true);
590 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
591 return result;
592 }
593
594 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
595 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
596 * or v4i32 (num_channels=3,4).
597 */
598 void
599 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
600 LLVMValueRef rsrc,
601 LLVMValueRef vdata,
602 unsigned num_channels,
603 LLVMValueRef voffset,
604 LLVMValueRef soffset,
605 unsigned inst_offset,
606 bool glc,
607 bool slc,
608 bool writeonly_memory,
609 bool has_add_tid)
610 {
611 /* TODO: Fix stores with ADD_TID and remove the "has_add_tid" flag. */
612 if (!has_add_tid) {
613 /* Split 3 channel stores, becase LLVM doesn't support 3-channel
614 * intrinsics. */
615 if (num_channels == 3) {
616 LLVMValueRef v[3], v01;
617
618 for (int i = 0; i < 3; i++) {
619 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
620 LLVMConstInt(ctx->i32, i, 0), "");
621 }
622 v01 = ac_build_gather_values(ctx, v, 2);
623
624 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
625 soffset, inst_offset, glc, slc,
626 writeonly_memory, has_add_tid);
627 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
628 soffset, inst_offset + 8,
629 glc, slc,
630 writeonly_memory, has_add_tid);
631 return;
632 }
633
634 unsigned func = CLAMP(num_channels, 1, 3) - 1;
635 static const char *types[] = {"f32", "v2f32", "v4f32"};
636 char name[256];
637 LLVMValueRef offset = soffset;
638
639 if (inst_offset)
640 offset = LLVMBuildAdd(ctx->builder, offset,
641 LLVMConstInt(ctx->i32, inst_offset, 0), "");
642 if (voffset)
643 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
644
645 LLVMValueRef args[] = {
646 bitcast_to_float(ctx, vdata),
647 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
648 LLVMConstInt(ctx->i32, 0, 0),
649 offset,
650 LLVMConstInt(ctx->i1, glc, 0),
651 LLVMConstInt(ctx->i1, slc, 0),
652 };
653
654 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
655 types[func]);
656
657 ac_build_intrinsic(ctx, name, ctx->voidt,
658 args, ARRAY_SIZE(args),
659 writeonly_memory ?
660 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
661 AC_FUNC_ATTR_WRITEONLY);
662 return;
663 }
664
665 static unsigned dfmt[] = {
666 V_008F0C_BUF_DATA_FORMAT_32,
667 V_008F0C_BUF_DATA_FORMAT_32_32,
668 V_008F0C_BUF_DATA_FORMAT_32_32_32,
669 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
670 };
671 assert(num_channels >= 1 && num_channels <= 4);
672
673 LLVMValueRef args[] = {
674 rsrc,
675 vdata,
676 LLVMConstInt(ctx->i32, num_channels, 0),
677 voffset ? voffset : LLVMGetUndef(ctx->i32),
678 soffset,
679 LLVMConstInt(ctx->i32, inst_offset, 0),
680 LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
681 LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
682 LLVMConstInt(ctx->i32, voffset != NULL, 0),
683 LLVMConstInt(ctx->i32, 0, 0), /* idxen */
684 LLVMConstInt(ctx->i32, glc, 0),
685 LLVMConstInt(ctx->i32, slc, 0),
686 LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
687 };
688
689 /* The instruction offset field has 12 bits */
690 assert(voffset || inst_offset < (1 << 12));
691
692 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
693 unsigned func = CLAMP(num_channels, 1, 3) - 1;
694 const char *types[] = {"i32", "v2i32", "v4i32"};
695 char name[256];
696 snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
697
698 ac_build_intrinsic(ctx, name, ctx->voidt,
699 args, ARRAY_SIZE(args),
700 AC_FUNC_ATTR_LEGACY);
701 }
702
703 LLVMValueRef
704 ac_build_buffer_load(struct ac_llvm_context *ctx,
705 LLVMValueRef rsrc,
706 int num_channels,
707 LLVMValueRef vindex,
708 LLVMValueRef voffset,
709 LLVMValueRef soffset,
710 unsigned inst_offset,
711 unsigned glc,
712 unsigned slc,
713 bool can_speculate,
714 bool allow_smem)
715 {
716 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
717 if (voffset)
718 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
719 if (soffset)
720 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
721
722 /* TODO: VI and later generations can use SMEM with GLC=1.*/
723 if (allow_smem && !glc && !slc) {
724 assert(vindex == NULL);
725
726 LLVMValueRef result[4];
727
728 for (int i = 0; i < num_channels; i++) {
729 if (i) {
730 offset = LLVMBuildAdd(ctx->builder, offset,
731 LLVMConstInt(ctx->i32, 4, 0), "");
732 }
733 LLVMValueRef args[2] = {rsrc, offset};
734 result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32",
735 ctx->f32, args, 2,
736 AC_FUNC_ATTR_READNONE |
737 AC_FUNC_ATTR_LEGACY);
738 }
739 if (num_channels == 1)
740 return result[0];
741
742 if (num_channels == 3)
743 result[num_channels++] = LLVMGetUndef(ctx->f32);
744 return ac_build_gather_values(ctx, result, num_channels);
745 }
746
747 unsigned func = CLAMP(num_channels, 1, 3) - 1;
748
749 LLVMValueRef args[] = {
750 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
751 vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
752 offset,
753 LLVMConstInt(ctx->i1, glc, 0),
754 LLVMConstInt(ctx->i1, slc, 0)
755 };
756
757 LLVMTypeRef types[] = {ctx->f32, LLVMVectorType(ctx->f32, 2),
758 ctx->v4f32};
759 const char *type_names[] = {"f32", "v2f32", "v4f32"};
760 char name[256];
761
762 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
763 type_names[func]);
764
765 return ac_build_intrinsic(ctx, name, types[func], args,
766 ARRAY_SIZE(args),
767 /* READNONE means writes can't affect it, while
768 * READONLY means that writes can affect it. */
769 can_speculate && HAVE_LLVM >= 0x0400 ?
770 AC_FUNC_ATTR_READNONE :
771 AC_FUNC_ATTR_READONLY);
772 }
773
774 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
775 LLVMValueRef rsrc,
776 LLVMValueRef vindex,
777 LLVMValueRef voffset,
778 bool can_speculate)
779 {
780 LLVMValueRef args [] = {
781 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
782 vindex,
783 voffset,
784 LLVMConstInt(ctx->i1, 0, 0), /* glc */
785 LLVMConstInt(ctx->i1, 0, 0), /* slc */
786 };
787
788 return ac_build_intrinsic(ctx,
789 "llvm.amdgcn.buffer.load.format.v4f32",
790 ctx->v4f32, args, ARRAY_SIZE(args),
791 /* READNONE means writes can't affect it, while
792 * READONLY means that writes can affect it. */
793 can_speculate && HAVE_LLVM >= 0x0400 ?
794 AC_FUNC_ATTR_READNONE :
795 AC_FUNC_ATTR_READONLY);
796 }
797
798 /**
799 * Set range metadata on an instruction. This can only be used on load and
800 * call instructions. If you know an instruction can only produce the values
801 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
802 * \p lo is the minimum value inclusive.
803 * \p hi is the maximum value exclusive.
804 */
805 static void set_range_metadata(struct ac_llvm_context *ctx,
806 LLVMValueRef value, unsigned lo, unsigned hi)
807 {
808 LLVMValueRef range_md, md_args[2];
809 LLVMTypeRef type = LLVMTypeOf(value);
810 LLVMContextRef context = LLVMGetTypeContext(type);
811
812 md_args[0] = LLVMConstInt(type, lo, false);
813 md_args[1] = LLVMConstInt(type, hi, false);
814 range_md = LLVMMDNodeInContext(context, md_args, 2);
815 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
816 }
817
818 LLVMValueRef
819 ac_get_thread_id(struct ac_llvm_context *ctx)
820 {
821 LLVMValueRef tid;
822
823 LLVMValueRef tid_args[2];
824 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
825 tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
826 tid_args[1] = ac_build_intrinsic(ctx,
827 "llvm.amdgcn.mbcnt.lo", ctx->i32,
828 tid_args, 2, AC_FUNC_ATTR_READNONE);
829
830 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
831 ctx->i32, tid_args,
832 2, AC_FUNC_ATTR_READNONE);
833 set_range_metadata(ctx, tid, 0, 64);
834 return tid;
835 }
836
837 /*
838 * SI implements derivatives using the local data store (LDS)
839 * All writes to the LDS happen in all executing threads at
840 * the same time. TID is the Thread ID for the current
841 * thread and is a value between 0 and 63, representing
842 * the thread's position in the wavefront.
843 *
844 * For the pixel shader threads are grouped into quads of four pixels.
845 * The TIDs of the pixels of a quad are:
846 *
847 * +------+------+
848 * |4n + 0|4n + 1|
849 * +------+------+
850 * |4n + 2|4n + 3|
851 * +------+------+
852 *
853 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
854 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
855 * the current pixel's column, and masking with 0xfffffffe yields the TID
856 * of the left pixel of the current pixel's row.
857 *
858 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
859 * adding 2 yields the TID of the pixel below the top pixel.
860 */
861 LLVMValueRef
862 ac_build_ddxy(struct ac_llvm_context *ctx,
863 bool has_ds_bpermute,
864 uint32_t mask,
865 int idx,
866 LLVMValueRef val)
867 {
868 LLVMValueRef tl, trbl, args[2];
869 LLVMValueRef result;
870
871 if (has_ds_bpermute) {
872 LLVMValueRef thread_id, tl_tid, trbl_tid;
873 thread_id = ac_get_thread_id(ctx);
874
875 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
876 LLVMConstInt(ctx->i32, mask, false), "");
877
878 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
879 LLVMConstInt(ctx->i32, idx, false), "");
880
881 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
882 LLVMConstInt(ctx->i32, 4, false), "");
883 args[1] = val;
884 tl = ac_build_intrinsic(ctx,
885 "llvm.amdgcn.ds.bpermute", ctx->i32,
886 args, 2,
887 AC_FUNC_ATTR_READNONE |
888 AC_FUNC_ATTR_CONVERGENT);
889
890 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
891 LLVMConstInt(ctx->i32, 4, false), "");
892 trbl = ac_build_intrinsic(ctx,
893 "llvm.amdgcn.ds.bpermute", ctx->i32,
894 args, 2,
895 AC_FUNC_ATTR_READNONE |
896 AC_FUNC_ATTR_CONVERGENT);
897 } else {
898 uint32_t masks[2];
899
900 switch (mask) {
901 case AC_TID_MASK_TOP_LEFT:
902 masks[0] = 0x8000;
903 if (idx == 1)
904 masks[1] = 0x8055;
905 else
906 masks[1] = 0x80aa;
907
908 break;
909 case AC_TID_MASK_TOP:
910 masks[0] = 0x8044;
911 masks[1] = 0x80ee;
912 break;
913 case AC_TID_MASK_LEFT:
914 masks[0] = 0x80a0;
915 masks[1] = 0x80f5;
916 break;
917 }
918
919 args[0] = val;
920 args[1] = LLVMConstInt(ctx->i32, masks[0], false);
921
922 tl = ac_build_intrinsic(ctx,
923 "llvm.amdgcn.ds.swizzle", ctx->i32,
924 args, 2,
925 AC_FUNC_ATTR_READNONE |
926 AC_FUNC_ATTR_CONVERGENT);
927
928 args[1] = LLVMConstInt(ctx->i32, masks[1], false);
929 trbl = ac_build_intrinsic(ctx,
930 "llvm.amdgcn.ds.swizzle", ctx->i32,
931 args, 2,
932 AC_FUNC_ATTR_READNONE |
933 AC_FUNC_ATTR_CONVERGENT);
934 }
935
936 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
937 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
938 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
939 return result;
940 }
941
942 void
943 ac_build_sendmsg(struct ac_llvm_context *ctx,
944 uint32_t msg,
945 LLVMValueRef wave_id)
946 {
947 LLVMValueRef args[2];
948 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.SI.sendmsg" : "llvm.amdgcn.s.sendmsg";
949 args[0] = LLVMConstInt(ctx->i32, msg, false);
950 args[1] = wave_id;
951 ac_build_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0);
952 }
953
954 LLVMValueRef
955 ac_build_imsb(struct ac_llvm_context *ctx,
956 LLVMValueRef arg,
957 LLVMTypeRef dst_type)
958 {
959 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" :
960 "llvm.amdgcn.sffbh.i32";
961 LLVMValueRef msb = ac_build_intrinsic(ctx, intr_name,
962 dst_type, &arg, 1,
963 AC_FUNC_ATTR_READNONE);
964
965 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
966 * the index from LSB. Invert it by doing "31 - msb". */
967 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
968 msb, "");
969
970 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
971 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
972 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
973 arg, LLVMConstInt(ctx->i32, 0, 0), ""),
974 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
975 arg, all_ones, ""), "");
976
977 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
978 }
979
980 LLVMValueRef
981 ac_build_umsb(struct ac_llvm_context *ctx,
982 LLVMValueRef arg,
983 LLVMTypeRef dst_type)
984 {
985 LLVMValueRef args[2] = {
986 arg,
987 LLVMConstInt(ctx->i1, 1, 0),
988 };
989 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.ctlz.i32",
990 dst_type, args, ARRAY_SIZE(args),
991 AC_FUNC_ATTR_READNONE);
992
993 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
994 * the index from LSB. Invert it by doing "31 - msb". */
995 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
996 msb, "");
997
998 /* check for zero */
999 return LLVMBuildSelect(ctx->builder,
1000 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg,
1001 LLVMConstInt(ctx->i32, 0, 0), ""),
1002 LLVMConstInt(ctx->i32, -1, true), msb, "");
1003 }
1004
1005 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
1006 LLVMValueRef b)
1007 {
1008 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
1009 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
1010 }
1011
1012 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
1013 {
1014 if (HAVE_LLVM >= 0x0500) {
1015 LLVMValueRef max[2] = {
1016 value,
1017 LLVMConstReal(ctx->f32, 0),
1018 };
1019 LLVMValueRef min[2] = {
1020 LLVMConstReal(ctx->f32, 1),
1021 };
1022
1023 min[1] = ac_build_intrinsic(ctx, "llvm.maxnum.f32",
1024 ctx->f32, max, 2,
1025 AC_FUNC_ATTR_READNONE);
1026 return ac_build_intrinsic(ctx, "llvm.minnum.f32",
1027 ctx->f32, min, 2,
1028 AC_FUNC_ATTR_READNONE);
1029 }
1030
1031 LLVMValueRef args[3] = {
1032 value,
1033 LLVMConstReal(ctx->f32, 0),
1034 LLVMConstReal(ctx->f32, 1),
1035 };
1036
1037 return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3,
1038 AC_FUNC_ATTR_READNONE |
1039 AC_FUNC_ATTR_LEGACY);
1040 }
1041
1042 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
1043 {
1044 LLVMValueRef args[9];
1045
1046 if (HAVE_LLVM >= 0x0500) {
1047 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
1048 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1049
1050 if (a->compr) {
1051 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
1052 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
1053
1054 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
1055 v2i16, "");
1056 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
1057 v2i16, "");
1058 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
1059 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1060
1061 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
1062 ctx->voidt, args, 6, 0);
1063 } else {
1064 args[2] = a->out[0];
1065 args[3] = a->out[1];
1066 args[4] = a->out[2];
1067 args[5] = a->out[3];
1068 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
1069 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1070
1071 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
1072 ctx->voidt, args, 8, 0);
1073 }
1074 return;
1075 }
1076
1077 args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1078 args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
1079 args[2] = LLVMConstInt(ctx->i32, a->done, 0);
1080 args[3] = LLVMConstInt(ctx->i32, a->target, 0);
1081 args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
1082 memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
1083
1084 ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
1085 AC_FUNC_ATTR_LEGACY);
1086 }
1087
1088 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
1089 struct ac_image_args *a)
1090 {
1091 LLVMTypeRef dst_type;
1092 LLVMValueRef args[11];
1093 unsigned num_args = 0;
1094 const char *name;
1095 char intr_name[128], type[64];
1096
1097 if (HAVE_LLVM >= 0x0400) {
1098 bool sample = a->opcode == ac_image_sample ||
1099 a->opcode == ac_image_gather4 ||
1100 a->opcode == ac_image_get_lod;
1101
1102 if (sample)
1103 args[num_args++] = bitcast_to_float(ctx, a->addr);
1104 else
1105 args[num_args++] = a->addr;
1106
1107 args[num_args++] = a->resource;
1108 if (sample)
1109 args[num_args++] = a->sampler;
1110 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1111 if (sample)
1112 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
1113 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* glc */
1114 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* slc */
1115 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* lwe */
1116 args[num_args++] = LLVMConstInt(ctx->i1, a->da, 0);
1117
1118 switch (a->opcode) {
1119 case ac_image_sample:
1120 name = "llvm.amdgcn.image.sample";
1121 break;
1122 case ac_image_gather4:
1123 name = "llvm.amdgcn.image.gather4";
1124 break;
1125 case ac_image_load:
1126 name = "llvm.amdgcn.image.load";
1127 break;
1128 case ac_image_load_mip:
1129 name = "llvm.amdgcn.image.load.mip";
1130 break;
1131 case ac_image_get_lod:
1132 name = "llvm.amdgcn.image.getlod";
1133 break;
1134 case ac_image_get_resinfo:
1135 name = "llvm.amdgcn.image.getresinfo";
1136 break;
1137 default:
1138 unreachable("invalid image opcode");
1139 }
1140
1141 ac_build_type_name_for_intr(LLVMTypeOf(args[0]), type,
1142 sizeof(type));
1143
1144 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",
1145 name,
1146 a->compare ? ".c" : "",
1147 a->bias ? ".b" :
1148 a->lod ? ".l" :
1149 a->deriv ? ".d" :
1150 a->level_zero ? ".lz" : "",
1151 a->offset ? ".o" : "",
1152 type);
1153
1154 LLVMValueRef result =
1155 ac_build_intrinsic(ctx, intr_name,
1156 ctx->v4f32, args, num_args,
1157 AC_FUNC_ATTR_READNONE);
1158 if (!sample) {
1159 result = LLVMBuildBitCast(ctx->builder, result,
1160 ctx->v4i32, "");
1161 }
1162 return result;
1163 }
1164
1165 args[num_args++] = a->addr;
1166 args[num_args++] = a->resource;
1167
1168 if (a->opcode == ac_image_load ||
1169 a->opcode == ac_image_load_mip ||
1170 a->opcode == ac_image_get_resinfo) {
1171 dst_type = ctx->v4i32;
1172 } else {
1173 dst_type = ctx->v4f32;
1174 args[num_args++] = a->sampler;
1175 }
1176
1177 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1178 args[num_args++] = LLVMConstInt(ctx->i32, a->unorm, 0);
1179 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1180 args[num_args++] = LLVMConstInt(ctx->i32, a->da, 0);
1181 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1182 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1183 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1184 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1185
1186 switch (a->opcode) {
1187 case ac_image_sample:
1188 name = "llvm.SI.image.sample";
1189 break;
1190 case ac_image_gather4:
1191 name = "llvm.SI.gather4";
1192 break;
1193 case ac_image_load:
1194 name = "llvm.SI.image.load";
1195 break;
1196 case ac_image_load_mip:
1197 name = "llvm.SI.image.load.mip";
1198 break;
1199 case ac_image_get_lod:
1200 name = "llvm.SI.getlod";
1201 break;
1202 case ac_image_get_resinfo:
1203 name = "llvm.SI.getresinfo";
1204 break;
1205 }
1206
1207 ac_build_type_name_for_intr(LLVMTypeOf(a->addr), type, sizeof(type));
1208 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s",
1209 name,
1210 a->compare ? ".c" : "",
1211 a->bias ? ".b" :
1212 a->lod ? ".l" :
1213 a->deriv ? ".d" :
1214 a->level_zero ? ".lz" : "",
1215 a->offset ? ".o" : "",
1216 type);
1217
1218 return ac_build_intrinsic(ctx, intr_name,
1219 dst_type, args, num_args,
1220 AC_FUNC_ATTR_READNONE |
1221 AC_FUNC_ATTR_LEGACY);
1222 }
1223
1224 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
1225 LLVMValueRef args[2])
1226 {
1227 if (HAVE_LLVM >= 0x0500) {
1228 LLVMTypeRef v2f16 =
1229 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
1230 LLVMValueRef res =
1231 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
1232 v2f16, args, 2,
1233 AC_FUNC_ATTR_READNONE);
1234 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1235 }
1236
1237 return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
1238 AC_FUNC_ATTR_READNONE |
1239 AC_FUNC_ATTR_LEGACY);
1240 }
1241
1242 /**
1243 * KILL, AKA discard in GLSL.
1244 *
1245 * \param value kill if value < 0.0 or value == NULL.
1246 */
1247 void ac_build_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
1248 {
1249 if (value) {
1250 ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
1251 &value, 1, AC_FUNC_ATTR_LEGACY);
1252 } else {
1253 ac_build_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
1254 NULL, 0, AC_FUNC_ATTR_LEGACY);
1255 }
1256 }
1257
1258 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
1259 LLVMValueRef offset, LLVMValueRef width,
1260 bool is_signed)
1261 {
1262 LLVMValueRef args[] = {
1263 input,
1264 offset,
1265 width,
1266 };
1267
1268 if (HAVE_LLVM >= 0x0500) {
1269 return ac_build_intrinsic(ctx,
1270 is_signed ? "llvm.amdgcn.sbfe.i32" :
1271 "llvm.amdgcn.ubfe.i32",
1272 ctx->i32, args, 3,
1273 AC_FUNC_ATTR_READNONE);
1274 }
1275
1276 return ac_build_intrinsic(ctx,
1277 is_signed ? "llvm.AMDGPU.bfe.i32" :
1278 "llvm.AMDGPU.bfe.u32",
1279 ctx->i32, args, 3,
1280 AC_FUNC_ATTR_READNONE |
1281 AC_FUNC_ATTR_LEGACY);
1282 }
1283
1284 void ac_get_image_intr_name(const char *base_name,
1285 LLVMTypeRef data_type,
1286 LLVMTypeRef coords_type,
1287 LLVMTypeRef rsrc_type,
1288 char *out_name, unsigned out_len)
1289 {
1290 char coords_type_name[8];
1291
1292 ac_build_type_name_for_intr(coords_type, coords_type_name,
1293 sizeof(coords_type_name));
1294
1295 if (HAVE_LLVM <= 0x0309) {
1296 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
1297 } else {
1298 char data_type_name[8];
1299 char rsrc_type_name[8];
1300
1301 ac_build_type_name_for_intr(data_type, data_type_name,
1302 sizeof(data_type_name));
1303 ac_build_type_name_for_intr(rsrc_type, rsrc_type_name,
1304 sizeof(rsrc_type_name));
1305 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
1306 data_type_name, coords_type_name, rsrc_type_name);
1307 }
1308 }
1309
1310 #define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
1311 #define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
1312
1313 enum ac_ir_type {
1314 AC_IR_UNDEF,
1315 AC_IR_CONST,
1316 AC_IR_VALUE,
1317 };
1318
1319 struct ac_vs_exp_chan
1320 {
1321 LLVMValueRef value;
1322 float const_float;
1323 enum ac_ir_type type;
1324 };
1325
1326 struct ac_vs_exp_inst {
1327 unsigned offset;
1328 LLVMValueRef inst;
1329 struct ac_vs_exp_chan chan[4];
1330 };
1331
1332 struct ac_vs_exports {
1333 unsigned num;
1334 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
1335 };
1336
1337 /* Return true if the PARAM export has been eliminated. */
1338 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
1339 uint32_t num_outputs,
1340 struct ac_vs_exp_inst *exp)
1341 {
1342 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
1343 bool is_zero[4] = {}, is_one[4] = {};
1344
1345 for (i = 0; i < 4; i++) {
1346 /* It's a constant expression. Undef outputs are eliminated too. */
1347 if (exp->chan[i].type == AC_IR_UNDEF) {
1348 is_zero[i] = true;
1349 is_one[i] = true;
1350 } else if (exp->chan[i].type == AC_IR_CONST) {
1351 if (exp->chan[i].const_float == 0)
1352 is_zero[i] = true;
1353 else if (exp->chan[i].const_float == 1)
1354 is_one[i] = true;
1355 else
1356 return false; /* other constant */
1357 } else
1358 return false;
1359 }
1360
1361 /* Only certain combinations of 0 and 1 can be eliminated. */
1362 if (is_zero[0] && is_zero[1] && is_zero[2])
1363 default_val = is_zero[3] ? 0 : 1;
1364 else if (is_one[0] && is_one[1] && is_one[2])
1365 default_val = is_zero[3] ? 2 : 3;
1366 else
1367 return false;
1368
1369 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
1370 LLVMInstructionEraseFromParent(exp->inst);
1371
1372 /* Change OFFSET to DEFAULT_VAL. */
1373 for (i = 0; i < num_outputs; i++) {
1374 if (vs_output_param_offset[i] == exp->offset) {
1375 vs_output_param_offset[i] =
1376 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
1377 break;
1378 }
1379 }
1380 return true;
1381 }
1382
1383 static bool ac_eliminate_duplicated_output(uint8_t *vs_output_param_offset,
1384 uint32_t num_outputs,
1385 struct ac_vs_exports *processed,
1386 struct ac_vs_exp_inst *exp)
1387 {
1388 unsigned p, copy_back_channels = 0;
1389
1390 /* See if the output is already in the list of processed outputs.
1391 * The LLVMValueRef comparison relies on SSA.
1392 */
1393 for (p = 0; p < processed->num; p++) {
1394 bool different = false;
1395
1396 for (unsigned j = 0; j < 4; j++) {
1397 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
1398 struct ac_vs_exp_chan *c2 = &exp->chan[j];
1399
1400 /* Treat undef as a match. */
1401 if (c2->type == AC_IR_UNDEF)
1402 continue;
1403
1404 /* If c1 is undef but c2 isn't, we can copy c2 to c1
1405 * and consider the instruction duplicated.
1406 */
1407 if (c1->type == AC_IR_UNDEF) {
1408 copy_back_channels |= 1 << j;
1409 continue;
1410 }
1411
1412 /* Test whether the channels are not equal. */
1413 if (c1->type != c2->type ||
1414 (c1->type == AC_IR_CONST &&
1415 c1->const_float != c2->const_float) ||
1416 (c1->type == AC_IR_VALUE &&
1417 c1->value != c2->value)) {
1418 different = true;
1419 break;
1420 }
1421 }
1422 if (!different)
1423 break;
1424
1425 copy_back_channels = 0;
1426 }
1427 if (p == processed->num)
1428 return false;
1429
1430 /* If a match was found, but the matching export has undef where the new
1431 * one has a normal value, copy the normal value to the undef channel.
1432 */
1433 struct ac_vs_exp_inst *match = &processed->exp[p];
1434
1435 while (copy_back_channels) {
1436 unsigned chan = u_bit_scan(&copy_back_channels);
1437
1438 assert(match->chan[chan].type == AC_IR_UNDEF);
1439 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
1440 exp->chan[chan].value);
1441 match->chan[chan] = exp->chan[chan];
1442 }
1443
1444 /* The PARAM export is duplicated. Kill it. */
1445 LLVMInstructionEraseFromParent(exp->inst);
1446
1447 /* Change OFFSET to the matching export. */
1448 for (unsigned i = 0; i < num_outputs; i++) {
1449 if (vs_output_param_offset[i] == exp->offset) {
1450 vs_output_param_offset[i] = match->offset;
1451 break;
1452 }
1453 }
1454 return true;
1455 }
1456
1457 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
1458 LLVMValueRef main_fn,
1459 uint8_t *vs_output_param_offset,
1460 uint32_t num_outputs,
1461 uint8_t *num_param_exports)
1462 {
1463 LLVMBasicBlockRef bb;
1464 bool removed_any = false;
1465 struct ac_vs_exports exports;
1466
1467 exports.num = 0;
1468
1469 /* Process all LLVM instructions. */
1470 bb = LLVMGetFirstBasicBlock(main_fn);
1471 while (bb) {
1472 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
1473
1474 while (inst) {
1475 LLVMValueRef cur = inst;
1476 inst = LLVMGetNextInstruction(inst);
1477 struct ac_vs_exp_inst exp;
1478
1479 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
1480 continue;
1481
1482 LLVMValueRef callee = ac_llvm_get_called_value(cur);
1483
1484 if (!ac_llvm_is_function(callee))
1485 continue;
1486
1487 const char *name = LLVMGetValueName(callee);
1488 unsigned num_args = LLVMCountParams(callee);
1489
1490 /* Check if this is an export instruction. */
1491 if ((num_args != 9 && num_args != 8) ||
1492 (strcmp(name, "llvm.SI.export") &&
1493 strcmp(name, "llvm.amdgcn.exp.f32")))
1494 continue;
1495
1496 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
1497 unsigned target = LLVMConstIntGetZExtValue(arg);
1498
1499 if (target < V_008DFC_SQ_EXP_PARAM)
1500 continue;
1501
1502 target -= V_008DFC_SQ_EXP_PARAM;
1503
1504 /* Parse the instruction. */
1505 memset(&exp, 0, sizeof(exp));
1506 exp.offset = target;
1507 exp.inst = cur;
1508
1509 for (unsigned i = 0; i < 4; i++) {
1510 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
1511
1512 exp.chan[i].value = v;
1513
1514 if (LLVMIsUndef(v)) {
1515 exp.chan[i].type = AC_IR_UNDEF;
1516 } else if (LLVMIsAConstantFP(v)) {
1517 LLVMBool loses_info;
1518 exp.chan[i].type = AC_IR_CONST;
1519 exp.chan[i].const_float =
1520 LLVMConstRealGetDouble(v, &loses_info);
1521 } else {
1522 exp.chan[i].type = AC_IR_VALUE;
1523 }
1524 }
1525
1526 /* Eliminate constant and duplicated PARAM exports. */
1527 if (ac_eliminate_const_output(vs_output_param_offset,
1528 num_outputs, &exp) ||
1529 ac_eliminate_duplicated_output(vs_output_param_offset,
1530 num_outputs, &exports,
1531 &exp)) {
1532 removed_any = true;
1533 } else {
1534 exports.exp[exports.num++] = exp;
1535 }
1536 }
1537 bb = LLVMGetNextBasicBlock(bb);
1538 }
1539
1540 /* Remove holes in export memory due to removed PARAM exports.
1541 * This is done by renumbering all PARAM exports.
1542 */
1543 if (removed_any) {
1544 uint8_t old_offset[VARYING_SLOT_MAX];
1545 unsigned out, i;
1546
1547 /* Make a copy of the offsets. We need the old version while
1548 * we are modifying some of them. */
1549 memcpy(old_offset, vs_output_param_offset,
1550 sizeof(old_offset));
1551
1552 for (i = 0; i < exports.num; i++) {
1553 unsigned offset = exports.exp[i].offset;
1554
1555 /* Update vs_output_param_offset. Multiple outputs can
1556 * have the same offset.
1557 */
1558 for (out = 0; out < num_outputs; out++) {
1559 if (old_offset[out] == offset)
1560 vs_output_param_offset[out] = i;
1561 }
1562
1563 /* Change the PARAM offset in the instruction. */
1564 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
1565 LLVMConstInt(ctx->i32,
1566 V_008DFC_SQ_EXP_PARAM + i, 0));
1567 }
1568 *num_param_exports = exports.num;
1569 }
1570 }