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radeonsi: move the guts of ARB_shader_group_vote emission to ac
[mesa.git] / src / amd / common / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29
30 #include "c11/threads.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "ac_llvm_util.h"
36 #include "ac_exp_param.h"
37 #include "util/bitscan.h"
38 #include "util/macros.h"
39 #include "util/u_atomic.h"
40 #include "sid.h"
41
42 #include "shader_enums.h"
43
44 /* Initialize module-independent parts of the context.
45 *
46 * The caller is responsible for initializing ctx::module and ctx::builder.
47 */
48 void
49 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context)
50 {
51 LLVMValueRef args[1];
52
53 ctx->context = context;
54 ctx->module = NULL;
55 ctx->builder = NULL;
56
57 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
58 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
59 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
60 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
61 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
62 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
63 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
64 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
65 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
66 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
67 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
68 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
69
70 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
71 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
72 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
73 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
74
75 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
76 "range", 5);
77
78 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
79 "invariant.load", 14);
80
81 ctx->fpmath_md_kind = LLVMGetMDKindIDInContext(ctx->context, "fpmath", 6);
82
83 args[0] = LLVMConstReal(ctx->f32, 2.5);
84 ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
85
86 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
87 "amdgpu.uniform", 14);
88
89 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
90 }
91
92 unsigned
93 ac_get_type_size(LLVMTypeRef type)
94 {
95 LLVMTypeKind kind = LLVMGetTypeKind(type);
96
97 switch (kind) {
98 case LLVMIntegerTypeKind:
99 return LLVMGetIntTypeWidth(type) / 8;
100 case LLVMFloatTypeKind:
101 return 4;
102 case LLVMPointerTypeKind:
103 return 8;
104 case LLVMVectorTypeKind:
105 return LLVMGetVectorSize(type) *
106 ac_get_type_size(LLVMGetElementType(type));
107 case LLVMArrayTypeKind:
108 return LLVMGetArrayLength(type) *
109 ac_get_type_size(LLVMGetElementType(type));
110 default:
111 assert(0);
112 return 0;
113 }
114 }
115
116 LLVMValueRef
117 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
118 LLVMTypeRef return_type, LLVMValueRef *params,
119 unsigned param_count, unsigned attrib_mask)
120 {
121 LLVMValueRef function, call;
122 bool set_callsite_attrs = HAVE_LLVM >= 0x0400 &&
123 !(attrib_mask & AC_FUNC_ATTR_LEGACY);
124
125 function = LLVMGetNamedFunction(ctx->module, name);
126 if (!function) {
127 LLVMTypeRef param_types[32], function_type;
128 unsigned i;
129
130 assert(param_count <= 32);
131
132 for (i = 0; i < param_count; ++i) {
133 assert(params[i]);
134 param_types[i] = LLVMTypeOf(params[i]);
135 }
136 function_type =
137 LLVMFunctionType(return_type, param_types, param_count, 0);
138 function = LLVMAddFunction(ctx->module, name, function_type);
139
140 LLVMSetFunctionCallConv(function, LLVMCCallConv);
141 LLVMSetLinkage(function, LLVMExternalLinkage);
142
143 if (!set_callsite_attrs)
144 ac_add_func_attributes(ctx->context, function, attrib_mask);
145 }
146
147 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
148 if (set_callsite_attrs)
149 ac_add_func_attributes(ctx->context, call, attrib_mask);
150 return call;
151 }
152
153 static LLVMValueRef bitcast_to_float(struct ac_llvm_context *ctx,
154 LLVMValueRef value)
155 {
156 LLVMTypeRef type = LLVMTypeOf(value);
157 LLVMTypeRef new_type;
158
159 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
160 new_type = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
161 else
162 new_type = ctx->f32;
163
164 return LLVMBuildBitCast(ctx->builder, value, new_type, "");
165 }
166
167 /**
168 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
169 * intrinsic names).
170 */
171 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
172 {
173 LLVMTypeRef elem_type = type;
174
175 assert(bufsize >= 8);
176
177 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
178 int ret = snprintf(buf, bufsize, "v%u",
179 LLVMGetVectorSize(type));
180 if (ret < 0) {
181 char *type_name = LLVMPrintTypeToString(type);
182 fprintf(stderr, "Error building type name for: %s\n",
183 type_name);
184 return;
185 }
186 elem_type = LLVMGetElementType(type);
187 buf += ret;
188 bufsize -= ret;
189 }
190 switch (LLVMGetTypeKind(elem_type)) {
191 default: break;
192 case LLVMIntegerTypeKind:
193 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
194 break;
195 case LLVMFloatTypeKind:
196 snprintf(buf, bufsize, "f32");
197 break;
198 case LLVMDoubleTypeKind:
199 snprintf(buf, bufsize, "f64");
200 break;
201 }
202 }
203
204 /* Prevent optimizations (at least of memory accesses) across the current
205 * point in the program by emitting empty inline assembly that is marked as
206 * having side effects.
207 *
208 * Optionally, a value can be passed through the inline assembly to prevent
209 * LLVM from hoisting calls to ReadNone functions.
210 */
211 void
212 ac_build_optimization_barrier(struct ac_llvm_context *ctx,
213 LLVMValueRef *pvgpr)
214 {
215 static int counter = 0;
216
217 LLVMBuilderRef builder = ctx->builder;
218 char code[16];
219
220 snprintf(code, sizeof(code), "; %d", p_atomic_inc_return(&counter));
221
222 if (!pvgpr) {
223 LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
224 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "", true, false);
225 LLVMBuildCall(builder, inlineasm, NULL, 0, "");
226 } else {
227 LLVMTypeRef ftype = LLVMFunctionType(ctx->i32, &ctx->i32, 1, false);
228 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "=v,0", true, false);
229 LLVMValueRef vgpr = *pvgpr;
230 LLVMTypeRef vgpr_type = LLVMTypeOf(vgpr);
231 unsigned vgpr_size = ac_get_type_size(vgpr_type);
232 LLVMValueRef vgpr0;
233
234 assert(vgpr_size % 4 == 0);
235
236 vgpr = LLVMBuildBitCast(builder, vgpr, LLVMVectorType(ctx->i32, vgpr_size / 4), "");
237 vgpr0 = LLVMBuildExtractElement(builder, vgpr, ctx->i32_0, "");
238 vgpr0 = LLVMBuildCall(builder, inlineasm, &vgpr0, 1, "");
239 vgpr = LLVMBuildInsertElement(builder, vgpr, vgpr0, ctx->i32_0, "");
240 vgpr = LLVMBuildBitCast(builder, vgpr, vgpr_type, "");
241
242 *pvgpr = vgpr;
243 }
244 }
245
246 LLVMValueRef
247 ac_build_ballot(struct ac_llvm_context *ctx,
248 LLVMValueRef value)
249 {
250 LLVMValueRef args[3] = {
251 value,
252 ctx->i32_0,
253 LLVMConstInt(ctx->i32, LLVMIntNE, 0)
254 };
255
256 /* We currently have no other way to prevent LLVM from lifting the icmp
257 * calls to a dominating basic block.
258 */
259 ac_build_optimization_barrier(ctx, &args[0]);
260
261 if (LLVMTypeOf(args[0]) != ctx->i32)
262 args[0] = LLVMBuildBitCast(ctx->builder, args[0], ctx->i32, "");
263
264 return ac_build_intrinsic(ctx,
265 "llvm.amdgcn.icmp.i32",
266 ctx->i64, args, 3,
267 AC_FUNC_ATTR_NOUNWIND |
268 AC_FUNC_ATTR_READNONE |
269 AC_FUNC_ATTR_CONVERGENT);
270 }
271
272 LLVMValueRef
273 ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value)
274 {
275 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
276 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
277 return LLVMBuildICmp(ctx->builder, LLVMIntEQ, vote_set, active_set, "");
278 }
279
280 LLVMValueRef
281 ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value)
282 {
283 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
284 return LLVMBuildICmp(ctx->builder, LLVMIntNE, vote_set,
285 LLVMConstInt(ctx->i64, 0, 0), "");
286 }
287
288 LLVMValueRef
289 ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value)
290 {
291 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
292 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
293
294 LLVMValueRef all = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
295 vote_set, active_set, "");
296 LLVMValueRef none = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
297 vote_set,
298 LLVMConstInt(ctx->i64, 0, 0), "");
299 return LLVMBuildOr(ctx->builder, all, none, "");
300 }
301
302 LLVMValueRef
303 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
304 LLVMValueRef *values,
305 unsigned value_count,
306 unsigned value_stride,
307 bool load,
308 bool always_vector)
309 {
310 LLVMBuilderRef builder = ctx->builder;
311 LLVMValueRef vec = NULL;
312 unsigned i;
313
314 if (value_count == 1 && !always_vector) {
315 if (load)
316 return LLVMBuildLoad(builder, values[0], "");
317 return values[0];
318 } else if (!value_count)
319 unreachable("value_count is 0");
320
321 for (i = 0; i < value_count; i++) {
322 LLVMValueRef value = values[i * value_stride];
323 if (load)
324 value = LLVMBuildLoad(builder, value, "");
325
326 if (!i)
327 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
328 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
329 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
330 }
331 return vec;
332 }
333
334 LLVMValueRef
335 ac_build_gather_values(struct ac_llvm_context *ctx,
336 LLVMValueRef *values,
337 unsigned value_count)
338 {
339 return ac_build_gather_values_extended(ctx, values, value_count, 1, false, false);
340 }
341
342 LLVMValueRef
343 ac_build_fdiv(struct ac_llvm_context *ctx,
344 LLVMValueRef num,
345 LLVMValueRef den)
346 {
347 LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
348
349 if (!LLVMIsConstant(ret))
350 LLVMSetMetadata(ret, ctx->fpmath_md_kind, ctx->fpmath_md_2p5_ulp);
351 return ret;
352 }
353
354 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
355 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
356 * already multiplied by two. id is the cube face number.
357 */
358 struct cube_selection_coords {
359 LLVMValueRef stc[2];
360 LLVMValueRef ma;
361 LLVMValueRef id;
362 };
363
364 static void
365 build_cube_intrinsic(struct ac_llvm_context *ctx,
366 LLVMValueRef in[3],
367 struct cube_selection_coords *out)
368 {
369 LLVMTypeRef f32 = ctx->f32;
370
371 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
372 f32, in, 3, AC_FUNC_ATTR_READNONE);
373 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
374 f32, in, 3, AC_FUNC_ATTR_READNONE);
375 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
376 f32, in, 3, AC_FUNC_ATTR_READNONE);
377 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
378 f32, in, 3, AC_FUNC_ATTR_READNONE);
379 }
380
381 /**
382 * Build a manual selection sequence for cube face sc/tc coordinates and
383 * major axis vector (multiplied by 2 for consistency) for the given
384 * vec3 \p coords, for the face implied by \p selcoords.
385 *
386 * For the major axis, we always adjust the sign to be in the direction of
387 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
388 * the selcoords major axis.
389 */
390 static void build_cube_select(LLVMBuilderRef builder,
391 const struct cube_selection_coords *selcoords,
392 const LLVMValueRef *coords,
393 LLVMValueRef *out_st,
394 LLVMValueRef *out_ma)
395 {
396 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
397 LLVMValueRef is_ma_positive;
398 LLVMValueRef sgn_ma;
399 LLVMValueRef is_ma_z, is_not_ma_z;
400 LLVMValueRef is_ma_y;
401 LLVMValueRef is_ma_x;
402 LLVMValueRef sgn;
403 LLVMValueRef tmp;
404
405 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
406 selcoords->ma, LLVMConstReal(f32, 0.0), "");
407 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
408 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
409
410 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
411 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
412 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
413 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
414 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
415
416 /* Select sc */
417 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2], coords[0], "");
418 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
419 LLVMBuildSelect(builder, is_ma_x, sgn_ma,
420 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
421 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
422
423 /* Select tc */
424 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
425 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMBuildFNeg(builder, sgn_ma, ""),
426 LLVMConstReal(f32, -1.0), "");
427 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
428
429 /* Select ma */
430 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
431 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
432 sgn = LLVMBuildSelect(builder, is_ma_positive,
433 LLVMConstReal(f32, 2.0), LLVMConstReal(f32, -2.0), "");
434 *out_ma = LLVMBuildFMul(builder, tmp, sgn, "");
435 }
436
437 void
438 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
439 bool is_deriv, bool is_array,
440 LLVMValueRef *coords_arg,
441 LLVMValueRef *derivs_arg)
442 {
443
444 LLVMBuilderRef builder = ctx->builder;
445 struct cube_selection_coords selcoords;
446 LLVMValueRef coords[3];
447 LLVMValueRef invma;
448
449 build_cube_intrinsic(ctx, coords_arg, &selcoords);
450
451 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
452 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
453 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
454
455 for (int i = 0; i < 2; ++i)
456 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
457
458 coords[2] = selcoords.id;
459
460 if (is_deriv && derivs_arg) {
461 LLVMValueRef derivs[4];
462 int axis;
463
464 /* Convert cube derivatives to 2D derivatives. */
465 for (axis = 0; axis < 2; axis++) {
466 LLVMValueRef deriv_st[2];
467 LLVMValueRef deriv_ma;
468
469 /* Transform the derivative alongside the texture
470 * coordinate. Mathematically, the correct formula is
471 * as follows. Assume we're projecting onto the +Z face
472 * and denote by dx/dh the derivative of the (original)
473 * X texture coordinate with respect to horizontal
474 * window coordinates. The projection onto the +Z face
475 * plane is:
476 *
477 * f(x,z) = x/z
478 *
479 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
480 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
481 *
482 * This motivatives the implementation below.
483 *
484 * Whether this actually gives the expected results for
485 * apps that might feed in derivatives obtained via
486 * finite differences is anyone's guess. The OpenGL spec
487 * seems awfully quiet about how textureGrad for cube
488 * maps should be handled.
489 */
490 build_cube_select(builder, &selcoords, &derivs_arg[axis * 3],
491 deriv_st, &deriv_ma);
492
493 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
494
495 for (int i = 0; i < 2; ++i)
496 derivs[axis * 2 + i] =
497 LLVMBuildFSub(builder,
498 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
499 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
500 }
501
502 memcpy(derivs_arg, derivs, sizeof(derivs));
503 }
504
505 /* Shift the texture coordinate. This must be applied after the
506 * derivative calculation.
507 */
508 for (int i = 0; i < 2; ++i)
509 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
510
511 if (is_array) {
512 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
513 /* coords_arg.w component - array_index for cube arrays */
514 LLVMValueRef tmp = LLVMBuildFMul(ctx->builder, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), "");
515 coords[2] = LLVMBuildFAdd(ctx->builder, tmp, coords[2], "");
516 }
517
518 memcpy(coords_arg, coords, sizeof(coords));
519 }
520
521
522 LLVMValueRef
523 ac_build_fs_interp(struct ac_llvm_context *ctx,
524 LLVMValueRef llvm_chan,
525 LLVMValueRef attr_number,
526 LLVMValueRef params,
527 LLVMValueRef i,
528 LLVMValueRef j)
529 {
530 LLVMValueRef args[5];
531 LLVMValueRef p1;
532
533 if (HAVE_LLVM < 0x0400) {
534 LLVMValueRef ij[2];
535 ij[0] = LLVMBuildBitCast(ctx->builder, i, ctx->i32, "");
536 ij[1] = LLVMBuildBitCast(ctx->builder, j, ctx->i32, "");
537
538 args[0] = llvm_chan;
539 args[1] = attr_number;
540 args[2] = params;
541 args[3] = ac_build_gather_values(ctx, ij, 2);
542 return ac_build_intrinsic(ctx, "llvm.SI.fs.interp",
543 ctx->f32, args, 4,
544 AC_FUNC_ATTR_READNONE);
545 }
546
547 args[0] = i;
548 args[1] = llvm_chan;
549 args[2] = attr_number;
550 args[3] = params;
551
552 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
553 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
554
555 args[0] = p1;
556 args[1] = j;
557 args[2] = llvm_chan;
558 args[3] = attr_number;
559 args[4] = params;
560
561 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
562 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
563 }
564
565 LLVMValueRef
566 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
567 LLVMValueRef parameter,
568 LLVMValueRef llvm_chan,
569 LLVMValueRef attr_number,
570 LLVMValueRef params)
571 {
572 LLVMValueRef args[4];
573 if (HAVE_LLVM < 0x0400) {
574 args[0] = llvm_chan;
575 args[1] = attr_number;
576 args[2] = params;
577
578 return ac_build_intrinsic(ctx,
579 "llvm.SI.fs.constant",
580 ctx->f32, args, 3,
581 AC_FUNC_ATTR_READNONE);
582 }
583
584 args[0] = parameter;
585 args[1] = llvm_chan;
586 args[2] = attr_number;
587 args[3] = params;
588
589 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
590 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
591 }
592
593 LLVMValueRef
594 ac_build_gep0(struct ac_llvm_context *ctx,
595 LLVMValueRef base_ptr,
596 LLVMValueRef index)
597 {
598 LLVMValueRef indices[2] = {
599 LLVMConstInt(ctx->i32, 0, 0),
600 index,
601 };
602 return LLVMBuildGEP(ctx->builder, base_ptr,
603 indices, 2, "");
604 }
605
606 void
607 ac_build_indexed_store(struct ac_llvm_context *ctx,
608 LLVMValueRef base_ptr, LLVMValueRef index,
609 LLVMValueRef value)
610 {
611 LLVMBuildStore(ctx->builder, value,
612 ac_build_gep0(ctx, base_ptr, index));
613 }
614
615 /**
616 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
617 * It's equivalent to doing a load from &base_ptr[index].
618 *
619 * \param base_ptr Where the array starts.
620 * \param index The element index into the array.
621 * \param uniform Whether the base_ptr and index can be assumed to be
622 * dynamically uniform
623 */
624 LLVMValueRef
625 ac_build_indexed_load(struct ac_llvm_context *ctx,
626 LLVMValueRef base_ptr, LLVMValueRef index,
627 bool uniform)
628 {
629 LLVMValueRef pointer;
630
631 pointer = ac_build_gep0(ctx, base_ptr, index);
632 if (uniform)
633 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
634 return LLVMBuildLoad(ctx->builder, pointer, "");
635 }
636
637 /**
638 * Do a load from &base_ptr[index], but also add a flag that it's loading
639 * a constant from a dynamically uniform index.
640 */
641 LLVMValueRef
642 ac_build_indexed_load_const(struct ac_llvm_context *ctx,
643 LLVMValueRef base_ptr, LLVMValueRef index)
644 {
645 LLVMValueRef result = ac_build_indexed_load(ctx, base_ptr, index, true);
646 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
647 return result;
648 }
649
650 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
651 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
652 * or v4i32 (num_channels=3,4).
653 */
654 void
655 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
656 LLVMValueRef rsrc,
657 LLVMValueRef vdata,
658 unsigned num_channels,
659 LLVMValueRef voffset,
660 LLVMValueRef soffset,
661 unsigned inst_offset,
662 bool glc,
663 bool slc,
664 bool writeonly_memory,
665 bool has_add_tid)
666 {
667 /* TODO: Fix stores with ADD_TID and remove the "has_add_tid" flag. */
668 if (!has_add_tid) {
669 /* Split 3 channel stores, becase LLVM doesn't support 3-channel
670 * intrinsics. */
671 if (num_channels == 3) {
672 LLVMValueRef v[3], v01;
673
674 for (int i = 0; i < 3; i++) {
675 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
676 LLVMConstInt(ctx->i32, i, 0), "");
677 }
678 v01 = ac_build_gather_values(ctx, v, 2);
679
680 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
681 soffset, inst_offset, glc, slc,
682 writeonly_memory, has_add_tid);
683 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
684 soffset, inst_offset + 8,
685 glc, slc,
686 writeonly_memory, has_add_tid);
687 return;
688 }
689
690 unsigned func = CLAMP(num_channels, 1, 3) - 1;
691 static const char *types[] = {"f32", "v2f32", "v4f32"};
692 char name[256];
693 LLVMValueRef offset = soffset;
694
695 if (inst_offset)
696 offset = LLVMBuildAdd(ctx->builder, offset,
697 LLVMConstInt(ctx->i32, inst_offset, 0), "");
698 if (voffset)
699 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
700
701 LLVMValueRef args[] = {
702 bitcast_to_float(ctx, vdata),
703 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
704 LLVMConstInt(ctx->i32, 0, 0),
705 offset,
706 LLVMConstInt(ctx->i1, glc, 0),
707 LLVMConstInt(ctx->i1, slc, 0),
708 };
709
710 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
711 types[func]);
712
713 ac_build_intrinsic(ctx, name, ctx->voidt,
714 args, ARRAY_SIZE(args),
715 writeonly_memory ?
716 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
717 AC_FUNC_ATTR_WRITEONLY);
718 return;
719 }
720
721 static unsigned dfmt[] = {
722 V_008F0C_BUF_DATA_FORMAT_32,
723 V_008F0C_BUF_DATA_FORMAT_32_32,
724 V_008F0C_BUF_DATA_FORMAT_32_32_32,
725 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
726 };
727 assert(num_channels >= 1 && num_channels <= 4);
728
729 LLVMValueRef args[] = {
730 rsrc,
731 vdata,
732 LLVMConstInt(ctx->i32, num_channels, 0),
733 voffset ? voffset : LLVMGetUndef(ctx->i32),
734 soffset,
735 LLVMConstInt(ctx->i32, inst_offset, 0),
736 LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
737 LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
738 LLVMConstInt(ctx->i32, voffset != NULL, 0),
739 LLVMConstInt(ctx->i32, 0, 0), /* idxen */
740 LLVMConstInt(ctx->i32, glc, 0),
741 LLVMConstInt(ctx->i32, slc, 0),
742 LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
743 };
744
745 /* The instruction offset field has 12 bits */
746 assert(voffset || inst_offset < (1 << 12));
747
748 /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */
749 unsigned func = CLAMP(num_channels, 1, 3) - 1;
750 const char *types[] = {"i32", "v2i32", "v4i32"};
751 char name[256];
752 snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
753
754 ac_build_intrinsic(ctx, name, ctx->voidt,
755 args, ARRAY_SIZE(args),
756 AC_FUNC_ATTR_LEGACY);
757 }
758
759 LLVMValueRef
760 ac_build_buffer_load(struct ac_llvm_context *ctx,
761 LLVMValueRef rsrc,
762 int num_channels,
763 LLVMValueRef vindex,
764 LLVMValueRef voffset,
765 LLVMValueRef soffset,
766 unsigned inst_offset,
767 unsigned glc,
768 unsigned slc,
769 bool can_speculate,
770 bool allow_smem)
771 {
772 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
773 if (voffset)
774 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
775 if (soffset)
776 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
777
778 /* TODO: VI and later generations can use SMEM with GLC=1.*/
779 if (allow_smem && !glc && !slc) {
780 assert(vindex == NULL);
781
782 LLVMValueRef result[4];
783
784 for (int i = 0; i < num_channels; i++) {
785 if (i) {
786 offset = LLVMBuildAdd(ctx->builder, offset,
787 LLVMConstInt(ctx->i32, 4, 0), "");
788 }
789 LLVMValueRef args[2] = {rsrc, offset};
790 result[i] = ac_build_intrinsic(ctx, "llvm.SI.load.const.v4i32",
791 ctx->f32, args, 2,
792 AC_FUNC_ATTR_READNONE |
793 AC_FUNC_ATTR_LEGACY);
794 }
795 if (num_channels == 1)
796 return result[0];
797
798 if (num_channels == 3)
799 result[num_channels++] = LLVMGetUndef(ctx->f32);
800 return ac_build_gather_values(ctx, result, num_channels);
801 }
802
803 unsigned func = CLAMP(num_channels, 1, 3) - 1;
804
805 LLVMValueRef args[] = {
806 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
807 vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
808 offset,
809 LLVMConstInt(ctx->i1, glc, 0),
810 LLVMConstInt(ctx->i1, slc, 0)
811 };
812
813 LLVMTypeRef types[] = {ctx->f32, LLVMVectorType(ctx->f32, 2),
814 ctx->v4f32};
815 const char *type_names[] = {"f32", "v2f32", "v4f32"};
816 char name[256];
817
818 snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
819 type_names[func]);
820
821 return ac_build_intrinsic(ctx, name, types[func], args,
822 ARRAY_SIZE(args),
823 /* READNONE means writes can't affect it, while
824 * READONLY means that writes can affect it. */
825 can_speculate && HAVE_LLVM >= 0x0400 ?
826 AC_FUNC_ATTR_READNONE :
827 AC_FUNC_ATTR_READONLY);
828 }
829
830 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
831 LLVMValueRef rsrc,
832 LLVMValueRef vindex,
833 LLVMValueRef voffset,
834 bool can_speculate)
835 {
836 LLVMValueRef args [] = {
837 LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
838 vindex,
839 voffset,
840 LLVMConstInt(ctx->i1, 0, 0), /* glc */
841 LLVMConstInt(ctx->i1, 0, 0), /* slc */
842 };
843
844 return ac_build_intrinsic(ctx,
845 "llvm.amdgcn.buffer.load.format.v4f32",
846 ctx->v4f32, args, ARRAY_SIZE(args),
847 /* READNONE means writes can't affect it, while
848 * READONLY means that writes can affect it. */
849 can_speculate && HAVE_LLVM >= 0x0400 ?
850 AC_FUNC_ATTR_READNONE :
851 AC_FUNC_ATTR_READONLY);
852 }
853
854 /**
855 * Set range metadata on an instruction. This can only be used on load and
856 * call instructions. If you know an instruction can only produce the values
857 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
858 * \p lo is the minimum value inclusive.
859 * \p hi is the maximum value exclusive.
860 */
861 static void set_range_metadata(struct ac_llvm_context *ctx,
862 LLVMValueRef value, unsigned lo, unsigned hi)
863 {
864 LLVMValueRef range_md, md_args[2];
865 LLVMTypeRef type = LLVMTypeOf(value);
866 LLVMContextRef context = LLVMGetTypeContext(type);
867
868 md_args[0] = LLVMConstInt(type, lo, false);
869 md_args[1] = LLVMConstInt(type, hi, false);
870 range_md = LLVMMDNodeInContext(context, md_args, 2);
871 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
872 }
873
874 LLVMValueRef
875 ac_get_thread_id(struct ac_llvm_context *ctx)
876 {
877 LLVMValueRef tid;
878
879 LLVMValueRef tid_args[2];
880 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
881 tid_args[1] = LLVMConstInt(ctx->i32, 0, false);
882 tid_args[1] = ac_build_intrinsic(ctx,
883 "llvm.amdgcn.mbcnt.lo", ctx->i32,
884 tid_args, 2, AC_FUNC_ATTR_READNONE);
885
886 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
887 ctx->i32, tid_args,
888 2, AC_FUNC_ATTR_READNONE);
889 set_range_metadata(ctx, tid, 0, 64);
890 return tid;
891 }
892
893 /*
894 * SI implements derivatives using the local data store (LDS)
895 * All writes to the LDS happen in all executing threads at
896 * the same time. TID is the Thread ID for the current
897 * thread and is a value between 0 and 63, representing
898 * the thread's position in the wavefront.
899 *
900 * For the pixel shader threads are grouped into quads of four pixels.
901 * The TIDs of the pixels of a quad are:
902 *
903 * +------+------+
904 * |4n + 0|4n + 1|
905 * +------+------+
906 * |4n + 2|4n + 3|
907 * +------+------+
908 *
909 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
910 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
911 * the current pixel's column, and masking with 0xfffffffe yields the TID
912 * of the left pixel of the current pixel's row.
913 *
914 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
915 * adding 2 yields the TID of the pixel below the top pixel.
916 */
917 LLVMValueRef
918 ac_build_ddxy(struct ac_llvm_context *ctx,
919 bool has_ds_bpermute,
920 uint32_t mask,
921 int idx,
922 LLVMValueRef val)
923 {
924 LLVMValueRef tl, trbl, args[2];
925 LLVMValueRef result;
926
927 if (has_ds_bpermute) {
928 LLVMValueRef thread_id, tl_tid, trbl_tid;
929 thread_id = ac_get_thread_id(ctx);
930
931 tl_tid = LLVMBuildAnd(ctx->builder, thread_id,
932 LLVMConstInt(ctx->i32, mask, false), "");
933
934 trbl_tid = LLVMBuildAdd(ctx->builder, tl_tid,
935 LLVMConstInt(ctx->i32, idx, false), "");
936
937 args[0] = LLVMBuildMul(ctx->builder, tl_tid,
938 LLVMConstInt(ctx->i32, 4, false), "");
939 args[1] = val;
940 tl = ac_build_intrinsic(ctx,
941 "llvm.amdgcn.ds.bpermute", ctx->i32,
942 args, 2,
943 AC_FUNC_ATTR_READNONE |
944 AC_FUNC_ATTR_CONVERGENT);
945
946 args[0] = LLVMBuildMul(ctx->builder, trbl_tid,
947 LLVMConstInt(ctx->i32, 4, false), "");
948 trbl = ac_build_intrinsic(ctx,
949 "llvm.amdgcn.ds.bpermute", ctx->i32,
950 args, 2,
951 AC_FUNC_ATTR_READNONE |
952 AC_FUNC_ATTR_CONVERGENT);
953 } else {
954 uint32_t masks[2];
955
956 switch (mask) {
957 case AC_TID_MASK_TOP_LEFT:
958 masks[0] = 0x8000;
959 if (idx == 1)
960 masks[1] = 0x8055;
961 else
962 masks[1] = 0x80aa;
963
964 break;
965 case AC_TID_MASK_TOP:
966 masks[0] = 0x8044;
967 masks[1] = 0x80ee;
968 break;
969 case AC_TID_MASK_LEFT:
970 masks[0] = 0x80a0;
971 masks[1] = 0x80f5;
972 break;
973 }
974
975 args[0] = val;
976 args[1] = LLVMConstInt(ctx->i32, masks[0], false);
977
978 tl = ac_build_intrinsic(ctx,
979 "llvm.amdgcn.ds.swizzle", ctx->i32,
980 args, 2,
981 AC_FUNC_ATTR_READNONE |
982 AC_FUNC_ATTR_CONVERGENT);
983
984 args[1] = LLVMConstInt(ctx->i32, masks[1], false);
985 trbl = ac_build_intrinsic(ctx,
986 "llvm.amdgcn.ds.swizzle", ctx->i32,
987 args, 2,
988 AC_FUNC_ATTR_READNONE |
989 AC_FUNC_ATTR_CONVERGENT);
990 }
991
992 tl = LLVMBuildBitCast(ctx->builder, tl, ctx->f32, "");
993 trbl = LLVMBuildBitCast(ctx->builder, trbl, ctx->f32, "");
994 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
995 return result;
996 }
997
998 void
999 ac_build_sendmsg(struct ac_llvm_context *ctx,
1000 uint32_t msg,
1001 LLVMValueRef wave_id)
1002 {
1003 LLVMValueRef args[2];
1004 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.SI.sendmsg" : "llvm.amdgcn.s.sendmsg";
1005 args[0] = LLVMConstInt(ctx->i32, msg, false);
1006 args[1] = wave_id;
1007 ac_build_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0);
1008 }
1009
1010 LLVMValueRef
1011 ac_build_imsb(struct ac_llvm_context *ctx,
1012 LLVMValueRef arg,
1013 LLVMTypeRef dst_type)
1014 {
1015 const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" :
1016 "llvm.amdgcn.sffbh.i32";
1017 LLVMValueRef msb = ac_build_intrinsic(ctx, intr_name,
1018 dst_type, &arg, 1,
1019 AC_FUNC_ATTR_READNONE);
1020
1021 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
1022 * the index from LSB. Invert it by doing "31 - msb". */
1023 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
1024 msb, "");
1025
1026 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
1027 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
1028 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
1029 arg, LLVMConstInt(ctx->i32, 0, 0), ""),
1030 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
1031 arg, all_ones, ""), "");
1032
1033 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
1034 }
1035
1036 LLVMValueRef
1037 ac_build_umsb(struct ac_llvm_context *ctx,
1038 LLVMValueRef arg,
1039 LLVMTypeRef dst_type)
1040 {
1041 LLVMValueRef args[2] = {
1042 arg,
1043 LLVMConstInt(ctx->i1, 1, 0),
1044 };
1045 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.ctlz.i32",
1046 dst_type, args, ARRAY_SIZE(args),
1047 AC_FUNC_ATTR_READNONE);
1048
1049 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
1050 * the index from LSB. Invert it by doing "31 - msb". */
1051 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
1052 msb, "");
1053
1054 /* check for zero */
1055 return LLVMBuildSelect(ctx->builder,
1056 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg,
1057 LLVMConstInt(ctx->i32, 0, 0), ""),
1058 LLVMConstInt(ctx->i32, -1, true), msb, "");
1059 }
1060
1061 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
1062 LLVMValueRef b)
1063 {
1064 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
1065 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
1066 }
1067
1068 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
1069 {
1070 if (HAVE_LLVM >= 0x0500) {
1071 LLVMValueRef max[2] = {
1072 value,
1073 LLVMConstReal(ctx->f32, 0),
1074 };
1075 LLVMValueRef min[2] = {
1076 LLVMConstReal(ctx->f32, 1),
1077 };
1078
1079 min[1] = ac_build_intrinsic(ctx, "llvm.maxnum.f32",
1080 ctx->f32, max, 2,
1081 AC_FUNC_ATTR_READNONE);
1082 return ac_build_intrinsic(ctx, "llvm.minnum.f32",
1083 ctx->f32, min, 2,
1084 AC_FUNC_ATTR_READNONE);
1085 }
1086
1087 LLVMValueRef args[3] = {
1088 value,
1089 LLVMConstReal(ctx->f32, 0),
1090 LLVMConstReal(ctx->f32, 1),
1091 };
1092
1093 return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3,
1094 AC_FUNC_ATTR_READNONE |
1095 AC_FUNC_ATTR_LEGACY);
1096 }
1097
1098 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
1099 {
1100 LLVMValueRef args[9];
1101
1102 if (HAVE_LLVM >= 0x0500) {
1103 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
1104 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1105
1106 if (a->compr) {
1107 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
1108 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
1109
1110 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
1111 v2i16, "");
1112 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
1113 v2i16, "");
1114 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
1115 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1116
1117 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
1118 ctx->voidt, args, 6, 0);
1119 } else {
1120 args[2] = a->out[0];
1121 args[3] = a->out[1];
1122 args[4] = a->out[2];
1123 args[5] = a->out[3];
1124 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
1125 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
1126
1127 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
1128 ctx->voidt, args, 8, 0);
1129 }
1130 return;
1131 }
1132
1133 args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
1134 args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
1135 args[2] = LLVMConstInt(ctx->i32, a->done, 0);
1136 args[3] = LLVMConstInt(ctx->i32, a->target, 0);
1137 args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
1138 memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
1139
1140 ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
1141 AC_FUNC_ATTR_LEGACY);
1142 }
1143
1144 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
1145 struct ac_image_args *a)
1146 {
1147 LLVMTypeRef dst_type;
1148 LLVMValueRef args[11];
1149 unsigned num_args = 0;
1150 const char *name;
1151 char intr_name[128], type[64];
1152
1153 if (HAVE_LLVM >= 0x0400) {
1154 bool sample = a->opcode == ac_image_sample ||
1155 a->opcode == ac_image_gather4 ||
1156 a->opcode == ac_image_get_lod;
1157
1158 if (sample)
1159 args[num_args++] = bitcast_to_float(ctx, a->addr);
1160 else
1161 args[num_args++] = a->addr;
1162
1163 args[num_args++] = a->resource;
1164 if (sample)
1165 args[num_args++] = a->sampler;
1166 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1167 if (sample)
1168 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
1169 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* glc */
1170 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* slc */
1171 args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* lwe */
1172 args[num_args++] = LLVMConstInt(ctx->i1, a->da, 0);
1173
1174 switch (a->opcode) {
1175 case ac_image_sample:
1176 name = "llvm.amdgcn.image.sample";
1177 break;
1178 case ac_image_gather4:
1179 name = "llvm.amdgcn.image.gather4";
1180 break;
1181 case ac_image_load:
1182 name = "llvm.amdgcn.image.load";
1183 break;
1184 case ac_image_load_mip:
1185 name = "llvm.amdgcn.image.load.mip";
1186 break;
1187 case ac_image_get_lod:
1188 name = "llvm.amdgcn.image.getlod";
1189 break;
1190 case ac_image_get_resinfo:
1191 name = "llvm.amdgcn.image.getresinfo";
1192 break;
1193 default:
1194 unreachable("invalid image opcode");
1195 }
1196
1197 ac_build_type_name_for_intr(LLVMTypeOf(args[0]), type,
1198 sizeof(type));
1199
1200 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",
1201 name,
1202 a->compare ? ".c" : "",
1203 a->bias ? ".b" :
1204 a->lod ? ".l" :
1205 a->deriv ? ".d" :
1206 a->level_zero ? ".lz" : "",
1207 a->offset ? ".o" : "",
1208 type);
1209
1210 LLVMValueRef result =
1211 ac_build_intrinsic(ctx, intr_name,
1212 ctx->v4f32, args, num_args,
1213 AC_FUNC_ATTR_READNONE);
1214 if (!sample) {
1215 result = LLVMBuildBitCast(ctx->builder, result,
1216 ctx->v4i32, "");
1217 }
1218 return result;
1219 }
1220
1221 args[num_args++] = a->addr;
1222 args[num_args++] = a->resource;
1223
1224 if (a->opcode == ac_image_load ||
1225 a->opcode == ac_image_load_mip ||
1226 a->opcode == ac_image_get_resinfo) {
1227 dst_type = ctx->v4i32;
1228 } else {
1229 dst_type = ctx->v4f32;
1230 args[num_args++] = a->sampler;
1231 }
1232
1233 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
1234 args[num_args++] = LLVMConstInt(ctx->i32, a->unorm, 0);
1235 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
1236 args[num_args++] = LLVMConstInt(ctx->i32, a->da, 0);
1237 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
1238 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
1239 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
1240 args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
1241
1242 switch (a->opcode) {
1243 case ac_image_sample:
1244 name = "llvm.SI.image.sample";
1245 break;
1246 case ac_image_gather4:
1247 name = "llvm.SI.gather4";
1248 break;
1249 case ac_image_load:
1250 name = "llvm.SI.image.load";
1251 break;
1252 case ac_image_load_mip:
1253 name = "llvm.SI.image.load.mip";
1254 break;
1255 case ac_image_get_lod:
1256 name = "llvm.SI.getlod";
1257 break;
1258 case ac_image_get_resinfo:
1259 name = "llvm.SI.getresinfo";
1260 break;
1261 }
1262
1263 ac_build_type_name_for_intr(LLVMTypeOf(a->addr), type, sizeof(type));
1264 snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s",
1265 name,
1266 a->compare ? ".c" : "",
1267 a->bias ? ".b" :
1268 a->lod ? ".l" :
1269 a->deriv ? ".d" :
1270 a->level_zero ? ".lz" : "",
1271 a->offset ? ".o" : "",
1272 type);
1273
1274 return ac_build_intrinsic(ctx, intr_name,
1275 dst_type, args, num_args,
1276 AC_FUNC_ATTR_READNONE |
1277 AC_FUNC_ATTR_LEGACY);
1278 }
1279
1280 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
1281 LLVMValueRef args[2])
1282 {
1283 if (HAVE_LLVM >= 0x0500) {
1284 LLVMTypeRef v2f16 =
1285 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
1286 LLVMValueRef res =
1287 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
1288 v2f16, args, 2,
1289 AC_FUNC_ATTR_READNONE);
1290 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
1291 }
1292
1293 return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
1294 AC_FUNC_ATTR_READNONE |
1295 AC_FUNC_ATTR_LEGACY);
1296 }
1297
1298 /**
1299 * KILL, AKA discard in GLSL.
1300 *
1301 * \param value kill if value < 0.0 or value == NULL.
1302 */
1303 void ac_build_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
1304 {
1305 if (value) {
1306 ac_build_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
1307 &value, 1, AC_FUNC_ATTR_LEGACY);
1308 } else {
1309 ac_build_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
1310 NULL, 0, AC_FUNC_ATTR_LEGACY);
1311 }
1312 }
1313
1314 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
1315 LLVMValueRef offset, LLVMValueRef width,
1316 bool is_signed)
1317 {
1318 LLVMValueRef args[] = {
1319 input,
1320 offset,
1321 width,
1322 };
1323
1324 if (HAVE_LLVM >= 0x0500) {
1325 return ac_build_intrinsic(ctx,
1326 is_signed ? "llvm.amdgcn.sbfe.i32" :
1327 "llvm.amdgcn.ubfe.i32",
1328 ctx->i32, args, 3,
1329 AC_FUNC_ATTR_READNONE);
1330 }
1331
1332 return ac_build_intrinsic(ctx,
1333 is_signed ? "llvm.AMDGPU.bfe.i32" :
1334 "llvm.AMDGPU.bfe.u32",
1335 ctx->i32, args, 3,
1336 AC_FUNC_ATTR_READNONE |
1337 AC_FUNC_ATTR_LEGACY);
1338 }
1339
1340 void ac_get_image_intr_name(const char *base_name,
1341 LLVMTypeRef data_type,
1342 LLVMTypeRef coords_type,
1343 LLVMTypeRef rsrc_type,
1344 char *out_name, unsigned out_len)
1345 {
1346 char coords_type_name[8];
1347
1348 ac_build_type_name_for_intr(coords_type, coords_type_name,
1349 sizeof(coords_type_name));
1350
1351 if (HAVE_LLVM <= 0x0309) {
1352 snprintf(out_name, out_len, "%s.%s", base_name, coords_type_name);
1353 } else {
1354 char data_type_name[8];
1355 char rsrc_type_name[8];
1356
1357 ac_build_type_name_for_intr(data_type, data_type_name,
1358 sizeof(data_type_name));
1359 ac_build_type_name_for_intr(rsrc_type, rsrc_type_name,
1360 sizeof(rsrc_type_name));
1361 snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
1362 data_type_name, coords_type_name, rsrc_type_name);
1363 }
1364 }
1365
1366 #define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3)
1367 #define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5)
1368
1369 enum ac_ir_type {
1370 AC_IR_UNDEF,
1371 AC_IR_CONST,
1372 AC_IR_VALUE,
1373 };
1374
1375 struct ac_vs_exp_chan
1376 {
1377 LLVMValueRef value;
1378 float const_float;
1379 enum ac_ir_type type;
1380 };
1381
1382 struct ac_vs_exp_inst {
1383 unsigned offset;
1384 LLVMValueRef inst;
1385 struct ac_vs_exp_chan chan[4];
1386 };
1387
1388 struct ac_vs_exports {
1389 unsigned num;
1390 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
1391 };
1392
1393 /* Return true if the PARAM export has been eliminated. */
1394 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
1395 uint32_t num_outputs,
1396 struct ac_vs_exp_inst *exp)
1397 {
1398 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
1399 bool is_zero[4] = {}, is_one[4] = {};
1400
1401 for (i = 0; i < 4; i++) {
1402 /* It's a constant expression. Undef outputs are eliminated too. */
1403 if (exp->chan[i].type == AC_IR_UNDEF) {
1404 is_zero[i] = true;
1405 is_one[i] = true;
1406 } else if (exp->chan[i].type == AC_IR_CONST) {
1407 if (exp->chan[i].const_float == 0)
1408 is_zero[i] = true;
1409 else if (exp->chan[i].const_float == 1)
1410 is_one[i] = true;
1411 else
1412 return false; /* other constant */
1413 } else
1414 return false;
1415 }
1416
1417 /* Only certain combinations of 0 and 1 can be eliminated. */
1418 if (is_zero[0] && is_zero[1] && is_zero[2])
1419 default_val = is_zero[3] ? 0 : 1;
1420 else if (is_one[0] && is_one[1] && is_one[2])
1421 default_val = is_zero[3] ? 2 : 3;
1422 else
1423 return false;
1424
1425 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
1426 LLVMInstructionEraseFromParent(exp->inst);
1427
1428 /* Change OFFSET to DEFAULT_VAL. */
1429 for (i = 0; i < num_outputs; i++) {
1430 if (vs_output_param_offset[i] == exp->offset) {
1431 vs_output_param_offset[i] =
1432 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
1433 break;
1434 }
1435 }
1436 return true;
1437 }
1438
1439 static bool ac_eliminate_duplicated_output(uint8_t *vs_output_param_offset,
1440 uint32_t num_outputs,
1441 struct ac_vs_exports *processed,
1442 struct ac_vs_exp_inst *exp)
1443 {
1444 unsigned p, copy_back_channels = 0;
1445
1446 /* See if the output is already in the list of processed outputs.
1447 * The LLVMValueRef comparison relies on SSA.
1448 */
1449 for (p = 0; p < processed->num; p++) {
1450 bool different = false;
1451
1452 for (unsigned j = 0; j < 4; j++) {
1453 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
1454 struct ac_vs_exp_chan *c2 = &exp->chan[j];
1455
1456 /* Treat undef as a match. */
1457 if (c2->type == AC_IR_UNDEF)
1458 continue;
1459
1460 /* If c1 is undef but c2 isn't, we can copy c2 to c1
1461 * and consider the instruction duplicated.
1462 */
1463 if (c1->type == AC_IR_UNDEF) {
1464 copy_back_channels |= 1 << j;
1465 continue;
1466 }
1467
1468 /* Test whether the channels are not equal. */
1469 if (c1->type != c2->type ||
1470 (c1->type == AC_IR_CONST &&
1471 c1->const_float != c2->const_float) ||
1472 (c1->type == AC_IR_VALUE &&
1473 c1->value != c2->value)) {
1474 different = true;
1475 break;
1476 }
1477 }
1478 if (!different)
1479 break;
1480
1481 copy_back_channels = 0;
1482 }
1483 if (p == processed->num)
1484 return false;
1485
1486 /* If a match was found, but the matching export has undef where the new
1487 * one has a normal value, copy the normal value to the undef channel.
1488 */
1489 struct ac_vs_exp_inst *match = &processed->exp[p];
1490
1491 while (copy_back_channels) {
1492 unsigned chan = u_bit_scan(&copy_back_channels);
1493
1494 assert(match->chan[chan].type == AC_IR_UNDEF);
1495 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
1496 exp->chan[chan].value);
1497 match->chan[chan] = exp->chan[chan];
1498 }
1499
1500 /* The PARAM export is duplicated. Kill it. */
1501 LLVMInstructionEraseFromParent(exp->inst);
1502
1503 /* Change OFFSET to the matching export. */
1504 for (unsigned i = 0; i < num_outputs; i++) {
1505 if (vs_output_param_offset[i] == exp->offset) {
1506 vs_output_param_offset[i] = match->offset;
1507 break;
1508 }
1509 }
1510 return true;
1511 }
1512
1513 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
1514 LLVMValueRef main_fn,
1515 uint8_t *vs_output_param_offset,
1516 uint32_t num_outputs,
1517 uint8_t *num_param_exports)
1518 {
1519 LLVMBasicBlockRef bb;
1520 bool removed_any = false;
1521 struct ac_vs_exports exports;
1522
1523 exports.num = 0;
1524
1525 /* Process all LLVM instructions. */
1526 bb = LLVMGetFirstBasicBlock(main_fn);
1527 while (bb) {
1528 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
1529
1530 while (inst) {
1531 LLVMValueRef cur = inst;
1532 inst = LLVMGetNextInstruction(inst);
1533 struct ac_vs_exp_inst exp;
1534
1535 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
1536 continue;
1537
1538 LLVMValueRef callee = ac_llvm_get_called_value(cur);
1539
1540 if (!ac_llvm_is_function(callee))
1541 continue;
1542
1543 const char *name = LLVMGetValueName(callee);
1544 unsigned num_args = LLVMCountParams(callee);
1545
1546 /* Check if this is an export instruction. */
1547 if ((num_args != 9 && num_args != 8) ||
1548 (strcmp(name, "llvm.SI.export") &&
1549 strcmp(name, "llvm.amdgcn.exp.f32")))
1550 continue;
1551
1552 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
1553 unsigned target = LLVMConstIntGetZExtValue(arg);
1554
1555 if (target < V_008DFC_SQ_EXP_PARAM)
1556 continue;
1557
1558 target -= V_008DFC_SQ_EXP_PARAM;
1559
1560 /* Parse the instruction. */
1561 memset(&exp, 0, sizeof(exp));
1562 exp.offset = target;
1563 exp.inst = cur;
1564
1565 for (unsigned i = 0; i < 4; i++) {
1566 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
1567
1568 exp.chan[i].value = v;
1569
1570 if (LLVMIsUndef(v)) {
1571 exp.chan[i].type = AC_IR_UNDEF;
1572 } else if (LLVMIsAConstantFP(v)) {
1573 LLVMBool loses_info;
1574 exp.chan[i].type = AC_IR_CONST;
1575 exp.chan[i].const_float =
1576 LLVMConstRealGetDouble(v, &loses_info);
1577 } else {
1578 exp.chan[i].type = AC_IR_VALUE;
1579 }
1580 }
1581
1582 /* Eliminate constant and duplicated PARAM exports. */
1583 if (ac_eliminate_const_output(vs_output_param_offset,
1584 num_outputs, &exp) ||
1585 ac_eliminate_duplicated_output(vs_output_param_offset,
1586 num_outputs, &exports,
1587 &exp)) {
1588 removed_any = true;
1589 } else {
1590 exports.exp[exports.num++] = exp;
1591 }
1592 }
1593 bb = LLVMGetNextBasicBlock(bb);
1594 }
1595
1596 /* Remove holes in export memory due to removed PARAM exports.
1597 * This is done by renumbering all PARAM exports.
1598 */
1599 if (removed_any) {
1600 uint8_t old_offset[VARYING_SLOT_MAX];
1601 unsigned out, i;
1602
1603 /* Make a copy of the offsets. We need the old version while
1604 * we are modifying some of them. */
1605 memcpy(old_offset, vs_output_param_offset,
1606 sizeof(old_offset));
1607
1608 for (i = 0; i < exports.num; i++) {
1609 unsigned offset = exports.exp[i].offset;
1610
1611 /* Update vs_output_param_offset. Multiple outputs can
1612 * have the same offset.
1613 */
1614 for (out = 0; out < num_outputs; out++) {
1615 if (old_offset[out] == offset)
1616 vs_output_param_offset[out] = i;
1617 }
1618
1619 /* Change the PARAM offset in the instruction. */
1620 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
1621 LLVMConstInt(ctx->i32,
1622 V_008DFC_SQ_EXP_PARAM + i, 0));
1623 }
1624 *num_param_exports = exports.num;
1625 }
1626 }