projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
ac/nir: set image=true when loading FMASK for images
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 LLVMValueRef scratch;
46
47 struct hash_table *defs;
48 struct hash_table *phis;
49 struct hash_table *vars;
50
51 LLVMValueRef main_function;
52 LLVMBasicBlockRef continue_block;
53 LLVMBasicBlockRef break_block;
54
55 int num_locals;
56 LLVMValueRef *locals;
57 };
58
59 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
60 nir_deref_instr *deref_instr,
61 enum ac_descriptor_type desc_type,
62 const nir_instr *instr,
63 bool image, bool write);
64
65 static void
66 build_store_values_extended(struct ac_llvm_context *ac,
67 LLVMValueRef *values,
68 unsigned value_count,
69 unsigned value_stride,
70 LLVMValueRef vec)
71 {
72 LLVMBuilderRef builder = ac->builder;
73 unsigned i;
74
75 for (i = 0; i < value_count; i++) {
76 LLVMValueRef ptr = values[i * value_stride];
77 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
78 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
79 LLVMBuildStore(builder, value, ptr);
80 }
81 }
82
83 static enum ac_image_dim
84 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
85 bool is_array)
86 {
87 switch (dim) {
88 case GLSL_SAMPLER_DIM_1D:
89 if (ctx->chip_class == GFX9)
90 return is_array ? ac_image_2darray : ac_image_2d;
91 return is_array ? ac_image_1darray : ac_image_1d;
92 case GLSL_SAMPLER_DIM_2D:
93 case GLSL_SAMPLER_DIM_RECT:
94 case GLSL_SAMPLER_DIM_EXTERNAL:
95 return is_array ? ac_image_2darray : ac_image_2d;
96 case GLSL_SAMPLER_DIM_3D:
97 return ac_image_3d;
98 case GLSL_SAMPLER_DIM_CUBE:
99 return ac_image_cube;
100 case GLSL_SAMPLER_DIM_MS:
101 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
102 case GLSL_SAMPLER_DIM_SUBPASS:
103 return ac_image_2darray;
104 case GLSL_SAMPLER_DIM_SUBPASS_MS:
105 return ac_image_2darraymsaa;
106 default:
107 unreachable("bad sampler dim");
108 }
109 }
110
111 static enum ac_image_dim
112 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
113 bool is_array)
114 {
115 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
116
117 if (dim == ac_image_cube ||
118 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
119 dim = ac_image_2darray;
120
121 return dim;
122 }
123
124 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
125 const nir_ssa_def *def)
126 {
127 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
128 if (def->num_components > 1) {
129 type = LLVMVectorType(type, def->num_components);
130 }
131 return type;
132 }
133
134 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
135 {
136 assert(src.is_ssa);
137 return nir->ssa_defs[src.ssa->index];
138 }
139
140 static LLVMValueRef
141 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
142 {
143 LLVMValueRef ptr = get_src(ctx, src);
144 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
145 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
146
147 return LLVMBuildBitCast(ctx->ac.builder, ptr,
148 LLVMPointerType(ctx->ac.i32, addr_space), "");
149 }
150
151 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
152 const struct nir_block *b)
153 {
154 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
155 return (LLVMBasicBlockRef)entry->data;
156 }
157
158 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
159 nir_alu_src src,
160 unsigned num_components)
161 {
162 LLVMValueRef value = get_src(ctx, src.src);
163 bool need_swizzle = false;
164
165 assert(value);
166 unsigned src_components = ac_get_llvm_num_components(value);
167 for (unsigned i = 0; i < num_components; ++i) {
168 assert(src.swizzle[i] < src_components);
169 if (src.swizzle[i] != i)
170 need_swizzle = true;
171 }
172
173 if (need_swizzle || num_components != src_components) {
174 LLVMValueRef masks[] = {
175 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
177 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
178 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
179
180 if (src_components > 1 && num_components == 1) {
181 value = LLVMBuildExtractElement(ctx->ac.builder, value,
182 masks[0], "");
183 } else if (src_components == 1 && num_components > 1) {
184 LLVMValueRef values[] = {value, value, value, value};
185 value = ac_build_gather_values(&ctx->ac, values, num_components);
186 } else {
187 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
188 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
189 swizzle, "");
190 }
191 }
192 assert(!src.negate);
193 assert(!src.abs);
194 return value;
195 }
196
197 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
198 LLVMIntPredicate pred, LLVMValueRef src0,
199 LLVMValueRef src1)
200 {
201 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
202 return LLVMBuildSelect(ctx->builder, result,
203 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
204 ctx->i32_0, "");
205 }
206
207 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
208 LLVMRealPredicate pred, LLVMValueRef src0,
209 LLVMValueRef src1)
210 {
211 LLVMValueRef result;
212 src0 = ac_to_float(ctx, src0);
213 src1 = ac_to_float(ctx, src1);
214 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
215 return LLVMBuildSelect(ctx->builder, result,
216 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
217 ctx->i32_0, "");
218 }
219
220 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
221 const char *intrin,
222 LLVMTypeRef result_type,
223 LLVMValueRef src0)
224 {
225 char name[64];
226 LLVMValueRef params[] = {
227 ac_to_float(ctx, src0),
228 };
229
230 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
231 ac_get_elem_bits(ctx, result_type));
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1)
240 {
241 char name[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 };
246
247 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
248 ac_get_elem_bits(ctx, result_type));
249 assert(length < sizeof(name));
250 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
251 }
252
253 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
254 const char *intrin,
255 LLVMTypeRef result_type,
256 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
257 {
258 char name[64];
259 LLVMValueRef params[] = {
260 ac_to_float(ctx, src0),
261 ac_to_float(ctx, src1),
262 ac_to_float(ctx, src2),
263 };
264
265 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
266 ac_get_elem_bits(ctx, result_type));
267 assert(length < sizeof(name));
268 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
269 }
270
271 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
272 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
273 {
274 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
275
276 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
277 ctx->i32_0, "");
278 return LLVMBuildSelect(ctx->builder, v,
279 ac_to_integer_or_pointer(ctx, src1),
280 ac_to_integer_or_pointer(ctx, src2), "");
281 }
282
283 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
284 LLVMValueRef src0)
285 {
286 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
287 }
288
289 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
290 const char *intrin,
291 LLVMValueRef src0, LLVMValueRef src1)
292 {
293 LLVMTypeRef ret_type;
294 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
295 LLVMValueRef res;
296 LLVMValueRef params[] = { src0, src1 };
297 ret_type = LLVMStructTypeInContext(ctx->context, types,
298 2, true);
299
300 res = ac_build_intrinsic(ctx, intrin, ret_type,
301 params, 2, AC_FUNC_ATTR_READNONE);
302
303 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
304 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
305 return res;
306 }
307
308 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
309 LLVMValueRef src0,
310 unsigned bitsize)
311 {
312 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
313 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
314 "");
315 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
316
317 switch (bitsize) {
318 case 16:
319 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
320 case 32:
321 return result;
322 case 64:
323 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
324 default:
325 unreachable("Unsupported bit size.");
326 }
327 }
328
329 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
330 LLVMValueRef src0)
331 {
332 src0 = ac_to_float(ctx, src0);
333 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
334 return LLVMBuildSExt(ctx->builder,
335 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
336 ctx->i32, "");
337 }
338
339 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
340 LLVMValueRef src0,
341 unsigned bitsize)
342 {
343 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
344
345 switch (bitsize) {
346 case 8:
347 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
348 case 16:
349 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
350 case 32:
351 return result;
352 case 64:
353 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
354 default:
355 unreachable("Unsupported bit size.");
356 }
357 }
358
359 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
360 LLVMValueRef src0)
361 {
362 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
363 return LLVMBuildSExt(ctx->builder,
364 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
365 ctx->i32, "");
366 }
367
368 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
369 LLVMValueRef src0)
370 {
371 LLVMValueRef result;
372 LLVMValueRef cond = NULL;
373
374 src0 = ac_to_float(ctx, src0);
375 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
376
377 if (ctx->chip_class >= GFX8) {
378 LLVMValueRef args[2];
379 /* Check if the result is a denormal - and flush to 0 if so. */
380 args[0] = result;
381 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
382 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
383 }
384
385 /* need to convert back up to f32 */
386 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
387
388 if (ctx->chip_class >= GFX8)
389 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
390 else {
391 /* for GFX6-GFX7 */
392 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
393 * so compare the result and flush to 0 if it's smaller.
394 */
395 LLVMValueRef temp, cond2;
396 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
397 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
398 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
399 temp, "");
400 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
401 temp, ctx->f32_0, "");
402 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
403 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
404 }
405 return result;
406 }
407
408 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
409 LLVMValueRef src0, LLVMValueRef src1)
410 {
411 LLVMValueRef dst64, result;
412 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
413 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
414
415 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
416 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
417 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
418 return result;
419 }
420
421 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
422 LLVMValueRef src0, LLVMValueRef src1)
423 {
424 LLVMValueRef dst64, result;
425 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
426 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
427
428 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
429 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
430 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
431 return result;
432 }
433
434 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
435 LLVMValueRef bits, LLVMValueRef offset)
436 {
437 /* mask = ((1 << bits) - 1) << offset */
438 return LLVMBuildShl(ctx->builder,
439 LLVMBuildSub(ctx->builder,
440 LLVMBuildShl(ctx->builder,
441 ctx->i32_1,
442 bits, ""),
443 ctx->i32_1, ""),
444 offset, "");
445 }
446
447 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
448 LLVMValueRef mask, LLVMValueRef insert,
449 LLVMValueRef base)
450 {
451 /* Calculate:
452 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
453 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
454 */
455 return LLVMBuildXor(ctx->builder, base,
456 LLVMBuildAnd(ctx->builder, mask,
457 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
458 }
459
460 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
461 LLVMValueRef src0,
462 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
463 LLVMValueRef args[2]))
464 {
465 LLVMValueRef comp[2];
466
467 src0 = ac_to_float(ctx, src0);
468 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
469 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
470
471 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
472 }
473
474 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
475 LLVMValueRef src0)
476 {
477 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
478 LLVMValueRef temps[2], val;
479 int i;
480
481 for (i = 0; i < 2; i++) {
482 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
483 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
484 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
485 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
486 }
487 return ac_build_gather_values(ctx, temps, 2);
488 }
489
490 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
491 nir_op op,
492 LLVMValueRef src0)
493 {
494 unsigned mask;
495 int idx;
496 LLVMValueRef result;
497
498 if (op == nir_op_fddx_fine)
499 mask = AC_TID_MASK_LEFT;
500 else if (op == nir_op_fddy_fine)
501 mask = AC_TID_MASK_TOP;
502 else
503 mask = AC_TID_MASK_TOP_LEFT;
504
505 /* for DDX we want to next X pixel, DDY next Y pixel. */
506 if (op == nir_op_fddx_fine ||
507 op == nir_op_fddx_coarse ||
508 op == nir_op_fddx)
509 idx = 1;
510 else
511 idx = 2;
512
513 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
514 return result;
515 }
516
517 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
518 {
519 LLVMValueRef src[4], result = NULL;
520 unsigned num_components = instr->dest.dest.ssa.num_components;
521 unsigned src_components;
522 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
523
524 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
525 switch (instr->op) {
526 case nir_op_vec2:
527 case nir_op_vec3:
528 case nir_op_vec4:
529 src_components = 1;
530 break;
531 case nir_op_pack_half_2x16:
532 case nir_op_pack_snorm_2x16:
533 case nir_op_pack_unorm_2x16:
534 src_components = 2;
535 break;
536 case nir_op_unpack_half_2x16:
537 src_components = 1;
538 break;
539 case nir_op_cube_face_coord:
540 case nir_op_cube_face_index:
541 src_components = 3;
542 break;
543 default:
544 src_components = num_components;
545 break;
546 }
547 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
548 src[i] = get_alu_src(ctx, instr->src[i], src_components);
549
550 switch (instr->op) {
551 case nir_op_mov:
552 result = src[0];
553 break;
554 case nir_op_fneg:
555 src[0] = ac_to_float(&ctx->ac, src[0]);
556 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
557 break;
558 case nir_op_ineg:
559 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
560 break;
561 case nir_op_inot:
562 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
563 break;
564 case nir_op_iadd:
565 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_fadd:
568 src[0] = ac_to_float(&ctx->ac, src[0]);
569 src[1] = ac_to_float(&ctx->ac, src[1]);
570 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_fsub:
573 src[0] = ac_to_float(&ctx->ac, src[0]);
574 src[1] = ac_to_float(&ctx->ac, src[1]);
575 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
576 break;
577 case nir_op_isub:
578 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
579 break;
580 case nir_op_imul:
581 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
582 break;
583 case nir_op_imod:
584 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_umod:
587 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_fmod:
590 src[0] = ac_to_float(&ctx->ac, src[0]);
591 src[1] = ac_to_float(&ctx->ac, src[1]);
592 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
593 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
594 ac_to_float_type(&ctx->ac, def_type), result);
595 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
596 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
597 break;
598 case nir_op_frem:
599 src[0] = ac_to_float(&ctx->ac, src[0]);
600 src[1] = ac_to_float(&ctx->ac, src[1]);
601 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
602 break;
603 case nir_op_irem:
604 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
605 break;
606 case nir_op_idiv:
607 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
608 break;
609 case nir_op_udiv:
610 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_fmul:
613 src[0] = ac_to_float(&ctx->ac, src[0]);
614 src[1] = ac_to_float(&ctx->ac, src[1]);
615 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
616 break;
617 case nir_op_frcp:
618 src[0] = ac_to_float(&ctx->ac, src[0]);
619 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
620 break;
621 case nir_op_iand:
622 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
623 break;
624 case nir_op_ior:
625 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
626 break;
627 case nir_op_ixor:
628 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
629 break;
630 case nir_op_ishl:
631 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
632 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
633 LLVMTypeOf(src[0]), "");
634 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
635 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
636 LLVMTypeOf(src[0]), "");
637 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
638 break;
639 case nir_op_ishr:
640 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
641 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
642 LLVMTypeOf(src[0]), "");
643 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
644 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
645 LLVMTypeOf(src[0]), "");
646 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_ushr:
649 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
650 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
651 LLVMTypeOf(src[0]), "");
652 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
653 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
654 LLVMTypeOf(src[0]), "");
655 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
656 break;
657 case nir_op_ilt32:
658 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
659 break;
660 case nir_op_ine32:
661 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
662 break;
663 case nir_op_ieq32:
664 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
665 break;
666 case nir_op_ige32:
667 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
668 break;
669 case nir_op_ult32:
670 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
671 break;
672 case nir_op_uge32:
673 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
674 break;
675 case nir_op_feq32:
676 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
677 break;
678 case nir_op_fne32:
679 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
680 break;
681 case nir_op_flt32:
682 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
683 break;
684 case nir_op_fge32:
685 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
686 break;
687 case nir_op_fabs:
688 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
689 ac_to_float_type(&ctx->ac, def_type), src[0]);
690 break;
691 case nir_op_iabs:
692 result = emit_iabs(&ctx->ac, src[0]);
693 break;
694 case nir_op_imax:
695 result = ac_build_imax(&ctx->ac, src[0], src[1]);
696 break;
697 case nir_op_imin:
698 result = ac_build_imin(&ctx->ac, src[0], src[1]);
699 break;
700 case nir_op_umax:
701 result = ac_build_umax(&ctx->ac, src[0], src[1]);
702 break;
703 case nir_op_umin:
704 result = ac_build_umin(&ctx->ac, src[0], src[1]);
705 break;
706 case nir_op_isign:
707 result = ac_build_isign(&ctx->ac, src[0],
708 instr->dest.dest.ssa.bit_size);
709 break;
710 case nir_op_fsign:
711 src[0] = ac_to_float(&ctx->ac, src[0]);
712 result = ac_build_fsign(&ctx->ac, src[0],
713 instr->dest.dest.ssa.bit_size);
714 break;
715 case nir_op_ffloor:
716 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
717 ac_to_float_type(&ctx->ac, def_type), src[0]);
718 break;
719 case nir_op_ftrunc:
720 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
721 ac_to_float_type(&ctx->ac, def_type), src[0]);
722 break;
723 case nir_op_fceil:
724 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
725 ac_to_float_type(&ctx->ac, def_type), src[0]);
726 break;
727 case nir_op_fround_even:
728 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
729 ac_to_float_type(&ctx->ac, def_type),src[0]);
730 break;
731 case nir_op_ffract:
732 src[0] = ac_to_float(&ctx->ac, src[0]);
733 result = ac_build_fract(&ctx->ac, src[0],
734 instr->dest.dest.ssa.bit_size);
735 break;
736 case nir_op_fsin:
737 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
738 ac_to_float_type(&ctx->ac, def_type), src[0]);
739 break;
740 case nir_op_fcos:
741 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
742 ac_to_float_type(&ctx->ac, def_type), src[0]);
743 break;
744 case nir_op_fsqrt:
745 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
746 ac_to_float_type(&ctx->ac, def_type), src[0]);
747 break;
748 case nir_op_fexp2:
749 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
750 ac_to_float_type(&ctx->ac, def_type), src[0]);
751 break;
752 case nir_op_flog2:
753 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
754 ac_to_float_type(&ctx->ac, def_type), src[0]);
755 break;
756 case nir_op_frsq:
757 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
758 ac_to_float_type(&ctx->ac, def_type), src[0]);
759 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
760 break;
761 case nir_op_frexp_exp:
762 src[0] = ac_to_float(&ctx->ac, src[0]);
763 result = ac_build_frexp_exp(&ctx->ac, src[0],
764 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
765 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
766 result = LLVMBuildSExt(ctx->ac.builder, result,
767 ctx->ac.i32, "");
768 break;
769 case nir_op_frexp_sig:
770 src[0] = ac_to_float(&ctx->ac, src[0]);
771 result = ac_build_frexp_mant(&ctx->ac, src[0],
772 instr->dest.dest.ssa.bit_size);
773 break;
774 case nir_op_fpow:
775 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
776 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
777 break;
778 case nir_op_fmax:
779 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
780 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
781 if (ctx->ac.chip_class < GFX9 &&
782 instr->dest.dest.ssa.bit_size == 32) {
783 /* Only pre-GFX9 chips do not flush denorms. */
784 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
785 ac_to_float_type(&ctx->ac, def_type),
786 result);
787 }
788 break;
789 case nir_op_fmin:
790 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
791 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
792 if (ctx->ac.chip_class < GFX9 &&
793 instr->dest.dest.ssa.bit_size == 32) {
794 /* Only pre-GFX9 chips do not flush denorms. */
795 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
796 ac_to_float_type(&ctx->ac, def_type),
797 result);
798 }
799 break;
800 case nir_op_ffma:
801 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
802 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
803 break;
804 case nir_op_ldexp:
805 src[0] = ac_to_float(&ctx->ac, src[0]);
806 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
807 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
808 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
809 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
810 else
811 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
812 break;
813 case nir_op_bfm:
814 result = emit_bfm(&ctx->ac, src[0], src[1]);
815 break;
816 case nir_op_bitfield_select:
817 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
818 break;
819 case nir_op_ubfe:
820 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
821 break;
822 case nir_op_ibfe:
823 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
824 break;
825 case nir_op_bitfield_reverse:
826 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
827 break;
828 case nir_op_bit_count:
829 result = ac_build_bit_count(&ctx->ac, src[0]);
830 break;
831 case nir_op_vec2:
832 case nir_op_vec3:
833 case nir_op_vec4:
834 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
835 src[i] = ac_to_integer(&ctx->ac, src[i]);
836 result = ac_build_gather_values(&ctx->ac, src, num_components);
837 break;
838 case nir_op_f2i8:
839 case nir_op_f2i16:
840 case nir_op_f2i32:
841 case nir_op_f2i64:
842 src[0] = ac_to_float(&ctx->ac, src[0]);
843 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
844 break;
845 case nir_op_f2u8:
846 case nir_op_f2u16:
847 case nir_op_f2u32:
848 case nir_op_f2u64:
849 src[0] = ac_to_float(&ctx->ac, src[0]);
850 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
851 break;
852 case nir_op_i2f16:
853 case nir_op_i2f32:
854 case nir_op_i2f64:
855 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
856 break;
857 case nir_op_u2f16:
858 case nir_op_u2f32:
859 case nir_op_u2f64:
860 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
861 break;
862 case nir_op_f2f16_rtz:
863 src[0] = ac_to_float(&ctx->ac, src[0]);
864 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
865 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
866 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
867 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
868 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
869 break;
870 case nir_op_f2f16_rtne:
871 case nir_op_f2f16:
872 case nir_op_f2f32:
873 case nir_op_f2f64:
874 src[0] = ac_to_float(&ctx->ac, src[0]);
875 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
876 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
877 else
878 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
879 break;
880 case nir_op_u2u8:
881 case nir_op_u2u16:
882 case nir_op_u2u32:
883 case nir_op_u2u64:
884 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
885 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
886 else
887 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
888 break;
889 case nir_op_i2i8:
890 case nir_op_i2i16:
891 case nir_op_i2i32:
892 case nir_op_i2i64:
893 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
894 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
895 else
896 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
897 break;
898 case nir_op_b32csel:
899 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
900 break;
901 case nir_op_find_lsb:
902 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
903 break;
904 case nir_op_ufind_msb:
905 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
906 break;
907 case nir_op_ifind_msb:
908 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
909 break;
910 case nir_op_uadd_carry:
911 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
912 break;
913 case nir_op_usub_borrow:
914 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
915 break;
916 case nir_op_b2f16:
917 case nir_op_b2f32:
918 case nir_op_b2f64:
919 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
920 break;
921 case nir_op_f2b32:
922 result = emit_f2b(&ctx->ac, src[0]);
923 break;
924 case nir_op_b2i8:
925 case nir_op_b2i16:
926 case nir_op_b2i32:
927 case nir_op_b2i64:
928 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
929 break;
930 case nir_op_i2b32:
931 result = emit_i2b(&ctx->ac, src[0]);
932 break;
933 case nir_op_fquantize2f16:
934 result = emit_f2f16(&ctx->ac, src[0]);
935 break;
936 case nir_op_umul_high:
937 result = emit_umul_high(&ctx->ac, src[0], src[1]);
938 break;
939 case nir_op_imul_high:
940 result = emit_imul_high(&ctx->ac, src[0], src[1]);
941 break;
942 case nir_op_pack_half_2x16:
943 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
944 break;
945 case nir_op_pack_snorm_2x16:
946 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
947 break;
948 case nir_op_pack_unorm_2x16:
949 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
950 break;
951 case nir_op_unpack_half_2x16:
952 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
953 break;
954 case nir_op_fddx:
955 case nir_op_fddy:
956 case nir_op_fddx_fine:
957 case nir_op_fddy_fine:
958 case nir_op_fddx_coarse:
959 case nir_op_fddy_coarse:
960 result = emit_ddxy(ctx, instr->op, src[0]);
961 break;
962
963 case nir_op_unpack_64_2x32_split_x: {
964 assert(ac_get_llvm_num_components(src[0]) == 1);
965 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
966 ctx->ac.v2i32,
967 "");
968 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
969 ctx->ac.i32_0, "");
970 break;
971 }
972
973 case nir_op_unpack_64_2x32_split_y: {
974 assert(ac_get_llvm_num_components(src[0]) == 1);
975 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
976 ctx->ac.v2i32,
977 "");
978 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
979 ctx->ac.i32_1, "");
980 break;
981 }
982
983 case nir_op_pack_64_2x32_split: {
984 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
985 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
986 break;
987 }
988
989 case nir_op_pack_32_2x16_split: {
990 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
991 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
992 break;
993 }
994
995 case nir_op_unpack_32_2x16_split_x: {
996 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
997 ctx->ac.v2i16,
998 "");
999 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1000 ctx->ac.i32_0, "");
1001 break;
1002 }
1003
1004 case nir_op_unpack_32_2x16_split_y: {
1005 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1006 ctx->ac.v2i16,
1007 "");
1008 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1009 ctx->ac.i32_1, "");
1010 break;
1011 }
1012
1013 case nir_op_cube_face_coord: {
1014 src[0] = ac_to_float(&ctx->ac, src[0]);
1015 LLVMValueRef results[2];
1016 LLVMValueRef in[3];
1017 for (unsigned chan = 0; chan < 3; chan++)
1018 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1019 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1020 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1021 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1022 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1023 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1024 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1025 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1026 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1027 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1028 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1029 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1030 result = ac_build_gather_values(&ctx->ac, results, 2);
1031 break;
1032 }
1033
1034 case nir_op_cube_face_index: {
1035 src[0] = ac_to_float(&ctx->ac, src[0]);
1036 LLVMValueRef in[3];
1037 for (unsigned chan = 0; chan < 3; chan++)
1038 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1039 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1040 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1041 break;
1042 }
1043
1044 case nir_op_fmin3:
1045 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1046 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1047 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1048 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1049 break;
1050 case nir_op_umin3:
1051 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1052 result = ac_build_umin(&ctx->ac, result, src[2]);
1053 break;
1054 case nir_op_imin3:
1055 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1056 result = ac_build_imin(&ctx->ac, result, src[2]);
1057 break;
1058 case nir_op_fmax3:
1059 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1060 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1061 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1062 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1063 break;
1064 case nir_op_umax3:
1065 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1066 result = ac_build_umax(&ctx->ac, result, src[2]);
1067 break;
1068 case nir_op_imax3:
1069 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1070 result = ac_build_imax(&ctx->ac, result, src[2]);
1071 break;
1072 case nir_op_fmed3: {
1073 src[0] = ac_to_float(&ctx->ac, src[0]);
1074 src[1] = ac_to_float(&ctx->ac, src[1]);
1075 src[2] = ac_to_float(&ctx->ac, src[2]);
1076 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1077 instr->dest.dest.ssa.bit_size);
1078 break;
1079 }
1080 case nir_op_imed3: {
1081 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1082 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1083 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1084 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1085 break;
1086 }
1087 case nir_op_umed3: {
1088 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1089 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1090 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1091 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1092 break;
1093 }
1094
1095 default:
1096 fprintf(stderr, "Unknown NIR alu instr: ");
1097 nir_print_instr(&instr->instr, stderr);
1098 fprintf(stderr, "\n");
1099 abort();
1100 }
1101
1102 if (result) {
1103 assert(instr->dest.dest.is_ssa);
1104 result = ac_to_integer_or_pointer(&ctx->ac, result);
1105 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1106 }
1107 }
1108
1109 static void visit_load_const(struct ac_nir_context *ctx,
1110 const nir_load_const_instr *instr)
1111 {
1112 LLVMValueRef values[4], value = NULL;
1113 LLVMTypeRef element_type =
1114 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1115
1116 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1117 switch (instr->def.bit_size) {
1118 case 8:
1119 values[i] = LLVMConstInt(element_type,
1120 instr->value[i].u8, false);
1121 break;
1122 case 16:
1123 values[i] = LLVMConstInt(element_type,
1124 instr->value[i].u16, false);
1125 break;
1126 case 32:
1127 values[i] = LLVMConstInt(element_type,
1128 instr->value[i].u32, false);
1129 break;
1130 case 64:
1131 values[i] = LLVMConstInt(element_type,
1132 instr->value[i].u64, false);
1133 break;
1134 default:
1135 fprintf(stderr,
1136 "unsupported nir load_const bit_size: %d\n",
1137 instr->def.bit_size);
1138 abort();
1139 }
1140 }
1141 if (instr->def.num_components > 1) {
1142 value = LLVMConstVector(values, instr->def.num_components);
1143 } else
1144 value = values[0];
1145
1146 ctx->ssa_defs[instr->def.index] = value;
1147 }
1148
1149 static LLVMValueRef
1150 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1151 {
1152 LLVMValueRef size =
1153 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1154 LLVMConstInt(ctx->ac.i32, 2, false), "");
1155
1156 /* GFX8 only */
1157 if (ctx->ac.chip_class == GFX8 && in_elements) {
1158 /* On GFX8, the descriptor contains the size in bytes,
1159 * but TXQ must return the size in elements.
1160 * The stride is always non-zero for resources using TXQ.
1161 */
1162 LLVMValueRef stride =
1163 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1164 ctx->ac.i32_1, "");
1165 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1166 LLVMConstInt(ctx->ac.i32, 16, false), "");
1167 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1168 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1169
1170 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1171 }
1172 return size;
1173 }
1174
1175 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1176 nir_variable *var,
1177 struct ac_image_args *args,
1178 const nir_tex_instr *instr)
1179 {
1180 const struct glsl_type *type = glsl_without_array(var->type);
1181 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1182 LLVMValueRef half_texel[2];
1183 LLVMValueRef compare_cube_wa = NULL;
1184 LLVMValueRef result;
1185
1186 //TODO Rect
1187 {
1188 struct ac_image_args txq_args = { 0 };
1189
1190 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1191 txq_args.opcode = ac_image_get_resinfo;
1192 txq_args.dmask = 0xf;
1193 txq_args.lod = ctx->i32_0;
1194 txq_args.resource = args->resource;
1195 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1196 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1197
1198 for (unsigned c = 0; c < 2; c++) {
1199 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1200 LLVMConstInt(ctx->i32, c, false), "");
1201 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1202 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1203 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1204 LLVMConstReal(ctx->f32, -0.5), "");
1205 }
1206 }
1207
1208 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1209
1210 for (unsigned c = 0; c < 2; c++) {
1211 LLVMValueRef tmp;
1212 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1213 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1214 }
1215
1216 /*
1217 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1218 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1219 * workaround by sampling using a scaled type and converting.
1220 * This is taken from amdgpu-pro shaders.
1221 */
1222 /* NOTE this produces some ugly code compared to amdgpu-pro,
1223 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1224 * and then reads them back. -pro generates two selects,
1225 * one s_cmp for the descriptor rewriting
1226 * one v_cmp for the coordinate and result changes.
1227 */
1228 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1229 LLVMValueRef tmp, tmp2;
1230
1231 /* workaround 8/8/8/8 uint/sint cube gather bug */
1232 /* first detect it then change to a scaled read and f2i */
1233 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1234 tmp2 = tmp;
1235
1236 /* extract the DATA_FORMAT */
1237 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1238 LLVMConstInt(ctx->i32, 6, false), false);
1239
1240 /* is the DATA_FORMAT == 8_8_8_8 */
1241 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1242
1243 if (stype == GLSL_TYPE_UINT)
1244 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1245 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1246 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1247 else
1248 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1249 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1250 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1251
1252 /* replace the NUM FORMAT in the descriptor */
1253 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1254 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1255
1256 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1257
1258 /* don't modify the coordinates for this case */
1259 for (unsigned c = 0; c < 2; ++c)
1260 args->coords[c] = LLVMBuildSelect(
1261 ctx->builder, compare_cube_wa,
1262 orig_coords[c], args->coords[c], "");
1263 }
1264
1265 args->attributes = AC_FUNC_ATTR_READNONE;
1266 result = ac_build_image_opcode(ctx, args);
1267
1268 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1269 LLVMValueRef tmp, tmp2;
1270
1271 /* if the cube workaround is in place, f2i the result. */
1272 for (unsigned c = 0; c < 4; c++) {
1273 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1274 if (stype == GLSL_TYPE_UINT)
1275 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1276 else
1277 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1278 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1279 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1280 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1281 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1282 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1283 }
1284 }
1285 return result;
1286 }
1287
1288 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1289 {
1290 nir_deref_instr *texture_deref_instr = NULL;
1291
1292 for (unsigned i = 0; i < instr->num_srcs; i++) {
1293 switch (instr->src[i].src_type) {
1294 case nir_tex_src_texture_deref:
1295 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1296 break;
1297 default:
1298 break;
1299 }
1300 }
1301 return texture_deref_instr;
1302 }
1303
1304 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1305 const nir_tex_instr *instr,
1306 struct ac_image_args *args)
1307 {
1308 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1309 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1310
1311 if (ctx->abi->gfx9_stride_size_workaround) {
1312 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1313 args->resource,
1314 args->coords[0],
1315 ctx->ac.i32_0,
1316 util_last_bit(mask),
1317 0, true);
1318 } else {
1319 return ac_build_buffer_load_format(&ctx->ac,
1320 args->resource,
1321 args->coords[0],
1322 ctx->ac.i32_0,
1323 util_last_bit(mask),
1324 0, true);
1325 }
1326 }
1327
1328 args->opcode = ac_image_sample;
1329
1330 switch (instr->op) {
1331 case nir_texop_txf:
1332 case nir_texop_txf_ms:
1333 case nir_texop_samples_identical:
1334 args->opcode = args->level_zero ||
1335 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1336 ac_image_load : ac_image_load_mip;
1337 args->level_zero = false;
1338 break;
1339 case nir_texop_txs:
1340 case nir_texop_query_levels:
1341 args->opcode = ac_image_get_resinfo;
1342 if (!args->lod)
1343 args->lod = ctx->ac.i32_0;
1344 args->level_zero = false;
1345 break;
1346 case nir_texop_tex:
1347 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1348 assert(!args->lod);
1349 args->level_zero = true;
1350 }
1351 break;
1352 case nir_texop_tg4:
1353 args->opcode = ac_image_gather4;
1354 args->level_zero = true;
1355 break;
1356 case nir_texop_lod:
1357 args->opcode = ac_image_get_lod;
1358 break;
1359 default:
1360 break;
1361 }
1362
1363 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1364 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1365 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1366 const struct glsl_type *type = glsl_without_array(var->type);
1367 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1368 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1369 return lower_gather4_integer(&ctx->ac, var, args, instr);
1370 }
1371 }
1372
1373 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1374 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1375 if ((args->dim == ac_image_2darray ||
1376 args->dim == ac_image_2d) && !args->coords[1]) {
1377 args->coords[1] = ctx->ac.i32_0;
1378 }
1379 }
1380
1381 args->attributes = AC_FUNC_ATTR_READNONE;
1382 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1383 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1384 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1385 /* Prevent texture instructions with implicit derivatives from being
1386 * sinked into branches. */
1387 switch (instr->op) {
1388 case nir_texop_tex:
1389 case nir_texop_txb:
1390 case nir_texop_lod:
1391 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1392 break;
1393 default:
1394 break;
1395 }
1396 }
1397
1398 return ac_build_image_opcode(&ctx->ac, args);
1399 }
1400
1401 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1402 nir_intrinsic_instr *instr)
1403 {
1404 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1405 LLVMValueRef index = get_src(ctx, instr->src[1]);
1406
1407 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1408 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1409 return result;
1410 }
1411
1412 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1413 nir_intrinsic_instr *instr)
1414 {
1415 LLVMValueRef ptr, addr;
1416 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1417 unsigned index = nir_intrinsic_base(instr);
1418
1419 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1420 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1421
1422 /* Load constant values from user SGPRS when possible, otherwise
1423 * fallback to the default path that loads directly from memory.
1424 */
1425 if (LLVMIsConstant(src0) &&
1426 instr->dest.ssa.bit_size == 32) {
1427 unsigned count = instr->dest.ssa.num_components;
1428 unsigned offset = index;
1429
1430 offset += LLVMConstIntGetZExtValue(src0);
1431 offset /= 4;
1432
1433 offset -= ctx->abi->base_inline_push_consts;
1434
1435 if (offset + count <= ctx->abi->num_inline_push_consts) {
1436 return ac_build_gather_values(&ctx->ac,
1437 ctx->abi->inline_push_consts + offset,
1438 count);
1439 }
1440 }
1441
1442 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1443
1444 if (instr->dest.ssa.bit_size == 8) {
1445 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1446 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1447 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1448 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1449
1450 LLVMValueRef params[3];
1451 if (load_dwords > 1) {
1452 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1453 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1454 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1455 } else {
1456 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1457 params[0] = ctx->ac.i32_0;
1458 params[1] = res;
1459 }
1460 params[2] = addr;
1461 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1462
1463 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1464 if (instr->dest.ssa.num_components > 1)
1465 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1466 return res;
1467 } else if (instr->dest.ssa.bit_size == 16) {
1468 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1469 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1470 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1471 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1472 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1473 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1474 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1475 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1476 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1477 LLVMConstInt(ctx->ac.i32, 4, false)};
1478 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1479 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1480 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1481 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1482 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1483 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1484 }
1485
1486 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1487
1488 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1489 }
1490
1491 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1492 const nir_intrinsic_instr *instr)
1493 {
1494 LLVMValueRef index = get_src(ctx, instr->src[0]);
1495
1496 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1497 }
1498
1499 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1500 {
1501 uint32_t new_mask = 0;
1502 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1503 if (mask & (1u << i))
1504 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1505 return new_mask;
1506 }
1507
1508 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1509 unsigned start, unsigned count)
1510 {
1511 LLVMValueRef mask[] = {
1512 ctx->i32_0, ctx->i32_1,
1513 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1514
1515 unsigned src_elements = ac_get_llvm_num_components(src);
1516
1517 if (count == src_elements) {
1518 assert(start == 0);
1519 return src;
1520 } else if (count == 1) {
1521 assert(start < src_elements);
1522 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1523 } else {
1524 assert(start + count <= src_elements);
1525 assert(count <= 4);
1526 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1527 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1528 }
1529 }
1530
1531 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1532 enum gl_access_qualifier access,
1533 bool may_store_unaligned,
1534 bool writeonly_memory)
1535 {
1536 unsigned cache_policy = 0;
1537
1538 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1539 * store opcodes not aligned to a dword are affected. The only way to
1540 * get unaligned stores is through shader images.
1541 */
1542 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1543 /* If this is write-only, don't keep data in L1 to prevent
1544 * evicting L1 cache lines that may be needed by other
1545 * instructions.
1546 */
1547 writeonly_memory ||
1548 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1549 cache_policy |= ac_glc;
1550 }
1551
1552 if (access & ACCESS_STREAM_CACHE_POLICY)
1553 cache_policy |= ac_slc;
1554
1555 return cache_policy;
1556 }
1557
1558 static void visit_store_ssbo(struct ac_nir_context *ctx,
1559 nir_intrinsic_instr *instr)
1560 {
1561 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1562 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1563 unsigned writemask = nir_intrinsic_write_mask(instr);
1564 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1565 bool writeonly_memory = access & ACCESS_NON_READABLE;
1566 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1567
1568 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1569 get_src(ctx, instr->src[1]), true);
1570 LLVMValueRef base_data = src_data;
1571 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1572 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1573
1574 while (writemask) {
1575 int start, count;
1576 LLVMValueRef data, offset;
1577 LLVMTypeRef data_type;
1578
1579 u_bit_scan_consecutive_range(&writemask, &start, &count);
1580
1581 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1582 * writes into a 2-element and a 1-element write. */
1583 if (count == 3 &&
1584 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1585 writemask |= 1 << (start + 2);
1586 count = 2;
1587 }
1588 int num_bytes = count * elem_size_bytes; /* count in bytes */
1589
1590 /* we can only store 4 DWords at the same time.
1591 * can only happen for 64 Bit vectors. */
1592 if (num_bytes > 16) {
1593 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1594 count = 2;
1595 num_bytes = 16;
1596 }
1597
1598 /* check alignment of 16 Bit stores */
1599 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1600 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1601 count = 1;
1602 num_bytes = 2;
1603 }
1604 data = extract_vector_range(&ctx->ac, base_data, start, count);
1605
1606 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1607 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1608
1609 if (num_bytes == 1) {
1610 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1611 offset, ctx->ac.i32_0,
1612 cache_policy);
1613 } else if (num_bytes == 2) {
1614 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1615 offset, ctx->ac.i32_0,
1616 cache_policy);
1617 } else {
1618 int num_channels = num_bytes / 4;
1619
1620 switch (num_bytes) {
1621 case 16: /* v4f32 */
1622 data_type = ctx->ac.v4f32;
1623 break;
1624 case 12: /* v3f32 */
1625 data_type = ctx->ac.v3f32;
1626 break;
1627 case 8: /* v2f32 */
1628 data_type = ctx->ac.v2f32;
1629 break;
1630 case 4: /* f32 */
1631 data_type = ctx->ac.f32;
1632 break;
1633 default:
1634 unreachable("Malformed vector store.");
1635 }
1636 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1637
1638 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1639 num_channels, offset,
1640 ctx->ac.i32_0, 0,
1641 cache_policy, false);
1642 }
1643 }
1644 }
1645
1646 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1647 LLVMValueRef descriptor,
1648 LLVMValueRef offset,
1649 LLVMValueRef compare,
1650 LLVMValueRef exchange)
1651 {
1652 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1653 if (ctx->abi->robust_buffer_access) {
1654 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1655
1656 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1657 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1658
1659 ac_build_ifcc(&ctx->ac, cond, -1);
1660
1661 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1662 }
1663
1664 LLVMValueRef ptr_parts[2] = {
1665 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1666 LLVMBuildAnd(ctx->ac.builder,
1667 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1668 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1669 };
1670
1671 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1672 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1673
1674 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1675
1676 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1677 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1678 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1679 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1680
1681 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1682 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1683
1684 if (ctx->abi->robust_buffer_access) {
1685 ac_build_endif(&ctx->ac, -1);
1686
1687 LLVMBasicBlockRef incoming_blocks[2] = {
1688 start_block,
1689 then_block,
1690 };
1691
1692 LLVMValueRef incoming_values[2] = {
1693 LLVMConstInt(ctx->ac.i64, 0, 0),
1694 result,
1695 };
1696 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1697 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1698 return ret;
1699 } else {
1700 return result;
1701 }
1702 }
1703
1704 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1705 const nir_intrinsic_instr *instr)
1706 {
1707 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1708 const char *op;
1709 char name[64], type[8];
1710 LLVMValueRef params[6], descriptor;
1711 int arg_count = 0;
1712
1713 switch (instr->intrinsic) {
1714 case nir_intrinsic_ssbo_atomic_add:
1715 op = "add";
1716 break;
1717 case nir_intrinsic_ssbo_atomic_imin:
1718 op = "smin";
1719 break;
1720 case nir_intrinsic_ssbo_atomic_umin:
1721 op = "umin";
1722 break;
1723 case nir_intrinsic_ssbo_atomic_imax:
1724 op = "smax";
1725 break;
1726 case nir_intrinsic_ssbo_atomic_umax:
1727 op = "umax";
1728 break;
1729 case nir_intrinsic_ssbo_atomic_and:
1730 op = "and";
1731 break;
1732 case nir_intrinsic_ssbo_atomic_or:
1733 op = "or";
1734 break;
1735 case nir_intrinsic_ssbo_atomic_xor:
1736 op = "xor";
1737 break;
1738 case nir_intrinsic_ssbo_atomic_exchange:
1739 op = "swap";
1740 break;
1741 case nir_intrinsic_ssbo_atomic_comp_swap:
1742 op = "cmpswap";
1743 break;
1744 default:
1745 abort();
1746 }
1747
1748 descriptor = ctx->abi->load_ssbo(ctx->abi,
1749 get_src(ctx, instr->src[0]),
1750 true);
1751
1752 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1753 return_type == ctx->ac.i64) {
1754 return emit_ssbo_comp_swap_64(ctx, descriptor,
1755 get_src(ctx, instr->src[1]),
1756 get_src(ctx, instr->src[2]),
1757 get_src(ctx, instr->src[3]));
1758 }
1759 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1760 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1761 }
1762 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1763 params[arg_count++] = descriptor;
1764
1765 if (HAVE_LLVM >= 0x900) {
1766 /* XXX: The new raw/struct atomic intrinsics are buggy with
1767 * LLVM 8, see r358579.
1768 */
1769 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1770 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1771 params[arg_count++] = ctx->ac.i32_0; /* slc */
1772
1773 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1774 snprintf(name, sizeof(name),
1775 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1776 } else {
1777 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1778 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1779 params[arg_count++] = ctx->ac.i1false; /* slc */
1780
1781 assert(return_type == ctx->ac.i32);
1782 snprintf(name, sizeof(name),
1783 "llvm.amdgcn.buffer.atomic.%s", op);
1784 }
1785
1786 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1787 arg_count, 0);
1788 }
1789
1790 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1791 const nir_intrinsic_instr *instr)
1792 {
1793 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1794 int num_components = instr->num_components;
1795 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1796 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1797
1798 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1799 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1800 get_src(ctx, instr->src[0]), false);
1801 LLVMValueRef vindex = ctx->ac.i32_0;
1802
1803 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1804 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1805
1806 LLVMValueRef results[4];
1807 for (int i = 0; i < num_components;) {
1808 int num_elems = num_components - i;
1809 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1810 num_elems = 1;
1811 if (num_elems * elem_size_bytes > 16)
1812 num_elems = 16 / elem_size_bytes;
1813 int load_bytes = num_elems * elem_size_bytes;
1814
1815 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1816
1817 LLVMValueRef ret;
1818
1819 if (load_bytes == 1) {
1820 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1821 rsrc,
1822 offset,
1823 ctx->ac.i32_0,
1824 immoffset,
1825 cache_policy);
1826 } else if (load_bytes == 2) {
1827 ret = ac_build_tbuffer_load_short(&ctx->ac,
1828 rsrc,
1829 offset,
1830 ctx->ac.i32_0,
1831 immoffset,
1832 cache_policy);
1833 } else {
1834 int num_channels = util_next_power_of_two(load_bytes) / 4;
1835 bool can_speculate = access & ACCESS_CAN_REORDER;
1836
1837 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1838 vindex, offset, immoffset, 0,
1839 cache_policy, can_speculate, false);
1840 }
1841
1842 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1843 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1844 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1845
1846 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1847 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1848
1849 for (unsigned j = 0; j < num_elems; j++) {
1850 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1851 }
1852 i += num_elems;
1853 }
1854
1855 return ac_build_gather_values(&ctx->ac, results, num_components);
1856 }
1857
1858 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1859 const nir_intrinsic_instr *instr)
1860 {
1861 LLVMValueRef ret;
1862 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1863 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1864 int num_components = instr->num_components;
1865
1866 if (ctx->abi->load_ubo)
1867 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1868
1869 if (instr->dest.ssa.bit_size == 64)
1870 num_components *= 2;
1871
1872 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1873 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1874 LLVMValueRef results[num_components];
1875 for (unsigned i = 0; i < num_components; ++i) {
1876 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1877 load_bytes * i, 0);
1878
1879 if (load_bytes == 1) {
1880 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1881 rsrc,
1882 offset,
1883 ctx->ac.i32_0,
1884 immoffset,
1885 0);
1886 } else {
1887 assert(load_bytes == 2);
1888 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1889 rsrc,
1890 offset,
1891 ctx->ac.i32_0,
1892 immoffset,
1893 0);
1894 }
1895 }
1896 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1897 } else {
1898 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1899 NULL, 0, 0, true, true);
1900
1901 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1902 }
1903
1904 return LLVMBuildBitCast(ctx->ac.builder, ret,
1905 get_def_type(ctx, &instr->dest.ssa), "");
1906 }
1907
1908 static void
1909 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1910 bool vs_in, unsigned *vertex_index_out,
1911 LLVMValueRef *vertex_index_ref,
1912 unsigned *const_out, LLVMValueRef *indir_out)
1913 {
1914 nir_variable *var = nir_deref_instr_get_variable(instr);
1915 nir_deref_path path;
1916 unsigned idx_lvl = 1;
1917
1918 nir_deref_path_init(&path, instr, NULL);
1919
1920 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1921 if (vertex_index_ref) {
1922 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1923 if (vertex_index_out)
1924 *vertex_index_out = 0;
1925 } else {
1926 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1927 }
1928 ++idx_lvl;
1929 }
1930
1931 uint32_t const_offset = 0;
1932 LLVMValueRef offset = NULL;
1933
1934 if (var->data.compact) {
1935 assert(instr->deref_type == nir_deref_type_array);
1936 const_offset = nir_src_as_uint(instr->arr.index);
1937 goto out;
1938 }
1939
1940 for (; path.path[idx_lvl]; ++idx_lvl) {
1941 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1942 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1943 unsigned index = path.path[idx_lvl]->strct.index;
1944
1945 for (unsigned i = 0; i < index; i++) {
1946 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1947 const_offset += glsl_count_attribute_slots(ft, vs_in);
1948 }
1949 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1950 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1951 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1952 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1953 if (offset)
1954 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1955 else
1956 offset = array_off;
1957 } else
1958 unreachable("Uhandled deref type in get_deref_instr_offset");
1959 }
1960
1961 out:
1962 nir_deref_path_finish(&path);
1963
1964 if (const_offset && offset)
1965 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1966 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1967 "");
1968
1969 *const_out = const_offset;
1970 *indir_out = offset;
1971 }
1972
1973 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1974 nir_intrinsic_instr *instr,
1975 bool load_inputs)
1976 {
1977 LLVMValueRef result;
1978 LLVMValueRef vertex_index = NULL;
1979 LLVMValueRef indir_index = NULL;
1980 unsigned const_index = 0;
1981
1982 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1983
1984 unsigned location = var->data.location;
1985 unsigned driver_location = var->data.driver_location;
1986 const bool is_patch = var->data.patch;
1987 const bool is_compact = var->data.compact;
1988
1989 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1990 false, NULL, is_patch ? NULL : &vertex_index,
1991 &const_index, &indir_index);
1992
1993 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1994
1995 LLVMTypeRef src_component_type;
1996 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1997 src_component_type = LLVMGetElementType(dest_type);
1998 else
1999 src_component_type = dest_type;
2000
2001 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2002 vertex_index, indir_index,
2003 const_index, location, driver_location,
2004 var->data.location_frac,
2005 instr->num_components,
2006 is_patch, is_compact, load_inputs);
2007 if (instr->dest.ssa.bit_size == 16) {
2008 result = ac_to_integer(&ctx->ac, result);
2009 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2010 }
2011 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2012 }
2013
2014 static unsigned
2015 type_scalar_size_bytes(const struct glsl_type *type)
2016 {
2017 assert(glsl_type_is_vector_or_scalar(type) ||
2018 glsl_type_is_matrix(type));
2019 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2020 }
2021
2022 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2023 nir_intrinsic_instr *instr)
2024 {
2025 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2026 nir_variable *var = nir_deref_instr_get_variable(deref);
2027
2028 LLVMValueRef values[8];
2029 int idx = 0;
2030 int ve = instr->dest.ssa.num_components;
2031 unsigned comp = 0;
2032 LLVMValueRef indir_index;
2033 LLVMValueRef ret;
2034 unsigned const_index;
2035 unsigned stride = 4;
2036 int mode = deref->mode;
2037
2038 if (var) {
2039 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2040 var->data.mode == nir_var_shader_in;
2041 idx = var->data.driver_location;
2042 comp = var->data.location_frac;
2043 mode = var->data.mode;
2044
2045 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2046 &const_index, &indir_index);
2047
2048 if (var->data.compact) {
2049 stride = 1;
2050 const_index += comp;
2051 comp = 0;
2052 }
2053 }
2054
2055 if (instr->dest.ssa.bit_size == 64 &&
2056 (deref->mode == nir_var_shader_in ||
2057 deref->mode == nir_var_shader_out ||
2058 deref->mode == nir_var_function_temp))
2059 ve *= 2;
2060
2061 switch (mode) {
2062 case nir_var_shader_in:
2063 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2064 ctx->stage == MESA_SHADER_TESS_EVAL) {
2065 return load_tess_varyings(ctx, instr, true);
2066 }
2067
2068 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2069 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2070 LLVMValueRef indir_index;
2071 unsigned const_index, vertex_index;
2072 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2073 &const_index, &indir_index);
2074
2075 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2076 var->data.driver_location,
2077 var->data.location_frac,
2078 instr->num_components, vertex_index, const_index, type);
2079 }
2080
2081 for (unsigned chan = comp; chan < ve + comp; chan++) {
2082 if (indir_index) {
2083 unsigned count = glsl_count_attribute_slots(
2084 var->type,
2085 ctx->stage == MESA_SHADER_VERTEX);
2086 count -= chan / 4;
2087 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2088 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2089 stride, false, true);
2090
2091 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2092 tmp_vec,
2093 indir_index, "");
2094 } else
2095 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2096 }
2097 break;
2098 case nir_var_function_temp:
2099 for (unsigned chan = 0; chan < ve; chan++) {
2100 if (indir_index) {
2101 unsigned count = glsl_count_attribute_slots(
2102 var->type, false);
2103 count -= chan / 4;
2104 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2105 &ctx->ac, ctx->locals + idx + chan, count,
2106 stride, true, true);
2107
2108 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2109 tmp_vec,
2110 indir_index, "");
2111 } else {
2112 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2113 }
2114 }
2115 break;
2116 case nir_var_mem_shared: {
2117 LLVMValueRef address = get_src(ctx, instr->src[0]);
2118 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2119 return LLVMBuildBitCast(ctx->ac.builder, val,
2120 get_def_type(ctx, &instr->dest.ssa),
2121 "");
2122 }
2123 case nir_var_shader_out:
2124 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2125 return load_tess_varyings(ctx, instr, false);
2126 }
2127
2128 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2129 var->data.fb_fetch_output &&
2130 ctx->abi->emit_fbfetch)
2131 return ctx->abi->emit_fbfetch(ctx->abi);
2132
2133 for (unsigned chan = comp; chan < ve + comp; chan++) {
2134 if (indir_index) {
2135 unsigned count = glsl_count_attribute_slots(
2136 var->type, false);
2137 count -= chan / 4;
2138 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2139 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2140 stride, true, true);
2141
2142 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2143 tmp_vec,
2144 indir_index, "");
2145 } else {
2146 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2147 ctx->abi->outputs[idx + chan + const_index * stride],
2148 "");
2149 }
2150 }
2151 break;
2152 case nir_var_mem_global: {
2153 LLVMValueRef address = get_src(ctx, instr->src[0]);
2154 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2155 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2156 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2157
2158 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2159 if (stride != natural_stride) {
2160 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2161 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2162 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2163
2164 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2165 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2166 values[i] = LLVMBuildLoad(ctx->ac.builder,
2167 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2168 }
2169 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2170 } else {
2171 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2172 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2173 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2174 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2175 return val;
2176 }
2177 }
2178 default:
2179 unreachable("unhandle variable mode");
2180 }
2181 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2182 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2183 }
2184
2185 static void
2186 visit_store_var(struct ac_nir_context *ctx,
2187 nir_intrinsic_instr *instr)
2188 {
2189 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2190 nir_variable *var = nir_deref_instr_get_variable(deref);
2191
2192 LLVMValueRef temp_ptr, value;
2193 int idx = 0;
2194 unsigned comp = 0;
2195 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2196 int writemask = instr->const_index[0];
2197 LLVMValueRef indir_index;
2198 unsigned const_index;
2199
2200 if (var) {
2201 get_deref_offset(ctx, deref, false,
2202 NULL, NULL, &const_index, &indir_index);
2203 idx = var->data.driver_location;
2204 comp = var->data.location_frac;
2205
2206 if (var->data.compact) {
2207 const_index += comp;
2208 comp = 0;
2209 }
2210 }
2211
2212 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2213 (deref->mode == nir_var_shader_out ||
2214 deref->mode == nir_var_function_temp)) {
2215
2216 src = LLVMBuildBitCast(ctx->ac.builder, src,
2217 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2218 "");
2219
2220 writemask = widen_mask(writemask, 2);
2221 }
2222
2223 writemask = writemask << comp;
2224
2225 switch (deref->mode) {
2226 case nir_var_shader_out:
2227
2228 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2229 LLVMValueRef vertex_index = NULL;
2230 LLVMValueRef indir_index = NULL;
2231 unsigned const_index = 0;
2232 const bool is_patch = var->data.patch;
2233
2234 get_deref_offset(ctx, deref, false, NULL,
2235 is_patch ? NULL : &vertex_index,
2236 &const_index, &indir_index);
2237
2238 ctx->abi->store_tcs_outputs(ctx->abi, var,
2239 vertex_index, indir_index,
2240 const_index, src, writemask);
2241 return;
2242 }
2243
2244 for (unsigned chan = 0; chan < 8; chan++) {
2245 int stride = 4;
2246 if (!(writemask & (1 << chan)))
2247 continue;
2248
2249 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2250
2251 if (var->data.compact)
2252 stride = 1;
2253 if (indir_index) {
2254 unsigned count = glsl_count_attribute_slots(
2255 var->type, false);
2256 count -= chan / 4;
2257 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2258 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2259 stride, true, true);
2260
2261 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2262 value, indir_index, "");
2263 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2264 count, stride, tmp_vec);
2265
2266 } else {
2267 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2268
2269 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2270 }
2271 }
2272 break;
2273 case nir_var_function_temp:
2274 for (unsigned chan = 0; chan < 8; chan++) {
2275 if (!(writemask & (1 << chan)))
2276 continue;
2277
2278 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2279 if (indir_index) {
2280 unsigned count = glsl_count_attribute_slots(
2281 var->type, false);
2282 count -= chan / 4;
2283 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2284 &ctx->ac, ctx->locals + idx + chan, count,
2285 4, true, true);
2286
2287 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2288 value, indir_index, "");
2289 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2290 count, 4, tmp_vec);
2291 } else {
2292 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2293
2294 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2295 }
2296 }
2297 break;
2298
2299 case nir_var_mem_global:
2300 case nir_var_mem_shared: {
2301 int writemask = instr->const_index[0];
2302 LLVMValueRef address = get_src(ctx, instr->src[0]);
2303 LLVMValueRef val = get_src(ctx, instr->src[1]);
2304
2305 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2306 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2307 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2308
2309 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2310 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2311 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2312
2313 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2314 stride == natural_stride) {
2315 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2316 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2317 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2318
2319 val = LLVMBuildBitCast(ctx->ac.builder, val,
2320 LLVMGetElementType(LLVMTypeOf(address)), "");
2321 LLVMBuildStore(ctx->ac.builder, val, address);
2322 } else {
2323 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2324 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2325 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2326 for (unsigned chan = 0; chan < 4; chan++) {
2327 if (!(writemask & (1 << chan)))
2328 continue;
2329
2330 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2331
2332 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2333 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2334 chan);
2335 src = LLVMBuildBitCast(ctx->ac.builder, src,
2336 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2337 LLVMBuildStore(ctx->ac.builder, src, ptr);
2338 }
2339 }
2340 break;
2341 }
2342 default:
2343 abort();
2344 break;
2345 }
2346 }
2347
2348 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2349 {
2350 switch (dim) {
2351 case GLSL_SAMPLER_DIM_BUF:
2352 return 1;
2353 case GLSL_SAMPLER_DIM_1D:
2354 return array ? 2 : 1;
2355 case GLSL_SAMPLER_DIM_2D:
2356 return array ? 3 : 2;
2357 case GLSL_SAMPLER_DIM_MS:
2358 return array ? 4 : 3;
2359 case GLSL_SAMPLER_DIM_3D:
2360 case GLSL_SAMPLER_DIM_CUBE:
2361 return 3;
2362 case GLSL_SAMPLER_DIM_RECT:
2363 case GLSL_SAMPLER_DIM_SUBPASS:
2364 return 2;
2365 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2366 return 3;
2367 default:
2368 break;
2369 }
2370 return 0;
2371 }
2372
2373 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2374 LLVMValueRef coord_x, LLVMValueRef coord_y,
2375 LLVMValueRef coord_z,
2376 LLVMValueRef sample_index,
2377 LLVMValueRef fmask_desc_ptr)
2378 {
2379 unsigned sample_chan = coord_z ? 3 : 2;
2380 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2381 addr[sample_chan] = sample_index;
2382
2383 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2384 return addr[sample_chan];
2385 }
2386
2387 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2388 {
2389 assert(instr->src[0].is_ssa);
2390 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2391 }
2392
2393 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2394 const nir_intrinsic_instr *instr,
2395 enum ac_descriptor_type desc_type,
2396 bool write)
2397 {
2398 nir_deref_instr *deref_instr =
2399 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2400 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2401
2402 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2403 }
2404
2405 static void get_image_coords(struct ac_nir_context *ctx,
2406 const nir_intrinsic_instr *instr,
2407 struct ac_image_args *args,
2408 enum glsl_sampler_dim dim,
2409 bool is_array)
2410 {
2411 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2412 LLVMValueRef masks[] = {
2413 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2414 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2415 };
2416 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2417
2418 int count;
2419 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2420 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2421 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2422 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2423 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2424 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2425 count = image_type_to_components_count(dim, is_array);
2426
2427 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2428 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2429 LLVMValueRef fmask_load_address[3];
2430
2431 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2432 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2433 if (is_array)
2434 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2435 else
2436 fmask_load_address[2] = NULL;
2437
2438 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2439 fmask_load_address[0],
2440 fmask_load_address[1],
2441 fmask_load_address[2],
2442 sample_index,
2443 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2444 AC_DESC_FMASK, &instr->instr, true, false));
2445 }
2446 if (count == 1 && !gfx9_1d) {
2447 if (instr->src[1].ssa->num_components)
2448 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2449 else
2450 args->coords[0] = src0;
2451 } else {
2452 int chan;
2453 if (is_ms)
2454 count--;
2455 for (chan = 0; chan < count; ++chan) {
2456 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2457 }
2458
2459 if (gfx9_1d) {
2460 if (is_array) {
2461 args->coords[2] = args->coords[1];
2462 args->coords[1] = ctx->ac.i32_0;
2463 } else
2464 args->coords[1] = ctx->ac.i32_0;
2465 count++;
2466 }
2467
2468 if (is_ms) {
2469 args->coords[count] = sample_index;
2470 count++;
2471 }
2472 }
2473 }
2474
2475 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2476 const nir_intrinsic_instr *instr,
2477 bool write, bool atomic)
2478 {
2479 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2480 if (ctx->abi->gfx9_stride_size_workaround ||
2481 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2482 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2483 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2484 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2485
2486 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2487 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2488 elem_count, stride, "");
2489
2490 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2491 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2492 }
2493 return rsrc;
2494 }
2495
2496 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2497 const nir_intrinsic_instr *instr,
2498 bool bindless)
2499 {
2500 LLVMValueRef res;
2501
2502 enum glsl_sampler_dim dim;
2503 enum gl_access_qualifier access;
2504 bool is_array;
2505 if (bindless) {
2506 dim = nir_intrinsic_image_dim(instr);
2507 access = nir_intrinsic_access(instr);
2508 is_array = nir_intrinsic_image_array(instr);
2509 } else {
2510 const nir_deref_instr *image_deref = get_image_deref(instr);
2511 const struct glsl_type *type = image_deref->type;
2512 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2513 dim = glsl_get_sampler_dim(type);
2514 access = var->data.image.access;
2515 is_array = glsl_sampler_type_is_array(type);
2516 }
2517
2518 struct ac_image_args args = {};
2519
2520 args.cache_policy = get_cache_policy(ctx, access, false, false);
2521
2522 if (dim == GLSL_SAMPLER_DIM_BUF) {
2523 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2524 unsigned num_channels = util_last_bit(mask);
2525 LLVMValueRef rsrc, vindex;
2526
2527 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2528 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2529 ctx->ac.i32_0, "");
2530
2531 bool can_speculate = access & ACCESS_CAN_REORDER;
2532 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2533 ctx->ac.i32_0, num_channels,
2534 args.cache_policy,
2535 can_speculate);
2536 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2537
2538 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2539 res = ac_to_integer(&ctx->ac, res);
2540 } else {
2541 args.opcode = ac_image_load;
2542 get_image_coords(ctx, instr, &args, dim, is_array);
2543 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2544 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2545 args.dmask = 15;
2546 args.attributes = AC_FUNC_ATTR_READONLY;
2547
2548 res = ac_build_image_opcode(&ctx->ac, &args);
2549 }
2550 return res;
2551 }
2552
2553 static void visit_image_store(struct ac_nir_context *ctx,
2554 nir_intrinsic_instr *instr,
2555 bool bindless)
2556 {
2557
2558
2559 enum glsl_sampler_dim dim;
2560 enum gl_access_qualifier access;
2561 bool is_array;
2562 if (bindless) {
2563 dim = nir_intrinsic_image_dim(instr);
2564 access = nir_intrinsic_access(instr);
2565 is_array = nir_intrinsic_image_array(instr);
2566 } else {
2567 const nir_deref_instr *image_deref = get_image_deref(instr);
2568 const struct glsl_type *type = image_deref->type;
2569 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2570 dim = glsl_get_sampler_dim(type);
2571 access = var->data.image.access;
2572 is_array = glsl_sampler_type_is_array(type);
2573 }
2574
2575 bool writeonly_memory = access & ACCESS_NON_READABLE;
2576 struct ac_image_args args = {};
2577
2578 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2579
2580 if (dim == GLSL_SAMPLER_DIM_BUF) {
2581 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2582 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2583 unsigned src_channels = ac_get_llvm_num_components(src);
2584 LLVMValueRef vindex;
2585
2586 if (src_channels == 3)
2587 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2588
2589 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2590 get_src(ctx, instr->src[1]),
2591 ctx->ac.i32_0, "");
2592
2593 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2594 ctx->ac.i32_0, src_channels,
2595 args.cache_policy);
2596 } else {
2597 args.opcode = ac_image_store;
2598 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2599 get_image_coords(ctx, instr, &args, dim, is_array);
2600 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2601 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2602 args.dmask = 15;
2603
2604 ac_build_image_opcode(&ctx->ac, &args);
2605 }
2606
2607 }
2608
2609 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2610 const nir_intrinsic_instr *instr,
2611 bool bindless)
2612 {
2613 LLVMValueRef params[7];
2614 int param_count = 0;
2615
2616 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2617 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2618 const char *atomic_name;
2619 char intrinsic_name[64];
2620 enum ac_atomic_op atomic_subop;
2621 ASSERTED int length;
2622
2623 enum glsl_sampler_dim dim;
2624 bool is_unsigned = false;
2625 bool is_array;
2626 if (bindless) {
2627 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2628 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2629 const GLenum format = nir_intrinsic_format(instr);
2630 assert(format == GL_R32UI || format == GL_R32I);
2631 is_unsigned = format == GL_R32UI;
2632 }
2633 dim = nir_intrinsic_image_dim(instr);
2634 is_array = nir_intrinsic_image_array(instr);
2635 } else {
2636 const struct glsl_type *type = get_image_deref(instr)->type;
2637 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2638 dim = glsl_get_sampler_dim(type);
2639 is_array = glsl_sampler_type_is_array(type);
2640 }
2641
2642 switch (instr->intrinsic) {
2643 case nir_intrinsic_bindless_image_atomic_add:
2644 case nir_intrinsic_image_deref_atomic_add:
2645 atomic_name = "add";
2646 atomic_subop = ac_atomic_add;
2647 break;
2648 case nir_intrinsic_bindless_image_atomic_min:
2649 case nir_intrinsic_image_deref_atomic_min:
2650 atomic_name = is_unsigned ? "umin" : "smin";
2651 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2652 break;
2653 case nir_intrinsic_bindless_image_atomic_max:
2654 case nir_intrinsic_image_deref_atomic_max:
2655 atomic_name = is_unsigned ? "umax" : "smax";
2656 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2657 break;
2658 case nir_intrinsic_bindless_image_atomic_and:
2659 case nir_intrinsic_image_deref_atomic_and:
2660 atomic_name = "and";
2661 atomic_subop = ac_atomic_and;
2662 break;
2663 case nir_intrinsic_bindless_image_atomic_or:
2664 case nir_intrinsic_image_deref_atomic_or:
2665 atomic_name = "or";
2666 atomic_subop = ac_atomic_or;
2667 break;
2668 case nir_intrinsic_bindless_image_atomic_xor:
2669 case nir_intrinsic_image_deref_atomic_xor:
2670 atomic_name = "xor";
2671 atomic_subop = ac_atomic_xor;
2672 break;
2673 case nir_intrinsic_bindless_image_atomic_exchange:
2674 case nir_intrinsic_image_deref_atomic_exchange:
2675 atomic_name = "swap";
2676 atomic_subop = ac_atomic_swap;
2677 break;
2678 case nir_intrinsic_bindless_image_atomic_comp_swap:
2679 case nir_intrinsic_image_deref_atomic_comp_swap:
2680 atomic_name = "cmpswap";
2681 atomic_subop = 0; /* not used */
2682 break;
2683 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2684 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2685 atomic_name = "inc";
2686 atomic_subop = ac_atomic_inc_wrap;
2687 /* ATOMIC_INC instruction does:
2688 * value = (value + 1) % (data + 1)
2689 * but we want:
2690 * value = (value + 1) % data
2691 * So replace 'data' by 'data - 1'.
2692 */
2693 ctx->ssa_defs[instr->src[3].ssa->index] =
2694 LLVMBuildSub(ctx->ac.builder,
2695 ctx->ssa_defs[instr->src[3].ssa->index],
2696 ctx->ac.i32_1, "");
2697 break;
2698 }
2699 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2700 case nir_intrinsic_image_deref_atomic_dec_wrap:
2701 atomic_name = "dec";
2702 atomic_subop = ac_atomic_dec_wrap;
2703 break;
2704 default:
2705 abort();
2706 }
2707
2708 if (cmpswap)
2709 params[param_count++] = get_src(ctx, instr->src[4]);
2710 params[param_count++] = get_src(ctx, instr->src[3]);
2711
2712 if (dim == GLSL_SAMPLER_DIM_BUF) {
2713 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2714 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2715 ctx->ac.i32_0, ""); /* vindex */
2716 params[param_count++] = ctx->ac.i32_0; /* voffset */
2717 if (HAVE_LLVM >= 0x900) {
2718 /* XXX: The new raw/struct atomic intrinsics are buggy
2719 * with LLVM 8, see r358579.
2720 */
2721 params[param_count++] = ctx->ac.i32_0; /* soffset */
2722 params[param_count++] = ctx->ac.i32_0; /* slc */
2723
2724 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2725 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2726 } else {
2727 params[param_count++] = ctx->ac.i1false; /* slc */
2728
2729 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2730 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2731 }
2732
2733 assert(length < sizeof(intrinsic_name));
2734 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2735 params, param_count, 0);
2736 } else {
2737 struct ac_image_args args = {};
2738 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2739 args.atomic = atomic_subop;
2740 args.data[0] = params[0];
2741 if (cmpswap)
2742 args.data[1] = params[1];
2743 get_image_coords(ctx, instr, &args, dim, is_array);
2744 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2745 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2746
2747 return ac_build_image_opcode(&ctx->ac, &args);
2748 }
2749 }
2750
2751 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2752 const nir_intrinsic_instr *instr,
2753 bool bindless)
2754 {
2755 enum glsl_sampler_dim dim;
2756 bool is_array;
2757 if (bindless) {
2758 dim = nir_intrinsic_image_dim(instr);
2759 is_array = nir_intrinsic_image_array(instr);
2760 } else {
2761 const struct glsl_type *type = get_image_deref(instr)->type;
2762 dim = glsl_get_sampler_dim(type);
2763 is_array = glsl_sampler_type_is_array(type);
2764 }
2765
2766 struct ac_image_args args = { 0 };
2767 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2768 args.dmask = 0xf;
2769 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2770 args.opcode = ac_image_get_resinfo;
2771 args.lod = ctx->ac.i32_0;
2772 args.attributes = AC_FUNC_ATTR_READNONE;
2773
2774 return ac_build_image_opcode(&ctx->ac, &args);
2775 }
2776
2777 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2778 const nir_intrinsic_instr *instr,
2779 bool bindless)
2780 {
2781 LLVMValueRef res;
2782
2783 enum glsl_sampler_dim dim;
2784 bool is_array;
2785 if (bindless) {
2786 dim = nir_intrinsic_image_dim(instr);
2787 is_array = nir_intrinsic_image_array(instr);
2788 } else {
2789 const struct glsl_type *type = get_image_deref(instr)->type;
2790 dim = glsl_get_sampler_dim(type);
2791 is_array = glsl_sampler_type_is_array(type);
2792 }
2793
2794 if (dim == GLSL_SAMPLER_DIM_BUF)
2795 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2796
2797 struct ac_image_args args = { 0 };
2798
2799 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2800 args.dmask = 0xf;
2801 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2802 args.opcode = ac_image_get_resinfo;
2803 args.lod = ctx->ac.i32_0;
2804 args.attributes = AC_FUNC_ATTR_READNONE;
2805
2806 res = ac_build_image_opcode(&ctx->ac, &args);
2807
2808 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2809
2810 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2811 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2812 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2813 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2814 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2815 }
2816 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2817 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2818 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2819 ctx->ac.i32_1, "");
2820
2821 }
2822 return res;
2823 }
2824
2825 static void emit_membar(struct ac_llvm_context *ac,
2826 const nir_intrinsic_instr *instr)
2827 {
2828 unsigned wait_flags = 0;
2829
2830 switch (instr->intrinsic) {
2831 case nir_intrinsic_memory_barrier:
2832 case nir_intrinsic_group_memory_barrier:
2833 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2834 break;
2835 case nir_intrinsic_memory_barrier_atomic_counter:
2836 case nir_intrinsic_memory_barrier_buffer:
2837 case nir_intrinsic_memory_barrier_image:
2838 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2839 break;
2840 case nir_intrinsic_memory_barrier_shared:
2841 wait_flags = AC_WAIT_LGKM;
2842 break;
2843 default:
2844 break;
2845 }
2846
2847 ac_build_waitcnt(ac, wait_flags);
2848 }
2849
2850 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2851 {
2852 /* GFX6 only (thanks to a hw bug workaround):
2853 * The real barrier instruction isn’t needed, because an entire patch
2854 * always fits into a single wave.
2855 */
2856 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2857 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2858 return;
2859 }
2860 ac_build_s_barrier(ac);
2861 }
2862
2863 static void emit_discard(struct ac_nir_context *ctx,
2864 const nir_intrinsic_instr *instr)
2865 {
2866 LLVMValueRef cond;
2867
2868 if (instr->intrinsic == nir_intrinsic_discard_if) {
2869 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2870 get_src(ctx, instr->src[0]),
2871 ctx->ac.i32_0, "");
2872 } else {
2873 assert(instr->intrinsic == nir_intrinsic_discard);
2874 cond = ctx->ac.i1false;
2875 }
2876
2877 ctx->abi->emit_kill(ctx->abi, cond);
2878 }
2879
2880 static LLVMValueRef
2881 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2882 {
2883 LLVMValueRef result;
2884 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2885 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2886 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2887
2888 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2889 }
2890
2891 static LLVMValueRef
2892 visit_load_subgroup_id(struct ac_nir_context *ctx)
2893 {
2894 if (ctx->stage == MESA_SHADER_COMPUTE) {
2895 LLVMValueRef result;
2896 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2897 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2898 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2899 } else {
2900 return LLVMConstInt(ctx->ac.i32, 0, false);
2901 }
2902 }
2903
2904 static LLVMValueRef
2905 visit_load_num_subgroups(struct ac_nir_context *ctx)
2906 {
2907 if (ctx->stage == MESA_SHADER_COMPUTE) {
2908 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2909 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2910 } else {
2911 return LLVMConstInt(ctx->ac.i32, 1, false);
2912 }
2913 }
2914
2915 static LLVMValueRef
2916 visit_first_invocation(struct ac_nir_context *ctx)
2917 {
2918 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2919 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2920
2921 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2922 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2923 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2924 ctx->ac.iN_wavemask, args, 2,
2925 AC_FUNC_ATTR_NOUNWIND |
2926 AC_FUNC_ATTR_READNONE);
2927
2928 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2929 }
2930
2931 static LLVMValueRef
2932 visit_load_shared(struct ac_nir_context *ctx,
2933 const nir_intrinsic_instr *instr)
2934 {
2935 LLVMValueRef values[4], derived_ptr, index, ret;
2936
2937 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2938
2939 for (int chan = 0; chan < instr->num_components; chan++) {
2940 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2941 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2942 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2943 }
2944
2945 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2946 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2947 }
2948
2949 static void
2950 visit_store_shared(struct ac_nir_context *ctx,
2951 const nir_intrinsic_instr *instr)
2952 {
2953 LLVMValueRef derived_ptr, data,index;
2954 LLVMBuilderRef builder = ctx->ac.builder;
2955
2956 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2957 LLVMValueRef src = get_src(ctx, instr->src[0]);
2958
2959 int writemask = nir_intrinsic_write_mask(instr);
2960 for (int chan = 0; chan < 4; chan++) {
2961 if (!(writemask & (1 << chan))) {
2962 continue;
2963 }
2964 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2965 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2966 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2967 LLVMBuildStore(builder, data, derived_ptr);
2968 }
2969 }
2970
2971 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2972 const nir_intrinsic_instr *instr,
2973 LLVMValueRef ptr, int src_idx)
2974 {
2975 LLVMValueRef result;
2976 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2977
2978 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2979
2980 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2981 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2982 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2983 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2984 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2985 } else {
2986 LLVMAtomicRMWBinOp op;
2987 switch (instr->intrinsic) {
2988 case nir_intrinsic_shared_atomic_add:
2989 case nir_intrinsic_deref_atomic_add:
2990 op = LLVMAtomicRMWBinOpAdd;
2991 break;
2992 case nir_intrinsic_shared_atomic_umin:
2993 case nir_intrinsic_deref_atomic_umin:
2994 op = LLVMAtomicRMWBinOpUMin;
2995 break;
2996 case nir_intrinsic_shared_atomic_umax:
2997 case nir_intrinsic_deref_atomic_umax:
2998 op = LLVMAtomicRMWBinOpUMax;
2999 break;
3000 case nir_intrinsic_shared_atomic_imin:
3001 case nir_intrinsic_deref_atomic_imin:
3002 op = LLVMAtomicRMWBinOpMin;
3003 break;
3004 case nir_intrinsic_shared_atomic_imax:
3005 case nir_intrinsic_deref_atomic_imax:
3006 op = LLVMAtomicRMWBinOpMax;
3007 break;
3008 case nir_intrinsic_shared_atomic_and:
3009 case nir_intrinsic_deref_atomic_and:
3010 op = LLVMAtomicRMWBinOpAnd;
3011 break;
3012 case nir_intrinsic_shared_atomic_or:
3013 case nir_intrinsic_deref_atomic_or:
3014 op = LLVMAtomicRMWBinOpOr;
3015 break;
3016 case nir_intrinsic_shared_atomic_xor:
3017 case nir_intrinsic_deref_atomic_xor:
3018 op = LLVMAtomicRMWBinOpXor;
3019 break;
3020 case nir_intrinsic_shared_atomic_exchange:
3021 case nir_intrinsic_deref_atomic_exchange:
3022 op = LLVMAtomicRMWBinOpXchg;
3023 break;
3024 default:
3025 return NULL;
3026 }
3027
3028 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3029 }
3030 return result;
3031 }
3032
3033 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3034 {
3035 LLVMValueRef values[2];
3036 LLVMValueRef pos[2];
3037
3038 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3039 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3040
3041 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3042 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3043 return ac_build_gather_values(&ctx->ac, values, 2);
3044 }
3045
3046 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3047 unsigned mode)
3048 {
3049 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
3050 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3051 }
3052
3053 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3054 unsigned mode,
3055 LLVMValueRef offset)
3056 {
3057 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTER);
3058 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3059 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3060
3061 LLVMValueRef ij_out[2];
3062 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3063
3064 /*
3065 * take the I then J parameters, and the DDX/Y for it, and
3066 * calculate the IJ inputs for the interpolator.
3067 * temp1 = ddx * offset/sample.x + I;
3068 * interp_param.I = ddy * offset/sample.y + temp1;
3069 * temp1 = ddx * offset/sample.x + J;
3070 * interp_param.J = ddy * offset/sample.y + temp1;
3071 */
3072 for (unsigned i = 0; i < 2; i++) {
3073 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3074 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3075 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3076 ddxy_out, ix_ll, "");
3077 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3078 ddxy_out, iy_ll, "");
3079 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3080 interp_param, ix_ll, "");
3081 LLVMValueRef temp1, temp2;
3082
3083 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3084 ctx->ac.f32, "");
3085
3086 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3087 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3088
3089 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3090 temp2, ctx->ac.i32, "");
3091 }
3092 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3093 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3094 }
3095
3096 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3097 unsigned mode)
3098 {
3099 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_CENTROID);
3100 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3101 }
3102
3103 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3104 unsigned mode,
3105 LLVMValueRef sample_id)
3106 {
3107 if (ctx->abi->interp_at_sample_force_center)
3108 return barycentric_center(ctx, mode);
3109
3110 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3111
3112 /* fetch sample ID */
3113 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3114
3115 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3116 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3117 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3118 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3119 LLVMValueRef coords[] = { src_c0, src_c1 };
3120 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3121
3122 return barycentric_offset(ctx, mode, offset);
3123 }
3124
3125
3126 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3127 unsigned mode)
3128 {
3129 LLVMValueRef interp_param = ctx->abi->lookup_interp_param(ctx->abi, mode, INTERP_SAMPLE);
3130 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3131 }
3132
3133 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3134 LLVMValueRef interp_param,
3135 unsigned index, unsigned comp_start,
3136 unsigned num_components,
3137 unsigned bitsize)
3138 {
3139 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3140
3141 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3142 interp_param, ctx->ac.v2f32, "");
3143 LLVMValueRef i = LLVMBuildExtractElement(
3144 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3145 LLVMValueRef j = LLVMBuildExtractElement(
3146 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3147
3148 LLVMValueRef values[4];
3149 assert(bitsize == 16 || bitsize == 32);
3150 for (unsigned comp = 0; comp < num_components; comp++) {
3151 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3152 if (bitsize == 16) {
3153 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3154 ctx->abi->prim_mask, i, j);
3155 } else {
3156 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3157 ctx->abi->prim_mask, i, j);
3158 }
3159 }
3160
3161 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3162 }
3163
3164 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3165 unsigned index, unsigned comp_start,
3166 unsigned num_components,
3167 unsigned bit_size)
3168 {
3169 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3170
3171 LLVMValueRef values[8];
3172
3173 /* Each component of a 64-bit value takes up two GL-level channels. */
3174 unsigned channels =
3175 bit_size == 64 ? num_components * 2 : num_components;
3176
3177 for (unsigned chan = 0; chan < channels; chan++) {
3178 if (comp_start + chan > 4)
3179 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3180 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3181 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3182 LLVMConstInt(ctx->ac.i32, 2, false),
3183 llvm_chan,
3184 attr_number,
3185 ctx->abi->prim_mask);
3186 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3187 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3188 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3189 }
3190
3191 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3192 if (bit_size == 64) {
3193 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3194 LLVMVectorType(ctx->ac.i64, num_components);
3195 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3196 }
3197 return result;
3198 }
3199
3200 static void visit_intrinsic(struct ac_nir_context *ctx,
3201 nir_intrinsic_instr *instr)
3202 {
3203 LLVMValueRef result = NULL;
3204
3205 switch (instr->intrinsic) {
3206 case nir_intrinsic_ballot:
3207 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3208 break;
3209 case nir_intrinsic_read_invocation:
3210 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3211 get_src(ctx, instr->src[1]));
3212 break;
3213 case nir_intrinsic_read_first_invocation:
3214 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3215 break;
3216 case nir_intrinsic_load_subgroup_invocation:
3217 result = ac_get_thread_id(&ctx->ac);
3218 break;
3219 case nir_intrinsic_load_work_group_id: {
3220 LLVMValueRef values[3];
3221
3222 for (int i = 0; i < 3; i++) {
3223 values[i] = ctx->abi->workgroup_ids[i] ?
3224 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3225 }
3226
3227 result = ac_build_gather_values(&ctx->ac, values, 3);
3228 break;
3229 }
3230 case nir_intrinsic_load_base_vertex:
3231 case nir_intrinsic_load_first_vertex:
3232 result = ctx->abi->load_base_vertex(ctx->abi);
3233 break;
3234 case nir_intrinsic_load_local_group_size:
3235 result = ctx->abi->load_local_group_size(ctx->abi);
3236 break;
3237 case nir_intrinsic_load_vertex_id:
3238 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3239 ctx->abi->base_vertex, "");
3240 break;
3241 case nir_intrinsic_load_vertex_id_zero_base: {
3242 result = ctx->abi->vertex_id;
3243 break;
3244 }
3245 case nir_intrinsic_load_local_invocation_id: {
3246 result = ctx->abi->local_invocation_ids;
3247 break;
3248 }
3249 case nir_intrinsic_load_base_instance:
3250 result = ctx->abi->start_instance;
3251 break;
3252 case nir_intrinsic_load_draw_id:
3253 result = ctx->abi->draw_id;
3254 break;
3255 case nir_intrinsic_load_view_index:
3256 result = ctx->abi->view_index;
3257 break;
3258 case nir_intrinsic_load_invocation_id:
3259 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3260 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3261 } else {
3262 if (ctx->ac.chip_class >= GFX10) {
3263 result = LLVMBuildAnd(ctx->ac.builder,
3264 ctx->abi->gs_invocation_id,
3265 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3266 } else {
3267 result = ctx->abi->gs_invocation_id;
3268 }
3269 }
3270 break;
3271 case nir_intrinsic_load_primitive_id:
3272 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3273 result = ctx->abi->gs_prim_id;
3274 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3275 result = ctx->abi->tcs_patch_id;
3276 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3277 result = ctx->abi->tes_patch_id;
3278 } else
3279 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3280 break;
3281 case nir_intrinsic_load_sample_id:
3282 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3283 break;
3284 case nir_intrinsic_load_sample_pos:
3285 result = load_sample_pos(ctx);
3286 break;
3287 case nir_intrinsic_load_sample_mask_in:
3288 result = ctx->abi->load_sample_mask_in(ctx->abi);
3289 break;
3290 case nir_intrinsic_load_frag_coord: {
3291 LLVMValueRef values[4] = {
3292 ctx->abi->frag_pos[0],
3293 ctx->abi->frag_pos[1],
3294 ctx->abi->frag_pos[2],
3295 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3296 };
3297 result = ac_to_integer(&ctx->ac,
3298 ac_build_gather_values(&ctx->ac, values, 4));
3299 break;
3300 }
3301 case nir_intrinsic_load_layer_id:
3302 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3303 break;
3304 case nir_intrinsic_load_front_face:
3305 result = ctx->abi->front_face;
3306 break;
3307 case nir_intrinsic_load_helper_invocation:
3308 result = ac_build_load_helper_invocation(&ctx->ac);
3309 break;
3310 case nir_intrinsic_load_color0:
3311 result = ctx->abi->color0;
3312 break;
3313 case nir_intrinsic_load_color1:
3314 result = ctx->abi->color1;
3315 break;
3316 case nir_intrinsic_load_user_data_amd:
3317 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3318 result = ctx->abi->user_data;
3319 break;
3320 case nir_intrinsic_load_instance_id:
3321 result = ctx->abi->instance_id;
3322 break;
3323 case nir_intrinsic_load_num_work_groups:
3324 result = ctx->abi->num_work_groups;
3325 break;
3326 case nir_intrinsic_load_local_invocation_index:
3327 result = visit_load_local_invocation_index(ctx);
3328 break;
3329 case nir_intrinsic_load_subgroup_id:
3330 result = visit_load_subgroup_id(ctx);
3331 break;
3332 case nir_intrinsic_load_num_subgroups:
3333 result = visit_load_num_subgroups(ctx);
3334 break;
3335 case nir_intrinsic_first_invocation:
3336 result = visit_first_invocation(ctx);
3337 break;
3338 case nir_intrinsic_load_push_constant:
3339 result = visit_load_push_constant(ctx, instr);
3340 break;
3341 case nir_intrinsic_vulkan_resource_index: {
3342 LLVMValueRef index = get_src(ctx, instr->src[0]);
3343 unsigned desc_set = nir_intrinsic_desc_set(instr);
3344 unsigned binding = nir_intrinsic_binding(instr);
3345
3346 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3347 binding);
3348 break;
3349 }
3350 case nir_intrinsic_vulkan_resource_reindex:
3351 result = visit_vulkan_resource_reindex(ctx, instr);
3352 break;
3353 case nir_intrinsic_store_ssbo:
3354 visit_store_ssbo(ctx, instr);
3355 break;
3356 case nir_intrinsic_load_ssbo:
3357 result = visit_load_buffer(ctx, instr);
3358 break;
3359 case nir_intrinsic_ssbo_atomic_add:
3360 case nir_intrinsic_ssbo_atomic_imin:
3361 case nir_intrinsic_ssbo_atomic_umin:
3362 case nir_intrinsic_ssbo_atomic_imax:
3363 case nir_intrinsic_ssbo_atomic_umax:
3364 case nir_intrinsic_ssbo_atomic_and:
3365 case nir_intrinsic_ssbo_atomic_or:
3366 case nir_intrinsic_ssbo_atomic_xor:
3367 case nir_intrinsic_ssbo_atomic_exchange:
3368 case nir_intrinsic_ssbo_atomic_comp_swap:
3369 result = visit_atomic_ssbo(ctx, instr);
3370 break;
3371 case nir_intrinsic_load_ubo:
3372 result = visit_load_ubo_buffer(ctx, instr);
3373 break;
3374 case nir_intrinsic_get_buffer_size:
3375 result = visit_get_buffer_size(ctx, instr);
3376 break;
3377 case nir_intrinsic_load_deref:
3378 result = visit_load_var(ctx, instr);
3379 break;
3380 case nir_intrinsic_store_deref:
3381 visit_store_var(ctx, instr);
3382 break;
3383 case nir_intrinsic_load_shared:
3384 result = visit_load_shared(ctx, instr);
3385 break;
3386 case nir_intrinsic_store_shared:
3387 visit_store_shared(ctx, instr);
3388 break;
3389 case nir_intrinsic_bindless_image_samples:
3390 result = visit_image_samples(ctx, instr, true);
3391 break;
3392 case nir_intrinsic_image_deref_samples:
3393 result = visit_image_samples(ctx, instr, false);
3394 break;
3395 case nir_intrinsic_bindless_image_load:
3396 result = visit_image_load(ctx, instr, true);
3397 break;
3398 case nir_intrinsic_image_deref_load:
3399 result = visit_image_load(ctx, instr, false);
3400 break;
3401 case nir_intrinsic_bindless_image_store:
3402 visit_image_store(ctx, instr, true);
3403 break;
3404 case nir_intrinsic_image_deref_store:
3405 visit_image_store(ctx, instr, false);
3406 break;
3407 case nir_intrinsic_bindless_image_atomic_add:
3408 case nir_intrinsic_bindless_image_atomic_min:
3409 case nir_intrinsic_bindless_image_atomic_max:
3410 case nir_intrinsic_bindless_image_atomic_and:
3411 case nir_intrinsic_bindless_image_atomic_or:
3412 case nir_intrinsic_bindless_image_atomic_xor:
3413 case nir_intrinsic_bindless_image_atomic_exchange:
3414 case nir_intrinsic_bindless_image_atomic_comp_swap:
3415 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3416 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3417 result = visit_image_atomic(ctx, instr, true);
3418 break;
3419 case nir_intrinsic_image_deref_atomic_add:
3420 case nir_intrinsic_image_deref_atomic_min:
3421 case nir_intrinsic_image_deref_atomic_max:
3422 case nir_intrinsic_image_deref_atomic_and:
3423 case nir_intrinsic_image_deref_atomic_or:
3424 case nir_intrinsic_image_deref_atomic_xor:
3425 case nir_intrinsic_image_deref_atomic_exchange:
3426 case nir_intrinsic_image_deref_atomic_comp_swap:
3427 case nir_intrinsic_image_deref_atomic_inc_wrap:
3428 case nir_intrinsic_image_deref_atomic_dec_wrap:
3429 result = visit_image_atomic(ctx, instr, false);
3430 break;
3431 case nir_intrinsic_bindless_image_size:
3432 result = visit_image_size(ctx, instr, true);
3433 break;
3434 case nir_intrinsic_image_deref_size:
3435 result = visit_image_size(ctx, instr, false);
3436 break;
3437 case nir_intrinsic_shader_clock:
3438 result = ac_build_shader_clock(&ctx->ac);
3439 break;
3440 case nir_intrinsic_discard:
3441 case nir_intrinsic_discard_if:
3442 emit_discard(ctx, instr);
3443 break;
3444 case nir_intrinsic_memory_barrier:
3445 case nir_intrinsic_group_memory_barrier:
3446 case nir_intrinsic_memory_barrier_atomic_counter:
3447 case nir_intrinsic_memory_barrier_buffer:
3448 case nir_intrinsic_memory_barrier_image:
3449 case nir_intrinsic_memory_barrier_shared:
3450 emit_membar(&ctx->ac, instr);
3451 break;
3452 case nir_intrinsic_barrier:
3453 ac_emit_barrier(&ctx->ac, ctx->stage);
3454 break;
3455 case nir_intrinsic_shared_atomic_add:
3456 case nir_intrinsic_shared_atomic_imin:
3457 case nir_intrinsic_shared_atomic_umin:
3458 case nir_intrinsic_shared_atomic_imax:
3459 case nir_intrinsic_shared_atomic_umax:
3460 case nir_intrinsic_shared_atomic_and:
3461 case nir_intrinsic_shared_atomic_or:
3462 case nir_intrinsic_shared_atomic_xor:
3463 case nir_intrinsic_shared_atomic_exchange:
3464 case nir_intrinsic_shared_atomic_comp_swap: {
3465 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3466 result = visit_var_atomic(ctx, instr, ptr, 1);
3467 break;
3468 }
3469 case nir_intrinsic_deref_atomic_add:
3470 case nir_intrinsic_deref_atomic_imin:
3471 case nir_intrinsic_deref_atomic_umin:
3472 case nir_intrinsic_deref_atomic_imax:
3473 case nir_intrinsic_deref_atomic_umax:
3474 case nir_intrinsic_deref_atomic_and:
3475 case nir_intrinsic_deref_atomic_or:
3476 case nir_intrinsic_deref_atomic_xor:
3477 case nir_intrinsic_deref_atomic_exchange:
3478 case nir_intrinsic_deref_atomic_comp_swap: {
3479 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3480 result = visit_var_atomic(ctx, instr, ptr, 1);
3481 break;
3482 }
3483 case nir_intrinsic_load_barycentric_pixel:
3484 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3485 break;
3486 case nir_intrinsic_load_barycentric_centroid:
3487 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3488 break;
3489 case nir_intrinsic_load_barycentric_sample:
3490 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3491 break;
3492 case nir_intrinsic_load_barycentric_at_offset: {
3493 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3494 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3495 break;
3496 }
3497 case nir_intrinsic_load_barycentric_at_sample: {
3498 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3499 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3500 break;
3501 }
3502 case nir_intrinsic_load_interpolated_input: {
3503 /* We assume any indirect loads have been lowered away */
3504 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3505 assert(offset);
3506 assert(offset[0].i32 == 0);
3507
3508 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3509 unsigned index = nir_intrinsic_base(instr);
3510 unsigned component = nir_intrinsic_component(instr);
3511 result = load_interpolated_input(ctx, interp_param, index,
3512 component,
3513 instr->dest.ssa.num_components,
3514 instr->dest.ssa.bit_size);
3515 break;
3516 }
3517 case nir_intrinsic_load_input: {
3518 /* We only lower inputs for fragment shaders ATM */
3519 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3520 assert(offset);
3521 assert(offset[0].i32 == 0);
3522
3523 unsigned index = nir_intrinsic_base(instr);
3524 unsigned component = nir_intrinsic_component(instr);
3525 result = load_flat_input(ctx, index, component,
3526 instr->dest.ssa.num_components,
3527 instr->dest.ssa.bit_size);
3528 break;
3529 }
3530 case nir_intrinsic_emit_vertex:
3531 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3532 break;
3533 case nir_intrinsic_end_primitive:
3534 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3535 break;
3536 case nir_intrinsic_load_tess_coord:
3537 result = ctx->abi->load_tess_coord(ctx->abi);
3538 break;
3539 case nir_intrinsic_load_tess_level_outer:
3540 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3541 break;
3542 case nir_intrinsic_load_tess_level_inner:
3543 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3544 break;
3545 case nir_intrinsic_load_tess_level_outer_default:
3546 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3547 break;
3548 case nir_intrinsic_load_tess_level_inner_default:
3549 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3550 break;
3551 case nir_intrinsic_load_patch_vertices_in:
3552 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3553 break;
3554 case nir_intrinsic_vote_all: {
3555 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3556 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3557 break;
3558 }
3559 case nir_intrinsic_vote_any: {
3560 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3561 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3562 break;
3563 }
3564 case nir_intrinsic_shuffle:
3565 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3566 get_src(ctx, instr->src[1]));
3567 break;
3568 case nir_intrinsic_reduce:
3569 result = ac_build_reduce(&ctx->ac,
3570 get_src(ctx, instr->src[0]),
3571 instr->const_index[0],
3572 instr->const_index[1]);
3573 break;
3574 case nir_intrinsic_inclusive_scan:
3575 result = ac_build_inclusive_scan(&ctx->ac,
3576 get_src(ctx, instr->src[0]),
3577 instr->const_index[0]);
3578 break;
3579 case nir_intrinsic_exclusive_scan:
3580 result = ac_build_exclusive_scan(&ctx->ac,
3581 get_src(ctx, instr->src[0]),
3582 instr->const_index[0]);
3583 break;
3584 case nir_intrinsic_quad_broadcast: {
3585 unsigned lane = nir_src_as_uint(instr->src[1]);
3586 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3587 lane, lane, lane, lane);
3588 break;
3589 }
3590 case nir_intrinsic_quad_swap_horizontal:
3591 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3592 break;
3593 case nir_intrinsic_quad_swap_vertical:
3594 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3595 break;
3596 case nir_intrinsic_quad_swap_diagonal:
3597 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3598 break;
3599 case nir_intrinsic_quad_swizzle_amd: {
3600 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3601 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3602 mask & 0x3, (mask >> 2) & 0x3,
3603 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3604 break;
3605 }
3606 case nir_intrinsic_masked_swizzle_amd: {
3607 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3608 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3609 break;
3610 }
3611 case nir_intrinsic_write_invocation_amd:
3612 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3613 get_src(ctx, instr->src[1]),
3614 get_src(ctx, instr->src[2]));
3615 break;
3616 case nir_intrinsic_mbcnt_amd:
3617 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3618 break;
3619 case nir_intrinsic_load_scratch: {
3620 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3621 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3622 offset);
3623 LLVMTypeRef comp_type =
3624 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3625 LLVMTypeRef vec_type =
3626 instr->dest.ssa.num_components == 1 ? comp_type :
3627 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3628 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3629 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3630 LLVMPointerType(vec_type, addr_space), "");
3631 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3632 break;
3633 }
3634 case nir_intrinsic_store_scratch: {
3635 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3636 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3637 offset);
3638 LLVMTypeRef comp_type =
3639 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3640 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3641 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3642 LLVMPointerType(comp_type, addr_space), "");
3643 LLVMValueRef src = get_src(ctx, instr->src[0]);
3644 unsigned wrmask = nir_intrinsic_write_mask(instr);
3645 while (wrmask) {
3646 int start, count;
3647 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3648
3649 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3650 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3651 LLVMTypeRef vec_type =
3652 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3653 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3654 offset_ptr,
3655 LLVMPointerType(vec_type, addr_space),
3656 "");
3657 LLVMValueRef offset_src =
3658 ac_extract_components(&ctx->ac, src, start, count);
3659 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3660 }
3661 break;
3662 }
3663 default:
3664 fprintf(stderr, "Unknown intrinsic: ");
3665 nir_print_instr(&instr->instr, stderr);
3666 fprintf(stderr, "\n");
3667 break;
3668 }
3669 if (result) {
3670 ctx->ssa_defs[instr->dest.ssa.index] = result;
3671 }
3672 }
3673
3674 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3675 unsigned base_index,
3676 unsigned constant_index,
3677 LLVMValueRef dynamic_index)
3678 {
3679 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3680 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3681 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3682
3683 /* Bindless uniforms are 64bit so multiple index by 8 */
3684 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3685 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3686
3687 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3688
3689 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3690 NULL, 0, 0, true, true);
3691
3692 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3693 }
3694
3695 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3696 nir_deref_instr *deref_instr,
3697 enum ac_descriptor_type desc_type,
3698 const nir_instr *instr,
3699 bool image, bool write)
3700 {
3701 LLVMValueRef index = NULL;
3702 unsigned constant_index = 0;
3703 unsigned descriptor_set;
3704 unsigned base_index;
3705 bool bindless = false;
3706
3707 if (!deref_instr) {
3708 descriptor_set = 0;
3709 if (image) {
3710 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3711 base_index = 0;
3712 bindless = true;
3713 index = get_src(ctx, img_instr->src[0]);
3714 } else {
3715 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3716 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3717 nir_tex_src_sampler_handle);
3718 if (sampSrcIdx != -1) {
3719 base_index = 0;
3720 bindless = true;
3721 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3722 } else {
3723 assert(tex_instr && !image);
3724 base_index = tex_instr->sampler_index;
3725 }
3726 }
3727 } else {
3728 while(deref_instr->deref_type != nir_deref_type_var) {
3729 if (deref_instr->deref_type == nir_deref_type_array) {
3730 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3731 if (!array_size)
3732 array_size = 1;
3733
3734 if (nir_src_is_const(deref_instr->arr.index)) {
3735 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3736 } else {
3737 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3738
3739 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3740 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3741
3742 if (!index)
3743 index = indirect;
3744 else
3745 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3746 }
3747
3748 deref_instr = nir_src_as_deref(deref_instr->parent);
3749 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3750 unsigned sidx = deref_instr->strct.index;
3751 deref_instr = nir_src_as_deref(deref_instr->parent);
3752 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3753 } else {
3754 unreachable("Unsupported deref type");
3755 }
3756 }
3757 descriptor_set = deref_instr->var->data.descriptor_set;
3758
3759 if (deref_instr->var->data.bindless) {
3760 /* For now just assert on unhandled variable types */
3761 assert(deref_instr->var->data.mode == nir_var_uniform);
3762
3763 base_index = deref_instr->var->data.driver_location;
3764 bindless = true;
3765
3766 index = index ? index : ctx->ac.i32_0;
3767 index = get_bindless_index_from_uniform(ctx, base_index,
3768 constant_index, index);
3769 } else
3770 base_index = deref_instr->var->data.binding;
3771 }
3772
3773 return ctx->abi->load_sampler_desc(ctx->abi,
3774 descriptor_set,
3775 base_index,
3776 constant_index, index,
3777 desc_type, image, write, bindless);
3778 }
3779
3780 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3781 *
3782 * GFX6-GFX7:
3783 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3784 * filtering manually. The driver sets img7 to a mask clearing
3785 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3786 * s_and_b32 samp0, samp0, img7
3787 *
3788 * GFX8:
3789 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3790 */
3791 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3792 LLVMValueRef res, LLVMValueRef samp)
3793 {
3794 LLVMBuilderRef builder = ctx->ac.builder;
3795 LLVMValueRef img7, samp0;
3796
3797 if (ctx->ac.chip_class >= GFX8)
3798 return samp;
3799
3800 img7 = LLVMBuildExtractElement(builder, res,
3801 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3802 samp0 = LLVMBuildExtractElement(builder, samp,
3803 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3804 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3805 return LLVMBuildInsertElement(builder, samp, samp0,
3806 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3807 }
3808
3809 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3810 nir_tex_instr *instr,
3811 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3812 LLVMValueRef *fmask_ptr)
3813 {
3814 nir_deref_instr *texture_deref_instr = NULL;
3815 nir_deref_instr *sampler_deref_instr = NULL;
3816 int plane = -1;
3817
3818 for (unsigned i = 0; i < instr->num_srcs; i++) {
3819 switch (instr->src[i].src_type) {
3820 case nir_tex_src_texture_deref:
3821 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3822 break;
3823 case nir_tex_src_sampler_deref:
3824 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3825 break;
3826 case nir_tex_src_plane:
3827 plane = nir_src_as_int(instr->src[i].src);
3828 break;
3829 default:
3830 break;
3831 }
3832 }
3833
3834 if (!sampler_deref_instr)
3835 sampler_deref_instr = texture_deref_instr;
3836
3837 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3838
3839 if (plane >= 0) {
3840 assert(instr->op != nir_texop_txf_ms &&
3841 instr->op != nir_texop_samples_identical);
3842 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3843
3844 main_descriptor = AC_DESC_PLANE_0 + plane;
3845 }
3846
3847 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3848
3849 if (samp_ptr) {
3850 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3851 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3852 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3853 }
3854 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3855 instr->op == nir_texop_samples_identical))
3856 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3857 }
3858
3859 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3860 LLVMValueRef coord)
3861 {
3862 coord = ac_to_float(ctx, coord);
3863 coord = ac_build_round(ctx, coord);
3864 coord = ac_to_integer(ctx, coord);
3865 return coord;
3866 }
3867
3868 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3869 {
3870 LLVMValueRef result = NULL;
3871 struct ac_image_args args = { 0 };
3872 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3873 LLVMValueRef ddx = NULL, ddy = NULL;
3874 unsigned offset_src = 0;
3875
3876 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3877
3878 for (unsigned i = 0; i < instr->num_srcs; i++) {
3879 switch (instr->src[i].src_type) {
3880 case nir_tex_src_coord: {
3881 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3882 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3883 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3884 break;
3885 }
3886 case nir_tex_src_projector:
3887 break;
3888 case nir_tex_src_comparator:
3889 if (instr->is_shadow)
3890 args.compare = get_src(ctx, instr->src[i].src);
3891 break;
3892 case nir_tex_src_offset:
3893 args.offset = get_src(ctx, instr->src[i].src);
3894 offset_src = i;
3895 break;
3896 case nir_tex_src_bias:
3897 if (instr->op == nir_texop_txb)
3898 args.bias = get_src(ctx, instr->src[i].src);
3899 break;
3900 case nir_tex_src_lod: {
3901 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3902 args.level_zero = true;
3903 else
3904 args.lod = get_src(ctx, instr->src[i].src);
3905 break;
3906 }
3907 case nir_tex_src_ms_index:
3908 sample_index = get_src(ctx, instr->src[i].src);
3909 break;
3910 case nir_tex_src_ms_mcs:
3911 break;
3912 case nir_tex_src_ddx:
3913 ddx = get_src(ctx, instr->src[i].src);
3914 break;
3915 case nir_tex_src_ddy:
3916 ddy = get_src(ctx, instr->src[i].src);
3917 break;
3918 case nir_tex_src_texture_offset:
3919 case nir_tex_src_sampler_offset:
3920 case nir_tex_src_plane:
3921 default:
3922 break;
3923 }
3924 }
3925
3926 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3927 result = get_buffer_size(ctx, args.resource, true);
3928 goto write_result;
3929 }
3930
3931 if (instr->op == nir_texop_texture_samples) {
3932 LLVMValueRef res, samples, is_msaa;
3933 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3934 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3935 LLVMConstInt(ctx->ac.i32, 3, false), "");
3936 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3937 LLVMConstInt(ctx->ac.i32, 28, false), "");
3938 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3939 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3940 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3941 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3942
3943 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3944 LLVMConstInt(ctx->ac.i32, 16, false), "");
3945 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3946 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3947 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3948 samples, "");
3949 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3950 ctx->ac.i32_1, "");
3951 result = samples;
3952 goto write_result;
3953 }
3954
3955 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3956 LLVMValueRef offset[3], pack;
3957 for (unsigned chan = 0; chan < 3; ++chan)
3958 offset[chan] = ctx->ac.i32_0;
3959
3960 unsigned num_components = ac_get_llvm_num_components(args.offset);
3961 for (unsigned chan = 0; chan < num_components; chan++) {
3962 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3963 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3964 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3965 if (chan)
3966 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3967 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3968 }
3969 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3970 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3971 args.offset = pack;
3972 }
3973
3974 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3975 * so the depth comparison value isn't clamped for Z16 and
3976 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has an explicitly
3977 * clamped 32-bit float format.
3978 *
3979 * It's unnecessary if the original texture format was
3980 * Z32_FLOAT, but we don't know that here.
3981 */
3982 if (args.compare &&
3983 ctx->ac.chip_class >= GFX8 &&
3984 ctx->ac.chip_class <= GFX9 &&
3985 ctx->abi->clamp_shadow_reference)
3986 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3987
3988 /* pack derivatives */
3989 if (ddx || ddy) {
3990 int num_src_deriv_channels, num_dest_deriv_channels;
3991 switch (instr->sampler_dim) {
3992 case GLSL_SAMPLER_DIM_3D:
3993 case GLSL_SAMPLER_DIM_CUBE:
3994 num_src_deriv_channels = 3;
3995 num_dest_deriv_channels = 3;
3996 break;
3997 case GLSL_SAMPLER_DIM_2D:
3998 default:
3999 num_src_deriv_channels = 2;
4000 num_dest_deriv_channels = 2;
4001 break;
4002 case GLSL_SAMPLER_DIM_1D:
4003 num_src_deriv_channels = 1;
4004 if (ctx->ac.chip_class == GFX9) {
4005 num_dest_deriv_channels = 2;
4006 } else {
4007 num_dest_deriv_channels = 1;
4008 }
4009 break;
4010 }
4011
4012 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4013 args.derivs[i] = ac_to_float(&ctx->ac,
4014 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4015 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4016 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4017 }
4018 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4019 args.derivs[i] = ctx->ac.f32_0;
4020 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4021 }
4022 }
4023
4024 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4025 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4026 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4027 if (instr->coord_components == 3)
4028 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4029 ac_prepare_cube_coords(&ctx->ac,
4030 instr->op == nir_texop_txd, instr->is_array,
4031 instr->op == nir_texop_lod, args.coords, args.derivs);
4032 }
4033
4034 /* Texture coordinates fixups */
4035 if (instr->coord_components > 1 &&
4036 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4037 instr->is_array &&
4038 instr->op != nir_texop_txf) {
4039 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4040 }
4041
4042 if (instr->coord_components > 2 &&
4043 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4044 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4045 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4046 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4047 instr->is_array &&
4048 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4049 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4050 }
4051
4052 if (ctx->ac.chip_class == GFX9 &&
4053 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4054 instr->op != nir_texop_lod) {
4055 LLVMValueRef filler;
4056 if (instr->op == nir_texop_txf)
4057 filler = ctx->ac.i32_0;
4058 else
4059 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4060
4061 if (instr->is_array)
4062 args.coords[2] = args.coords[1];
4063 args.coords[1] = filler;
4064 }
4065
4066 /* Pack sample index */
4067 if (instr->op == nir_texop_txf_ms && sample_index)
4068 args.coords[instr->coord_components] = sample_index;
4069
4070 if (instr->op == nir_texop_samples_identical) {
4071 struct ac_image_args txf_args = { 0 };
4072 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4073
4074 txf_args.dmask = 0xf;
4075 txf_args.resource = fmask_ptr;
4076 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4077 result = build_tex_intrinsic(ctx, instr, &txf_args);
4078
4079 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4080 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4081 goto write_result;
4082 }
4083
4084 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4085 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4086 instr->op != nir_texop_txs) {
4087 unsigned sample_chan = instr->is_array ? 3 : 2;
4088 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4089 &ctx->ac, args.coords[0], args.coords[1],
4090 instr->is_array ? args.coords[2] : NULL,
4091 args.coords[sample_chan], fmask_ptr);
4092 }
4093
4094 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4095 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4096 num_offsets = MIN2(num_offsets, instr->coord_components);
4097 for (unsigned i = 0; i < num_offsets; ++i) {
4098 args.coords[i] = LLVMBuildAdd(
4099 ctx->ac.builder, args.coords[i],
4100 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4101 }
4102 args.offset = NULL;
4103 }
4104
4105 /* DMASK was repurposed for GATHER4. 4 components are always
4106 * returned and DMASK works like a swizzle - it selects
4107 * the component to fetch. The only valid DMASK values are
4108 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4109 * (red,red,red,red) etc.) The ISA document doesn't mention
4110 * this.
4111 */
4112 args.dmask = 0xf;
4113 if (instr->op == nir_texop_tg4) {
4114 if (instr->is_shadow)
4115 args.dmask = 1;
4116 else
4117 args.dmask = 1 << instr->component;
4118 }
4119
4120 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
4121 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
4122 result = build_tex_intrinsic(ctx, instr, &args);
4123
4124 if (instr->op == nir_texop_query_levels)
4125 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4126 else if (instr->is_shadow && instr->is_new_style_shadow &&
4127 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4128 instr->op != nir_texop_tg4)
4129 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4130 else if (instr->op == nir_texop_txs &&
4131 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4132 instr->is_array) {
4133 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4134 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4135 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4136 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4137 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4138 } else if (ctx->ac.chip_class == GFX9 &&
4139 instr->op == nir_texop_txs &&
4140 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4141 instr->is_array) {
4142 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4143 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4144 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4145 ctx->ac.i32_1, "");
4146 } else if (instr->dest.ssa.num_components != 4)
4147 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4148
4149 write_result:
4150 if (result) {
4151 assert(instr->dest.is_ssa);
4152 result = ac_to_integer(&ctx->ac, result);
4153 ctx->ssa_defs[instr->dest.ssa.index] = result;
4154 }
4155 }
4156
4157
4158 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4159 {
4160 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4161 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4162
4163 ctx->ssa_defs[instr->dest.ssa.index] = result;
4164 _mesa_hash_table_insert(ctx->phis, instr, result);
4165 }
4166
4167 static void visit_post_phi(struct ac_nir_context *ctx,
4168 nir_phi_instr *instr,
4169 LLVMValueRef llvm_phi)
4170 {
4171 nir_foreach_phi_src(src, instr) {
4172 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4173 LLVMValueRef llvm_src = get_src(ctx, src->src);
4174
4175 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4176 }
4177 }
4178
4179 static void phi_post_pass(struct ac_nir_context *ctx)
4180 {
4181 hash_table_foreach(ctx->phis, entry) {
4182 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4183 (LLVMValueRef)entry->data);
4184 }
4185 }
4186
4187
4188 static void visit_ssa_undef(struct ac_nir_context *ctx,
4189 const nir_ssa_undef_instr *instr)
4190 {
4191 unsigned num_components = instr->def.num_components;
4192 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4193 LLVMValueRef undef;
4194
4195 if (num_components == 1)
4196 undef = LLVMGetUndef(type);
4197 else {
4198 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4199 }
4200 ctx->ssa_defs[instr->def.index] = undef;
4201 }
4202
4203 static void visit_jump(struct ac_llvm_context *ctx,
4204 const nir_jump_instr *instr)
4205 {
4206 switch (instr->type) {
4207 case nir_jump_break:
4208 ac_build_break(ctx);
4209 break;
4210 case nir_jump_continue:
4211 ac_build_continue(ctx);
4212 break;
4213 default:
4214 fprintf(stderr, "Unknown NIR jump instr: ");
4215 nir_print_instr(&instr->instr, stderr);
4216 fprintf(stderr, "\n");
4217 abort();
4218 }
4219 }
4220
4221 static LLVMTypeRef
4222 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4223 enum glsl_base_type type)
4224 {
4225 switch (type) {
4226 case GLSL_TYPE_INT:
4227 case GLSL_TYPE_UINT:
4228 case GLSL_TYPE_BOOL:
4229 case GLSL_TYPE_SUBROUTINE:
4230 return ac->i32;
4231 case GLSL_TYPE_INT8:
4232 case GLSL_TYPE_UINT8:
4233 return ac->i8;
4234 case GLSL_TYPE_INT16:
4235 case GLSL_TYPE_UINT16:
4236 return ac->i16;
4237 case GLSL_TYPE_FLOAT:
4238 return ac->f32;
4239 case GLSL_TYPE_FLOAT16:
4240 return ac->f16;
4241 case GLSL_TYPE_INT64:
4242 case GLSL_TYPE_UINT64:
4243 return ac->i64;
4244 case GLSL_TYPE_DOUBLE:
4245 return ac->f64;
4246 default:
4247 unreachable("unknown GLSL type");
4248 }
4249 }
4250
4251 static LLVMTypeRef
4252 glsl_to_llvm_type(struct ac_llvm_context *ac,
4253 const struct glsl_type *type)
4254 {
4255 if (glsl_type_is_scalar(type)) {
4256 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4257 }
4258
4259 if (glsl_type_is_vector(type)) {
4260 return LLVMVectorType(
4261 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4262 glsl_get_vector_elements(type));
4263 }
4264
4265 if (glsl_type_is_matrix(type)) {
4266 return LLVMArrayType(
4267 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4268 glsl_get_matrix_columns(type));
4269 }
4270
4271 if (glsl_type_is_array(type)) {
4272 return LLVMArrayType(
4273 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4274 glsl_get_length(type));
4275 }
4276
4277 assert(glsl_type_is_struct_or_ifc(type));
4278
4279 LLVMTypeRef member_types[glsl_get_length(type)];
4280
4281 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4282 member_types[i] =
4283 glsl_to_llvm_type(ac,
4284 glsl_get_struct_field(type, i));
4285 }
4286
4287 return LLVMStructTypeInContext(ac->context, member_types,
4288 glsl_get_length(type), false);
4289 }
4290
4291 static void visit_deref(struct ac_nir_context *ctx,
4292 nir_deref_instr *instr)
4293 {
4294 if (instr->mode != nir_var_mem_shared &&
4295 instr->mode != nir_var_mem_global)
4296 return;
4297
4298 LLVMValueRef result = NULL;
4299 switch(instr->deref_type) {
4300 case nir_deref_type_var: {
4301 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4302 result = entry->data;
4303 break;
4304 }
4305 case nir_deref_type_struct:
4306 if (instr->mode == nir_var_mem_global) {
4307 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4308 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4309 instr->strct.index);
4310 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4311 LLVMConstInt(ctx->ac.i32, offset, 0));
4312 } else {
4313 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4314 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4315 }
4316 break;
4317 case nir_deref_type_array:
4318 if (instr->mode == nir_var_mem_global) {
4319 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4320 unsigned stride = glsl_get_explicit_stride(parent->type);
4321
4322 if ((glsl_type_is_matrix(parent->type) &&
4323 glsl_matrix_type_is_row_major(parent->type)) ||
4324 (glsl_type_is_vector(parent->type) && stride == 0))
4325 stride = type_scalar_size_bytes(parent->type);
4326
4327 assert(stride > 0);
4328 LLVMValueRef index = get_src(ctx, instr->arr.index);
4329 if (LLVMTypeOf(index) != ctx->ac.i64)
4330 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4331
4332 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4333
4334 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4335 } else {
4336 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4337 get_src(ctx, instr->arr.index));
4338 }
4339 break;
4340 case nir_deref_type_ptr_as_array:
4341 if (instr->mode == nir_var_mem_global) {
4342 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4343
4344 LLVMValueRef index = get_src(ctx, instr->arr.index);
4345 if (LLVMTypeOf(index) != ctx->ac.i64)
4346 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4347
4348 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4349
4350 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4351 } else {
4352 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4353 get_src(ctx, instr->arr.index));
4354 }
4355 break;
4356 case nir_deref_type_cast: {
4357 result = get_src(ctx, instr->parent);
4358
4359 /* We can't use the structs from LLVM because the shader
4360 * specifies its own offsets. */
4361 LLVMTypeRef pointee_type = ctx->ac.i8;
4362 if (instr->mode == nir_var_mem_shared)
4363 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4364
4365 unsigned address_space;
4366
4367 switch(instr->mode) {
4368 case nir_var_mem_shared:
4369 address_space = AC_ADDR_SPACE_LDS;
4370 break;
4371 case nir_var_mem_global:
4372 address_space = AC_ADDR_SPACE_GLOBAL;
4373 break;
4374 default:
4375 unreachable("Unhandled address space");
4376 }
4377
4378 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4379
4380 if (LLVMTypeOf(result) != type) {
4381 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4382 result = LLVMBuildBitCast(ctx->ac.builder, result,
4383 type, "");
4384 } else {
4385 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4386 type, "");
4387 }
4388 }
4389 break;
4390 }
4391 default:
4392 unreachable("Unhandled deref_instr deref type");
4393 }
4394
4395 ctx->ssa_defs[instr->dest.ssa.index] = result;
4396 }
4397
4398 static void visit_cf_list(struct ac_nir_context *ctx,
4399 struct exec_list *list);
4400
4401 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4402 {
4403 nir_foreach_instr(instr, block)
4404 {
4405 switch (instr->type) {
4406 case nir_instr_type_alu:
4407 visit_alu(ctx, nir_instr_as_alu(instr));
4408 break;
4409 case nir_instr_type_load_const:
4410 visit_load_const(ctx, nir_instr_as_load_const(instr));
4411 break;
4412 case nir_instr_type_intrinsic:
4413 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4414 break;
4415 case nir_instr_type_tex:
4416 visit_tex(ctx, nir_instr_as_tex(instr));
4417 break;
4418 case nir_instr_type_phi:
4419 visit_phi(ctx, nir_instr_as_phi(instr));
4420 break;
4421 case nir_instr_type_ssa_undef:
4422 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4423 break;
4424 case nir_instr_type_jump:
4425 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4426 break;
4427 case nir_instr_type_deref:
4428 visit_deref(ctx, nir_instr_as_deref(instr));
4429 break;
4430 default:
4431 fprintf(stderr, "Unknown NIR instr type: ");
4432 nir_print_instr(instr, stderr);
4433 fprintf(stderr, "\n");
4434 abort();
4435 }
4436 }
4437
4438 _mesa_hash_table_insert(ctx->defs, block,
4439 LLVMGetInsertBlock(ctx->ac.builder));
4440 }
4441
4442 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4443 {
4444 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4445
4446 nir_block *then_block =
4447 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4448
4449 ac_build_uif(&ctx->ac, value, then_block->index);
4450
4451 visit_cf_list(ctx, &if_stmt->then_list);
4452
4453 if (!exec_list_is_empty(&if_stmt->else_list)) {
4454 nir_block *else_block =
4455 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4456
4457 ac_build_else(&ctx->ac, else_block->index);
4458 visit_cf_list(ctx, &if_stmt->else_list);
4459 }
4460
4461 ac_build_endif(&ctx->ac, then_block->index);
4462 }
4463
4464 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4465 {
4466 nir_block *first_loop_block =
4467 (nir_block *) exec_list_get_head(&loop->body);
4468
4469 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4470
4471 visit_cf_list(ctx, &loop->body);
4472
4473 ac_build_endloop(&ctx->ac, first_loop_block->index);
4474 }
4475
4476 static void visit_cf_list(struct ac_nir_context *ctx,
4477 struct exec_list *list)
4478 {
4479 foreach_list_typed(nir_cf_node, node, node, list)
4480 {
4481 switch (node->type) {
4482 case nir_cf_node_block:
4483 visit_block(ctx, nir_cf_node_as_block(node));
4484 break;
4485
4486 case nir_cf_node_if:
4487 visit_if(ctx, nir_cf_node_as_if(node));
4488 break;
4489
4490 case nir_cf_node_loop:
4491 visit_loop(ctx, nir_cf_node_as_loop(node));
4492 break;
4493
4494 default:
4495 assert(0);
4496 }
4497 }
4498 }
4499
4500 void
4501 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4502 struct ac_shader_abi *abi,
4503 struct nir_shader *nir,
4504 struct nir_variable *variable,
4505 gl_shader_stage stage)
4506 {
4507 unsigned output_loc = variable->data.driver_location / 4;
4508 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4509
4510 /* tess ctrl has it's own load/store paths for outputs */
4511 if (stage == MESA_SHADER_TESS_CTRL)
4512 return;
4513
4514 if (stage == MESA_SHADER_VERTEX ||
4515 stage == MESA_SHADER_TESS_EVAL ||
4516 stage == MESA_SHADER_GEOMETRY) {
4517 int idx = variable->data.location + variable->data.index;
4518 if (idx == VARYING_SLOT_CLIP_DIST0) {
4519 int length = nir->info.clip_distance_array_size +
4520 nir->info.cull_distance_array_size;
4521
4522 if (length > 4)
4523 attrib_count = 2;
4524 else
4525 attrib_count = 1;
4526 }
4527 }
4528
4529 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4530 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4531 for (unsigned i = 0; i < attrib_count; ++i) {
4532 for (unsigned chan = 0; chan < 4; chan++) {
4533 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4534 ac_build_alloca_undef(ctx, type, "");
4535 }
4536 }
4537 }
4538
4539 static void
4540 setup_locals(struct ac_nir_context *ctx,
4541 struct nir_function *func)
4542 {
4543 int i, j;
4544 ctx->num_locals = 0;
4545 nir_foreach_variable(variable, &func->impl->locals) {
4546 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4547 variable->data.driver_location = ctx->num_locals * 4;
4548 variable->data.location_frac = 0;
4549 ctx->num_locals += attrib_count;
4550 }
4551 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4552 if (!ctx->locals)
4553 return;
4554
4555 for (i = 0; i < ctx->num_locals; i++) {
4556 for (j = 0; j < 4; j++) {
4557 ctx->locals[i * 4 + j] =
4558 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4559 }
4560 }
4561 }
4562
4563 static void
4564 setup_scratch(struct ac_nir_context *ctx,
4565 struct nir_shader *shader)
4566 {
4567 if (shader->scratch_size == 0)
4568 return;
4569
4570 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4571 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4572 "scratch");
4573 }
4574
4575 static void
4576 setup_shared(struct ac_nir_context *ctx,
4577 struct nir_shader *nir)
4578 {
4579 nir_foreach_variable(variable, &nir->shared) {
4580 LLVMValueRef shared =
4581 LLVMAddGlobalInAddressSpace(
4582 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4583 variable->name ? variable->name : "",
4584 AC_ADDR_SPACE_LDS);
4585 _mesa_hash_table_insert(ctx->vars, variable, shared);
4586 }
4587 }
4588
4589 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4590 struct nir_shader *nir)
4591 {
4592 struct ac_nir_context ctx = {};
4593 struct nir_function *func;
4594
4595 ctx.ac = *ac;
4596 ctx.abi = abi;
4597
4598 ctx.stage = nir->info.stage;
4599 ctx.info = &nir->info;
4600
4601 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4602
4603 nir_foreach_variable(variable, &nir->outputs)
4604 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4605 ctx.stage);
4606
4607 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4608 _mesa_key_pointer_equal);
4609 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4610 _mesa_key_pointer_equal);
4611 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4612 _mesa_key_pointer_equal);
4613
4614 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4615
4616 nir_index_ssa_defs(func->impl);
4617 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4618
4619 setup_locals(&ctx, func);
4620 setup_scratch(&ctx, nir);
4621
4622 if (gl_shader_stage_is_compute(nir->info.stage))
4623 setup_shared(&ctx, nir);
4624
4625 visit_cf_list(&ctx, &func->impl->body);
4626 phi_post_pass(&ctx);
4627
4628 if (!gl_shader_stage_is_compute(nir->info.stage))
4629 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4630 ctx.abi->outputs);
4631
4632 free(ctx.locals);
4633 free(ctx.ssa_defs);
4634 ralloc_free(ctx.defs);
4635 ralloc_free(ctx.phis);
4636 ralloc_free(ctx.vars);
4637 }
4638
4639 void
4640 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4641 {
4642 /* Lower large variables to scratch first so that we won't bloat the
4643 * shader by generating large if ladders for them. We later lower
4644 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4645 */
4646 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4647 nir_var_function_temp,
4648 256,
4649 glsl_get_natural_size_align_bytes);
4650
4651 /* While it would be nice not to have this flag, we are constrained
4652 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4653 */
4654 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4655
4656 /* TODO: Indirect indexing of GS inputs is unimplemented.
4657 *
4658 * TCS and TES load inputs directly from LDS or offchip memory, so
4659 * indirect indexing is trivial.
4660 */
4661 nir_variable_mode indirect_mask = 0;
4662 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4663 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4664 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4665 !llvm_has_working_vgpr_indexing)) {
4666 indirect_mask |= nir_var_shader_in;
4667 }
4668 if (!llvm_has_working_vgpr_indexing &&
4669 nir->info.stage != MESA_SHADER_TESS_CTRL)
4670 indirect_mask |= nir_var_shader_out;
4671
4672 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4673 * smart enough to handle indirects without causing excess spilling
4674 * causing the gpu to hang.
4675 *
4676 * See the following thread for more details of the problem:
4677 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4678 */
4679 indirect_mask |= nir_var_function_temp;
4680
4681 nir_lower_indirect_derefs(nir, indirect_mask);
4682 }
4683
4684 static unsigned
4685 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4686 {
4687 if (intrin->intrinsic != nir_intrinsic_store_deref)
4688 return 0;
4689
4690 nir_variable *var =
4691 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4692
4693 if (var->data.mode != nir_var_shader_out)
4694 return 0;
4695
4696 unsigned writemask = 0;
4697 const int location = var->data.location;
4698 unsigned first_component = var->data.location_frac;
4699 unsigned num_comps = intrin->dest.ssa.num_components;
4700
4701 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4702 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4703 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4704 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4705
4706 return writemask;
4707 }
4708
4709 static void
4710 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4711 unsigned *cond_block_tf_writemask,
4712 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4713 {
4714 switch (cf_node->type) {
4715 case nir_cf_node_block: {
4716 nir_block *block = nir_cf_node_as_block(cf_node);
4717 nir_foreach_instr(instr, block) {
4718 if (instr->type != nir_instr_type_intrinsic)
4719 continue;
4720
4721 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4722 if (intrin->intrinsic == nir_intrinsic_barrier) {
4723
4724 /* If we find a barrier in nested control flow put this in the
4725 * too hard basket. In GLSL this is not possible but it is in
4726 * SPIR-V.
4727 */
4728 if (is_nested_cf) {
4729 *tessfactors_are_def_in_all_invocs = false;
4730 return;
4731 }
4732
4733 /* The following case must be prevented:
4734 * gl_TessLevelInner = ...;
4735 * barrier();
4736 * if (gl_InvocationID == 1)
4737 * gl_TessLevelInner = ...;
4738 *
4739 * If you consider disjoint code segments separated by barriers, each
4740 * such segment that writes tess factor channels should write the same
4741 * channels in all codepaths within that segment.
4742 */
4743 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4744 /* Accumulate the result: */
4745 *tessfactors_are_def_in_all_invocs &=
4746 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4747
4748 /* Analyze the next code segment from scratch. */
4749 *upper_block_tf_writemask = 0;
4750 *cond_block_tf_writemask = 0;
4751 }
4752 } else
4753 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4754 }
4755
4756 break;
4757 }
4758 case nir_cf_node_if: {
4759 unsigned then_tessfactor_writemask = 0;
4760 unsigned else_tessfactor_writemask = 0;
4761
4762 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4763 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4764 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4765 cond_block_tf_writemask,
4766 tessfactors_are_def_in_all_invocs, true);
4767 }
4768
4769 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4770 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4771 cond_block_tf_writemask,
4772 tessfactors_are_def_in_all_invocs, true);
4773 }
4774
4775 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4776 /* If both statements write the same tess factor channels,
4777 * we can say that the upper block writes them too.
4778 */
4779 *upper_block_tf_writemask |= then_tessfactor_writemask &
4780 else_tessfactor_writemask;
4781 *cond_block_tf_writemask |= then_tessfactor_writemask |
4782 else_tessfactor_writemask;
4783 }
4784
4785 break;
4786 }
4787 case nir_cf_node_loop: {
4788 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4789 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4790 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4791 cond_block_tf_writemask,
4792 tessfactors_are_def_in_all_invocs, true);
4793 }
4794
4795 break;
4796 }
4797 default:
4798 unreachable("unknown cf node type");
4799 }
4800 }
4801
4802 bool
4803 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4804 {
4805 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4806
4807 /* The pass works as follows:
4808 * If all codepaths write tess factors, we can say that all
4809 * invocations define tess factors.
4810 *
4811 * Each tess factor channel is tracked separately.
4812 */
4813 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4814 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4815
4816 /* Initial value = true. Here the pass will accumulate results from
4817 * multiple segments surrounded by barriers. If tess factors aren't
4818 * written at all, it's a shader bug and we don't care if this will be
4819 * true.
4820 */
4821 bool tessfactors_are_def_in_all_invocs = true;
4822
4823 nir_foreach_function(function, nir) {
4824 if (function->impl) {
4825 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4826 scan_tess_ctrl(node, &main_block_tf_writemask,
4827 &cond_block_tf_writemask,
4828 &tessfactors_are_def_in_all_invocs,
4829 false);
4830 }
4831 }
4832 }
4833
4834 /* Accumulate the result for the last code segment separated by a
4835 * barrier.
4836 */
4837 if (main_block_tf_writemask || cond_block_tf_writemask) {
4838 tessfactors_are_def_in_all_invocs &=
4839 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4840 }
4841
4842 return tessfactors_are_def_in_all_invocs;
4843 }