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radeonsi/gfx10: set DLC for loads when GLC is set
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 struct hash_table *defs;
46 struct hash_table *phis;
47 struct hash_table *vars;
48
49 LLVMValueRef main_function;
50 LLVMBasicBlockRef continue_block;
51 LLVMBasicBlockRef break_block;
52
53 int num_locals;
54 LLVMValueRef *locals;
55 };
56
57 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
58 nir_deref_instr *deref_instr,
59 enum ac_descriptor_type desc_type,
60 const nir_instr *instr,
61 bool image, bool write);
62
63 static void
64 build_store_values_extended(struct ac_llvm_context *ac,
65 LLVMValueRef *values,
66 unsigned value_count,
67 unsigned value_stride,
68 LLVMValueRef vec)
69 {
70 LLVMBuilderRef builder = ac->builder;
71 unsigned i;
72
73 for (i = 0; i < value_count; i++) {
74 LLVMValueRef ptr = values[i * value_stride];
75 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
76 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
77 LLVMBuildStore(builder, value, ptr);
78 }
79 }
80
81 static enum ac_image_dim
82 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
83 bool is_array)
84 {
85 switch (dim) {
86 case GLSL_SAMPLER_DIM_1D:
87 if (ctx->chip_class >= GFX9)
88 return is_array ? ac_image_2darray : ac_image_2d;
89 return is_array ? ac_image_1darray : ac_image_1d;
90 case GLSL_SAMPLER_DIM_2D:
91 case GLSL_SAMPLER_DIM_RECT:
92 case GLSL_SAMPLER_DIM_EXTERNAL:
93 return is_array ? ac_image_2darray : ac_image_2d;
94 case GLSL_SAMPLER_DIM_3D:
95 return ac_image_3d;
96 case GLSL_SAMPLER_DIM_CUBE:
97 return ac_image_cube;
98 case GLSL_SAMPLER_DIM_MS:
99 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
100 case GLSL_SAMPLER_DIM_SUBPASS:
101 return ac_image_2darray;
102 case GLSL_SAMPLER_DIM_SUBPASS_MS:
103 return ac_image_2darraymsaa;
104 default:
105 unreachable("bad sampler dim");
106 }
107 }
108
109 static enum ac_image_dim
110 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
111 bool is_array)
112 {
113 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
114
115 if (dim == ac_image_cube ||
116 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
117 dim = ac_image_2darray;
118
119 return dim;
120 }
121
122 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
123 const nir_ssa_def *def)
124 {
125 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
126 if (def->num_components > 1) {
127 type = LLVMVectorType(type, def->num_components);
128 }
129 return type;
130 }
131
132 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
133 {
134 assert(src.is_ssa);
135 return nir->ssa_defs[src.ssa->index];
136 }
137
138 static LLVMValueRef
139 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
140 {
141 LLVMValueRef ptr = get_src(ctx, src);
142 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
143 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
144
145 return LLVMBuildBitCast(ctx->ac.builder, ptr,
146 LLVMPointerType(ctx->ac.i32, addr_space), "");
147 }
148
149 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
150 const struct nir_block *b)
151 {
152 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
153 return (LLVMBasicBlockRef)entry->data;
154 }
155
156 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
157 nir_alu_src src,
158 unsigned num_components)
159 {
160 LLVMValueRef value = get_src(ctx, src.src);
161 bool need_swizzle = false;
162
163 assert(value);
164 unsigned src_components = ac_get_llvm_num_components(value);
165 for (unsigned i = 0; i < num_components; ++i) {
166 assert(src.swizzle[i] < src_components);
167 if (src.swizzle[i] != i)
168 need_swizzle = true;
169 }
170
171 if (need_swizzle || num_components != src_components) {
172 LLVMValueRef masks[] = {
173 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
177
178 if (src_components > 1 && num_components == 1) {
179 value = LLVMBuildExtractElement(ctx->ac.builder, value,
180 masks[0], "");
181 } else if (src_components == 1 && num_components > 1) {
182 LLVMValueRef values[] = {value, value, value, value};
183 value = ac_build_gather_values(&ctx->ac, values, num_components);
184 } else {
185 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
186 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
187 swizzle, "");
188 }
189 }
190 assert(!src.negate);
191 assert(!src.abs);
192 return value;
193 }
194
195 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
196 LLVMIntPredicate pred, LLVMValueRef src0,
197 LLVMValueRef src1)
198 {
199 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
200 return LLVMBuildSelect(ctx->builder, result,
201 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
202 ctx->i32_0, "");
203 }
204
205 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
206 LLVMRealPredicate pred, LLVMValueRef src0,
207 LLVMValueRef src1)
208 {
209 LLVMValueRef result;
210 src0 = ac_to_float(ctx, src0);
211 src1 = ac_to_float(ctx, src1);
212 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
213 return LLVMBuildSelect(ctx->builder, result,
214 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
215 ctx->i32_0, "");
216 }
217
218 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 };
227
228 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
229 ac_get_elem_bits(ctx, result_type));
230 assert(length < sizeof(name));
231 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
232 }
233
234 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
235 const char *intrin,
236 LLVMTypeRef result_type,
237 LLVMValueRef src0, LLVMValueRef src1)
238 {
239 char name[64];
240 LLVMValueRef params[] = {
241 ac_to_float(ctx, src0),
242 ac_to_float(ctx, src1),
243 };
244
245 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
246 ac_get_elem_bits(ctx, result_type));
247 assert(length < sizeof(name));
248 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
249 }
250
251 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMTypeRef result_type,
254 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
255 {
256 char name[64];
257 LLVMValueRef params[] = {
258 ac_to_float(ctx, src0),
259 ac_to_float(ctx, src1),
260 ac_to_float(ctx, src2),
261 };
262
263 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
264 ac_get_elem_bits(ctx, result_type));
265 assert(length < sizeof(name));
266 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
267 }
268
269 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
270 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
271 {
272 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
273
274 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
275 ctx->i32_0, "");
276 return LLVMBuildSelect(ctx->builder, v,
277 ac_to_integer_or_pointer(ctx, src1),
278 ac_to_integer_or_pointer(ctx, src2), "");
279 }
280
281 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
282 LLVMValueRef src0)
283 {
284 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
285 }
286
287 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
288 const char *intrin,
289 LLVMValueRef src0, LLVMValueRef src1)
290 {
291 LLVMTypeRef ret_type;
292 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
293 LLVMValueRef res;
294 LLVMValueRef params[] = { src0, src1 };
295 ret_type = LLVMStructTypeInContext(ctx->context, types,
296 2, true);
297
298 res = ac_build_intrinsic(ctx, intrin, ret_type,
299 params, 2, AC_FUNC_ATTR_READNONE);
300
301 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
302 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
303 return res;
304 }
305
306 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
307 LLVMValueRef src0,
308 unsigned bitsize)
309 {
310 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
311 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
312 "");
313 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
314
315 switch (bitsize) {
316 case 16:
317 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
318 case 32:
319 return result;
320 case 64:
321 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
322 default:
323 unreachable("Unsupported bit size.");
324 }
325 }
326
327 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
328 LLVMValueRef src0)
329 {
330 src0 = ac_to_float(ctx, src0);
331 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
332 return LLVMBuildSExt(ctx->builder,
333 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
334 ctx->i32, "");
335 }
336
337 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
338 LLVMValueRef src0,
339 unsigned bitsize)
340 {
341 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
342
343 switch (bitsize) {
344 case 8:
345 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
346 case 16:
347 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
348 case 32:
349 return result;
350 case 64:
351 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
352 default:
353 unreachable("Unsupported bit size.");
354 }
355 }
356
357 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
358 LLVMValueRef src0)
359 {
360 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
361 return LLVMBuildSExt(ctx->builder,
362 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
363 ctx->i32, "");
364 }
365
366 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
367 LLVMValueRef src0)
368 {
369 LLVMValueRef result;
370 LLVMValueRef cond = NULL;
371
372 src0 = ac_to_float(ctx, src0);
373 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
374
375 if (ctx->chip_class >= GFX8) {
376 LLVMValueRef args[2];
377 /* Check if the result is a denormal - and flush to 0 if so. */
378 args[0] = result;
379 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
380 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
381 }
382
383 /* need to convert back up to f32 */
384 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
385
386 if (ctx->chip_class >= GFX8)
387 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
388 else {
389 /* for GFX6-GFX7 */
390 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
391 * so compare the result and flush to 0 if it's smaller.
392 */
393 LLVMValueRef temp, cond2;
394 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
395 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
396 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
397 temp, "");
398 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
399 temp, ctx->f32_0, "");
400 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
401 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
402 }
403 return result;
404 }
405
406 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
407 LLVMValueRef src0, LLVMValueRef src1)
408 {
409 LLVMValueRef dst64, result;
410 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
411 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
412
413 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
414 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
415 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
416 return result;
417 }
418
419 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
420 LLVMValueRef src0, LLVMValueRef src1)
421 {
422 LLVMValueRef dst64, result;
423 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
424 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
425
426 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
427 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
428 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
429 return result;
430 }
431
432 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
433 LLVMValueRef bits, LLVMValueRef offset)
434 {
435 /* mask = ((1 << bits) - 1) << offset */
436 return LLVMBuildShl(ctx->builder,
437 LLVMBuildSub(ctx->builder,
438 LLVMBuildShl(ctx->builder,
439 ctx->i32_1,
440 bits, ""),
441 ctx->i32_1, ""),
442 offset, "");
443 }
444
445 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
446 LLVMValueRef mask, LLVMValueRef insert,
447 LLVMValueRef base)
448 {
449 /* Calculate:
450 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
451 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
452 */
453 return LLVMBuildXor(ctx->builder, base,
454 LLVMBuildAnd(ctx->builder, mask,
455 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
456 }
457
458 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
459 LLVMValueRef src0)
460 {
461 LLVMValueRef comp[2];
462
463 src0 = ac_to_float(ctx, src0);
464 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
465 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
466
467 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
468 ctx->i32, "");
469 }
470
471 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
472 LLVMValueRef src0)
473 {
474 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
475 LLVMValueRef temps[2], val;
476 int i;
477
478 for (i = 0; i < 2; i++) {
479 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
480 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
481 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
482 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
483 }
484 return ac_build_gather_values(ctx, temps, 2);
485 }
486
487 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
488 nir_op op,
489 LLVMValueRef src0)
490 {
491 unsigned mask;
492 int idx;
493 LLVMValueRef result;
494
495 if (op == nir_op_fddx_fine)
496 mask = AC_TID_MASK_LEFT;
497 else if (op == nir_op_fddy_fine)
498 mask = AC_TID_MASK_TOP;
499 else
500 mask = AC_TID_MASK_TOP_LEFT;
501
502 /* for DDX we want to next X pixel, DDY next Y pixel. */
503 if (op == nir_op_fddx_fine ||
504 op == nir_op_fddx_coarse ||
505 op == nir_op_fddx)
506 idx = 1;
507 else
508 idx = 2;
509
510 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
511 return result;
512 }
513
514 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
515 {
516 LLVMValueRef src[4], result = NULL;
517 unsigned num_components = instr->dest.dest.ssa.num_components;
518 unsigned src_components;
519 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
520
521 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
522 switch (instr->op) {
523 case nir_op_vec2:
524 case nir_op_vec3:
525 case nir_op_vec4:
526 src_components = 1;
527 break;
528 case nir_op_pack_half_2x16:
529 src_components = 2;
530 break;
531 case nir_op_unpack_half_2x16:
532 src_components = 1;
533 break;
534 case nir_op_cube_face_coord:
535 case nir_op_cube_face_index:
536 src_components = 3;
537 break;
538 default:
539 src_components = num_components;
540 break;
541 }
542 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
543 src[i] = get_alu_src(ctx, instr->src[i], src_components);
544
545 switch (instr->op) {
546 case nir_op_mov:
547 result = src[0];
548 break;
549 case nir_op_fneg:
550 src[0] = ac_to_float(&ctx->ac, src[0]);
551 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
552 break;
553 case nir_op_ineg:
554 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
555 break;
556 case nir_op_inot:
557 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
558 break;
559 case nir_op_iadd:
560 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
561 break;
562 case nir_op_fadd:
563 src[0] = ac_to_float(&ctx->ac, src[0]);
564 src[1] = ac_to_float(&ctx->ac, src[1]);
565 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_fsub:
568 src[0] = ac_to_float(&ctx->ac, src[0]);
569 src[1] = ac_to_float(&ctx->ac, src[1]);
570 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_isub:
573 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
574 break;
575 case nir_op_imul:
576 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
577 break;
578 case nir_op_imod:
579 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
580 break;
581 case nir_op_umod:
582 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_fmod:
585 src[0] = ac_to_float(&ctx->ac, src[0]);
586 src[1] = ac_to_float(&ctx->ac, src[1]);
587 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
588 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
589 ac_to_float_type(&ctx->ac, def_type), result);
590 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
591 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
592 break;
593 case nir_op_frem:
594 src[0] = ac_to_float(&ctx->ac, src[0]);
595 src[1] = ac_to_float(&ctx->ac, src[1]);
596 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
597 break;
598 case nir_op_irem:
599 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_idiv:
602 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_udiv:
605 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_fmul:
608 src[0] = ac_to_float(&ctx->ac, src[0]);
609 src[1] = ac_to_float(&ctx->ac, src[1]);
610 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_frcp:
613 src[0] = ac_to_float(&ctx->ac, src[0]);
614 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
615 break;
616 case nir_op_iand:
617 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ior:
620 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
621 break;
622 case nir_op_ixor:
623 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
624 break;
625 case nir_op_ishl:
626 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
627 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
628 LLVMTypeOf(src[0]), "");
629 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_ishr:
635 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
636 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
637 LLVMTypeOf(src[0]), "");
638 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
639 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
640 LLVMTypeOf(src[0]), "");
641 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_ushr:
644 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
645 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
646 LLVMTypeOf(src[0]), "");
647 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
648 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
649 LLVMTypeOf(src[0]), "");
650 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ilt32:
653 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
654 break;
655 case nir_op_ine32:
656 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
657 break;
658 case nir_op_ieq32:
659 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
660 break;
661 case nir_op_ige32:
662 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
663 break;
664 case nir_op_ult32:
665 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
666 break;
667 case nir_op_uge32:
668 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
669 break;
670 case nir_op_feq32:
671 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
672 break;
673 case nir_op_fne32:
674 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
675 break;
676 case nir_op_flt32:
677 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
678 break;
679 case nir_op_fge32:
680 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
681 break;
682 case nir_op_fabs:
683 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
684 ac_to_float_type(&ctx->ac, def_type), src[0]);
685 break;
686 case nir_op_iabs:
687 result = emit_iabs(&ctx->ac, src[0]);
688 break;
689 case nir_op_imax:
690 result = ac_build_imax(&ctx->ac, src[0], src[1]);
691 break;
692 case nir_op_imin:
693 result = ac_build_imin(&ctx->ac, src[0], src[1]);
694 break;
695 case nir_op_umax:
696 result = ac_build_umax(&ctx->ac, src[0], src[1]);
697 break;
698 case nir_op_umin:
699 result = ac_build_umin(&ctx->ac, src[0], src[1]);
700 break;
701 case nir_op_isign:
702 result = ac_build_isign(&ctx->ac, src[0],
703 instr->dest.dest.ssa.bit_size);
704 break;
705 case nir_op_fsign:
706 src[0] = ac_to_float(&ctx->ac, src[0]);
707 result = ac_build_fsign(&ctx->ac, src[0],
708 instr->dest.dest.ssa.bit_size);
709 break;
710 case nir_op_ffloor:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_ftrunc:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
716 ac_to_float_type(&ctx->ac, def_type), src[0]);
717 break;
718 case nir_op_fceil:
719 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
720 ac_to_float_type(&ctx->ac, def_type), src[0]);
721 break;
722 case nir_op_fround_even:
723 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
724 ac_to_float_type(&ctx->ac, def_type),src[0]);
725 break;
726 case nir_op_ffract:
727 src[0] = ac_to_float(&ctx->ac, src[0]);
728 result = ac_build_fract(&ctx->ac, src[0],
729 instr->dest.dest.ssa.bit_size);
730 break;
731 case nir_op_fsin:
732 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
733 ac_to_float_type(&ctx->ac, def_type), src[0]);
734 break;
735 case nir_op_fcos:
736 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 break;
739 case nir_op_fsqrt:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_fexp2:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 break;
747 case nir_op_flog2:
748 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
749 ac_to_float_type(&ctx->ac, def_type), src[0]);
750 break;
751 case nir_op_frsq:
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
753 ac_to_float_type(&ctx->ac, def_type), src[0]);
754 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
755 break;
756 case nir_op_frexp_exp:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_frexp_exp(&ctx->ac, src[0],
759 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
760 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
761 result = LLVMBuildSExt(ctx->ac.builder, result,
762 ctx->ac.i32, "");
763 break;
764 case nir_op_frexp_sig:
765 src[0] = ac_to_float(&ctx->ac, src[0]);
766 result = ac_build_frexp_mant(&ctx->ac, src[0],
767 instr->dest.dest.ssa.bit_size);
768 break;
769 case nir_op_fpow:
770 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
771 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
772 break;
773 case nir_op_fmax:
774 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
775 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
776 if (ctx->ac.chip_class < GFX9 &&
777 instr->dest.dest.ssa.bit_size == 32) {
778 /* Only pre-GFX9 chips do not flush denorms. */
779 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
780 ac_to_float_type(&ctx->ac, def_type),
781 result);
782 }
783 break;
784 case nir_op_fmin:
785 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
786 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
787 if (ctx->ac.chip_class < GFX9 &&
788 instr->dest.dest.ssa.bit_size == 32) {
789 /* Only pre-GFX9 chips do not flush denorms. */
790 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
791 ac_to_float_type(&ctx->ac, def_type),
792 result);
793 }
794 break;
795 case nir_op_ffma:
796 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
797 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
798 break;
799 case nir_op_ldexp:
800 src[0] = ac_to_float(&ctx->ac, src[0]);
801 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
802 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
803 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
804 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
805 else
806 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
807 break;
808 case nir_op_bfm:
809 result = emit_bfm(&ctx->ac, src[0], src[1]);
810 break;
811 case nir_op_bitfield_select:
812 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
813 break;
814 case nir_op_ubfe:
815 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
816 break;
817 case nir_op_ibfe:
818 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
819 break;
820 case nir_op_bitfield_reverse:
821 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
822 break;
823 case nir_op_bit_count:
824 result = ac_build_bit_count(&ctx->ac, src[0]);
825 break;
826 case nir_op_vec2:
827 case nir_op_vec3:
828 case nir_op_vec4:
829 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
830 src[i] = ac_to_integer(&ctx->ac, src[i]);
831 result = ac_build_gather_values(&ctx->ac, src, num_components);
832 break;
833 case nir_op_f2i8:
834 case nir_op_f2i16:
835 case nir_op_f2i32:
836 case nir_op_f2i64:
837 src[0] = ac_to_float(&ctx->ac, src[0]);
838 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
839 break;
840 case nir_op_f2u8:
841 case nir_op_f2u16:
842 case nir_op_f2u32:
843 case nir_op_f2u64:
844 src[0] = ac_to_float(&ctx->ac, src[0]);
845 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
846 break;
847 case nir_op_i2f16:
848 case nir_op_i2f32:
849 case nir_op_i2f64:
850 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
851 break;
852 case nir_op_u2f16:
853 case nir_op_u2f32:
854 case nir_op_u2f64:
855 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
856 break;
857 case nir_op_f2f16_rtz:
858 src[0] = ac_to_float(&ctx->ac, src[0]);
859 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
860 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
861 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
862 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
863 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
864 break;
865 case nir_op_f2f16_rtne:
866 case nir_op_f2f16:
867 case nir_op_f2f32:
868 case nir_op_f2f64:
869 src[0] = ac_to_float(&ctx->ac, src[0]);
870 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
871 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
872 else
873 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
874 break;
875 case nir_op_u2u8:
876 case nir_op_u2u16:
877 case nir_op_u2u32:
878 case nir_op_u2u64:
879 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
880 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
881 else
882 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
883 break;
884 case nir_op_i2i8:
885 case nir_op_i2i16:
886 case nir_op_i2i32:
887 case nir_op_i2i64:
888 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
889 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
890 else
891 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
892 break;
893 case nir_op_b32csel:
894 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
895 break;
896 case nir_op_find_lsb:
897 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
898 break;
899 case nir_op_ufind_msb:
900 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
901 break;
902 case nir_op_ifind_msb:
903 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
904 break;
905 case nir_op_uadd_carry:
906 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
907 break;
908 case nir_op_usub_borrow:
909 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
910 break;
911 case nir_op_b2f16:
912 case nir_op_b2f32:
913 case nir_op_b2f64:
914 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
915 break;
916 case nir_op_f2b32:
917 result = emit_f2b(&ctx->ac, src[0]);
918 break;
919 case nir_op_b2i8:
920 case nir_op_b2i16:
921 case nir_op_b2i32:
922 case nir_op_b2i64:
923 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
924 break;
925 case nir_op_i2b32:
926 result = emit_i2b(&ctx->ac, src[0]);
927 break;
928 case nir_op_fquantize2f16:
929 result = emit_f2f16(&ctx->ac, src[0]);
930 break;
931 case nir_op_umul_high:
932 result = emit_umul_high(&ctx->ac, src[0], src[1]);
933 break;
934 case nir_op_imul_high:
935 result = emit_imul_high(&ctx->ac, src[0], src[1]);
936 break;
937 case nir_op_pack_half_2x16:
938 result = emit_pack_half_2x16(&ctx->ac, src[0]);
939 break;
940 case nir_op_unpack_half_2x16:
941 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
942 break;
943 case nir_op_fddx:
944 case nir_op_fddy:
945 case nir_op_fddx_fine:
946 case nir_op_fddy_fine:
947 case nir_op_fddx_coarse:
948 case nir_op_fddy_coarse:
949 result = emit_ddxy(ctx, instr->op, src[0]);
950 break;
951
952 case nir_op_unpack_64_2x32_split_x: {
953 assert(ac_get_llvm_num_components(src[0]) == 1);
954 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
955 ctx->ac.v2i32,
956 "");
957 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
958 ctx->ac.i32_0, "");
959 break;
960 }
961
962 case nir_op_unpack_64_2x32_split_y: {
963 assert(ac_get_llvm_num_components(src[0]) == 1);
964 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
965 ctx->ac.v2i32,
966 "");
967 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
968 ctx->ac.i32_1, "");
969 break;
970 }
971
972 case nir_op_pack_64_2x32_split: {
973 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
974 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
975 break;
976 }
977
978 case nir_op_pack_32_2x16_split: {
979 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
980 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
981 break;
982 }
983
984 case nir_op_unpack_32_2x16_split_x: {
985 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
986 ctx->ac.v2i16,
987 "");
988 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
989 ctx->ac.i32_0, "");
990 break;
991 }
992
993 case nir_op_unpack_32_2x16_split_y: {
994 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
995 ctx->ac.v2i16,
996 "");
997 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
998 ctx->ac.i32_1, "");
999 break;
1000 }
1001
1002 case nir_op_cube_face_coord: {
1003 src[0] = ac_to_float(&ctx->ac, src[0]);
1004 LLVMValueRef results[2];
1005 LLVMValueRef in[3];
1006 for (unsigned chan = 0; chan < 3; chan++)
1007 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1008 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1009 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1010 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1011 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1012 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1013 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1014 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1015 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1016 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1017 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1018 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1019 result = ac_build_gather_values(&ctx->ac, results, 2);
1020 break;
1021 }
1022
1023 case nir_op_cube_face_index: {
1024 src[0] = ac_to_float(&ctx->ac, src[0]);
1025 LLVMValueRef in[3];
1026 for (unsigned chan = 0; chan < 3; chan++)
1027 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1028 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1029 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1030 break;
1031 }
1032
1033 case nir_op_fmin3:
1034 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1035 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1036 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1037 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1038 break;
1039 case nir_op_umin3:
1040 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1041 result = ac_build_umin(&ctx->ac, result, src[2]);
1042 break;
1043 case nir_op_imin3:
1044 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1045 result = ac_build_imin(&ctx->ac, result, src[2]);
1046 break;
1047 case nir_op_fmax3:
1048 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1049 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1050 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1051 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1052 break;
1053 case nir_op_umax3:
1054 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1055 result = ac_build_umax(&ctx->ac, result, src[2]);
1056 break;
1057 case nir_op_imax3:
1058 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1059 result = ac_build_imax(&ctx->ac, result, src[2]);
1060 break;
1061 case nir_op_fmed3: {
1062 src[0] = ac_to_float(&ctx->ac, src[0]);
1063 src[1] = ac_to_float(&ctx->ac, src[1]);
1064 src[2] = ac_to_float(&ctx->ac, src[2]);
1065 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1066 instr->dest.dest.ssa.bit_size);
1067 break;
1068 }
1069 case nir_op_imed3: {
1070 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1071 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1072 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1073 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1074 break;
1075 }
1076 case nir_op_umed3: {
1077 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1078 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1079 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1080 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1081 break;
1082 }
1083
1084 default:
1085 fprintf(stderr, "Unknown NIR alu instr: ");
1086 nir_print_instr(&instr->instr, stderr);
1087 fprintf(stderr, "\n");
1088 abort();
1089 }
1090
1091 if (result) {
1092 assert(instr->dest.dest.is_ssa);
1093 result = ac_to_integer_or_pointer(&ctx->ac, result);
1094 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1095 }
1096 }
1097
1098 static void visit_load_const(struct ac_nir_context *ctx,
1099 const nir_load_const_instr *instr)
1100 {
1101 LLVMValueRef values[4], value = NULL;
1102 LLVMTypeRef element_type =
1103 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1104
1105 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1106 switch (instr->def.bit_size) {
1107 case 8:
1108 values[i] = LLVMConstInt(element_type,
1109 instr->value[i].u8, false);
1110 break;
1111 case 16:
1112 values[i] = LLVMConstInt(element_type,
1113 instr->value[i].u16, false);
1114 break;
1115 case 32:
1116 values[i] = LLVMConstInt(element_type,
1117 instr->value[i].u32, false);
1118 break;
1119 case 64:
1120 values[i] = LLVMConstInt(element_type,
1121 instr->value[i].u64, false);
1122 break;
1123 default:
1124 fprintf(stderr,
1125 "unsupported nir load_const bit_size: %d\n",
1126 instr->def.bit_size);
1127 abort();
1128 }
1129 }
1130 if (instr->def.num_components > 1) {
1131 value = LLVMConstVector(values, instr->def.num_components);
1132 } else
1133 value = values[0];
1134
1135 ctx->ssa_defs[instr->def.index] = value;
1136 }
1137
1138 static LLVMValueRef
1139 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1140 {
1141 LLVMValueRef size =
1142 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1143 LLVMConstInt(ctx->ac.i32, 2, false), "");
1144
1145 /* GFX8 only */
1146 if (ctx->ac.chip_class == GFX8 && in_elements) {
1147 /* On GFX8, the descriptor contains the size in bytes,
1148 * but TXQ must return the size in elements.
1149 * The stride is always non-zero for resources using TXQ.
1150 */
1151 LLVMValueRef stride =
1152 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1153 ctx->ac.i32_1, "");
1154 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1155 LLVMConstInt(ctx->ac.i32, 16, false), "");
1156 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1157 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1158
1159 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1160 }
1161 return size;
1162 }
1163
1164 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1165 nir_variable *var,
1166 struct ac_image_args *args,
1167 const nir_tex_instr *instr)
1168 {
1169 const struct glsl_type *type = glsl_without_array(var->type);
1170 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1171 LLVMValueRef half_texel[2];
1172 LLVMValueRef compare_cube_wa = NULL;
1173 LLVMValueRef result;
1174
1175 //TODO Rect
1176 {
1177 struct ac_image_args txq_args = { 0 };
1178
1179 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1180 txq_args.opcode = ac_image_get_resinfo;
1181 txq_args.dmask = 0xf;
1182 txq_args.lod = ctx->i32_0;
1183 txq_args.resource = args->resource;
1184 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1185 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1186
1187 for (unsigned c = 0; c < 2; c++) {
1188 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1189 LLVMConstInt(ctx->i32, c, false), "");
1190 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1191 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1192 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1193 LLVMConstReal(ctx->f32, -0.5), "");
1194 }
1195 }
1196
1197 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1198
1199 for (unsigned c = 0; c < 2; c++) {
1200 LLVMValueRef tmp;
1201 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1202 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1203 }
1204
1205 /*
1206 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1207 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1208 * workaround by sampling using a scaled type and converting.
1209 * This is taken from amdgpu-pro shaders.
1210 */
1211 /* NOTE this produces some ugly code compared to amdgpu-pro,
1212 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1213 * and then reads them back. -pro generates two selects,
1214 * one s_cmp for the descriptor rewriting
1215 * one v_cmp for the coordinate and result changes.
1216 */
1217 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1218 LLVMValueRef tmp, tmp2;
1219
1220 /* workaround 8/8/8/8 uint/sint cube gather bug */
1221 /* first detect it then change to a scaled read and f2i */
1222 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1223 tmp2 = tmp;
1224
1225 /* extract the DATA_FORMAT */
1226 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1227 LLVMConstInt(ctx->i32, 6, false), false);
1228
1229 /* is the DATA_FORMAT == 8_8_8_8 */
1230 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1231
1232 if (stype == GLSL_TYPE_UINT)
1233 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1234 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1235 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1236 else
1237 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1238 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1239 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1240
1241 /* replace the NUM FORMAT in the descriptor */
1242 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1243 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1244
1245 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1246
1247 /* don't modify the coordinates for this case */
1248 for (unsigned c = 0; c < 2; ++c)
1249 args->coords[c] = LLVMBuildSelect(
1250 ctx->builder, compare_cube_wa,
1251 orig_coords[c], args->coords[c], "");
1252 }
1253
1254 args->attributes = AC_FUNC_ATTR_READNONE;
1255 result = ac_build_image_opcode(ctx, args);
1256
1257 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1258 LLVMValueRef tmp, tmp2;
1259
1260 /* if the cube workaround is in place, f2i the result. */
1261 for (unsigned c = 0; c < 4; c++) {
1262 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1263 if (stype == GLSL_TYPE_UINT)
1264 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1265 else
1266 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1267 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1268 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1269 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1270 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1271 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1272 }
1273 }
1274 return result;
1275 }
1276
1277 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1278 {
1279 nir_deref_instr *texture_deref_instr = NULL;
1280
1281 for (unsigned i = 0; i < instr->num_srcs; i++) {
1282 switch (instr->src[i].src_type) {
1283 case nir_tex_src_texture_deref:
1284 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1285 break;
1286 default:
1287 break;
1288 }
1289 }
1290 return texture_deref_instr;
1291 }
1292
1293 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1294 const nir_tex_instr *instr,
1295 struct ac_image_args *args)
1296 {
1297 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1298 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1299
1300 if (ctx->abi->gfx9_stride_size_workaround) {
1301 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1302 args->resource,
1303 args->coords[0],
1304 ctx->ac.i32_0,
1305 util_last_bit(mask),
1306 false, true);
1307 } else {
1308 return ac_build_buffer_load_format(&ctx->ac,
1309 args->resource,
1310 args->coords[0],
1311 ctx->ac.i32_0,
1312 util_last_bit(mask),
1313 false, true);
1314 }
1315 }
1316
1317 args->opcode = ac_image_sample;
1318
1319 switch (instr->op) {
1320 case nir_texop_txf:
1321 case nir_texop_txf_ms:
1322 case nir_texop_samples_identical:
1323 args->opcode = args->level_zero ||
1324 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1325 ac_image_load : ac_image_load_mip;
1326 args->level_zero = false;
1327 break;
1328 case nir_texop_txs:
1329 case nir_texop_query_levels:
1330 args->opcode = ac_image_get_resinfo;
1331 if (!args->lod)
1332 args->lod = ctx->ac.i32_0;
1333 args->level_zero = false;
1334 break;
1335 case nir_texop_tex:
1336 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1337 assert(!args->lod);
1338 args->level_zero = true;
1339 }
1340 break;
1341 case nir_texop_tg4:
1342 args->opcode = ac_image_gather4;
1343 args->level_zero = true;
1344 break;
1345 case nir_texop_lod:
1346 args->opcode = ac_image_get_lod;
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1353 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1354 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1355 const struct glsl_type *type = glsl_without_array(var->type);
1356 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1357 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1358 return lower_gather4_integer(&ctx->ac, var, args, instr);
1359 }
1360 }
1361
1362 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1363 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1364 if ((args->dim == ac_image_2darray ||
1365 args->dim == ac_image_2d) && !args->coords[1]) {
1366 args->coords[1] = ctx->ac.i32_0;
1367 }
1368 }
1369
1370 args->attributes = AC_FUNC_ATTR_READNONE;
1371 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1372 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1373 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1374 /* Prevent texture instructions with implicit derivatives from being
1375 * sinked into branches. */
1376 switch (instr->op) {
1377 case nir_texop_tex:
1378 case nir_texop_txb:
1379 case nir_texop_lod:
1380 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1381 break;
1382 default:
1383 break;
1384 }
1385 }
1386
1387 return ac_build_image_opcode(&ctx->ac, args);
1388 }
1389
1390 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1391 nir_intrinsic_instr *instr)
1392 {
1393 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1394 LLVMValueRef index = get_src(ctx, instr->src[1]);
1395
1396 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1397 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1398 return result;
1399 }
1400
1401 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1402 nir_intrinsic_instr *instr)
1403 {
1404 LLVMValueRef ptr, addr;
1405 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1406 unsigned index = nir_intrinsic_base(instr);
1407
1408 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1409 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1410
1411 /* Load constant values from user SGPRS when possible, otherwise
1412 * fallback to the default path that loads directly from memory.
1413 */
1414 if (LLVMIsConstant(src0) &&
1415 instr->dest.ssa.bit_size == 32) {
1416 unsigned count = instr->dest.ssa.num_components;
1417 unsigned offset = index;
1418
1419 offset += LLVMConstIntGetZExtValue(src0);
1420 offset /= 4;
1421
1422 offset -= ctx->abi->base_inline_push_consts;
1423
1424 if (offset + count <= ctx->abi->num_inline_push_consts) {
1425 return ac_build_gather_values(&ctx->ac,
1426 ctx->abi->inline_push_consts + offset,
1427 count);
1428 }
1429 }
1430
1431 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1432
1433 if (instr->dest.ssa.bit_size == 8) {
1434 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1435 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1436 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1437 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1438
1439 LLVMValueRef params[3];
1440 if (load_dwords > 1) {
1441 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1442 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1443 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1444 } else {
1445 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1446 params[0] = ctx->ac.i32_0;
1447 params[1] = res;
1448 }
1449 params[2] = addr;
1450 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1451
1452 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1453 if (instr->dest.ssa.num_components > 1)
1454 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1455 return res;
1456 } else if (instr->dest.ssa.bit_size == 16) {
1457 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1458 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1459 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1460 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1461 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1462 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1463 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1464 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1465 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1466 LLVMConstInt(ctx->ac.i32, 4, false)};
1467 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1468 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1469 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1470 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1471 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1472 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1473 }
1474
1475 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1476
1477 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1478 }
1479
1480 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1481 const nir_intrinsic_instr *instr)
1482 {
1483 LLVMValueRef index = get_src(ctx, instr->src[0]);
1484
1485 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1486 }
1487
1488 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1489 {
1490 uint32_t new_mask = 0;
1491 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1492 if (mask & (1u << i))
1493 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1494 return new_mask;
1495 }
1496
1497 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1498 unsigned start, unsigned count)
1499 {
1500 LLVMValueRef mask[] = {
1501 ctx->i32_0, ctx->i32_1,
1502 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1503
1504 unsigned src_elements = ac_get_llvm_num_components(src);
1505
1506 if (count == src_elements) {
1507 assert(start == 0);
1508 return src;
1509 } else if (count == 1) {
1510 assert(start < src_elements);
1511 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1512 } else {
1513 assert(start + count <= src_elements);
1514 assert(count <= 4);
1515 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1516 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1517 }
1518 }
1519
1520 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1521 enum gl_access_qualifier access,
1522 bool load,
1523 bool may_store_unaligned,
1524 bool writeonly_memory)
1525 {
1526 unsigned cache_policy = 0;
1527
1528 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1529 * store opcodes not aligned to a dword are affected. The only way to
1530 * get unaligned stores is through shader images.
1531 */
1532 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1533 /* If this is write-only, don't keep data in L1 to prevent
1534 * evicting L1 cache lines that may be needed by other
1535 * instructions.
1536 */
1537 writeonly_memory ||
1538 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1539 cache_policy |= ac_glc |
1540 (ctx->ac.chip_class >= GFX10 && load ? ac_dlc : 0);
1541 }
1542
1543 return cache_policy;
1544 }
1545
1546 static void visit_store_ssbo(struct ac_nir_context *ctx,
1547 nir_intrinsic_instr *instr)
1548 {
1549 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1550 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1551 unsigned writemask = nir_intrinsic_write_mask(instr);
1552 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1553 bool writeonly_memory = access & ACCESS_NON_READABLE;
1554 unsigned cache_policy = get_cache_policy(ctx, access, false, false, writeonly_memory);
1555
1556 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1557 get_src(ctx, instr->src[1]), true);
1558 LLVMValueRef base_data = src_data;
1559 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1560 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1561
1562 while (writemask) {
1563 int start, count;
1564 LLVMValueRef data, offset;
1565 LLVMTypeRef data_type;
1566
1567 u_bit_scan_consecutive_range(&writemask, &start, &count);
1568
1569 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1570 * writes into a 2-element and a 1-element write. */
1571 if (count == 3 &&
1572 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1573 writemask |= 1 << (start + 2);
1574 count = 2;
1575 }
1576 int num_bytes = count * elem_size_bytes; /* count in bytes */
1577
1578 /* we can only store 4 DWords at the same time.
1579 * can only happen for 64 Bit vectors. */
1580 if (num_bytes > 16) {
1581 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1582 count = 2;
1583 num_bytes = 16;
1584 }
1585
1586 /* check alignment of 16 Bit stores */
1587 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1588 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1589 count = 1;
1590 num_bytes = 2;
1591 }
1592 data = extract_vector_range(&ctx->ac, base_data, start, count);
1593
1594 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1595 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1596
1597 if (num_bytes == 1) {
1598 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1599 offset, ctx->ac.i32_0,
1600 cache_policy & ac_glc);
1601 } else if (num_bytes == 2) {
1602 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1603 offset, ctx->ac.i32_0,
1604 cache_policy & ac_glc);
1605 } else {
1606 int num_channels = num_bytes / 4;
1607
1608 switch (num_bytes) {
1609 case 16: /* v4f32 */
1610 data_type = ctx->ac.v4f32;
1611 break;
1612 case 12: /* v3f32 */
1613 data_type = ctx->ac.v3f32;
1614 break;
1615 case 8: /* v2f32 */
1616 data_type = ctx->ac.v2f32;
1617 break;
1618 case 4: /* f32 */
1619 data_type = ctx->ac.f32;
1620 break;
1621 default:
1622 unreachable("Malformed vector store.");
1623 }
1624 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1625
1626 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1627 num_channels, offset,
1628 ctx->ac.i32_0, 0,
1629 cache_policy & ac_glc,
1630 false, false);
1631 }
1632 }
1633 }
1634
1635 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1636 const nir_intrinsic_instr *instr)
1637 {
1638 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1639 const char *op;
1640 char name[64], type[8];
1641 LLVMValueRef params[6];
1642 int arg_count = 0;
1643
1644 switch (instr->intrinsic) {
1645 case nir_intrinsic_ssbo_atomic_add:
1646 op = "add";
1647 break;
1648 case nir_intrinsic_ssbo_atomic_imin:
1649 op = "smin";
1650 break;
1651 case nir_intrinsic_ssbo_atomic_umin:
1652 op = "umin";
1653 break;
1654 case nir_intrinsic_ssbo_atomic_imax:
1655 op = "smax";
1656 break;
1657 case nir_intrinsic_ssbo_atomic_umax:
1658 op = "umax";
1659 break;
1660 case nir_intrinsic_ssbo_atomic_and:
1661 op = "and";
1662 break;
1663 case nir_intrinsic_ssbo_atomic_or:
1664 op = "or";
1665 break;
1666 case nir_intrinsic_ssbo_atomic_xor:
1667 op = "xor";
1668 break;
1669 case nir_intrinsic_ssbo_atomic_exchange:
1670 op = "swap";
1671 break;
1672 case nir_intrinsic_ssbo_atomic_comp_swap:
1673 op = "cmpswap";
1674 break;
1675 default:
1676 abort();
1677 }
1678
1679 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1680 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1681 }
1682 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1683 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1684 get_src(ctx, instr->src[0]),
1685 true);
1686
1687 if (HAVE_LLVM >= 0x900) {
1688 /* XXX: The new raw/struct atomic intrinsics are buggy with
1689 * LLVM 8, see r358579.
1690 */
1691 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1692 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1693 params[arg_count++] = ctx->ac.i32_0; /* slc */
1694
1695 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1696 snprintf(name, sizeof(name),
1697 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1698 } else {
1699 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1700 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1701 params[arg_count++] = ctx->ac.i1false; /* slc */
1702
1703 assert(return_type == ctx->ac.i32);
1704 snprintf(name, sizeof(name),
1705 "llvm.amdgcn.buffer.atomic.%s", op);
1706 }
1707
1708 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1709 arg_count, 0);
1710 }
1711
1712 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1713 const nir_intrinsic_instr *instr)
1714 {
1715 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1716 int num_components = instr->num_components;
1717 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1718 unsigned cache_policy = get_cache_policy(ctx, access, true, false, false);
1719
1720 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1721 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1722 get_src(ctx, instr->src[0]), false);
1723 LLVMValueRef vindex = ctx->ac.i32_0;
1724
1725 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1726 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1727
1728 LLVMValueRef results[4];
1729 for (int i = 0; i < num_components;) {
1730 int num_elems = num_components - i;
1731 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1732 num_elems = 1;
1733 if (num_elems * elem_size_bytes > 16)
1734 num_elems = 16 / elem_size_bytes;
1735 int load_bytes = num_elems * elem_size_bytes;
1736
1737 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1738
1739 LLVMValueRef ret;
1740
1741 if (load_bytes == 1) {
1742 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1743 rsrc,
1744 offset,
1745 ctx->ac.i32_0,
1746 immoffset,
1747 cache_policy & ac_glc);
1748 } else if (load_bytes == 2) {
1749 ret = ac_build_tbuffer_load_short(&ctx->ac,
1750 rsrc,
1751 offset,
1752 ctx->ac.i32_0,
1753 immoffset,
1754 cache_policy & ac_glc);
1755 } else {
1756 int num_channels = util_next_power_of_two(load_bytes) / 4;
1757 bool can_speculate = access & ACCESS_CAN_REORDER;
1758
1759 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1760 vindex, offset, immoffset, 0,
1761 cache_policy & ac_glc, 0,
1762 can_speculate, false);
1763 }
1764
1765 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1766 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1767 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1768
1769 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1770 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1771
1772 for (unsigned j = 0; j < num_elems; j++) {
1773 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1774 }
1775 i += num_elems;
1776 }
1777
1778 return ac_build_gather_values(&ctx->ac, results, num_components);
1779 }
1780
1781 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1782 const nir_intrinsic_instr *instr)
1783 {
1784 LLVMValueRef ret;
1785 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1786 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1787 int num_components = instr->num_components;
1788
1789 if (ctx->abi->load_ubo)
1790 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1791
1792 if (instr->dest.ssa.bit_size == 64)
1793 num_components *= 2;
1794
1795 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1796 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1797 LLVMValueRef results[num_components];
1798 for (unsigned i = 0; i < num_components; ++i) {
1799 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1800 load_bytes * i, 0);
1801
1802 if (load_bytes == 1) {
1803 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1804 rsrc,
1805 offset,
1806 ctx->ac.i32_0,
1807 immoffset,
1808 false);
1809 } else {
1810 assert(load_bytes == 2);
1811 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1812 rsrc,
1813 offset,
1814 ctx->ac.i32_0,
1815 immoffset,
1816 false);
1817 }
1818 }
1819 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1820 } else {
1821 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1822 NULL, 0, false, false, true, true);
1823
1824 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1825 }
1826
1827 return LLVMBuildBitCast(ctx->ac.builder, ret,
1828 get_def_type(ctx, &instr->dest.ssa), "");
1829 }
1830
1831 static void
1832 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1833 bool vs_in, unsigned *vertex_index_out,
1834 LLVMValueRef *vertex_index_ref,
1835 unsigned *const_out, LLVMValueRef *indir_out)
1836 {
1837 nir_variable *var = nir_deref_instr_get_variable(instr);
1838 nir_deref_path path;
1839 unsigned idx_lvl = 1;
1840
1841 nir_deref_path_init(&path, instr, NULL);
1842
1843 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1844 if (vertex_index_ref) {
1845 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1846 if (vertex_index_out)
1847 *vertex_index_out = 0;
1848 } else {
1849 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1850 }
1851 ++idx_lvl;
1852 }
1853
1854 uint32_t const_offset = 0;
1855 LLVMValueRef offset = NULL;
1856
1857 if (var->data.compact) {
1858 assert(instr->deref_type == nir_deref_type_array);
1859 const_offset = nir_src_as_uint(instr->arr.index);
1860 goto out;
1861 }
1862
1863 for (; path.path[idx_lvl]; ++idx_lvl) {
1864 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1865 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1866 unsigned index = path.path[idx_lvl]->strct.index;
1867
1868 for (unsigned i = 0; i < index; i++) {
1869 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1870 const_offset += glsl_count_attribute_slots(ft, vs_in);
1871 }
1872 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1873 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1874 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1875 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1876 if (offset)
1877 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1878 else
1879 offset = array_off;
1880 } else
1881 unreachable("Uhandled deref type in get_deref_instr_offset");
1882 }
1883
1884 out:
1885 nir_deref_path_finish(&path);
1886
1887 if (const_offset && offset)
1888 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1889 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1890 "");
1891
1892 *const_out = const_offset;
1893 *indir_out = offset;
1894 }
1895
1896 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1897 nir_intrinsic_instr *instr,
1898 bool load_inputs)
1899 {
1900 LLVMValueRef result;
1901 LLVMValueRef vertex_index = NULL;
1902 LLVMValueRef indir_index = NULL;
1903 unsigned const_index = 0;
1904
1905 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1906
1907 unsigned location = var->data.location;
1908 unsigned driver_location = var->data.driver_location;
1909 const bool is_patch = var->data.patch;
1910 const bool is_compact = var->data.compact;
1911
1912 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1913 false, NULL, is_patch ? NULL : &vertex_index,
1914 &const_index, &indir_index);
1915
1916 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1917
1918 LLVMTypeRef src_component_type;
1919 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1920 src_component_type = LLVMGetElementType(dest_type);
1921 else
1922 src_component_type = dest_type;
1923
1924 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1925 vertex_index, indir_index,
1926 const_index, location, driver_location,
1927 var->data.location_frac,
1928 instr->num_components,
1929 is_patch, is_compact, load_inputs);
1930 if (instr->dest.ssa.bit_size == 16) {
1931 result = ac_to_integer(&ctx->ac, result);
1932 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1933 }
1934 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1935 }
1936
1937 static unsigned
1938 type_scalar_size_bytes(const struct glsl_type *type)
1939 {
1940 assert(glsl_type_is_vector_or_scalar(type) ||
1941 glsl_type_is_matrix(type));
1942 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1943 }
1944
1945 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1946 nir_intrinsic_instr *instr)
1947 {
1948 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1949 nir_variable *var = nir_deref_instr_get_variable(deref);
1950
1951 LLVMValueRef values[8];
1952 int idx = 0;
1953 int ve = instr->dest.ssa.num_components;
1954 unsigned comp = 0;
1955 LLVMValueRef indir_index;
1956 LLVMValueRef ret;
1957 unsigned const_index;
1958 unsigned stride = 4;
1959 int mode = deref->mode;
1960
1961 if (var) {
1962 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1963 var->data.mode == nir_var_shader_in;
1964 idx = var->data.driver_location;
1965 comp = var->data.location_frac;
1966 mode = var->data.mode;
1967
1968 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1969 &const_index, &indir_index);
1970
1971 if (var->data.compact) {
1972 stride = 1;
1973 const_index += comp;
1974 comp = 0;
1975 }
1976 }
1977
1978 if (instr->dest.ssa.bit_size == 64 &&
1979 (deref->mode == nir_var_shader_in ||
1980 deref->mode == nir_var_shader_out ||
1981 deref->mode == nir_var_function_temp))
1982 ve *= 2;
1983
1984 switch (mode) {
1985 case nir_var_shader_in:
1986 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1987 ctx->stage == MESA_SHADER_TESS_EVAL) {
1988 return load_tess_varyings(ctx, instr, true);
1989 }
1990
1991 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1992 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1993 LLVMValueRef indir_index;
1994 unsigned const_index, vertex_index;
1995 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
1996 &const_index, &indir_index);
1997
1998 return ctx->abi->load_inputs(ctx->abi, var->data.location,
1999 var->data.driver_location,
2000 var->data.location_frac,
2001 instr->num_components, vertex_index, const_index, type);
2002 }
2003
2004 for (unsigned chan = comp; chan < ve + comp; chan++) {
2005 if (indir_index) {
2006 unsigned count = glsl_count_attribute_slots(
2007 var->type,
2008 ctx->stage == MESA_SHADER_VERTEX);
2009 count -= chan / 4;
2010 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2011 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2012 stride, false, true);
2013
2014 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2015 tmp_vec,
2016 indir_index, "");
2017 } else
2018 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2019 }
2020 break;
2021 case nir_var_function_temp:
2022 for (unsigned chan = 0; chan < ve; chan++) {
2023 if (indir_index) {
2024 unsigned count = glsl_count_attribute_slots(
2025 var->type, false);
2026 count -= chan / 4;
2027 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2028 &ctx->ac, ctx->locals + idx + chan, count,
2029 stride, true, true);
2030
2031 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2032 tmp_vec,
2033 indir_index, "");
2034 } else {
2035 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2036 }
2037 }
2038 break;
2039 case nir_var_mem_shared: {
2040 LLVMValueRef address = get_src(ctx, instr->src[0]);
2041 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2042 return LLVMBuildBitCast(ctx->ac.builder, val,
2043 get_def_type(ctx, &instr->dest.ssa),
2044 "");
2045 }
2046 case nir_var_shader_out:
2047 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2048 return load_tess_varyings(ctx, instr, false);
2049 }
2050
2051 for (unsigned chan = comp; chan < ve + comp; chan++) {
2052 if (indir_index) {
2053 unsigned count = glsl_count_attribute_slots(
2054 var->type, false);
2055 count -= chan / 4;
2056 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2057 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2058 stride, true, true);
2059
2060 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2061 tmp_vec,
2062 indir_index, "");
2063 } else {
2064 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2065 ctx->abi->outputs[idx + chan + const_index * stride],
2066 "");
2067 }
2068 }
2069 break;
2070 case nir_var_mem_global: {
2071 LLVMValueRef address = get_src(ctx, instr->src[0]);
2072 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2073 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2074 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2075
2076 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2077 if (stride != natural_stride) {
2078 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2079 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2080 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2081
2082 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2083 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2084 values[i] = LLVMBuildLoad(ctx->ac.builder,
2085 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2086 }
2087 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2088 } else {
2089 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2090 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2091 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2092 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2093 return val;
2094 }
2095 }
2096 default:
2097 unreachable("unhandle variable mode");
2098 }
2099 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2100 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2101 }
2102
2103 static void
2104 visit_store_var(struct ac_nir_context *ctx,
2105 nir_intrinsic_instr *instr)
2106 {
2107 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2108 nir_variable *var = nir_deref_instr_get_variable(deref);
2109
2110 LLVMValueRef temp_ptr, value;
2111 int idx = 0;
2112 unsigned comp = 0;
2113 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2114 int writemask = instr->const_index[0];
2115 LLVMValueRef indir_index;
2116 unsigned const_index;
2117
2118 if (var) {
2119 get_deref_offset(ctx, deref, false,
2120 NULL, NULL, &const_index, &indir_index);
2121 idx = var->data.driver_location;
2122 comp = var->data.location_frac;
2123
2124 if (var->data.compact) {
2125 const_index += comp;
2126 comp = 0;
2127 }
2128 }
2129
2130 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2131 (deref->mode == nir_var_shader_out ||
2132 deref->mode == nir_var_function_temp)) {
2133
2134 src = LLVMBuildBitCast(ctx->ac.builder, src,
2135 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2136 "");
2137
2138 writemask = widen_mask(writemask, 2);
2139 }
2140
2141 writemask = writemask << comp;
2142
2143 switch (deref->mode) {
2144 case nir_var_shader_out:
2145
2146 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2147 LLVMValueRef vertex_index = NULL;
2148 LLVMValueRef indir_index = NULL;
2149 unsigned const_index = 0;
2150 const bool is_patch = var->data.patch;
2151
2152 get_deref_offset(ctx, deref, false, NULL,
2153 is_patch ? NULL : &vertex_index,
2154 &const_index, &indir_index);
2155
2156 ctx->abi->store_tcs_outputs(ctx->abi, var,
2157 vertex_index, indir_index,
2158 const_index, src, writemask);
2159 return;
2160 }
2161
2162 for (unsigned chan = 0; chan < 8; chan++) {
2163 int stride = 4;
2164 if (!(writemask & (1 << chan)))
2165 continue;
2166
2167 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2168
2169 if (var->data.compact)
2170 stride = 1;
2171 if (indir_index) {
2172 unsigned count = glsl_count_attribute_slots(
2173 var->type, false);
2174 count -= chan / 4;
2175 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2176 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2177 stride, true, true);
2178
2179 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2180 value, indir_index, "");
2181 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2182 count, stride, tmp_vec);
2183
2184 } else {
2185 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2186
2187 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2188 }
2189 }
2190 break;
2191 case nir_var_function_temp:
2192 for (unsigned chan = 0; chan < 8; chan++) {
2193 if (!(writemask & (1 << chan)))
2194 continue;
2195
2196 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2197 if (indir_index) {
2198 unsigned count = glsl_count_attribute_slots(
2199 var->type, false);
2200 count -= chan / 4;
2201 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2202 &ctx->ac, ctx->locals + idx + chan, count,
2203 4, true, true);
2204
2205 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2206 value, indir_index, "");
2207 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2208 count, 4, tmp_vec);
2209 } else {
2210 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2211
2212 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2213 }
2214 }
2215 break;
2216
2217 case nir_var_mem_global:
2218 case nir_var_mem_shared: {
2219 int writemask = instr->const_index[0];
2220 LLVMValueRef address = get_src(ctx, instr->src[0]);
2221 LLVMValueRef val = get_src(ctx, instr->src[1]);
2222
2223 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2224 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2225 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2226
2227 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2228 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2229 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2230
2231 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2232 stride == natural_stride) {
2233 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2234 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2235 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2236
2237 val = LLVMBuildBitCast(ctx->ac.builder, val,
2238 LLVMGetElementType(LLVMTypeOf(address)), "");
2239 LLVMBuildStore(ctx->ac.builder, val, address);
2240 } else {
2241 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2242 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2243 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2244 for (unsigned chan = 0; chan < 4; chan++) {
2245 if (!(writemask & (1 << chan)))
2246 continue;
2247
2248 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2249
2250 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2251 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2252 chan);
2253 src = LLVMBuildBitCast(ctx->ac.builder, src,
2254 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2255 LLVMBuildStore(ctx->ac.builder, src, ptr);
2256 }
2257 }
2258 break;
2259 }
2260 default:
2261 abort();
2262 break;
2263 }
2264 }
2265
2266 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2267 {
2268 switch (dim) {
2269 case GLSL_SAMPLER_DIM_BUF:
2270 return 1;
2271 case GLSL_SAMPLER_DIM_1D:
2272 return array ? 2 : 1;
2273 case GLSL_SAMPLER_DIM_2D:
2274 return array ? 3 : 2;
2275 case GLSL_SAMPLER_DIM_MS:
2276 return array ? 4 : 3;
2277 case GLSL_SAMPLER_DIM_3D:
2278 case GLSL_SAMPLER_DIM_CUBE:
2279 return 3;
2280 case GLSL_SAMPLER_DIM_RECT:
2281 case GLSL_SAMPLER_DIM_SUBPASS:
2282 return 2;
2283 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2284 return 3;
2285 default:
2286 break;
2287 }
2288 return 0;
2289 }
2290
2291 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2292 LLVMValueRef coord_x, LLVMValueRef coord_y,
2293 LLVMValueRef coord_z,
2294 LLVMValueRef sample_index,
2295 LLVMValueRef fmask_desc_ptr)
2296 {
2297 unsigned sample_chan = coord_z ? 3 : 2;
2298 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2299 addr[sample_chan] = sample_index;
2300
2301 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2302 return addr[sample_chan];
2303 }
2304
2305 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2306 {
2307 assert(instr->src[0].is_ssa);
2308 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2309 }
2310
2311 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2312 const nir_intrinsic_instr *instr,
2313 enum ac_descriptor_type desc_type,
2314 bool write)
2315 {
2316 nir_deref_instr *deref_instr =
2317 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2318 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2319
2320 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2321 }
2322
2323 static void get_image_coords(struct ac_nir_context *ctx,
2324 const nir_intrinsic_instr *instr,
2325 struct ac_image_args *args,
2326 enum glsl_sampler_dim dim,
2327 bool is_array)
2328 {
2329 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2330 LLVMValueRef masks[] = {
2331 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2332 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2333 };
2334 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2335
2336 int count;
2337 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2338 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2339 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2340 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2341 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2342 count = image_type_to_components_count(dim, is_array);
2343
2344 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2345 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2346 LLVMValueRef fmask_load_address[3];
2347 int chan;
2348
2349 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2350 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2351 if (is_array)
2352 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2353 else
2354 fmask_load_address[2] = NULL;
2355 if (add_frag_pos) {
2356 for (chan = 0; chan < 2; ++chan)
2357 fmask_load_address[chan] =
2358 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2359 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2360 ctx->ac.i32, ""), "");
2361 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2362 }
2363 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2364 fmask_load_address[0],
2365 fmask_load_address[1],
2366 fmask_load_address[2],
2367 sample_index,
2368 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2369 AC_DESC_FMASK, &instr->instr, false, false));
2370 }
2371 if (count == 1 && !gfx9_1d) {
2372 if (instr->src[1].ssa->num_components)
2373 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2374 else
2375 args->coords[0] = src0;
2376 } else {
2377 int chan;
2378 if (is_ms)
2379 count--;
2380 for (chan = 0; chan < count; ++chan) {
2381 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2382 }
2383 if (add_frag_pos) {
2384 for (chan = 0; chan < 2; ++chan) {
2385 args->coords[chan] = LLVMBuildAdd(
2386 ctx->ac.builder, args->coords[chan],
2387 LLVMBuildFPToUI(
2388 ctx->ac.builder, ctx->abi->frag_pos[chan],
2389 ctx->ac.i32, ""), "");
2390 }
2391 args->coords[2] = ac_to_integer(&ctx->ac,
2392 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2393 count++;
2394 }
2395
2396 if (gfx9_1d) {
2397 if (is_array) {
2398 args->coords[2] = args->coords[1];
2399 args->coords[1] = ctx->ac.i32_0;
2400 } else
2401 args->coords[1] = ctx->ac.i32_0;
2402 count++;
2403 }
2404
2405 if (is_ms) {
2406 args->coords[count] = sample_index;
2407 count++;
2408 }
2409 }
2410 }
2411
2412 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2413 const nir_intrinsic_instr *instr,
2414 bool write, bool atomic)
2415 {
2416 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2417 if (ctx->abi->gfx9_stride_size_workaround ||
2418 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2419 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2420 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2421 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2422
2423 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2424 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2425 elem_count, stride, "");
2426
2427 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2428 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2429 }
2430 return rsrc;
2431 }
2432
2433 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2434 const nir_intrinsic_instr *instr,
2435 bool bindless)
2436 {
2437 LLVMValueRef res;
2438
2439 enum glsl_sampler_dim dim;
2440 enum gl_access_qualifier access;
2441 bool is_array;
2442 if (bindless) {
2443 dim = nir_intrinsic_image_dim(instr);
2444 access = nir_intrinsic_access(instr);
2445 is_array = nir_intrinsic_image_array(instr);
2446 } else {
2447 const nir_deref_instr *image_deref = get_image_deref(instr);
2448 const struct glsl_type *type = image_deref->type;
2449 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2450 dim = glsl_get_sampler_dim(type);
2451 access = var->data.image.access;
2452 is_array = glsl_sampler_type_is_array(type);
2453 }
2454
2455 struct ac_image_args args = {};
2456
2457 args.cache_policy = get_cache_policy(ctx, access, true, false, false);
2458
2459 if (dim == GLSL_SAMPLER_DIM_BUF) {
2460 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2461 unsigned num_channels = util_last_bit(mask);
2462 LLVMValueRef rsrc, vindex;
2463
2464 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2465 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2466 ctx->ac.i32_0, "");
2467
2468 bool can_speculate = access & ACCESS_CAN_REORDER;
2469 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2470 ctx->ac.i32_0, num_channels,
2471 !!(args.cache_policy & ac_glc),
2472 can_speculate);
2473 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2474
2475 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2476 res = ac_to_integer(&ctx->ac, res);
2477 } else {
2478 args.opcode = ac_image_load;
2479 get_image_coords(ctx, instr, &args, dim, is_array);
2480 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2481 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2482 args.dmask = 15;
2483 args.attributes = AC_FUNC_ATTR_READONLY;
2484
2485 res = ac_build_image_opcode(&ctx->ac, &args);
2486 }
2487 return res;
2488 }
2489
2490 static void visit_image_store(struct ac_nir_context *ctx,
2491 nir_intrinsic_instr *instr,
2492 bool bindless)
2493 {
2494
2495
2496 enum glsl_sampler_dim dim;
2497 enum gl_access_qualifier access;
2498 bool is_array;
2499 if (bindless) {
2500 dim = nir_intrinsic_image_dim(instr);
2501 access = nir_intrinsic_access(instr);
2502 is_array = nir_intrinsic_image_array(instr);
2503 } else {
2504 const nir_deref_instr *image_deref = get_image_deref(instr);
2505 const struct glsl_type *type = image_deref->type;
2506 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2507 dim = glsl_get_sampler_dim(type);
2508 access = var->data.image.access;
2509 is_array = glsl_sampler_type_is_array(type);
2510 }
2511
2512 bool writeonly_memory = access & ACCESS_NON_READABLE;
2513 struct ac_image_args args = {};
2514
2515 args.cache_policy = get_cache_policy(ctx, access, false, true, writeonly_memory);
2516
2517 if (dim == GLSL_SAMPLER_DIM_BUF) {
2518 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2519 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2520 unsigned src_channels = ac_get_llvm_num_components(src);
2521 LLVMValueRef vindex;
2522
2523 if (src_channels == 3)
2524 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2525
2526 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2527 get_src(ctx, instr->src[1]),
2528 ctx->ac.i32_0, "");
2529
2530 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2531 ctx->ac.i32_0, src_channels,
2532 args.cache_policy & ac_glc, false);
2533 } else {
2534 args.opcode = ac_image_store;
2535 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2536 get_image_coords(ctx, instr, &args, dim, is_array);
2537 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2538 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2539 args.dmask = 15;
2540
2541 ac_build_image_opcode(&ctx->ac, &args);
2542 }
2543
2544 }
2545
2546 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2547 const nir_intrinsic_instr *instr,
2548 bool bindless)
2549 {
2550 LLVMValueRef params[7];
2551 int param_count = 0;
2552
2553 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2554 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2555 const char *atomic_name;
2556 char intrinsic_name[64];
2557 enum ac_atomic_op atomic_subop;
2558 MAYBE_UNUSED int length;
2559
2560 enum glsl_sampler_dim dim;
2561 bool is_unsigned = false;
2562 bool is_array;
2563 if (bindless) {
2564 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2565 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2566 const GLenum format = nir_intrinsic_format(instr);
2567 assert(format == GL_R32UI || format == GL_R32I);
2568 is_unsigned = format == GL_R32UI;
2569 }
2570 dim = nir_intrinsic_image_dim(instr);
2571 is_array = nir_intrinsic_image_array(instr);
2572 } else {
2573 const struct glsl_type *type = get_image_deref(instr)->type;
2574 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2575 dim = glsl_get_sampler_dim(type);
2576 is_array = glsl_sampler_type_is_array(type);
2577 }
2578
2579 switch (instr->intrinsic) {
2580 case nir_intrinsic_bindless_image_atomic_add:
2581 case nir_intrinsic_image_deref_atomic_add:
2582 atomic_name = "add";
2583 atomic_subop = ac_atomic_add;
2584 break;
2585 case nir_intrinsic_bindless_image_atomic_min:
2586 case nir_intrinsic_image_deref_atomic_min:
2587 atomic_name = is_unsigned ? "umin" : "smin";
2588 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2589 break;
2590 case nir_intrinsic_bindless_image_atomic_max:
2591 case nir_intrinsic_image_deref_atomic_max:
2592 atomic_name = is_unsigned ? "umax" : "smax";
2593 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2594 break;
2595 case nir_intrinsic_bindless_image_atomic_and:
2596 case nir_intrinsic_image_deref_atomic_and:
2597 atomic_name = "and";
2598 atomic_subop = ac_atomic_and;
2599 break;
2600 case nir_intrinsic_bindless_image_atomic_or:
2601 case nir_intrinsic_image_deref_atomic_or:
2602 atomic_name = "or";
2603 atomic_subop = ac_atomic_or;
2604 break;
2605 case nir_intrinsic_bindless_image_atomic_xor:
2606 case nir_intrinsic_image_deref_atomic_xor:
2607 atomic_name = "xor";
2608 atomic_subop = ac_atomic_xor;
2609 break;
2610 case nir_intrinsic_bindless_image_atomic_exchange:
2611 case nir_intrinsic_image_deref_atomic_exchange:
2612 atomic_name = "swap";
2613 atomic_subop = ac_atomic_swap;
2614 break;
2615 case nir_intrinsic_bindless_image_atomic_comp_swap:
2616 case nir_intrinsic_image_deref_atomic_comp_swap:
2617 atomic_name = "cmpswap";
2618 atomic_subop = 0; /* not used */
2619 break;
2620 default:
2621 abort();
2622 }
2623
2624 if (cmpswap)
2625 params[param_count++] = get_src(ctx, instr->src[4]);
2626 params[param_count++] = get_src(ctx, instr->src[3]);
2627
2628 if (dim == GLSL_SAMPLER_DIM_BUF) {
2629 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2630 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2631 ctx->ac.i32_0, ""); /* vindex */
2632 params[param_count++] = ctx->ac.i32_0; /* voffset */
2633 if (HAVE_LLVM >= 0x900) {
2634 /* XXX: The new raw/struct atomic intrinsics are buggy
2635 * with LLVM 8, see r358579.
2636 */
2637 params[param_count++] = ctx->ac.i32_0; /* soffset */
2638 params[param_count++] = ctx->ac.i32_0; /* slc */
2639
2640 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2641 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2642 } else {
2643 params[param_count++] = ctx->ac.i1false; /* slc */
2644
2645 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2646 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2647 }
2648
2649 assert(length < sizeof(intrinsic_name));
2650 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2651 params, param_count, 0);
2652 } else {
2653 struct ac_image_args args = {};
2654 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2655 args.atomic = atomic_subop;
2656 args.data[0] = params[0];
2657 if (cmpswap)
2658 args.data[1] = params[1];
2659 get_image_coords(ctx, instr, &args, dim, is_array);
2660 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2661 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2662
2663 return ac_build_image_opcode(&ctx->ac, &args);
2664 }
2665 }
2666
2667 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2668 const nir_intrinsic_instr *instr,
2669 bool bindless)
2670 {
2671 enum glsl_sampler_dim dim;
2672 bool is_array;
2673 if (bindless) {
2674 dim = nir_intrinsic_image_dim(instr);
2675 is_array = nir_intrinsic_image_array(instr);
2676 } else {
2677 const struct glsl_type *type = get_image_deref(instr)->type;
2678 dim = glsl_get_sampler_dim(type);
2679 is_array = glsl_sampler_type_is_array(type);
2680 }
2681
2682 struct ac_image_args args = { 0 };
2683 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2684 args.dmask = 0xf;
2685 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2686 args.opcode = ac_image_get_resinfo;
2687 args.lod = ctx->ac.i32_0;
2688 args.attributes = AC_FUNC_ATTR_READNONE;
2689
2690 return ac_build_image_opcode(&ctx->ac, &args);
2691 }
2692
2693 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2694 const nir_intrinsic_instr *instr,
2695 bool bindless)
2696 {
2697 LLVMValueRef res;
2698
2699 enum glsl_sampler_dim dim;
2700 bool is_array;
2701 if (bindless) {
2702 dim = nir_intrinsic_image_dim(instr);
2703 is_array = nir_intrinsic_image_array(instr);
2704 } else {
2705 const struct glsl_type *type = get_image_deref(instr)->type;
2706 dim = glsl_get_sampler_dim(type);
2707 is_array = glsl_sampler_type_is_array(type);
2708 }
2709
2710 if (dim == GLSL_SAMPLER_DIM_BUF)
2711 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2712
2713 struct ac_image_args args = { 0 };
2714
2715 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2716 args.dmask = 0xf;
2717 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2718 args.opcode = ac_image_get_resinfo;
2719 args.lod = ctx->ac.i32_0;
2720 args.attributes = AC_FUNC_ATTR_READNONE;
2721
2722 res = ac_build_image_opcode(&ctx->ac, &args);
2723
2724 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2725
2726 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2727 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2728 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2729 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2730 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2731 }
2732 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2733 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2734 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2735 ctx->ac.i32_1, "");
2736
2737 }
2738 return res;
2739 }
2740
2741 static void emit_membar(struct ac_llvm_context *ac,
2742 const nir_intrinsic_instr *instr)
2743 {
2744 unsigned waitcnt = NOOP_WAITCNT;
2745
2746 switch (instr->intrinsic) {
2747 case nir_intrinsic_memory_barrier:
2748 case nir_intrinsic_group_memory_barrier:
2749 waitcnt &= VM_CNT & LGKM_CNT;
2750 break;
2751 case nir_intrinsic_memory_barrier_atomic_counter:
2752 case nir_intrinsic_memory_barrier_buffer:
2753 case nir_intrinsic_memory_barrier_image:
2754 waitcnt &= VM_CNT;
2755 break;
2756 case nir_intrinsic_memory_barrier_shared:
2757 waitcnt &= LGKM_CNT;
2758 break;
2759 default:
2760 break;
2761 }
2762 if (waitcnt != NOOP_WAITCNT)
2763 ac_build_waitcnt(ac, waitcnt);
2764 }
2765
2766 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2767 {
2768 /* GFX6 only (thanks to a hw bug workaround):
2769 * The real barrier instruction isn’t needed, because an entire patch
2770 * always fits into a single wave.
2771 */
2772 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2773 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2774 return;
2775 }
2776 ac_build_s_barrier(ac);
2777 }
2778
2779 static void emit_discard(struct ac_nir_context *ctx,
2780 const nir_intrinsic_instr *instr)
2781 {
2782 LLVMValueRef cond;
2783
2784 if (instr->intrinsic == nir_intrinsic_discard_if) {
2785 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2786 get_src(ctx, instr->src[0]),
2787 ctx->ac.i32_0, "");
2788 } else {
2789 assert(instr->intrinsic == nir_intrinsic_discard);
2790 cond = ctx->ac.i1false;
2791 }
2792
2793 ctx->abi->emit_kill(ctx->abi, cond);
2794 }
2795
2796 static LLVMValueRef
2797 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2798 {
2799 LLVMValueRef result;
2800 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2801 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2802 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2803
2804 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2805 }
2806
2807 static LLVMValueRef
2808 visit_load_subgroup_id(struct ac_nir_context *ctx)
2809 {
2810 if (ctx->stage == MESA_SHADER_COMPUTE) {
2811 LLVMValueRef result;
2812 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2813 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2814 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2815 } else {
2816 return LLVMConstInt(ctx->ac.i32, 0, false);
2817 }
2818 }
2819
2820 static LLVMValueRef
2821 visit_load_num_subgroups(struct ac_nir_context *ctx)
2822 {
2823 if (ctx->stage == MESA_SHADER_COMPUTE) {
2824 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2825 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2826 } else {
2827 return LLVMConstInt(ctx->ac.i32, 1, false);
2828 }
2829 }
2830
2831 static LLVMValueRef
2832 visit_first_invocation(struct ac_nir_context *ctx)
2833 {
2834 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2835
2836 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2837 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2838 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2839 "llvm.cttz.i64",
2840 ctx->ac.i64, args, 2,
2841 AC_FUNC_ATTR_NOUNWIND |
2842 AC_FUNC_ATTR_READNONE);
2843
2844 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2845 }
2846
2847 static LLVMValueRef
2848 visit_load_shared(struct ac_nir_context *ctx,
2849 const nir_intrinsic_instr *instr)
2850 {
2851 LLVMValueRef values[4], derived_ptr, index, ret;
2852
2853 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2854
2855 for (int chan = 0; chan < instr->num_components; chan++) {
2856 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2857 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2858 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2859 }
2860
2861 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2862 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2863 }
2864
2865 static void
2866 visit_store_shared(struct ac_nir_context *ctx,
2867 const nir_intrinsic_instr *instr)
2868 {
2869 LLVMValueRef derived_ptr, data,index;
2870 LLVMBuilderRef builder = ctx->ac.builder;
2871
2872 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2873 LLVMValueRef src = get_src(ctx, instr->src[0]);
2874
2875 int writemask = nir_intrinsic_write_mask(instr);
2876 for (int chan = 0; chan < 4; chan++) {
2877 if (!(writemask & (1 << chan))) {
2878 continue;
2879 }
2880 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2881 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2882 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2883 LLVMBuildStore(builder, data, derived_ptr);
2884 }
2885 }
2886
2887 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2888 const nir_intrinsic_instr *instr,
2889 LLVMValueRef ptr, int src_idx)
2890 {
2891 LLVMValueRef result;
2892 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2893
2894 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2895
2896 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2897 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2898 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2899 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2900 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2901 } else {
2902 LLVMAtomicRMWBinOp op;
2903 switch (instr->intrinsic) {
2904 case nir_intrinsic_shared_atomic_add:
2905 case nir_intrinsic_deref_atomic_add:
2906 op = LLVMAtomicRMWBinOpAdd;
2907 break;
2908 case nir_intrinsic_shared_atomic_umin:
2909 case nir_intrinsic_deref_atomic_umin:
2910 op = LLVMAtomicRMWBinOpUMin;
2911 break;
2912 case nir_intrinsic_shared_atomic_umax:
2913 case nir_intrinsic_deref_atomic_umax:
2914 op = LLVMAtomicRMWBinOpUMax;
2915 break;
2916 case nir_intrinsic_shared_atomic_imin:
2917 case nir_intrinsic_deref_atomic_imin:
2918 op = LLVMAtomicRMWBinOpMin;
2919 break;
2920 case nir_intrinsic_shared_atomic_imax:
2921 case nir_intrinsic_deref_atomic_imax:
2922 op = LLVMAtomicRMWBinOpMax;
2923 break;
2924 case nir_intrinsic_shared_atomic_and:
2925 case nir_intrinsic_deref_atomic_and:
2926 op = LLVMAtomicRMWBinOpAnd;
2927 break;
2928 case nir_intrinsic_shared_atomic_or:
2929 case nir_intrinsic_deref_atomic_or:
2930 op = LLVMAtomicRMWBinOpOr;
2931 break;
2932 case nir_intrinsic_shared_atomic_xor:
2933 case nir_intrinsic_deref_atomic_xor:
2934 op = LLVMAtomicRMWBinOpXor;
2935 break;
2936 case nir_intrinsic_shared_atomic_exchange:
2937 case nir_intrinsic_deref_atomic_exchange:
2938 op = LLVMAtomicRMWBinOpXchg;
2939 break;
2940 default:
2941 return NULL;
2942 }
2943
2944 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2945 }
2946 return result;
2947 }
2948
2949 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2950 {
2951 LLVMValueRef values[2];
2952 LLVMValueRef pos[2];
2953
2954 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2955 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2956
2957 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2958 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2959 return ac_build_gather_values(&ctx->ac, values, 2);
2960 }
2961
2962 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2963 const nir_intrinsic_instr *instr)
2964 {
2965 LLVMValueRef result[4];
2966 LLVMValueRef interp_param;
2967 unsigned location;
2968 unsigned chan;
2969 LLVMValueRef src_c0 = NULL;
2970 LLVMValueRef src_c1 = NULL;
2971 LLVMValueRef src0 = NULL;
2972
2973 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2974 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
2975 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
2976 switch (instr->intrinsic) {
2977 case nir_intrinsic_interp_deref_at_centroid:
2978 location = INTERP_CENTROID;
2979 break;
2980 case nir_intrinsic_interp_deref_at_sample:
2981 case nir_intrinsic_interp_deref_at_offset:
2982 location = INTERP_CENTER;
2983 src0 = get_src(ctx, instr->src[1]);
2984 break;
2985 default:
2986 break;
2987 }
2988
2989 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2990 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2991 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2992 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
2993 LLVMValueRef sample_position;
2994 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
2995
2996 /* fetch sample ID */
2997 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
2998
2999 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
3000 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3001 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
3002 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3003 }
3004 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3005
3006 if (location == INTERP_CENTER) {
3007 LLVMValueRef ij_out[2];
3008 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3009
3010 /*
3011 * take the I then J parameters, and the DDX/Y for it, and
3012 * calculate the IJ inputs for the interpolator.
3013 * temp1 = ddx * offset/sample.x + I;
3014 * interp_param.I = ddy * offset/sample.y + temp1;
3015 * temp1 = ddx * offset/sample.x + J;
3016 * interp_param.J = ddy * offset/sample.y + temp1;
3017 */
3018 for (unsigned i = 0; i < 2; i++) {
3019 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3020 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3021 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3022 ddxy_out, ix_ll, "");
3023 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3024 ddxy_out, iy_ll, "");
3025 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3026 interp_param, ix_ll, "");
3027 LLVMValueRef temp1, temp2;
3028
3029 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3030 ctx->ac.f32, "");
3031
3032 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3033 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3034
3035 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3036 temp2, ctx->ac.i32, "");
3037 }
3038 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3039
3040 }
3041
3042 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3043 while(deref_instr->deref_type != nir_deref_type_var) {
3044 if (deref_instr->deref_type == nir_deref_type_array) {
3045 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3046
3047 LLVMValueRef offset;
3048 if (nir_src_is_const(deref_instr->arr.index)) {
3049 offset = LLVMConstInt(ctx->ac.i32, array_size * nir_src_as_uint(deref_instr->arr.index), false);
3050 } else {
3051 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3052
3053 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3054 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3055 }
3056
3057 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3058 deref_instr = nir_src_as_deref(deref_instr->parent);
3059 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3060 LLVMValueRef offset;
3061 unsigned sidx = deref_instr->strct.index;
3062 deref_instr = nir_src_as_deref(deref_instr->parent);
3063 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3064 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3065 } else {
3066 unreachable("Unsupported deref type");
3067 }
3068
3069 }
3070
3071 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3072 for (chan = 0; chan < 4; chan++) {
3073 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3074 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3075
3076 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3077 LLVMValueRef v, attr_number;
3078
3079 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3080 if (interp_param) {
3081 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3082 interp_param, ctx->ac.v2f32, "");
3083 LLVMValueRef i = LLVMBuildExtractElement(
3084 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3085 LLVMValueRef j = LLVMBuildExtractElement(
3086 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3087
3088 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3089 ctx->abi->prim_mask, i, j);
3090 } else {
3091 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3092 llvm_chan, attr_number, ctx->abi->prim_mask);
3093 }
3094
3095 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3096 LLVMConstInt(ctx->ac.i32, idx, false), "");
3097 }
3098
3099 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3100
3101 }
3102 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3103 var->data.location_frac);
3104 }
3105
3106 static void visit_intrinsic(struct ac_nir_context *ctx,
3107 nir_intrinsic_instr *instr)
3108 {
3109 LLVMValueRef result = NULL;
3110
3111 switch (instr->intrinsic) {
3112 case nir_intrinsic_ballot:
3113 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3114 break;
3115 case nir_intrinsic_read_invocation:
3116 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3117 get_src(ctx, instr->src[1]));
3118 break;
3119 case nir_intrinsic_read_first_invocation:
3120 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3121 break;
3122 case nir_intrinsic_load_subgroup_invocation:
3123 result = ac_get_thread_id(&ctx->ac);
3124 break;
3125 case nir_intrinsic_load_work_group_id: {
3126 LLVMValueRef values[3];
3127
3128 for (int i = 0; i < 3; i++) {
3129 values[i] = ctx->abi->workgroup_ids[i] ?
3130 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3131 }
3132
3133 result = ac_build_gather_values(&ctx->ac, values, 3);
3134 break;
3135 }
3136 case nir_intrinsic_load_base_vertex:
3137 case nir_intrinsic_load_first_vertex:
3138 result = ctx->abi->load_base_vertex(ctx->abi);
3139 break;
3140 case nir_intrinsic_load_local_group_size:
3141 result = ctx->abi->load_local_group_size(ctx->abi);
3142 break;
3143 case nir_intrinsic_load_vertex_id:
3144 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3145 ctx->abi->base_vertex, "");
3146 break;
3147 case nir_intrinsic_load_vertex_id_zero_base: {
3148 result = ctx->abi->vertex_id;
3149 break;
3150 }
3151 case nir_intrinsic_load_local_invocation_id: {
3152 result = ctx->abi->local_invocation_ids;
3153 break;
3154 }
3155 case nir_intrinsic_load_base_instance:
3156 result = ctx->abi->start_instance;
3157 break;
3158 case nir_intrinsic_load_draw_id:
3159 result = ctx->abi->draw_id;
3160 break;
3161 case nir_intrinsic_load_view_index:
3162 result = ctx->abi->view_index;
3163 break;
3164 case nir_intrinsic_load_invocation_id:
3165 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3166 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3167 else
3168 result = ctx->abi->gs_invocation_id;
3169 break;
3170 case nir_intrinsic_load_primitive_id:
3171 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3172 result = ctx->abi->gs_prim_id;
3173 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3174 result = ctx->abi->tcs_patch_id;
3175 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3176 result = ctx->abi->tes_patch_id;
3177 } else
3178 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3179 break;
3180 case nir_intrinsic_load_sample_id:
3181 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3182 break;
3183 case nir_intrinsic_load_sample_pos:
3184 result = load_sample_pos(ctx);
3185 break;
3186 case nir_intrinsic_load_sample_mask_in:
3187 result = ctx->abi->load_sample_mask_in(ctx->abi);
3188 break;
3189 case nir_intrinsic_load_frag_coord: {
3190 LLVMValueRef values[4] = {
3191 ctx->abi->frag_pos[0],
3192 ctx->abi->frag_pos[1],
3193 ctx->abi->frag_pos[2],
3194 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3195 };
3196 result = ac_to_integer(&ctx->ac,
3197 ac_build_gather_values(&ctx->ac, values, 4));
3198 break;
3199 }
3200 case nir_intrinsic_load_front_face:
3201 result = ctx->abi->front_face;
3202 break;
3203 case nir_intrinsic_load_helper_invocation:
3204 result = ac_build_load_helper_invocation(&ctx->ac);
3205 break;
3206 case nir_intrinsic_load_instance_id:
3207 result = ctx->abi->instance_id;
3208 break;
3209 case nir_intrinsic_load_num_work_groups:
3210 result = ctx->abi->num_work_groups;
3211 break;
3212 case nir_intrinsic_load_local_invocation_index:
3213 result = visit_load_local_invocation_index(ctx);
3214 break;
3215 case nir_intrinsic_load_subgroup_id:
3216 result = visit_load_subgroup_id(ctx);
3217 break;
3218 case nir_intrinsic_load_num_subgroups:
3219 result = visit_load_num_subgroups(ctx);
3220 break;
3221 case nir_intrinsic_first_invocation:
3222 result = visit_first_invocation(ctx);
3223 break;
3224 case nir_intrinsic_load_push_constant:
3225 result = visit_load_push_constant(ctx, instr);
3226 break;
3227 case nir_intrinsic_vulkan_resource_index: {
3228 LLVMValueRef index = get_src(ctx, instr->src[0]);
3229 unsigned desc_set = nir_intrinsic_desc_set(instr);
3230 unsigned binding = nir_intrinsic_binding(instr);
3231
3232 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3233 binding);
3234 break;
3235 }
3236 case nir_intrinsic_vulkan_resource_reindex:
3237 result = visit_vulkan_resource_reindex(ctx, instr);
3238 break;
3239 case nir_intrinsic_store_ssbo:
3240 visit_store_ssbo(ctx, instr);
3241 break;
3242 case nir_intrinsic_load_ssbo:
3243 result = visit_load_buffer(ctx, instr);
3244 break;
3245 case nir_intrinsic_ssbo_atomic_add:
3246 case nir_intrinsic_ssbo_atomic_imin:
3247 case nir_intrinsic_ssbo_atomic_umin:
3248 case nir_intrinsic_ssbo_atomic_imax:
3249 case nir_intrinsic_ssbo_atomic_umax:
3250 case nir_intrinsic_ssbo_atomic_and:
3251 case nir_intrinsic_ssbo_atomic_or:
3252 case nir_intrinsic_ssbo_atomic_xor:
3253 case nir_intrinsic_ssbo_atomic_exchange:
3254 case nir_intrinsic_ssbo_atomic_comp_swap:
3255 result = visit_atomic_ssbo(ctx, instr);
3256 break;
3257 case nir_intrinsic_load_ubo:
3258 result = visit_load_ubo_buffer(ctx, instr);
3259 break;
3260 case nir_intrinsic_get_buffer_size:
3261 result = visit_get_buffer_size(ctx, instr);
3262 break;
3263 case nir_intrinsic_load_deref:
3264 result = visit_load_var(ctx, instr);
3265 break;
3266 case nir_intrinsic_store_deref:
3267 visit_store_var(ctx, instr);
3268 break;
3269 case nir_intrinsic_load_shared:
3270 result = visit_load_shared(ctx, instr);
3271 break;
3272 case nir_intrinsic_store_shared:
3273 visit_store_shared(ctx, instr);
3274 break;
3275 case nir_intrinsic_bindless_image_samples:
3276 result = visit_image_samples(ctx, instr, true);
3277 break;
3278 case nir_intrinsic_image_deref_samples:
3279 result = visit_image_samples(ctx, instr, false);
3280 break;
3281 case nir_intrinsic_bindless_image_load:
3282 result = visit_image_load(ctx, instr, true);
3283 break;
3284 case nir_intrinsic_image_deref_load:
3285 result = visit_image_load(ctx, instr, false);
3286 break;
3287 case nir_intrinsic_bindless_image_store:
3288 visit_image_store(ctx, instr, true);
3289 break;
3290 case nir_intrinsic_image_deref_store:
3291 visit_image_store(ctx, instr, false);
3292 break;
3293 case nir_intrinsic_bindless_image_atomic_add:
3294 case nir_intrinsic_bindless_image_atomic_min:
3295 case nir_intrinsic_bindless_image_atomic_max:
3296 case nir_intrinsic_bindless_image_atomic_and:
3297 case nir_intrinsic_bindless_image_atomic_or:
3298 case nir_intrinsic_bindless_image_atomic_xor:
3299 case nir_intrinsic_bindless_image_atomic_exchange:
3300 case nir_intrinsic_bindless_image_atomic_comp_swap:
3301 result = visit_image_atomic(ctx, instr, true);
3302 break;
3303 case nir_intrinsic_image_deref_atomic_add:
3304 case nir_intrinsic_image_deref_atomic_min:
3305 case nir_intrinsic_image_deref_atomic_max:
3306 case nir_intrinsic_image_deref_atomic_and:
3307 case nir_intrinsic_image_deref_atomic_or:
3308 case nir_intrinsic_image_deref_atomic_xor:
3309 case nir_intrinsic_image_deref_atomic_exchange:
3310 case nir_intrinsic_image_deref_atomic_comp_swap:
3311 result = visit_image_atomic(ctx, instr, false);
3312 break;
3313 case nir_intrinsic_bindless_image_size:
3314 result = visit_image_size(ctx, instr, true);
3315 break;
3316 case nir_intrinsic_image_deref_size:
3317 result = visit_image_size(ctx, instr, false);
3318 break;
3319 case nir_intrinsic_shader_clock:
3320 result = ac_build_shader_clock(&ctx->ac);
3321 break;
3322 case nir_intrinsic_discard:
3323 case nir_intrinsic_discard_if:
3324 emit_discard(ctx, instr);
3325 break;
3326 case nir_intrinsic_memory_barrier:
3327 case nir_intrinsic_group_memory_barrier:
3328 case nir_intrinsic_memory_barrier_atomic_counter:
3329 case nir_intrinsic_memory_barrier_buffer:
3330 case nir_intrinsic_memory_barrier_image:
3331 case nir_intrinsic_memory_barrier_shared:
3332 emit_membar(&ctx->ac, instr);
3333 break;
3334 case nir_intrinsic_barrier:
3335 ac_emit_barrier(&ctx->ac, ctx->stage);
3336 break;
3337 case nir_intrinsic_shared_atomic_add:
3338 case nir_intrinsic_shared_atomic_imin:
3339 case nir_intrinsic_shared_atomic_umin:
3340 case nir_intrinsic_shared_atomic_imax:
3341 case nir_intrinsic_shared_atomic_umax:
3342 case nir_intrinsic_shared_atomic_and:
3343 case nir_intrinsic_shared_atomic_or:
3344 case nir_intrinsic_shared_atomic_xor:
3345 case nir_intrinsic_shared_atomic_exchange:
3346 case nir_intrinsic_shared_atomic_comp_swap: {
3347 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3348 result = visit_var_atomic(ctx, instr, ptr, 1);
3349 break;
3350 }
3351 case nir_intrinsic_deref_atomic_add:
3352 case nir_intrinsic_deref_atomic_imin:
3353 case nir_intrinsic_deref_atomic_umin:
3354 case nir_intrinsic_deref_atomic_imax:
3355 case nir_intrinsic_deref_atomic_umax:
3356 case nir_intrinsic_deref_atomic_and:
3357 case nir_intrinsic_deref_atomic_or:
3358 case nir_intrinsic_deref_atomic_xor:
3359 case nir_intrinsic_deref_atomic_exchange:
3360 case nir_intrinsic_deref_atomic_comp_swap: {
3361 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3362 result = visit_var_atomic(ctx, instr, ptr, 1);
3363 break;
3364 }
3365 case nir_intrinsic_interp_deref_at_centroid:
3366 case nir_intrinsic_interp_deref_at_sample:
3367 case nir_intrinsic_interp_deref_at_offset:
3368 result = visit_interp(ctx, instr);
3369 break;
3370 case nir_intrinsic_emit_vertex:
3371 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3372 break;
3373 case nir_intrinsic_end_primitive:
3374 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3375 break;
3376 case nir_intrinsic_load_tess_coord:
3377 result = ctx->abi->load_tess_coord(ctx->abi);
3378 break;
3379 case nir_intrinsic_load_tess_level_outer:
3380 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3381 break;
3382 case nir_intrinsic_load_tess_level_inner:
3383 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3384 break;
3385 case nir_intrinsic_load_patch_vertices_in:
3386 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3387 break;
3388 case nir_intrinsic_vote_all: {
3389 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3390 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3391 break;
3392 }
3393 case nir_intrinsic_vote_any: {
3394 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3395 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3396 break;
3397 }
3398 case nir_intrinsic_shuffle:
3399 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3400 get_src(ctx, instr->src[1]));
3401 break;
3402 case nir_intrinsic_reduce:
3403 result = ac_build_reduce(&ctx->ac,
3404 get_src(ctx, instr->src[0]),
3405 instr->const_index[0],
3406 instr->const_index[1]);
3407 break;
3408 case nir_intrinsic_inclusive_scan:
3409 result = ac_build_inclusive_scan(&ctx->ac,
3410 get_src(ctx, instr->src[0]),
3411 instr->const_index[0]);
3412 break;
3413 case nir_intrinsic_exclusive_scan:
3414 result = ac_build_exclusive_scan(&ctx->ac,
3415 get_src(ctx, instr->src[0]),
3416 instr->const_index[0]);
3417 break;
3418 case nir_intrinsic_quad_broadcast: {
3419 unsigned lane = nir_src_as_uint(instr->src[1]);
3420 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3421 lane, lane, lane, lane);
3422 break;
3423 }
3424 case nir_intrinsic_quad_swap_horizontal:
3425 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3426 break;
3427 case nir_intrinsic_quad_swap_vertical:
3428 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3429 break;
3430 case nir_intrinsic_quad_swap_diagonal:
3431 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3432 break;
3433 case nir_intrinsic_quad_swizzle_amd: {
3434 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3435 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3436 mask & 0x3, (mask >> 2) & 0x3,
3437 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3438 break;
3439 }
3440 case nir_intrinsic_masked_swizzle_amd: {
3441 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3442 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3443 break;
3444 }
3445 case nir_intrinsic_write_invocation_amd:
3446 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3447 get_src(ctx, instr->src[1]),
3448 get_src(ctx, instr->src[2]));
3449 break;
3450 case nir_intrinsic_mbcnt_amd:
3451 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3452 break;
3453 default:
3454 fprintf(stderr, "Unknown intrinsic: ");
3455 nir_print_instr(&instr->instr, stderr);
3456 fprintf(stderr, "\n");
3457 break;
3458 }
3459 if (result) {
3460 ctx->ssa_defs[instr->dest.ssa.index] = result;
3461 }
3462 }
3463
3464 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3465 unsigned base_index,
3466 unsigned constant_index,
3467 LLVMValueRef dynamic_index)
3468 {
3469 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3470 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3471 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3472
3473 /* Bindless uniforms are 64bit so multiple index by 8 */
3474 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3475 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3476
3477 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3478
3479 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3480 NULL, 0, false, false, true, true);
3481
3482 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3483 }
3484
3485 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3486 nir_deref_instr *deref_instr,
3487 enum ac_descriptor_type desc_type,
3488 const nir_instr *instr,
3489 bool image, bool write)
3490 {
3491 LLVMValueRef index = NULL;
3492 unsigned constant_index = 0;
3493 unsigned descriptor_set;
3494 unsigned base_index;
3495 bool bindless = false;
3496
3497 if (!deref_instr) {
3498 descriptor_set = 0;
3499 if (image) {
3500 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3501 base_index = 0;
3502 bindless = true;
3503 index = get_src(ctx, img_instr->src[0]);
3504 } else {
3505 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3506 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3507 nir_tex_src_sampler_handle);
3508 if (sampSrcIdx != -1) {
3509 base_index = 0;
3510 bindless = true;
3511 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3512 } else {
3513 assert(tex_instr && !image);
3514 base_index = tex_instr->sampler_index;
3515 }
3516 }
3517 } else {
3518 while(deref_instr->deref_type != nir_deref_type_var) {
3519 if (deref_instr->deref_type == nir_deref_type_array) {
3520 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3521 if (!array_size)
3522 array_size = 1;
3523
3524 if (nir_src_is_const(deref_instr->arr.index)) {
3525 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3526 } else {
3527 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3528
3529 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3530 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3531
3532 if (!index)
3533 index = indirect;
3534 else
3535 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3536 }
3537
3538 deref_instr = nir_src_as_deref(deref_instr->parent);
3539 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3540 unsigned sidx = deref_instr->strct.index;
3541 deref_instr = nir_src_as_deref(deref_instr->parent);
3542 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3543 } else {
3544 unreachable("Unsupported deref type");
3545 }
3546 }
3547 descriptor_set = deref_instr->var->data.descriptor_set;
3548
3549 if (deref_instr->var->data.bindless) {
3550 /* For now just assert on unhandled variable types */
3551 assert(deref_instr->var->data.mode == nir_var_uniform);
3552
3553 base_index = deref_instr->var->data.driver_location;
3554 bindless = true;
3555
3556 index = index ? index : ctx->ac.i32_0;
3557 index = get_bindless_index_from_uniform(ctx, base_index,
3558 constant_index, index);
3559 } else
3560 base_index = deref_instr->var->data.binding;
3561 }
3562
3563 return ctx->abi->load_sampler_desc(ctx->abi,
3564 descriptor_set,
3565 base_index,
3566 constant_index, index,
3567 desc_type, image, write, bindless);
3568 }
3569
3570 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3571 *
3572 * GFX6-GFX7:
3573 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3574 * filtering manually. The driver sets img7 to a mask clearing
3575 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3576 * s_and_b32 samp0, samp0, img7
3577 *
3578 * GFX8:
3579 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3580 */
3581 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3582 LLVMValueRef res, LLVMValueRef samp)
3583 {
3584 LLVMBuilderRef builder = ctx->ac.builder;
3585 LLVMValueRef img7, samp0;
3586
3587 if (ctx->ac.chip_class >= GFX8)
3588 return samp;
3589
3590 img7 = LLVMBuildExtractElement(builder, res,
3591 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3592 samp0 = LLVMBuildExtractElement(builder, samp,
3593 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3594 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3595 return LLVMBuildInsertElement(builder, samp, samp0,
3596 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3597 }
3598
3599 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3600 nir_tex_instr *instr,
3601 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3602 LLVMValueRef *fmask_ptr)
3603 {
3604 nir_deref_instr *texture_deref_instr = NULL;
3605 nir_deref_instr *sampler_deref_instr = NULL;
3606 int plane = -1;
3607
3608 for (unsigned i = 0; i < instr->num_srcs; i++) {
3609 switch (instr->src[i].src_type) {
3610 case nir_tex_src_texture_deref:
3611 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3612 break;
3613 case nir_tex_src_sampler_deref:
3614 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3615 break;
3616 case nir_tex_src_plane:
3617 plane = nir_src_as_int(instr->src[i].src);
3618 break;
3619 default:
3620 break;
3621 }
3622 }
3623
3624 if (!sampler_deref_instr)
3625 sampler_deref_instr = texture_deref_instr;
3626
3627 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3628
3629 if (plane >= 0) {
3630 assert(instr->op != nir_texop_txf_ms &&
3631 instr->op != nir_texop_samples_identical);
3632 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3633
3634 main_descriptor = AC_DESC_PLANE_0 + plane;
3635 }
3636
3637 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3638
3639 if (samp_ptr) {
3640 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3641 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3642 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3643 }
3644 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3645 instr->op == nir_texop_samples_identical))
3646 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3647 }
3648
3649 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3650 LLVMValueRef coord)
3651 {
3652 coord = ac_to_float(ctx, coord);
3653 coord = ac_build_round(ctx, coord);
3654 coord = ac_to_integer(ctx, coord);
3655 return coord;
3656 }
3657
3658 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3659 {
3660 LLVMValueRef result = NULL;
3661 struct ac_image_args args = { 0 };
3662 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3663 LLVMValueRef ddx = NULL, ddy = NULL;
3664 unsigned offset_src = 0;
3665
3666 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3667
3668 for (unsigned i = 0; i < instr->num_srcs; i++) {
3669 switch (instr->src[i].src_type) {
3670 case nir_tex_src_coord: {
3671 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3672 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3673 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3674 break;
3675 }
3676 case nir_tex_src_projector:
3677 break;
3678 case nir_tex_src_comparator:
3679 if (instr->is_shadow)
3680 args.compare = get_src(ctx, instr->src[i].src);
3681 break;
3682 case nir_tex_src_offset:
3683 args.offset = get_src(ctx, instr->src[i].src);
3684 offset_src = i;
3685 break;
3686 case nir_tex_src_bias:
3687 if (instr->op == nir_texop_txb)
3688 args.bias = get_src(ctx, instr->src[i].src);
3689 break;
3690 case nir_tex_src_lod: {
3691 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3692 args.level_zero = true;
3693 else
3694 args.lod = get_src(ctx, instr->src[i].src);
3695 break;
3696 }
3697 case nir_tex_src_ms_index:
3698 sample_index = get_src(ctx, instr->src[i].src);
3699 break;
3700 case nir_tex_src_ms_mcs:
3701 break;
3702 case nir_tex_src_ddx:
3703 ddx = get_src(ctx, instr->src[i].src);
3704 break;
3705 case nir_tex_src_ddy:
3706 ddy = get_src(ctx, instr->src[i].src);
3707 break;
3708 case nir_tex_src_texture_offset:
3709 case nir_tex_src_sampler_offset:
3710 case nir_tex_src_plane:
3711 default:
3712 break;
3713 }
3714 }
3715
3716 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3717 result = get_buffer_size(ctx, args.resource, true);
3718 goto write_result;
3719 }
3720
3721 if (instr->op == nir_texop_texture_samples) {
3722 LLVMValueRef res, samples, is_msaa;
3723 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3724 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3725 LLVMConstInt(ctx->ac.i32, 3, false), "");
3726 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3727 LLVMConstInt(ctx->ac.i32, 28, false), "");
3728 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3729 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3730 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3731 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3732
3733 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3734 LLVMConstInt(ctx->ac.i32, 16, false), "");
3735 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3736 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3737 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3738 samples, "");
3739 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3740 ctx->ac.i32_1, "");
3741 result = samples;
3742 goto write_result;
3743 }
3744
3745 if (args.offset && instr->op != nir_texop_txf) {
3746 LLVMValueRef offset[3], pack;
3747 for (unsigned chan = 0; chan < 3; ++chan)
3748 offset[chan] = ctx->ac.i32_0;
3749
3750 unsigned num_components = ac_get_llvm_num_components(args.offset);
3751 for (unsigned chan = 0; chan < num_components; chan++) {
3752 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3753 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3754 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3755 if (chan)
3756 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3757 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3758 }
3759 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3760 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3761 args.offset = pack;
3762 }
3763
3764 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3765 * so the depth comparison value isn't clamped for Z16 and
3766 * Z24 anymore. Do it manually here.
3767 *
3768 * It's unnecessary if the original texture format was
3769 * Z32_FLOAT, but we don't know that here.
3770 */
3771 if (args.compare && ctx->ac.chip_class >= GFX8 && ctx->abi->clamp_shadow_reference)
3772 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3773
3774 /* pack derivatives */
3775 if (ddx || ddy) {
3776 int num_src_deriv_channels, num_dest_deriv_channels;
3777 switch (instr->sampler_dim) {
3778 case GLSL_SAMPLER_DIM_3D:
3779 case GLSL_SAMPLER_DIM_CUBE:
3780 num_src_deriv_channels = 3;
3781 num_dest_deriv_channels = 3;
3782 break;
3783 case GLSL_SAMPLER_DIM_2D:
3784 default:
3785 num_src_deriv_channels = 2;
3786 num_dest_deriv_channels = 2;
3787 break;
3788 case GLSL_SAMPLER_DIM_1D:
3789 num_src_deriv_channels = 1;
3790 if (ctx->ac.chip_class >= GFX9) {
3791 num_dest_deriv_channels = 2;
3792 } else {
3793 num_dest_deriv_channels = 1;
3794 }
3795 break;
3796 }
3797
3798 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3799 args.derivs[i] = ac_to_float(&ctx->ac,
3800 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3801 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3802 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3803 }
3804 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3805 args.derivs[i] = ctx->ac.f32_0;
3806 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3807 }
3808 }
3809
3810 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3811 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3812 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3813 if (instr->coord_components == 3)
3814 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3815 ac_prepare_cube_coords(&ctx->ac,
3816 instr->op == nir_texop_txd, instr->is_array,
3817 instr->op == nir_texop_lod, args.coords, args.derivs);
3818 }
3819
3820 /* Texture coordinates fixups */
3821 if (instr->coord_components > 1 &&
3822 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3823 instr->is_array &&
3824 instr->op != nir_texop_txf) {
3825 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3826 }
3827
3828 if (instr->coord_components > 2 &&
3829 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3830 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3831 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3832 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3833 instr->is_array &&
3834 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3835 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3836 }
3837
3838 if (ctx->ac.chip_class >= GFX9 &&
3839 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3840 instr->op != nir_texop_lod) {
3841 LLVMValueRef filler;
3842 if (instr->op == nir_texop_txf)
3843 filler = ctx->ac.i32_0;
3844 else
3845 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3846
3847 if (instr->is_array)
3848 args.coords[2] = args.coords[1];
3849 args.coords[1] = filler;
3850 }
3851
3852 /* Pack sample index */
3853 if (instr->op == nir_texop_txf_ms && sample_index)
3854 args.coords[instr->coord_components] = sample_index;
3855
3856 if (instr->op == nir_texop_samples_identical) {
3857 struct ac_image_args txf_args = { 0 };
3858 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3859
3860 txf_args.dmask = 0xf;
3861 txf_args.resource = fmask_ptr;
3862 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3863 result = build_tex_intrinsic(ctx, instr, &txf_args);
3864
3865 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3866 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3867 goto write_result;
3868 }
3869
3870 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3871 instr->op != nir_texop_txs) {
3872 unsigned sample_chan = instr->is_array ? 3 : 2;
3873 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3874 &ctx->ac, args.coords[0], args.coords[1],
3875 instr->is_array ? args.coords[2] : NULL,
3876 args.coords[sample_chan], fmask_ptr);
3877 }
3878
3879 if (args.offset && instr->op == nir_texop_txf) {
3880 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3881 num_offsets = MIN2(num_offsets, instr->coord_components);
3882 for (unsigned i = 0; i < num_offsets; ++i) {
3883 args.coords[i] = LLVMBuildAdd(
3884 ctx->ac.builder, args.coords[i],
3885 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3886 }
3887 args.offset = NULL;
3888 }
3889
3890 /* DMASK was repurposed for GATHER4. 4 components are always
3891 * returned and DMASK works like a swizzle - it selects
3892 * the component to fetch. The only valid DMASK values are
3893 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
3894 * (red,red,red,red) etc.) The ISA document doesn't mention
3895 * this.
3896 */
3897 args.dmask = 0xf;
3898 if (instr->op == nir_texop_tg4) {
3899 if (instr->is_shadow)
3900 args.dmask = 1;
3901 else
3902 args.dmask = 1 << instr->component;
3903 }
3904
3905 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3906 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3907 result = build_tex_intrinsic(ctx, instr, &args);
3908
3909 if (instr->op == nir_texop_query_levels)
3910 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3911 else if (instr->is_shadow && instr->is_new_style_shadow &&
3912 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3913 instr->op != nir_texop_tg4)
3914 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3915 else if (instr->op == nir_texop_txs &&
3916 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3917 instr->is_array) {
3918 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3919 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3920 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3921 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3922 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3923 } else if (ctx->ac.chip_class >= GFX9 &&
3924 instr->op == nir_texop_txs &&
3925 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3926 instr->is_array) {
3927 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3928 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3929 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3930 ctx->ac.i32_1, "");
3931 } else if (instr->dest.ssa.num_components != 4)
3932 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3933
3934 write_result:
3935 if (result) {
3936 assert(instr->dest.is_ssa);
3937 result = ac_to_integer(&ctx->ac, result);
3938 ctx->ssa_defs[instr->dest.ssa.index] = result;
3939 }
3940 }
3941
3942
3943 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3944 {
3945 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3946 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3947
3948 ctx->ssa_defs[instr->dest.ssa.index] = result;
3949 _mesa_hash_table_insert(ctx->phis, instr, result);
3950 }
3951
3952 static void visit_post_phi(struct ac_nir_context *ctx,
3953 nir_phi_instr *instr,
3954 LLVMValueRef llvm_phi)
3955 {
3956 nir_foreach_phi_src(src, instr) {
3957 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3958 LLVMValueRef llvm_src = get_src(ctx, src->src);
3959
3960 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3961 }
3962 }
3963
3964 static void phi_post_pass(struct ac_nir_context *ctx)
3965 {
3966 hash_table_foreach(ctx->phis, entry) {
3967 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3968 (LLVMValueRef)entry->data);
3969 }
3970 }
3971
3972
3973 static void visit_ssa_undef(struct ac_nir_context *ctx,
3974 const nir_ssa_undef_instr *instr)
3975 {
3976 unsigned num_components = instr->def.num_components;
3977 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3978 LLVMValueRef undef;
3979
3980 if (num_components == 1)
3981 undef = LLVMGetUndef(type);
3982 else {
3983 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3984 }
3985 ctx->ssa_defs[instr->def.index] = undef;
3986 }
3987
3988 static void visit_jump(struct ac_llvm_context *ctx,
3989 const nir_jump_instr *instr)
3990 {
3991 switch (instr->type) {
3992 case nir_jump_break:
3993 ac_build_break(ctx);
3994 break;
3995 case nir_jump_continue:
3996 ac_build_continue(ctx);
3997 break;
3998 default:
3999 fprintf(stderr, "Unknown NIR jump instr: ");
4000 nir_print_instr(&instr->instr, stderr);
4001 fprintf(stderr, "\n");
4002 abort();
4003 }
4004 }
4005
4006 static LLVMTypeRef
4007 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4008 enum glsl_base_type type)
4009 {
4010 switch (type) {
4011 case GLSL_TYPE_INT:
4012 case GLSL_TYPE_UINT:
4013 case GLSL_TYPE_BOOL:
4014 case GLSL_TYPE_SUBROUTINE:
4015 return ac->i32;
4016 case GLSL_TYPE_INT8:
4017 case GLSL_TYPE_UINT8:
4018 return ac->i8;
4019 case GLSL_TYPE_INT16:
4020 case GLSL_TYPE_UINT16:
4021 return ac->i16;
4022 case GLSL_TYPE_FLOAT:
4023 return ac->f32;
4024 case GLSL_TYPE_FLOAT16:
4025 return ac->f16;
4026 case GLSL_TYPE_INT64:
4027 case GLSL_TYPE_UINT64:
4028 return ac->i64;
4029 case GLSL_TYPE_DOUBLE:
4030 return ac->f64;
4031 default:
4032 unreachable("unknown GLSL type");
4033 }
4034 }
4035
4036 static LLVMTypeRef
4037 glsl_to_llvm_type(struct ac_llvm_context *ac,
4038 const struct glsl_type *type)
4039 {
4040 if (glsl_type_is_scalar(type)) {
4041 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4042 }
4043
4044 if (glsl_type_is_vector(type)) {
4045 return LLVMVectorType(
4046 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4047 glsl_get_vector_elements(type));
4048 }
4049
4050 if (glsl_type_is_matrix(type)) {
4051 return LLVMArrayType(
4052 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4053 glsl_get_matrix_columns(type));
4054 }
4055
4056 if (glsl_type_is_array(type)) {
4057 return LLVMArrayType(
4058 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4059 glsl_get_length(type));
4060 }
4061
4062 assert(glsl_type_is_struct_or_ifc(type));
4063
4064 LLVMTypeRef member_types[glsl_get_length(type)];
4065
4066 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4067 member_types[i] =
4068 glsl_to_llvm_type(ac,
4069 glsl_get_struct_field(type, i));
4070 }
4071
4072 return LLVMStructTypeInContext(ac->context, member_types,
4073 glsl_get_length(type), false);
4074 }
4075
4076 static void visit_deref(struct ac_nir_context *ctx,
4077 nir_deref_instr *instr)
4078 {
4079 if (instr->mode != nir_var_mem_shared &&
4080 instr->mode != nir_var_mem_global)
4081 return;
4082
4083 LLVMValueRef result = NULL;
4084 switch(instr->deref_type) {
4085 case nir_deref_type_var: {
4086 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4087 result = entry->data;
4088 break;
4089 }
4090 case nir_deref_type_struct:
4091 if (instr->mode == nir_var_mem_global) {
4092 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4093 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4094 instr->strct.index);
4095 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4096 LLVMConstInt(ctx->ac.i32, offset, 0));
4097 } else {
4098 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4099 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4100 }
4101 break;
4102 case nir_deref_type_array:
4103 if (instr->mode == nir_var_mem_global) {
4104 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4105 unsigned stride = glsl_get_explicit_stride(parent->type);
4106
4107 if ((glsl_type_is_matrix(parent->type) &&
4108 glsl_matrix_type_is_row_major(parent->type)) ||
4109 (glsl_type_is_vector(parent->type) && stride == 0))
4110 stride = type_scalar_size_bytes(parent->type);
4111
4112 assert(stride > 0);
4113 LLVMValueRef index = get_src(ctx, instr->arr.index);
4114 if (LLVMTypeOf(index) != ctx->ac.i64)
4115 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4116
4117 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4118
4119 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4120 } else {
4121 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4122 get_src(ctx, instr->arr.index));
4123 }
4124 break;
4125 case nir_deref_type_ptr_as_array:
4126 if (instr->mode == nir_var_mem_global) {
4127 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4128
4129 LLVMValueRef index = get_src(ctx, instr->arr.index);
4130 if (LLVMTypeOf(index) != ctx->ac.i64)
4131 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4132
4133 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4134
4135 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4136 } else {
4137 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4138 get_src(ctx, instr->arr.index));
4139 }
4140 break;
4141 case nir_deref_type_cast: {
4142 result = get_src(ctx, instr->parent);
4143
4144 /* We can't use the structs from LLVM because the shader
4145 * specifies its own offsets. */
4146 LLVMTypeRef pointee_type = ctx->ac.i8;
4147 if (instr->mode == nir_var_mem_shared)
4148 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4149
4150 unsigned address_space;
4151
4152 switch(instr->mode) {
4153 case nir_var_mem_shared:
4154 address_space = AC_ADDR_SPACE_LDS;
4155 break;
4156 case nir_var_mem_global:
4157 address_space = AC_ADDR_SPACE_GLOBAL;
4158 break;
4159 default:
4160 unreachable("Unhandled address space");
4161 }
4162
4163 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4164
4165 if (LLVMTypeOf(result) != type) {
4166 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4167 result = LLVMBuildBitCast(ctx->ac.builder, result,
4168 type, "");
4169 } else {
4170 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4171 type, "");
4172 }
4173 }
4174 break;
4175 }
4176 default:
4177 unreachable("Unhandled deref_instr deref type");
4178 }
4179
4180 ctx->ssa_defs[instr->dest.ssa.index] = result;
4181 }
4182
4183 static void visit_cf_list(struct ac_nir_context *ctx,
4184 struct exec_list *list);
4185
4186 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4187 {
4188 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4189 nir_foreach_instr(instr, block)
4190 {
4191 switch (instr->type) {
4192 case nir_instr_type_alu:
4193 visit_alu(ctx, nir_instr_as_alu(instr));
4194 break;
4195 case nir_instr_type_load_const:
4196 visit_load_const(ctx, nir_instr_as_load_const(instr));
4197 break;
4198 case nir_instr_type_intrinsic:
4199 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4200 break;
4201 case nir_instr_type_tex:
4202 visit_tex(ctx, nir_instr_as_tex(instr));
4203 break;
4204 case nir_instr_type_phi:
4205 visit_phi(ctx, nir_instr_as_phi(instr));
4206 break;
4207 case nir_instr_type_ssa_undef:
4208 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4209 break;
4210 case nir_instr_type_jump:
4211 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4212 break;
4213 case nir_instr_type_deref:
4214 visit_deref(ctx, nir_instr_as_deref(instr));
4215 break;
4216 default:
4217 fprintf(stderr, "Unknown NIR instr type: ");
4218 nir_print_instr(instr, stderr);
4219 fprintf(stderr, "\n");
4220 abort();
4221 }
4222 }
4223
4224 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4225 }
4226
4227 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4228 {
4229 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4230
4231 nir_block *then_block =
4232 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4233
4234 ac_build_uif(&ctx->ac, value, then_block->index);
4235
4236 visit_cf_list(ctx, &if_stmt->then_list);
4237
4238 if (!exec_list_is_empty(&if_stmt->else_list)) {
4239 nir_block *else_block =
4240 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4241
4242 ac_build_else(&ctx->ac, else_block->index);
4243 visit_cf_list(ctx, &if_stmt->else_list);
4244 }
4245
4246 ac_build_endif(&ctx->ac, then_block->index);
4247 }
4248
4249 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4250 {
4251 nir_block *first_loop_block =
4252 (nir_block *) exec_list_get_head(&loop->body);
4253
4254 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4255
4256 visit_cf_list(ctx, &loop->body);
4257
4258 ac_build_endloop(&ctx->ac, first_loop_block->index);
4259 }
4260
4261 static void visit_cf_list(struct ac_nir_context *ctx,
4262 struct exec_list *list)
4263 {
4264 foreach_list_typed(nir_cf_node, node, node, list)
4265 {
4266 switch (node->type) {
4267 case nir_cf_node_block:
4268 visit_block(ctx, nir_cf_node_as_block(node));
4269 break;
4270
4271 case nir_cf_node_if:
4272 visit_if(ctx, nir_cf_node_as_if(node));
4273 break;
4274
4275 case nir_cf_node_loop:
4276 visit_loop(ctx, nir_cf_node_as_loop(node));
4277 break;
4278
4279 default:
4280 assert(0);
4281 }
4282 }
4283 }
4284
4285 void
4286 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4287 struct ac_shader_abi *abi,
4288 struct nir_shader *nir,
4289 struct nir_variable *variable,
4290 gl_shader_stage stage)
4291 {
4292 unsigned output_loc = variable->data.driver_location / 4;
4293 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4294
4295 /* tess ctrl has it's own load/store paths for outputs */
4296 if (stage == MESA_SHADER_TESS_CTRL)
4297 return;
4298
4299 if (stage == MESA_SHADER_VERTEX ||
4300 stage == MESA_SHADER_TESS_EVAL ||
4301 stage == MESA_SHADER_GEOMETRY) {
4302 int idx = variable->data.location + variable->data.index;
4303 if (idx == VARYING_SLOT_CLIP_DIST0) {
4304 int length = nir->info.clip_distance_array_size +
4305 nir->info.cull_distance_array_size;
4306
4307 if (length > 4)
4308 attrib_count = 2;
4309 else
4310 attrib_count = 1;
4311 }
4312 }
4313
4314 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4315 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4316 for (unsigned i = 0; i < attrib_count; ++i) {
4317 for (unsigned chan = 0; chan < 4; chan++) {
4318 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4319 ac_build_alloca_undef(ctx, type, "");
4320 }
4321 }
4322 }
4323
4324 static void
4325 setup_locals(struct ac_nir_context *ctx,
4326 struct nir_function *func)
4327 {
4328 int i, j;
4329 ctx->num_locals = 0;
4330 nir_foreach_variable(variable, &func->impl->locals) {
4331 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4332 variable->data.driver_location = ctx->num_locals * 4;
4333 variable->data.location_frac = 0;
4334 ctx->num_locals += attrib_count;
4335 }
4336 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4337 if (!ctx->locals)
4338 return;
4339
4340 for (i = 0; i < ctx->num_locals; i++) {
4341 for (j = 0; j < 4; j++) {
4342 ctx->locals[i * 4 + j] =
4343 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4344 }
4345 }
4346 }
4347
4348 static void
4349 setup_shared(struct ac_nir_context *ctx,
4350 struct nir_shader *nir)
4351 {
4352 nir_foreach_variable(variable, &nir->shared) {
4353 LLVMValueRef shared =
4354 LLVMAddGlobalInAddressSpace(
4355 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4356 variable->name ? variable->name : "",
4357 AC_ADDR_SPACE_LDS);
4358 _mesa_hash_table_insert(ctx->vars, variable, shared);
4359 }
4360 }
4361
4362 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4363 struct nir_shader *nir)
4364 {
4365 struct ac_nir_context ctx = {};
4366 struct nir_function *func;
4367
4368 ctx.ac = *ac;
4369 ctx.abi = abi;
4370
4371 ctx.stage = nir->info.stage;
4372 ctx.info = &nir->info;
4373
4374 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4375
4376 nir_foreach_variable(variable, &nir->outputs)
4377 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4378 ctx.stage);
4379
4380 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4381 _mesa_key_pointer_equal);
4382 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4383 _mesa_key_pointer_equal);
4384 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4385 _mesa_key_pointer_equal);
4386
4387 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4388
4389 nir_index_ssa_defs(func->impl);
4390 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4391
4392 setup_locals(&ctx, func);
4393
4394 if (gl_shader_stage_is_compute(nir->info.stage))
4395 setup_shared(&ctx, nir);
4396
4397 visit_cf_list(&ctx, &func->impl->body);
4398 phi_post_pass(&ctx);
4399
4400 if (!gl_shader_stage_is_compute(nir->info.stage))
4401 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4402 ctx.abi->outputs);
4403
4404 free(ctx.locals);
4405 free(ctx.ssa_defs);
4406 ralloc_free(ctx.defs);
4407 ralloc_free(ctx.phis);
4408 ralloc_free(ctx.vars);
4409 }
4410
4411 void
4412 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4413 {
4414 /* While it would be nice not to have this flag, we are constrained
4415 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4416 * on GFX9.
4417 */
4418 bool llvm_has_working_vgpr_indexing = chip_class <= GFX8;
4419
4420 /* TODO: Indirect indexing of GS inputs is unimplemented.
4421 *
4422 * TCS and TES load inputs directly from LDS or offchip memory, so
4423 * indirect indexing is trivial.
4424 */
4425 nir_variable_mode indirect_mask = 0;
4426 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4427 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4428 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4429 !llvm_has_working_vgpr_indexing)) {
4430 indirect_mask |= nir_var_shader_in;
4431 }
4432 if (!llvm_has_working_vgpr_indexing &&
4433 nir->info.stage != MESA_SHADER_TESS_CTRL)
4434 indirect_mask |= nir_var_shader_out;
4435
4436 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4437 * smart enough to handle indirects without causing excess spilling
4438 * causing the gpu to hang.
4439 *
4440 * See the following thread for more details of the problem:
4441 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4442 */
4443 indirect_mask |= nir_var_function_temp;
4444
4445 nir_lower_indirect_derefs(nir, indirect_mask);
4446 }
4447
4448 static unsigned
4449 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4450 {
4451 if (intrin->intrinsic != nir_intrinsic_store_deref)
4452 return 0;
4453
4454 nir_variable *var =
4455 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4456
4457 if (var->data.mode != nir_var_shader_out)
4458 return 0;
4459
4460 unsigned writemask = 0;
4461 const int location = var->data.location;
4462 unsigned first_component = var->data.location_frac;
4463 unsigned num_comps = intrin->dest.ssa.num_components;
4464
4465 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4466 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4467 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4468 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4469
4470 return writemask;
4471 }
4472
4473 static void
4474 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4475 unsigned *cond_block_tf_writemask,
4476 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4477 {
4478 switch (cf_node->type) {
4479 case nir_cf_node_block: {
4480 nir_block *block = nir_cf_node_as_block(cf_node);
4481 nir_foreach_instr(instr, block) {
4482 if (instr->type != nir_instr_type_intrinsic)
4483 continue;
4484
4485 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4486 if (intrin->intrinsic == nir_intrinsic_barrier) {
4487
4488 /* If we find a barrier in nested control flow put this in the
4489 * too hard basket. In GLSL this is not possible but it is in
4490 * SPIR-V.
4491 */
4492 if (is_nested_cf) {
4493 *tessfactors_are_def_in_all_invocs = false;
4494 return;
4495 }
4496
4497 /* The following case must be prevented:
4498 * gl_TessLevelInner = ...;
4499 * barrier();
4500 * if (gl_InvocationID == 1)
4501 * gl_TessLevelInner = ...;
4502 *
4503 * If you consider disjoint code segments separated by barriers, each
4504 * such segment that writes tess factor channels should write the same
4505 * channels in all codepaths within that segment.
4506 */
4507 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4508 /* Accumulate the result: */
4509 *tessfactors_are_def_in_all_invocs &=
4510 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4511
4512 /* Analyze the next code segment from scratch. */
4513 *upper_block_tf_writemask = 0;
4514 *cond_block_tf_writemask = 0;
4515 }
4516 } else
4517 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4518 }
4519
4520 break;
4521 }
4522 case nir_cf_node_if: {
4523 unsigned then_tessfactor_writemask = 0;
4524 unsigned else_tessfactor_writemask = 0;
4525
4526 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4527 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4528 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4529 cond_block_tf_writemask,
4530 tessfactors_are_def_in_all_invocs, true);
4531 }
4532
4533 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4534 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4535 cond_block_tf_writemask,
4536 tessfactors_are_def_in_all_invocs, true);
4537 }
4538
4539 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4540 /* If both statements write the same tess factor channels,
4541 * we can say that the upper block writes them too.
4542 */
4543 *upper_block_tf_writemask |= then_tessfactor_writemask &
4544 else_tessfactor_writemask;
4545 *cond_block_tf_writemask |= then_tessfactor_writemask |
4546 else_tessfactor_writemask;
4547 }
4548
4549 break;
4550 }
4551 case nir_cf_node_loop: {
4552 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4553 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4554 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4555 cond_block_tf_writemask,
4556 tessfactors_are_def_in_all_invocs, true);
4557 }
4558
4559 break;
4560 }
4561 default:
4562 unreachable("unknown cf node type");
4563 }
4564 }
4565
4566 bool
4567 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4568 {
4569 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4570
4571 /* The pass works as follows:
4572 * If all codepaths write tess factors, we can say that all
4573 * invocations define tess factors.
4574 *
4575 * Each tess factor channel is tracked separately.
4576 */
4577 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4578 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4579
4580 /* Initial value = true. Here the pass will accumulate results from
4581 * multiple segments surrounded by barriers. If tess factors aren't
4582 * written at all, it's a shader bug and we don't care if this will be
4583 * true.
4584 */
4585 bool tessfactors_are_def_in_all_invocs = true;
4586
4587 nir_foreach_function(function, nir) {
4588 if (function->impl) {
4589 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4590 scan_tess_ctrl(node, &main_block_tf_writemask,
4591 &cond_block_tf_writemask,
4592 &tessfactors_are_def_in_all_invocs,
4593 false);
4594 }
4595 }
4596 }
4597
4598 /* Accumulate the result for the last code segment separated by a
4599 * barrier.
4600 */
4601 if (main_block_tf_writemask || cond_block_tf_writemask) {
4602 tessfactors_are_def_in_all_invocs &=
4603 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4604 }
4605
4606 return tessfactors_are_def_in_all_invocs;
4607 }