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ac: add ac_build_ddxy_interp() helper
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= VI && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
272
273 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
274 ctx->i32_0, "");
275 return LLVMBuildSelect(ctx->builder, v,
276 ac_to_integer_or_pointer(ctx, src1),
277 ac_to_integer_or_pointer(ctx, src2), "");
278 }
279
280 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
281 LLVMValueRef src0)
282 {
283 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
284 }
285
286 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
287 const char *intrin,
288 LLVMValueRef src0, LLVMValueRef src1)
289 {
290 LLVMTypeRef ret_type;
291 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
292 LLVMValueRef res;
293 LLVMValueRef params[] = { src0, src1 };
294 ret_type = LLVMStructTypeInContext(ctx->context, types,
295 2, true);
296
297 res = ac_build_intrinsic(ctx, intrin, ret_type,
298 params, 2, AC_FUNC_ATTR_READNONE);
299
300 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
301 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
302 return res;
303 }
304
305 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
306 LLVMValueRef src0,
307 unsigned bitsize)
308 {
309 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
310 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
311 "");
312 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
313
314 switch (bitsize) {
315 case 16:
316 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
317 case 32:
318 return result;
319 case 64:
320 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
321 default:
322 unreachable("Unsupported bit size.");
323 }
324 }
325
326 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
327 LLVMValueRef src0)
328 {
329 src0 = ac_to_float(ctx, src0);
330 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
331 return LLVMBuildSExt(ctx->builder,
332 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
333 ctx->i32, "");
334 }
335
336 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
337 LLVMValueRef src0,
338 unsigned bitsize)
339 {
340 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
341
342 switch (bitsize) {
343 case 8:
344 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
345 case 16:
346 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
347 case 32:
348 return result;
349 case 64:
350 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
351 default:
352 unreachable("Unsupported bit size.");
353 }
354 }
355
356 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
357 LLVMValueRef src0)
358 {
359 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
360 return LLVMBuildSExt(ctx->builder,
361 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
362 ctx->i32, "");
363 }
364
365 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
366 LLVMValueRef src0)
367 {
368 LLVMValueRef result;
369 LLVMValueRef cond = NULL;
370
371 src0 = ac_to_float(ctx, src0);
372 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
373
374 if (ctx->chip_class >= VI) {
375 LLVMValueRef args[2];
376 /* Check if the result is a denormal - and flush to 0 if so. */
377 args[0] = result;
378 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
379 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
380 }
381
382 /* need to convert back up to f32 */
383 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
384
385 if (ctx->chip_class >= VI)
386 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
387 else {
388 /* for SI/CIK */
389 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
390 * so compare the result and flush to 0 if it's smaller.
391 */
392 LLVMValueRef temp, cond2;
393 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
394 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
395 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
396 temp, "");
397 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
398 temp, ctx->f32_0, "");
399 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
400 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
401 }
402 return result;
403 }
404
405 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
406 LLVMValueRef src0, LLVMValueRef src1)
407 {
408 LLVMValueRef dst64, result;
409 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
410 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
411
412 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
413 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
414 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
415 return result;
416 }
417
418 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
419 LLVMValueRef src0, LLVMValueRef src1)
420 {
421 LLVMValueRef dst64, result;
422 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
423 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
424
425 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
426 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
427 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
428 return result;
429 }
430
431 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
432 bool is_signed,
433 const LLVMValueRef srcs[3])
434 {
435 LLVMValueRef result;
436
437 if (HAVE_LLVM >= 0x0800) {
438 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
439 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
440 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
441 } else {
442 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
443 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
444 */
445 LLVMValueRef zero = ctx->i32_0;
446 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
447 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
448
449 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
450 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
451 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
452 }
453
454 return result;
455 }
456
457 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
458 LLVMValueRef src0, LLVMValueRef src1,
459 LLVMValueRef src2, LLVMValueRef src3)
460 {
461 LLVMValueRef bfi_args[3], result;
462
463 bfi_args[0] = LLVMBuildShl(ctx->builder,
464 LLVMBuildSub(ctx->builder,
465 LLVMBuildShl(ctx->builder,
466 ctx->i32_1,
467 src3, ""),
468 ctx->i32_1, ""),
469 src2, "");
470 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
471 bfi_args[2] = src0;
472
473 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
474
475 /* Calculate:
476 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
477 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
478 */
479 result = LLVMBuildXor(ctx->builder, bfi_args[2],
480 LLVMBuildAnd(ctx->builder, bfi_args[0],
481 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
482
483 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
484 return result;
485 }
486
487 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
488 LLVMValueRef src0)
489 {
490 LLVMValueRef comp[2];
491
492 src0 = ac_to_float(ctx, src0);
493 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
494 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
495
496 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
497 ctx->i32, "");
498 }
499
500 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
501 LLVMValueRef src0)
502 {
503 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
504 LLVMValueRef temps[2], val;
505 int i;
506
507 for (i = 0; i < 2; i++) {
508 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
509 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
510 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
511 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
512 }
513 return ac_build_gather_values(ctx, temps, 2);
514 }
515
516 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
517 nir_op op,
518 LLVMValueRef src0)
519 {
520 unsigned mask;
521 int idx;
522 LLVMValueRef result;
523
524 if (op == nir_op_fddx_fine)
525 mask = AC_TID_MASK_LEFT;
526 else if (op == nir_op_fddy_fine)
527 mask = AC_TID_MASK_TOP;
528 else
529 mask = AC_TID_MASK_TOP_LEFT;
530
531 /* for DDX we want to next X pixel, DDY next Y pixel. */
532 if (op == nir_op_fddx_fine ||
533 op == nir_op_fddx_coarse ||
534 op == nir_op_fddx)
535 idx = 1;
536 else
537 idx = 2;
538
539 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
540 return result;
541 }
542
543 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
544 {
545 LLVMValueRef src[4], result = NULL;
546 unsigned num_components = instr->dest.dest.ssa.num_components;
547 unsigned src_components;
548 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
549
550 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
551 switch (instr->op) {
552 case nir_op_vec2:
553 case nir_op_vec3:
554 case nir_op_vec4:
555 src_components = 1;
556 break;
557 case nir_op_pack_half_2x16:
558 src_components = 2;
559 break;
560 case nir_op_unpack_half_2x16:
561 src_components = 1;
562 break;
563 case nir_op_cube_face_coord:
564 case nir_op_cube_face_index:
565 src_components = 3;
566 break;
567 default:
568 src_components = num_components;
569 break;
570 }
571 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
572 src[i] = get_alu_src(ctx, instr->src[i], src_components);
573
574 switch (instr->op) {
575 case nir_op_fmov:
576 case nir_op_imov:
577 result = src[0];
578 break;
579 case nir_op_fneg:
580 src[0] = ac_to_float(&ctx->ac, src[0]);
581 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
582 break;
583 case nir_op_ineg:
584 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
585 break;
586 case nir_op_inot:
587 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
588 break;
589 case nir_op_iadd:
590 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_fadd:
593 src[0] = ac_to_float(&ctx->ac, src[0]);
594 src[1] = ac_to_float(&ctx->ac, src[1]);
595 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
596 break;
597 case nir_op_fsub:
598 src[0] = ac_to_float(&ctx->ac, src[0]);
599 src[1] = ac_to_float(&ctx->ac, src[1]);
600 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
601 break;
602 case nir_op_isub:
603 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
604 break;
605 case nir_op_imul:
606 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
607 break;
608 case nir_op_imod:
609 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
610 break;
611 case nir_op_umod:
612 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
613 break;
614 case nir_op_fmod:
615 src[0] = ac_to_float(&ctx->ac, src[0]);
616 src[1] = ac_to_float(&ctx->ac, src[1]);
617 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
618 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
619 ac_to_float_type(&ctx->ac, def_type), result);
620 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
621 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
622 break;
623 case nir_op_frem:
624 src[0] = ac_to_float(&ctx->ac, src[0]);
625 src[1] = ac_to_float(&ctx->ac, src[1]);
626 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
627 break;
628 case nir_op_irem:
629 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
630 break;
631 case nir_op_idiv:
632 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_udiv:
635 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_fmul:
638 src[0] = ac_to_float(&ctx->ac, src[0]);
639 src[1] = ac_to_float(&ctx->ac, src[1]);
640 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
641 break;
642 case nir_op_frcp:
643 src[0] = ac_to_float(&ctx->ac, src[0]);
644 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
645 break;
646 case nir_op_iand:
647 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
648 break;
649 case nir_op_ior:
650 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ixor:
653 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
654 break;
655 case nir_op_ishl:
656 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
657 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
658 LLVMTypeOf(src[0]), "");
659 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
660 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
661 LLVMTypeOf(src[0]), "");
662 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_ishr:
665 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
666 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
667 LLVMTypeOf(src[0]), "");
668 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
669 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
670 LLVMTypeOf(src[0]), "");
671 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
672 break;
673 case nir_op_ushr:
674 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
675 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
676 LLVMTypeOf(src[0]), "");
677 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
678 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
679 LLVMTypeOf(src[0]), "");
680 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_ilt32:
683 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
684 break;
685 case nir_op_ine32:
686 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
687 break;
688 case nir_op_ieq32:
689 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
690 break;
691 case nir_op_ige32:
692 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
693 break;
694 case nir_op_ult32:
695 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
696 break;
697 case nir_op_uge32:
698 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
699 break;
700 case nir_op_feq32:
701 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
702 break;
703 case nir_op_fne32:
704 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
705 break;
706 case nir_op_flt32:
707 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
708 break;
709 case nir_op_fge32:
710 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
711 break;
712 case nir_op_fabs:
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 break;
716 case nir_op_iabs:
717 result = emit_iabs(&ctx->ac, src[0]);
718 break;
719 case nir_op_imax:
720 result = ac_build_imax(&ctx->ac, src[0], src[1]);
721 break;
722 case nir_op_imin:
723 result = ac_build_imin(&ctx->ac, src[0], src[1]);
724 break;
725 case nir_op_umax:
726 result = ac_build_umax(&ctx->ac, src[0], src[1]);
727 break;
728 case nir_op_umin:
729 result = ac_build_umin(&ctx->ac, src[0], src[1]);
730 break;
731 case nir_op_isign:
732 result = ac_build_isign(&ctx->ac, src[0],
733 instr->dest.dest.ssa.bit_size);
734 break;
735 case nir_op_fsign:
736 src[0] = ac_to_float(&ctx->ac, src[0]);
737 result = ac_build_fsign(&ctx->ac, src[0],
738 instr->dest.dest.ssa.bit_size);
739 break;
740 case nir_op_ffloor:
741 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
742 ac_to_float_type(&ctx->ac, def_type), src[0]);
743 break;
744 case nir_op_ftrunc:
745 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
746 ac_to_float_type(&ctx->ac, def_type), src[0]);
747 break;
748 case nir_op_fceil:
749 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
750 ac_to_float_type(&ctx->ac, def_type), src[0]);
751 break;
752 case nir_op_fround_even:
753 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
754 ac_to_float_type(&ctx->ac, def_type),src[0]);
755 break;
756 case nir_op_ffract:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_fract(&ctx->ac, src[0],
759 instr->dest.dest.ssa.bit_size);
760 break;
761 case nir_op_fsin:
762 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
763 ac_to_float_type(&ctx->ac, def_type), src[0]);
764 break;
765 case nir_op_fcos:
766 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
767 ac_to_float_type(&ctx->ac, def_type), src[0]);
768 break;
769 case nir_op_fsqrt:
770 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
771 ac_to_float_type(&ctx->ac, def_type), src[0]);
772 break;
773 case nir_op_fexp2:
774 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
775 ac_to_float_type(&ctx->ac, def_type), src[0]);
776 break;
777 case nir_op_flog2:
778 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
779 ac_to_float_type(&ctx->ac, def_type), src[0]);
780 break;
781 case nir_op_frsq:
782 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
783 ac_to_float_type(&ctx->ac, def_type), src[0]);
784 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
785 break;
786 case nir_op_frexp_exp:
787 src[0] = ac_to_float(&ctx->ac, src[0]);
788 result = ac_build_frexp_exp(&ctx->ac, src[0],
789 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
790 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
791 result = LLVMBuildSExt(ctx->ac.builder, result,
792 ctx->ac.i32, "");
793 break;
794 case nir_op_frexp_sig:
795 src[0] = ac_to_float(&ctx->ac, src[0]);
796 result = ac_build_frexp_mant(&ctx->ac, src[0],
797 instr->dest.dest.ssa.bit_size);
798 break;
799 case nir_op_fpow:
800 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
801 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
802 break;
803 case nir_op_fmax:
804 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
805 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
806 if (ctx->ac.chip_class < GFX9 &&
807 instr->dest.dest.ssa.bit_size == 32) {
808 /* Only pre-GFX9 chips do not flush denorms. */
809 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
810 ac_to_float_type(&ctx->ac, def_type),
811 result);
812 }
813 break;
814 case nir_op_fmin:
815 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
816 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
817 if (ctx->ac.chip_class < GFX9 &&
818 instr->dest.dest.ssa.bit_size == 32) {
819 /* Only pre-GFX9 chips do not flush denorms. */
820 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
821 ac_to_float_type(&ctx->ac, def_type),
822 result);
823 }
824 break;
825 case nir_op_ffma:
826 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
827 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
828 break;
829 case nir_op_ldexp:
830 src[0] = ac_to_float(&ctx->ac, src[0]);
831 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
832 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
833 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
834 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
835 else
836 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
837 break;
838 case nir_op_ibitfield_extract:
839 result = emit_bitfield_extract(&ctx->ac, true, src);
840 break;
841 case nir_op_ubitfield_extract:
842 result = emit_bitfield_extract(&ctx->ac, false, src);
843 break;
844 case nir_op_bitfield_insert:
845 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
846 break;
847 case nir_op_bitfield_reverse:
848 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
849 break;
850 case nir_op_bit_count:
851 result = ac_build_bit_count(&ctx->ac, src[0]);
852 break;
853 case nir_op_vec2:
854 case nir_op_vec3:
855 case nir_op_vec4:
856 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
857 src[i] = ac_to_integer(&ctx->ac, src[i]);
858 result = ac_build_gather_values(&ctx->ac, src, num_components);
859 break;
860 case nir_op_f2i8:
861 case nir_op_f2i16:
862 case nir_op_f2i32:
863 case nir_op_f2i64:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
866 break;
867 case nir_op_f2u8:
868 case nir_op_f2u16:
869 case nir_op_f2u32:
870 case nir_op_f2u64:
871 src[0] = ac_to_float(&ctx->ac, src[0]);
872 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
873 break;
874 case nir_op_i2f16:
875 case nir_op_i2f32:
876 case nir_op_i2f64:
877 src[0] = ac_to_integer(&ctx->ac, src[0]);
878 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
879 break;
880 case nir_op_u2f16:
881 case nir_op_u2f32:
882 case nir_op_u2f64:
883 src[0] = ac_to_integer(&ctx->ac, src[0]);
884 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
885 break;
886 case nir_op_f2f16_rtz:
887 src[0] = ac_to_float(&ctx->ac, src[0]);
888 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
889 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
890 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
891 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
892 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
893 break;
894 case nir_op_f2f16_rtne:
895 case nir_op_f2f16:
896 case nir_op_f2f32:
897 case nir_op_f2f64:
898 src[0] = ac_to_float(&ctx->ac, src[0]);
899 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
900 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
901 else
902 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
903 break;
904 case nir_op_u2u8:
905 case nir_op_u2u16:
906 case nir_op_u2u32:
907 case nir_op_u2u64:
908 src[0] = ac_to_integer(&ctx->ac, src[0]);
909 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
910 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
911 else
912 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
913 break;
914 case nir_op_i2i8:
915 case nir_op_i2i16:
916 case nir_op_i2i32:
917 case nir_op_i2i64:
918 src[0] = ac_to_integer(&ctx->ac, src[0]);
919 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
920 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
921 else
922 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
923 break;
924 case nir_op_b32csel:
925 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
926 break;
927 case nir_op_find_lsb:
928 src[0] = ac_to_integer(&ctx->ac, src[0]);
929 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
930 break;
931 case nir_op_ufind_msb:
932 src[0] = ac_to_integer(&ctx->ac, src[0]);
933 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
934 break;
935 case nir_op_ifind_msb:
936 src[0] = ac_to_integer(&ctx->ac, src[0]);
937 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
938 break;
939 case nir_op_uadd_carry:
940 src[0] = ac_to_integer(&ctx->ac, src[0]);
941 src[1] = ac_to_integer(&ctx->ac, src[1]);
942 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
943 break;
944 case nir_op_usub_borrow:
945 src[0] = ac_to_integer(&ctx->ac, src[0]);
946 src[1] = ac_to_integer(&ctx->ac, src[1]);
947 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
948 break;
949 case nir_op_b2f16:
950 case nir_op_b2f32:
951 case nir_op_b2f64:
952 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
953 break;
954 case nir_op_f2b32:
955 result = emit_f2b(&ctx->ac, src[0]);
956 break;
957 case nir_op_b2i8:
958 case nir_op_b2i16:
959 case nir_op_b2i32:
960 case nir_op_b2i64:
961 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
962 break;
963 case nir_op_i2b32:
964 src[0] = ac_to_integer(&ctx->ac, src[0]);
965 result = emit_i2b(&ctx->ac, src[0]);
966 break;
967 case nir_op_fquantize2f16:
968 result = emit_f2f16(&ctx->ac, src[0]);
969 break;
970 case nir_op_umul_high:
971 src[0] = ac_to_integer(&ctx->ac, src[0]);
972 src[1] = ac_to_integer(&ctx->ac, src[1]);
973 result = emit_umul_high(&ctx->ac, src[0], src[1]);
974 break;
975 case nir_op_imul_high:
976 src[0] = ac_to_integer(&ctx->ac, src[0]);
977 src[1] = ac_to_integer(&ctx->ac, src[1]);
978 result = emit_imul_high(&ctx->ac, src[0], src[1]);
979 break;
980 case nir_op_pack_half_2x16:
981 result = emit_pack_half_2x16(&ctx->ac, src[0]);
982 break;
983 case nir_op_unpack_half_2x16:
984 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
985 break;
986 case nir_op_fddx:
987 case nir_op_fddy:
988 case nir_op_fddx_fine:
989 case nir_op_fddy_fine:
990 case nir_op_fddx_coarse:
991 case nir_op_fddy_coarse:
992 result = emit_ddxy(ctx, instr->op, src[0]);
993 break;
994
995 case nir_op_unpack_64_2x32_split_x: {
996 assert(ac_get_llvm_num_components(src[0]) == 1);
997 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
998 ctx->ac.v2i32,
999 "");
1000 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1001 ctx->ac.i32_0, "");
1002 break;
1003 }
1004
1005 case nir_op_unpack_64_2x32_split_y: {
1006 assert(ac_get_llvm_num_components(src[0]) == 1);
1007 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1008 ctx->ac.v2i32,
1009 "");
1010 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1011 ctx->ac.i32_1, "");
1012 break;
1013 }
1014
1015 case nir_op_pack_64_2x32_split: {
1016 LLVMValueRef tmp = LLVMGetUndef(ctx->ac.v2i32);
1017 tmp = ac_build_gather_values(&ctx->ac, src, 2);
1018 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1019 break;
1020 }
1021
1022 case nir_op_pack_32_2x16_split: {
1023 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1024 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1025 break;
1026 }
1027
1028 case nir_op_unpack_32_2x16_split_x: {
1029 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1030 ctx->ac.v2i16,
1031 "");
1032 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1033 ctx->ac.i32_0, "");
1034 break;
1035 }
1036
1037 case nir_op_unpack_32_2x16_split_y: {
1038 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1039 ctx->ac.v2i16,
1040 "");
1041 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1042 ctx->ac.i32_1, "");
1043 break;
1044 }
1045
1046 case nir_op_cube_face_coord: {
1047 src[0] = ac_to_float(&ctx->ac, src[0]);
1048 LLVMValueRef results[2];
1049 LLVMValueRef in[3];
1050 for (unsigned chan = 0; chan < 3; chan++)
1051 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1052 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1053 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1054 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1055 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1056 result = ac_build_gather_values(&ctx->ac, results, 2);
1057 break;
1058 }
1059
1060 case nir_op_cube_face_index: {
1061 src[0] = ac_to_float(&ctx->ac, src[0]);
1062 LLVMValueRef in[3];
1063 for (unsigned chan = 0; chan < 3; chan++)
1064 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1065 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1066 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1067 break;
1068 }
1069
1070 case nir_op_fmin3:
1071 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1072 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1073 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1074 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1075 break;
1076 case nir_op_umin3:
1077 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1078 result = ac_build_umin(&ctx->ac, result, src[2]);
1079 break;
1080 case nir_op_imin3:
1081 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1082 result = ac_build_imin(&ctx->ac, result, src[2]);
1083 break;
1084 case nir_op_fmax3:
1085 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1086 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1087 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1088 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1089 break;
1090 case nir_op_umax3:
1091 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1092 result = ac_build_umax(&ctx->ac, result, src[2]);
1093 break;
1094 case nir_op_imax3:
1095 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1096 result = ac_build_imax(&ctx->ac, result, src[2]);
1097 break;
1098 case nir_op_fmed3: {
1099 src[0] = ac_to_float(&ctx->ac, src[0]);
1100 src[1] = ac_to_float(&ctx->ac, src[1]);
1101 src[2] = ac_to_float(&ctx->ac, src[2]);
1102 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1103 instr->dest.dest.ssa.bit_size);
1104 break;
1105 }
1106 case nir_op_imed3: {
1107 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1108 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1109 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1110 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1111 break;
1112 }
1113 case nir_op_umed3: {
1114 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1115 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1116 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1117 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1118 break;
1119 }
1120
1121 default:
1122 fprintf(stderr, "Unknown NIR alu instr: ");
1123 nir_print_instr(&instr->instr, stderr);
1124 fprintf(stderr, "\n");
1125 abort();
1126 }
1127
1128 if (result) {
1129 assert(instr->dest.dest.is_ssa);
1130 result = ac_to_integer_or_pointer(&ctx->ac, result);
1131 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1132 }
1133 }
1134
1135 static void visit_load_const(struct ac_nir_context *ctx,
1136 const nir_load_const_instr *instr)
1137 {
1138 LLVMValueRef values[4], value = NULL;
1139 LLVMTypeRef element_type =
1140 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1141
1142 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1143 switch (instr->def.bit_size) {
1144 case 8:
1145 values[i] = LLVMConstInt(element_type,
1146 instr->value.u8[i], false);
1147 break;
1148 case 16:
1149 values[i] = LLVMConstInt(element_type,
1150 instr->value.u16[i], false);
1151 break;
1152 case 32:
1153 values[i] = LLVMConstInt(element_type,
1154 instr->value.u32[i], false);
1155 break;
1156 case 64:
1157 values[i] = LLVMConstInt(element_type,
1158 instr->value.u64[i], false);
1159 break;
1160 default:
1161 fprintf(stderr,
1162 "unsupported nir load_const bit_size: %d\n",
1163 instr->def.bit_size);
1164 abort();
1165 }
1166 }
1167 if (instr->def.num_components > 1) {
1168 value = LLVMConstVector(values, instr->def.num_components);
1169 } else
1170 value = values[0];
1171
1172 ctx->ssa_defs[instr->def.index] = value;
1173 }
1174
1175 static LLVMValueRef
1176 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1177 {
1178 LLVMValueRef size =
1179 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1180 LLVMConstInt(ctx->ac.i32, 2, false), "");
1181
1182 /* VI only */
1183 if (ctx->ac.chip_class == VI && in_elements) {
1184 /* On VI, the descriptor contains the size in bytes,
1185 * but TXQ must return the size in elements.
1186 * The stride is always non-zero for resources using TXQ.
1187 */
1188 LLVMValueRef stride =
1189 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1190 ctx->ac.i32_1, "");
1191 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1192 LLVMConstInt(ctx->ac.i32, 16, false), "");
1193 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1194 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1195
1196 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1197 }
1198 return size;
1199 }
1200
1201 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1202 nir_variable *var,
1203 struct ac_image_args *args,
1204 const nir_tex_instr *instr)
1205 {
1206 const struct glsl_type *type = glsl_without_array(var->type);
1207 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1208 LLVMValueRef half_texel[2];
1209 LLVMValueRef compare_cube_wa = NULL;
1210 LLVMValueRef result;
1211
1212 //TODO Rect
1213 {
1214 struct ac_image_args txq_args = { 0 };
1215
1216 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1217 txq_args.opcode = ac_image_get_resinfo;
1218 txq_args.dmask = 0xf;
1219 txq_args.lod = ctx->i32_0;
1220 txq_args.resource = args->resource;
1221 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1222 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1223
1224 for (unsigned c = 0; c < 2; c++) {
1225 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1226 LLVMConstInt(ctx->i32, c, false), "");
1227 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1228 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1229 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1230 LLVMConstReal(ctx->f32, -0.5), "");
1231 }
1232 }
1233
1234 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1235
1236 for (unsigned c = 0; c < 2; c++) {
1237 LLVMValueRef tmp;
1238 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1239 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1240 }
1241
1242 /*
1243 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1244 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1245 * workaround by sampling using a scaled type and converting.
1246 * This is taken from amdgpu-pro shaders.
1247 */
1248 /* NOTE this produces some ugly code compared to amdgpu-pro,
1249 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1250 * and then reads them back. -pro generates two selects,
1251 * one s_cmp for the descriptor rewriting
1252 * one v_cmp for the coordinate and result changes.
1253 */
1254 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1255 LLVMValueRef tmp, tmp2;
1256
1257 /* workaround 8/8/8/8 uint/sint cube gather bug */
1258 /* first detect it then change to a scaled read and f2i */
1259 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1260 tmp2 = tmp;
1261
1262 /* extract the DATA_FORMAT */
1263 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1264 LLVMConstInt(ctx->i32, 6, false), false);
1265
1266 /* is the DATA_FORMAT == 8_8_8_8 */
1267 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1268
1269 if (stype == GLSL_TYPE_UINT)
1270 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1271 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1272 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1273 else
1274 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1275 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1276 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1277
1278 /* replace the NUM FORMAT in the descriptor */
1279 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1280 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1281
1282 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1283
1284 /* don't modify the coordinates for this case */
1285 for (unsigned c = 0; c < 2; ++c)
1286 args->coords[c] = LLVMBuildSelect(
1287 ctx->builder, compare_cube_wa,
1288 orig_coords[c], args->coords[c], "");
1289 }
1290
1291 args->attributes = AC_FUNC_ATTR_READNONE;
1292 result = ac_build_image_opcode(ctx, args);
1293
1294 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1295 LLVMValueRef tmp, tmp2;
1296
1297 /* if the cube workaround is in place, f2i the result. */
1298 for (unsigned c = 0; c < 4; c++) {
1299 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1300 if (stype == GLSL_TYPE_UINT)
1301 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1302 else
1303 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1304 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1305 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1306 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1307 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1308 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1309 }
1310 }
1311 return result;
1312 }
1313
1314 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1315 {
1316 nir_deref_instr *texture_deref_instr = NULL;
1317
1318 for (unsigned i = 0; i < instr->num_srcs; i++) {
1319 switch (instr->src[i].src_type) {
1320 case nir_tex_src_texture_deref:
1321 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1322 break;
1323 default:
1324 break;
1325 }
1326 }
1327 return texture_deref_instr;
1328 }
1329
1330 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1331 const nir_tex_instr *instr,
1332 struct ac_image_args *args)
1333 {
1334 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1335 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1336
1337 if (ctx->abi->gfx9_stride_size_workaround) {
1338 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1339 args->resource,
1340 args->coords[0],
1341 ctx->ac.i32_0,
1342 util_last_bit(mask),
1343 false, true);
1344 } else {
1345 return ac_build_buffer_load_format(&ctx->ac,
1346 args->resource,
1347 args->coords[0],
1348 ctx->ac.i32_0,
1349 util_last_bit(mask),
1350 false, true);
1351 }
1352 }
1353
1354 args->opcode = ac_image_sample;
1355
1356 switch (instr->op) {
1357 case nir_texop_txf:
1358 case nir_texop_txf_ms:
1359 case nir_texop_samples_identical:
1360 args->opcode = args->level_zero ||
1361 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1362 ac_image_load : ac_image_load_mip;
1363 args->level_zero = false;
1364 break;
1365 case nir_texop_txs:
1366 case nir_texop_query_levels:
1367 args->opcode = ac_image_get_resinfo;
1368 if (!args->lod)
1369 args->lod = ctx->ac.i32_0;
1370 args->level_zero = false;
1371 break;
1372 case nir_texop_tex:
1373 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1374 assert(!args->lod);
1375 args->level_zero = true;
1376 }
1377 break;
1378 case nir_texop_tg4:
1379 args->opcode = ac_image_gather4;
1380 args->level_zero = true;
1381 break;
1382 case nir_texop_lod:
1383 args->opcode = ac_image_get_lod;
1384 break;
1385 default:
1386 break;
1387 }
1388
1389 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= VI) {
1390 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1391 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1392 const struct glsl_type *type = glsl_without_array(var->type);
1393 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1394 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1395 return lower_gather4_integer(&ctx->ac, var, args, instr);
1396 }
1397 }
1398
1399 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1400 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1401 if ((args->dim == ac_image_2darray ||
1402 args->dim == ac_image_2d) && !args->coords[1]) {
1403 args->coords[1] = ctx->ac.i32_0;
1404 }
1405 }
1406
1407 args->attributes = AC_FUNC_ATTR_READNONE;
1408 return ac_build_image_opcode(&ctx->ac, args);
1409 }
1410
1411 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1412 nir_intrinsic_instr *instr)
1413 {
1414 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1415 LLVMValueRef index = get_src(ctx, instr->src[1]);
1416
1417 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1418 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1419 return result;
1420 }
1421
1422 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1423 nir_intrinsic_instr *instr)
1424 {
1425 LLVMValueRef ptr, addr;
1426 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1427 unsigned index = nir_intrinsic_base(instr);
1428
1429 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1430 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1431
1432 /* Load constant values from user SGPRS when possible, otherwise
1433 * fallback to the default path that loads directly from memory.
1434 */
1435 if (LLVMIsConstant(src0) &&
1436 instr->dest.ssa.bit_size == 32) {
1437 unsigned count = instr->dest.ssa.num_components;
1438 unsigned offset = index;
1439
1440 offset += LLVMConstIntGetZExtValue(src0);
1441 offset /= 4;
1442
1443 offset -= ctx->abi->base_inline_push_consts;
1444
1445 if (offset + count <= ctx->abi->num_inline_push_consts) {
1446 return ac_build_gather_values(&ctx->ac,
1447 ctx->abi->inline_push_consts + offset,
1448 count);
1449 }
1450 }
1451
1452 ptr = ac_build_gep0(&ctx->ac, ctx->abi->push_constants, addr);
1453
1454 if (instr->dest.ssa.bit_size == 8) {
1455 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1456 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1457 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1458 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1459
1460 LLVMValueRef params[3];
1461 if (load_dwords > 1) {
1462 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1463 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1464 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1465 } else {
1466 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1467 params[0] = ctx->ac.i32_0;
1468 params[1] = res;
1469 }
1470 params[2] = addr;
1471 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1472
1473 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1474 if (instr->dest.ssa.num_components > 1)
1475 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1476 return res;
1477 } else if (instr->dest.ssa.bit_size == 16) {
1478 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1479 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1480 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1481 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1482 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1483 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1484 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1485 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1486 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1487 LLVMConstInt(ctx->ac.i32, 4, false)};
1488 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1489 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1490 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1491 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1492 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1493 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1494 }
1495
1496 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1497
1498 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1499 }
1500
1501 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1502 const nir_intrinsic_instr *instr)
1503 {
1504 LLVMValueRef index = get_src(ctx, instr->src[0]);
1505
1506 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1507 }
1508
1509 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1510 {
1511 uint32_t new_mask = 0;
1512 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1513 if (mask & (1u << i))
1514 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1515 return new_mask;
1516 }
1517
1518 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1519 unsigned start, unsigned count)
1520 {
1521 LLVMValueRef mask[] = {
1522 ctx->i32_0, ctx->i32_1,
1523 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1524
1525 unsigned src_elements = ac_get_llvm_num_components(src);
1526
1527 if (count == src_elements) {
1528 assert(start == 0);
1529 return src;
1530 } else if (count == 1) {
1531 assert(start < src_elements);
1532 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1533 } else {
1534 assert(start + count <= src_elements);
1535 assert(count <= 4);
1536 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1537 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1538 }
1539 }
1540
1541 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1542 enum gl_access_qualifier access,
1543 bool may_store_unaligned,
1544 bool writeonly_memory)
1545 {
1546 unsigned cache_policy = 0;
1547
1548 /* SI has a TC L1 bug causing corruption of 8bit/16bit stores. All
1549 * store opcodes not aligned to a dword are affected. The only way to
1550 * get unaligned stores is through shader images.
1551 */
1552 if (((may_store_unaligned && ctx->ac.chip_class == SI) ||
1553 /* If this is write-only, don't keep data in L1 to prevent
1554 * evicting L1 cache lines that may be needed by other
1555 * instructions.
1556 */
1557 writeonly_memory ||
1558 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1559 cache_policy |= ac_glc;
1560 }
1561
1562 return cache_policy;
1563 }
1564
1565 static void visit_store_ssbo(struct ac_nir_context *ctx,
1566 nir_intrinsic_instr *instr)
1567 {
1568 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1569 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1570 unsigned writemask = nir_intrinsic_write_mask(instr);
1571 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1572 bool writeonly_memory = access & ACCESS_NON_READABLE;
1573 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1574
1575 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1576 get_src(ctx, instr->src[1]), true);
1577 LLVMValueRef base_data = src_data;
1578 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1579 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1580
1581 while (writemask) {
1582 int start, count;
1583 LLVMValueRef data, offset;
1584 LLVMTypeRef data_type;
1585
1586 u_bit_scan_consecutive_range(&writemask, &start, &count);
1587
1588 /* Due to an LLVM limitation, split 3-element writes
1589 * into a 2-element and a 1-element write. */
1590 if (count == 3) {
1591 writemask |= 1 << (start + 2);
1592 count = 2;
1593 }
1594 int num_bytes = count * elem_size_bytes; /* count in bytes */
1595
1596 /* we can only store 4 DWords at the same time.
1597 * can only happen for 64 Bit vectors. */
1598 if (num_bytes > 16) {
1599 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1600 count = 2;
1601 num_bytes = 16;
1602 }
1603
1604 /* check alignment of 16 Bit stores */
1605 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1606 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1607 count = 1;
1608 num_bytes = 2;
1609 }
1610 data = extract_vector_range(&ctx->ac, base_data, start, count);
1611
1612 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1613 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1614
1615 if (num_bytes == 1) {
1616 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1617 offset, ctx->ac.i32_0,
1618 cache_policy & ac_glc,
1619 writeonly_memory);
1620 } else if (num_bytes == 2) {
1621 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1622 offset, ctx->ac.i32_0,
1623 cache_policy & ac_glc,
1624 writeonly_memory);
1625 } else {
1626 int num_channels = num_bytes / 4;
1627
1628 switch (num_bytes) {
1629 case 16: /* v4f32 */
1630 data_type = ctx->ac.v4f32;
1631 break;
1632 case 8: /* v2f32 */
1633 data_type = ctx->ac.v2f32;
1634 break;
1635 case 4: /* f32 */
1636 data_type = ctx->ac.f32;
1637 break;
1638 default:
1639 unreachable("Malformed vector store.");
1640 }
1641 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1642
1643 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1644 num_channels, offset,
1645 ctx->ac.i32_0, 0,
1646 cache_policy & ac_glc,
1647 false, writeonly_memory,
1648 false);
1649 }
1650 }
1651 }
1652
1653 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1654 const nir_intrinsic_instr *instr)
1655 {
1656 const char *op;
1657 char name[64];
1658 LLVMValueRef params[6];
1659 int arg_count = 0;
1660
1661 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1662 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1663 }
1664 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1665 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1666 get_src(ctx, instr->src[0]),
1667 true);
1668 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1669 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1670 params[arg_count++] = ctx->ac.i1false; /* slc */
1671
1672 switch (instr->intrinsic) {
1673 case nir_intrinsic_ssbo_atomic_add:
1674 op = "add";
1675 break;
1676 case nir_intrinsic_ssbo_atomic_imin:
1677 op = "smin";
1678 break;
1679 case nir_intrinsic_ssbo_atomic_umin:
1680 op = "umin";
1681 break;
1682 case nir_intrinsic_ssbo_atomic_imax:
1683 op = "smax";
1684 break;
1685 case nir_intrinsic_ssbo_atomic_umax:
1686 op = "umax";
1687 break;
1688 case nir_intrinsic_ssbo_atomic_and:
1689 op = "and";
1690 break;
1691 case nir_intrinsic_ssbo_atomic_or:
1692 op = "or";
1693 break;
1694 case nir_intrinsic_ssbo_atomic_xor:
1695 op = "xor";
1696 break;
1697 case nir_intrinsic_ssbo_atomic_exchange:
1698 op = "swap";
1699 break;
1700 case nir_intrinsic_ssbo_atomic_comp_swap:
1701 op = "cmpswap";
1702 break;
1703 default:
1704 abort();
1705 }
1706
1707 if (HAVE_LLVM >= 0x900 &&
1708 instr->intrinsic != nir_intrinsic_ssbo_atomic_comp_swap) {
1709 snprintf(name, sizeof(name),
1710 "llvm.amdgcn.buffer.atomic.%s.i32", op);
1711 } else {
1712 snprintf(name, sizeof(name),
1713 "llvm.amdgcn.buffer.atomic.%s", op);
1714 }
1715
1716 return ac_build_intrinsic(&ctx->ac, name, ctx->ac.i32, params, arg_count, 0);
1717 }
1718
1719 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1720 const nir_intrinsic_instr *instr)
1721 {
1722 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1723 int num_components = instr->num_components;
1724 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1725 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1726
1727 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1728 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1729 get_src(ctx, instr->src[0]), false);
1730 LLVMValueRef vindex = ctx->ac.i32_0;
1731
1732 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1733 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1734
1735 LLVMValueRef results[4];
1736 for (int i = 0; i < num_components;) {
1737 int num_elems = num_components - i;
1738 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1739 num_elems = 1;
1740 if (num_elems * elem_size_bytes > 16)
1741 num_elems = 16 / elem_size_bytes;
1742 int load_bytes = num_elems * elem_size_bytes;
1743
1744 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1745
1746 LLVMValueRef ret;
1747
1748 if (load_bytes == 1) {
1749 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1750 rsrc,
1751 offset,
1752 ctx->ac.i32_0,
1753 immoffset,
1754 cache_policy & ac_glc);
1755 } else if (load_bytes == 2) {
1756 ret = ac_build_tbuffer_load_short(&ctx->ac,
1757 rsrc,
1758 offset,
1759 ctx->ac.i32_0,
1760 immoffset,
1761 cache_policy & ac_glc);
1762 } else {
1763 int num_channels = util_next_power_of_two(load_bytes) / 4;
1764
1765 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1766 vindex, offset, immoffset, 0,
1767 cache_policy & ac_glc, 0,
1768 false, false);
1769 }
1770
1771 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1772 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1773 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1774
1775 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1776 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1777
1778 for (unsigned j = 0; j < num_elems; j++) {
1779 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1780 }
1781 i += num_elems;
1782 }
1783
1784 return ac_build_gather_values(&ctx->ac, results, num_components);
1785 }
1786
1787 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1788 const nir_intrinsic_instr *instr)
1789 {
1790 LLVMValueRef ret;
1791 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1792 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1793 int num_components = instr->num_components;
1794
1795 if (ctx->abi->load_ubo)
1796 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1797
1798 if (instr->dest.ssa.bit_size == 64)
1799 num_components *= 2;
1800
1801 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1802 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1803 LLVMValueRef results[num_components];
1804 for (unsigned i = 0; i < num_components; ++i) {
1805 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1806 load_bytes * i, 0);
1807
1808 if (load_bytes == 1) {
1809 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1810 rsrc,
1811 offset,
1812 ctx->ac.i32_0,
1813 immoffset,
1814 false);
1815 } else {
1816 assert(load_bytes == 2);
1817 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1818 rsrc,
1819 offset,
1820 ctx->ac.i32_0,
1821 immoffset,
1822 false);
1823 }
1824 }
1825 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1826 } else {
1827 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1828 NULL, 0, false, false, true, true);
1829
1830 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1831 }
1832
1833 return LLVMBuildBitCast(ctx->ac.builder, ret,
1834 get_def_type(ctx, &instr->dest.ssa), "");
1835 }
1836
1837 static void
1838 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1839 bool vs_in, unsigned *vertex_index_out,
1840 LLVMValueRef *vertex_index_ref,
1841 unsigned *const_out, LLVMValueRef *indir_out)
1842 {
1843 nir_variable *var = nir_deref_instr_get_variable(instr);
1844 nir_deref_path path;
1845 unsigned idx_lvl = 1;
1846
1847 nir_deref_path_init(&path, instr, NULL);
1848
1849 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1850 if (vertex_index_ref) {
1851 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1852 if (vertex_index_out)
1853 *vertex_index_out = 0;
1854 } else {
1855 nir_const_value *v = nir_src_as_const_value(path.path[idx_lvl]->arr.index);
1856 assert(v);
1857 *vertex_index_out = v->u32[0];
1858 }
1859 ++idx_lvl;
1860 }
1861
1862 uint32_t const_offset = 0;
1863 LLVMValueRef offset = NULL;
1864
1865 if (var->data.compact) {
1866 assert(instr->deref_type == nir_deref_type_array);
1867 nir_const_value *v = nir_src_as_const_value(instr->arr.index);
1868 assert(v);
1869 const_offset = v->u32[0];
1870 goto out;
1871 }
1872
1873 for (; path.path[idx_lvl]; ++idx_lvl) {
1874 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1875 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1876 unsigned index = path.path[idx_lvl]->strct.index;
1877
1878 for (unsigned i = 0; i < index; i++) {
1879 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1880 const_offset += glsl_count_attribute_slots(ft, vs_in);
1881 }
1882 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1883 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1884 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1885 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1886 if (offset)
1887 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1888 else
1889 offset = array_off;
1890 } else
1891 unreachable("Uhandled deref type in get_deref_instr_offset");
1892 }
1893
1894 out:
1895 nir_deref_path_finish(&path);
1896
1897 if (const_offset && offset)
1898 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1899 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1900 "");
1901
1902 *const_out = const_offset;
1903 *indir_out = offset;
1904 }
1905
1906 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1907 nir_intrinsic_instr *instr,
1908 bool load_inputs)
1909 {
1910 LLVMValueRef result;
1911 LLVMValueRef vertex_index = NULL;
1912 LLVMValueRef indir_index = NULL;
1913 unsigned const_index = 0;
1914
1915 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1916
1917 unsigned location = var->data.location;
1918 unsigned driver_location = var->data.driver_location;
1919 const bool is_patch = var->data.patch;
1920 const bool is_compact = var->data.compact;
1921
1922 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1923 false, NULL, is_patch ? NULL : &vertex_index,
1924 &const_index, &indir_index);
1925
1926 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1927
1928 LLVMTypeRef src_component_type;
1929 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1930 src_component_type = LLVMGetElementType(dest_type);
1931 else
1932 src_component_type = dest_type;
1933
1934 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1935 vertex_index, indir_index,
1936 const_index, location, driver_location,
1937 var->data.location_frac,
1938 instr->num_components,
1939 is_patch, is_compact, load_inputs);
1940 if (instr->dest.ssa.bit_size == 16) {
1941 result = ac_to_integer(&ctx->ac, result);
1942 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1943 }
1944 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1945 }
1946
1947 static unsigned
1948 type_scalar_size_bytes(const struct glsl_type *type)
1949 {
1950 assert(glsl_type_is_vector_or_scalar(type) ||
1951 glsl_type_is_matrix(type));
1952 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1953 }
1954
1955 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1956 nir_intrinsic_instr *instr)
1957 {
1958 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1959 nir_variable *var = nir_deref_instr_get_variable(deref);
1960
1961 LLVMValueRef values[8];
1962 int idx = 0;
1963 int ve = instr->dest.ssa.num_components;
1964 unsigned comp = 0;
1965 LLVMValueRef indir_index;
1966 LLVMValueRef ret;
1967 unsigned const_index;
1968 unsigned stride = 4;
1969 int mode = deref->mode;
1970
1971 if (var) {
1972 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1973 var->data.mode == nir_var_shader_in;
1974 idx = var->data.driver_location;
1975 comp = var->data.location_frac;
1976 mode = var->data.mode;
1977
1978 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1979 &const_index, &indir_index);
1980
1981 if (var->data.compact) {
1982 stride = 1;
1983 const_index += comp;
1984 comp = 0;
1985 }
1986 }
1987
1988 if (instr->dest.ssa.bit_size == 64 &&
1989 (deref->mode == nir_var_shader_in ||
1990 deref->mode == nir_var_shader_out ||
1991 deref->mode == nir_var_function_temp))
1992 ve *= 2;
1993
1994 switch (mode) {
1995 case nir_var_shader_in:
1996 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1997 ctx->stage == MESA_SHADER_TESS_EVAL) {
1998 return load_tess_varyings(ctx, instr, true);
1999 }
2000
2001 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2002 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2003 LLVMValueRef indir_index;
2004 unsigned const_index, vertex_index;
2005 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2006 &const_index, &indir_index);
2007
2008 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2009 var->data.driver_location,
2010 var->data.location_frac,
2011 instr->num_components, vertex_index, const_index, type);
2012 }
2013
2014 for (unsigned chan = comp; chan < ve + comp; chan++) {
2015 if (indir_index) {
2016 unsigned count = glsl_count_attribute_slots(
2017 var->type,
2018 ctx->stage == MESA_SHADER_VERTEX);
2019 count -= chan / 4;
2020 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2021 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2022 stride, false, true);
2023
2024 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2025 tmp_vec,
2026 indir_index, "");
2027 } else
2028 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2029 }
2030 break;
2031 case nir_var_function_temp:
2032 for (unsigned chan = 0; chan < ve; chan++) {
2033 if (indir_index) {
2034 unsigned count = glsl_count_attribute_slots(
2035 var->type, false);
2036 count -= chan / 4;
2037 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2038 &ctx->ac, ctx->locals + idx + chan, count,
2039 stride, true, true);
2040
2041 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2042 tmp_vec,
2043 indir_index, "");
2044 } else {
2045 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2046 }
2047 }
2048 break;
2049 case nir_var_mem_shared: {
2050 LLVMValueRef address = get_src(ctx, instr->src[0]);
2051 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2052 return LLVMBuildBitCast(ctx->ac.builder, val,
2053 get_def_type(ctx, &instr->dest.ssa),
2054 "");
2055 }
2056 case nir_var_shader_out:
2057 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2058 return load_tess_varyings(ctx, instr, false);
2059 }
2060
2061 for (unsigned chan = comp; chan < ve + comp; chan++) {
2062 if (indir_index) {
2063 unsigned count = glsl_count_attribute_slots(
2064 var->type, false);
2065 count -= chan / 4;
2066 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2067 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2068 stride, true, true);
2069
2070 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2071 tmp_vec,
2072 indir_index, "");
2073 } else {
2074 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2075 ctx->abi->outputs[idx + chan + const_index * stride],
2076 "");
2077 }
2078 }
2079 break;
2080 case nir_var_mem_global: {
2081 LLVMValueRef address = get_src(ctx, instr->src[0]);
2082 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2083 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2084 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2085
2086 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2087 if (stride != natural_stride) {
2088 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2089 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2090 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2091
2092 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2093 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2094 values[i] = LLVMBuildLoad(ctx->ac.builder,
2095 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2096 }
2097 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2098 } else {
2099 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2100 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2101 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2102 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2103 return val;
2104 }
2105 }
2106 default:
2107 unreachable("unhandle variable mode");
2108 }
2109 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2110 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2111 }
2112
2113 static void
2114 visit_store_var(struct ac_nir_context *ctx,
2115 nir_intrinsic_instr *instr)
2116 {
2117 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2118 nir_variable *var = nir_deref_instr_get_variable(deref);
2119
2120 LLVMValueRef temp_ptr, value;
2121 int idx = 0;
2122 unsigned comp = 0;
2123 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2124 int writemask = instr->const_index[0];
2125 LLVMValueRef indir_index;
2126 unsigned const_index;
2127
2128 if (var) {
2129 get_deref_offset(ctx, deref, false,
2130 NULL, NULL, &const_index, &indir_index);
2131 idx = var->data.driver_location;
2132 comp = var->data.location_frac;
2133
2134 if (var->data.compact) {
2135 const_index += comp;
2136 comp = 0;
2137 }
2138 }
2139
2140 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2141 (deref->mode == nir_var_shader_out ||
2142 deref->mode == nir_var_function_temp)) {
2143
2144 src = LLVMBuildBitCast(ctx->ac.builder, src,
2145 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2146 "");
2147
2148 writemask = widen_mask(writemask, 2);
2149 }
2150
2151 writemask = writemask << comp;
2152
2153 switch (deref->mode) {
2154 case nir_var_shader_out:
2155
2156 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2157 LLVMValueRef vertex_index = NULL;
2158 LLVMValueRef indir_index = NULL;
2159 unsigned const_index = 0;
2160 const bool is_patch = var->data.patch;
2161
2162 get_deref_offset(ctx, deref, false, NULL,
2163 is_patch ? NULL : &vertex_index,
2164 &const_index, &indir_index);
2165
2166 ctx->abi->store_tcs_outputs(ctx->abi, var,
2167 vertex_index, indir_index,
2168 const_index, src, writemask);
2169 return;
2170 }
2171
2172 for (unsigned chan = 0; chan < 8; chan++) {
2173 int stride = 4;
2174 if (!(writemask & (1 << chan)))
2175 continue;
2176
2177 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2178
2179 if (var->data.compact)
2180 stride = 1;
2181 if (indir_index) {
2182 unsigned count = glsl_count_attribute_slots(
2183 var->type, false);
2184 count -= chan / 4;
2185 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2186 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2187 stride, true, true);
2188
2189 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2190 value, indir_index, "");
2191 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2192 count, stride, tmp_vec);
2193
2194 } else {
2195 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2196
2197 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2198 }
2199 }
2200 break;
2201 case nir_var_function_temp:
2202 for (unsigned chan = 0; chan < 8; chan++) {
2203 if (!(writemask & (1 << chan)))
2204 continue;
2205
2206 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2207 if (indir_index) {
2208 unsigned count = glsl_count_attribute_slots(
2209 var->type, false);
2210 count -= chan / 4;
2211 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2212 &ctx->ac, ctx->locals + idx + chan, count,
2213 4, true, true);
2214
2215 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2216 value, indir_index, "");
2217 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2218 count, 4, tmp_vec);
2219 } else {
2220 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2221
2222 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2223 }
2224 }
2225 break;
2226
2227 case nir_var_mem_global:
2228 case nir_var_mem_shared: {
2229 int writemask = instr->const_index[0];
2230 LLVMValueRef address = get_src(ctx, instr->src[0]);
2231 LLVMValueRef val = get_src(ctx, instr->src[1]);
2232
2233 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2234 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2235 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2236
2237 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2238 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2239 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2240
2241 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2242 stride == natural_stride) {
2243 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2244 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2245 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2246
2247 val = LLVMBuildBitCast(ctx->ac.builder, val,
2248 LLVMGetElementType(LLVMTypeOf(address)), "");
2249 LLVMBuildStore(ctx->ac.builder, val, address);
2250 } else {
2251 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2252 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2253 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2254 for (unsigned chan = 0; chan < 4; chan++) {
2255 if (!(writemask & (1 << chan)))
2256 continue;
2257
2258 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2259
2260 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2261 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2262 chan);
2263 src = LLVMBuildBitCast(ctx->ac.builder, src,
2264 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2265 LLVMBuildStore(ctx->ac.builder, src, ptr);
2266 }
2267 }
2268 break;
2269 }
2270 default:
2271 abort();
2272 break;
2273 }
2274 }
2275
2276 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2277 {
2278 switch (dim) {
2279 case GLSL_SAMPLER_DIM_BUF:
2280 return 1;
2281 case GLSL_SAMPLER_DIM_1D:
2282 return array ? 2 : 1;
2283 case GLSL_SAMPLER_DIM_2D:
2284 return array ? 3 : 2;
2285 case GLSL_SAMPLER_DIM_MS:
2286 return array ? 4 : 3;
2287 case GLSL_SAMPLER_DIM_3D:
2288 case GLSL_SAMPLER_DIM_CUBE:
2289 return 3;
2290 case GLSL_SAMPLER_DIM_RECT:
2291 case GLSL_SAMPLER_DIM_SUBPASS:
2292 return 2;
2293 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2294 return 3;
2295 default:
2296 break;
2297 }
2298 return 0;
2299 }
2300
2301
2302 /* Adjust the sample index according to FMASK.
2303 *
2304 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
2305 * which is the identity mapping. Each nibble says which physical sample
2306 * should be fetched to get that sample.
2307 *
2308 * For example, 0x11111100 means there are only 2 samples stored and
2309 * the second sample covers 3/4 of the pixel. When reading samples 0
2310 * and 1, return physical sample 0 (determined by the first two 0s
2311 * in FMASK), otherwise return physical sample 1.
2312 *
2313 * The sample index should be adjusted as follows:
2314 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
2315 */
2316 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2317 LLVMValueRef coord_x, LLVMValueRef coord_y,
2318 LLVMValueRef coord_z,
2319 LLVMValueRef sample_index,
2320 LLVMValueRef fmask_desc_ptr)
2321 {
2322 struct ac_image_args args = {0};
2323 LLVMValueRef res;
2324
2325 args.coords[0] = coord_x;
2326 args.coords[1] = coord_y;
2327 if (coord_z)
2328 args.coords[2] = coord_z;
2329
2330 args.opcode = ac_image_load;
2331 args.dim = coord_z ? ac_image_2darray : ac_image_2d;
2332 args.resource = fmask_desc_ptr;
2333 args.dmask = 0xf;
2334 args.attributes = AC_FUNC_ATTR_READNONE;
2335
2336 res = ac_build_image_opcode(ctx, &args);
2337
2338 res = ac_to_integer(ctx, res);
2339 LLVMValueRef four = LLVMConstInt(ctx->i32, 4, false);
2340 LLVMValueRef F = LLVMConstInt(ctx->i32, 0xf, false);
2341
2342 LLVMValueRef fmask = LLVMBuildExtractElement(ctx->builder,
2343 res,
2344 ctx->i32_0, "");
2345
2346 LLVMValueRef sample_index4 =
2347 LLVMBuildMul(ctx->builder, sample_index, four, "");
2348 LLVMValueRef shifted_fmask =
2349 LLVMBuildLShr(ctx->builder, fmask, sample_index4, "");
2350 LLVMValueRef final_sample =
2351 LLVMBuildAnd(ctx->builder, shifted_fmask, F, "");
2352
2353 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
2354 * resource descriptor is 0 (invalid),
2355 */
2356 LLVMValueRef fmask_desc =
2357 LLVMBuildBitCast(ctx->builder, fmask_desc_ptr,
2358 ctx->v8i32, "");
2359
2360 LLVMValueRef fmask_word1 =
2361 LLVMBuildExtractElement(ctx->builder, fmask_desc,
2362 ctx->i32_1, "");
2363
2364 LLVMValueRef word1_is_nonzero =
2365 LLVMBuildICmp(ctx->builder, LLVMIntNE,
2366 fmask_word1, ctx->i32_0, "");
2367
2368 /* Replace the MSAA sample index. */
2369 sample_index =
2370 LLVMBuildSelect(ctx->builder, word1_is_nonzero,
2371 final_sample, sample_index, "");
2372 return sample_index;
2373 }
2374
2375 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2376 {
2377 assert(instr->src[0].is_ssa);
2378 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2379 }
2380
2381 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2382 const nir_intrinsic_instr *instr,
2383 enum ac_descriptor_type desc_type,
2384 bool write)
2385 {
2386 nir_deref_instr *deref_instr =
2387 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2388 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2389
2390 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2391 }
2392
2393 static void get_image_coords(struct ac_nir_context *ctx,
2394 const nir_intrinsic_instr *instr,
2395 struct ac_image_args *args,
2396 enum glsl_sampler_dim dim,
2397 bool is_array)
2398 {
2399 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2400 LLVMValueRef masks[] = {
2401 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2402 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2403 };
2404 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2405
2406 int count;
2407 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2408 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2409 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2410 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2411 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2412 count = image_type_to_components_count(dim, is_array);
2413
2414 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2415 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2416 LLVMValueRef fmask_load_address[3];
2417 int chan;
2418
2419 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2420 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2421 if (is_array)
2422 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2423 else
2424 fmask_load_address[2] = NULL;
2425 if (add_frag_pos) {
2426 for (chan = 0; chan < 2; ++chan)
2427 fmask_load_address[chan] =
2428 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2429 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2430 ctx->ac.i32, ""), "");
2431 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2432 }
2433 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2434 fmask_load_address[0],
2435 fmask_load_address[1],
2436 fmask_load_address[2],
2437 sample_index,
2438 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2439 AC_DESC_FMASK, &instr->instr, false, false));
2440 }
2441 if (count == 1 && !gfx9_1d) {
2442 if (instr->src[1].ssa->num_components)
2443 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2444 else
2445 args->coords[0] = src0;
2446 } else {
2447 int chan;
2448 if (is_ms)
2449 count--;
2450 for (chan = 0; chan < count; ++chan) {
2451 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2452 }
2453 if (add_frag_pos) {
2454 for (chan = 0; chan < 2; ++chan) {
2455 args->coords[chan] = LLVMBuildAdd(
2456 ctx->ac.builder, args->coords[chan],
2457 LLVMBuildFPToUI(
2458 ctx->ac.builder, ctx->abi->frag_pos[chan],
2459 ctx->ac.i32, ""), "");
2460 }
2461 args->coords[2] = ac_to_integer(&ctx->ac,
2462 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2463 count++;
2464 }
2465
2466 if (gfx9_1d) {
2467 if (is_array) {
2468 args->coords[2] = args->coords[1];
2469 args->coords[1] = ctx->ac.i32_0;
2470 } else
2471 args->coords[1] = ctx->ac.i32_0;
2472 count++;
2473 }
2474
2475 if (is_ms) {
2476 args->coords[count] = sample_index;
2477 count++;
2478 }
2479 }
2480 }
2481
2482 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2483 const nir_intrinsic_instr *instr, bool write)
2484 {
2485 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2486 if (ctx->abi->gfx9_stride_size_workaround) {
2487 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2488 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2489 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2490
2491 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2492 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2493 elem_count, stride, "");
2494
2495 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2496 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2497 }
2498 return rsrc;
2499 }
2500
2501 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2502 const nir_intrinsic_instr *instr,
2503 bool bindless)
2504 {
2505 LLVMValueRef res;
2506
2507 enum glsl_sampler_dim dim;
2508 enum gl_access_qualifier access;
2509 bool is_array;
2510 if (bindless) {
2511 dim = nir_intrinsic_image_dim(instr);
2512 access = nir_intrinsic_access(instr);
2513 is_array = nir_intrinsic_image_array(instr);
2514 } else {
2515 const nir_deref_instr *image_deref = get_image_deref(instr);
2516 const struct glsl_type *type = image_deref->type;
2517 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2518 dim = glsl_get_sampler_dim(type);
2519 access = var->data.image.access;
2520 is_array = glsl_sampler_type_is_array(type);
2521 }
2522
2523 struct ac_image_args args = {};
2524
2525 args.cache_policy = get_cache_policy(ctx, access, false, false);
2526
2527 if (dim == GLSL_SAMPLER_DIM_BUF) {
2528 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2529 unsigned num_channels = util_last_bit(mask);
2530 LLVMValueRef rsrc, vindex;
2531
2532 rsrc = get_image_buffer_descriptor(ctx, instr, false);
2533 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2534 ctx->ac.i32_0, "");
2535
2536 /* TODO: set "can_speculate" when OpenGL needs it. */
2537 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2538 ctx->ac.i32_0, num_channels,
2539 !!(args.cache_policy & ac_glc),
2540 false);
2541 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2542
2543 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2544 res = ac_to_integer(&ctx->ac, res);
2545 } else {
2546 args.opcode = ac_image_load;
2547 get_image_coords(ctx, instr, &args, dim, is_array);
2548 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2549 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2550 args.dmask = 15;
2551 args.attributes = AC_FUNC_ATTR_READONLY;
2552
2553 res = ac_build_image_opcode(&ctx->ac, &args);
2554 }
2555 return ac_to_integer(&ctx->ac, res);
2556 }
2557
2558 static void visit_image_store(struct ac_nir_context *ctx,
2559 nir_intrinsic_instr *instr,
2560 bool bindless)
2561 {
2562
2563
2564 enum glsl_sampler_dim dim;
2565 enum gl_access_qualifier access;
2566 bool is_array;
2567 if (bindless) {
2568 dim = nir_intrinsic_image_dim(instr);
2569 access = nir_intrinsic_access(instr);
2570 is_array = nir_intrinsic_image_array(instr);
2571 } else {
2572 const nir_deref_instr *image_deref = get_image_deref(instr);
2573 const struct glsl_type *type = image_deref->type;
2574 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2575 dim = glsl_get_sampler_dim(type);
2576 access = var->data.image.access;
2577 is_array = glsl_sampler_type_is_array(type);
2578 }
2579
2580 bool writeonly_memory = access & ACCESS_NON_READABLE;
2581 struct ac_image_args args = {};
2582
2583 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2584
2585 if (dim == GLSL_SAMPLER_DIM_BUF) {
2586 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true);
2587 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2588 unsigned src_channels = ac_get_llvm_num_components(src);
2589 LLVMValueRef vindex;
2590
2591 if (src_channels == 3)
2592 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2593
2594 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2595 get_src(ctx, instr->src[1]),
2596 ctx->ac.i32_0, "");
2597
2598 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2599 ctx->ac.i32_0, src_channels,
2600 args.cache_policy & ac_glc,
2601 writeonly_memory);
2602 } else {
2603 args.opcode = ac_image_store;
2604 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2605 get_image_coords(ctx, instr, &args, dim, is_array);
2606 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2607 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2608 args.dmask = 15;
2609
2610 ac_build_image_opcode(&ctx->ac, &args);
2611 }
2612
2613 }
2614
2615 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2616 const nir_intrinsic_instr *instr,
2617 bool bindless)
2618 {
2619 LLVMValueRef params[7];
2620 int param_count = 0;
2621
2622 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2623 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2624 const char *atomic_name;
2625 char intrinsic_name[64];
2626 enum ac_atomic_op atomic_subop;
2627 MAYBE_UNUSED int length;
2628
2629 enum glsl_sampler_dim dim;
2630 bool is_unsigned;
2631 bool is_array;
2632 if (bindless) {
2633 if (instr->intrinsic == nir_intrinsic_image_atomic_min ||
2634 instr->intrinsic == nir_intrinsic_image_atomic_max) {
2635 const GLenum format = nir_intrinsic_format(instr);
2636 assert(format == GL_R32UI || format == GL_R32I);
2637 is_unsigned = format == GL_R32UI;
2638 }
2639 dim = nir_intrinsic_image_dim(instr);
2640 is_array = nir_intrinsic_image_array(instr);
2641 } else {
2642 const struct glsl_type *type = get_image_deref(instr)->type;
2643 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2644 dim = glsl_get_sampler_dim(type);
2645 is_array = glsl_sampler_type_is_array(type);
2646 }
2647
2648 switch (instr->intrinsic) {
2649 case nir_intrinsic_bindless_image_atomic_add:
2650 case nir_intrinsic_image_deref_atomic_add:
2651 atomic_name = "add";
2652 atomic_subop = ac_atomic_add;
2653 break;
2654 case nir_intrinsic_bindless_image_atomic_min:
2655 case nir_intrinsic_image_deref_atomic_min:
2656 atomic_name = is_unsigned ? "umin" : "smin";
2657 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2658 break;
2659 case nir_intrinsic_bindless_image_atomic_max:
2660 case nir_intrinsic_image_deref_atomic_max:
2661 atomic_name = is_unsigned ? "umax" : "smax";
2662 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2663 break;
2664 case nir_intrinsic_bindless_image_atomic_and:
2665 case nir_intrinsic_image_deref_atomic_and:
2666 atomic_name = "and";
2667 atomic_subop = ac_atomic_and;
2668 break;
2669 case nir_intrinsic_bindless_image_atomic_or:
2670 case nir_intrinsic_image_deref_atomic_or:
2671 atomic_name = "or";
2672 atomic_subop = ac_atomic_or;
2673 break;
2674 case nir_intrinsic_bindless_image_atomic_xor:
2675 case nir_intrinsic_image_deref_atomic_xor:
2676 atomic_name = "xor";
2677 atomic_subop = ac_atomic_xor;
2678 break;
2679 case nir_intrinsic_bindless_image_atomic_exchange:
2680 case nir_intrinsic_image_deref_atomic_exchange:
2681 atomic_name = "swap";
2682 atomic_subop = ac_atomic_swap;
2683 break;
2684 case nir_intrinsic_bindless_image_atomic_comp_swap:
2685 case nir_intrinsic_image_deref_atomic_comp_swap:
2686 atomic_name = "cmpswap";
2687 atomic_subop = 0; /* not used */
2688 break;
2689 default:
2690 abort();
2691 }
2692
2693 if (cmpswap)
2694 params[param_count++] = get_src(ctx, instr->src[4]);
2695 params[param_count++] = get_src(ctx, instr->src[3]);
2696
2697 if (dim == GLSL_SAMPLER_DIM_BUF) {
2698 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true);
2699 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2700 ctx->ac.i32_0, ""); /* vindex */
2701 params[param_count++] = ctx->ac.i32_0; /* voffset */
2702 if (HAVE_LLVM >= 0x800) {
2703 params[param_count++] = ctx->ac.i32_0; /* soffset */
2704 params[param_count++] = ctx->ac.i32_0; /* slc */
2705
2706 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2707 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2708 } else {
2709 params[param_count++] = ctx->ac.i1false; /* slc */
2710
2711 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2712 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2713 }
2714
2715 assert(length < sizeof(intrinsic_name));
2716 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2717 params, param_count, 0);
2718 } else {
2719 struct ac_image_args args = {};
2720 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2721 args.atomic = atomic_subop;
2722 args.data[0] = params[0];
2723 if (cmpswap)
2724 args.data[1] = params[1];
2725 get_image_coords(ctx, instr, &args, dim, is_array);
2726 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2727 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2728
2729 return ac_build_image_opcode(&ctx->ac, &args);
2730 }
2731 }
2732
2733 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2734 const nir_intrinsic_instr *instr,
2735 bool bindless)
2736 {
2737 enum glsl_sampler_dim dim;
2738 bool is_array;
2739 if (bindless) {
2740 dim = nir_intrinsic_image_dim(instr);
2741 is_array = nir_intrinsic_image_array(instr);
2742 } else {
2743 const struct glsl_type *type = get_image_deref(instr)->type;
2744 dim = glsl_get_sampler_dim(type);
2745 is_array = glsl_sampler_type_is_array(type);
2746 }
2747
2748 struct ac_image_args args = { 0 };
2749 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2750 args.dmask = 0xf;
2751 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2752 args.opcode = ac_image_get_resinfo;
2753 args.lod = ctx->ac.i32_0;
2754 args.attributes = AC_FUNC_ATTR_READNONE;
2755
2756 return ac_build_image_opcode(&ctx->ac, &args);
2757 }
2758
2759 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2760 const nir_intrinsic_instr *instr,
2761 bool bindless)
2762 {
2763 LLVMValueRef res;
2764
2765 enum glsl_sampler_dim dim;
2766 bool is_array;
2767 if (bindless) {
2768 dim = nir_intrinsic_image_dim(instr);
2769 is_array = nir_intrinsic_image_array(instr);
2770 } else {
2771 const struct glsl_type *type = get_image_deref(instr)->type;
2772 dim = glsl_get_sampler_dim(type);
2773 is_array = glsl_sampler_type_is_array(type);
2774 }
2775
2776 if (dim == GLSL_SAMPLER_DIM_BUF)
2777 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2778
2779 struct ac_image_args args = { 0 };
2780
2781 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2782 args.dmask = 0xf;
2783 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2784 args.opcode = ac_image_get_resinfo;
2785 args.lod = ctx->ac.i32_0;
2786 args.attributes = AC_FUNC_ATTR_READNONE;
2787
2788 res = ac_build_image_opcode(&ctx->ac, &args);
2789
2790 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2791
2792 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2793 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2794 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2795 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2796 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2797 }
2798 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2799 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2800 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2801 ctx->ac.i32_1, "");
2802
2803 }
2804 return res;
2805 }
2806
2807 static void emit_membar(struct ac_llvm_context *ac,
2808 const nir_intrinsic_instr *instr)
2809 {
2810 unsigned waitcnt = NOOP_WAITCNT;
2811
2812 switch (instr->intrinsic) {
2813 case nir_intrinsic_memory_barrier:
2814 case nir_intrinsic_group_memory_barrier:
2815 waitcnt &= VM_CNT & LGKM_CNT;
2816 break;
2817 case nir_intrinsic_memory_barrier_atomic_counter:
2818 case nir_intrinsic_memory_barrier_buffer:
2819 case nir_intrinsic_memory_barrier_image:
2820 waitcnt &= VM_CNT;
2821 break;
2822 case nir_intrinsic_memory_barrier_shared:
2823 waitcnt &= LGKM_CNT;
2824 break;
2825 default:
2826 break;
2827 }
2828 if (waitcnt != NOOP_WAITCNT)
2829 ac_build_waitcnt(ac, waitcnt);
2830 }
2831
2832 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2833 {
2834 /* SI only (thanks to a hw bug workaround):
2835 * The real barrier instruction isn’t needed, because an entire patch
2836 * always fits into a single wave.
2837 */
2838 if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
2839 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2840 return;
2841 }
2842 ac_build_s_barrier(ac);
2843 }
2844
2845 static void emit_discard(struct ac_nir_context *ctx,
2846 const nir_intrinsic_instr *instr)
2847 {
2848 LLVMValueRef cond;
2849
2850 if (instr->intrinsic == nir_intrinsic_discard_if) {
2851 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2852 get_src(ctx, instr->src[0]),
2853 ctx->ac.i32_0, "");
2854 } else {
2855 assert(instr->intrinsic == nir_intrinsic_discard);
2856 cond = ctx->ac.i1false;
2857 }
2858
2859 ctx->abi->emit_kill(ctx->abi, cond);
2860 }
2861
2862 static LLVMValueRef
2863 visit_load_helper_invocation(struct ac_nir_context *ctx)
2864 {
2865 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2866 "llvm.amdgcn.ps.live",
2867 ctx->ac.i1, NULL, 0,
2868 AC_FUNC_ATTR_READNONE);
2869 result = LLVMBuildNot(ctx->ac.builder, result, "");
2870 return LLVMBuildSExt(ctx->ac.builder, result, ctx->ac.i32, "");
2871 }
2872
2873 static LLVMValueRef
2874 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2875 {
2876 LLVMValueRef result;
2877 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2878 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2879 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2880
2881 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2882 }
2883
2884 static LLVMValueRef
2885 visit_load_subgroup_id(struct ac_nir_context *ctx)
2886 {
2887 if (ctx->stage == MESA_SHADER_COMPUTE) {
2888 LLVMValueRef result;
2889 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2890 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2891 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2892 } else {
2893 return LLVMConstInt(ctx->ac.i32, 0, false);
2894 }
2895 }
2896
2897 static LLVMValueRef
2898 visit_load_num_subgroups(struct ac_nir_context *ctx)
2899 {
2900 if (ctx->stage == MESA_SHADER_COMPUTE) {
2901 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2902 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2903 } else {
2904 return LLVMConstInt(ctx->ac.i32, 1, false);
2905 }
2906 }
2907
2908 static LLVMValueRef
2909 visit_first_invocation(struct ac_nir_context *ctx)
2910 {
2911 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2912
2913 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2914 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2915 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2916 "llvm.cttz.i64",
2917 ctx->ac.i64, args, 2,
2918 AC_FUNC_ATTR_NOUNWIND |
2919 AC_FUNC_ATTR_READNONE);
2920
2921 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2922 }
2923
2924 static LLVMValueRef
2925 visit_load_shared(struct ac_nir_context *ctx,
2926 const nir_intrinsic_instr *instr)
2927 {
2928 LLVMValueRef values[4], derived_ptr, index, ret;
2929
2930 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2931
2932 for (int chan = 0; chan < instr->num_components; chan++) {
2933 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2934 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2935 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2936 }
2937
2938 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2939 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2940 }
2941
2942 static void
2943 visit_store_shared(struct ac_nir_context *ctx,
2944 const nir_intrinsic_instr *instr)
2945 {
2946 LLVMValueRef derived_ptr, data,index;
2947 LLVMBuilderRef builder = ctx->ac.builder;
2948
2949 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2950 LLVMValueRef src = get_src(ctx, instr->src[0]);
2951
2952 int writemask = nir_intrinsic_write_mask(instr);
2953 for (int chan = 0; chan < 4; chan++) {
2954 if (!(writemask & (1 << chan))) {
2955 continue;
2956 }
2957 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2958 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2959 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2960 LLVMBuildStore(builder, data, derived_ptr);
2961 }
2962 }
2963
2964 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2965 const nir_intrinsic_instr *instr,
2966 LLVMValueRef ptr, int src_idx)
2967 {
2968 LLVMValueRef result;
2969 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2970
2971 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2972 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2973 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2974 result = LLVMBuildAtomicCmpXchg(ctx->ac.builder,
2975 ptr, src, src1,
2976 LLVMAtomicOrderingSequentiallyConsistent,
2977 LLVMAtomicOrderingSequentiallyConsistent,
2978 false);
2979 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2980 } else {
2981 LLVMAtomicRMWBinOp op;
2982 switch (instr->intrinsic) {
2983 case nir_intrinsic_shared_atomic_add:
2984 case nir_intrinsic_deref_atomic_add:
2985 op = LLVMAtomicRMWBinOpAdd;
2986 break;
2987 case nir_intrinsic_shared_atomic_umin:
2988 case nir_intrinsic_deref_atomic_umin:
2989 op = LLVMAtomicRMWBinOpUMin;
2990 break;
2991 case nir_intrinsic_shared_atomic_umax:
2992 case nir_intrinsic_deref_atomic_umax:
2993 op = LLVMAtomicRMWBinOpUMax;
2994 break;
2995 case nir_intrinsic_shared_atomic_imin:
2996 case nir_intrinsic_deref_atomic_imin:
2997 op = LLVMAtomicRMWBinOpMin;
2998 break;
2999 case nir_intrinsic_shared_atomic_imax:
3000 case nir_intrinsic_deref_atomic_imax:
3001 op = LLVMAtomicRMWBinOpMax;
3002 break;
3003 case nir_intrinsic_shared_atomic_and:
3004 case nir_intrinsic_deref_atomic_and:
3005 op = LLVMAtomicRMWBinOpAnd;
3006 break;
3007 case nir_intrinsic_shared_atomic_or:
3008 case nir_intrinsic_deref_atomic_or:
3009 op = LLVMAtomicRMWBinOpOr;
3010 break;
3011 case nir_intrinsic_shared_atomic_xor:
3012 case nir_intrinsic_deref_atomic_xor:
3013 op = LLVMAtomicRMWBinOpXor;
3014 break;
3015 case nir_intrinsic_shared_atomic_exchange:
3016 case nir_intrinsic_deref_atomic_exchange:
3017 op = LLVMAtomicRMWBinOpXchg;
3018 break;
3019 default:
3020 return NULL;
3021 }
3022
3023 result = LLVMBuildAtomicRMW(ctx->ac.builder, op, ptr, ac_to_integer(&ctx->ac, src),
3024 LLVMAtomicOrderingSequentiallyConsistent,
3025 false);
3026 }
3027 return result;
3028 }
3029
3030 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3031 {
3032 LLVMValueRef values[2];
3033 LLVMValueRef pos[2];
3034
3035 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
3036 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
3037
3038 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3039 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3040 return ac_build_gather_values(&ctx->ac, values, 2);
3041 }
3042
3043 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
3044 const nir_intrinsic_instr *instr)
3045 {
3046 LLVMValueRef result[4];
3047 LLVMValueRef interp_param;
3048 unsigned location;
3049 unsigned chan;
3050 LLVMValueRef src_c0 = NULL;
3051 LLVMValueRef src_c1 = NULL;
3052 LLVMValueRef src0 = NULL;
3053
3054 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3055 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
3056 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
3057 switch (instr->intrinsic) {
3058 case nir_intrinsic_interp_deref_at_centroid:
3059 location = INTERP_CENTROID;
3060 break;
3061 case nir_intrinsic_interp_deref_at_sample:
3062 case nir_intrinsic_interp_deref_at_offset:
3063 location = INTERP_CENTER;
3064 src0 = get_src(ctx, instr->src[1]);
3065 break;
3066 default:
3067 break;
3068 }
3069
3070 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
3071 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
3072 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
3073 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
3074 LLVMValueRef sample_position;
3075 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3076
3077 /* fetch sample ID */
3078 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
3079
3080 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
3081 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3082 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
3083 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3084 }
3085 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3086
3087 if (location == INTERP_CENTER) {
3088 LLVMValueRef ij_out[2];
3089 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3090
3091 /*
3092 * take the I then J parameters, and the DDX/Y for it, and
3093 * calculate the IJ inputs for the interpolator.
3094 * temp1 = ddx * offset/sample.x + I;
3095 * interp_param.I = ddy * offset/sample.y + temp1;
3096 * temp1 = ddx * offset/sample.x + J;
3097 * interp_param.J = ddy * offset/sample.y + temp1;
3098 */
3099 for (unsigned i = 0; i < 2; i++) {
3100 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3101 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3102 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3103 ddxy_out, ix_ll, "");
3104 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3105 ddxy_out, iy_ll, "");
3106 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3107 interp_param, ix_ll, "");
3108 LLVMValueRef temp1, temp2;
3109
3110 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3111 ctx->ac.f32, "");
3112
3113 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3114 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3115
3116 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3117 temp2, ctx->ac.i32, "");
3118 }
3119 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3120
3121 }
3122
3123 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3124 while(deref_instr->deref_type != nir_deref_type_var) {
3125 if (deref_instr->deref_type == nir_deref_type_array) {
3126 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3127
3128 LLVMValueRef offset;
3129 nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
3130 if (const_value) {
3131 offset = LLVMConstInt(ctx->ac.i32, array_size * const_value->u32[0], false);
3132 } else {
3133 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3134
3135 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3136 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3137 }
3138
3139 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3140 deref_instr = nir_src_as_deref(deref_instr->parent);
3141 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3142 LLVMValueRef offset;
3143 unsigned sidx = deref_instr->strct.index;
3144 deref_instr = nir_src_as_deref(deref_instr->parent);
3145 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3146 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3147 } else {
3148 unreachable("Unsupported deref type");
3149 }
3150
3151 }
3152
3153 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3154 for (chan = 0; chan < 4; chan++) {
3155 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3156 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3157
3158 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3159 LLVMValueRef v, attr_number;
3160
3161 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3162 if (interp_param) {
3163 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3164 interp_param, ctx->ac.v2f32, "");
3165 LLVMValueRef i = LLVMBuildExtractElement(
3166 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3167 LLVMValueRef j = LLVMBuildExtractElement(
3168 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3169
3170 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3171 ctx->abi->prim_mask, i, j);
3172 } else {
3173 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3174 llvm_chan, attr_number, ctx->abi->prim_mask);
3175 }
3176
3177 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3178 LLVMConstInt(ctx->ac.i32, idx, false), "");
3179 }
3180
3181 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3182
3183 }
3184 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3185 var->data.location_frac);
3186 }
3187
3188 static void visit_intrinsic(struct ac_nir_context *ctx,
3189 nir_intrinsic_instr *instr)
3190 {
3191 LLVMValueRef result = NULL;
3192
3193 switch (instr->intrinsic) {
3194 case nir_intrinsic_ballot:
3195 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3196 break;
3197 case nir_intrinsic_read_invocation:
3198 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3199 get_src(ctx, instr->src[1]));
3200 break;
3201 case nir_intrinsic_read_first_invocation:
3202 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3203 break;
3204 case nir_intrinsic_load_subgroup_invocation:
3205 result = ac_get_thread_id(&ctx->ac);
3206 break;
3207 case nir_intrinsic_load_work_group_id: {
3208 LLVMValueRef values[3];
3209
3210 for (int i = 0; i < 3; i++) {
3211 values[i] = ctx->abi->workgroup_ids[i] ?
3212 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3213 }
3214
3215 result = ac_build_gather_values(&ctx->ac, values, 3);
3216 break;
3217 }
3218 case nir_intrinsic_load_base_vertex:
3219 case nir_intrinsic_load_first_vertex:
3220 result = ctx->abi->load_base_vertex(ctx->abi);
3221 break;
3222 case nir_intrinsic_load_local_group_size:
3223 result = ctx->abi->load_local_group_size(ctx->abi);
3224 break;
3225 case nir_intrinsic_load_vertex_id:
3226 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3227 ctx->abi->base_vertex, "");
3228 break;
3229 case nir_intrinsic_load_vertex_id_zero_base: {
3230 result = ctx->abi->vertex_id;
3231 break;
3232 }
3233 case nir_intrinsic_load_local_invocation_id: {
3234 result = ctx->abi->local_invocation_ids;
3235 break;
3236 }
3237 case nir_intrinsic_load_base_instance:
3238 result = ctx->abi->start_instance;
3239 break;
3240 case nir_intrinsic_load_draw_id:
3241 result = ctx->abi->draw_id;
3242 break;
3243 case nir_intrinsic_load_view_index:
3244 result = ctx->abi->view_index;
3245 break;
3246 case nir_intrinsic_load_invocation_id:
3247 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3248 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3249 else
3250 result = ctx->abi->gs_invocation_id;
3251 break;
3252 case nir_intrinsic_load_primitive_id:
3253 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3254 result = ctx->abi->gs_prim_id;
3255 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3256 result = ctx->abi->tcs_patch_id;
3257 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3258 result = ctx->abi->tes_patch_id;
3259 } else
3260 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3261 break;
3262 case nir_intrinsic_load_sample_id:
3263 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3264 break;
3265 case nir_intrinsic_load_sample_pos:
3266 result = load_sample_pos(ctx);
3267 break;
3268 case nir_intrinsic_load_sample_mask_in:
3269 result = ctx->abi->load_sample_mask_in(ctx->abi);
3270 break;
3271 case nir_intrinsic_load_frag_coord: {
3272 LLVMValueRef values[4] = {
3273 ctx->abi->frag_pos[0],
3274 ctx->abi->frag_pos[1],
3275 ctx->abi->frag_pos[2],
3276 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3277 };
3278 result = ac_to_integer(&ctx->ac,
3279 ac_build_gather_values(&ctx->ac, values, 4));
3280 break;
3281 }
3282 case nir_intrinsic_load_front_face:
3283 result = ctx->abi->front_face;
3284 break;
3285 case nir_intrinsic_load_helper_invocation:
3286 result = visit_load_helper_invocation(ctx);
3287 break;
3288 case nir_intrinsic_load_instance_id:
3289 result = ctx->abi->instance_id;
3290 break;
3291 case nir_intrinsic_load_num_work_groups:
3292 result = ctx->abi->num_work_groups;
3293 break;
3294 case nir_intrinsic_load_local_invocation_index:
3295 result = visit_load_local_invocation_index(ctx);
3296 break;
3297 case nir_intrinsic_load_subgroup_id:
3298 result = visit_load_subgroup_id(ctx);
3299 break;
3300 case nir_intrinsic_load_num_subgroups:
3301 result = visit_load_num_subgroups(ctx);
3302 break;
3303 case nir_intrinsic_first_invocation:
3304 result = visit_first_invocation(ctx);
3305 break;
3306 case nir_intrinsic_load_push_constant:
3307 result = visit_load_push_constant(ctx, instr);
3308 break;
3309 case nir_intrinsic_vulkan_resource_index: {
3310 LLVMValueRef index = get_src(ctx, instr->src[0]);
3311 unsigned desc_set = nir_intrinsic_desc_set(instr);
3312 unsigned binding = nir_intrinsic_binding(instr);
3313
3314 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3315 binding);
3316 break;
3317 }
3318 case nir_intrinsic_vulkan_resource_reindex:
3319 result = visit_vulkan_resource_reindex(ctx, instr);
3320 break;
3321 case nir_intrinsic_store_ssbo:
3322 visit_store_ssbo(ctx, instr);
3323 break;
3324 case nir_intrinsic_load_ssbo:
3325 result = visit_load_buffer(ctx, instr);
3326 break;
3327 case nir_intrinsic_ssbo_atomic_add:
3328 case nir_intrinsic_ssbo_atomic_imin:
3329 case nir_intrinsic_ssbo_atomic_umin:
3330 case nir_intrinsic_ssbo_atomic_imax:
3331 case nir_intrinsic_ssbo_atomic_umax:
3332 case nir_intrinsic_ssbo_atomic_and:
3333 case nir_intrinsic_ssbo_atomic_or:
3334 case nir_intrinsic_ssbo_atomic_xor:
3335 case nir_intrinsic_ssbo_atomic_exchange:
3336 case nir_intrinsic_ssbo_atomic_comp_swap:
3337 result = visit_atomic_ssbo(ctx, instr);
3338 break;
3339 case nir_intrinsic_load_ubo:
3340 result = visit_load_ubo_buffer(ctx, instr);
3341 break;
3342 case nir_intrinsic_get_buffer_size:
3343 result = visit_get_buffer_size(ctx, instr);
3344 break;
3345 case nir_intrinsic_load_deref:
3346 result = visit_load_var(ctx, instr);
3347 break;
3348 case nir_intrinsic_store_deref:
3349 visit_store_var(ctx, instr);
3350 break;
3351 case nir_intrinsic_load_shared:
3352 result = visit_load_shared(ctx, instr);
3353 break;
3354 case nir_intrinsic_store_shared:
3355 visit_store_shared(ctx, instr);
3356 break;
3357 case nir_intrinsic_bindless_image_samples:
3358 result = visit_image_samples(ctx, instr, true);
3359 break;
3360 case nir_intrinsic_image_deref_samples:
3361 result = visit_image_samples(ctx, instr, false);
3362 break;
3363 case nir_intrinsic_bindless_image_load:
3364 result = visit_image_load(ctx, instr, true);
3365 break;
3366 case nir_intrinsic_image_deref_load:
3367 result = visit_image_load(ctx, instr, false);
3368 break;
3369 case nir_intrinsic_bindless_image_store:
3370 visit_image_store(ctx, instr, true);
3371 break;
3372 case nir_intrinsic_image_deref_store:
3373 visit_image_store(ctx, instr, false);
3374 break;
3375 case nir_intrinsic_bindless_image_atomic_add:
3376 case nir_intrinsic_bindless_image_atomic_min:
3377 case nir_intrinsic_bindless_image_atomic_max:
3378 case nir_intrinsic_bindless_image_atomic_and:
3379 case nir_intrinsic_bindless_image_atomic_or:
3380 case nir_intrinsic_bindless_image_atomic_xor:
3381 case nir_intrinsic_bindless_image_atomic_exchange:
3382 case nir_intrinsic_bindless_image_atomic_comp_swap:
3383 result = visit_image_atomic(ctx, instr, true);
3384 break;
3385 case nir_intrinsic_image_deref_atomic_add:
3386 case nir_intrinsic_image_deref_atomic_min:
3387 case nir_intrinsic_image_deref_atomic_max:
3388 case nir_intrinsic_image_deref_atomic_and:
3389 case nir_intrinsic_image_deref_atomic_or:
3390 case nir_intrinsic_image_deref_atomic_xor:
3391 case nir_intrinsic_image_deref_atomic_exchange:
3392 case nir_intrinsic_image_deref_atomic_comp_swap:
3393 result = visit_image_atomic(ctx, instr, false);
3394 break;
3395 case nir_intrinsic_bindless_image_size:
3396 result = visit_image_size(ctx, instr, true);
3397 break;
3398 case nir_intrinsic_image_deref_size:
3399 result = visit_image_size(ctx, instr, false);
3400 break;
3401 case nir_intrinsic_shader_clock:
3402 result = ac_build_shader_clock(&ctx->ac);
3403 break;
3404 case nir_intrinsic_discard:
3405 case nir_intrinsic_discard_if:
3406 emit_discard(ctx, instr);
3407 break;
3408 case nir_intrinsic_memory_barrier:
3409 case nir_intrinsic_group_memory_barrier:
3410 case nir_intrinsic_memory_barrier_atomic_counter:
3411 case nir_intrinsic_memory_barrier_buffer:
3412 case nir_intrinsic_memory_barrier_image:
3413 case nir_intrinsic_memory_barrier_shared:
3414 emit_membar(&ctx->ac, instr);
3415 break;
3416 case nir_intrinsic_barrier:
3417 ac_emit_barrier(&ctx->ac, ctx->stage);
3418 break;
3419 case nir_intrinsic_shared_atomic_add:
3420 case nir_intrinsic_shared_atomic_imin:
3421 case nir_intrinsic_shared_atomic_umin:
3422 case nir_intrinsic_shared_atomic_imax:
3423 case nir_intrinsic_shared_atomic_umax:
3424 case nir_intrinsic_shared_atomic_and:
3425 case nir_intrinsic_shared_atomic_or:
3426 case nir_intrinsic_shared_atomic_xor:
3427 case nir_intrinsic_shared_atomic_exchange:
3428 case nir_intrinsic_shared_atomic_comp_swap: {
3429 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3430 result = visit_var_atomic(ctx, instr, ptr, 1);
3431 break;
3432 }
3433 case nir_intrinsic_deref_atomic_add:
3434 case nir_intrinsic_deref_atomic_imin:
3435 case nir_intrinsic_deref_atomic_umin:
3436 case nir_intrinsic_deref_atomic_imax:
3437 case nir_intrinsic_deref_atomic_umax:
3438 case nir_intrinsic_deref_atomic_and:
3439 case nir_intrinsic_deref_atomic_or:
3440 case nir_intrinsic_deref_atomic_xor:
3441 case nir_intrinsic_deref_atomic_exchange:
3442 case nir_intrinsic_deref_atomic_comp_swap: {
3443 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3444 result = visit_var_atomic(ctx, instr, ptr, 1);
3445 break;
3446 }
3447 case nir_intrinsic_interp_deref_at_centroid:
3448 case nir_intrinsic_interp_deref_at_sample:
3449 case nir_intrinsic_interp_deref_at_offset:
3450 result = visit_interp(ctx, instr);
3451 break;
3452 case nir_intrinsic_emit_vertex:
3453 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3454 break;
3455 case nir_intrinsic_end_primitive:
3456 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3457 break;
3458 case nir_intrinsic_load_tess_coord:
3459 result = ctx->abi->load_tess_coord(ctx->abi);
3460 break;
3461 case nir_intrinsic_load_tess_level_outer:
3462 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3463 break;
3464 case nir_intrinsic_load_tess_level_inner:
3465 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3466 break;
3467 case nir_intrinsic_load_patch_vertices_in:
3468 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3469 break;
3470 case nir_intrinsic_vote_all: {
3471 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3472 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3473 break;
3474 }
3475 case nir_intrinsic_vote_any: {
3476 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3477 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3478 break;
3479 }
3480 case nir_intrinsic_shuffle:
3481 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3482 get_src(ctx, instr->src[1]));
3483 break;
3484 case nir_intrinsic_reduce:
3485 result = ac_build_reduce(&ctx->ac,
3486 get_src(ctx, instr->src[0]),
3487 instr->const_index[0],
3488 instr->const_index[1]);
3489 break;
3490 case nir_intrinsic_inclusive_scan:
3491 result = ac_build_inclusive_scan(&ctx->ac,
3492 get_src(ctx, instr->src[0]),
3493 instr->const_index[0]);
3494 break;
3495 case nir_intrinsic_exclusive_scan:
3496 result = ac_build_exclusive_scan(&ctx->ac,
3497 get_src(ctx, instr->src[0]),
3498 instr->const_index[0]);
3499 break;
3500 case nir_intrinsic_quad_broadcast: {
3501 unsigned lane = nir_src_as_const_value(instr->src[1])->u32[0];
3502 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3503 lane, lane, lane, lane);
3504 break;
3505 }
3506 case nir_intrinsic_quad_swap_horizontal:
3507 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3508 break;
3509 case nir_intrinsic_quad_swap_vertical:
3510 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3511 break;
3512 case nir_intrinsic_quad_swap_diagonal:
3513 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3514 break;
3515 default:
3516 fprintf(stderr, "Unknown intrinsic: ");
3517 nir_print_instr(&instr->instr, stderr);
3518 fprintf(stderr, "\n");
3519 break;
3520 }
3521 if (result) {
3522 ctx->ssa_defs[instr->dest.ssa.index] = result;
3523 }
3524 }
3525
3526 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3527 unsigned base_index,
3528 unsigned constant_index,
3529 LLVMValueRef dynamic_index)
3530 {
3531 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3532 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3533 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3534
3535 /* Bindless uniforms are 64bit so multiple index by 8 */
3536 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3537 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3538
3539 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3540
3541 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3542 NULL, 0, false, false, true, true);
3543
3544 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3545 }
3546
3547 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3548 nir_deref_instr *deref_instr,
3549 enum ac_descriptor_type desc_type,
3550 const nir_instr *instr,
3551 bool image, bool write)
3552 {
3553 LLVMValueRef index = NULL;
3554 unsigned constant_index = 0;
3555 unsigned descriptor_set;
3556 unsigned base_index;
3557 bool bindless = false;
3558
3559 if (!deref_instr) {
3560 descriptor_set = 0;
3561 if (image) {
3562 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3563 base_index = 0;
3564 bindless = true;
3565 index = get_src(ctx, img_instr->src[0]);
3566 } else {
3567 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3568 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3569 nir_tex_src_sampler_handle);
3570 if (sampSrcIdx != -1) {
3571 base_index = 0;
3572 bindless = true;
3573 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3574 } else {
3575 assert(tex_instr && !image);
3576 base_index = tex_instr->sampler_index;
3577 }
3578 }
3579 } else {
3580 while(deref_instr->deref_type != nir_deref_type_var) {
3581 if (deref_instr->deref_type == nir_deref_type_array) {
3582 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3583 if (!array_size)
3584 array_size = 1;
3585
3586 nir_const_value *const_value = nir_src_as_const_value(deref_instr->arr.index);
3587 if (const_value) {
3588 constant_index += array_size * const_value->u32[0];
3589 } else {
3590 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3591
3592 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3593 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3594
3595 if (!index)
3596 index = indirect;
3597 else
3598 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3599 }
3600
3601 deref_instr = nir_src_as_deref(deref_instr->parent);
3602 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3603 unsigned sidx = deref_instr->strct.index;
3604 deref_instr = nir_src_as_deref(deref_instr->parent);
3605 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3606 } else {
3607 unreachable("Unsupported deref type");
3608 }
3609 }
3610 descriptor_set = deref_instr->var->data.descriptor_set;
3611
3612 if (deref_instr->var->data.bindless) {
3613 /* For now just assert on unhandled variable types */
3614 assert(deref_instr->var->data.mode == nir_var_uniform);
3615
3616 base_index = deref_instr->var->data.driver_location;
3617 bindless = true;
3618
3619 index = index ? index : ctx->ac.i32_0;
3620 index = get_bindless_index_from_uniform(ctx, base_index,
3621 constant_index, index);
3622 } else
3623 base_index = deref_instr->var->data.binding;
3624 }
3625
3626 return ctx->abi->load_sampler_desc(ctx->abi,
3627 descriptor_set,
3628 base_index,
3629 constant_index, index,
3630 desc_type, image, write, bindless);
3631 }
3632
3633 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3634 *
3635 * SI-CI:
3636 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3637 * filtering manually. The driver sets img7 to a mask clearing
3638 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3639 * s_and_b32 samp0, samp0, img7
3640 *
3641 * VI:
3642 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3643 */
3644 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3645 LLVMValueRef res, LLVMValueRef samp)
3646 {
3647 LLVMBuilderRef builder = ctx->ac.builder;
3648 LLVMValueRef img7, samp0;
3649
3650 if (ctx->ac.chip_class >= VI)
3651 return samp;
3652
3653 img7 = LLVMBuildExtractElement(builder, res,
3654 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3655 samp0 = LLVMBuildExtractElement(builder, samp,
3656 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3657 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3658 return LLVMBuildInsertElement(builder, samp, samp0,
3659 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3660 }
3661
3662 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3663 nir_tex_instr *instr,
3664 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3665 LLVMValueRef *fmask_ptr)
3666 {
3667 nir_deref_instr *texture_deref_instr = NULL;
3668 nir_deref_instr *sampler_deref_instr = NULL;
3669
3670 for (unsigned i = 0; i < instr->num_srcs; i++) {
3671 switch (instr->src[i].src_type) {
3672 case nir_tex_src_texture_deref:
3673 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3674 break;
3675 case nir_tex_src_sampler_deref:
3676 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3677 break;
3678 default:
3679 break;
3680 }
3681 }
3682
3683 if (!sampler_deref_instr)
3684 sampler_deref_instr = texture_deref_instr;
3685
3686 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
3687 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_BUFFER, &instr->instr, false, false);
3688 else
3689 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_IMAGE, &instr->instr, false, false);
3690 if (samp_ptr) {
3691 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3692 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3693 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3694 }
3695 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3696 instr->op == nir_texop_samples_identical))
3697 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3698 }
3699
3700 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3701 LLVMValueRef coord)
3702 {
3703 coord = ac_to_float(ctx, coord);
3704 coord = ac_build_round(ctx, coord);
3705 coord = ac_to_integer(ctx, coord);
3706 return coord;
3707 }
3708
3709 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3710 {
3711 LLVMValueRef result = NULL;
3712 struct ac_image_args args = { 0 };
3713 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3714 LLVMValueRef ddx = NULL, ddy = NULL;
3715 unsigned offset_src = 0;
3716
3717 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3718
3719 for (unsigned i = 0; i < instr->num_srcs; i++) {
3720 switch (instr->src[i].src_type) {
3721 case nir_tex_src_coord: {
3722 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3723 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3724 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3725 break;
3726 }
3727 case nir_tex_src_projector:
3728 break;
3729 case nir_tex_src_comparator:
3730 if (instr->is_shadow)
3731 args.compare = get_src(ctx, instr->src[i].src);
3732 break;
3733 case nir_tex_src_offset:
3734 args.offset = get_src(ctx, instr->src[i].src);
3735 offset_src = i;
3736 break;
3737 case nir_tex_src_bias:
3738 if (instr->op == nir_texop_txb)
3739 args.bias = get_src(ctx, instr->src[i].src);
3740 break;
3741 case nir_tex_src_lod: {
3742 nir_const_value *val = nir_src_as_const_value(instr->src[i].src);
3743
3744 if (val && val->i32[0] == 0)
3745 args.level_zero = true;
3746 else
3747 args.lod = get_src(ctx, instr->src[i].src);
3748 break;
3749 }
3750 case nir_tex_src_ms_index:
3751 sample_index = get_src(ctx, instr->src[i].src);
3752 break;
3753 case nir_tex_src_ms_mcs:
3754 break;
3755 case nir_tex_src_ddx:
3756 ddx = get_src(ctx, instr->src[i].src);
3757 break;
3758 case nir_tex_src_ddy:
3759 ddy = get_src(ctx, instr->src[i].src);
3760 break;
3761 case nir_tex_src_texture_offset:
3762 case nir_tex_src_sampler_offset:
3763 case nir_tex_src_plane:
3764 default:
3765 break;
3766 }
3767 }
3768
3769 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3770 result = get_buffer_size(ctx, args.resource, true);
3771 goto write_result;
3772 }
3773
3774 if (instr->op == nir_texop_texture_samples) {
3775 LLVMValueRef res, samples, is_msaa;
3776 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3777 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3778 LLVMConstInt(ctx->ac.i32, 3, false), "");
3779 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3780 LLVMConstInt(ctx->ac.i32, 28, false), "");
3781 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3782 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3783 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3784 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3785
3786 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3787 LLVMConstInt(ctx->ac.i32, 16, false), "");
3788 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3789 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3790 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3791 samples, "");
3792 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3793 ctx->ac.i32_1, "");
3794 result = samples;
3795 goto write_result;
3796 }
3797
3798 if (args.offset && instr->op != nir_texop_txf) {
3799 LLVMValueRef offset[3], pack;
3800 for (unsigned chan = 0; chan < 3; ++chan)
3801 offset[chan] = ctx->ac.i32_0;
3802
3803 unsigned num_components = ac_get_llvm_num_components(args.offset);
3804 for (unsigned chan = 0; chan < num_components; chan++) {
3805 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3806 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3807 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3808 if (chan)
3809 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3810 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3811 }
3812 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3813 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3814 args.offset = pack;
3815 }
3816
3817 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3818 * so the depth comparison value isn't clamped for Z16 and
3819 * Z24 anymore. Do it manually here.
3820 *
3821 * It's unnecessary if the original texture format was
3822 * Z32_FLOAT, but we don't know that here.
3823 */
3824 if (args.compare && ctx->ac.chip_class >= VI && ctx->abi->clamp_shadow_reference)
3825 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3826
3827 /* pack derivatives */
3828 if (ddx || ddy) {
3829 int num_src_deriv_channels, num_dest_deriv_channels;
3830 switch (instr->sampler_dim) {
3831 case GLSL_SAMPLER_DIM_3D:
3832 case GLSL_SAMPLER_DIM_CUBE:
3833 num_src_deriv_channels = 3;
3834 num_dest_deriv_channels = 3;
3835 break;
3836 case GLSL_SAMPLER_DIM_2D:
3837 default:
3838 num_src_deriv_channels = 2;
3839 num_dest_deriv_channels = 2;
3840 break;
3841 case GLSL_SAMPLER_DIM_1D:
3842 num_src_deriv_channels = 1;
3843 if (ctx->ac.chip_class >= GFX9) {
3844 num_dest_deriv_channels = 2;
3845 } else {
3846 num_dest_deriv_channels = 1;
3847 }
3848 break;
3849 }
3850
3851 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3852 args.derivs[i] = ac_to_float(&ctx->ac,
3853 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3854 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3855 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3856 }
3857 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3858 args.derivs[i] = ctx->ac.f32_0;
3859 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3860 }
3861 }
3862
3863 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3864 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3865 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3866 if (instr->coord_components == 3)
3867 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3868 ac_prepare_cube_coords(&ctx->ac,
3869 instr->op == nir_texop_txd, instr->is_array,
3870 instr->op == nir_texop_lod, args.coords, args.derivs);
3871 }
3872
3873 /* Texture coordinates fixups */
3874 if (instr->coord_components > 1 &&
3875 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3876 instr->is_array &&
3877 instr->op != nir_texop_txf) {
3878 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3879 }
3880
3881 if (instr->coord_components > 2 &&
3882 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3883 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3884 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3885 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3886 instr->is_array &&
3887 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3888 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3889 }
3890
3891 if (ctx->ac.chip_class >= GFX9 &&
3892 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3893 instr->op != nir_texop_lod) {
3894 LLVMValueRef filler;
3895 if (instr->op == nir_texop_txf)
3896 filler = ctx->ac.i32_0;
3897 else
3898 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3899
3900 if (instr->is_array)
3901 args.coords[2] = args.coords[1];
3902 args.coords[1] = filler;
3903 }
3904
3905 /* Pack sample index */
3906 if (instr->op == nir_texop_txf_ms && sample_index)
3907 args.coords[instr->coord_components] = sample_index;
3908
3909 if (instr->op == nir_texop_samples_identical) {
3910 struct ac_image_args txf_args = { 0 };
3911 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3912
3913 txf_args.dmask = 0xf;
3914 txf_args.resource = fmask_ptr;
3915 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3916 result = build_tex_intrinsic(ctx, instr, &txf_args);
3917
3918 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3919 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3920 goto write_result;
3921 }
3922
3923 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3924 instr->op != nir_texop_txs) {
3925 unsigned sample_chan = instr->is_array ? 3 : 2;
3926 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3927 &ctx->ac, args.coords[0], args.coords[1],
3928 instr->is_array ? args.coords[2] : NULL,
3929 args.coords[sample_chan], fmask_ptr);
3930 }
3931
3932 if (args.offset && instr->op == nir_texop_txf) {
3933 nir_const_value *const_offset =
3934 nir_src_as_const_value(instr->src[offset_src].src);
3935 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3936 assert(const_offset);
3937 num_offsets = MIN2(num_offsets, instr->coord_components);
3938 for (unsigned i = 0; i < num_offsets; ++i) {
3939 args.coords[i] = LLVMBuildAdd(
3940 ctx->ac.builder, args.coords[i],
3941 LLVMConstInt(ctx->ac.i32, const_offset->i32[i], false), "");
3942 }
3943 args.offset = NULL;
3944 }
3945
3946 /* TODO TG4 support */
3947 args.dmask = 0xf;
3948 if (instr->op == nir_texop_tg4) {
3949 if (instr->is_shadow)
3950 args.dmask = 1;
3951 else
3952 args.dmask = 1 << instr->component;
3953 }
3954
3955 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3956 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3957 result = build_tex_intrinsic(ctx, instr, &args);
3958
3959 if (instr->op == nir_texop_query_levels)
3960 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3961 else if (instr->is_shadow && instr->is_new_style_shadow &&
3962 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3963 instr->op != nir_texop_tg4)
3964 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3965 else if (instr->op == nir_texop_txs &&
3966 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3967 instr->is_array) {
3968 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3969 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3970 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3971 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3972 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3973 } else if (ctx->ac.chip_class >= GFX9 &&
3974 instr->op == nir_texop_txs &&
3975 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3976 instr->is_array) {
3977 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3978 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3979 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3980 ctx->ac.i32_1, "");
3981 } else if (instr->dest.ssa.num_components != 4)
3982 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3983
3984 write_result:
3985 if (result) {
3986 assert(instr->dest.is_ssa);
3987 result = ac_to_integer(&ctx->ac, result);
3988 ctx->ssa_defs[instr->dest.ssa.index] = result;
3989 }
3990 }
3991
3992
3993 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3994 {
3995 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3996 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3997
3998 ctx->ssa_defs[instr->dest.ssa.index] = result;
3999 _mesa_hash_table_insert(ctx->phis, instr, result);
4000 }
4001
4002 static void visit_post_phi(struct ac_nir_context *ctx,
4003 nir_phi_instr *instr,
4004 LLVMValueRef llvm_phi)
4005 {
4006 nir_foreach_phi_src(src, instr) {
4007 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4008 LLVMValueRef llvm_src = get_src(ctx, src->src);
4009
4010 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4011 }
4012 }
4013
4014 static void phi_post_pass(struct ac_nir_context *ctx)
4015 {
4016 hash_table_foreach(ctx->phis, entry) {
4017 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4018 (LLVMValueRef)entry->data);
4019 }
4020 }
4021
4022
4023 static void visit_ssa_undef(struct ac_nir_context *ctx,
4024 const nir_ssa_undef_instr *instr)
4025 {
4026 unsigned num_components = instr->def.num_components;
4027 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4028 LLVMValueRef undef;
4029
4030 if (num_components == 1)
4031 undef = LLVMGetUndef(type);
4032 else {
4033 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4034 }
4035 ctx->ssa_defs[instr->def.index] = undef;
4036 }
4037
4038 static void visit_jump(struct ac_llvm_context *ctx,
4039 const nir_jump_instr *instr)
4040 {
4041 switch (instr->type) {
4042 case nir_jump_break:
4043 ac_build_break(ctx);
4044 break;
4045 case nir_jump_continue:
4046 ac_build_continue(ctx);
4047 break;
4048 default:
4049 fprintf(stderr, "Unknown NIR jump instr: ");
4050 nir_print_instr(&instr->instr, stderr);
4051 fprintf(stderr, "\n");
4052 abort();
4053 }
4054 }
4055
4056 static LLVMTypeRef
4057 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4058 enum glsl_base_type type)
4059 {
4060 switch (type) {
4061 case GLSL_TYPE_INT:
4062 case GLSL_TYPE_UINT:
4063 case GLSL_TYPE_BOOL:
4064 case GLSL_TYPE_SUBROUTINE:
4065 return ac->i32;
4066 case GLSL_TYPE_INT8:
4067 case GLSL_TYPE_UINT8:
4068 return ac->i8;
4069 case GLSL_TYPE_INT16:
4070 case GLSL_TYPE_UINT16:
4071 return ac->i16;
4072 case GLSL_TYPE_FLOAT:
4073 return ac->f32;
4074 case GLSL_TYPE_FLOAT16:
4075 return ac->f16;
4076 case GLSL_TYPE_INT64:
4077 case GLSL_TYPE_UINT64:
4078 return ac->i64;
4079 case GLSL_TYPE_DOUBLE:
4080 return ac->f64;
4081 default:
4082 unreachable("unknown GLSL type");
4083 }
4084 }
4085
4086 static LLVMTypeRef
4087 glsl_to_llvm_type(struct ac_llvm_context *ac,
4088 const struct glsl_type *type)
4089 {
4090 if (glsl_type_is_scalar(type)) {
4091 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4092 }
4093
4094 if (glsl_type_is_vector(type)) {
4095 return LLVMVectorType(
4096 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4097 glsl_get_vector_elements(type));
4098 }
4099
4100 if (glsl_type_is_matrix(type)) {
4101 return LLVMArrayType(
4102 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4103 glsl_get_matrix_columns(type));
4104 }
4105
4106 if (glsl_type_is_array(type)) {
4107 return LLVMArrayType(
4108 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4109 glsl_get_length(type));
4110 }
4111
4112 assert(glsl_type_is_struct_or_ifc(type));
4113
4114 LLVMTypeRef member_types[glsl_get_length(type)];
4115
4116 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4117 member_types[i] =
4118 glsl_to_llvm_type(ac,
4119 glsl_get_struct_field(type, i));
4120 }
4121
4122 return LLVMStructTypeInContext(ac->context, member_types,
4123 glsl_get_length(type), false);
4124 }
4125
4126 static void visit_deref(struct ac_nir_context *ctx,
4127 nir_deref_instr *instr)
4128 {
4129 if (instr->mode != nir_var_mem_shared &&
4130 instr->mode != nir_var_mem_global)
4131 return;
4132
4133 LLVMValueRef result = NULL;
4134 switch(instr->deref_type) {
4135 case nir_deref_type_var: {
4136 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4137 result = entry->data;
4138 break;
4139 }
4140 case nir_deref_type_struct:
4141 if (instr->mode == nir_var_mem_global) {
4142 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4143 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4144 instr->strct.index);
4145 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4146 LLVMConstInt(ctx->ac.i32, offset, 0));
4147 } else {
4148 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4149 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4150 }
4151 break;
4152 case nir_deref_type_array:
4153 if (instr->mode == nir_var_mem_global) {
4154 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4155 unsigned stride = glsl_get_explicit_stride(parent->type);
4156
4157 if ((glsl_type_is_matrix(parent->type) &&
4158 glsl_matrix_type_is_row_major(parent->type)) ||
4159 (glsl_type_is_vector(parent->type) && stride == 0))
4160 stride = type_scalar_size_bytes(parent->type);
4161
4162 assert(stride > 0);
4163 LLVMValueRef index = get_src(ctx, instr->arr.index);
4164 if (LLVMTypeOf(index) != ctx->ac.i64)
4165 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4166
4167 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4168
4169 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4170 } else {
4171 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4172 get_src(ctx, instr->arr.index));
4173 }
4174 break;
4175 case nir_deref_type_ptr_as_array:
4176 if (instr->mode == nir_var_mem_global) {
4177 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4178
4179 LLVMValueRef index = get_src(ctx, instr->arr.index);
4180 if (LLVMTypeOf(index) != ctx->ac.i64)
4181 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4182
4183 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4184
4185 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4186 } else {
4187 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4188 get_src(ctx, instr->arr.index));
4189 }
4190 break;
4191 case nir_deref_type_cast: {
4192 result = get_src(ctx, instr->parent);
4193
4194 /* We can't use the structs from LLVM because the shader
4195 * specifies its own offsets. */
4196 LLVMTypeRef pointee_type = ctx->ac.i8;
4197 if (instr->mode == nir_var_mem_shared)
4198 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4199
4200 unsigned address_space;
4201
4202 switch(instr->mode) {
4203 case nir_var_mem_shared:
4204 address_space = AC_ADDR_SPACE_LDS;
4205 break;
4206 case nir_var_mem_global:
4207 address_space = AC_ADDR_SPACE_GLOBAL;
4208 break;
4209 default:
4210 unreachable("Unhandled address space");
4211 }
4212
4213 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4214
4215 if (LLVMTypeOf(result) != type) {
4216 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4217 result = LLVMBuildBitCast(ctx->ac.builder, result,
4218 type, "");
4219 } else {
4220 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4221 type, "");
4222 }
4223 }
4224 break;
4225 }
4226 default:
4227 unreachable("Unhandled deref_instr deref type");
4228 }
4229
4230 ctx->ssa_defs[instr->dest.ssa.index] = result;
4231 }
4232
4233 static void visit_cf_list(struct ac_nir_context *ctx,
4234 struct exec_list *list);
4235
4236 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4237 {
4238 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4239 nir_foreach_instr(instr, block)
4240 {
4241 switch (instr->type) {
4242 case nir_instr_type_alu:
4243 visit_alu(ctx, nir_instr_as_alu(instr));
4244 break;
4245 case nir_instr_type_load_const:
4246 visit_load_const(ctx, nir_instr_as_load_const(instr));
4247 break;
4248 case nir_instr_type_intrinsic:
4249 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4250 break;
4251 case nir_instr_type_tex:
4252 visit_tex(ctx, nir_instr_as_tex(instr));
4253 break;
4254 case nir_instr_type_phi:
4255 visit_phi(ctx, nir_instr_as_phi(instr));
4256 break;
4257 case nir_instr_type_ssa_undef:
4258 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4259 break;
4260 case nir_instr_type_jump:
4261 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4262 break;
4263 case nir_instr_type_deref:
4264 visit_deref(ctx, nir_instr_as_deref(instr));
4265 break;
4266 default:
4267 fprintf(stderr, "Unknown NIR instr type: ");
4268 nir_print_instr(instr, stderr);
4269 fprintf(stderr, "\n");
4270 abort();
4271 }
4272 }
4273
4274 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4275 }
4276
4277 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4278 {
4279 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4280
4281 nir_block *then_block =
4282 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4283
4284 ac_build_uif(&ctx->ac, value, then_block->index);
4285
4286 visit_cf_list(ctx, &if_stmt->then_list);
4287
4288 if (!exec_list_is_empty(&if_stmt->else_list)) {
4289 nir_block *else_block =
4290 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4291
4292 ac_build_else(&ctx->ac, else_block->index);
4293 visit_cf_list(ctx, &if_stmt->else_list);
4294 }
4295
4296 ac_build_endif(&ctx->ac, then_block->index);
4297 }
4298
4299 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4300 {
4301 nir_block *first_loop_block =
4302 (nir_block *) exec_list_get_head(&loop->body);
4303
4304 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4305
4306 visit_cf_list(ctx, &loop->body);
4307
4308 ac_build_endloop(&ctx->ac, first_loop_block->index);
4309 }
4310
4311 static void visit_cf_list(struct ac_nir_context *ctx,
4312 struct exec_list *list)
4313 {
4314 foreach_list_typed(nir_cf_node, node, node, list)
4315 {
4316 switch (node->type) {
4317 case nir_cf_node_block:
4318 visit_block(ctx, nir_cf_node_as_block(node));
4319 break;
4320
4321 case nir_cf_node_if:
4322 visit_if(ctx, nir_cf_node_as_if(node));
4323 break;
4324
4325 case nir_cf_node_loop:
4326 visit_loop(ctx, nir_cf_node_as_loop(node));
4327 break;
4328
4329 default:
4330 assert(0);
4331 }
4332 }
4333 }
4334
4335 void
4336 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4337 struct ac_shader_abi *abi,
4338 struct nir_shader *nir,
4339 struct nir_variable *variable,
4340 gl_shader_stage stage)
4341 {
4342 unsigned output_loc = variable->data.driver_location / 4;
4343 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4344
4345 /* tess ctrl has it's own load/store paths for outputs */
4346 if (stage == MESA_SHADER_TESS_CTRL)
4347 return;
4348
4349 if (stage == MESA_SHADER_VERTEX ||
4350 stage == MESA_SHADER_TESS_EVAL ||
4351 stage == MESA_SHADER_GEOMETRY) {
4352 int idx = variable->data.location + variable->data.index;
4353 if (idx == VARYING_SLOT_CLIP_DIST0) {
4354 int length = nir->info.clip_distance_array_size +
4355 nir->info.cull_distance_array_size;
4356
4357 if (length > 4)
4358 attrib_count = 2;
4359 else
4360 attrib_count = 1;
4361 }
4362 }
4363
4364 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4365 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4366 for (unsigned i = 0; i < attrib_count; ++i) {
4367 for (unsigned chan = 0; chan < 4; chan++) {
4368 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4369 ac_build_alloca_undef(ctx, type, "");
4370 }
4371 }
4372 }
4373
4374 static void
4375 setup_locals(struct ac_nir_context *ctx,
4376 struct nir_function *func)
4377 {
4378 int i, j;
4379 ctx->num_locals = 0;
4380 nir_foreach_variable(variable, &func->impl->locals) {
4381 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4382 variable->data.driver_location = ctx->num_locals * 4;
4383 variable->data.location_frac = 0;
4384 ctx->num_locals += attrib_count;
4385 }
4386 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4387 if (!ctx->locals)
4388 return;
4389
4390 for (i = 0; i < ctx->num_locals; i++) {
4391 for (j = 0; j < 4; j++) {
4392 ctx->locals[i * 4 + j] =
4393 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4394 }
4395 }
4396 }
4397
4398 static void
4399 setup_shared(struct ac_nir_context *ctx,
4400 struct nir_shader *nir)
4401 {
4402 nir_foreach_variable(variable, &nir->shared) {
4403 LLVMValueRef shared =
4404 LLVMAddGlobalInAddressSpace(
4405 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4406 variable->name ? variable->name : "",
4407 AC_ADDR_SPACE_LDS);
4408 _mesa_hash_table_insert(ctx->vars, variable, shared);
4409 }
4410 }
4411
4412 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4413 struct nir_shader *nir)
4414 {
4415 struct ac_nir_context ctx = {};
4416 struct nir_function *func;
4417
4418 ctx.ac = *ac;
4419 ctx.abi = abi;
4420
4421 ctx.stage = nir->info.stage;
4422
4423 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4424
4425 nir_foreach_variable(variable, &nir->outputs)
4426 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4427 ctx.stage);
4428
4429 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4430 _mesa_key_pointer_equal);
4431 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4432 _mesa_key_pointer_equal);
4433 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4434 _mesa_key_pointer_equal);
4435
4436 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4437
4438 nir_index_ssa_defs(func->impl);
4439 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4440
4441 setup_locals(&ctx, func);
4442
4443 if (gl_shader_stage_is_compute(nir->info.stage))
4444 setup_shared(&ctx, nir);
4445
4446 visit_cf_list(&ctx, &func->impl->body);
4447 phi_post_pass(&ctx);
4448
4449 if (!gl_shader_stage_is_compute(nir->info.stage))
4450 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4451 ctx.abi->outputs);
4452
4453 free(ctx.locals);
4454 free(ctx.ssa_defs);
4455 ralloc_free(ctx.defs);
4456 ralloc_free(ctx.phis);
4457 ralloc_free(ctx.vars);
4458 }
4459
4460 void
4461 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4462 {
4463 /* While it would be nice not to have this flag, we are constrained
4464 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4465 * on GFX9.
4466 */
4467 bool llvm_has_working_vgpr_indexing = chip_class <= VI;
4468
4469 /* TODO: Indirect indexing of GS inputs is unimplemented.
4470 *
4471 * TCS and TES load inputs directly from LDS or offchip memory, so
4472 * indirect indexing is trivial.
4473 */
4474 nir_variable_mode indirect_mask = 0;
4475 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4476 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4477 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4478 !llvm_has_working_vgpr_indexing)) {
4479 indirect_mask |= nir_var_shader_in;
4480 }
4481 if (!llvm_has_working_vgpr_indexing &&
4482 nir->info.stage != MESA_SHADER_TESS_CTRL)
4483 indirect_mask |= nir_var_shader_out;
4484
4485 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4486 * smart enough to handle indirects without causing excess spilling
4487 * causing the gpu to hang.
4488 *
4489 * See the following thread for more details of the problem:
4490 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4491 */
4492 indirect_mask |= nir_var_function_temp;
4493
4494 nir_lower_indirect_derefs(nir, indirect_mask);
4495 }
4496
4497 static unsigned
4498 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4499 {
4500 if (intrin->intrinsic != nir_intrinsic_store_deref)
4501 return 0;
4502
4503 nir_variable *var =
4504 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4505
4506 if (var->data.mode != nir_var_shader_out)
4507 return 0;
4508
4509 unsigned writemask = 0;
4510 const int location = var->data.location;
4511 unsigned first_component = var->data.location_frac;
4512 unsigned num_comps = intrin->dest.ssa.num_components;
4513
4514 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4515 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4516 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4517 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4518
4519 return writemask;
4520 }
4521
4522 static void
4523 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4524 unsigned *cond_block_tf_writemask,
4525 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4526 {
4527 switch (cf_node->type) {
4528 case nir_cf_node_block: {
4529 nir_block *block = nir_cf_node_as_block(cf_node);
4530 nir_foreach_instr(instr, block) {
4531 if (instr->type != nir_instr_type_intrinsic)
4532 continue;
4533
4534 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4535 if (intrin->intrinsic == nir_intrinsic_barrier) {
4536
4537 /* If we find a barrier in nested control flow put this in the
4538 * too hard basket. In GLSL this is not possible but it is in
4539 * SPIR-V.
4540 */
4541 if (is_nested_cf) {
4542 *tessfactors_are_def_in_all_invocs = false;
4543 return;
4544 }
4545
4546 /* The following case must be prevented:
4547 * gl_TessLevelInner = ...;
4548 * barrier();
4549 * if (gl_InvocationID == 1)
4550 * gl_TessLevelInner = ...;
4551 *
4552 * If you consider disjoint code segments separated by barriers, each
4553 * such segment that writes tess factor channels should write the same
4554 * channels in all codepaths within that segment.
4555 */
4556 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4557 /* Accumulate the result: */
4558 *tessfactors_are_def_in_all_invocs &=
4559 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4560
4561 /* Analyze the next code segment from scratch. */
4562 *upper_block_tf_writemask = 0;
4563 *cond_block_tf_writemask = 0;
4564 }
4565 } else
4566 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4567 }
4568
4569 break;
4570 }
4571 case nir_cf_node_if: {
4572 unsigned then_tessfactor_writemask = 0;
4573 unsigned else_tessfactor_writemask = 0;
4574
4575 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4576 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4577 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4578 cond_block_tf_writemask,
4579 tessfactors_are_def_in_all_invocs, true);
4580 }
4581
4582 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4583 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4584 cond_block_tf_writemask,
4585 tessfactors_are_def_in_all_invocs, true);
4586 }
4587
4588 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4589 /* If both statements write the same tess factor channels,
4590 * we can say that the upper block writes them too.
4591 */
4592 *upper_block_tf_writemask |= then_tessfactor_writemask &
4593 else_tessfactor_writemask;
4594 *cond_block_tf_writemask |= then_tessfactor_writemask |
4595 else_tessfactor_writemask;
4596 }
4597
4598 break;
4599 }
4600 case nir_cf_node_loop: {
4601 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4602 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4603 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4604 cond_block_tf_writemask,
4605 tessfactors_are_def_in_all_invocs, true);
4606 }
4607
4608 break;
4609 }
4610 default:
4611 unreachable("unknown cf node type");
4612 }
4613 }
4614
4615 bool
4616 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4617 {
4618 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4619
4620 /* The pass works as follows:
4621 * If all codepaths write tess factors, we can say that all
4622 * invocations define tess factors.
4623 *
4624 * Each tess factor channel is tracked separately.
4625 */
4626 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4627 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4628
4629 /* Initial value = true. Here the pass will accumulate results from
4630 * multiple segments surrounded by barriers. If tess factors aren't
4631 * written at all, it's a shader bug and we don't care if this will be
4632 * true.
4633 */
4634 bool tessfactors_are_def_in_all_invocs = true;
4635
4636 nir_foreach_function(function, nir) {
4637 if (function->impl) {
4638 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4639 scan_tess_ctrl(node, &main_block_tf_writemask,
4640 &cond_block_tf_writemask,
4641 &tessfactors_are_def_in_all_invocs,
4642 false);
4643 }
4644 }
4645 }
4646
4647 /* Accumulate the result for the last code segment separated by a
4648 * barrier.
4649 */
4650 if (main_block_tf_writemask || cond_block_tf_writemask) {
4651 tessfactors_are_def_in_all_invocs &=
4652 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4653 }
4654
4655 return tessfactors_are_def_in_all_invocs;
4656 }