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ac: use 1D GEPs for descriptors and constants
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41
42 LLVMValueRef *ssa_defs;
43
44 struct hash_table *defs;
45 struct hash_table *phis;
46 struct hash_table *vars;
47
48 LLVMValueRef main_function;
49 LLVMBasicBlockRef continue_block;
50 LLVMBasicBlockRef break_block;
51
52 int num_locals;
53 LLVMValueRef *locals;
54 };
55
56 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
57 nir_deref_instr *deref_instr,
58 enum ac_descriptor_type desc_type,
59 const nir_instr *instr,
60 bool image, bool write);
61
62 static void
63 build_store_values_extended(struct ac_llvm_context *ac,
64 LLVMValueRef *values,
65 unsigned value_count,
66 unsigned value_stride,
67 LLVMValueRef vec)
68 {
69 LLVMBuilderRef builder = ac->builder;
70 unsigned i;
71
72 for (i = 0; i < value_count; i++) {
73 LLVMValueRef ptr = values[i * value_stride];
74 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
75 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
76 LLVMBuildStore(builder, value, ptr);
77 }
78 }
79
80 static enum ac_image_dim
81 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
82 bool is_array)
83 {
84 switch (dim) {
85 case GLSL_SAMPLER_DIM_1D:
86 if (ctx->chip_class >= GFX9)
87 return is_array ? ac_image_2darray : ac_image_2d;
88 return is_array ? ac_image_1darray : ac_image_1d;
89 case GLSL_SAMPLER_DIM_2D:
90 case GLSL_SAMPLER_DIM_RECT:
91 case GLSL_SAMPLER_DIM_EXTERNAL:
92 return is_array ? ac_image_2darray : ac_image_2d;
93 case GLSL_SAMPLER_DIM_3D:
94 return ac_image_3d;
95 case GLSL_SAMPLER_DIM_CUBE:
96 return ac_image_cube;
97 case GLSL_SAMPLER_DIM_MS:
98 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
99 case GLSL_SAMPLER_DIM_SUBPASS:
100 return ac_image_2darray;
101 case GLSL_SAMPLER_DIM_SUBPASS_MS:
102 return ac_image_2darraymsaa;
103 default:
104 unreachable("bad sampler dim");
105 }
106 }
107
108 static enum ac_image_dim
109 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
110 bool is_array)
111 {
112 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
113
114 if (dim == ac_image_cube ||
115 (ctx->chip_class <= VI && dim == ac_image_3d))
116 dim = ac_image_2darray;
117
118 return dim;
119 }
120
121 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
122 const nir_ssa_def *def)
123 {
124 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
125 if (def->num_components > 1) {
126 type = LLVMVectorType(type, def->num_components);
127 }
128 return type;
129 }
130
131 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
132 {
133 assert(src.is_ssa);
134 return nir->ssa_defs[src.ssa->index];
135 }
136
137 static LLVMValueRef
138 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
139 {
140 LLVMValueRef ptr = get_src(ctx, src);
141 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
142 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
143
144 return LLVMBuildBitCast(ctx->ac.builder, ptr,
145 LLVMPointerType(ctx->ac.i32, addr_space), "");
146 }
147
148 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
149 const struct nir_block *b)
150 {
151 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
152 return (LLVMBasicBlockRef)entry->data;
153 }
154
155 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
156 nir_alu_src src,
157 unsigned num_components)
158 {
159 LLVMValueRef value = get_src(ctx, src.src);
160 bool need_swizzle = false;
161
162 assert(value);
163 unsigned src_components = ac_get_llvm_num_components(value);
164 for (unsigned i = 0; i < num_components; ++i) {
165 assert(src.swizzle[i] < src_components);
166 if (src.swizzle[i] != i)
167 need_swizzle = true;
168 }
169
170 if (need_swizzle || num_components != src_components) {
171 LLVMValueRef masks[] = {
172 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
173 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
176
177 if (src_components > 1 && num_components == 1) {
178 value = LLVMBuildExtractElement(ctx->ac.builder, value,
179 masks[0], "");
180 } else if (src_components == 1 && num_components > 1) {
181 LLVMValueRef values[] = {value, value, value, value};
182 value = ac_build_gather_values(&ctx->ac, values, num_components);
183 } else {
184 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
185 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
186 swizzle, "");
187 }
188 }
189 assert(!src.negate);
190 assert(!src.abs);
191 return value;
192 }
193
194 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
195 LLVMIntPredicate pred, LLVMValueRef src0,
196 LLVMValueRef src1)
197 {
198 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
199 return LLVMBuildSelect(ctx->builder, result,
200 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
201 ctx->i32_0, "");
202 }
203
204 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
205 LLVMRealPredicate pred, LLVMValueRef src0,
206 LLVMValueRef src1)
207 {
208 LLVMValueRef result;
209 src0 = ac_to_float(ctx, src0);
210 src1 = ac_to_float(ctx, src1);
211 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
212 return LLVMBuildSelect(ctx->builder, result,
213 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
214 ctx->i32_0, "");
215 }
216
217 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
218 const char *intrin,
219 LLVMTypeRef result_type,
220 LLVMValueRef src0)
221 {
222 char name[64];
223 LLVMValueRef params[] = {
224 ac_to_float(ctx, src0),
225 };
226
227 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
228 ac_get_elem_bits(ctx, result_type));
229 assert(length < sizeof(name));
230 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
231 }
232
233 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
234 const char *intrin,
235 LLVMTypeRef result_type,
236 LLVMValueRef src0, LLVMValueRef src1)
237 {
238 char name[64];
239 LLVMValueRef params[] = {
240 ac_to_float(ctx, src0),
241 ac_to_float(ctx, src1),
242 };
243
244 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
245 ac_get_elem_bits(ctx, result_type));
246 assert(length < sizeof(name));
247 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
248 }
249
250 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
251 const char *intrin,
252 LLVMTypeRef result_type,
253 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
254 {
255 char name[64];
256 LLVMValueRef params[] = {
257 ac_to_float(ctx, src0),
258 ac_to_float(ctx, src1),
259 ac_to_float(ctx, src2),
260 };
261
262 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
263 ac_get_elem_bits(ctx, result_type));
264 assert(length < sizeof(name));
265 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
266 }
267
268 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
269 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
270 {
271 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
272
273 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
274 ctx->i32_0, "");
275 return LLVMBuildSelect(ctx->builder, v,
276 ac_to_integer_or_pointer(ctx, src1),
277 ac_to_integer_or_pointer(ctx, src2), "");
278 }
279
280 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
281 LLVMValueRef src0)
282 {
283 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
284 }
285
286 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
287 const char *intrin,
288 LLVMValueRef src0, LLVMValueRef src1)
289 {
290 LLVMTypeRef ret_type;
291 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
292 LLVMValueRef res;
293 LLVMValueRef params[] = { src0, src1 };
294 ret_type = LLVMStructTypeInContext(ctx->context, types,
295 2, true);
296
297 res = ac_build_intrinsic(ctx, intrin, ret_type,
298 params, 2, AC_FUNC_ATTR_READNONE);
299
300 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
301 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
302 return res;
303 }
304
305 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
306 LLVMValueRef src0,
307 unsigned bitsize)
308 {
309 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
310 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
311 "");
312 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
313
314 switch (bitsize) {
315 case 16:
316 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
317 case 32:
318 return result;
319 case 64:
320 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
321 default:
322 unreachable("Unsupported bit size.");
323 }
324 }
325
326 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
327 LLVMValueRef src0)
328 {
329 src0 = ac_to_float(ctx, src0);
330 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
331 return LLVMBuildSExt(ctx->builder,
332 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
333 ctx->i32, "");
334 }
335
336 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
337 LLVMValueRef src0,
338 unsigned bitsize)
339 {
340 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
341
342 switch (bitsize) {
343 case 8:
344 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
345 case 16:
346 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
347 case 32:
348 return result;
349 case 64:
350 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
351 default:
352 unreachable("Unsupported bit size.");
353 }
354 }
355
356 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
357 LLVMValueRef src0)
358 {
359 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
360 return LLVMBuildSExt(ctx->builder,
361 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
362 ctx->i32, "");
363 }
364
365 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
366 LLVMValueRef src0)
367 {
368 LLVMValueRef result;
369 LLVMValueRef cond = NULL;
370
371 src0 = ac_to_float(ctx, src0);
372 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
373
374 if (ctx->chip_class >= VI) {
375 LLVMValueRef args[2];
376 /* Check if the result is a denormal - and flush to 0 if so. */
377 args[0] = result;
378 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
379 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
380 }
381
382 /* need to convert back up to f32 */
383 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
384
385 if (ctx->chip_class >= VI)
386 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
387 else {
388 /* for SI/CIK */
389 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
390 * so compare the result and flush to 0 if it's smaller.
391 */
392 LLVMValueRef temp, cond2;
393 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
394 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
395 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
396 temp, "");
397 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
398 temp, ctx->f32_0, "");
399 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
400 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
401 }
402 return result;
403 }
404
405 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
406 LLVMValueRef src0, LLVMValueRef src1)
407 {
408 LLVMValueRef dst64, result;
409 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
410 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
411
412 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
413 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
414 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
415 return result;
416 }
417
418 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
419 LLVMValueRef src0, LLVMValueRef src1)
420 {
421 LLVMValueRef dst64, result;
422 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
423 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
424
425 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
426 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
427 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
428 return result;
429 }
430
431 static LLVMValueRef emit_bitfield_extract(struct ac_llvm_context *ctx,
432 bool is_signed,
433 const LLVMValueRef srcs[3])
434 {
435 LLVMValueRef result;
436
437 if (HAVE_LLVM >= 0x0800) {
438 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
439 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
440 result = LLVMBuildSelect(ctx->builder, icond, srcs[0], result, "");
441 } else {
442 /* FIXME: LLVM 7+ returns incorrect result when count is 0.
443 * https://bugs.freedesktop.org/show_bug.cgi?id=107276
444 */
445 LLVMValueRef zero = ctx->i32_0;
446 LLVMValueRef icond1 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], LLVMConstInt(ctx->i32, 32, false), "");
447 LLVMValueRef icond2 = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], zero, "");
448
449 result = ac_build_bfe(ctx, srcs[0], srcs[1], srcs[2], is_signed);
450 result = LLVMBuildSelect(ctx->builder, icond1, srcs[0], result, "");
451 result = LLVMBuildSelect(ctx->builder, icond2, zero, result, "");
452 }
453
454 return result;
455 }
456
457 static LLVMValueRef emit_bitfield_insert(struct ac_llvm_context *ctx,
458 LLVMValueRef src0, LLVMValueRef src1,
459 LLVMValueRef src2, LLVMValueRef src3)
460 {
461 LLVMValueRef bfi_args[3], result;
462
463 bfi_args[0] = LLVMBuildShl(ctx->builder,
464 LLVMBuildSub(ctx->builder,
465 LLVMBuildShl(ctx->builder,
466 ctx->i32_1,
467 src3, ""),
468 ctx->i32_1, ""),
469 src2, "");
470 bfi_args[1] = LLVMBuildShl(ctx->builder, src1, src2, "");
471 bfi_args[2] = src0;
472
473 LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, src3, LLVMConstInt(ctx->i32, 32, false), "");
474
475 /* Calculate:
476 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
477 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
478 */
479 result = LLVMBuildXor(ctx->builder, bfi_args[2],
480 LLVMBuildAnd(ctx->builder, bfi_args[0],
481 LLVMBuildXor(ctx->builder, bfi_args[1], bfi_args[2], ""), ""), "");
482
483 result = LLVMBuildSelect(ctx->builder, icond, src1, result, "");
484 return result;
485 }
486
487 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
488 LLVMValueRef src0)
489 {
490 LLVMValueRef comp[2];
491
492 src0 = ac_to_float(ctx, src0);
493 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
494 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
495
496 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
497 ctx->i32, "");
498 }
499
500 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
501 LLVMValueRef src0)
502 {
503 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
504 LLVMValueRef temps[2], val;
505 int i;
506
507 for (i = 0; i < 2; i++) {
508 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
509 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
510 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
511 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
512 }
513 return ac_build_gather_values(ctx, temps, 2);
514 }
515
516 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
517 nir_op op,
518 LLVMValueRef src0)
519 {
520 unsigned mask;
521 int idx;
522 LLVMValueRef result;
523
524 if (op == nir_op_fddx_fine)
525 mask = AC_TID_MASK_LEFT;
526 else if (op == nir_op_fddy_fine)
527 mask = AC_TID_MASK_TOP;
528 else
529 mask = AC_TID_MASK_TOP_LEFT;
530
531 /* for DDX we want to next X pixel, DDY next Y pixel. */
532 if (op == nir_op_fddx_fine ||
533 op == nir_op_fddx_coarse ||
534 op == nir_op_fddx)
535 idx = 1;
536 else
537 idx = 2;
538
539 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
540 return result;
541 }
542
543 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
544 {
545 LLVMValueRef src[4], result = NULL;
546 unsigned num_components = instr->dest.dest.ssa.num_components;
547 unsigned src_components;
548 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
549
550 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
551 switch (instr->op) {
552 case nir_op_vec2:
553 case nir_op_vec3:
554 case nir_op_vec4:
555 src_components = 1;
556 break;
557 case nir_op_pack_half_2x16:
558 src_components = 2;
559 break;
560 case nir_op_unpack_half_2x16:
561 src_components = 1;
562 break;
563 case nir_op_cube_face_coord:
564 case nir_op_cube_face_index:
565 src_components = 3;
566 break;
567 default:
568 src_components = num_components;
569 break;
570 }
571 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
572 src[i] = get_alu_src(ctx, instr->src[i], src_components);
573
574 switch (instr->op) {
575 case nir_op_fmov:
576 case nir_op_imov:
577 result = src[0];
578 break;
579 case nir_op_fneg:
580 src[0] = ac_to_float(&ctx->ac, src[0]);
581 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
582 break;
583 case nir_op_ineg:
584 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
585 break;
586 case nir_op_inot:
587 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
588 break;
589 case nir_op_iadd:
590 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_fadd:
593 src[0] = ac_to_float(&ctx->ac, src[0]);
594 src[1] = ac_to_float(&ctx->ac, src[1]);
595 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
596 break;
597 case nir_op_fsub:
598 src[0] = ac_to_float(&ctx->ac, src[0]);
599 src[1] = ac_to_float(&ctx->ac, src[1]);
600 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
601 break;
602 case nir_op_isub:
603 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
604 break;
605 case nir_op_imul:
606 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
607 break;
608 case nir_op_imod:
609 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
610 break;
611 case nir_op_umod:
612 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
613 break;
614 case nir_op_fmod:
615 src[0] = ac_to_float(&ctx->ac, src[0]);
616 src[1] = ac_to_float(&ctx->ac, src[1]);
617 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
618 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
619 ac_to_float_type(&ctx->ac, def_type), result);
620 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
621 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
622 break;
623 case nir_op_frem:
624 src[0] = ac_to_float(&ctx->ac, src[0]);
625 src[1] = ac_to_float(&ctx->ac, src[1]);
626 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
627 break;
628 case nir_op_irem:
629 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
630 break;
631 case nir_op_idiv:
632 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_udiv:
635 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_fmul:
638 src[0] = ac_to_float(&ctx->ac, src[0]);
639 src[1] = ac_to_float(&ctx->ac, src[1]);
640 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
641 break;
642 case nir_op_frcp:
643 src[0] = ac_to_float(&ctx->ac, src[0]);
644 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
645 break;
646 case nir_op_iand:
647 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
648 break;
649 case nir_op_ior:
650 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ixor:
653 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
654 break;
655 case nir_op_ishl:
656 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
657 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
658 LLVMTypeOf(src[0]), "");
659 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
660 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
661 LLVMTypeOf(src[0]), "");
662 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_ishr:
665 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
666 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
667 LLVMTypeOf(src[0]), "");
668 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
669 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
670 LLVMTypeOf(src[0]), "");
671 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
672 break;
673 case nir_op_ushr:
674 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
675 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
676 LLVMTypeOf(src[0]), "");
677 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
678 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
679 LLVMTypeOf(src[0]), "");
680 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_ilt32:
683 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
684 break;
685 case nir_op_ine32:
686 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
687 break;
688 case nir_op_ieq32:
689 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
690 break;
691 case nir_op_ige32:
692 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
693 break;
694 case nir_op_ult32:
695 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
696 break;
697 case nir_op_uge32:
698 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
699 break;
700 case nir_op_feq32:
701 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
702 break;
703 case nir_op_fne32:
704 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
705 break;
706 case nir_op_flt32:
707 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
708 break;
709 case nir_op_fge32:
710 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
711 break;
712 case nir_op_fabs:
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 break;
716 case nir_op_iabs:
717 result = emit_iabs(&ctx->ac, src[0]);
718 break;
719 case nir_op_imax:
720 result = ac_build_imax(&ctx->ac, src[0], src[1]);
721 break;
722 case nir_op_imin:
723 result = ac_build_imin(&ctx->ac, src[0], src[1]);
724 break;
725 case nir_op_umax:
726 result = ac_build_umax(&ctx->ac, src[0], src[1]);
727 break;
728 case nir_op_umin:
729 result = ac_build_umin(&ctx->ac, src[0], src[1]);
730 break;
731 case nir_op_isign:
732 result = ac_build_isign(&ctx->ac, src[0],
733 instr->dest.dest.ssa.bit_size);
734 break;
735 case nir_op_fsign:
736 src[0] = ac_to_float(&ctx->ac, src[0]);
737 result = ac_build_fsign(&ctx->ac, src[0],
738 instr->dest.dest.ssa.bit_size);
739 break;
740 case nir_op_ffloor:
741 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
742 ac_to_float_type(&ctx->ac, def_type), src[0]);
743 break;
744 case nir_op_ftrunc:
745 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
746 ac_to_float_type(&ctx->ac, def_type), src[0]);
747 break;
748 case nir_op_fceil:
749 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
750 ac_to_float_type(&ctx->ac, def_type), src[0]);
751 break;
752 case nir_op_fround_even:
753 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
754 ac_to_float_type(&ctx->ac, def_type),src[0]);
755 break;
756 case nir_op_ffract:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_fract(&ctx->ac, src[0],
759 instr->dest.dest.ssa.bit_size);
760 break;
761 case nir_op_fsin:
762 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
763 ac_to_float_type(&ctx->ac, def_type), src[0]);
764 break;
765 case nir_op_fcos:
766 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
767 ac_to_float_type(&ctx->ac, def_type), src[0]);
768 break;
769 case nir_op_fsqrt:
770 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
771 ac_to_float_type(&ctx->ac, def_type), src[0]);
772 break;
773 case nir_op_fexp2:
774 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
775 ac_to_float_type(&ctx->ac, def_type), src[0]);
776 break;
777 case nir_op_flog2:
778 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
779 ac_to_float_type(&ctx->ac, def_type), src[0]);
780 break;
781 case nir_op_frsq:
782 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
783 ac_to_float_type(&ctx->ac, def_type), src[0]);
784 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
785 break;
786 case nir_op_frexp_exp:
787 src[0] = ac_to_float(&ctx->ac, src[0]);
788 result = ac_build_frexp_exp(&ctx->ac, src[0],
789 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
790 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
791 result = LLVMBuildSExt(ctx->ac.builder, result,
792 ctx->ac.i32, "");
793 break;
794 case nir_op_frexp_sig:
795 src[0] = ac_to_float(&ctx->ac, src[0]);
796 result = ac_build_frexp_mant(&ctx->ac, src[0],
797 instr->dest.dest.ssa.bit_size);
798 break;
799 case nir_op_fpow:
800 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
801 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
802 break;
803 case nir_op_fmax:
804 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
805 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
806 if (ctx->ac.chip_class < GFX9 &&
807 instr->dest.dest.ssa.bit_size == 32) {
808 /* Only pre-GFX9 chips do not flush denorms. */
809 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
810 ac_to_float_type(&ctx->ac, def_type),
811 result);
812 }
813 break;
814 case nir_op_fmin:
815 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
816 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
817 if (ctx->ac.chip_class < GFX9 &&
818 instr->dest.dest.ssa.bit_size == 32) {
819 /* Only pre-GFX9 chips do not flush denorms. */
820 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
821 ac_to_float_type(&ctx->ac, def_type),
822 result);
823 }
824 break;
825 case nir_op_ffma:
826 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
827 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
828 break;
829 case nir_op_ldexp:
830 src[0] = ac_to_float(&ctx->ac, src[0]);
831 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
832 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
833 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
834 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
835 else
836 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
837 break;
838 case nir_op_ibitfield_extract:
839 result = emit_bitfield_extract(&ctx->ac, true, src);
840 break;
841 case nir_op_ubitfield_extract:
842 result = emit_bitfield_extract(&ctx->ac, false, src);
843 break;
844 case nir_op_bitfield_insert:
845 result = emit_bitfield_insert(&ctx->ac, src[0], src[1], src[2], src[3]);
846 break;
847 case nir_op_bitfield_reverse:
848 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
849 break;
850 case nir_op_bit_count:
851 result = ac_build_bit_count(&ctx->ac, src[0]);
852 break;
853 case nir_op_vec2:
854 case nir_op_vec3:
855 case nir_op_vec4:
856 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
857 src[i] = ac_to_integer(&ctx->ac, src[i]);
858 result = ac_build_gather_values(&ctx->ac, src, num_components);
859 break;
860 case nir_op_f2i8:
861 case nir_op_f2i16:
862 case nir_op_f2i32:
863 case nir_op_f2i64:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
866 break;
867 case nir_op_f2u8:
868 case nir_op_f2u16:
869 case nir_op_f2u32:
870 case nir_op_f2u64:
871 src[0] = ac_to_float(&ctx->ac, src[0]);
872 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
873 break;
874 case nir_op_i2f16:
875 case nir_op_i2f32:
876 case nir_op_i2f64:
877 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
878 break;
879 case nir_op_u2f16:
880 case nir_op_u2f32:
881 case nir_op_u2f64:
882 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
883 break;
884 case nir_op_f2f16_rtz:
885 src[0] = ac_to_float(&ctx->ac, src[0]);
886 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
887 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
888 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
889 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
890 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
891 break;
892 case nir_op_f2f16_rtne:
893 case nir_op_f2f16:
894 case nir_op_f2f32:
895 case nir_op_f2f64:
896 src[0] = ac_to_float(&ctx->ac, src[0]);
897 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
898 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
899 else
900 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
901 break;
902 case nir_op_u2u8:
903 case nir_op_u2u16:
904 case nir_op_u2u32:
905 case nir_op_u2u64:
906 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
907 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
908 else
909 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
910 break;
911 case nir_op_i2i8:
912 case nir_op_i2i16:
913 case nir_op_i2i32:
914 case nir_op_i2i64:
915 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
916 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
917 else
918 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
919 break;
920 case nir_op_b32csel:
921 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
922 break;
923 case nir_op_find_lsb:
924 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
925 break;
926 case nir_op_ufind_msb:
927 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
928 break;
929 case nir_op_ifind_msb:
930 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
931 break;
932 case nir_op_uadd_carry:
933 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
934 break;
935 case nir_op_usub_borrow:
936 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
937 break;
938 case nir_op_b2f16:
939 case nir_op_b2f32:
940 case nir_op_b2f64:
941 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
942 break;
943 case nir_op_f2b32:
944 result = emit_f2b(&ctx->ac, src[0]);
945 break;
946 case nir_op_b2i8:
947 case nir_op_b2i16:
948 case nir_op_b2i32:
949 case nir_op_b2i64:
950 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
951 break;
952 case nir_op_i2b32:
953 result = emit_i2b(&ctx->ac, src[0]);
954 break;
955 case nir_op_fquantize2f16:
956 result = emit_f2f16(&ctx->ac, src[0]);
957 break;
958 case nir_op_umul_high:
959 result = emit_umul_high(&ctx->ac, src[0], src[1]);
960 break;
961 case nir_op_imul_high:
962 result = emit_imul_high(&ctx->ac, src[0], src[1]);
963 break;
964 case nir_op_pack_half_2x16:
965 result = emit_pack_half_2x16(&ctx->ac, src[0]);
966 break;
967 case nir_op_unpack_half_2x16:
968 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
969 break;
970 case nir_op_fddx:
971 case nir_op_fddy:
972 case nir_op_fddx_fine:
973 case nir_op_fddy_fine:
974 case nir_op_fddx_coarse:
975 case nir_op_fddy_coarse:
976 result = emit_ddxy(ctx, instr->op, src[0]);
977 break;
978
979 case nir_op_unpack_64_2x32_split_x: {
980 assert(ac_get_llvm_num_components(src[0]) == 1);
981 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
982 ctx->ac.v2i32,
983 "");
984 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
985 ctx->ac.i32_0, "");
986 break;
987 }
988
989 case nir_op_unpack_64_2x32_split_y: {
990 assert(ac_get_llvm_num_components(src[0]) == 1);
991 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
992 ctx->ac.v2i32,
993 "");
994 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
995 ctx->ac.i32_1, "");
996 break;
997 }
998
999 case nir_op_pack_64_2x32_split: {
1000 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1001 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1002 break;
1003 }
1004
1005 case nir_op_pack_32_2x16_split: {
1006 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1007 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1008 break;
1009 }
1010
1011 case nir_op_unpack_32_2x16_split_x: {
1012 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1013 ctx->ac.v2i16,
1014 "");
1015 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1016 ctx->ac.i32_0, "");
1017 break;
1018 }
1019
1020 case nir_op_unpack_32_2x16_split_y: {
1021 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1022 ctx->ac.v2i16,
1023 "");
1024 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1025 ctx->ac.i32_1, "");
1026 break;
1027 }
1028
1029 case nir_op_cube_face_coord: {
1030 src[0] = ac_to_float(&ctx->ac, src[0]);
1031 LLVMValueRef results[2];
1032 LLVMValueRef in[3];
1033 for (unsigned chan = 0; chan < 3; chan++)
1034 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1035 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1036 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1037 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1038 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1039 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1040 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1041 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1042 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1043 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1044 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1045 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1046 result = ac_build_gather_values(&ctx->ac, results, 2);
1047 break;
1048 }
1049
1050 case nir_op_cube_face_index: {
1051 src[0] = ac_to_float(&ctx->ac, src[0]);
1052 LLVMValueRef in[3];
1053 for (unsigned chan = 0; chan < 3; chan++)
1054 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1055 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1056 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1057 break;
1058 }
1059
1060 case nir_op_fmin3:
1061 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1062 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1063 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1064 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1065 break;
1066 case nir_op_umin3:
1067 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1068 result = ac_build_umin(&ctx->ac, result, src[2]);
1069 break;
1070 case nir_op_imin3:
1071 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1072 result = ac_build_imin(&ctx->ac, result, src[2]);
1073 break;
1074 case nir_op_fmax3:
1075 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1076 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1077 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1078 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1079 break;
1080 case nir_op_umax3:
1081 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1082 result = ac_build_umax(&ctx->ac, result, src[2]);
1083 break;
1084 case nir_op_imax3:
1085 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1086 result = ac_build_imax(&ctx->ac, result, src[2]);
1087 break;
1088 case nir_op_fmed3: {
1089 src[0] = ac_to_float(&ctx->ac, src[0]);
1090 src[1] = ac_to_float(&ctx->ac, src[1]);
1091 src[2] = ac_to_float(&ctx->ac, src[2]);
1092 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1093 instr->dest.dest.ssa.bit_size);
1094 break;
1095 }
1096 case nir_op_imed3: {
1097 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1098 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1099 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1100 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1101 break;
1102 }
1103 case nir_op_umed3: {
1104 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1105 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1106 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1107 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1108 break;
1109 }
1110
1111 default:
1112 fprintf(stderr, "Unknown NIR alu instr: ");
1113 nir_print_instr(&instr->instr, stderr);
1114 fprintf(stderr, "\n");
1115 abort();
1116 }
1117
1118 if (result) {
1119 assert(instr->dest.dest.is_ssa);
1120 result = ac_to_integer_or_pointer(&ctx->ac, result);
1121 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1122 }
1123 }
1124
1125 static void visit_load_const(struct ac_nir_context *ctx,
1126 const nir_load_const_instr *instr)
1127 {
1128 LLVMValueRef values[4], value = NULL;
1129 LLVMTypeRef element_type =
1130 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1131
1132 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1133 switch (instr->def.bit_size) {
1134 case 8:
1135 values[i] = LLVMConstInt(element_type,
1136 instr->value[i].u8, false);
1137 break;
1138 case 16:
1139 values[i] = LLVMConstInt(element_type,
1140 instr->value[i].u16, false);
1141 break;
1142 case 32:
1143 values[i] = LLVMConstInt(element_type,
1144 instr->value[i].u32, false);
1145 break;
1146 case 64:
1147 values[i] = LLVMConstInt(element_type,
1148 instr->value[i].u64, false);
1149 break;
1150 default:
1151 fprintf(stderr,
1152 "unsupported nir load_const bit_size: %d\n",
1153 instr->def.bit_size);
1154 abort();
1155 }
1156 }
1157 if (instr->def.num_components > 1) {
1158 value = LLVMConstVector(values, instr->def.num_components);
1159 } else
1160 value = values[0];
1161
1162 ctx->ssa_defs[instr->def.index] = value;
1163 }
1164
1165 static LLVMValueRef
1166 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1167 {
1168 LLVMValueRef size =
1169 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1170 LLVMConstInt(ctx->ac.i32, 2, false), "");
1171
1172 /* VI only */
1173 if (ctx->ac.chip_class == VI && in_elements) {
1174 /* On VI, the descriptor contains the size in bytes,
1175 * but TXQ must return the size in elements.
1176 * The stride is always non-zero for resources using TXQ.
1177 */
1178 LLVMValueRef stride =
1179 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1180 ctx->ac.i32_1, "");
1181 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1182 LLVMConstInt(ctx->ac.i32, 16, false), "");
1183 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1184 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1185
1186 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1187 }
1188 return size;
1189 }
1190
1191 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1192 nir_variable *var,
1193 struct ac_image_args *args,
1194 const nir_tex_instr *instr)
1195 {
1196 const struct glsl_type *type = glsl_without_array(var->type);
1197 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1198 LLVMValueRef half_texel[2];
1199 LLVMValueRef compare_cube_wa = NULL;
1200 LLVMValueRef result;
1201
1202 //TODO Rect
1203 {
1204 struct ac_image_args txq_args = { 0 };
1205
1206 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1207 txq_args.opcode = ac_image_get_resinfo;
1208 txq_args.dmask = 0xf;
1209 txq_args.lod = ctx->i32_0;
1210 txq_args.resource = args->resource;
1211 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1212 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1213
1214 for (unsigned c = 0; c < 2; c++) {
1215 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1216 LLVMConstInt(ctx->i32, c, false), "");
1217 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1218 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1219 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1220 LLVMConstReal(ctx->f32, -0.5), "");
1221 }
1222 }
1223
1224 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1225
1226 for (unsigned c = 0; c < 2; c++) {
1227 LLVMValueRef tmp;
1228 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1229 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1230 }
1231
1232 /*
1233 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1234 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1235 * workaround by sampling using a scaled type and converting.
1236 * This is taken from amdgpu-pro shaders.
1237 */
1238 /* NOTE this produces some ugly code compared to amdgpu-pro,
1239 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1240 * and then reads them back. -pro generates two selects,
1241 * one s_cmp for the descriptor rewriting
1242 * one v_cmp for the coordinate and result changes.
1243 */
1244 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1245 LLVMValueRef tmp, tmp2;
1246
1247 /* workaround 8/8/8/8 uint/sint cube gather bug */
1248 /* first detect it then change to a scaled read and f2i */
1249 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1250 tmp2 = tmp;
1251
1252 /* extract the DATA_FORMAT */
1253 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1254 LLVMConstInt(ctx->i32, 6, false), false);
1255
1256 /* is the DATA_FORMAT == 8_8_8_8 */
1257 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1258
1259 if (stype == GLSL_TYPE_UINT)
1260 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1261 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1262 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1263 else
1264 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1265 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1266 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1267
1268 /* replace the NUM FORMAT in the descriptor */
1269 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT_GFX6, false), "");
1270 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1271
1272 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1273
1274 /* don't modify the coordinates for this case */
1275 for (unsigned c = 0; c < 2; ++c)
1276 args->coords[c] = LLVMBuildSelect(
1277 ctx->builder, compare_cube_wa,
1278 orig_coords[c], args->coords[c], "");
1279 }
1280
1281 args->attributes = AC_FUNC_ATTR_READNONE;
1282 result = ac_build_image_opcode(ctx, args);
1283
1284 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1285 LLVMValueRef tmp, tmp2;
1286
1287 /* if the cube workaround is in place, f2i the result. */
1288 for (unsigned c = 0; c < 4; c++) {
1289 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1290 if (stype == GLSL_TYPE_UINT)
1291 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1292 else
1293 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1294 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1295 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1296 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1297 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1298 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1299 }
1300 }
1301 return result;
1302 }
1303
1304 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1305 {
1306 nir_deref_instr *texture_deref_instr = NULL;
1307
1308 for (unsigned i = 0; i < instr->num_srcs; i++) {
1309 switch (instr->src[i].src_type) {
1310 case nir_tex_src_texture_deref:
1311 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1312 break;
1313 default:
1314 break;
1315 }
1316 }
1317 return texture_deref_instr;
1318 }
1319
1320 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1321 const nir_tex_instr *instr,
1322 struct ac_image_args *args)
1323 {
1324 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1325 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1326
1327 if (ctx->abi->gfx9_stride_size_workaround) {
1328 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1329 args->resource,
1330 args->coords[0],
1331 ctx->ac.i32_0,
1332 util_last_bit(mask),
1333 false, true);
1334 } else {
1335 return ac_build_buffer_load_format(&ctx->ac,
1336 args->resource,
1337 args->coords[0],
1338 ctx->ac.i32_0,
1339 util_last_bit(mask),
1340 false, true);
1341 }
1342 }
1343
1344 args->opcode = ac_image_sample;
1345
1346 switch (instr->op) {
1347 case nir_texop_txf:
1348 case nir_texop_txf_ms:
1349 case nir_texop_samples_identical:
1350 args->opcode = args->level_zero ||
1351 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1352 ac_image_load : ac_image_load_mip;
1353 args->level_zero = false;
1354 break;
1355 case nir_texop_txs:
1356 case nir_texop_query_levels:
1357 args->opcode = ac_image_get_resinfo;
1358 if (!args->lod)
1359 args->lod = ctx->ac.i32_0;
1360 args->level_zero = false;
1361 break;
1362 case nir_texop_tex:
1363 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1364 assert(!args->lod);
1365 args->level_zero = true;
1366 }
1367 break;
1368 case nir_texop_tg4:
1369 args->opcode = ac_image_gather4;
1370 args->level_zero = true;
1371 break;
1372 case nir_texop_lod:
1373 args->opcode = ac_image_get_lod;
1374 break;
1375 default:
1376 break;
1377 }
1378
1379 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= VI) {
1380 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1381 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1382 const struct glsl_type *type = glsl_without_array(var->type);
1383 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1384 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1385 return lower_gather4_integer(&ctx->ac, var, args, instr);
1386 }
1387 }
1388
1389 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1390 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1391 if ((args->dim == ac_image_2darray ||
1392 args->dim == ac_image_2d) && !args->coords[1]) {
1393 args->coords[1] = ctx->ac.i32_0;
1394 }
1395 }
1396
1397 args->attributes = AC_FUNC_ATTR_READNONE;
1398 return ac_build_image_opcode(&ctx->ac, args);
1399 }
1400
1401 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1402 nir_intrinsic_instr *instr)
1403 {
1404 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1405 LLVMValueRef index = get_src(ctx, instr->src[1]);
1406
1407 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1408 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1409 return result;
1410 }
1411
1412 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1413 nir_intrinsic_instr *instr)
1414 {
1415 LLVMValueRef ptr, addr;
1416 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1417 unsigned index = nir_intrinsic_base(instr);
1418
1419 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1420 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1421
1422 /* Load constant values from user SGPRS when possible, otherwise
1423 * fallback to the default path that loads directly from memory.
1424 */
1425 if (LLVMIsConstant(src0) &&
1426 instr->dest.ssa.bit_size == 32) {
1427 unsigned count = instr->dest.ssa.num_components;
1428 unsigned offset = index;
1429
1430 offset += LLVMConstIntGetZExtValue(src0);
1431 offset /= 4;
1432
1433 offset -= ctx->abi->base_inline_push_consts;
1434
1435 if (offset + count <= ctx->abi->num_inline_push_consts) {
1436 return ac_build_gather_values(&ctx->ac,
1437 ctx->abi->inline_push_consts + offset,
1438 count);
1439 }
1440 }
1441
1442 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1443
1444 if (instr->dest.ssa.bit_size == 8) {
1445 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1446 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1447 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1448 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1449
1450 LLVMValueRef params[3];
1451 if (load_dwords > 1) {
1452 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1453 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1454 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1455 } else {
1456 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1457 params[0] = ctx->ac.i32_0;
1458 params[1] = res;
1459 }
1460 params[2] = addr;
1461 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1462
1463 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1464 if (instr->dest.ssa.num_components > 1)
1465 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1466 return res;
1467 } else if (instr->dest.ssa.bit_size == 16) {
1468 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1469 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1470 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1471 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1472 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1473 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1474 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1475 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1476 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1477 LLVMConstInt(ctx->ac.i32, 4, false)};
1478 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1479 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1480 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1481 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1482 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1483 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1484 }
1485
1486 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1487
1488 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1489 }
1490
1491 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1492 const nir_intrinsic_instr *instr)
1493 {
1494 LLVMValueRef index = get_src(ctx, instr->src[0]);
1495
1496 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1497 }
1498
1499 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1500 {
1501 uint32_t new_mask = 0;
1502 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1503 if (mask & (1u << i))
1504 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1505 return new_mask;
1506 }
1507
1508 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1509 unsigned start, unsigned count)
1510 {
1511 LLVMValueRef mask[] = {
1512 ctx->i32_0, ctx->i32_1,
1513 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1514
1515 unsigned src_elements = ac_get_llvm_num_components(src);
1516
1517 if (count == src_elements) {
1518 assert(start == 0);
1519 return src;
1520 } else if (count == 1) {
1521 assert(start < src_elements);
1522 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1523 } else {
1524 assert(start + count <= src_elements);
1525 assert(count <= 4);
1526 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1527 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1528 }
1529 }
1530
1531 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1532 enum gl_access_qualifier access,
1533 bool may_store_unaligned,
1534 bool writeonly_memory)
1535 {
1536 unsigned cache_policy = 0;
1537
1538 /* SI has a TC L1 bug causing corruption of 8bit/16bit stores. All
1539 * store opcodes not aligned to a dword are affected. The only way to
1540 * get unaligned stores is through shader images.
1541 */
1542 if (((may_store_unaligned && ctx->ac.chip_class == SI) ||
1543 /* If this is write-only, don't keep data in L1 to prevent
1544 * evicting L1 cache lines that may be needed by other
1545 * instructions.
1546 */
1547 writeonly_memory ||
1548 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1549 cache_policy |= ac_glc;
1550 }
1551
1552 return cache_policy;
1553 }
1554
1555 static void visit_store_ssbo(struct ac_nir_context *ctx,
1556 nir_intrinsic_instr *instr)
1557 {
1558 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1559 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1560 unsigned writemask = nir_intrinsic_write_mask(instr);
1561 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1562 bool writeonly_memory = access & ACCESS_NON_READABLE;
1563 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1564
1565 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1566 get_src(ctx, instr->src[1]), true);
1567 LLVMValueRef base_data = src_data;
1568 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1569 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1570
1571 while (writemask) {
1572 int start, count;
1573 LLVMValueRef data, offset;
1574 LLVMTypeRef data_type;
1575
1576 u_bit_scan_consecutive_range(&writemask, &start, &count);
1577
1578 /* Due to an LLVM limitation, split 3-element writes
1579 * into a 2-element and a 1-element write. */
1580 if (count == 3) {
1581 writemask |= 1 << (start + 2);
1582 count = 2;
1583 }
1584 int num_bytes = count * elem_size_bytes; /* count in bytes */
1585
1586 /* we can only store 4 DWords at the same time.
1587 * can only happen for 64 Bit vectors. */
1588 if (num_bytes > 16) {
1589 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1590 count = 2;
1591 num_bytes = 16;
1592 }
1593
1594 /* check alignment of 16 Bit stores */
1595 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1596 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1597 count = 1;
1598 num_bytes = 2;
1599 }
1600 data = extract_vector_range(&ctx->ac, base_data, start, count);
1601
1602 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1603 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1604
1605 if (num_bytes == 1) {
1606 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1607 offset, ctx->ac.i32_0,
1608 cache_policy & ac_glc,
1609 writeonly_memory);
1610 } else if (num_bytes == 2) {
1611 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1612 offset, ctx->ac.i32_0,
1613 cache_policy & ac_glc,
1614 writeonly_memory);
1615 } else {
1616 int num_channels = num_bytes / 4;
1617
1618 switch (num_bytes) {
1619 case 16: /* v4f32 */
1620 data_type = ctx->ac.v4f32;
1621 break;
1622 case 8: /* v2f32 */
1623 data_type = ctx->ac.v2f32;
1624 break;
1625 case 4: /* f32 */
1626 data_type = ctx->ac.f32;
1627 break;
1628 default:
1629 unreachable("Malformed vector store.");
1630 }
1631 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1632
1633 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1634 num_channels, offset,
1635 ctx->ac.i32_0, 0,
1636 cache_policy & ac_glc,
1637 false, writeonly_memory,
1638 false);
1639 }
1640 }
1641 }
1642
1643 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1644 const nir_intrinsic_instr *instr)
1645 {
1646 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1647 const char *op;
1648 char name[64], type[8];
1649 LLVMValueRef params[6];
1650 int arg_count = 0;
1651
1652 switch (instr->intrinsic) {
1653 case nir_intrinsic_ssbo_atomic_add:
1654 op = "add";
1655 break;
1656 case nir_intrinsic_ssbo_atomic_imin:
1657 op = "smin";
1658 break;
1659 case nir_intrinsic_ssbo_atomic_umin:
1660 op = "umin";
1661 break;
1662 case nir_intrinsic_ssbo_atomic_imax:
1663 op = "smax";
1664 break;
1665 case nir_intrinsic_ssbo_atomic_umax:
1666 op = "umax";
1667 break;
1668 case nir_intrinsic_ssbo_atomic_and:
1669 op = "and";
1670 break;
1671 case nir_intrinsic_ssbo_atomic_or:
1672 op = "or";
1673 break;
1674 case nir_intrinsic_ssbo_atomic_xor:
1675 op = "xor";
1676 break;
1677 case nir_intrinsic_ssbo_atomic_exchange:
1678 op = "swap";
1679 break;
1680 case nir_intrinsic_ssbo_atomic_comp_swap:
1681 op = "cmpswap";
1682 break;
1683 default:
1684 abort();
1685 }
1686
1687 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1688 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1689 }
1690 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1691 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1692 get_src(ctx, instr->src[0]),
1693 true);
1694
1695 if (HAVE_LLVM >= 0x900) {
1696 /* XXX: The new raw/struct atomic intrinsics are buggy with
1697 * LLVM 8, see r358579.
1698 */
1699 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1700 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1701 params[arg_count++] = ctx->ac.i32_0; /* slc */
1702
1703 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1704 snprintf(name, sizeof(name),
1705 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1706 } else {
1707 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1708 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1709 params[arg_count++] = ctx->ac.i1false; /* slc */
1710
1711 assert(return_type == ctx->ac.i32);
1712 snprintf(name, sizeof(name),
1713 "llvm.amdgcn.buffer.atomic.%s", op);
1714 }
1715
1716 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1717 arg_count, 0);
1718 }
1719
1720 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1721 const nir_intrinsic_instr *instr)
1722 {
1723 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1724 int num_components = instr->num_components;
1725 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1726 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1727
1728 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1729 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1730 get_src(ctx, instr->src[0]), false);
1731 LLVMValueRef vindex = ctx->ac.i32_0;
1732
1733 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1734 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1735
1736 LLVMValueRef results[4];
1737 for (int i = 0; i < num_components;) {
1738 int num_elems = num_components - i;
1739 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1740 num_elems = 1;
1741 if (num_elems * elem_size_bytes > 16)
1742 num_elems = 16 / elem_size_bytes;
1743 int load_bytes = num_elems * elem_size_bytes;
1744
1745 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1746
1747 LLVMValueRef ret;
1748
1749 if (load_bytes == 1) {
1750 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1751 rsrc,
1752 offset,
1753 ctx->ac.i32_0,
1754 immoffset,
1755 cache_policy & ac_glc);
1756 } else if (load_bytes == 2) {
1757 ret = ac_build_tbuffer_load_short(&ctx->ac,
1758 rsrc,
1759 offset,
1760 ctx->ac.i32_0,
1761 immoffset,
1762 cache_policy & ac_glc);
1763 } else {
1764 int num_channels = util_next_power_of_two(load_bytes) / 4;
1765
1766 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1767 vindex, offset, immoffset, 0,
1768 cache_policy & ac_glc, 0,
1769 false, false);
1770 }
1771
1772 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1773 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1774 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1775
1776 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1777 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1778
1779 for (unsigned j = 0; j < num_elems; j++) {
1780 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1781 }
1782 i += num_elems;
1783 }
1784
1785 return ac_build_gather_values(&ctx->ac, results, num_components);
1786 }
1787
1788 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1789 const nir_intrinsic_instr *instr)
1790 {
1791 LLVMValueRef ret;
1792 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1793 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1794 int num_components = instr->num_components;
1795
1796 if (ctx->abi->load_ubo)
1797 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1798
1799 if (instr->dest.ssa.bit_size == 64)
1800 num_components *= 2;
1801
1802 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1803 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1804 LLVMValueRef results[num_components];
1805 for (unsigned i = 0; i < num_components; ++i) {
1806 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1807 load_bytes * i, 0);
1808
1809 if (load_bytes == 1) {
1810 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1811 rsrc,
1812 offset,
1813 ctx->ac.i32_0,
1814 immoffset,
1815 false);
1816 } else {
1817 assert(load_bytes == 2);
1818 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1819 rsrc,
1820 offset,
1821 ctx->ac.i32_0,
1822 immoffset,
1823 false);
1824 }
1825 }
1826 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1827 } else {
1828 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1829 NULL, 0, false, false, true, true);
1830
1831 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1832 }
1833
1834 return LLVMBuildBitCast(ctx->ac.builder, ret,
1835 get_def_type(ctx, &instr->dest.ssa), "");
1836 }
1837
1838 static void
1839 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1840 bool vs_in, unsigned *vertex_index_out,
1841 LLVMValueRef *vertex_index_ref,
1842 unsigned *const_out, LLVMValueRef *indir_out)
1843 {
1844 nir_variable *var = nir_deref_instr_get_variable(instr);
1845 nir_deref_path path;
1846 unsigned idx_lvl = 1;
1847
1848 nir_deref_path_init(&path, instr, NULL);
1849
1850 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1851 if (vertex_index_ref) {
1852 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1853 if (vertex_index_out)
1854 *vertex_index_out = 0;
1855 } else {
1856 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1857 }
1858 ++idx_lvl;
1859 }
1860
1861 uint32_t const_offset = 0;
1862 LLVMValueRef offset = NULL;
1863
1864 if (var->data.compact) {
1865 assert(instr->deref_type == nir_deref_type_array);
1866 const_offset = nir_src_as_uint(instr->arr.index);
1867 goto out;
1868 }
1869
1870 for (; path.path[idx_lvl]; ++idx_lvl) {
1871 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1872 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1873 unsigned index = path.path[idx_lvl]->strct.index;
1874
1875 for (unsigned i = 0; i < index; i++) {
1876 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1877 const_offset += glsl_count_attribute_slots(ft, vs_in);
1878 }
1879 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1880 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1881 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1882 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1883 if (offset)
1884 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1885 else
1886 offset = array_off;
1887 } else
1888 unreachable("Uhandled deref type in get_deref_instr_offset");
1889 }
1890
1891 out:
1892 nir_deref_path_finish(&path);
1893
1894 if (const_offset && offset)
1895 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1896 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1897 "");
1898
1899 *const_out = const_offset;
1900 *indir_out = offset;
1901 }
1902
1903 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1904 nir_intrinsic_instr *instr,
1905 bool load_inputs)
1906 {
1907 LLVMValueRef result;
1908 LLVMValueRef vertex_index = NULL;
1909 LLVMValueRef indir_index = NULL;
1910 unsigned const_index = 0;
1911
1912 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1913
1914 unsigned location = var->data.location;
1915 unsigned driver_location = var->data.driver_location;
1916 const bool is_patch = var->data.patch;
1917 const bool is_compact = var->data.compact;
1918
1919 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1920 false, NULL, is_patch ? NULL : &vertex_index,
1921 &const_index, &indir_index);
1922
1923 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1924
1925 LLVMTypeRef src_component_type;
1926 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1927 src_component_type = LLVMGetElementType(dest_type);
1928 else
1929 src_component_type = dest_type;
1930
1931 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1932 vertex_index, indir_index,
1933 const_index, location, driver_location,
1934 var->data.location_frac,
1935 instr->num_components,
1936 is_patch, is_compact, load_inputs);
1937 if (instr->dest.ssa.bit_size == 16) {
1938 result = ac_to_integer(&ctx->ac, result);
1939 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1940 }
1941 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1942 }
1943
1944 static unsigned
1945 type_scalar_size_bytes(const struct glsl_type *type)
1946 {
1947 assert(glsl_type_is_vector_or_scalar(type) ||
1948 glsl_type_is_matrix(type));
1949 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1950 }
1951
1952 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1953 nir_intrinsic_instr *instr)
1954 {
1955 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1956 nir_variable *var = nir_deref_instr_get_variable(deref);
1957
1958 LLVMValueRef values[8];
1959 int idx = 0;
1960 int ve = instr->dest.ssa.num_components;
1961 unsigned comp = 0;
1962 LLVMValueRef indir_index;
1963 LLVMValueRef ret;
1964 unsigned const_index;
1965 unsigned stride = 4;
1966 int mode = deref->mode;
1967
1968 if (var) {
1969 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1970 var->data.mode == nir_var_shader_in;
1971 idx = var->data.driver_location;
1972 comp = var->data.location_frac;
1973 mode = var->data.mode;
1974
1975 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1976 &const_index, &indir_index);
1977
1978 if (var->data.compact) {
1979 stride = 1;
1980 const_index += comp;
1981 comp = 0;
1982 }
1983 }
1984
1985 if (instr->dest.ssa.bit_size == 64 &&
1986 (deref->mode == nir_var_shader_in ||
1987 deref->mode == nir_var_shader_out ||
1988 deref->mode == nir_var_function_temp))
1989 ve *= 2;
1990
1991 switch (mode) {
1992 case nir_var_shader_in:
1993 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1994 ctx->stage == MESA_SHADER_TESS_EVAL) {
1995 return load_tess_varyings(ctx, instr, true);
1996 }
1997
1998 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1999 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2000 LLVMValueRef indir_index;
2001 unsigned const_index, vertex_index;
2002 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2003 &const_index, &indir_index);
2004
2005 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2006 var->data.driver_location,
2007 var->data.location_frac,
2008 instr->num_components, vertex_index, const_index, type);
2009 }
2010
2011 for (unsigned chan = comp; chan < ve + comp; chan++) {
2012 if (indir_index) {
2013 unsigned count = glsl_count_attribute_slots(
2014 var->type,
2015 ctx->stage == MESA_SHADER_VERTEX);
2016 count -= chan / 4;
2017 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2018 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2019 stride, false, true);
2020
2021 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2022 tmp_vec,
2023 indir_index, "");
2024 } else
2025 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2026 }
2027 break;
2028 case nir_var_function_temp:
2029 for (unsigned chan = 0; chan < ve; chan++) {
2030 if (indir_index) {
2031 unsigned count = glsl_count_attribute_slots(
2032 var->type, false);
2033 count -= chan / 4;
2034 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2035 &ctx->ac, ctx->locals + idx + chan, count,
2036 stride, true, true);
2037
2038 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2039 tmp_vec,
2040 indir_index, "");
2041 } else {
2042 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2043 }
2044 }
2045 break;
2046 case nir_var_mem_shared: {
2047 LLVMValueRef address = get_src(ctx, instr->src[0]);
2048 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2049 return LLVMBuildBitCast(ctx->ac.builder, val,
2050 get_def_type(ctx, &instr->dest.ssa),
2051 "");
2052 }
2053 case nir_var_shader_out:
2054 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2055 return load_tess_varyings(ctx, instr, false);
2056 }
2057
2058 for (unsigned chan = comp; chan < ve + comp; chan++) {
2059 if (indir_index) {
2060 unsigned count = glsl_count_attribute_slots(
2061 var->type, false);
2062 count -= chan / 4;
2063 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2064 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2065 stride, true, true);
2066
2067 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2068 tmp_vec,
2069 indir_index, "");
2070 } else {
2071 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2072 ctx->abi->outputs[idx + chan + const_index * stride],
2073 "");
2074 }
2075 }
2076 break;
2077 case nir_var_mem_global: {
2078 LLVMValueRef address = get_src(ctx, instr->src[0]);
2079 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2080 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2081 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2082
2083 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2084 if (stride != natural_stride) {
2085 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2086 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2087 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2088
2089 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2090 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2091 values[i] = LLVMBuildLoad(ctx->ac.builder,
2092 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2093 }
2094 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2095 } else {
2096 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2097 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2098 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2099 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2100 return val;
2101 }
2102 }
2103 default:
2104 unreachable("unhandle variable mode");
2105 }
2106 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2107 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2108 }
2109
2110 static void
2111 visit_store_var(struct ac_nir_context *ctx,
2112 nir_intrinsic_instr *instr)
2113 {
2114 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2115 nir_variable *var = nir_deref_instr_get_variable(deref);
2116
2117 LLVMValueRef temp_ptr, value;
2118 int idx = 0;
2119 unsigned comp = 0;
2120 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2121 int writemask = instr->const_index[0];
2122 LLVMValueRef indir_index;
2123 unsigned const_index;
2124
2125 if (var) {
2126 get_deref_offset(ctx, deref, false,
2127 NULL, NULL, &const_index, &indir_index);
2128 idx = var->data.driver_location;
2129 comp = var->data.location_frac;
2130
2131 if (var->data.compact) {
2132 const_index += comp;
2133 comp = 0;
2134 }
2135 }
2136
2137 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2138 (deref->mode == nir_var_shader_out ||
2139 deref->mode == nir_var_function_temp)) {
2140
2141 src = LLVMBuildBitCast(ctx->ac.builder, src,
2142 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2143 "");
2144
2145 writemask = widen_mask(writemask, 2);
2146 }
2147
2148 writemask = writemask << comp;
2149
2150 switch (deref->mode) {
2151 case nir_var_shader_out:
2152
2153 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2154 LLVMValueRef vertex_index = NULL;
2155 LLVMValueRef indir_index = NULL;
2156 unsigned const_index = 0;
2157 const bool is_patch = var->data.patch;
2158
2159 get_deref_offset(ctx, deref, false, NULL,
2160 is_patch ? NULL : &vertex_index,
2161 &const_index, &indir_index);
2162
2163 ctx->abi->store_tcs_outputs(ctx->abi, var,
2164 vertex_index, indir_index,
2165 const_index, src, writemask);
2166 return;
2167 }
2168
2169 for (unsigned chan = 0; chan < 8; chan++) {
2170 int stride = 4;
2171 if (!(writemask & (1 << chan)))
2172 continue;
2173
2174 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2175
2176 if (var->data.compact)
2177 stride = 1;
2178 if (indir_index) {
2179 unsigned count = glsl_count_attribute_slots(
2180 var->type, false);
2181 count -= chan / 4;
2182 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2183 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2184 stride, true, true);
2185
2186 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2187 value, indir_index, "");
2188 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2189 count, stride, tmp_vec);
2190
2191 } else {
2192 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2193
2194 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2195 }
2196 }
2197 break;
2198 case nir_var_function_temp:
2199 for (unsigned chan = 0; chan < 8; chan++) {
2200 if (!(writemask & (1 << chan)))
2201 continue;
2202
2203 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2204 if (indir_index) {
2205 unsigned count = glsl_count_attribute_slots(
2206 var->type, false);
2207 count -= chan / 4;
2208 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2209 &ctx->ac, ctx->locals + idx + chan, count,
2210 4, true, true);
2211
2212 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2213 value, indir_index, "");
2214 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2215 count, 4, tmp_vec);
2216 } else {
2217 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2218
2219 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2220 }
2221 }
2222 break;
2223
2224 case nir_var_mem_global:
2225 case nir_var_mem_shared: {
2226 int writemask = instr->const_index[0];
2227 LLVMValueRef address = get_src(ctx, instr->src[0]);
2228 LLVMValueRef val = get_src(ctx, instr->src[1]);
2229
2230 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2231 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2232 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2233
2234 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2235 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2236 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2237
2238 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2239 stride == natural_stride) {
2240 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2241 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2242 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2243
2244 val = LLVMBuildBitCast(ctx->ac.builder, val,
2245 LLVMGetElementType(LLVMTypeOf(address)), "");
2246 LLVMBuildStore(ctx->ac.builder, val, address);
2247 } else {
2248 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2249 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2250 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2251 for (unsigned chan = 0; chan < 4; chan++) {
2252 if (!(writemask & (1 << chan)))
2253 continue;
2254
2255 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2256
2257 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2258 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2259 chan);
2260 src = LLVMBuildBitCast(ctx->ac.builder, src,
2261 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2262 LLVMBuildStore(ctx->ac.builder, src, ptr);
2263 }
2264 }
2265 break;
2266 }
2267 default:
2268 abort();
2269 break;
2270 }
2271 }
2272
2273 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2274 {
2275 switch (dim) {
2276 case GLSL_SAMPLER_DIM_BUF:
2277 return 1;
2278 case GLSL_SAMPLER_DIM_1D:
2279 return array ? 2 : 1;
2280 case GLSL_SAMPLER_DIM_2D:
2281 return array ? 3 : 2;
2282 case GLSL_SAMPLER_DIM_MS:
2283 return array ? 4 : 3;
2284 case GLSL_SAMPLER_DIM_3D:
2285 case GLSL_SAMPLER_DIM_CUBE:
2286 return 3;
2287 case GLSL_SAMPLER_DIM_RECT:
2288 case GLSL_SAMPLER_DIM_SUBPASS:
2289 return 2;
2290 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2291 return 3;
2292 default:
2293 break;
2294 }
2295 return 0;
2296 }
2297
2298 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2299 LLVMValueRef coord_x, LLVMValueRef coord_y,
2300 LLVMValueRef coord_z,
2301 LLVMValueRef sample_index,
2302 LLVMValueRef fmask_desc_ptr)
2303 {
2304 unsigned sample_chan = coord_z ? 3 : 2;
2305 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2306 addr[sample_chan] = sample_index;
2307
2308 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2309 return addr[sample_chan];
2310 }
2311
2312 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2313 {
2314 assert(instr->src[0].is_ssa);
2315 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2316 }
2317
2318 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2319 const nir_intrinsic_instr *instr,
2320 enum ac_descriptor_type desc_type,
2321 bool write)
2322 {
2323 nir_deref_instr *deref_instr =
2324 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2325 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2326
2327 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2328 }
2329
2330 static void get_image_coords(struct ac_nir_context *ctx,
2331 const nir_intrinsic_instr *instr,
2332 struct ac_image_args *args,
2333 enum glsl_sampler_dim dim,
2334 bool is_array)
2335 {
2336 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2337 LLVMValueRef masks[] = {
2338 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2339 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2340 };
2341 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2342
2343 int count;
2344 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2345 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2346 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2347 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2348 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2349 count = image_type_to_components_count(dim, is_array);
2350
2351 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2352 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2353 LLVMValueRef fmask_load_address[3];
2354 int chan;
2355
2356 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2357 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2358 if (is_array)
2359 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2360 else
2361 fmask_load_address[2] = NULL;
2362 if (add_frag_pos) {
2363 for (chan = 0; chan < 2; ++chan)
2364 fmask_load_address[chan] =
2365 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2366 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2367 ctx->ac.i32, ""), "");
2368 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2369 }
2370 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2371 fmask_load_address[0],
2372 fmask_load_address[1],
2373 fmask_load_address[2],
2374 sample_index,
2375 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2376 AC_DESC_FMASK, &instr->instr, false, false));
2377 }
2378 if (count == 1 && !gfx9_1d) {
2379 if (instr->src[1].ssa->num_components)
2380 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2381 else
2382 args->coords[0] = src0;
2383 } else {
2384 int chan;
2385 if (is_ms)
2386 count--;
2387 for (chan = 0; chan < count; ++chan) {
2388 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2389 }
2390 if (add_frag_pos) {
2391 for (chan = 0; chan < 2; ++chan) {
2392 args->coords[chan] = LLVMBuildAdd(
2393 ctx->ac.builder, args->coords[chan],
2394 LLVMBuildFPToUI(
2395 ctx->ac.builder, ctx->abi->frag_pos[chan],
2396 ctx->ac.i32, ""), "");
2397 }
2398 args->coords[2] = ac_to_integer(&ctx->ac,
2399 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2400 count++;
2401 }
2402
2403 if (gfx9_1d) {
2404 if (is_array) {
2405 args->coords[2] = args->coords[1];
2406 args->coords[1] = ctx->ac.i32_0;
2407 } else
2408 args->coords[1] = ctx->ac.i32_0;
2409 count++;
2410 }
2411
2412 if (is_ms) {
2413 args->coords[count] = sample_index;
2414 count++;
2415 }
2416 }
2417 }
2418
2419 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2420 const nir_intrinsic_instr *instr,
2421 bool write, bool atomic)
2422 {
2423 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2424 if (ctx->abi->gfx9_stride_size_workaround ||
2425 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2426 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2427 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2428 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2429
2430 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2431 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2432 elem_count, stride, "");
2433
2434 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2435 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2436 }
2437 return rsrc;
2438 }
2439
2440 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2441 const nir_intrinsic_instr *instr,
2442 bool bindless)
2443 {
2444 LLVMValueRef res;
2445
2446 enum glsl_sampler_dim dim;
2447 enum gl_access_qualifier access;
2448 bool is_array;
2449 if (bindless) {
2450 dim = nir_intrinsic_image_dim(instr);
2451 access = nir_intrinsic_access(instr);
2452 is_array = nir_intrinsic_image_array(instr);
2453 } else {
2454 const nir_deref_instr *image_deref = get_image_deref(instr);
2455 const struct glsl_type *type = image_deref->type;
2456 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2457 dim = glsl_get_sampler_dim(type);
2458 access = var->data.image.access;
2459 is_array = glsl_sampler_type_is_array(type);
2460 }
2461
2462 struct ac_image_args args = {};
2463
2464 args.cache_policy = get_cache_policy(ctx, access, false, false);
2465
2466 if (dim == GLSL_SAMPLER_DIM_BUF) {
2467 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2468 unsigned num_channels = util_last_bit(mask);
2469 LLVMValueRef rsrc, vindex;
2470
2471 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2472 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2473 ctx->ac.i32_0, "");
2474
2475 /* TODO: set "can_speculate" when OpenGL needs it. */
2476 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2477 ctx->ac.i32_0, num_channels,
2478 !!(args.cache_policy & ac_glc),
2479 false);
2480 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2481
2482 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2483 res = ac_to_integer(&ctx->ac, res);
2484 } else {
2485 args.opcode = ac_image_load;
2486 get_image_coords(ctx, instr, &args, dim, is_array);
2487 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2488 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2489 args.dmask = 15;
2490 args.attributes = AC_FUNC_ATTR_READONLY;
2491
2492 res = ac_build_image_opcode(&ctx->ac, &args);
2493 }
2494 return res;
2495 }
2496
2497 static void visit_image_store(struct ac_nir_context *ctx,
2498 nir_intrinsic_instr *instr,
2499 bool bindless)
2500 {
2501
2502
2503 enum glsl_sampler_dim dim;
2504 enum gl_access_qualifier access;
2505 bool is_array;
2506 if (bindless) {
2507 dim = nir_intrinsic_image_dim(instr);
2508 access = nir_intrinsic_access(instr);
2509 is_array = nir_intrinsic_image_array(instr);
2510 } else {
2511 const nir_deref_instr *image_deref = get_image_deref(instr);
2512 const struct glsl_type *type = image_deref->type;
2513 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2514 dim = glsl_get_sampler_dim(type);
2515 access = var->data.image.access;
2516 is_array = glsl_sampler_type_is_array(type);
2517 }
2518
2519 bool writeonly_memory = access & ACCESS_NON_READABLE;
2520 struct ac_image_args args = {};
2521
2522 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2523
2524 if (dim == GLSL_SAMPLER_DIM_BUF) {
2525 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2526 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2527 unsigned src_channels = ac_get_llvm_num_components(src);
2528 LLVMValueRef vindex;
2529
2530 if (src_channels == 3)
2531 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2532
2533 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2534 get_src(ctx, instr->src[1]),
2535 ctx->ac.i32_0, "");
2536
2537 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2538 ctx->ac.i32_0, src_channels,
2539 args.cache_policy & ac_glc,
2540 writeonly_memory);
2541 } else {
2542 args.opcode = ac_image_store;
2543 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2544 get_image_coords(ctx, instr, &args, dim, is_array);
2545 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2546 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2547 args.dmask = 15;
2548
2549 ac_build_image_opcode(&ctx->ac, &args);
2550 }
2551
2552 }
2553
2554 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2555 const nir_intrinsic_instr *instr,
2556 bool bindless)
2557 {
2558 LLVMValueRef params[7];
2559 int param_count = 0;
2560
2561 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2562 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2563 const char *atomic_name;
2564 char intrinsic_name[64];
2565 enum ac_atomic_op atomic_subop;
2566 MAYBE_UNUSED int length;
2567
2568 enum glsl_sampler_dim dim;
2569 bool is_unsigned = false;
2570 bool is_array;
2571 if (bindless) {
2572 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2573 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2574 const GLenum format = nir_intrinsic_format(instr);
2575 assert(format == GL_R32UI || format == GL_R32I);
2576 is_unsigned = format == GL_R32UI;
2577 }
2578 dim = nir_intrinsic_image_dim(instr);
2579 is_array = nir_intrinsic_image_array(instr);
2580 } else {
2581 const struct glsl_type *type = get_image_deref(instr)->type;
2582 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2583 dim = glsl_get_sampler_dim(type);
2584 is_array = glsl_sampler_type_is_array(type);
2585 }
2586
2587 switch (instr->intrinsic) {
2588 case nir_intrinsic_bindless_image_atomic_add:
2589 case nir_intrinsic_image_deref_atomic_add:
2590 atomic_name = "add";
2591 atomic_subop = ac_atomic_add;
2592 break;
2593 case nir_intrinsic_bindless_image_atomic_min:
2594 case nir_intrinsic_image_deref_atomic_min:
2595 atomic_name = is_unsigned ? "umin" : "smin";
2596 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2597 break;
2598 case nir_intrinsic_bindless_image_atomic_max:
2599 case nir_intrinsic_image_deref_atomic_max:
2600 atomic_name = is_unsigned ? "umax" : "smax";
2601 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2602 break;
2603 case nir_intrinsic_bindless_image_atomic_and:
2604 case nir_intrinsic_image_deref_atomic_and:
2605 atomic_name = "and";
2606 atomic_subop = ac_atomic_and;
2607 break;
2608 case nir_intrinsic_bindless_image_atomic_or:
2609 case nir_intrinsic_image_deref_atomic_or:
2610 atomic_name = "or";
2611 atomic_subop = ac_atomic_or;
2612 break;
2613 case nir_intrinsic_bindless_image_atomic_xor:
2614 case nir_intrinsic_image_deref_atomic_xor:
2615 atomic_name = "xor";
2616 atomic_subop = ac_atomic_xor;
2617 break;
2618 case nir_intrinsic_bindless_image_atomic_exchange:
2619 case nir_intrinsic_image_deref_atomic_exchange:
2620 atomic_name = "swap";
2621 atomic_subop = ac_atomic_swap;
2622 break;
2623 case nir_intrinsic_bindless_image_atomic_comp_swap:
2624 case nir_intrinsic_image_deref_atomic_comp_swap:
2625 atomic_name = "cmpswap";
2626 atomic_subop = 0; /* not used */
2627 break;
2628 default:
2629 abort();
2630 }
2631
2632 if (cmpswap)
2633 params[param_count++] = get_src(ctx, instr->src[4]);
2634 params[param_count++] = get_src(ctx, instr->src[3]);
2635
2636 if (dim == GLSL_SAMPLER_DIM_BUF) {
2637 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2638 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2639 ctx->ac.i32_0, ""); /* vindex */
2640 params[param_count++] = ctx->ac.i32_0; /* voffset */
2641 if (HAVE_LLVM >= 0x900) {
2642 /* XXX: The new raw/struct atomic intrinsics are buggy
2643 * with LLVM 8, see r358579.
2644 */
2645 params[param_count++] = ctx->ac.i32_0; /* soffset */
2646 params[param_count++] = ctx->ac.i32_0; /* slc */
2647
2648 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2649 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2650 } else {
2651 params[param_count++] = ctx->ac.i1false; /* slc */
2652
2653 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2654 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2655 }
2656
2657 assert(length < sizeof(intrinsic_name));
2658 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2659 params, param_count, 0);
2660 } else {
2661 struct ac_image_args args = {};
2662 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2663 args.atomic = atomic_subop;
2664 args.data[0] = params[0];
2665 if (cmpswap)
2666 args.data[1] = params[1];
2667 get_image_coords(ctx, instr, &args, dim, is_array);
2668 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2669 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2670
2671 return ac_build_image_opcode(&ctx->ac, &args);
2672 }
2673 }
2674
2675 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2676 const nir_intrinsic_instr *instr,
2677 bool bindless)
2678 {
2679 enum glsl_sampler_dim dim;
2680 bool is_array;
2681 if (bindless) {
2682 dim = nir_intrinsic_image_dim(instr);
2683 is_array = nir_intrinsic_image_array(instr);
2684 } else {
2685 const struct glsl_type *type = get_image_deref(instr)->type;
2686 dim = glsl_get_sampler_dim(type);
2687 is_array = glsl_sampler_type_is_array(type);
2688 }
2689
2690 struct ac_image_args args = { 0 };
2691 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2692 args.dmask = 0xf;
2693 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2694 args.opcode = ac_image_get_resinfo;
2695 args.lod = ctx->ac.i32_0;
2696 args.attributes = AC_FUNC_ATTR_READNONE;
2697
2698 return ac_build_image_opcode(&ctx->ac, &args);
2699 }
2700
2701 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2702 const nir_intrinsic_instr *instr,
2703 bool bindless)
2704 {
2705 LLVMValueRef res;
2706
2707 enum glsl_sampler_dim dim;
2708 bool is_array;
2709 if (bindless) {
2710 dim = nir_intrinsic_image_dim(instr);
2711 is_array = nir_intrinsic_image_array(instr);
2712 } else {
2713 const struct glsl_type *type = get_image_deref(instr)->type;
2714 dim = glsl_get_sampler_dim(type);
2715 is_array = glsl_sampler_type_is_array(type);
2716 }
2717
2718 if (dim == GLSL_SAMPLER_DIM_BUF)
2719 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2720
2721 struct ac_image_args args = { 0 };
2722
2723 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2724 args.dmask = 0xf;
2725 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2726 args.opcode = ac_image_get_resinfo;
2727 args.lod = ctx->ac.i32_0;
2728 args.attributes = AC_FUNC_ATTR_READNONE;
2729
2730 res = ac_build_image_opcode(&ctx->ac, &args);
2731
2732 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2733
2734 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2735 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2736 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2737 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2738 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2739 }
2740 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2741 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2742 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2743 ctx->ac.i32_1, "");
2744
2745 }
2746 return res;
2747 }
2748
2749 static void emit_membar(struct ac_llvm_context *ac,
2750 const nir_intrinsic_instr *instr)
2751 {
2752 unsigned waitcnt = NOOP_WAITCNT;
2753
2754 switch (instr->intrinsic) {
2755 case nir_intrinsic_memory_barrier:
2756 case nir_intrinsic_group_memory_barrier:
2757 waitcnt &= VM_CNT & LGKM_CNT;
2758 break;
2759 case nir_intrinsic_memory_barrier_atomic_counter:
2760 case nir_intrinsic_memory_barrier_buffer:
2761 case nir_intrinsic_memory_barrier_image:
2762 waitcnt &= VM_CNT;
2763 break;
2764 case nir_intrinsic_memory_barrier_shared:
2765 waitcnt &= LGKM_CNT;
2766 break;
2767 default:
2768 break;
2769 }
2770 if (waitcnt != NOOP_WAITCNT)
2771 ac_build_waitcnt(ac, waitcnt);
2772 }
2773
2774 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2775 {
2776 /* SI only (thanks to a hw bug workaround):
2777 * The real barrier instruction isn’t needed, because an entire patch
2778 * always fits into a single wave.
2779 */
2780 if (ac->chip_class == SI && stage == MESA_SHADER_TESS_CTRL) {
2781 ac_build_waitcnt(ac, LGKM_CNT & VM_CNT);
2782 return;
2783 }
2784 ac_build_s_barrier(ac);
2785 }
2786
2787 static void emit_discard(struct ac_nir_context *ctx,
2788 const nir_intrinsic_instr *instr)
2789 {
2790 LLVMValueRef cond;
2791
2792 if (instr->intrinsic == nir_intrinsic_discard_if) {
2793 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2794 get_src(ctx, instr->src[0]),
2795 ctx->ac.i32_0, "");
2796 } else {
2797 assert(instr->intrinsic == nir_intrinsic_discard);
2798 cond = ctx->ac.i1false;
2799 }
2800
2801 ctx->abi->emit_kill(ctx->abi, cond);
2802 }
2803
2804 static LLVMValueRef
2805 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2806 {
2807 LLVMValueRef result;
2808 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2809 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2810 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2811
2812 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2813 }
2814
2815 static LLVMValueRef
2816 visit_load_subgroup_id(struct ac_nir_context *ctx)
2817 {
2818 if (ctx->stage == MESA_SHADER_COMPUTE) {
2819 LLVMValueRef result;
2820 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2821 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2822 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2823 } else {
2824 return LLVMConstInt(ctx->ac.i32, 0, false);
2825 }
2826 }
2827
2828 static LLVMValueRef
2829 visit_load_num_subgroups(struct ac_nir_context *ctx)
2830 {
2831 if (ctx->stage == MESA_SHADER_COMPUTE) {
2832 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2833 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2834 } else {
2835 return LLVMConstInt(ctx->ac.i32, 1, false);
2836 }
2837 }
2838
2839 static LLVMValueRef
2840 visit_first_invocation(struct ac_nir_context *ctx)
2841 {
2842 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2843
2844 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2845 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2846 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2847 "llvm.cttz.i64",
2848 ctx->ac.i64, args, 2,
2849 AC_FUNC_ATTR_NOUNWIND |
2850 AC_FUNC_ATTR_READNONE);
2851
2852 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2853 }
2854
2855 static LLVMValueRef
2856 visit_load_shared(struct ac_nir_context *ctx,
2857 const nir_intrinsic_instr *instr)
2858 {
2859 LLVMValueRef values[4], derived_ptr, index, ret;
2860
2861 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2862
2863 for (int chan = 0; chan < instr->num_components; chan++) {
2864 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2865 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2866 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2867 }
2868
2869 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2870 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2871 }
2872
2873 static void
2874 visit_store_shared(struct ac_nir_context *ctx,
2875 const nir_intrinsic_instr *instr)
2876 {
2877 LLVMValueRef derived_ptr, data,index;
2878 LLVMBuilderRef builder = ctx->ac.builder;
2879
2880 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2881 LLVMValueRef src = get_src(ctx, instr->src[0]);
2882
2883 int writemask = nir_intrinsic_write_mask(instr);
2884 for (int chan = 0; chan < 4; chan++) {
2885 if (!(writemask & (1 << chan))) {
2886 continue;
2887 }
2888 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2889 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2890 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2891 LLVMBuildStore(builder, data, derived_ptr);
2892 }
2893 }
2894
2895 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2896 const nir_intrinsic_instr *instr,
2897 LLVMValueRef ptr, int src_idx)
2898 {
2899 LLVMValueRef result;
2900 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2901
2902 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2903
2904 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2905 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2906 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2907 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2908 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2909 } else {
2910 LLVMAtomicRMWBinOp op;
2911 switch (instr->intrinsic) {
2912 case nir_intrinsic_shared_atomic_add:
2913 case nir_intrinsic_deref_atomic_add:
2914 op = LLVMAtomicRMWBinOpAdd;
2915 break;
2916 case nir_intrinsic_shared_atomic_umin:
2917 case nir_intrinsic_deref_atomic_umin:
2918 op = LLVMAtomicRMWBinOpUMin;
2919 break;
2920 case nir_intrinsic_shared_atomic_umax:
2921 case nir_intrinsic_deref_atomic_umax:
2922 op = LLVMAtomicRMWBinOpUMax;
2923 break;
2924 case nir_intrinsic_shared_atomic_imin:
2925 case nir_intrinsic_deref_atomic_imin:
2926 op = LLVMAtomicRMWBinOpMin;
2927 break;
2928 case nir_intrinsic_shared_atomic_imax:
2929 case nir_intrinsic_deref_atomic_imax:
2930 op = LLVMAtomicRMWBinOpMax;
2931 break;
2932 case nir_intrinsic_shared_atomic_and:
2933 case nir_intrinsic_deref_atomic_and:
2934 op = LLVMAtomicRMWBinOpAnd;
2935 break;
2936 case nir_intrinsic_shared_atomic_or:
2937 case nir_intrinsic_deref_atomic_or:
2938 op = LLVMAtomicRMWBinOpOr;
2939 break;
2940 case nir_intrinsic_shared_atomic_xor:
2941 case nir_intrinsic_deref_atomic_xor:
2942 op = LLVMAtomicRMWBinOpXor;
2943 break;
2944 case nir_intrinsic_shared_atomic_exchange:
2945 case nir_intrinsic_deref_atomic_exchange:
2946 op = LLVMAtomicRMWBinOpXchg;
2947 break;
2948 default:
2949 return NULL;
2950 }
2951
2952 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2953 }
2954 return result;
2955 }
2956
2957 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2958 {
2959 LLVMValueRef values[2];
2960 LLVMValueRef pos[2];
2961
2962 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2963 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2964
2965 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2966 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2967 return ac_build_gather_values(&ctx->ac, values, 2);
2968 }
2969
2970 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2971 const nir_intrinsic_instr *instr)
2972 {
2973 LLVMValueRef result[4];
2974 LLVMValueRef interp_param;
2975 unsigned location;
2976 unsigned chan;
2977 LLVMValueRef src_c0 = NULL;
2978 LLVMValueRef src_c1 = NULL;
2979 LLVMValueRef src0 = NULL;
2980
2981 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2982 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
2983 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
2984 switch (instr->intrinsic) {
2985 case nir_intrinsic_interp_deref_at_centroid:
2986 location = INTERP_CENTROID;
2987 break;
2988 case nir_intrinsic_interp_deref_at_sample:
2989 case nir_intrinsic_interp_deref_at_offset:
2990 location = INTERP_CENTER;
2991 src0 = get_src(ctx, instr->src[1]);
2992 break;
2993 default:
2994 break;
2995 }
2996
2997 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2998 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2999 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
3000 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
3001 LLVMValueRef sample_position;
3002 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3003
3004 /* fetch sample ID */
3005 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
3006
3007 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
3008 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3009 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
3010 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3011 }
3012 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3013
3014 if (location == INTERP_CENTER) {
3015 LLVMValueRef ij_out[2];
3016 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3017
3018 /*
3019 * take the I then J parameters, and the DDX/Y for it, and
3020 * calculate the IJ inputs for the interpolator.
3021 * temp1 = ddx * offset/sample.x + I;
3022 * interp_param.I = ddy * offset/sample.y + temp1;
3023 * temp1 = ddx * offset/sample.x + J;
3024 * interp_param.J = ddy * offset/sample.y + temp1;
3025 */
3026 for (unsigned i = 0; i < 2; i++) {
3027 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3028 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3029 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3030 ddxy_out, ix_ll, "");
3031 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3032 ddxy_out, iy_ll, "");
3033 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3034 interp_param, ix_ll, "");
3035 LLVMValueRef temp1, temp2;
3036
3037 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3038 ctx->ac.f32, "");
3039
3040 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3041 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3042
3043 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3044 temp2, ctx->ac.i32, "");
3045 }
3046 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3047
3048 }
3049
3050 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3051 while(deref_instr->deref_type != nir_deref_type_var) {
3052 if (deref_instr->deref_type == nir_deref_type_array) {
3053 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3054
3055 LLVMValueRef offset;
3056 if (nir_src_is_const(deref_instr->arr.index)) {
3057 offset = LLVMConstInt(ctx->ac.i32, array_size * nir_src_as_uint(deref_instr->arr.index), false);
3058 } else {
3059 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3060
3061 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3062 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3063 }
3064
3065 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3066 deref_instr = nir_src_as_deref(deref_instr->parent);
3067 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3068 LLVMValueRef offset;
3069 unsigned sidx = deref_instr->strct.index;
3070 deref_instr = nir_src_as_deref(deref_instr->parent);
3071 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3072 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3073 } else {
3074 unreachable("Unsupported deref type");
3075 }
3076
3077 }
3078
3079 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3080 for (chan = 0; chan < 4; chan++) {
3081 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3082 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3083
3084 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3085 LLVMValueRef v, attr_number;
3086
3087 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3088 if (interp_param) {
3089 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3090 interp_param, ctx->ac.v2f32, "");
3091 LLVMValueRef i = LLVMBuildExtractElement(
3092 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3093 LLVMValueRef j = LLVMBuildExtractElement(
3094 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3095
3096 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3097 ctx->abi->prim_mask, i, j);
3098 } else {
3099 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3100 llvm_chan, attr_number, ctx->abi->prim_mask);
3101 }
3102
3103 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3104 LLVMConstInt(ctx->ac.i32, idx, false), "");
3105 }
3106
3107 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3108
3109 }
3110 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3111 var->data.location_frac);
3112 }
3113
3114 static void visit_intrinsic(struct ac_nir_context *ctx,
3115 nir_intrinsic_instr *instr)
3116 {
3117 LLVMValueRef result = NULL;
3118
3119 switch (instr->intrinsic) {
3120 case nir_intrinsic_ballot:
3121 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3122 break;
3123 case nir_intrinsic_read_invocation:
3124 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3125 get_src(ctx, instr->src[1]));
3126 break;
3127 case nir_intrinsic_read_first_invocation:
3128 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3129 break;
3130 case nir_intrinsic_load_subgroup_invocation:
3131 result = ac_get_thread_id(&ctx->ac);
3132 break;
3133 case nir_intrinsic_load_work_group_id: {
3134 LLVMValueRef values[3];
3135
3136 for (int i = 0; i < 3; i++) {
3137 values[i] = ctx->abi->workgroup_ids[i] ?
3138 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3139 }
3140
3141 result = ac_build_gather_values(&ctx->ac, values, 3);
3142 break;
3143 }
3144 case nir_intrinsic_load_base_vertex:
3145 case nir_intrinsic_load_first_vertex:
3146 result = ctx->abi->load_base_vertex(ctx->abi);
3147 break;
3148 case nir_intrinsic_load_local_group_size:
3149 result = ctx->abi->load_local_group_size(ctx->abi);
3150 break;
3151 case nir_intrinsic_load_vertex_id:
3152 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3153 ctx->abi->base_vertex, "");
3154 break;
3155 case nir_intrinsic_load_vertex_id_zero_base: {
3156 result = ctx->abi->vertex_id;
3157 break;
3158 }
3159 case nir_intrinsic_load_local_invocation_id: {
3160 result = ctx->abi->local_invocation_ids;
3161 break;
3162 }
3163 case nir_intrinsic_load_base_instance:
3164 result = ctx->abi->start_instance;
3165 break;
3166 case nir_intrinsic_load_draw_id:
3167 result = ctx->abi->draw_id;
3168 break;
3169 case nir_intrinsic_load_view_index:
3170 result = ctx->abi->view_index;
3171 break;
3172 case nir_intrinsic_load_invocation_id:
3173 if (ctx->stage == MESA_SHADER_TESS_CTRL)
3174 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3175 else
3176 result = ctx->abi->gs_invocation_id;
3177 break;
3178 case nir_intrinsic_load_primitive_id:
3179 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3180 result = ctx->abi->gs_prim_id;
3181 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3182 result = ctx->abi->tcs_patch_id;
3183 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3184 result = ctx->abi->tes_patch_id;
3185 } else
3186 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3187 break;
3188 case nir_intrinsic_load_sample_id:
3189 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3190 break;
3191 case nir_intrinsic_load_sample_pos:
3192 result = load_sample_pos(ctx);
3193 break;
3194 case nir_intrinsic_load_sample_mask_in:
3195 result = ctx->abi->load_sample_mask_in(ctx->abi);
3196 break;
3197 case nir_intrinsic_load_frag_coord: {
3198 LLVMValueRef values[4] = {
3199 ctx->abi->frag_pos[0],
3200 ctx->abi->frag_pos[1],
3201 ctx->abi->frag_pos[2],
3202 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3203 };
3204 result = ac_to_integer(&ctx->ac,
3205 ac_build_gather_values(&ctx->ac, values, 4));
3206 break;
3207 }
3208 case nir_intrinsic_load_front_face:
3209 result = ctx->abi->front_face;
3210 break;
3211 case nir_intrinsic_load_helper_invocation:
3212 result = ac_build_load_helper_invocation(&ctx->ac);
3213 break;
3214 case nir_intrinsic_load_instance_id:
3215 result = ctx->abi->instance_id;
3216 break;
3217 case nir_intrinsic_load_num_work_groups:
3218 result = ctx->abi->num_work_groups;
3219 break;
3220 case nir_intrinsic_load_local_invocation_index:
3221 result = visit_load_local_invocation_index(ctx);
3222 break;
3223 case nir_intrinsic_load_subgroup_id:
3224 result = visit_load_subgroup_id(ctx);
3225 break;
3226 case nir_intrinsic_load_num_subgroups:
3227 result = visit_load_num_subgroups(ctx);
3228 break;
3229 case nir_intrinsic_first_invocation:
3230 result = visit_first_invocation(ctx);
3231 break;
3232 case nir_intrinsic_load_push_constant:
3233 result = visit_load_push_constant(ctx, instr);
3234 break;
3235 case nir_intrinsic_vulkan_resource_index: {
3236 LLVMValueRef index = get_src(ctx, instr->src[0]);
3237 unsigned desc_set = nir_intrinsic_desc_set(instr);
3238 unsigned binding = nir_intrinsic_binding(instr);
3239
3240 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3241 binding);
3242 break;
3243 }
3244 case nir_intrinsic_vulkan_resource_reindex:
3245 result = visit_vulkan_resource_reindex(ctx, instr);
3246 break;
3247 case nir_intrinsic_store_ssbo:
3248 visit_store_ssbo(ctx, instr);
3249 break;
3250 case nir_intrinsic_load_ssbo:
3251 result = visit_load_buffer(ctx, instr);
3252 break;
3253 case nir_intrinsic_ssbo_atomic_add:
3254 case nir_intrinsic_ssbo_atomic_imin:
3255 case nir_intrinsic_ssbo_atomic_umin:
3256 case nir_intrinsic_ssbo_atomic_imax:
3257 case nir_intrinsic_ssbo_atomic_umax:
3258 case nir_intrinsic_ssbo_atomic_and:
3259 case nir_intrinsic_ssbo_atomic_or:
3260 case nir_intrinsic_ssbo_atomic_xor:
3261 case nir_intrinsic_ssbo_atomic_exchange:
3262 case nir_intrinsic_ssbo_atomic_comp_swap:
3263 result = visit_atomic_ssbo(ctx, instr);
3264 break;
3265 case nir_intrinsic_load_ubo:
3266 result = visit_load_ubo_buffer(ctx, instr);
3267 break;
3268 case nir_intrinsic_get_buffer_size:
3269 result = visit_get_buffer_size(ctx, instr);
3270 break;
3271 case nir_intrinsic_load_deref:
3272 result = visit_load_var(ctx, instr);
3273 break;
3274 case nir_intrinsic_store_deref:
3275 visit_store_var(ctx, instr);
3276 break;
3277 case nir_intrinsic_load_shared:
3278 result = visit_load_shared(ctx, instr);
3279 break;
3280 case nir_intrinsic_store_shared:
3281 visit_store_shared(ctx, instr);
3282 break;
3283 case nir_intrinsic_bindless_image_samples:
3284 result = visit_image_samples(ctx, instr, true);
3285 break;
3286 case nir_intrinsic_image_deref_samples:
3287 result = visit_image_samples(ctx, instr, false);
3288 break;
3289 case nir_intrinsic_bindless_image_load:
3290 result = visit_image_load(ctx, instr, true);
3291 break;
3292 case nir_intrinsic_image_deref_load:
3293 result = visit_image_load(ctx, instr, false);
3294 break;
3295 case nir_intrinsic_bindless_image_store:
3296 visit_image_store(ctx, instr, true);
3297 break;
3298 case nir_intrinsic_image_deref_store:
3299 visit_image_store(ctx, instr, false);
3300 break;
3301 case nir_intrinsic_bindless_image_atomic_add:
3302 case nir_intrinsic_bindless_image_atomic_min:
3303 case nir_intrinsic_bindless_image_atomic_max:
3304 case nir_intrinsic_bindless_image_atomic_and:
3305 case nir_intrinsic_bindless_image_atomic_or:
3306 case nir_intrinsic_bindless_image_atomic_xor:
3307 case nir_intrinsic_bindless_image_atomic_exchange:
3308 case nir_intrinsic_bindless_image_atomic_comp_swap:
3309 result = visit_image_atomic(ctx, instr, true);
3310 break;
3311 case nir_intrinsic_image_deref_atomic_add:
3312 case nir_intrinsic_image_deref_atomic_min:
3313 case nir_intrinsic_image_deref_atomic_max:
3314 case nir_intrinsic_image_deref_atomic_and:
3315 case nir_intrinsic_image_deref_atomic_or:
3316 case nir_intrinsic_image_deref_atomic_xor:
3317 case nir_intrinsic_image_deref_atomic_exchange:
3318 case nir_intrinsic_image_deref_atomic_comp_swap:
3319 result = visit_image_atomic(ctx, instr, false);
3320 break;
3321 case nir_intrinsic_bindless_image_size:
3322 result = visit_image_size(ctx, instr, true);
3323 break;
3324 case nir_intrinsic_image_deref_size:
3325 result = visit_image_size(ctx, instr, false);
3326 break;
3327 case nir_intrinsic_shader_clock:
3328 result = ac_build_shader_clock(&ctx->ac);
3329 break;
3330 case nir_intrinsic_discard:
3331 case nir_intrinsic_discard_if:
3332 emit_discard(ctx, instr);
3333 break;
3334 case nir_intrinsic_memory_barrier:
3335 case nir_intrinsic_group_memory_barrier:
3336 case nir_intrinsic_memory_barrier_atomic_counter:
3337 case nir_intrinsic_memory_barrier_buffer:
3338 case nir_intrinsic_memory_barrier_image:
3339 case nir_intrinsic_memory_barrier_shared:
3340 emit_membar(&ctx->ac, instr);
3341 break;
3342 case nir_intrinsic_barrier:
3343 ac_emit_barrier(&ctx->ac, ctx->stage);
3344 break;
3345 case nir_intrinsic_shared_atomic_add:
3346 case nir_intrinsic_shared_atomic_imin:
3347 case nir_intrinsic_shared_atomic_umin:
3348 case nir_intrinsic_shared_atomic_imax:
3349 case nir_intrinsic_shared_atomic_umax:
3350 case nir_intrinsic_shared_atomic_and:
3351 case nir_intrinsic_shared_atomic_or:
3352 case nir_intrinsic_shared_atomic_xor:
3353 case nir_intrinsic_shared_atomic_exchange:
3354 case nir_intrinsic_shared_atomic_comp_swap: {
3355 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3356 result = visit_var_atomic(ctx, instr, ptr, 1);
3357 break;
3358 }
3359 case nir_intrinsic_deref_atomic_add:
3360 case nir_intrinsic_deref_atomic_imin:
3361 case nir_intrinsic_deref_atomic_umin:
3362 case nir_intrinsic_deref_atomic_imax:
3363 case nir_intrinsic_deref_atomic_umax:
3364 case nir_intrinsic_deref_atomic_and:
3365 case nir_intrinsic_deref_atomic_or:
3366 case nir_intrinsic_deref_atomic_xor:
3367 case nir_intrinsic_deref_atomic_exchange:
3368 case nir_intrinsic_deref_atomic_comp_swap: {
3369 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3370 result = visit_var_atomic(ctx, instr, ptr, 1);
3371 break;
3372 }
3373 case nir_intrinsic_interp_deref_at_centroid:
3374 case nir_intrinsic_interp_deref_at_sample:
3375 case nir_intrinsic_interp_deref_at_offset:
3376 result = visit_interp(ctx, instr);
3377 break;
3378 case nir_intrinsic_emit_vertex:
3379 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3380 break;
3381 case nir_intrinsic_end_primitive:
3382 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3383 break;
3384 case nir_intrinsic_load_tess_coord:
3385 result = ctx->abi->load_tess_coord(ctx->abi);
3386 break;
3387 case nir_intrinsic_load_tess_level_outer:
3388 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3389 break;
3390 case nir_intrinsic_load_tess_level_inner:
3391 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3392 break;
3393 case nir_intrinsic_load_patch_vertices_in:
3394 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3395 break;
3396 case nir_intrinsic_vote_all: {
3397 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3398 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3399 break;
3400 }
3401 case nir_intrinsic_vote_any: {
3402 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3403 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3404 break;
3405 }
3406 case nir_intrinsic_shuffle:
3407 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3408 get_src(ctx, instr->src[1]));
3409 break;
3410 case nir_intrinsic_reduce:
3411 result = ac_build_reduce(&ctx->ac,
3412 get_src(ctx, instr->src[0]),
3413 instr->const_index[0],
3414 instr->const_index[1]);
3415 break;
3416 case nir_intrinsic_inclusive_scan:
3417 result = ac_build_inclusive_scan(&ctx->ac,
3418 get_src(ctx, instr->src[0]),
3419 instr->const_index[0]);
3420 break;
3421 case nir_intrinsic_exclusive_scan:
3422 result = ac_build_exclusive_scan(&ctx->ac,
3423 get_src(ctx, instr->src[0]),
3424 instr->const_index[0]);
3425 break;
3426 case nir_intrinsic_quad_broadcast: {
3427 unsigned lane = nir_src_as_uint(instr->src[1]);
3428 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3429 lane, lane, lane, lane);
3430 break;
3431 }
3432 case nir_intrinsic_quad_swap_horizontal:
3433 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3434 break;
3435 case nir_intrinsic_quad_swap_vertical:
3436 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3437 break;
3438 case nir_intrinsic_quad_swap_diagonal:
3439 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3440 break;
3441 default:
3442 fprintf(stderr, "Unknown intrinsic: ");
3443 nir_print_instr(&instr->instr, stderr);
3444 fprintf(stderr, "\n");
3445 break;
3446 }
3447 if (result) {
3448 ctx->ssa_defs[instr->dest.ssa.index] = result;
3449 }
3450 }
3451
3452 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3453 unsigned base_index,
3454 unsigned constant_index,
3455 LLVMValueRef dynamic_index)
3456 {
3457 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3458 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3459 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3460
3461 /* Bindless uniforms are 64bit so multiple index by 8 */
3462 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3463 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3464
3465 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3466
3467 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3468 NULL, 0, false, false, true, true);
3469
3470 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3471 }
3472
3473 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3474 nir_deref_instr *deref_instr,
3475 enum ac_descriptor_type desc_type,
3476 const nir_instr *instr,
3477 bool image, bool write)
3478 {
3479 LLVMValueRef index = NULL;
3480 unsigned constant_index = 0;
3481 unsigned descriptor_set;
3482 unsigned base_index;
3483 bool bindless = false;
3484
3485 if (!deref_instr) {
3486 descriptor_set = 0;
3487 if (image) {
3488 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3489 base_index = 0;
3490 bindless = true;
3491 index = get_src(ctx, img_instr->src[0]);
3492 } else {
3493 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3494 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3495 nir_tex_src_sampler_handle);
3496 if (sampSrcIdx != -1) {
3497 base_index = 0;
3498 bindless = true;
3499 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3500 } else {
3501 assert(tex_instr && !image);
3502 base_index = tex_instr->sampler_index;
3503 }
3504 }
3505 } else {
3506 while(deref_instr->deref_type != nir_deref_type_var) {
3507 if (deref_instr->deref_type == nir_deref_type_array) {
3508 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3509 if (!array_size)
3510 array_size = 1;
3511
3512 if (nir_src_is_const(deref_instr->arr.index)) {
3513 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3514 } else {
3515 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3516
3517 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3518 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3519
3520 if (!index)
3521 index = indirect;
3522 else
3523 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3524 }
3525
3526 deref_instr = nir_src_as_deref(deref_instr->parent);
3527 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3528 unsigned sidx = deref_instr->strct.index;
3529 deref_instr = nir_src_as_deref(deref_instr->parent);
3530 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3531 } else {
3532 unreachable("Unsupported deref type");
3533 }
3534 }
3535 descriptor_set = deref_instr->var->data.descriptor_set;
3536
3537 if (deref_instr->var->data.bindless) {
3538 /* For now just assert on unhandled variable types */
3539 assert(deref_instr->var->data.mode == nir_var_uniform);
3540
3541 base_index = deref_instr->var->data.driver_location;
3542 bindless = true;
3543
3544 index = index ? index : ctx->ac.i32_0;
3545 index = get_bindless_index_from_uniform(ctx, base_index,
3546 constant_index, index);
3547 } else
3548 base_index = deref_instr->var->data.binding;
3549 }
3550
3551 return ctx->abi->load_sampler_desc(ctx->abi,
3552 descriptor_set,
3553 base_index,
3554 constant_index, index,
3555 desc_type, image, write, bindless);
3556 }
3557
3558 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3559 *
3560 * SI-CI:
3561 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3562 * filtering manually. The driver sets img7 to a mask clearing
3563 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3564 * s_and_b32 samp0, samp0, img7
3565 *
3566 * VI:
3567 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3568 */
3569 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3570 LLVMValueRef res, LLVMValueRef samp)
3571 {
3572 LLVMBuilderRef builder = ctx->ac.builder;
3573 LLVMValueRef img7, samp0;
3574
3575 if (ctx->ac.chip_class >= VI)
3576 return samp;
3577
3578 img7 = LLVMBuildExtractElement(builder, res,
3579 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3580 samp0 = LLVMBuildExtractElement(builder, samp,
3581 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3582 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3583 return LLVMBuildInsertElement(builder, samp, samp0,
3584 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3585 }
3586
3587 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3588 nir_tex_instr *instr,
3589 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3590 LLVMValueRef *fmask_ptr)
3591 {
3592 nir_deref_instr *texture_deref_instr = NULL;
3593 nir_deref_instr *sampler_deref_instr = NULL;
3594 int plane = -1;
3595
3596 for (unsigned i = 0; i < instr->num_srcs; i++) {
3597 switch (instr->src[i].src_type) {
3598 case nir_tex_src_texture_deref:
3599 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3600 break;
3601 case nir_tex_src_sampler_deref:
3602 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3603 break;
3604 case nir_tex_src_plane:
3605 plane = nir_src_as_int(instr->src[i].src);
3606 break;
3607 default:
3608 break;
3609 }
3610 }
3611
3612 if (!sampler_deref_instr)
3613 sampler_deref_instr = texture_deref_instr;
3614
3615 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3616
3617 if (plane >= 0) {
3618 assert(instr->op != nir_texop_txf_ms &&
3619 instr->op != nir_texop_samples_identical);
3620 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3621
3622 main_descriptor = AC_DESC_PLANE_0 + plane;
3623 }
3624
3625 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3626
3627 if (samp_ptr) {
3628 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3629 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3630 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3631 }
3632 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3633 instr->op == nir_texop_samples_identical))
3634 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3635 }
3636
3637 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3638 LLVMValueRef coord)
3639 {
3640 coord = ac_to_float(ctx, coord);
3641 coord = ac_build_round(ctx, coord);
3642 coord = ac_to_integer(ctx, coord);
3643 return coord;
3644 }
3645
3646 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3647 {
3648 LLVMValueRef result = NULL;
3649 struct ac_image_args args = { 0 };
3650 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3651 LLVMValueRef ddx = NULL, ddy = NULL;
3652 unsigned offset_src = 0;
3653
3654 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3655
3656 for (unsigned i = 0; i < instr->num_srcs; i++) {
3657 switch (instr->src[i].src_type) {
3658 case nir_tex_src_coord: {
3659 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3660 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3661 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3662 break;
3663 }
3664 case nir_tex_src_projector:
3665 break;
3666 case nir_tex_src_comparator:
3667 if (instr->is_shadow)
3668 args.compare = get_src(ctx, instr->src[i].src);
3669 break;
3670 case nir_tex_src_offset:
3671 args.offset = get_src(ctx, instr->src[i].src);
3672 offset_src = i;
3673 break;
3674 case nir_tex_src_bias:
3675 if (instr->op == nir_texop_txb)
3676 args.bias = get_src(ctx, instr->src[i].src);
3677 break;
3678 case nir_tex_src_lod: {
3679 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3680 args.level_zero = true;
3681 else
3682 args.lod = get_src(ctx, instr->src[i].src);
3683 break;
3684 }
3685 case nir_tex_src_ms_index:
3686 sample_index = get_src(ctx, instr->src[i].src);
3687 break;
3688 case nir_tex_src_ms_mcs:
3689 break;
3690 case nir_tex_src_ddx:
3691 ddx = get_src(ctx, instr->src[i].src);
3692 break;
3693 case nir_tex_src_ddy:
3694 ddy = get_src(ctx, instr->src[i].src);
3695 break;
3696 case nir_tex_src_texture_offset:
3697 case nir_tex_src_sampler_offset:
3698 case nir_tex_src_plane:
3699 default:
3700 break;
3701 }
3702 }
3703
3704 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3705 result = get_buffer_size(ctx, args.resource, true);
3706 goto write_result;
3707 }
3708
3709 if (instr->op == nir_texop_texture_samples) {
3710 LLVMValueRef res, samples, is_msaa;
3711 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3712 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3713 LLVMConstInt(ctx->ac.i32, 3, false), "");
3714 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3715 LLVMConstInt(ctx->ac.i32, 28, false), "");
3716 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3717 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3718 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3719 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3720
3721 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3722 LLVMConstInt(ctx->ac.i32, 16, false), "");
3723 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3724 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3725 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3726 samples, "");
3727 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3728 ctx->ac.i32_1, "");
3729 result = samples;
3730 goto write_result;
3731 }
3732
3733 if (args.offset && instr->op != nir_texop_txf) {
3734 LLVMValueRef offset[3], pack;
3735 for (unsigned chan = 0; chan < 3; ++chan)
3736 offset[chan] = ctx->ac.i32_0;
3737
3738 unsigned num_components = ac_get_llvm_num_components(args.offset);
3739 for (unsigned chan = 0; chan < num_components; chan++) {
3740 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3741 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3742 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3743 if (chan)
3744 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3745 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3746 }
3747 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3748 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3749 args.offset = pack;
3750 }
3751
3752 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3753 * so the depth comparison value isn't clamped for Z16 and
3754 * Z24 anymore. Do it manually here.
3755 *
3756 * It's unnecessary if the original texture format was
3757 * Z32_FLOAT, but we don't know that here.
3758 */
3759 if (args.compare && ctx->ac.chip_class >= VI && ctx->abi->clamp_shadow_reference)
3760 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3761
3762 /* pack derivatives */
3763 if (ddx || ddy) {
3764 int num_src_deriv_channels, num_dest_deriv_channels;
3765 switch (instr->sampler_dim) {
3766 case GLSL_SAMPLER_DIM_3D:
3767 case GLSL_SAMPLER_DIM_CUBE:
3768 num_src_deriv_channels = 3;
3769 num_dest_deriv_channels = 3;
3770 break;
3771 case GLSL_SAMPLER_DIM_2D:
3772 default:
3773 num_src_deriv_channels = 2;
3774 num_dest_deriv_channels = 2;
3775 break;
3776 case GLSL_SAMPLER_DIM_1D:
3777 num_src_deriv_channels = 1;
3778 if (ctx->ac.chip_class >= GFX9) {
3779 num_dest_deriv_channels = 2;
3780 } else {
3781 num_dest_deriv_channels = 1;
3782 }
3783 break;
3784 }
3785
3786 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3787 args.derivs[i] = ac_to_float(&ctx->ac,
3788 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3789 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3790 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3791 }
3792 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3793 args.derivs[i] = ctx->ac.f32_0;
3794 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3795 }
3796 }
3797
3798 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3799 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3800 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3801 if (instr->coord_components == 3)
3802 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3803 ac_prepare_cube_coords(&ctx->ac,
3804 instr->op == nir_texop_txd, instr->is_array,
3805 instr->op == nir_texop_lod, args.coords, args.derivs);
3806 }
3807
3808 /* Texture coordinates fixups */
3809 if (instr->coord_components > 1 &&
3810 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3811 instr->is_array &&
3812 instr->op != nir_texop_txf) {
3813 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3814 }
3815
3816 if (instr->coord_components > 2 &&
3817 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3818 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3819 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3820 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3821 instr->is_array &&
3822 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3823 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3824 }
3825
3826 if (ctx->ac.chip_class >= GFX9 &&
3827 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3828 instr->op != nir_texop_lod) {
3829 LLVMValueRef filler;
3830 if (instr->op == nir_texop_txf)
3831 filler = ctx->ac.i32_0;
3832 else
3833 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3834
3835 if (instr->is_array)
3836 args.coords[2] = args.coords[1];
3837 args.coords[1] = filler;
3838 }
3839
3840 /* Pack sample index */
3841 if (instr->op == nir_texop_txf_ms && sample_index)
3842 args.coords[instr->coord_components] = sample_index;
3843
3844 if (instr->op == nir_texop_samples_identical) {
3845 struct ac_image_args txf_args = { 0 };
3846 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3847
3848 txf_args.dmask = 0xf;
3849 txf_args.resource = fmask_ptr;
3850 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3851 result = build_tex_intrinsic(ctx, instr, &txf_args);
3852
3853 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3854 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3855 goto write_result;
3856 }
3857
3858 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3859 instr->op != nir_texop_txs) {
3860 unsigned sample_chan = instr->is_array ? 3 : 2;
3861 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3862 &ctx->ac, args.coords[0], args.coords[1],
3863 instr->is_array ? args.coords[2] : NULL,
3864 args.coords[sample_chan], fmask_ptr);
3865 }
3866
3867 if (args.offset && instr->op == nir_texop_txf) {
3868 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3869 num_offsets = MIN2(num_offsets, instr->coord_components);
3870 for (unsigned i = 0; i < num_offsets; ++i) {
3871 args.coords[i] = LLVMBuildAdd(
3872 ctx->ac.builder, args.coords[i],
3873 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3874 }
3875 args.offset = NULL;
3876 }
3877
3878 /* TODO TG4 support */
3879 args.dmask = 0xf;
3880 if (instr->op == nir_texop_tg4) {
3881 if (instr->is_shadow)
3882 args.dmask = 1;
3883 else
3884 args.dmask = 1 << instr->component;
3885 }
3886
3887 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3888 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3889 result = build_tex_intrinsic(ctx, instr, &args);
3890
3891 if (instr->op == nir_texop_query_levels)
3892 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3893 else if (instr->is_shadow && instr->is_new_style_shadow &&
3894 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3895 instr->op != nir_texop_tg4)
3896 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3897 else if (instr->op == nir_texop_txs &&
3898 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3899 instr->is_array) {
3900 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3901 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3902 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3903 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3904 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3905 } else if (ctx->ac.chip_class >= GFX9 &&
3906 instr->op == nir_texop_txs &&
3907 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3908 instr->is_array) {
3909 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3910 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3911 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3912 ctx->ac.i32_1, "");
3913 } else if (instr->dest.ssa.num_components != 4)
3914 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3915
3916 write_result:
3917 if (result) {
3918 assert(instr->dest.is_ssa);
3919 result = ac_to_integer(&ctx->ac, result);
3920 ctx->ssa_defs[instr->dest.ssa.index] = result;
3921 }
3922 }
3923
3924
3925 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3926 {
3927 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3928 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3929
3930 ctx->ssa_defs[instr->dest.ssa.index] = result;
3931 _mesa_hash_table_insert(ctx->phis, instr, result);
3932 }
3933
3934 static void visit_post_phi(struct ac_nir_context *ctx,
3935 nir_phi_instr *instr,
3936 LLVMValueRef llvm_phi)
3937 {
3938 nir_foreach_phi_src(src, instr) {
3939 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3940 LLVMValueRef llvm_src = get_src(ctx, src->src);
3941
3942 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3943 }
3944 }
3945
3946 static void phi_post_pass(struct ac_nir_context *ctx)
3947 {
3948 hash_table_foreach(ctx->phis, entry) {
3949 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3950 (LLVMValueRef)entry->data);
3951 }
3952 }
3953
3954
3955 static void visit_ssa_undef(struct ac_nir_context *ctx,
3956 const nir_ssa_undef_instr *instr)
3957 {
3958 unsigned num_components = instr->def.num_components;
3959 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3960 LLVMValueRef undef;
3961
3962 if (num_components == 1)
3963 undef = LLVMGetUndef(type);
3964 else {
3965 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3966 }
3967 ctx->ssa_defs[instr->def.index] = undef;
3968 }
3969
3970 static void visit_jump(struct ac_llvm_context *ctx,
3971 const nir_jump_instr *instr)
3972 {
3973 switch (instr->type) {
3974 case nir_jump_break:
3975 ac_build_break(ctx);
3976 break;
3977 case nir_jump_continue:
3978 ac_build_continue(ctx);
3979 break;
3980 default:
3981 fprintf(stderr, "Unknown NIR jump instr: ");
3982 nir_print_instr(&instr->instr, stderr);
3983 fprintf(stderr, "\n");
3984 abort();
3985 }
3986 }
3987
3988 static LLVMTypeRef
3989 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
3990 enum glsl_base_type type)
3991 {
3992 switch (type) {
3993 case GLSL_TYPE_INT:
3994 case GLSL_TYPE_UINT:
3995 case GLSL_TYPE_BOOL:
3996 case GLSL_TYPE_SUBROUTINE:
3997 return ac->i32;
3998 case GLSL_TYPE_INT8:
3999 case GLSL_TYPE_UINT8:
4000 return ac->i8;
4001 case GLSL_TYPE_INT16:
4002 case GLSL_TYPE_UINT16:
4003 return ac->i16;
4004 case GLSL_TYPE_FLOAT:
4005 return ac->f32;
4006 case GLSL_TYPE_FLOAT16:
4007 return ac->f16;
4008 case GLSL_TYPE_INT64:
4009 case GLSL_TYPE_UINT64:
4010 return ac->i64;
4011 case GLSL_TYPE_DOUBLE:
4012 return ac->f64;
4013 default:
4014 unreachable("unknown GLSL type");
4015 }
4016 }
4017
4018 static LLVMTypeRef
4019 glsl_to_llvm_type(struct ac_llvm_context *ac,
4020 const struct glsl_type *type)
4021 {
4022 if (glsl_type_is_scalar(type)) {
4023 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4024 }
4025
4026 if (glsl_type_is_vector(type)) {
4027 return LLVMVectorType(
4028 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4029 glsl_get_vector_elements(type));
4030 }
4031
4032 if (glsl_type_is_matrix(type)) {
4033 return LLVMArrayType(
4034 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4035 glsl_get_matrix_columns(type));
4036 }
4037
4038 if (glsl_type_is_array(type)) {
4039 return LLVMArrayType(
4040 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4041 glsl_get_length(type));
4042 }
4043
4044 assert(glsl_type_is_struct_or_ifc(type));
4045
4046 LLVMTypeRef member_types[glsl_get_length(type)];
4047
4048 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4049 member_types[i] =
4050 glsl_to_llvm_type(ac,
4051 glsl_get_struct_field(type, i));
4052 }
4053
4054 return LLVMStructTypeInContext(ac->context, member_types,
4055 glsl_get_length(type), false);
4056 }
4057
4058 static void visit_deref(struct ac_nir_context *ctx,
4059 nir_deref_instr *instr)
4060 {
4061 if (instr->mode != nir_var_mem_shared &&
4062 instr->mode != nir_var_mem_global)
4063 return;
4064
4065 LLVMValueRef result = NULL;
4066 switch(instr->deref_type) {
4067 case nir_deref_type_var: {
4068 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4069 result = entry->data;
4070 break;
4071 }
4072 case nir_deref_type_struct:
4073 if (instr->mode == nir_var_mem_global) {
4074 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4075 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4076 instr->strct.index);
4077 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4078 LLVMConstInt(ctx->ac.i32, offset, 0));
4079 } else {
4080 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4081 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4082 }
4083 break;
4084 case nir_deref_type_array:
4085 if (instr->mode == nir_var_mem_global) {
4086 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4087 unsigned stride = glsl_get_explicit_stride(parent->type);
4088
4089 if ((glsl_type_is_matrix(parent->type) &&
4090 glsl_matrix_type_is_row_major(parent->type)) ||
4091 (glsl_type_is_vector(parent->type) && stride == 0))
4092 stride = type_scalar_size_bytes(parent->type);
4093
4094 assert(stride > 0);
4095 LLVMValueRef index = get_src(ctx, instr->arr.index);
4096 if (LLVMTypeOf(index) != ctx->ac.i64)
4097 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4098
4099 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4100
4101 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4102 } else {
4103 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4104 get_src(ctx, instr->arr.index));
4105 }
4106 break;
4107 case nir_deref_type_ptr_as_array:
4108 if (instr->mode == nir_var_mem_global) {
4109 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4110
4111 LLVMValueRef index = get_src(ctx, instr->arr.index);
4112 if (LLVMTypeOf(index) != ctx->ac.i64)
4113 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4114
4115 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4116
4117 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4118 } else {
4119 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4120 get_src(ctx, instr->arr.index));
4121 }
4122 break;
4123 case nir_deref_type_cast: {
4124 result = get_src(ctx, instr->parent);
4125
4126 /* We can't use the structs from LLVM because the shader
4127 * specifies its own offsets. */
4128 LLVMTypeRef pointee_type = ctx->ac.i8;
4129 if (instr->mode == nir_var_mem_shared)
4130 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4131
4132 unsigned address_space;
4133
4134 switch(instr->mode) {
4135 case nir_var_mem_shared:
4136 address_space = AC_ADDR_SPACE_LDS;
4137 break;
4138 case nir_var_mem_global:
4139 address_space = AC_ADDR_SPACE_GLOBAL;
4140 break;
4141 default:
4142 unreachable("Unhandled address space");
4143 }
4144
4145 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4146
4147 if (LLVMTypeOf(result) != type) {
4148 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4149 result = LLVMBuildBitCast(ctx->ac.builder, result,
4150 type, "");
4151 } else {
4152 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4153 type, "");
4154 }
4155 }
4156 break;
4157 }
4158 default:
4159 unreachable("Unhandled deref_instr deref type");
4160 }
4161
4162 ctx->ssa_defs[instr->dest.ssa.index] = result;
4163 }
4164
4165 static void visit_cf_list(struct ac_nir_context *ctx,
4166 struct exec_list *list);
4167
4168 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4169 {
4170 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4171 nir_foreach_instr(instr, block)
4172 {
4173 switch (instr->type) {
4174 case nir_instr_type_alu:
4175 visit_alu(ctx, nir_instr_as_alu(instr));
4176 break;
4177 case nir_instr_type_load_const:
4178 visit_load_const(ctx, nir_instr_as_load_const(instr));
4179 break;
4180 case nir_instr_type_intrinsic:
4181 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4182 break;
4183 case nir_instr_type_tex:
4184 visit_tex(ctx, nir_instr_as_tex(instr));
4185 break;
4186 case nir_instr_type_phi:
4187 visit_phi(ctx, nir_instr_as_phi(instr));
4188 break;
4189 case nir_instr_type_ssa_undef:
4190 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4191 break;
4192 case nir_instr_type_jump:
4193 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4194 break;
4195 case nir_instr_type_deref:
4196 visit_deref(ctx, nir_instr_as_deref(instr));
4197 break;
4198 default:
4199 fprintf(stderr, "Unknown NIR instr type: ");
4200 nir_print_instr(instr, stderr);
4201 fprintf(stderr, "\n");
4202 abort();
4203 }
4204 }
4205
4206 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4207 }
4208
4209 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4210 {
4211 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4212
4213 nir_block *then_block =
4214 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4215
4216 ac_build_uif(&ctx->ac, value, then_block->index);
4217
4218 visit_cf_list(ctx, &if_stmt->then_list);
4219
4220 if (!exec_list_is_empty(&if_stmt->else_list)) {
4221 nir_block *else_block =
4222 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4223
4224 ac_build_else(&ctx->ac, else_block->index);
4225 visit_cf_list(ctx, &if_stmt->else_list);
4226 }
4227
4228 ac_build_endif(&ctx->ac, then_block->index);
4229 }
4230
4231 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4232 {
4233 nir_block *first_loop_block =
4234 (nir_block *) exec_list_get_head(&loop->body);
4235
4236 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4237
4238 visit_cf_list(ctx, &loop->body);
4239
4240 ac_build_endloop(&ctx->ac, first_loop_block->index);
4241 }
4242
4243 static void visit_cf_list(struct ac_nir_context *ctx,
4244 struct exec_list *list)
4245 {
4246 foreach_list_typed(nir_cf_node, node, node, list)
4247 {
4248 switch (node->type) {
4249 case nir_cf_node_block:
4250 visit_block(ctx, nir_cf_node_as_block(node));
4251 break;
4252
4253 case nir_cf_node_if:
4254 visit_if(ctx, nir_cf_node_as_if(node));
4255 break;
4256
4257 case nir_cf_node_loop:
4258 visit_loop(ctx, nir_cf_node_as_loop(node));
4259 break;
4260
4261 default:
4262 assert(0);
4263 }
4264 }
4265 }
4266
4267 void
4268 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4269 struct ac_shader_abi *abi,
4270 struct nir_shader *nir,
4271 struct nir_variable *variable,
4272 gl_shader_stage stage)
4273 {
4274 unsigned output_loc = variable->data.driver_location / 4;
4275 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4276
4277 /* tess ctrl has it's own load/store paths for outputs */
4278 if (stage == MESA_SHADER_TESS_CTRL)
4279 return;
4280
4281 if (stage == MESA_SHADER_VERTEX ||
4282 stage == MESA_SHADER_TESS_EVAL ||
4283 stage == MESA_SHADER_GEOMETRY) {
4284 int idx = variable->data.location + variable->data.index;
4285 if (idx == VARYING_SLOT_CLIP_DIST0) {
4286 int length = nir->info.clip_distance_array_size +
4287 nir->info.cull_distance_array_size;
4288
4289 if (length > 4)
4290 attrib_count = 2;
4291 else
4292 attrib_count = 1;
4293 }
4294 }
4295
4296 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4297 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4298 for (unsigned i = 0; i < attrib_count; ++i) {
4299 for (unsigned chan = 0; chan < 4; chan++) {
4300 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4301 ac_build_alloca_undef(ctx, type, "");
4302 }
4303 }
4304 }
4305
4306 static void
4307 setup_locals(struct ac_nir_context *ctx,
4308 struct nir_function *func)
4309 {
4310 int i, j;
4311 ctx->num_locals = 0;
4312 nir_foreach_variable(variable, &func->impl->locals) {
4313 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4314 variable->data.driver_location = ctx->num_locals * 4;
4315 variable->data.location_frac = 0;
4316 ctx->num_locals += attrib_count;
4317 }
4318 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4319 if (!ctx->locals)
4320 return;
4321
4322 for (i = 0; i < ctx->num_locals; i++) {
4323 for (j = 0; j < 4; j++) {
4324 ctx->locals[i * 4 + j] =
4325 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4326 }
4327 }
4328 }
4329
4330 static void
4331 setup_shared(struct ac_nir_context *ctx,
4332 struct nir_shader *nir)
4333 {
4334 nir_foreach_variable(variable, &nir->shared) {
4335 LLVMValueRef shared =
4336 LLVMAddGlobalInAddressSpace(
4337 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4338 variable->name ? variable->name : "",
4339 AC_ADDR_SPACE_LDS);
4340 _mesa_hash_table_insert(ctx->vars, variable, shared);
4341 }
4342 }
4343
4344 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4345 struct nir_shader *nir)
4346 {
4347 struct ac_nir_context ctx = {};
4348 struct nir_function *func;
4349
4350 ctx.ac = *ac;
4351 ctx.abi = abi;
4352
4353 ctx.stage = nir->info.stage;
4354
4355 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4356
4357 nir_foreach_variable(variable, &nir->outputs)
4358 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4359 ctx.stage);
4360
4361 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4362 _mesa_key_pointer_equal);
4363 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4364 _mesa_key_pointer_equal);
4365 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4366 _mesa_key_pointer_equal);
4367
4368 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4369
4370 nir_index_ssa_defs(func->impl);
4371 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4372
4373 setup_locals(&ctx, func);
4374
4375 if (gl_shader_stage_is_compute(nir->info.stage))
4376 setup_shared(&ctx, nir);
4377
4378 visit_cf_list(&ctx, &func->impl->body);
4379 phi_post_pass(&ctx);
4380
4381 if (!gl_shader_stage_is_compute(nir->info.stage))
4382 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4383 ctx.abi->outputs);
4384
4385 free(ctx.locals);
4386 free(ctx.ssa_defs);
4387 ralloc_free(ctx.defs);
4388 ralloc_free(ctx.phis);
4389 ralloc_free(ctx.vars);
4390 }
4391
4392 void
4393 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4394 {
4395 /* While it would be nice not to have this flag, we are constrained
4396 * by the reality that LLVM 5.0 doesn't have working VGPR indexing
4397 * on GFX9.
4398 */
4399 bool llvm_has_working_vgpr_indexing = chip_class <= VI;
4400
4401 /* TODO: Indirect indexing of GS inputs is unimplemented.
4402 *
4403 * TCS and TES load inputs directly from LDS or offchip memory, so
4404 * indirect indexing is trivial.
4405 */
4406 nir_variable_mode indirect_mask = 0;
4407 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4408 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4409 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4410 !llvm_has_working_vgpr_indexing)) {
4411 indirect_mask |= nir_var_shader_in;
4412 }
4413 if (!llvm_has_working_vgpr_indexing &&
4414 nir->info.stage != MESA_SHADER_TESS_CTRL)
4415 indirect_mask |= nir_var_shader_out;
4416
4417 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4418 * smart enough to handle indirects without causing excess spilling
4419 * causing the gpu to hang.
4420 *
4421 * See the following thread for more details of the problem:
4422 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4423 */
4424 indirect_mask |= nir_var_function_temp;
4425
4426 nir_lower_indirect_derefs(nir, indirect_mask);
4427 }
4428
4429 static unsigned
4430 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4431 {
4432 if (intrin->intrinsic != nir_intrinsic_store_deref)
4433 return 0;
4434
4435 nir_variable *var =
4436 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4437
4438 if (var->data.mode != nir_var_shader_out)
4439 return 0;
4440
4441 unsigned writemask = 0;
4442 const int location = var->data.location;
4443 unsigned first_component = var->data.location_frac;
4444 unsigned num_comps = intrin->dest.ssa.num_components;
4445
4446 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4447 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4448 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4449 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4450
4451 return writemask;
4452 }
4453
4454 static void
4455 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4456 unsigned *cond_block_tf_writemask,
4457 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4458 {
4459 switch (cf_node->type) {
4460 case nir_cf_node_block: {
4461 nir_block *block = nir_cf_node_as_block(cf_node);
4462 nir_foreach_instr(instr, block) {
4463 if (instr->type != nir_instr_type_intrinsic)
4464 continue;
4465
4466 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4467 if (intrin->intrinsic == nir_intrinsic_barrier) {
4468
4469 /* If we find a barrier in nested control flow put this in the
4470 * too hard basket. In GLSL this is not possible but it is in
4471 * SPIR-V.
4472 */
4473 if (is_nested_cf) {
4474 *tessfactors_are_def_in_all_invocs = false;
4475 return;
4476 }
4477
4478 /* The following case must be prevented:
4479 * gl_TessLevelInner = ...;
4480 * barrier();
4481 * if (gl_InvocationID == 1)
4482 * gl_TessLevelInner = ...;
4483 *
4484 * If you consider disjoint code segments separated by barriers, each
4485 * such segment that writes tess factor channels should write the same
4486 * channels in all codepaths within that segment.
4487 */
4488 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4489 /* Accumulate the result: */
4490 *tessfactors_are_def_in_all_invocs &=
4491 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4492
4493 /* Analyze the next code segment from scratch. */
4494 *upper_block_tf_writemask = 0;
4495 *cond_block_tf_writemask = 0;
4496 }
4497 } else
4498 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4499 }
4500
4501 break;
4502 }
4503 case nir_cf_node_if: {
4504 unsigned then_tessfactor_writemask = 0;
4505 unsigned else_tessfactor_writemask = 0;
4506
4507 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4508 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4509 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4510 cond_block_tf_writemask,
4511 tessfactors_are_def_in_all_invocs, true);
4512 }
4513
4514 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4515 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4516 cond_block_tf_writemask,
4517 tessfactors_are_def_in_all_invocs, true);
4518 }
4519
4520 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4521 /* If both statements write the same tess factor channels,
4522 * we can say that the upper block writes them too.
4523 */
4524 *upper_block_tf_writemask |= then_tessfactor_writemask &
4525 else_tessfactor_writemask;
4526 *cond_block_tf_writemask |= then_tessfactor_writemask |
4527 else_tessfactor_writemask;
4528 }
4529
4530 break;
4531 }
4532 case nir_cf_node_loop: {
4533 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4534 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4535 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4536 cond_block_tf_writemask,
4537 tessfactors_are_def_in_all_invocs, true);
4538 }
4539
4540 break;
4541 }
4542 default:
4543 unreachable("unknown cf node type");
4544 }
4545 }
4546
4547 bool
4548 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4549 {
4550 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4551
4552 /* The pass works as follows:
4553 * If all codepaths write tess factors, we can say that all
4554 * invocations define tess factors.
4555 *
4556 * Each tess factor channel is tracked separately.
4557 */
4558 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4559 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4560
4561 /* Initial value = true. Here the pass will accumulate results from
4562 * multiple segments surrounded by barriers. If tess factors aren't
4563 * written at all, it's a shader bug and we don't care if this will be
4564 * true.
4565 */
4566 bool tessfactors_are_def_in_all_invocs = true;
4567
4568 nir_foreach_function(function, nir) {
4569 if (function->impl) {
4570 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4571 scan_tess_ctrl(node, &main_block_tf_writemask,
4572 &cond_block_tf_writemask,
4573 &tessfactors_are_def_in_all_invocs,
4574 false);
4575 }
4576 }
4577 }
4578
4579 /* Accumulate the result for the last code segment separated by a
4580 * barrier.
4581 */
4582 if (main_block_tf_writemask || cond_block_tf_writemask) {
4583 tessfactors_are_def_in_all_invocs &=
4584 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4585 }
4586
4587 return tessfactors_are_def_in_all_invocs;
4588 }