projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
radv: Implement nir_intrinsic_load_layer_id().
[mesa.git] / src / amd / common / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
28 #include "sid.h"
29 #include "nir/nir.h"
30 #include "nir/nir_deref.h"
31 #include "util/bitscan.h"
32 #include "util/u_math.h"
33 #include "ac_shader_abi.h"
34 #include "ac_shader_util.h"
35
36 struct ac_nir_context {
37 struct ac_llvm_context ac;
38 struct ac_shader_abi *abi;
39
40 gl_shader_stage stage;
41 shader_info *info;
42
43 LLVMValueRef *ssa_defs;
44
45 struct hash_table *defs;
46 struct hash_table *phis;
47 struct hash_table *vars;
48
49 LLVMValueRef main_function;
50 LLVMBasicBlockRef continue_block;
51 LLVMBasicBlockRef break_block;
52
53 int num_locals;
54 LLVMValueRef *locals;
55 };
56
57 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
58 nir_deref_instr *deref_instr,
59 enum ac_descriptor_type desc_type,
60 const nir_instr *instr,
61 bool image, bool write);
62
63 static void
64 build_store_values_extended(struct ac_llvm_context *ac,
65 LLVMValueRef *values,
66 unsigned value_count,
67 unsigned value_stride,
68 LLVMValueRef vec)
69 {
70 LLVMBuilderRef builder = ac->builder;
71 unsigned i;
72
73 for (i = 0; i < value_count; i++) {
74 LLVMValueRef ptr = values[i * value_stride];
75 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
76 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
77 LLVMBuildStore(builder, value, ptr);
78 }
79 }
80
81 static enum ac_image_dim
82 get_ac_sampler_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim dim,
83 bool is_array)
84 {
85 switch (dim) {
86 case GLSL_SAMPLER_DIM_1D:
87 if (ctx->chip_class >= GFX9)
88 return is_array ? ac_image_2darray : ac_image_2d;
89 return is_array ? ac_image_1darray : ac_image_1d;
90 case GLSL_SAMPLER_DIM_2D:
91 case GLSL_SAMPLER_DIM_RECT:
92 case GLSL_SAMPLER_DIM_EXTERNAL:
93 return is_array ? ac_image_2darray : ac_image_2d;
94 case GLSL_SAMPLER_DIM_3D:
95 return ac_image_3d;
96 case GLSL_SAMPLER_DIM_CUBE:
97 return ac_image_cube;
98 case GLSL_SAMPLER_DIM_MS:
99 return is_array ? ac_image_2darraymsaa : ac_image_2dmsaa;
100 case GLSL_SAMPLER_DIM_SUBPASS:
101 return ac_image_2darray;
102 case GLSL_SAMPLER_DIM_SUBPASS_MS:
103 return ac_image_2darraymsaa;
104 default:
105 unreachable("bad sampler dim");
106 }
107 }
108
109 static enum ac_image_dim
110 get_ac_image_dim(const struct ac_llvm_context *ctx, enum glsl_sampler_dim sdim,
111 bool is_array)
112 {
113 enum ac_image_dim dim = get_ac_sampler_dim(ctx, sdim, is_array);
114
115 if (dim == ac_image_cube ||
116 (ctx->chip_class <= GFX8 && dim == ac_image_3d))
117 dim = ac_image_2darray;
118
119 return dim;
120 }
121
122 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
123 const nir_ssa_def *def)
124 {
125 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
126 if (def->num_components > 1) {
127 type = LLVMVectorType(type, def->num_components);
128 }
129 return type;
130 }
131
132 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
133 {
134 assert(src.is_ssa);
135 return nir->ssa_defs[src.ssa->index];
136 }
137
138 static LLVMValueRef
139 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
140 {
141 LLVMValueRef ptr = get_src(ctx, src);
142 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
143 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
144
145 return LLVMBuildBitCast(ctx->ac.builder, ptr,
146 LLVMPointerType(ctx->ac.i32, addr_space), "");
147 }
148
149 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
150 const struct nir_block *b)
151 {
152 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
153 return (LLVMBasicBlockRef)entry->data;
154 }
155
156 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
157 nir_alu_src src,
158 unsigned num_components)
159 {
160 LLVMValueRef value = get_src(ctx, src.src);
161 bool need_swizzle = false;
162
163 assert(value);
164 unsigned src_components = ac_get_llvm_num_components(value);
165 for (unsigned i = 0; i < num_components; ++i) {
166 assert(src.swizzle[i] < src_components);
167 if (src.swizzle[i] != i)
168 need_swizzle = true;
169 }
170
171 if (need_swizzle || num_components != src_components) {
172 LLVMValueRef masks[] = {
173 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
174 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
175 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
176 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
177
178 if (src_components > 1 && num_components == 1) {
179 value = LLVMBuildExtractElement(ctx->ac.builder, value,
180 masks[0], "");
181 } else if (src_components == 1 && num_components > 1) {
182 LLVMValueRef values[] = {value, value, value, value};
183 value = ac_build_gather_values(&ctx->ac, values, num_components);
184 } else {
185 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
186 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
187 swizzle, "");
188 }
189 }
190 assert(!src.negate);
191 assert(!src.abs);
192 return value;
193 }
194
195 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
196 LLVMIntPredicate pred, LLVMValueRef src0,
197 LLVMValueRef src1)
198 {
199 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
200 return LLVMBuildSelect(ctx->builder, result,
201 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
202 ctx->i32_0, "");
203 }
204
205 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
206 LLVMRealPredicate pred, LLVMValueRef src0,
207 LLVMValueRef src1)
208 {
209 LLVMValueRef result;
210 src0 = ac_to_float(ctx, src0);
211 src1 = ac_to_float(ctx, src1);
212 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
213 return LLVMBuildSelect(ctx->builder, result,
214 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
215 ctx->i32_0, "");
216 }
217
218 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 };
227
228 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
229 ac_get_elem_bits(ctx, result_type));
230 assert(length < sizeof(name));
231 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
232 }
233
234 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
235 const char *intrin,
236 LLVMTypeRef result_type,
237 LLVMValueRef src0, LLVMValueRef src1)
238 {
239 char name[64];
240 LLVMValueRef params[] = {
241 ac_to_float(ctx, src0),
242 ac_to_float(ctx, src1),
243 };
244
245 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
246 ac_get_elem_bits(ctx, result_type));
247 assert(length < sizeof(name));
248 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
249 }
250
251 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
252 const char *intrin,
253 LLVMTypeRef result_type,
254 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
255 {
256 char name[64];
257 LLVMValueRef params[] = {
258 ac_to_float(ctx, src0),
259 ac_to_float(ctx, src1),
260 ac_to_float(ctx, src2),
261 };
262
263 MAYBE_UNUSED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
264 ac_get_elem_bits(ctx, result_type));
265 assert(length < sizeof(name));
266 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
267 }
268
269 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
270 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
271 {
272 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
273
274 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
275 ctx->i32_0, "");
276 return LLVMBuildSelect(ctx->builder, v,
277 ac_to_integer_or_pointer(ctx, src1),
278 ac_to_integer_or_pointer(ctx, src2), "");
279 }
280
281 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
282 LLVMValueRef src0)
283 {
284 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
285 }
286
287 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
288 const char *intrin,
289 LLVMValueRef src0, LLVMValueRef src1)
290 {
291 LLVMTypeRef ret_type;
292 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
293 LLVMValueRef res;
294 LLVMValueRef params[] = { src0, src1 };
295 ret_type = LLVMStructTypeInContext(ctx->context, types,
296 2, true);
297
298 res = ac_build_intrinsic(ctx, intrin, ret_type,
299 params, 2, AC_FUNC_ATTR_READNONE);
300
301 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
302 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
303 return res;
304 }
305
306 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
307 LLVMValueRef src0,
308 unsigned bitsize)
309 {
310 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
311 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
312 "");
313 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
314
315 switch (bitsize) {
316 case 16:
317 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
318 case 32:
319 return result;
320 case 64:
321 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
322 default:
323 unreachable("Unsupported bit size.");
324 }
325 }
326
327 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
328 LLVMValueRef src0)
329 {
330 src0 = ac_to_float(ctx, src0);
331 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
332 return LLVMBuildSExt(ctx->builder,
333 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
334 ctx->i32, "");
335 }
336
337 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
338 LLVMValueRef src0,
339 unsigned bitsize)
340 {
341 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
342
343 switch (bitsize) {
344 case 8:
345 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
346 case 16:
347 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
348 case 32:
349 return result;
350 case 64:
351 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
352 default:
353 unreachable("Unsupported bit size.");
354 }
355 }
356
357 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
358 LLVMValueRef src0)
359 {
360 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
361 return LLVMBuildSExt(ctx->builder,
362 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
363 ctx->i32, "");
364 }
365
366 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
367 LLVMValueRef src0)
368 {
369 LLVMValueRef result;
370 LLVMValueRef cond = NULL;
371
372 src0 = ac_to_float(ctx, src0);
373 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
374
375 if (ctx->chip_class >= GFX8) {
376 LLVMValueRef args[2];
377 /* Check if the result is a denormal - and flush to 0 if so. */
378 args[0] = result;
379 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
380 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
381 }
382
383 /* need to convert back up to f32 */
384 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
385
386 if (ctx->chip_class >= GFX8)
387 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
388 else {
389 /* for GFX6-GFX7 */
390 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
391 * so compare the result and flush to 0 if it's smaller.
392 */
393 LLVMValueRef temp, cond2;
394 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
395 cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT,
396 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
397 temp, "");
398 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
399 temp, ctx->f32_0, "");
400 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
401 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
402 }
403 return result;
404 }
405
406 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
407 LLVMValueRef src0, LLVMValueRef src1)
408 {
409 LLVMValueRef dst64, result;
410 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
411 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
412
413 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
414 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
415 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
416 return result;
417 }
418
419 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
420 LLVMValueRef src0, LLVMValueRef src1)
421 {
422 LLVMValueRef dst64, result;
423 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
424 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
425
426 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
427 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
428 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
429 return result;
430 }
431
432 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
433 LLVMValueRef bits, LLVMValueRef offset)
434 {
435 /* mask = ((1 << bits) - 1) << offset */
436 return LLVMBuildShl(ctx->builder,
437 LLVMBuildSub(ctx->builder,
438 LLVMBuildShl(ctx->builder,
439 ctx->i32_1,
440 bits, ""),
441 ctx->i32_1, ""),
442 offset, "");
443 }
444
445 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
446 LLVMValueRef mask, LLVMValueRef insert,
447 LLVMValueRef base)
448 {
449 /* Calculate:
450 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
451 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
452 */
453 return LLVMBuildXor(ctx->builder, base,
454 LLVMBuildAnd(ctx->builder, mask,
455 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
456 }
457
458 static LLVMValueRef emit_pack_half_2x16(struct ac_llvm_context *ctx,
459 LLVMValueRef src0)
460 {
461 LLVMValueRef comp[2];
462
463 src0 = ac_to_float(ctx, src0);
464 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
465 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
466
467 return LLVMBuildBitCast(ctx->builder, ac_build_cvt_pkrtz_f16(ctx, comp),
468 ctx->i32, "");
469 }
470
471 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
472 LLVMValueRef src0)
473 {
474 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
475 LLVMValueRef temps[2], val;
476 int i;
477
478 for (i = 0; i < 2; i++) {
479 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
480 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
481 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
482 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
483 }
484 return ac_build_gather_values(ctx, temps, 2);
485 }
486
487 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
488 nir_op op,
489 LLVMValueRef src0)
490 {
491 unsigned mask;
492 int idx;
493 LLVMValueRef result;
494
495 if (op == nir_op_fddx_fine)
496 mask = AC_TID_MASK_LEFT;
497 else if (op == nir_op_fddy_fine)
498 mask = AC_TID_MASK_TOP;
499 else
500 mask = AC_TID_MASK_TOP_LEFT;
501
502 /* for DDX we want to next X pixel, DDY next Y pixel. */
503 if (op == nir_op_fddx_fine ||
504 op == nir_op_fddx_coarse ||
505 op == nir_op_fddx)
506 idx = 1;
507 else
508 idx = 2;
509
510 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
511 return result;
512 }
513
514 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
515 {
516 LLVMValueRef src[4], result = NULL;
517 unsigned num_components = instr->dest.dest.ssa.num_components;
518 unsigned src_components;
519 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
520
521 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
522 switch (instr->op) {
523 case nir_op_vec2:
524 case nir_op_vec3:
525 case nir_op_vec4:
526 src_components = 1;
527 break;
528 case nir_op_pack_half_2x16:
529 src_components = 2;
530 break;
531 case nir_op_unpack_half_2x16:
532 src_components = 1;
533 break;
534 case nir_op_cube_face_coord:
535 case nir_op_cube_face_index:
536 src_components = 3;
537 break;
538 default:
539 src_components = num_components;
540 break;
541 }
542 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
543 src[i] = get_alu_src(ctx, instr->src[i], src_components);
544
545 switch (instr->op) {
546 case nir_op_mov:
547 result = src[0];
548 break;
549 case nir_op_fneg:
550 src[0] = ac_to_float(&ctx->ac, src[0]);
551 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
552 break;
553 case nir_op_ineg:
554 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
555 break;
556 case nir_op_inot:
557 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
558 break;
559 case nir_op_iadd:
560 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
561 break;
562 case nir_op_fadd:
563 src[0] = ac_to_float(&ctx->ac, src[0]);
564 src[1] = ac_to_float(&ctx->ac, src[1]);
565 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
566 break;
567 case nir_op_fsub:
568 src[0] = ac_to_float(&ctx->ac, src[0]);
569 src[1] = ac_to_float(&ctx->ac, src[1]);
570 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_isub:
573 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
574 break;
575 case nir_op_imul:
576 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
577 break;
578 case nir_op_imod:
579 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
580 break;
581 case nir_op_umod:
582 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_fmod:
585 src[0] = ac_to_float(&ctx->ac, src[0]);
586 src[1] = ac_to_float(&ctx->ac, src[1]);
587 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
588 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
589 ac_to_float_type(&ctx->ac, def_type), result);
590 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
591 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
592 break;
593 case nir_op_frem:
594 src[0] = ac_to_float(&ctx->ac, src[0]);
595 src[1] = ac_to_float(&ctx->ac, src[1]);
596 result = LLVMBuildFRem(ctx->ac.builder, src[0], src[1], "");
597 break;
598 case nir_op_irem:
599 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
600 break;
601 case nir_op_idiv:
602 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_udiv:
605 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_fmul:
608 src[0] = ac_to_float(&ctx->ac, src[0]);
609 src[1] = ac_to_float(&ctx->ac, src[1]);
610 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
611 break;
612 case nir_op_frcp:
613 src[0] = ac_to_float(&ctx->ac, src[0]);
614 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
615 break;
616 case nir_op_iand:
617 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ior:
620 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
621 break;
622 case nir_op_ixor:
623 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
624 break;
625 case nir_op_ishl:
626 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
627 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
628 LLVMTypeOf(src[0]), "");
629 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
633 break;
634 case nir_op_ishr:
635 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
636 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
637 LLVMTypeOf(src[0]), "");
638 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
639 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
640 LLVMTypeOf(src[0]), "");
641 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_ushr:
644 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
645 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
646 LLVMTypeOf(src[0]), "");
647 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
648 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
649 LLVMTypeOf(src[0]), "");
650 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
651 break;
652 case nir_op_ilt32:
653 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
654 break;
655 case nir_op_ine32:
656 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
657 break;
658 case nir_op_ieq32:
659 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
660 break;
661 case nir_op_ige32:
662 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
663 break;
664 case nir_op_ult32:
665 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
666 break;
667 case nir_op_uge32:
668 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
669 break;
670 case nir_op_feq32:
671 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
672 break;
673 case nir_op_fne32:
674 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
675 break;
676 case nir_op_flt32:
677 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
678 break;
679 case nir_op_fge32:
680 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
681 break;
682 case nir_op_fabs:
683 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
684 ac_to_float_type(&ctx->ac, def_type), src[0]);
685 break;
686 case nir_op_iabs:
687 result = emit_iabs(&ctx->ac, src[0]);
688 break;
689 case nir_op_imax:
690 result = ac_build_imax(&ctx->ac, src[0], src[1]);
691 break;
692 case nir_op_imin:
693 result = ac_build_imin(&ctx->ac, src[0], src[1]);
694 break;
695 case nir_op_umax:
696 result = ac_build_umax(&ctx->ac, src[0], src[1]);
697 break;
698 case nir_op_umin:
699 result = ac_build_umin(&ctx->ac, src[0], src[1]);
700 break;
701 case nir_op_isign:
702 result = ac_build_isign(&ctx->ac, src[0],
703 instr->dest.dest.ssa.bit_size);
704 break;
705 case nir_op_fsign:
706 src[0] = ac_to_float(&ctx->ac, src[0]);
707 result = ac_build_fsign(&ctx->ac, src[0],
708 instr->dest.dest.ssa.bit_size);
709 break;
710 case nir_op_ffloor:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_ftrunc:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
716 ac_to_float_type(&ctx->ac, def_type), src[0]);
717 break;
718 case nir_op_fceil:
719 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
720 ac_to_float_type(&ctx->ac, def_type), src[0]);
721 break;
722 case nir_op_fround_even:
723 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
724 ac_to_float_type(&ctx->ac, def_type),src[0]);
725 break;
726 case nir_op_ffract:
727 src[0] = ac_to_float(&ctx->ac, src[0]);
728 result = ac_build_fract(&ctx->ac, src[0],
729 instr->dest.dest.ssa.bit_size);
730 break;
731 case nir_op_fsin:
732 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
733 ac_to_float_type(&ctx->ac, def_type), src[0]);
734 break;
735 case nir_op_fcos:
736 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 break;
739 case nir_op_fsqrt:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_fexp2:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 break;
747 case nir_op_flog2:
748 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
749 ac_to_float_type(&ctx->ac, def_type), src[0]);
750 break;
751 case nir_op_frsq:
752 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
753 ac_to_float_type(&ctx->ac, def_type), src[0]);
754 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
755 break;
756 case nir_op_frexp_exp:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_frexp_exp(&ctx->ac, src[0],
759 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
760 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
761 result = LLVMBuildSExt(ctx->ac.builder, result,
762 ctx->ac.i32, "");
763 break;
764 case nir_op_frexp_sig:
765 src[0] = ac_to_float(&ctx->ac, src[0]);
766 result = ac_build_frexp_mant(&ctx->ac, src[0],
767 instr->dest.dest.ssa.bit_size);
768 break;
769 case nir_op_fpow:
770 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
771 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
772 break;
773 case nir_op_fmax:
774 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
775 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
776 if (ctx->ac.chip_class < GFX9 &&
777 instr->dest.dest.ssa.bit_size == 32) {
778 /* Only pre-GFX9 chips do not flush denorms. */
779 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
780 ac_to_float_type(&ctx->ac, def_type),
781 result);
782 }
783 break;
784 case nir_op_fmin:
785 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
786 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
787 if (ctx->ac.chip_class < GFX9 &&
788 instr->dest.dest.ssa.bit_size == 32) {
789 /* Only pre-GFX9 chips do not flush denorms. */
790 result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize",
791 ac_to_float_type(&ctx->ac, def_type),
792 result);
793 }
794 break;
795 case nir_op_ffma:
796 result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd",
797 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
798 break;
799 case nir_op_ldexp:
800 src[0] = ac_to_float(&ctx->ac, src[0]);
801 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
802 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
803 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
804 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
805 else
806 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
807 break;
808 case nir_op_bfm:
809 result = emit_bfm(&ctx->ac, src[0], src[1]);
810 break;
811 case nir_op_bitfield_select:
812 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
813 break;
814 case nir_op_ubfe:
815 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
816 break;
817 case nir_op_ibfe:
818 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
819 break;
820 case nir_op_bitfield_reverse:
821 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
822 break;
823 case nir_op_bit_count:
824 result = ac_build_bit_count(&ctx->ac, src[0]);
825 break;
826 case nir_op_vec2:
827 case nir_op_vec3:
828 case nir_op_vec4:
829 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
830 src[i] = ac_to_integer(&ctx->ac, src[i]);
831 result = ac_build_gather_values(&ctx->ac, src, num_components);
832 break;
833 case nir_op_f2i8:
834 case nir_op_f2i16:
835 case nir_op_f2i32:
836 case nir_op_f2i64:
837 src[0] = ac_to_float(&ctx->ac, src[0]);
838 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
839 break;
840 case nir_op_f2u8:
841 case nir_op_f2u16:
842 case nir_op_f2u32:
843 case nir_op_f2u64:
844 src[0] = ac_to_float(&ctx->ac, src[0]);
845 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
846 break;
847 case nir_op_i2f16:
848 case nir_op_i2f32:
849 case nir_op_i2f64:
850 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
851 break;
852 case nir_op_u2f16:
853 case nir_op_u2f32:
854 case nir_op_u2f64:
855 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
856 break;
857 case nir_op_f2f16_rtz:
858 src[0] = ac_to_float(&ctx->ac, src[0]);
859 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
860 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
861 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
862 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
863 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
864 break;
865 case nir_op_f2f16_rtne:
866 case nir_op_f2f16:
867 case nir_op_f2f32:
868 case nir_op_f2f64:
869 src[0] = ac_to_float(&ctx->ac, src[0]);
870 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
871 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
872 else
873 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
874 break;
875 case nir_op_u2u8:
876 case nir_op_u2u16:
877 case nir_op_u2u32:
878 case nir_op_u2u64:
879 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
880 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
881 else
882 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
883 break;
884 case nir_op_i2i8:
885 case nir_op_i2i16:
886 case nir_op_i2i32:
887 case nir_op_i2i64:
888 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
889 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
890 else
891 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
892 break;
893 case nir_op_b32csel:
894 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
895 break;
896 case nir_op_find_lsb:
897 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
898 break;
899 case nir_op_ufind_msb:
900 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
901 break;
902 case nir_op_ifind_msb:
903 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
904 break;
905 case nir_op_uadd_carry:
906 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
907 break;
908 case nir_op_usub_borrow:
909 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
910 break;
911 case nir_op_b2f16:
912 case nir_op_b2f32:
913 case nir_op_b2f64:
914 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
915 break;
916 case nir_op_f2b32:
917 result = emit_f2b(&ctx->ac, src[0]);
918 break;
919 case nir_op_b2i8:
920 case nir_op_b2i16:
921 case nir_op_b2i32:
922 case nir_op_b2i64:
923 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
924 break;
925 case nir_op_i2b32:
926 result = emit_i2b(&ctx->ac, src[0]);
927 break;
928 case nir_op_fquantize2f16:
929 result = emit_f2f16(&ctx->ac, src[0]);
930 break;
931 case nir_op_umul_high:
932 result = emit_umul_high(&ctx->ac, src[0], src[1]);
933 break;
934 case nir_op_imul_high:
935 result = emit_imul_high(&ctx->ac, src[0], src[1]);
936 break;
937 case nir_op_pack_half_2x16:
938 result = emit_pack_half_2x16(&ctx->ac, src[0]);
939 break;
940 case nir_op_unpack_half_2x16:
941 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
942 break;
943 case nir_op_fddx:
944 case nir_op_fddy:
945 case nir_op_fddx_fine:
946 case nir_op_fddy_fine:
947 case nir_op_fddx_coarse:
948 case nir_op_fddy_coarse:
949 result = emit_ddxy(ctx, instr->op, src[0]);
950 break;
951
952 case nir_op_unpack_64_2x32_split_x: {
953 assert(ac_get_llvm_num_components(src[0]) == 1);
954 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
955 ctx->ac.v2i32,
956 "");
957 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
958 ctx->ac.i32_0, "");
959 break;
960 }
961
962 case nir_op_unpack_64_2x32_split_y: {
963 assert(ac_get_llvm_num_components(src[0]) == 1);
964 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
965 ctx->ac.v2i32,
966 "");
967 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
968 ctx->ac.i32_1, "");
969 break;
970 }
971
972 case nir_op_pack_64_2x32_split: {
973 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
974 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
975 break;
976 }
977
978 case nir_op_pack_32_2x16_split: {
979 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
980 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
981 break;
982 }
983
984 case nir_op_unpack_32_2x16_split_x: {
985 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
986 ctx->ac.v2i16,
987 "");
988 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
989 ctx->ac.i32_0, "");
990 break;
991 }
992
993 case nir_op_unpack_32_2x16_split_y: {
994 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
995 ctx->ac.v2i16,
996 "");
997 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
998 ctx->ac.i32_1, "");
999 break;
1000 }
1001
1002 case nir_op_cube_face_coord: {
1003 src[0] = ac_to_float(&ctx->ac, src[0]);
1004 LLVMValueRef results[2];
1005 LLVMValueRef in[3];
1006 for (unsigned chan = 0; chan < 3; chan++)
1007 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1008 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1009 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1010 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1011 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1012 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1013 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1014 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1015 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1016 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1017 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1018 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1019 result = ac_build_gather_values(&ctx->ac, results, 2);
1020 break;
1021 }
1022
1023 case nir_op_cube_face_index: {
1024 src[0] = ac_to_float(&ctx->ac, src[0]);
1025 LLVMValueRef in[3];
1026 for (unsigned chan = 0; chan < 3; chan++)
1027 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1028 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1029 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1030 break;
1031 }
1032
1033 case nir_op_fmin3:
1034 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1035 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1036 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1037 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1038 break;
1039 case nir_op_umin3:
1040 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1041 result = ac_build_umin(&ctx->ac, result, src[2]);
1042 break;
1043 case nir_op_imin3:
1044 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1045 result = ac_build_imin(&ctx->ac, result, src[2]);
1046 break;
1047 case nir_op_fmax3:
1048 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1049 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1050 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1051 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1052 break;
1053 case nir_op_umax3:
1054 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1055 result = ac_build_umax(&ctx->ac, result, src[2]);
1056 break;
1057 case nir_op_imax3:
1058 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1059 result = ac_build_imax(&ctx->ac, result, src[2]);
1060 break;
1061 case nir_op_fmed3: {
1062 src[0] = ac_to_float(&ctx->ac, src[0]);
1063 src[1] = ac_to_float(&ctx->ac, src[1]);
1064 src[2] = ac_to_float(&ctx->ac, src[2]);
1065 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1066 instr->dest.dest.ssa.bit_size);
1067 break;
1068 }
1069 case nir_op_imed3: {
1070 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1071 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1072 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1073 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1074 break;
1075 }
1076 case nir_op_umed3: {
1077 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1078 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1079 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1080 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1081 break;
1082 }
1083
1084 default:
1085 fprintf(stderr, "Unknown NIR alu instr: ");
1086 nir_print_instr(&instr->instr, stderr);
1087 fprintf(stderr, "\n");
1088 abort();
1089 }
1090
1091 if (result) {
1092 assert(instr->dest.dest.is_ssa);
1093 result = ac_to_integer_or_pointer(&ctx->ac, result);
1094 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1095 }
1096 }
1097
1098 static void visit_load_const(struct ac_nir_context *ctx,
1099 const nir_load_const_instr *instr)
1100 {
1101 LLVMValueRef values[4], value = NULL;
1102 LLVMTypeRef element_type =
1103 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1104
1105 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1106 switch (instr->def.bit_size) {
1107 case 8:
1108 values[i] = LLVMConstInt(element_type,
1109 instr->value[i].u8, false);
1110 break;
1111 case 16:
1112 values[i] = LLVMConstInt(element_type,
1113 instr->value[i].u16, false);
1114 break;
1115 case 32:
1116 values[i] = LLVMConstInt(element_type,
1117 instr->value[i].u32, false);
1118 break;
1119 case 64:
1120 values[i] = LLVMConstInt(element_type,
1121 instr->value[i].u64, false);
1122 break;
1123 default:
1124 fprintf(stderr,
1125 "unsupported nir load_const bit_size: %d\n",
1126 instr->def.bit_size);
1127 abort();
1128 }
1129 }
1130 if (instr->def.num_components > 1) {
1131 value = LLVMConstVector(values, instr->def.num_components);
1132 } else
1133 value = values[0];
1134
1135 ctx->ssa_defs[instr->def.index] = value;
1136 }
1137
1138 static LLVMValueRef
1139 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1140 {
1141 LLVMValueRef size =
1142 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1143 LLVMConstInt(ctx->ac.i32, 2, false), "");
1144
1145 /* GFX8 only */
1146 if (ctx->ac.chip_class == GFX8 && in_elements) {
1147 /* On GFX8, the descriptor contains the size in bytes,
1148 * but TXQ must return the size in elements.
1149 * The stride is always non-zero for resources using TXQ.
1150 */
1151 LLVMValueRef stride =
1152 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1153 ctx->ac.i32_1, "");
1154 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1155 LLVMConstInt(ctx->ac.i32, 16, false), "");
1156 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1157 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1158
1159 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1160 }
1161 return size;
1162 }
1163
1164 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1165 nir_variable *var,
1166 struct ac_image_args *args,
1167 const nir_tex_instr *instr)
1168 {
1169 const struct glsl_type *type = glsl_without_array(var->type);
1170 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1171 LLVMValueRef half_texel[2];
1172 LLVMValueRef compare_cube_wa = NULL;
1173 LLVMValueRef result;
1174
1175 //TODO Rect
1176 {
1177 struct ac_image_args txq_args = { 0 };
1178
1179 txq_args.dim = get_ac_sampler_dim(ctx, instr->sampler_dim, instr->is_array);
1180 txq_args.opcode = ac_image_get_resinfo;
1181 txq_args.dmask = 0xf;
1182 txq_args.lod = ctx->i32_0;
1183 txq_args.resource = args->resource;
1184 txq_args.attributes = AC_FUNC_ATTR_READNONE;
1185 LLVMValueRef size = ac_build_image_opcode(ctx, &txq_args);
1186
1187 for (unsigned c = 0; c < 2; c++) {
1188 half_texel[c] = LLVMBuildExtractElement(ctx->builder, size,
1189 LLVMConstInt(ctx->i32, c, false), "");
1190 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1191 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1192 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1193 LLVMConstReal(ctx->f32, -0.5), "");
1194 }
1195 }
1196
1197 LLVMValueRef orig_coords[2] = { args->coords[0], args->coords[1] };
1198
1199 for (unsigned c = 0; c < 2; c++) {
1200 LLVMValueRef tmp;
1201 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1202 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1203 }
1204
1205 /*
1206 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1207 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1208 * workaround by sampling using a scaled type and converting.
1209 * This is taken from amdgpu-pro shaders.
1210 */
1211 /* NOTE this produces some ugly code compared to amdgpu-pro,
1212 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1213 * and then reads them back. -pro generates two selects,
1214 * one s_cmp for the descriptor rewriting
1215 * one v_cmp for the coordinate and result changes.
1216 */
1217 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1218 LLVMValueRef tmp, tmp2;
1219
1220 /* workaround 8/8/8/8 uint/sint cube gather bug */
1221 /* first detect it then change to a scaled read and f2i */
1222 tmp = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1223 tmp2 = tmp;
1224
1225 /* extract the DATA_FORMAT */
1226 tmp = ac_build_bfe(ctx, tmp, LLVMConstInt(ctx->i32, 20, false),
1227 LLVMConstInt(ctx->i32, 6, false), false);
1228
1229 /* is the DATA_FORMAT == 8_8_8_8 */
1230 compare_cube_wa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tmp, LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false), "");
1231
1232 if (stype == GLSL_TYPE_UINT)
1233 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1234 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0x8000000, false),
1235 LLVMConstInt(ctx->i32, 0x10000000, false), "");
1236 else
1237 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1238 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, LLVMConstInt(ctx->i32, 0xc000000, false),
1239 LLVMConstInt(ctx->i32, 0x14000000, false), "");
1240
1241 /* replace the NUM FORMAT in the descriptor */
1242 tmp2 = LLVMBuildAnd(ctx->builder, tmp2, LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false), "");
1243 tmp2 = LLVMBuildOr(ctx->builder, tmp2, tmp, "");
1244
1245 args->resource = LLVMBuildInsertElement(ctx->builder, args->resource, tmp2, ctx->i32_1, "");
1246
1247 /* don't modify the coordinates for this case */
1248 for (unsigned c = 0; c < 2; ++c)
1249 args->coords[c] = LLVMBuildSelect(
1250 ctx->builder, compare_cube_wa,
1251 orig_coords[c], args->coords[c], "");
1252 }
1253
1254 args->attributes = AC_FUNC_ATTR_READNONE;
1255 result = ac_build_image_opcode(ctx, args);
1256
1257 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1258 LLVMValueRef tmp, tmp2;
1259
1260 /* if the cube workaround is in place, f2i the result. */
1261 for (unsigned c = 0; c < 4; c++) {
1262 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1263 if (stype == GLSL_TYPE_UINT)
1264 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1265 else
1266 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1267 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1268 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1269 tmp = LLVMBuildSelect(ctx->builder, compare_cube_wa, tmp2, tmp, "");
1270 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1271 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1272 }
1273 }
1274 return result;
1275 }
1276
1277 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1278 {
1279 nir_deref_instr *texture_deref_instr = NULL;
1280
1281 for (unsigned i = 0; i < instr->num_srcs; i++) {
1282 switch (instr->src[i].src_type) {
1283 case nir_tex_src_texture_deref:
1284 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1285 break;
1286 default:
1287 break;
1288 }
1289 }
1290 return texture_deref_instr;
1291 }
1292
1293 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1294 const nir_tex_instr *instr,
1295 struct ac_image_args *args)
1296 {
1297 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1298 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1299
1300 if (ctx->abi->gfx9_stride_size_workaround) {
1301 return ac_build_buffer_load_format_gfx9_safe(&ctx->ac,
1302 args->resource,
1303 args->coords[0],
1304 ctx->ac.i32_0,
1305 util_last_bit(mask),
1306 0, true);
1307 } else {
1308 return ac_build_buffer_load_format(&ctx->ac,
1309 args->resource,
1310 args->coords[0],
1311 ctx->ac.i32_0,
1312 util_last_bit(mask),
1313 0, true);
1314 }
1315 }
1316
1317 args->opcode = ac_image_sample;
1318
1319 switch (instr->op) {
1320 case nir_texop_txf:
1321 case nir_texop_txf_ms:
1322 case nir_texop_samples_identical:
1323 args->opcode = args->level_zero ||
1324 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1325 ac_image_load : ac_image_load_mip;
1326 args->level_zero = false;
1327 break;
1328 case nir_texop_txs:
1329 case nir_texop_query_levels:
1330 args->opcode = ac_image_get_resinfo;
1331 if (!args->lod)
1332 args->lod = ctx->ac.i32_0;
1333 args->level_zero = false;
1334 break;
1335 case nir_texop_tex:
1336 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1337 assert(!args->lod);
1338 args->level_zero = true;
1339 }
1340 break;
1341 case nir_texop_tg4:
1342 args->opcode = ac_image_gather4;
1343 args->level_zero = true;
1344 break;
1345 case nir_texop_lod:
1346 args->opcode = ac_image_get_lod;
1347 break;
1348 default:
1349 break;
1350 }
1351
1352 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1353 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1354 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1355 const struct glsl_type *type = glsl_without_array(var->type);
1356 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1357 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1358 return lower_gather4_integer(&ctx->ac, var, args, instr);
1359 }
1360 }
1361
1362 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1363 if (instr->op == nir_texop_lod && ctx->ac.chip_class >= GFX9) {
1364 if ((args->dim == ac_image_2darray ||
1365 args->dim == ac_image_2d) && !args->coords[1]) {
1366 args->coords[1] = ctx->ac.i32_0;
1367 }
1368 }
1369
1370 args->attributes = AC_FUNC_ATTR_READNONE;
1371 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1372 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1373 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1374 /* Prevent texture instructions with implicit derivatives from being
1375 * sinked into branches. */
1376 switch (instr->op) {
1377 case nir_texop_tex:
1378 case nir_texop_txb:
1379 case nir_texop_lod:
1380 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1381 break;
1382 default:
1383 break;
1384 }
1385 }
1386
1387 return ac_build_image_opcode(&ctx->ac, args);
1388 }
1389
1390 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1391 nir_intrinsic_instr *instr)
1392 {
1393 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1394 LLVMValueRef index = get_src(ctx, instr->src[1]);
1395
1396 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1397 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1398 return result;
1399 }
1400
1401 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1402 nir_intrinsic_instr *instr)
1403 {
1404 LLVMValueRef ptr, addr;
1405 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1406 unsigned index = nir_intrinsic_base(instr);
1407
1408 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1409 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1410
1411 /* Load constant values from user SGPRS when possible, otherwise
1412 * fallback to the default path that loads directly from memory.
1413 */
1414 if (LLVMIsConstant(src0) &&
1415 instr->dest.ssa.bit_size == 32) {
1416 unsigned count = instr->dest.ssa.num_components;
1417 unsigned offset = index;
1418
1419 offset += LLVMConstIntGetZExtValue(src0);
1420 offset /= 4;
1421
1422 offset -= ctx->abi->base_inline_push_consts;
1423
1424 if (offset + count <= ctx->abi->num_inline_push_consts) {
1425 return ac_build_gather_values(&ctx->ac,
1426 ctx->abi->inline_push_consts + offset,
1427 count);
1428 }
1429 }
1430
1431 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->abi->push_constants, &addr, 1, "");
1432
1433 if (instr->dest.ssa.bit_size == 8) {
1434 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1435 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1436 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1437 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1438
1439 LLVMValueRef params[3];
1440 if (load_dwords > 1) {
1441 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1442 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1443 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1444 } else {
1445 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1446 params[0] = ctx->ac.i32_0;
1447 params[1] = res;
1448 }
1449 params[2] = addr;
1450 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1451
1452 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1453 if (instr->dest.ssa.num_components > 1)
1454 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1455 return res;
1456 } else if (instr->dest.ssa.bit_size == 16) {
1457 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1458 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1459 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1460 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1461 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1462 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1463 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1464 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1465 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1466 LLVMConstInt(ctx->ac.i32, 4, false)};
1467 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1468 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1469 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1470 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1471 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1472 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1473 }
1474
1475 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1476
1477 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1478 }
1479
1480 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1481 const nir_intrinsic_instr *instr)
1482 {
1483 LLVMValueRef index = get_src(ctx, instr->src[0]);
1484
1485 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1486 }
1487
1488 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1489 {
1490 uint32_t new_mask = 0;
1491 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1492 if (mask & (1u << i))
1493 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1494 return new_mask;
1495 }
1496
1497 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1498 unsigned start, unsigned count)
1499 {
1500 LLVMValueRef mask[] = {
1501 ctx->i32_0, ctx->i32_1,
1502 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1503
1504 unsigned src_elements = ac_get_llvm_num_components(src);
1505
1506 if (count == src_elements) {
1507 assert(start == 0);
1508 return src;
1509 } else if (count == 1) {
1510 assert(start < src_elements);
1511 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1512 } else {
1513 assert(start + count <= src_elements);
1514 assert(count <= 4);
1515 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1516 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1517 }
1518 }
1519
1520 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1521 enum gl_access_qualifier access,
1522 bool may_store_unaligned,
1523 bool writeonly_memory)
1524 {
1525 unsigned cache_policy = 0;
1526
1527 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1528 * store opcodes not aligned to a dword are affected. The only way to
1529 * get unaligned stores is through shader images.
1530 */
1531 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1532 /* If this is write-only, don't keep data in L1 to prevent
1533 * evicting L1 cache lines that may be needed by other
1534 * instructions.
1535 */
1536 writeonly_memory ||
1537 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1538 cache_policy |= ac_glc;
1539 }
1540
1541 return cache_policy;
1542 }
1543
1544 static void visit_store_ssbo(struct ac_nir_context *ctx,
1545 nir_intrinsic_instr *instr)
1546 {
1547 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1548 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1549 unsigned writemask = nir_intrinsic_write_mask(instr);
1550 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1551 bool writeonly_memory = access & ACCESS_NON_READABLE;
1552 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1553
1554 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1555 get_src(ctx, instr->src[1]), true);
1556 LLVMValueRef base_data = src_data;
1557 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1558 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1559
1560 while (writemask) {
1561 int start, count;
1562 LLVMValueRef data, offset;
1563 LLVMTypeRef data_type;
1564
1565 u_bit_scan_consecutive_range(&writemask, &start, &count);
1566
1567 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1568 * writes into a 2-element and a 1-element write. */
1569 if (count == 3 &&
1570 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1571 writemask |= 1 << (start + 2);
1572 count = 2;
1573 }
1574 int num_bytes = count * elem_size_bytes; /* count in bytes */
1575
1576 /* we can only store 4 DWords at the same time.
1577 * can only happen for 64 Bit vectors. */
1578 if (num_bytes > 16) {
1579 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1580 count = 2;
1581 num_bytes = 16;
1582 }
1583
1584 /* check alignment of 16 Bit stores */
1585 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1586 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1587 count = 1;
1588 num_bytes = 2;
1589 }
1590 data = extract_vector_range(&ctx->ac, base_data, start, count);
1591
1592 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1593 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1594
1595 if (num_bytes == 1) {
1596 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1597 offset, ctx->ac.i32_0,
1598 cache_policy);
1599 } else if (num_bytes == 2) {
1600 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1601 offset, ctx->ac.i32_0,
1602 cache_policy);
1603 } else {
1604 int num_channels = num_bytes / 4;
1605
1606 switch (num_bytes) {
1607 case 16: /* v4f32 */
1608 data_type = ctx->ac.v4f32;
1609 break;
1610 case 12: /* v3f32 */
1611 data_type = ctx->ac.v3f32;
1612 break;
1613 case 8: /* v2f32 */
1614 data_type = ctx->ac.v2f32;
1615 break;
1616 case 4: /* f32 */
1617 data_type = ctx->ac.f32;
1618 break;
1619 default:
1620 unreachable("Malformed vector store.");
1621 }
1622 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1623
1624 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1625 num_channels, offset,
1626 ctx->ac.i32_0, 0,
1627 cache_policy, false);
1628 }
1629 }
1630 }
1631
1632 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1633 const nir_intrinsic_instr *instr)
1634 {
1635 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1636 const char *op;
1637 char name[64], type[8];
1638 LLVMValueRef params[6];
1639 int arg_count = 0;
1640
1641 switch (instr->intrinsic) {
1642 case nir_intrinsic_ssbo_atomic_add:
1643 op = "add";
1644 break;
1645 case nir_intrinsic_ssbo_atomic_imin:
1646 op = "smin";
1647 break;
1648 case nir_intrinsic_ssbo_atomic_umin:
1649 op = "umin";
1650 break;
1651 case nir_intrinsic_ssbo_atomic_imax:
1652 op = "smax";
1653 break;
1654 case nir_intrinsic_ssbo_atomic_umax:
1655 op = "umax";
1656 break;
1657 case nir_intrinsic_ssbo_atomic_and:
1658 op = "and";
1659 break;
1660 case nir_intrinsic_ssbo_atomic_or:
1661 op = "or";
1662 break;
1663 case nir_intrinsic_ssbo_atomic_xor:
1664 op = "xor";
1665 break;
1666 case nir_intrinsic_ssbo_atomic_exchange:
1667 op = "swap";
1668 break;
1669 case nir_intrinsic_ssbo_atomic_comp_swap:
1670 op = "cmpswap";
1671 break;
1672 default:
1673 abort();
1674 }
1675
1676 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1677 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1678 }
1679 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1680 params[arg_count++] = ctx->abi->load_ssbo(ctx->abi,
1681 get_src(ctx, instr->src[0]),
1682 true);
1683
1684 if (HAVE_LLVM >= 0x900) {
1685 /* XXX: The new raw/struct atomic intrinsics are buggy with
1686 * LLVM 8, see r358579.
1687 */
1688 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1689 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1690 params[arg_count++] = ctx->ac.i32_0; /* slc */
1691
1692 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1693 snprintf(name, sizeof(name),
1694 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1695 } else {
1696 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1697 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1698 params[arg_count++] = ctx->ac.i1false; /* slc */
1699
1700 assert(return_type == ctx->ac.i32);
1701 snprintf(name, sizeof(name),
1702 "llvm.amdgcn.buffer.atomic.%s", op);
1703 }
1704
1705 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1706 arg_count, 0);
1707 }
1708
1709 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1710 const nir_intrinsic_instr *instr)
1711 {
1712 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1713 int num_components = instr->num_components;
1714 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1715 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1716
1717 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1718 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1719 get_src(ctx, instr->src[0]), false);
1720 LLVMValueRef vindex = ctx->ac.i32_0;
1721
1722 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1723 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1724
1725 LLVMValueRef results[4];
1726 for (int i = 0; i < num_components;) {
1727 int num_elems = num_components - i;
1728 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1729 num_elems = 1;
1730 if (num_elems * elem_size_bytes > 16)
1731 num_elems = 16 / elem_size_bytes;
1732 int load_bytes = num_elems * elem_size_bytes;
1733
1734 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1735
1736 LLVMValueRef ret;
1737
1738 if (load_bytes == 1) {
1739 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1740 rsrc,
1741 offset,
1742 ctx->ac.i32_0,
1743 immoffset,
1744 cache_policy);
1745 } else if (load_bytes == 2) {
1746 ret = ac_build_tbuffer_load_short(&ctx->ac,
1747 rsrc,
1748 offset,
1749 ctx->ac.i32_0,
1750 immoffset,
1751 cache_policy);
1752 } else {
1753 int num_channels = util_next_power_of_two(load_bytes) / 4;
1754 bool can_speculate = access & ACCESS_CAN_REORDER;
1755
1756 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1757 vindex, offset, immoffset, 0,
1758 cache_policy, can_speculate, false);
1759 }
1760
1761 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1762 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1763 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1764
1765 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1766 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1767
1768 for (unsigned j = 0; j < num_elems; j++) {
1769 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1770 }
1771 i += num_elems;
1772 }
1773
1774 return ac_build_gather_values(&ctx->ac, results, num_components);
1775 }
1776
1777 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1778 const nir_intrinsic_instr *instr)
1779 {
1780 LLVMValueRef ret;
1781 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1782 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1783 int num_components = instr->num_components;
1784
1785 if (ctx->abi->load_ubo)
1786 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1787
1788 if (instr->dest.ssa.bit_size == 64)
1789 num_components *= 2;
1790
1791 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1792 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1793 LLVMValueRef results[num_components];
1794 for (unsigned i = 0; i < num_components; ++i) {
1795 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1796 load_bytes * i, 0);
1797
1798 if (load_bytes == 1) {
1799 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1800 rsrc,
1801 offset,
1802 ctx->ac.i32_0,
1803 immoffset,
1804 0);
1805 } else {
1806 assert(load_bytes == 2);
1807 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1808 rsrc,
1809 offset,
1810 ctx->ac.i32_0,
1811 immoffset,
1812 0);
1813 }
1814 }
1815 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1816 } else {
1817 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1818 NULL, 0, 0, true, true);
1819
1820 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1821 }
1822
1823 return LLVMBuildBitCast(ctx->ac.builder, ret,
1824 get_def_type(ctx, &instr->dest.ssa), "");
1825 }
1826
1827 static void
1828 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1829 bool vs_in, unsigned *vertex_index_out,
1830 LLVMValueRef *vertex_index_ref,
1831 unsigned *const_out, LLVMValueRef *indir_out)
1832 {
1833 nir_variable *var = nir_deref_instr_get_variable(instr);
1834 nir_deref_path path;
1835 unsigned idx_lvl = 1;
1836
1837 nir_deref_path_init(&path, instr, NULL);
1838
1839 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1840 if (vertex_index_ref) {
1841 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1842 if (vertex_index_out)
1843 *vertex_index_out = 0;
1844 } else {
1845 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1846 }
1847 ++idx_lvl;
1848 }
1849
1850 uint32_t const_offset = 0;
1851 LLVMValueRef offset = NULL;
1852
1853 if (var->data.compact) {
1854 assert(instr->deref_type == nir_deref_type_array);
1855 const_offset = nir_src_as_uint(instr->arr.index);
1856 goto out;
1857 }
1858
1859 for (; path.path[idx_lvl]; ++idx_lvl) {
1860 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1861 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1862 unsigned index = path.path[idx_lvl]->strct.index;
1863
1864 for (unsigned i = 0; i < index; i++) {
1865 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1866 const_offset += glsl_count_attribute_slots(ft, vs_in);
1867 }
1868 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1869 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1870 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1871 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1872 if (offset)
1873 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1874 else
1875 offset = array_off;
1876 } else
1877 unreachable("Uhandled deref type in get_deref_instr_offset");
1878 }
1879
1880 out:
1881 nir_deref_path_finish(&path);
1882
1883 if (const_offset && offset)
1884 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1885 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1886 "");
1887
1888 *const_out = const_offset;
1889 *indir_out = offset;
1890 }
1891
1892 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1893 nir_intrinsic_instr *instr,
1894 bool load_inputs)
1895 {
1896 LLVMValueRef result;
1897 LLVMValueRef vertex_index = NULL;
1898 LLVMValueRef indir_index = NULL;
1899 unsigned const_index = 0;
1900
1901 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
1902
1903 unsigned location = var->data.location;
1904 unsigned driver_location = var->data.driver_location;
1905 const bool is_patch = var->data.patch;
1906 const bool is_compact = var->data.compact;
1907
1908 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
1909 false, NULL, is_patch ? NULL : &vertex_index,
1910 &const_index, &indir_index);
1911
1912 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
1913
1914 LLVMTypeRef src_component_type;
1915 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
1916 src_component_type = LLVMGetElementType(dest_type);
1917 else
1918 src_component_type = dest_type;
1919
1920 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
1921 vertex_index, indir_index,
1922 const_index, location, driver_location,
1923 var->data.location_frac,
1924 instr->num_components,
1925 is_patch, is_compact, load_inputs);
1926 if (instr->dest.ssa.bit_size == 16) {
1927 result = ac_to_integer(&ctx->ac, result);
1928 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
1929 }
1930 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
1931 }
1932
1933 static unsigned
1934 type_scalar_size_bytes(const struct glsl_type *type)
1935 {
1936 assert(glsl_type_is_vector_or_scalar(type) ||
1937 glsl_type_is_matrix(type));
1938 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
1939 }
1940
1941 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
1942 nir_intrinsic_instr *instr)
1943 {
1944 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1945 nir_variable *var = nir_deref_instr_get_variable(deref);
1946
1947 LLVMValueRef values[8];
1948 int idx = 0;
1949 int ve = instr->dest.ssa.num_components;
1950 unsigned comp = 0;
1951 LLVMValueRef indir_index;
1952 LLVMValueRef ret;
1953 unsigned const_index;
1954 unsigned stride = 4;
1955 int mode = deref->mode;
1956
1957 if (var) {
1958 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
1959 var->data.mode == nir_var_shader_in;
1960 idx = var->data.driver_location;
1961 comp = var->data.location_frac;
1962 mode = var->data.mode;
1963
1964 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
1965 &const_index, &indir_index);
1966
1967 if (var->data.compact) {
1968 stride = 1;
1969 const_index += comp;
1970 comp = 0;
1971 }
1972 }
1973
1974 if (instr->dest.ssa.bit_size == 64 &&
1975 (deref->mode == nir_var_shader_in ||
1976 deref->mode == nir_var_shader_out ||
1977 deref->mode == nir_var_function_temp))
1978 ve *= 2;
1979
1980 switch (mode) {
1981 case nir_var_shader_in:
1982 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
1983 ctx->stage == MESA_SHADER_TESS_EVAL) {
1984 return load_tess_varyings(ctx, instr, true);
1985 }
1986
1987 if (ctx->stage == MESA_SHADER_GEOMETRY) {
1988 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
1989 LLVMValueRef indir_index;
1990 unsigned const_index, vertex_index;
1991 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
1992 &const_index, &indir_index);
1993
1994 return ctx->abi->load_inputs(ctx->abi, var->data.location,
1995 var->data.driver_location,
1996 var->data.location_frac,
1997 instr->num_components, vertex_index, const_index, type);
1998 }
1999
2000 for (unsigned chan = comp; chan < ve + comp; chan++) {
2001 if (indir_index) {
2002 unsigned count = glsl_count_attribute_slots(
2003 var->type,
2004 ctx->stage == MESA_SHADER_VERTEX);
2005 count -= chan / 4;
2006 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2007 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2008 stride, false, true);
2009
2010 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2011 tmp_vec,
2012 indir_index, "");
2013 } else
2014 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2015 }
2016 break;
2017 case nir_var_function_temp:
2018 for (unsigned chan = 0; chan < ve; chan++) {
2019 if (indir_index) {
2020 unsigned count = glsl_count_attribute_slots(
2021 var->type, false);
2022 count -= chan / 4;
2023 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2024 &ctx->ac, ctx->locals + idx + chan, count,
2025 stride, true, true);
2026
2027 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2028 tmp_vec,
2029 indir_index, "");
2030 } else {
2031 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2032 }
2033 }
2034 break;
2035 case nir_var_mem_shared: {
2036 LLVMValueRef address = get_src(ctx, instr->src[0]);
2037 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2038 return LLVMBuildBitCast(ctx->ac.builder, val,
2039 get_def_type(ctx, &instr->dest.ssa),
2040 "");
2041 }
2042 case nir_var_shader_out:
2043 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2044 return load_tess_varyings(ctx, instr, false);
2045 }
2046
2047 for (unsigned chan = comp; chan < ve + comp; chan++) {
2048 if (indir_index) {
2049 unsigned count = glsl_count_attribute_slots(
2050 var->type, false);
2051 count -= chan / 4;
2052 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2053 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2054 stride, true, true);
2055
2056 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2057 tmp_vec,
2058 indir_index, "");
2059 } else {
2060 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2061 ctx->abi->outputs[idx + chan + const_index * stride],
2062 "");
2063 }
2064 }
2065 break;
2066 case nir_var_mem_global: {
2067 LLVMValueRef address = get_src(ctx, instr->src[0]);
2068 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2069 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2070 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2071
2072 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2073 if (stride != natural_stride) {
2074 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2075 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2076 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2077
2078 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2079 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2080 values[i] = LLVMBuildLoad(ctx->ac.builder,
2081 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2082 }
2083 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2084 } else {
2085 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2086 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2087 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2088 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2089 return val;
2090 }
2091 }
2092 default:
2093 unreachable("unhandle variable mode");
2094 }
2095 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2096 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2097 }
2098
2099 static void
2100 visit_store_var(struct ac_nir_context *ctx,
2101 nir_intrinsic_instr *instr)
2102 {
2103 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2104 nir_variable *var = nir_deref_instr_get_variable(deref);
2105
2106 LLVMValueRef temp_ptr, value;
2107 int idx = 0;
2108 unsigned comp = 0;
2109 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2110 int writemask = instr->const_index[0];
2111 LLVMValueRef indir_index;
2112 unsigned const_index;
2113
2114 if (var) {
2115 get_deref_offset(ctx, deref, false,
2116 NULL, NULL, &const_index, &indir_index);
2117 idx = var->data.driver_location;
2118 comp = var->data.location_frac;
2119
2120 if (var->data.compact) {
2121 const_index += comp;
2122 comp = 0;
2123 }
2124 }
2125
2126 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2127 (deref->mode == nir_var_shader_out ||
2128 deref->mode == nir_var_function_temp)) {
2129
2130 src = LLVMBuildBitCast(ctx->ac.builder, src,
2131 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2132 "");
2133
2134 writemask = widen_mask(writemask, 2);
2135 }
2136
2137 writemask = writemask << comp;
2138
2139 switch (deref->mode) {
2140 case nir_var_shader_out:
2141
2142 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2143 LLVMValueRef vertex_index = NULL;
2144 LLVMValueRef indir_index = NULL;
2145 unsigned const_index = 0;
2146 const bool is_patch = var->data.patch;
2147
2148 get_deref_offset(ctx, deref, false, NULL,
2149 is_patch ? NULL : &vertex_index,
2150 &const_index, &indir_index);
2151
2152 ctx->abi->store_tcs_outputs(ctx->abi, var,
2153 vertex_index, indir_index,
2154 const_index, src, writemask);
2155 return;
2156 }
2157
2158 for (unsigned chan = 0; chan < 8; chan++) {
2159 int stride = 4;
2160 if (!(writemask & (1 << chan)))
2161 continue;
2162
2163 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2164
2165 if (var->data.compact)
2166 stride = 1;
2167 if (indir_index) {
2168 unsigned count = glsl_count_attribute_slots(
2169 var->type, false);
2170 count -= chan / 4;
2171 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2172 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2173 stride, true, true);
2174
2175 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2176 value, indir_index, "");
2177 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2178 count, stride, tmp_vec);
2179
2180 } else {
2181 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2182
2183 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2184 }
2185 }
2186 break;
2187 case nir_var_function_temp:
2188 for (unsigned chan = 0; chan < 8; chan++) {
2189 if (!(writemask & (1 << chan)))
2190 continue;
2191
2192 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2193 if (indir_index) {
2194 unsigned count = glsl_count_attribute_slots(
2195 var->type, false);
2196 count -= chan / 4;
2197 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2198 &ctx->ac, ctx->locals + idx + chan, count,
2199 4, true, true);
2200
2201 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2202 value, indir_index, "");
2203 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2204 count, 4, tmp_vec);
2205 } else {
2206 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2207
2208 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2209 }
2210 }
2211 break;
2212
2213 case nir_var_mem_global:
2214 case nir_var_mem_shared: {
2215 int writemask = instr->const_index[0];
2216 LLVMValueRef address = get_src(ctx, instr->src[0]);
2217 LLVMValueRef val = get_src(ctx, instr->src[1]);
2218
2219 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2220 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2221 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2222
2223 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2224 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2225 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2226
2227 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2228 stride == natural_stride) {
2229 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2230 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2231 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2232
2233 val = LLVMBuildBitCast(ctx->ac.builder, val,
2234 LLVMGetElementType(LLVMTypeOf(address)), "");
2235 LLVMBuildStore(ctx->ac.builder, val, address);
2236 } else {
2237 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2238 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2239 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2240 for (unsigned chan = 0; chan < 4; chan++) {
2241 if (!(writemask & (1 << chan)))
2242 continue;
2243
2244 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2245
2246 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2247 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2248 chan);
2249 src = LLVMBuildBitCast(ctx->ac.builder, src,
2250 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2251 LLVMBuildStore(ctx->ac.builder, src, ptr);
2252 }
2253 }
2254 break;
2255 }
2256 default:
2257 abort();
2258 break;
2259 }
2260 }
2261
2262 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2263 {
2264 switch (dim) {
2265 case GLSL_SAMPLER_DIM_BUF:
2266 return 1;
2267 case GLSL_SAMPLER_DIM_1D:
2268 return array ? 2 : 1;
2269 case GLSL_SAMPLER_DIM_2D:
2270 return array ? 3 : 2;
2271 case GLSL_SAMPLER_DIM_MS:
2272 return array ? 4 : 3;
2273 case GLSL_SAMPLER_DIM_3D:
2274 case GLSL_SAMPLER_DIM_CUBE:
2275 return 3;
2276 case GLSL_SAMPLER_DIM_RECT:
2277 case GLSL_SAMPLER_DIM_SUBPASS:
2278 return 2;
2279 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2280 return 3;
2281 default:
2282 break;
2283 }
2284 return 0;
2285 }
2286
2287 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2288 LLVMValueRef coord_x, LLVMValueRef coord_y,
2289 LLVMValueRef coord_z,
2290 LLVMValueRef sample_index,
2291 LLVMValueRef fmask_desc_ptr)
2292 {
2293 unsigned sample_chan = coord_z ? 3 : 2;
2294 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2295 addr[sample_chan] = sample_index;
2296
2297 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2298 return addr[sample_chan];
2299 }
2300
2301 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2302 {
2303 assert(instr->src[0].is_ssa);
2304 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2305 }
2306
2307 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2308 const nir_intrinsic_instr *instr,
2309 enum ac_descriptor_type desc_type,
2310 bool write)
2311 {
2312 nir_deref_instr *deref_instr =
2313 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2314 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2315
2316 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2317 }
2318
2319 static void get_image_coords(struct ac_nir_context *ctx,
2320 const nir_intrinsic_instr *instr,
2321 struct ac_image_args *args,
2322 enum glsl_sampler_dim dim,
2323 bool is_array)
2324 {
2325 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2326 LLVMValueRef masks[] = {
2327 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2328 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2329 };
2330 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2331
2332 int count;
2333 bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2334 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2335 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2336 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2337 bool gfx9_1d = ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2338 count = image_type_to_components_count(dim, is_array);
2339
2340 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2341 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2342 LLVMValueRef fmask_load_address[3];
2343 int chan;
2344
2345 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2346 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2347 if (is_array)
2348 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2349 else
2350 fmask_load_address[2] = NULL;
2351 if (add_frag_pos) {
2352 for (chan = 0; chan < 2; ++chan)
2353 fmask_load_address[chan] =
2354 LLVMBuildAdd(ctx->ac.builder, fmask_load_address[chan],
2355 LLVMBuildFPToUI(ctx->ac.builder, ctx->abi->frag_pos[chan],
2356 ctx->ac.i32, ""), "");
2357 fmask_load_address[2] = ac_to_integer(&ctx->ac, ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2358 }
2359 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2360 fmask_load_address[0],
2361 fmask_load_address[1],
2362 fmask_load_address[2],
2363 sample_index,
2364 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2365 AC_DESC_FMASK, &instr->instr, false, false));
2366 }
2367 if (count == 1 && !gfx9_1d) {
2368 if (instr->src[1].ssa->num_components)
2369 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2370 else
2371 args->coords[0] = src0;
2372 } else {
2373 int chan;
2374 if (is_ms)
2375 count--;
2376 for (chan = 0; chan < count; ++chan) {
2377 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2378 }
2379 if (add_frag_pos) {
2380 for (chan = 0; chan < 2; ++chan) {
2381 args->coords[chan] = LLVMBuildAdd(
2382 ctx->ac.builder, args->coords[chan],
2383 LLVMBuildFPToUI(
2384 ctx->ac.builder, ctx->abi->frag_pos[chan],
2385 ctx->ac.i32, ""), "");
2386 }
2387 args->coords[2] = ac_to_integer(&ctx->ac,
2388 ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)]);
2389 count++;
2390 }
2391
2392 if (gfx9_1d) {
2393 if (is_array) {
2394 args->coords[2] = args->coords[1];
2395 args->coords[1] = ctx->ac.i32_0;
2396 } else
2397 args->coords[1] = ctx->ac.i32_0;
2398 count++;
2399 }
2400
2401 if (is_ms) {
2402 args->coords[count] = sample_index;
2403 count++;
2404 }
2405 }
2406 }
2407
2408 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2409 const nir_intrinsic_instr *instr,
2410 bool write, bool atomic)
2411 {
2412 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2413 if (ctx->abi->gfx9_stride_size_workaround ||
2414 (ctx->abi->gfx9_stride_size_workaround_for_atomic && atomic)) {
2415 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2416 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2417 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2418
2419 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2420 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2421 elem_count, stride, "");
2422
2423 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2424 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2425 }
2426 return rsrc;
2427 }
2428
2429 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2430 const nir_intrinsic_instr *instr,
2431 bool bindless)
2432 {
2433 LLVMValueRef res;
2434
2435 enum glsl_sampler_dim dim;
2436 enum gl_access_qualifier access;
2437 bool is_array;
2438 if (bindless) {
2439 dim = nir_intrinsic_image_dim(instr);
2440 access = nir_intrinsic_access(instr);
2441 is_array = nir_intrinsic_image_array(instr);
2442 } else {
2443 const nir_deref_instr *image_deref = get_image_deref(instr);
2444 const struct glsl_type *type = image_deref->type;
2445 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2446 dim = glsl_get_sampler_dim(type);
2447 access = var->data.image.access;
2448 is_array = glsl_sampler_type_is_array(type);
2449 }
2450
2451 struct ac_image_args args = {};
2452
2453 args.cache_policy = get_cache_policy(ctx, access, false, false);
2454
2455 if (dim == GLSL_SAMPLER_DIM_BUF) {
2456 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2457 unsigned num_channels = util_last_bit(mask);
2458 LLVMValueRef rsrc, vindex;
2459
2460 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2461 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2462 ctx->ac.i32_0, "");
2463
2464 bool can_speculate = access & ACCESS_CAN_REORDER;
2465 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2466 ctx->ac.i32_0, num_channels,
2467 args.cache_policy,
2468 can_speculate);
2469 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2470
2471 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2472 res = ac_to_integer(&ctx->ac, res);
2473 } else {
2474 args.opcode = ac_image_load;
2475 get_image_coords(ctx, instr, &args, dim, is_array);
2476 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2477 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2478 args.dmask = 15;
2479 args.attributes = AC_FUNC_ATTR_READONLY;
2480
2481 res = ac_build_image_opcode(&ctx->ac, &args);
2482 }
2483 return res;
2484 }
2485
2486 static void visit_image_store(struct ac_nir_context *ctx,
2487 nir_intrinsic_instr *instr,
2488 bool bindless)
2489 {
2490
2491
2492 enum glsl_sampler_dim dim;
2493 enum gl_access_qualifier access;
2494 bool is_array;
2495 if (bindless) {
2496 dim = nir_intrinsic_image_dim(instr);
2497 access = nir_intrinsic_access(instr);
2498 is_array = nir_intrinsic_image_array(instr);
2499 } else {
2500 const nir_deref_instr *image_deref = get_image_deref(instr);
2501 const struct glsl_type *type = image_deref->type;
2502 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2503 dim = glsl_get_sampler_dim(type);
2504 access = var->data.image.access;
2505 is_array = glsl_sampler_type_is_array(type);
2506 }
2507
2508 bool writeonly_memory = access & ACCESS_NON_READABLE;
2509 struct ac_image_args args = {};
2510
2511 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2512
2513 if (dim == GLSL_SAMPLER_DIM_BUF) {
2514 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2515 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2516 unsigned src_channels = ac_get_llvm_num_components(src);
2517 LLVMValueRef vindex;
2518
2519 if (src_channels == 3)
2520 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2521
2522 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2523 get_src(ctx, instr->src[1]),
2524 ctx->ac.i32_0, "");
2525
2526 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2527 ctx->ac.i32_0, src_channels,
2528 args.cache_policy);
2529 } else {
2530 args.opcode = ac_image_store;
2531 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2532 get_image_coords(ctx, instr, &args, dim, is_array);
2533 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2534 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2535 args.dmask = 15;
2536
2537 ac_build_image_opcode(&ctx->ac, &args);
2538 }
2539
2540 }
2541
2542 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2543 const nir_intrinsic_instr *instr,
2544 bool bindless)
2545 {
2546 LLVMValueRef params[7];
2547 int param_count = 0;
2548
2549 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2550 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2551 const char *atomic_name;
2552 char intrinsic_name[64];
2553 enum ac_atomic_op atomic_subop;
2554 MAYBE_UNUSED int length;
2555
2556 enum glsl_sampler_dim dim;
2557 bool is_unsigned = false;
2558 bool is_array;
2559 if (bindless) {
2560 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_min ||
2561 instr->intrinsic == nir_intrinsic_bindless_image_atomic_max) {
2562 const GLenum format = nir_intrinsic_format(instr);
2563 assert(format == GL_R32UI || format == GL_R32I);
2564 is_unsigned = format == GL_R32UI;
2565 }
2566 dim = nir_intrinsic_image_dim(instr);
2567 is_array = nir_intrinsic_image_array(instr);
2568 } else {
2569 const struct glsl_type *type = get_image_deref(instr)->type;
2570 is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT;
2571 dim = glsl_get_sampler_dim(type);
2572 is_array = glsl_sampler_type_is_array(type);
2573 }
2574
2575 switch (instr->intrinsic) {
2576 case nir_intrinsic_bindless_image_atomic_add:
2577 case nir_intrinsic_image_deref_atomic_add:
2578 atomic_name = "add";
2579 atomic_subop = ac_atomic_add;
2580 break;
2581 case nir_intrinsic_bindless_image_atomic_min:
2582 case nir_intrinsic_image_deref_atomic_min:
2583 atomic_name = is_unsigned ? "umin" : "smin";
2584 atomic_subop = is_unsigned ? ac_atomic_umin : ac_atomic_smin;
2585 break;
2586 case nir_intrinsic_bindless_image_atomic_max:
2587 case nir_intrinsic_image_deref_atomic_max:
2588 atomic_name = is_unsigned ? "umax" : "smax";
2589 atomic_subop = is_unsigned ? ac_atomic_umax : ac_atomic_smax;
2590 break;
2591 case nir_intrinsic_bindless_image_atomic_and:
2592 case nir_intrinsic_image_deref_atomic_and:
2593 atomic_name = "and";
2594 atomic_subop = ac_atomic_and;
2595 break;
2596 case nir_intrinsic_bindless_image_atomic_or:
2597 case nir_intrinsic_image_deref_atomic_or:
2598 atomic_name = "or";
2599 atomic_subop = ac_atomic_or;
2600 break;
2601 case nir_intrinsic_bindless_image_atomic_xor:
2602 case nir_intrinsic_image_deref_atomic_xor:
2603 atomic_name = "xor";
2604 atomic_subop = ac_atomic_xor;
2605 break;
2606 case nir_intrinsic_bindless_image_atomic_exchange:
2607 case nir_intrinsic_image_deref_atomic_exchange:
2608 atomic_name = "swap";
2609 atomic_subop = ac_atomic_swap;
2610 break;
2611 case nir_intrinsic_bindless_image_atomic_comp_swap:
2612 case nir_intrinsic_image_deref_atomic_comp_swap:
2613 atomic_name = "cmpswap";
2614 atomic_subop = 0; /* not used */
2615 break;
2616 default:
2617 abort();
2618 }
2619
2620 if (cmpswap)
2621 params[param_count++] = get_src(ctx, instr->src[4]);
2622 params[param_count++] = get_src(ctx, instr->src[3]);
2623
2624 if (dim == GLSL_SAMPLER_DIM_BUF) {
2625 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2626 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2627 ctx->ac.i32_0, ""); /* vindex */
2628 params[param_count++] = ctx->ac.i32_0; /* voffset */
2629 if (HAVE_LLVM >= 0x900) {
2630 /* XXX: The new raw/struct atomic intrinsics are buggy
2631 * with LLVM 8, see r358579.
2632 */
2633 params[param_count++] = ctx->ac.i32_0; /* soffset */
2634 params[param_count++] = ctx->ac.i32_0; /* slc */
2635
2636 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2637 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2638 } else {
2639 params[param_count++] = ctx->ac.i1false; /* slc */
2640
2641 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2642 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2643 }
2644
2645 assert(length < sizeof(intrinsic_name));
2646 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2647 params, param_count, 0);
2648 } else {
2649 struct ac_image_args args = {};
2650 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2651 args.atomic = atomic_subop;
2652 args.data[0] = params[0];
2653 if (cmpswap)
2654 args.data[1] = params[1];
2655 get_image_coords(ctx, instr, &args, dim, is_array);
2656 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2657 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2658
2659 return ac_build_image_opcode(&ctx->ac, &args);
2660 }
2661 }
2662
2663 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2664 const nir_intrinsic_instr *instr,
2665 bool bindless)
2666 {
2667 enum glsl_sampler_dim dim;
2668 bool is_array;
2669 if (bindless) {
2670 dim = nir_intrinsic_image_dim(instr);
2671 is_array = nir_intrinsic_image_array(instr);
2672 } else {
2673 const struct glsl_type *type = get_image_deref(instr)->type;
2674 dim = glsl_get_sampler_dim(type);
2675 is_array = glsl_sampler_type_is_array(type);
2676 }
2677
2678 struct ac_image_args args = { 0 };
2679 args.dim = get_ac_sampler_dim(&ctx->ac, dim, is_array);
2680 args.dmask = 0xf;
2681 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2682 args.opcode = ac_image_get_resinfo;
2683 args.lod = ctx->ac.i32_0;
2684 args.attributes = AC_FUNC_ATTR_READNONE;
2685
2686 return ac_build_image_opcode(&ctx->ac, &args);
2687 }
2688
2689 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2690 const nir_intrinsic_instr *instr,
2691 bool bindless)
2692 {
2693 LLVMValueRef res;
2694
2695 enum glsl_sampler_dim dim;
2696 bool is_array;
2697 if (bindless) {
2698 dim = nir_intrinsic_image_dim(instr);
2699 is_array = nir_intrinsic_image_array(instr);
2700 } else {
2701 const struct glsl_type *type = get_image_deref(instr)->type;
2702 dim = glsl_get_sampler_dim(type);
2703 is_array = glsl_sampler_type_is_array(type);
2704 }
2705
2706 if (dim == GLSL_SAMPLER_DIM_BUF)
2707 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2708
2709 struct ac_image_args args = { 0 };
2710
2711 args.dim = get_ac_image_dim(&ctx->ac, dim, is_array);
2712 args.dmask = 0xf;
2713 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2714 args.opcode = ac_image_get_resinfo;
2715 args.lod = ctx->ac.i32_0;
2716 args.attributes = AC_FUNC_ATTR_READNONE;
2717
2718 res = ac_build_image_opcode(&ctx->ac, &args);
2719
2720 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2721
2722 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2723 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2724 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2725 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2726 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2727 }
2728 if (ctx->ac.chip_class >= GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2729 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2730 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2731 ctx->ac.i32_1, "");
2732
2733 }
2734 return res;
2735 }
2736
2737 static void emit_membar(struct ac_llvm_context *ac,
2738 const nir_intrinsic_instr *instr)
2739 {
2740 unsigned wait_flags = 0;
2741
2742 switch (instr->intrinsic) {
2743 case nir_intrinsic_memory_barrier:
2744 case nir_intrinsic_group_memory_barrier:
2745 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2746 break;
2747 case nir_intrinsic_memory_barrier_atomic_counter:
2748 case nir_intrinsic_memory_barrier_buffer:
2749 case nir_intrinsic_memory_barrier_image:
2750 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2751 break;
2752 case nir_intrinsic_memory_barrier_shared:
2753 wait_flags = AC_WAIT_LGKM;
2754 break;
2755 default:
2756 break;
2757 }
2758
2759 ac_build_waitcnt(ac, wait_flags);
2760 }
2761
2762 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2763 {
2764 /* GFX6 only (thanks to a hw bug workaround):
2765 * The real barrier instruction isn’t needed, because an entire patch
2766 * always fits into a single wave.
2767 */
2768 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2769 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2770 return;
2771 }
2772 ac_build_s_barrier(ac);
2773 }
2774
2775 static void emit_discard(struct ac_nir_context *ctx,
2776 const nir_intrinsic_instr *instr)
2777 {
2778 LLVMValueRef cond;
2779
2780 if (instr->intrinsic == nir_intrinsic_discard_if) {
2781 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2782 get_src(ctx, instr->src[0]),
2783 ctx->ac.i32_0, "");
2784 } else {
2785 assert(instr->intrinsic == nir_intrinsic_discard);
2786 cond = ctx->ac.i1false;
2787 }
2788
2789 ctx->abi->emit_kill(ctx->abi, cond);
2790 }
2791
2792 static LLVMValueRef
2793 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2794 {
2795 LLVMValueRef result;
2796 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2797 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2798 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2799
2800 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2801 }
2802
2803 static LLVMValueRef
2804 visit_load_subgroup_id(struct ac_nir_context *ctx)
2805 {
2806 if (ctx->stage == MESA_SHADER_COMPUTE) {
2807 LLVMValueRef result;
2808 result = LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2809 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2810 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2811 } else {
2812 return LLVMConstInt(ctx->ac.i32, 0, false);
2813 }
2814 }
2815
2816 static LLVMValueRef
2817 visit_load_num_subgroups(struct ac_nir_context *ctx)
2818 {
2819 if (ctx->stage == MESA_SHADER_COMPUTE) {
2820 return LLVMBuildAnd(ctx->ac.builder, ctx->abi->tg_size,
2821 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2822 } else {
2823 return LLVMConstInt(ctx->ac.i32, 1, false);
2824 }
2825 }
2826
2827 static LLVMValueRef
2828 visit_first_invocation(struct ac_nir_context *ctx)
2829 {
2830 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2831
2832 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2833 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2834 LLVMValueRef result = ac_build_intrinsic(&ctx->ac,
2835 "llvm.cttz.i64",
2836 ctx->ac.i64, args, 2,
2837 AC_FUNC_ATTR_NOUNWIND |
2838 AC_FUNC_ATTR_READNONE);
2839
2840 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2841 }
2842
2843 static LLVMValueRef
2844 visit_load_shared(struct ac_nir_context *ctx,
2845 const nir_intrinsic_instr *instr)
2846 {
2847 LLVMValueRef values[4], derived_ptr, index, ret;
2848
2849 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2850
2851 for (int chan = 0; chan < instr->num_components; chan++) {
2852 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2853 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2854 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2855 }
2856
2857 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2858 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2859 }
2860
2861 static void
2862 visit_store_shared(struct ac_nir_context *ctx,
2863 const nir_intrinsic_instr *instr)
2864 {
2865 LLVMValueRef derived_ptr, data,index;
2866 LLVMBuilderRef builder = ctx->ac.builder;
2867
2868 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2869 LLVMValueRef src = get_src(ctx, instr->src[0]);
2870
2871 int writemask = nir_intrinsic_write_mask(instr);
2872 for (int chan = 0; chan < 4; chan++) {
2873 if (!(writemask & (1 << chan))) {
2874 continue;
2875 }
2876 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2877 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2878 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
2879 LLVMBuildStore(builder, data, derived_ptr);
2880 }
2881 }
2882
2883 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
2884 const nir_intrinsic_instr *instr,
2885 LLVMValueRef ptr, int src_idx)
2886 {
2887 LLVMValueRef result;
2888 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
2889
2890 const char *sync_scope = HAVE_LLVM >= 0x0900 ? "workgroup-one-as" : "workgroup";
2891
2892 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
2893 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
2894 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
2895 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
2896 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
2897 } else {
2898 LLVMAtomicRMWBinOp op;
2899 switch (instr->intrinsic) {
2900 case nir_intrinsic_shared_atomic_add:
2901 case nir_intrinsic_deref_atomic_add:
2902 op = LLVMAtomicRMWBinOpAdd;
2903 break;
2904 case nir_intrinsic_shared_atomic_umin:
2905 case nir_intrinsic_deref_atomic_umin:
2906 op = LLVMAtomicRMWBinOpUMin;
2907 break;
2908 case nir_intrinsic_shared_atomic_umax:
2909 case nir_intrinsic_deref_atomic_umax:
2910 op = LLVMAtomicRMWBinOpUMax;
2911 break;
2912 case nir_intrinsic_shared_atomic_imin:
2913 case nir_intrinsic_deref_atomic_imin:
2914 op = LLVMAtomicRMWBinOpMin;
2915 break;
2916 case nir_intrinsic_shared_atomic_imax:
2917 case nir_intrinsic_deref_atomic_imax:
2918 op = LLVMAtomicRMWBinOpMax;
2919 break;
2920 case nir_intrinsic_shared_atomic_and:
2921 case nir_intrinsic_deref_atomic_and:
2922 op = LLVMAtomicRMWBinOpAnd;
2923 break;
2924 case nir_intrinsic_shared_atomic_or:
2925 case nir_intrinsic_deref_atomic_or:
2926 op = LLVMAtomicRMWBinOpOr;
2927 break;
2928 case nir_intrinsic_shared_atomic_xor:
2929 case nir_intrinsic_deref_atomic_xor:
2930 op = LLVMAtomicRMWBinOpXor;
2931 break;
2932 case nir_intrinsic_shared_atomic_exchange:
2933 case nir_intrinsic_deref_atomic_exchange:
2934 op = LLVMAtomicRMWBinOpXchg;
2935 break;
2936 default:
2937 return NULL;
2938 }
2939
2940 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
2941 }
2942 return result;
2943 }
2944
2945 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
2946 {
2947 LLVMValueRef values[2];
2948 LLVMValueRef pos[2];
2949
2950 pos[0] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[0]);
2951 pos[1] = ac_to_float(&ctx->ac, ctx->abi->frag_pos[1]);
2952
2953 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
2954 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
2955 return ac_build_gather_values(&ctx->ac, values, 2);
2956 }
2957
2958 static LLVMValueRef visit_interp(struct ac_nir_context *ctx,
2959 const nir_intrinsic_instr *instr)
2960 {
2961 LLVMValueRef result[4];
2962 LLVMValueRef interp_param;
2963 unsigned location;
2964 unsigned chan;
2965 LLVMValueRef src_c0 = NULL;
2966 LLVMValueRef src_c1 = NULL;
2967 LLVMValueRef src0 = NULL;
2968
2969 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2970 nir_variable *var = nir_deref_instr_get_variable(deref_instr);
2971 int input_base = ctx->abi->fs_input_attr_indices[var->data.location - VARYING_SLOT_VAR0];
2972 switch (instr->intrinsic) {
2973 case nir_intrinsic_interp_deref_at_centroid:
2974 location = INTERP_CENTROID;
2975 break;
2976 case nir_intrinsic_interp_deref_at_sample:
2977 case nir_intrinsic_interp_deref_at_offset:
2978 location = INTERP_CENTER;
2979 src0 = get_src(ctx, instr->src[1]);
2980 break;
2981 default:
2982 break;
2983 }
2984
2985 if (instr->intrinsic == nir_intrinsic_interp_deref_at_offset) {
2986 src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_0, ""));
2987 src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, src0, ctx->ac.i32_1, ""));
2988 } else if (instr->intrinsic == nir_intrinsic_interp_deref_at_sample) {
2989 LLVMValueRef sample_position;
2990 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
2991
2992 /* fetch sample ID */
2993 sample_position = ctx->abi->load_sample_position(ctx->abi, src0);
2994
2995 src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_0, "");
2996 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
2997 src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_position, ctx->ac.i32_1, "");
2998 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
2999 }
3000 interp_param = ctx->abi->lookup_interp_param(ctx->abi, var->data.interpolation, location);
3001
3002 if (location == INTERP_CENTER) {
3003 LLVMValueRef ij_out[2];
3004 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3005
3006 /*
3007 * take the I then J parameters, and the DDX/Y for it, and
3008 * calculate the IJ inputs for the interpolator.
3009 * temp1 = ddx * offset/sample.x + I;
3010 * interp_param.I = ddy * offset/sample.y + temp1;
3011 * temp1 = ddx * offset/sample.x + J;
3012 * interp_param.J = ddy * offset/sample.y + temp1;
3013 */
3014 for (unsigned i = 0; i < 2; i++) {
3015 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3016 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3017 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3018 ddxy_out, ix_ll, "");
3019 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3020 ddxy_out, iy_ll, "");
3021 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3022 interp_param, ix_ll, "");
3023 LLVMValueRef temp1, temp2;
3024
3025 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3026 ctx->ac.f32, "");
3027
3028 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3029 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3030
3031 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3032 temp2, ctx->ac.i32, "");
3033 }
3034 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3035
3036 }
3037
3038 LLVMValueRef attrib_idx = ctx->ac.i32_0;
3039 while(deref_instr->deref_type != nir_deref_type_var) {
3040 if (deref_instr->deref_type == nir_deref_type_array) {
3041 unsigned array_size = glsl_count_attribute_slots(deref_instr->type, false);
3042
3043 LLVMValueRef offset;
3044 if (nir_src_is_const(deref_instr->arr.index)) {
3045 offset = LLVMConstInt(ctx->ac.i32, array_size * nir_src_as_uint(deref_instr->arr.index), false);
3046 } else {
3047 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3048
3049 offset = LLVMBuildMul(ctx->ac.builder, indirect,
3050 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3051 }
3052
3053 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3054 deref_instr = nir_src_as_deref(deref_instr->parent);
3055 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3056 LLVMValueRef offset;
3057 unsigned sidx = deref_instr->strct.index;
3058 deref_instr = nir_src_as_deref(deref_instr->parent);
3059 offset = LLVMConstInt(ctx->ac.i32, glsl_get_struct_location_offset(deref_instr->type, sidx), false);
3060 attrib_idx = LLVMBuildAdd(ctx->ac.builder, attrib_idx, offset, "");
3061 } else {
3062 unreachable("Unsupported deref type");
3063 }
3064
3065 }
3066
3067 unsigned attrib_size = glsl_count_attribute_slots(var->type, false);
3068 for (chan = 0; chan < 4; chan++) {
3069 LLVMValueRef gather = LLVMGetUndef(LLVMVectorType(ctx->ac.f32, attrib_size));
3070 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, chan, false);
3071
3072 for (unsigned idx = 0; idx < attrib_size; ++idx) {
3073 LLVMValueRef v, attr_number;
3074
3075 attr_number = LLVMConstInt(ctx->ac.i32, input_base + idx, false);
3076 if (interp_param) {
3077 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3078 interp_param, ctx->ac.v2f32, "");
3079 LLVMValueRef i = LLVMBuildExtractElement(
3080 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3081 LLVMValueRef j = LLVMBuildExtractElement(
3082 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3083
3084 v = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3085 ctx->abi->prim_mask, i, j);
3086 } else {
3087 v = ac_build_fs_interp_mov(&ctx->ac, LLVMConstInt(ctx->ac.i32, 2, false),
3088 llvm_chan, attr_number, ctx->abi->prim_mask);
3089 }
3090
3091 gather = LLVMBuildInsertElement(ctx->ac.builder, gather, v,
3092 LLVMConstInt(ctx->ac.i32, idx, false), "");
3093 }
3094
3095 result[chan] = LLVMBuildExtractElement(ctx->ac.builder, gather, attrib_idx, "");
3096
3097 }
3098 return ac_build_varying_gather_values(&ctx->ac, result, instr->num_components,
3099 var->data.location_frac);
3100 }
3101
3102 static void visit_intrinsic(struct ac_nir_context *ctx,
3103 nir_intrinsic_instr *instr)
3104 {
3105 LLVMValueRef result = NULL;
3106
3107 switch (instr->intrinsic) {
3108 case nir_intrinsic_ballot:
3109 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3110 break;
3111 case nir_intrinsic_read_invocation:
3112 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3113 get_src(ctx, instr->src[1]));
3114 break;
3115 case nir_intrinsic_read_first_invocation:
3116 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3117 break;
3118 case nir_intrinsic_load_subgroup_invocation:
3119 result = ac_get_thread_id(&ctx->ac);
3120 break;
3121 case nir_intrinsic_load_work_group_id: {
3122 LLVMValueRef values[3];
3123
3124 for (int i = 0; i < 3; i++) {
3125 values[i] = ctx->abi->workgroup_ids[i] ?
3126 ctx->abi->workgroup_ids[i] : ctx->ac.i32_0;
3127 }
3128
3129 result = ac_build_gather_values(&ctx->ac, values, 3);
3130 break;
3131 }
3132 case nir_intrinsic_load_base_vertex:
3133 case nir_intrinsic_load_first_vertex:
3134 result = ctx->abi->load_base_vertex(ctx->abi);
3135 break;
3136 case nir_intrinsic_load_local_group_size:
3137 result = ctx->abi->load_local_group_size(ctx->abi);
3138 break;
3139 case nir_intrinsic_load_vertex_id:
3140 result = LLVMBuildAdd(ctx->ac.builder, ctx->abi->vertex_id,
3141 ctx->abi->base_vertex, "");
3142 break;
3143 case nir_intrinsic_load_vertex_id_zero_base: {
3144 result = ctx->abi->vertex_id;
3145 break;
3146 }
3147 case nir_intrinsic_load_local_invocation_id: {
3148 result = ctx->abi->local_invocation_ids;
3149 break;
3150 }
3151 case nir_intrinsic_load_base_instance:
3152 result = ctx->abi->start_instance;
3153 break;
3154 case nir_intrinsic_load_draw_id:
3155 result = ctx->abi->draw_id;
3156 break;
3157 case nir_intrinsic_load_view_index:
3158 result = ctx->abi->view_index;
3159 break;
3160 case nir_intrinsic_load_invocation_id:
3161 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3162 result = ac_unpack_param(&ctx->ac, ctx->abi->tcs_rel_ids, 8, 5);
3163 } else {
3164 if (ctx->ac.chip_class >= GFX10) {
3165 result = LLVMBuildAnd(ctx->ac.builder,
3166 ctx->abi->gs_invocation_id,
3167 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3168 } else {
3169 result = ctx->abi->gs_invocation_id;
3170 }
3171 }
3172 break;
3173 case nir_intrinsic_load_primitive_id:
3174 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3175 result = ctx->abi->gs_prim_id;
3176 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3177 result = ctx->abi->tcs_patch_id;
3178 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3179 result = ctx->abi->tes_patch_id;
3180 } else
3181 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3182 break;
3183 case nir_intrinsic_load_sample_id:
3184 result = ac_unpack_param(&ctx->ac, ctx->abi->ancillary, 8, 4);
3185 break;
3186 case nir_intrinsic_load_sample_pos:
3187 result = load_sample_pos(ctx);
3188 break;
3189 case nir_intrinsic_load_sample_mask_in:
3190 result = ctx->abi->load_sample_mask_in(ctx->abi);
3191 break;
3192 case nir_intrinsic_load_frag_coord: {
3193 LLVMValueRef values[4] = {
3194 ctx->abi->frag_pos[0],
3195 ctx->abi->frag_pos[1],
3196 ctx->abi->frag_pos[2],
3197 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, ctx->abi->frag_pos[3])
3198 };
3199 result = ac_to_integer(&ctx->ac,
3200 ac_build_gather_values(&ctx->ac, values, 4));
3201 break;
3202 }
3203 case nir_intrinsic_load_layer_id:
3204 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3205 break;
3206 case nir_intrinsic_load_front_face:
3207 result = ctx->abi->front_face;
3208 break;
3209 case nir_intrinsic_load_helper_invocation:
3210 result = ac_build_load_helper_invocation(&ctx->ac);
3211 break;
3212 case nir_intrinsic_load_instance_id:
3213 result = ctx->abi->instance_id;
3214 break;
3215 case nir_intrinsic_load_num_work_groups:
3216 result = ctx->abi->num_work_groups;
3217 break;
3218 case nir_intrinsic_load_local_invocation_index:
3219 result = visit_load_local_invocation_index(ctx);
3220 break;
3221 case nir_intrinsic_load_subgroup_id:
3222 result = visit_load_subgroup_id(ctx);
3223 break;
3224 case nir_intrinsic_load_num_subgroups:
3225 result = visit_load_num_subgroups(ctx);
3226 break;
3227 case nir_intrinsic_first_invocation:
3228 result = visit_first_invocation(ctx);
3229 break;
3230 case nir_intrinsic_load_push_constant:
3231 result = visit_load_push_constant(ctx, instr);
3232 break;
3233 case nir_intrinsic_vulkan_resource_index: {
3234 LLVMValueRef index = get_src(ctx, instr->src[0]);
3235 unsigned desc_set = nir_intrinsic_desc_set(instr);
3236 unsigned binding = nir_intrinsic_binding(instr);
3237
3238 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3239 binding);
3240 break;
3241 }
3242 case nir_intrinsic_vulkan_resource_reindex:
3243 result = visit_vulkan_resource_reindex(ctx, instr);
3244 break;
3245 case nir_intrinsic_store_ssbo:
3246 visit_store_ssbo(ctx, instr);
3247 break;
3248 case nir_intrinsic_load_ssbo:
3249 result = visit_load_buffer(ctx, instr);
3250 break;
3251 case nir_intrinsic_ssbo_atomic_add:
3252 case nir_intrinsic_ssbo_atomic_imin:
3253 case nir_intrinsic_ssbo_atomic_umin:
3254 case nir_intrinsic_ssbo_atomic_imax:
3255 case nir_intrinsic_ssbo_atomic_umax:
3256 case nir_intrinsic_ssbo_atomic_and:
3257 case nir_intrinsic_ssbo_atomic_or:
3258 case nir_intrinsic_ssbo_atomic_xor:
3259 case nir_intrinsic_ssbo_atomic_exchange:
3260 case nir_intrinsic_ssbo_atomic_comp_swap:
3261 result = visit_atomic_ssbo(ctx, instr);
3262 break;
3263 case nir_intrinsic_load_ubo:
3264 result = visit_load_ubo_buffer(ctx, instr);
3265 break;
3266 case nir_intrinsic_get_buffer_size:
3267 result = visit_get_buffer_size(ctx, instr);
3268 break;
3269 case nir_intrinsic_load_deref:
3270 result = visit_load_var(ctx, instr);
3271 break;
3272 case nir_intrinsic_store_deref:
3273 visit_store_var(ctx, instr);
3274 break;
3275 case nir_intrinsic_load_shared:
3276 result = visit_load_shared(ctx, instr);
3277 break;
3278 case nir_intrinsic_store_shared:
3279 visit_store_shared(ctx, instr);
3280 break;
3281 case nir_intrinsic_bindless_image_samples:
3282 result = visit_image_samples(ctx, instr, true);
3283 break;
3284 case nir_intrinsic_image_deref_samples:
3285 result = visit_image_samples(ctx, instr, false);
3286 break;
3287 case nir_intrinsic_bindless_image_load:
3288 result = visit_image_load(ctx, instr, true);
3289 break;
3290 case nir_intrinsic_image_deref_load:
3291 result = visit_image_load(ctx, instr, false);
3292 break;
3293 case nir_intrinsic_bindless_image_store:
3294 visit_image_store(ctx, instr, true);
3295 break;
3296 case nir_intrinsic_image_deref_store:
3297 visit_image_store(ctx, instr, false);
3298 break;
3299 case nir_intrinsic_bindless_image_atomic_add:
3300 case nir_intrinsic_bindless_image_atomic_min:
3301 case nir_intrinsic_bindless_image_atomic_max:
3302 case nir_intrinsic_bindless_image_atomic_and:
3303 case nir_intrinsic_bindless_image_atomic_or:
3304 case nir_intrinsic_bindless_image_atomic_xor:
3305 case nir_intrinsic_bindless_image_atomic_exchange:
3306 case nir_intrinsic_bindless_image_atomic_comp_swap:
3307 result = visit_image_atomic(ctx, instr, true);
3308 break;
3309 case nir_intrinsic_image_deref_atomic_add:
3310 case nir_intrinsic_image_deref_atomic_min:
3311 case nir_intrinsic_image_deref_atomic_max:
3312 case nir_intrinsic_image_deref_atomic_and:
3313 case nir_intrinsic_image_deref_atomic_or:
3314 case nir_intrinsic_image_deref_atomic_xor:
3315 case nir_intrinsic_image_deref_atomic_exchange:
3316 case nir_intrinsic_image_deref_atomic_comp_swap:
3317 result = visit_image_atomic(ctx, instr, false);
3318 break;
3319 case nir_intrinsic_bindless_image_size:
3320 result = visit_image_size(ctx, instr, true);
3321 break;
3322 case nir_intrinsic_image_deref_size:
3323 result = visit_image_size(ctx, instr, false);
3324 break;
3325 case nir_intrinsic_shader_clock:
3326 result = ac_build_shader_clock(&ctx->ac);
3327 break;
3328 case nir_intrinsic_discard:
3329 case nir_intrinsic_discard_if:
3330 emit_discard(ctx, instr);
3331 break;
3332 case nir_intrinsic_memory_barrier:
3333 case nir_intrinsic_group_memory_barrier:
3334 case nir_intrinsic_memory_barrier_atomic_counter:
3335 case nir_intrinsic_memory_barrier_buffer:
3336 case nir_intrinsic_memory_barrier_image:
3337 case nir_intrinsic_memory_barrier_shared:
3338 emit_membar(&ctx->ac, instr);
3339 break;
3340 case nir_intrinsic_barrier:
3341 ac_emit_barrier(&ctx->ac, ctx->stage);
3342 break;
3343 case nir_intrinsic_shared_atomic_add:
3344 case nir_intrinsic_shared_atomic_imin:
3345 case nir_intrinsic_shared_atomic_umin:
3346 case nir_intrinsic_shared_atomic_imax:
3347 case nir_intrinsic_shared_atomic_umax:
3348 case nir_intrinsic_shared_atomic_and:
3349 case nir_intrinsic_shared_atomic_or:
3350 case nir_intrinsic_shared_atomic_xor:
3351 case nir_intrinsic_shared_atomic_exchange:
3352 case nir_intrinsic_shared_atomic_comp_swap: {
3353 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3354 result = visit_var_atomic(ctx, instr, ptr, 1);
3355 break;
3356 }
3357 case nir_intrinsic_deref_atomic_add:
3358 case nir_intrinsic_deref_atomic_imin:
3359 case nir_intrinsic_deref_atomic_umin:
3360 case nir_intrinsic_deref_atomic_imax:
3361 case nir_intrinsic_deref_atomic_umax:
3362 case nir_intrinsic_deref_atomic_and:
3363 case nir_intrinsic_deref_atomic_or:
3364 case nir_intrinsic_deref_atomic_xor:
3365 case nir_intrinsic_deref_atomic_exchange:
3366 case nir_intrinsic_deref_atomic_comp_swap: {
3367 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3368 result = visit_var_atomic(ctx, instr, ptr, 1);
3369 break;
3370 }
3371 case nir_intrinsic_interp_deref_at_centroid:
3372 case nir_intrinsic_interp_deref_at_sample:
3373 case nir_intrinsic_interp_deref_at_offset:
3374 result = visit_interp(ctx, instr);
3375 break;
3376 case nir_intrinsic_emit_vertex:
3377 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3378 break;
3379 case nir_intrinsic_end_primitive:
3380 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3381 break;
3382 case nir_intrinsic_load_tess_coord:
3383 result = ctx->abi->load_tess_coord(ctx->abi);
3384 break;
3385 case nir_intrinsic_load_tess_level_outer:
3386 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER);
3387 break;
3388 case nir_intrinsic_load_tess_level_inner:
3389 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER);
3390 break;
3391 case nir_intrinsic_load_patch_vertices_in:
3392 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3393 break;
3394 case nir_intrinsic_vote_all: {
3395 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3396 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3397 break;
3398 }
3399 case nir_intrinsic_vote_any: {
3400 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3401 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3402 break;
3403 }
3404 case nir_intrinsic_shuffle:
3405 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3406 get_src(ctx, instr->src[1]));
3407 break;
3408 case nir_intrinsic_reduce:
3409 result = ac_build_reduce(&ctx->ac,
3410 get_src(ctx, instr->src[0]),
3411 instr->const_index[0],
3412 instr->const_index[1]);
3413 break;
3414 case nir_intrinsic_inclusive_scan:
3415 result = ac_build_inclusive_scan(&ctx->ac,
3416 get_src(ctx, instr->src[0]),
3417 instr->const_index[0]);
3418 break;
3419 case nir_intrinsic_exclusive_scan:
3420 result = ac_build_exclusive_scan(&ctx->ac,
3421 get_src(ctx, instr->src[0]),
3422 instr->const_index[0]);
3423 break;
3424 case nir_intrinsic_quad_broadcast: {
3425 unsigned lane = nir_src_as_uint(instr->src[1]);
3426 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3427 lane, lane, lane, lane);
3428 break;
3429 }
3430 case nir_intrinsic_quad_swap_horizontal:
3431 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3432 break;
3433 case nir_intrinsic_quad_swap_vertical:
3434 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3435 break;
3436 case nir_intrinsic_quad_swap_diagonal:
3437 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3438 break;
3439 case nir_intrinsic_quad_swizzle_amd: {
3440 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3441 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3442 mask & 0x3, (mask >> 2) & 0x3,
3443 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3444 break;
3445 }
3446 case nir_intrinsic_masked_swizzle_amd: {
3447 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3448 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3449 break;
3450 }
3451 case nir_intrinsic_write_invocation_amd:
3452 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3453 get_src(ctx, instr->src[1]),
3454 get_src(ctx, instr->src[2]));
3455 break;
3456 case nir_intrinsic_mbcnt_amd:
3457 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3458 break;
3459 default:
3460 fprintf(stderr, "Unknown intrinsic: ");
3461 nir_print_instr(&instr->instr, stderr);
3462 fprintf(stderr, "\n");
3463 break;
3464 }
3465 if (result) {
3466 ctx->ssa_defs[instr->dest.ssa.index] = result;
3467 }
3468 }
3469
3470 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3471 unsigned base_index,
3472 unsigned constant_index,
3473 LLVMValueRef dynamic_index)
3474 {
3475 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3476 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3477 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3478
3479 /* Bindless uniforms are 64bit so multiple index by 8 */
3480 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3481 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3482
3483 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3484
3485 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3486 NULL, 0, 0, true, true);
3487
3488 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3489 }
3490
3491 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3492 nir_deref_instr *deref_instr,
3493 enum ac_descriptor_type desc_type,
3494 const nir_instr *instr,
3495 bool image, bool write)
3496 {
3497 LLVMValueRef index = NULL;
3498 unsigned constant_index = 0;
3499 unsigned descriptor_set;
3500 unsigned base_index;
3501 bool bindless = false;
3502
3503 if (!deref_instr) {
3504 descriptor_set = 0;
3505 if (image) {
3506 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3507 base_index = 0;
3508 bindless = true;
3509 index = get_src(ctx, img_instr->src[0]);
3510 } else {
3511 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3512 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3513 nir_tex_src_sampler_handle);
3514 if (sampSrcIdx != -1) {
3515 base_index = 0;
3516 bindless = true;
3517 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3518 } else {
3519 assert(tex_instr && !image);
3520 base_index = tex_instr->sampler_index;
3521 }
3522 }
3523 } else {
3524 while(deref_instr->deref_type != nir_deref_type_var) {
3525 if (deref_instr->deref_type == nir_deref_type_array) {
3526 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3527 if (!array_size)
3528 array_size = 1;
3529
3530 if (nir_src_is_const(deref_instr->arr.index)) {
3531 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3532 } else {
3533 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3534
3535 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3536 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3537
3538 if (!index)
3539 index = indirect;
3540 else
3541 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3542 }
3543
3544 deref_instr = nir_src_as_deref(deref_instr->parent);
3545 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3546 unsigned sidx = deref_instr->strct.index;
3547 deref_instr = nir_src_as_deref(deref_instr->parent);
3548 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3549 } else {
3550 unreachable("Unsupported deref type");
3551 }
3552 }
3553 descriptor_set = deref_instr->var->data.descriptor_set;
3554
3555 if (deref_instr->var->data.bindless) {
3556 /* For now just assert on unhandled variable types */
3557 assert(deref_instr->var->data.mode == nir_var_uniform);
3558
3559 base_index = deref_instr->var->data.driver_location;
3560 bindless = true;
3561
3562 index = index ? index : ctx->ac.i32_0;
3563 index = get_bindless_index_from_uniform(ctx, base_index,
3564 constant_index, index);
3565 } else
3566 base_index = deref_instr->var->data.binding;
3567 }
3568
3569 return ctx->abi->load_sampler_desc(ctx->abi,
3570 descriptor_set,
3571 base_index,
3572 constant_index, index,
3573 desc_type, image, write, bindless);
3574 }
3575
3576 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3577 *
3578 * GFX6-GFX7:
3579 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3580 * filtering manually. The driver sets img7 to a mask clearing
3581 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3582 * s_and_b32 samp0, samp0, img7
3583 *
3584 * GFX8:
3585 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3586 */
3587 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3588 LLVMValueRef res, LLVMValueRef samp)
3589 {
3590 LLVMBuilderRef builder = ctx->ac.builder;
3591 LLVMValueRef img7, samp0;
3592
3593 if (ctx->ac.chip_class >= GFX8)
3594 return samp;
3595
3596 img7 = LLVMBuildExtractElement(builder, res,
3597 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3598 samp0 = LLVMBuildExtractElement(builder, samp,
3599 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3600 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3601 return LLVMBuildInsertElement(builder, samp, samp0,
3602 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3603 }
3604
3605 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3606 nir_tex_instr *instr,
3607 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3608 LLVMValueRef *fmask_ptr)
3609 {
3610 nir_deref_instr *texture_deref_instr = NULL;
3611 nir_deref_instr *sampler_deref_instr = NULL;
3612 int plane = -1;
3613
3614 for (unsigned i = 0; i < instr->num_srcs; i++) {
3615 switch (instr->src[i].src_type) {
3616 case nir_tex_src_texture_deref:
3617 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3618 break;
3619 case nir_tex_src_sampler_deref:
3620 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3621 break;
3622 case nir_tex_src_plane:
3623 plane = nir_src_as_int(instr->src[i].src);
3624 break;
3625 default:
3626 break;
3627 }
3628 }
3629
3630 if (!sampler_deref_instr)
3631 sampler_deref_instr = texture_deref_instr;
3632
3633 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3634
3635 if (plane >= 0) {
3636 assert(instr->op != nir_texop_txf_ms &&
3637 instr->op != nir_texop_samples_identical);
3638 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3639
3640 main_descriptor = AC_DESC_PLANE_0 + plane;
3641 }
3642
3643 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3644
3645 if (samp_ptr) {
3646 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3647 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3648 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3649 }
3650 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3651 instr->op == nir_texop_samples_identical))
3652 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3653 }
3654
3655 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3656 LLVMValueRef coord)
3657 {
3658 coord = ac_to_float(ctx, coord);
3659 coord = ac_build_round(ctx, coord);
3660 coord = ac_to_integer(ctx, coord);
3661 return coord;
3662 }
3663
3664 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3665 {
3666 LLVMValueRef result = NULL;
3667 struct ac_image_args args = { 0 };
3668 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3669 LLVMValueRef ddx = NULL, ddy = NULL;
3670 unsigned offset_src = 0;
3671
3672 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3673
3674 for (unsigned i = 0; i < instr->num_srcs; i++) {
3675 switch (instr->src[i].src_type) {
3676 case nir_tex_src_coord: {
3677 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3678 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3679 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3680 break;
3681 }
3682 case nir_tex_src_projector:
3683 break;
3684 case nir_tex_src_comparator:
3685 if (instr->is_shadow)
3686 args.compare = get_src(ctx, instr->src[i].src);
3687 break;
3688 case nir_tex_src_offset:
3689 args.offset = get_src(ctx, instr->src[i].src);
3690 offset_src = i;
3691 break;
3692 case nir_tex_src_bias:
3693 if (instr->op == nir_texop_txb)
3694 args.bias = get_src(ctx, instr->src[i].src);
3695 break;
3696 case nir_tex_src_lod: {
3697 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3698 args.level_zero = true;
3699 else
3700 args.lod = get_src(ctx, instr->src[i].src);
3701 break;
3702 }
3703 case nir_tex_src_ms_index:
3704 sample_index = get_src(ctx, instr->src[i].src);
3705 break;
3706 case nir_tex_src_ms_mcs:
3707 break;
3708 case nir_tex_src_ddx:
3709 ddx = get_src(ctx, instr->src[i].src);
3710 break;
3711 case nir_tex_src_ddy:
3712 ddy = get_src(ctx, instr->src[i].src);
3713 break;
3714 case nir_tex_src_texture_offset:
3715 case nir_tex_src_sampler_offset:
3716 case nir_tex_src_plane:
3717 default:
3718 break;
3719 }
3720 }
3721
3722 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
3723 result = get_buffer_size(ctx, args.resource, true);
3724 goto write_result;
3725 }
3726
3727 if (instr->op == nir_texop_texture_samples) {
3728 LLVMValueRef res, samples, is_msaa;
3729 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
3730 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
3731 LLVMConstInt(ctx->ac.i32, 3, false), "");
3732 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
3733 LLVMConstInt(ctx->ac.i32, 28, false), "");
3734 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
3735 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3736 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
3737 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
3738
3739 samples = LLVMBuildLShr(ctx->ac.builder, samples,
3740 LLVMConstInt(ctx->ac.i32, 16, false), "");
3741 samples = LLVMBuildAnd(ctx->ac.builder, samples,
3742 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
3743 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
3744 samples, "");
3745 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
3746 ctx->ac.i32_1, "");
3747 result = samples;
3748 goto write_result;
3749 }
3750
3751 if (args.offset && instr->op != nir_texop_txf) {
3752 LLVMValueRef offset[3], pack;
3753 for (unsigned chan = 0; chan < 3; ++chan)
3754 offset[chan] = ctx->ac.i32_0;
3755
3756 unsigned num_components = ac_get_llvm_num_components(args.offset);
3757 for (unsigned chan = 0; chan < num_components; chan++) {
3758 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
3759 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
3760 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3761 if (chan)
3762 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
3763 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
3764 }
3765 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
3766 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
3767 args.offset = pack;
3768 }
3769
3770 /* TC-compatible HTILE on radeonsi promotes Z16 and Z24 to Z32_FLOAT,
3771 * so the depth comparison value isn't clamped for Z16 and
3772 * Z24 anymore. Do it manually here.
3773 *
3774 * It's unnecessary if the original texture format was
3775 * Z32_FLOAT, but we don't know that here.
3776 */
3777 if (args.compare && ctx->ac.chip_class >= GFX8 && ctx->abi->clamp_shadow_reference)
3778 args.compare = ac_build_clamp(&ctx->ac, ac_to_float(&ctx->ac, args.compare));
3779
3780 /* pack derivatives */
3781 if (ddx || ddy) {
3782 int num_src_deriv_channels, num_dest_deriv_channels;
3783 switch (instr->sampler_dim) {
3784 case GLSL_SAMPLER_DIM_3D:
3785 case GLSL_SAMPLER_DIM_CUBE:
3786 num_src_deriv_channels = 3;
3787 num_dest_deriv_channels = 3;
3788 break;
3789 case GLSL_SAMPLER_DIM_2D:
3790 default:
3791 num_src_deriv_channels = 2;
3792 num_dest_deriv_channels = 2;
3793 break;
3794 case GLSL_SAMPLER_DIM_1D:
3795 num_src_deriv_channels = 1;
3796 if (ctx->ac.chip_class >= GFX9) {
3797 num_dest_deriv_channels = 2;
3798 } else {
3799 num_dest_deriv_channels = 1;
3800 }
3801 break;
3802 }
3803
3804 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
3805 args.derivs[i] = ac_to_float(&ctx->ac,
3806 ac_llvm_extract_elem(&ctx->ac, ddx, i));
3807 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
3808 ac_llvm_extract_elem(&ctx->ac, ddy, i));
3809 }
3810 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
3811 args.derivs[i] = ctx->ac.f32_0;
3812 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
3813 }
3814 }
3815
3816 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
3817 for (unsigned chan = 0; chan < instr->coord_components; chan++)
3818 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
3819 if (instr->coord_components == 3)
3820 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
3821 ac_prepare_cube_coords(&ctx->ac,
3822 instr->op == nir_texop_txd, instr->is_array,
3823 instr->op == nir_texop_lod, args.coords, args.derivs);
3824 }
3825
3826 /* Texture coordinates fixups */
3827 if (instr->coord_components > 1 &&
3828 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3829 instr->is_array &&
3830 instr->op != nir_texop_txf) {
3831 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
3832 }
3833
3834 if (instr->coord_components > 2 &&
3835 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
3836 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
3837 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
3838 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
3839 instr->is_array &&
3840 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
3841 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
3842 }
3843
3844 if (ctx->ac.chip_class >= GFX9 &&
3845 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3846 instr->op != nir_texop_lod) {
3847 LLVMValueRef filler;
3848 if (instr->op == nir_texop_txf)
3849 filler = ctx->ac.i32_0;
3850 else
3851 filler = LLVMConstReal(ctx->ac.f32, 0.5);
3852
3853 if (instr->is_array)
3854 args.coords[2] = args.coords[1];
3855 args.coords[1] = filler;
3856 }
3857
3858 /* Pack sample index */
3859 if (instr->op == nir_texop_txf_ms && sample_index)
3860 args.coords[instr->coord_components] = sample_index;
3861
3862 if (instr->op == nir_texop_samples_identical) {
3863 struct ac_image_args txf_args = { 0 };
3864 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
3865
3866 txf_args.dmask = 0xf;
3867 txf_args.resource = fmask_ptr;
3868 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
3869 result = build_tex_intrinsic(ctx, instr, &txf_args);
3870
3871 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3872 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
3873 goto write_result;
3874 }
3875
3876 if (instr->sampler_dim == GLSL_SAMPLER_DIM_MS &&
3877 instr->op != nir_texop_txs) {
3878 unsigned sample_chan = instr->is_array ? 3 : 2;
3879 args.coords[sample_chan] = adjust_sample_index_using_fmask(
3880 &ctx->ac, args.coords[0], args.coords[1],
3881 instr->is_array ? args.coords[2] : NULL,
3882 args.coords[sample_chan], fmask_ptr);
3883 }
3884
3885 if (args.offset && instr->op == nir_texop_txf) {
3886 int num_offsets = instr->src[offset_src].src.ssa->num_components;
3887 num_offsets = MIN2(num_offsets, instr->coord_components);
3888 for (unsigned i = 0; i < num_offsets; ++i) {
3889 args.coords[i] = LLVMBuildAdd(
3890 ctx->ac.builder, args.coords[i],
3891 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
3892 }
3893 args.offset = NULL;
3894 }
3895
3896 /* DMASK was repurposed for GATHER4. 4 components are always
3897 * returned and DMASK works like a swizzle - it selects
3898 * the component to fetch. The only valid DMASK values are
3899 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
3900 * (red,red,red,red) etc.) The ISA document doesn't mention
3901 * this.
3902 */
3903 args.dmask = 0xf;
3904 if (instr->op == nir_texop_tg4) {
3905 if (instr->is_shadow)
3906 args.dmask = 1;
3907 else
3908 args.dmask = 1 << instr->component;
3909 }
3910
3911 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF)
3912 args.dim = get_ac_sampler_dim(&ctx->ac, instr->sampler_dim, instr->is_array);
3913 result = build_tex_intrinsic(ctx, instr, &args);
3914
3915 if (instr->op == nir_texop_query_levels)
3916 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
3917 else if (instr->is_shadow && instr->is_new_style_shadow &&
3918 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
3919 instr->op != nir_texop_tg4)
3920 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
3921 else if (instr->op == nir_texop_txs &&
3922 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
3923 instr->is_array) {
3924 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3925 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3926 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3927 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3928 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
3929 } else if (ctx->ac.chip_class >= GFX9 &&
3930 instr->op == nir_texop_txs &&
3931 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
3932 instr->is_array) {
3933 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3934 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
3935 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
3936 ctx->ac.i32_1, "");
3937 } else if (instr->dest.ssa.num_components != 4)
3938 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
3939
3940 write_result:
3941 if (result) {
3942 assert(instr->dest.is_ssa);
3943 result = ac_to_integer(&ctx->ac, result);
3944 ctx->ssa_defs[instr->dest.ssa.index] = result;
3945 }
3946 }
3947
3948
3949 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
3950 {
3951 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
3952 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
3953
3954 ctx->ssa_defs[instr->dest.ssa.index] = result;
3955 _mesa_hash_table_insert(ctx->phis, instr, result);
3956 }
3957
3958 static void visit_post_phi(struct ac_nir_context *ctx,
3959 nir_phi_instr *instr,
3960 LLVMValueRef llvm_phi)
3961 {
3962 nir_foreach_phi_src(src, instr) {
3963 LLVMBasicBlockRef block = get_block(ctx, src->pred);
3964 LLVMValueRef llvm_src = get_src(ctx, src->src);
3965
3966 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
3967 }
3968 }
3969
3970 static void phi_post_pass(struct ac_nir_context *ctx)
3971 {
3972 hash_table_foreach(ctx->phis, entry) {
3973 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
3974 (LLVMValueRef)entry->data);
3975 }
3976 }
3977
3978
3979 static void visit_ssa_undef(struct ac_nir_context *ctx,
3980 const nir_ssa_undef_instr *instr)
3981 {
3982 unsigned num_components = instr->def.num_components;
3983 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
3984 LLVMValueRef undef;
3985
3986 if (num_components == 1)
3987 undef = LLVMGetUndef(type);
3988 else {
3989 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
3990 }
3991 ctx->ssa_defs[instr->def.index] = undef;
3992 }
3993
3994 static void visit_jump(struct ac_llvm_context *ctx,
3995 const nir_jump_instr *instr)
3996 {
3997 switch (instr->type) {
3998 case nir_jump_break:
3999 ac_build_break(ctx);
4000 break;
4001 case nir_jump_continue:
4002 ac_build_continue(ctx);
4003 break;
4004 default:
4005 fprintf(stderr, "Unknown NIR jump instr: ");
4006 nir_print_instr(&instr->instr, stderr);
4007 fprintf(stderr, "\n");
4008 abort();
4009 }
4010 }
4011
4012 static LLVMTypeRef
4013 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4014 enum glsl_base_type type)
4015 {
4016 switch (type) {
4017 case GLSL_TYPE_INT:
4018 case GLSL_TYPE_UINT:
4019 case GLSL_TYPE_BOOL:
4020 case GLSL_TYPE_SUBROUTINE:
4021 return ac->i32;
4022 case GLSL_TYPE_INT8:
4023 case GLSL_TYPE_UINT8:
4024 return ac->i8;
4025 case GLSL_TYPE_INT16:
4026 case GLSL_TYPE_UINT16:
4027 return ac->i16;
4028 case GLSL_TYPE_FLOAT:
4029 return ac->f32;
4030 case GLSL_TYPE_FLOAT16:
4031 return ac->f16;
4032 case GLSL_TYPE_INT64:
4033 case GLSL_TYPE_UINT64:
4034 return ac->i64;
4035 case GLSL_TYPE_DOUBLE:
4036 return ac->f64;
4037 default:
4038 unreachable("unknown GLSL type");
4039 }
4040 }
4041
4042 static LLVMTypeRef
4043 glsl_to_llvm_type(struct ac_llvm_context *ac,
4044 const struct glsl_type *type)
4045 {
4046 if (glsl_type_is_scalar(type)) {
4047 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4048 }
4049
4050 if (glsl_type_is_vector(type)) {
4051 return LLVMVectorType(
4052 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4053 glsl_get_vector_elements(type));
4054 }
4055
4056 if (glsl_type_is_matrix(type)) {
4057 return LLVMArrayType(
4058 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4059 glsl_get_matrix_columns(type));
4060 }
4061
4062 if (glsl_type_is_array(type)) {
4063 return LLVMArrayType(
4064 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4065 glsl_get_length(type));
4066 }
4067
4068 assert(glsl_type_is_struct_or_ifc(type));
4069
4070 LLVMTypeRef member_types[glsl_get_length(type)];
4071
4072 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4073 member_types[i] =
4074 glsl_to_llvm_type(ac,
4075 glsl_get_struct_field(type, i));
4076 }
4077
4078 return LLVMStructTypeInContext(ac->context, member_types,
4079 glsl_get_length(type), false);
4080 }
4081
4082 static void visit_deref(struct ac_nir_context *ctx,
4083 nir_deref_instr *instr)
4084 {
4085 if (instr->mode != nir_var_mem_shared &&
4086 instr->mode != nir_var_mem_global)
4087 return;
4088
4089 LLVMValueRef result = NULL;
4090 switch(instr->deref_type) {
4091 case nir_deref_type_var: {
4092 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4093 result = entry->data;
4094 break;
4095 }
4096 case nir_deref_type_struct:
4097 if (instr->mode == nir_var_mem_global) {
4098 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4099 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4100 instr->strct.index);
4101 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4102 LLVMConstInt(ctx->ac.i32, offset, 0));
4103 } else {
4104 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4105 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4106 }
4107 break;
4108 case nir_deref_type_array:
4109 if (instr->mode == nir_var_mem_global) {
4110 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4111 unsigned stride = glsl_get_explicit_stride(parent->type);
4112
4113 if ((glsl_type_is_matrix(parent->type) &&
4114 glsl_matrix_type_is_row_major(parent->type)) ||
4115 (glsl_type_is_vector(parent->type) && stride == 0))
4116 stride = type_scalar_size_bytes(parent->type);
4117
4118 assert(stride > 0);
4119 LLVMValueRef index = get_src(ctx, instr->arr.index);
4120 if (LLVMTypeOf(index) != ctx->ac.i64)
4121 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4122
4123 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4124
4125 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4126 } else {
4127 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4128 get_src(ctx, instr->arr.index));
4129 }
4130 break;
4131 case nir_deref_type_ptr_as_array:
4132 if (instr->mode == nir_var_mem_global) {
4133 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4134
4135 LLVMValueRef index = get_src(ctx, instr->arr.index);
4136 if (LLVMTypeOf(index) != ctx->ac.i64)
4137 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4138
4139 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4140
4141 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4142 } else {
4143 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4144 get_src(ctx, instr->arr.index));
4145 }
4146 break;
4147 case nir_deref_type_cast: {
4148 result = get_src(ctx, instr->parent);
4149
4150 /* We can't use the structs from LLVM because the shader
4151 * specifies its own offsets. */
4152 LLVMTypeRef pointee_type = ctx->ac.i8;
4153 if (instr->mode == nir_var_mem_shared)
4154 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4155
4156 unsigned address_space;
4157
4158 switch(instr->mode) {
4159 case nir_var_mem_shared:
4160 address_space = AC_ADDR_SPACE_LDS;
4161 break;
4162 case nir_var_mem_global:
4163 address_space = AC_ADDR_SPACE_GLOBAL;
4164 break;
4165 default:
4166 unreachable("Unhandled address space");
4167 }
4168
4169 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4170
4171 if (LLVMTypeOf(result) != type) {
4172 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4173 result = LLVMBuildBitCast(ctx->ac.builder, result,
4174 type, "");
4175 } else {
4176 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4177 type, "");
4178 }
4179 }
4180 break;
4181 }
4182 default:
4183 unreachable("Unhandled deref_instr deref type");
4184 }
4185
4186 ctx->ssa_defs[instr->dest.ssa.index] = result;
4187 }
4188
4189 static void visit_cf_list(struct ac_nir_context *ctx,
4190 struct exec_list *list);
4191
4192 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4193 {
4194 LLVMBasicBlockRef llvm_block = LLVMGetInsertBlock(ctx->ac.builder);
4195 nir_foreach_instr(instr, block)
4196 {
4197 switch (instr->type) {
4198 case nir_instr_type_alu:
4199 visit_alu(ctx, nir_instr_as_alu(instr));
4200 break;
4201 case nir_instr_type_load_const:
4202 visit_load_const(ctx, nir_instr_as_load_const(instr));
4203 break;
4204 case nir_instr_type_intrinsic:
4205 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4206 break;
4207 case nir_instr_type_tex:
4208 visit_tex(ctx, nir_instr_as_tex(instr));
4209 break;
4210 case nir_instr_type_phi:
4211 visit_phi(ctx, nir_instr_as_phi(instr));
4212 break;
4213 case nir_instr_type_ssa_undef:
4214 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4215 break;
4216 case nir_instr_type_jump:
4217 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4218 break;
4219 case nir_instr_type_deref:
4220 visit_deref(ctx, nir_instr_as_deref(instr));
4221 break;
4222 default:
4223 fprintf(stderr, "Unknown NIR instr type: ");
4224 nir_print_instr(instr, stderr);
4225 fprintf(stderr, "\n");
4226 abort();
4227 }
4228 }
4229
4230 _mesa_hash_table_insert(ctx->defs, block, llvm_block);
4231 }
4232
4233 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4234 {
4235 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4236
4237 nir_block *then_block =
4238 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4239
4240 ac_build_uif(&ctx->ac, value, then_block->index);
4241
4242 visit_cf_list(ctx, &if_stmt->then_list);
4243
4244 if (!exec_list_is_empty(&if_stmt->else_list)) {
4245 nir_block *else_block =
4246 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4247
4248 ac_build_else(&ctx->ac, else_block->index);
4249 visit_cf_list(ctx, &if_stmt->else_list);
4250 }
4251
4252 ac_build_endif(&ctx->ac, then_block->index);
4253 }
4254
4255 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4256 {
4257 nir_block *first_loop_block =
4258 (nir_block *) exec_list_get_head(&loop->body);
4259
4260 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4261
4262 visit_cf_list(ctx, &loop->body);
4263
4264 ac_build_endloop(&ctx->ac, first_loop_block->index);
4265 }
4266
4267 static void visit_cf_list(struct ac_nir_context *ctx,
4268 struct exec_list *list)
4269 {
4270 foreach_list_typed(nir_cf_node, node, node, list)
4271 {
4272 switch (node->type) {
4273 case nir_cf_node_block:
4274 visit_block(ctx, nir_cf_node_as_block(node));
4275 break;
4276
4277 case nir_cf_node_if:
4278 visit_if(ctx, nir_cf_node_as_if(node));
4279 break;
4280
4281 case nir_cf_node_loop:
4282 visit_loop(ctx, nir_cf_node_as_loop(node));
4283 break;
4284
4285 default:
4286 assert(0);
4287 }
4288 }
4289 }
4290
4291 void
4292 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4293 struct ac_shader_abi *abi,
4294 struct nir_shader *nir,
4295 struct nir_variable *variable,
4296 gl_shader_stage stage)
4297 {
4298 unsigned output_loc = variable->data.driver_location / 4;
4299 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4300
4301 /* tess ctrl has it's own load/store paths for outputs */
4302 if (stage == MESA_SHADER_TESS_CTRL)
4303 return;
4304
4305 if (stage == MESA_SHADER_VERTEX ||
4306 stage == MESA_SHADER_TESS_EVAL ||
4307 stage == MESA_SHADER_GEOMETRY) {
4308 int idx = variable->data.location + variable->data.index;
4309 if (idx == VARYING_SLOT_CLIP_DIST0) {
4310 int length = nir->info.clip_distance_array_size +
4311 nir->info.cull_distance_array_size;
4312
4313 if (length > 4)
4314 attrib_count = 2;
4315 else
4316 attrib_count = 1;
4317 }
4318 }
4319
4320 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4321 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4322 for (unsigned i = 0; i < attrib_count; ++i) {
4323 for (unsigned chan = 0; chan < 4; chan++) {
4324 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4325 ac_build_alloca_undef(ctx, type, "");
4326 }
4327 }
4328 }
4329
4330 static void
4331 setup_locals(struct ac_nir_context *ctx,
4332 struct nir_function *func)
4333 {
4334 int i, j;
4335 ctx->num_locals = 0;
4336 nir_foreach_variable(variable, &func->impl->locals) {
4337 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4338 variable->data.driver_location = ctx->num_locals * 4;
4339 variable->data.location_frac = 0;
4340 ctx->num_locals += attrib_count;
4341 }
4342 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4343 if (!ctx->locals)
4344 return;
4345
4346 for (i = 0; i < ctx->num_locals; i++) {
4347 for (j = 0; j < 4; j++) {
4348 ctx->locals[i * 4 + j] =
4349 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4350 }
4351 }
4352 }
4353
4354 static void
4355 setup_shared(struct ac_nir_context *ctx,
4356 struct nir_shader *nir)
4357 {
4358 nir_foreach_variable(variable, &nir->shared) {
4359 LLVMValueRef shared =
4360 LLVMAddGlobalInAddressSpace(
4361 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4362 variable->name ? variable->name : "",
4363 AC_ADDR_SPACE_LDS);
4364 _mesa_hash_table_insert(ctx->vars, variable, shared);
4365 }
4366 }
4367
4368 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4369 struct nir_shader *nir)
4370 {
4371 struct ac_nir_context ctx = {};
4372 struct nir_function *func;
4373
4374 ctx.ac = *ac;
4375 ctx.abi = abi;
4376
4377 ctx.stage = nir->info.stage;
4378 ctx.info = &nir->info;
4379
4380 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4381
4382 nir_foreach_variable(variable, &nir->outputs)
4383 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4384 ctx.stage);
4385
4386 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4387 _mesa_key_pointer_equal);
4388 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4389 _mesa_key_pointer_equal);
4390 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4391 _mesa_key_pointer_equal);
4392
4393 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4394
4395 nir_index_ssa_defs(func->impl);
4396 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4397
4398 setup_locals(&ctx, func);
4399
4400 if (gl_shader_stage_is_compute(nir->info.stage))
4401 setup_shared(&ctx, nir);
4402
4403 visit_cf_list(&ctx, &func->impl->body);
4404 phi_post_pass(&ctx);
4405
4406 if (!gl_shader_stage_is_compute(nir->info.stage))
4407 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4408 ctx.abi->outputs);
4409
4410 free(ctx.locals);
4411 free(ctx.ssa_defs);
4412 ralloc_free(ctx.defs);
4413 ralloc_free(ctx.phis);
4414 ralloc_free(ctx.vars);
4415 }
4416
4417 void
4418 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4419 {
4420 /* While it would be nice not to have this flag, we are constrained
4421 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4422 */
4423 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4424
4425 /* TODO: Indirect indexing of GS inputs is unimplemented.
4426 *
4427 * TCS and TES load inputs directly from LDS or offchip memory, so
4428 * indirect indexing is trivial.
4429 */
4430 nir_variable_mode indirect_mask = 0;
4431 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4432 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4433 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4434 !llvm_has_working_vgpr_indexing)) {
4435 indirect_mask |= nir_var_shader_in;
4436 }
4437 if (!llvm_has_working_vgpr_indexing &&
4438 nir->info.stage != MESA_SHADER_TESS_CTRL)
4439 indirect_mask |= nir_var_shader_out;
4440
4441 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4442 * smart enough to handle indirects without causing excess spilling
4443 * causing the gpu to hang.
4444 *
4445 * See the following thread for more details of the problem:
4446 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4447 */
4448 indirect_mask |= nir_var_function_temp;
4449
4450 nir_lower_indirect_derefs(nir, indirect_mask);
4451 }
4452
4453 static unsigned
4454 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4455 {
4456 if (intrin->intrinsic != nir_intrinsic_store_deref)
4457 return 0;
4458
4459 nir_variable *var =
4460 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4461
4462 if (var->data.mode != nir_var_shader_out)
4463 return 0;
4464
4465 unsigned writemask = 0;
4466 const int location = var->data.location;
4467 unsigned first_component = var->data.location_frac;
4468 unsigned num_comps = intrin->dest.ssa.num_components;
4469
4470 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4471 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4472 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4473 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4474
4475 return writemask;
4476 }
4477
4478 static void
4479 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4480 unsigned *cond_block_tf_writemask,
4481 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4482 {
4483 switch (cf_node->type) {
4484 case nir_cf_node_block: {
4485 nir_block *block = nir_cf_node_as_block(cf_node);
4486 nir_foreach_instr(instr, block) {
4487 if (instr->type != nir_instr_type_intrinsic)
4488 continue;
4489
4490 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4491 if (intrin->intrinsic == nir_intrinsic_barrier) {
4492
4493 /* If we find a barrier in nested control flow put this in the
4494 * too hard basket. In GLSL this is not possible but it is in
4495 * SPIR-V.
4496 */
4497 if (is_nested_cf) {
4498 *tessfactors_are_def_in_all_invocs = false;
4499 return;
4500 }
4501
4502 /* The following case must be prevented:
4503 * gl_TessLevelInner = ...;
4504 * barrier();
4505 * if (gl_InvocationID == 1)
4506 * gl_TessLevelInner = ...;
4507 *
4508 * If you consider disjoint code segments separated by barriers, each
4509 * such segment that writes tess factor channels should write the same
4510 * channels in all codepaths within that segment.
4511 */
4512 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4513 /* Accumulate the result: */
4514 *tessfactors_are_def_in_all_invocs &=
4515 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4516
4517 /* Analyze the next code segment from scratch. */
4518 *upper_block_tf_writemask = 0;
4519 *cond_block_tf_writemask = 0;
4520 }
4521 } else
4522 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4523 }
4524
4525 break;
4526 }
4527 case nir_cf_node_if: {
4528 unsigned then_tessfactor_writemask = 0;
4529 unsigned else_tessfactor_writemask = 0;
4530
4531 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4532 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4533 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4534 cond_block_tf_writemask,
4535 tessfactors_are_def_in_all_invocs, true);
4536 }
4537
4538 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4539 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4540 cond_block_tf_writemask,
4541 tessfactors_are_def_in_all_invocs, true);
4542 }
4543
4544 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4545 /* If both statements write the same tess factor channels,
4546 * we can say that the upper block writes them too.
4547 */
4548 *upper_block_tf_writemask |= then_tessfactor_writemask &
4549 else_tessfactor_writemask;
4550 *cond_block_tf_writemask |= then_tessfactor_writemask |
4551 else_tessfactor_writemask;
4552 }
4553
4554 break;
4555 }
4556 case nir_cf_node_loop: {
4557 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4558 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4559 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4560 cond_block_tf_writemask,
4561 tessfactors_are_def_in_all_invocs, true);
4562 }
4563
4564 break;
4565 }
4566 default:
4567 unreachable("unknown cf node type");
4568 }
4569 }
4570
4571 bool
4572 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4573 {
4574 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4575
4576 /* The pass works as follows:
4577 * If all codepaths write tess factors, we can say that all
4578 * invocations define tess factors.
4579 *
4580 * Each tess factor channel is tracked separately.
4581 */
4582 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4583 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4584
4585 /* Initial value = true. Here the pass will accumulate results from
4586 * multiple segments surrounded by barriers. If tess factors aren't
4587 * written at all, it's a shader bug and we don't care if this will be
4588 * true.
4589 */
4590 bool tessfactors_are_def_in_all_invocs = true;
4591
4592 nir_foreach_function(function, nir) {
4593 if (function->impl) {
4594 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4595 scan_tess_ctrl(node, &main_block_tf_writemask,
4596 &cond_block_tf_writemask,
4597 &tessfactors_are_def_in_all_invocs,
4598 false);
4599 }
4600 }
4601 }
4602
4603 /* Accumulate the result for the last code segment separated by a
4604 * barrier.
4605 */
4606 if (main_block_tf_writemask || cond_block_tf_writemask) {
4607 tessfactors_are_def_in_all_invocs &=
4608 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4609 }
4610
4611 return tessfactors_are_def_in_all_invocs;
4612 }