2 * Copyright © 2018 Valve Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Daniel Schürmann (daniel.schuermann@campus.tu-berlin.de)
32 #include "util/half_float.h"
33 #include "util/u_math.h"
38 * The optimizer works in 4 phases:
39 * (1) The first pass collects information for each ssa-def,
40 * propagates reg->reg operands of the same type, inline constants
41 * and neg/abs input modifiers.
42 * (2) The second pass combines instructions like mad, omod, clamp and
43 * propagates sgpr's on VALU instructions.
44 * This pass depends on information collected in the first pass.
45 * (3) The third pass goes backwards, and selects instructions,
46 * i.e. decides if a mad instruction is profitable and eliminates dead code.
47 * (4) The fourth pass cleans up the sequence: literals get applied and dead
48 * instructions are removed from the sequence.
53 aco_ptr
<Instruction
> add_instr
;
59 mad_info(aco_ptr
<Instruction
> instr
, uint32_t id
, bool vop3
)
60 : add_instr(std::move(instr
)), mul_temp_id(id
), needs_vop3(vop3
), check_literal(false) {}
65 label_constant
= 1 << 1,
70 label_literal
= 1 << 6,
74 label_omod5
= 1 << 10,
75 label_omod_success
= 1 << 11,
76 label_clamp
= 1 << 12,
77 label_clamp_success
= 1 << 13,
78 label_undefined
= 1 << 14,
81 label_add_sub
= 1 << 17,
82 label_bitwise
= 1 << 18,
83 label_minmax
= 1 << 19,
87 static constexpr uint32_t instr_labels
= label_vec
| label_mul
| label_mad
| label_omod_success
| label_clamp_success
| label_add_sub
| label_bitwise
| label_minmax
| label_fcmp
;
88 static constexpr uint32_t temp_labels
= label_abs
| label_neg
| label_temp
| label_vcc
| label_b2f
;
89 static constexpr uint32_t val_labels
= label_constant
| label_literal
| label_mad
;
99 void add_label(Label new_label
)
101 /* Since all labels which use "instr" use it for the same thing
102 * (indicating the defining instruction), there is no need to clear
103 * any other instr labels. */
104 if (new_label
& instr_labels
)
105 label
&= ~temp_labels
; /* instr and temp alias */
107 if (new_label
& temp_labels
) {
108 label
&= ~temp_labels
;
109 label
&= ~instr_labels
; /* instr and temp alias */
112 if (new_label
& val_labels
)
113 label
&= ~val_labels
;
118 void set_vec(Instruction
* vec
)
120 add_label(label_vec
);
126 return label
& label_vec
;
129 void set_constant(uint32_t constant
)
131 add_label(label_constant
);
137 return label
& label_constant
;
140 void set_abs(Temp abs_temp
)
142 add_label(label_abs
);
148 return label
& label_abs
;
151 void set_neg(Temp neg_temp
)
153 add_label(label_neg
);
159 return label
& label_neg
;
162 void set_neg_abs(Temp neg_abs_temp
)
164 add_label((Label
)((uint32_t)label_abs
| (uint32_t)label_neg
));
168 void set_mul(Instruction
* mul
)
170 add_label(label_mul
);
176 return label
& label_mul
;
179 void set_temp(Temp tmp
)
181 add_label(label_temp
);
187 return label
& label_temp
;
190 void set_literal(uint32_t lit
)
192 add_label(label_literal
);
198 return label
& label_literal
;
201 void set_mad(Instruction
* mad
, uint32_t mad_info_idx
)
203 add_label(label_mad
);
210 return label
& label_mad
;
215 add_label(label_omod2
);
220 return label
& label_omod2
;
225 add_label(label_omod4
);
230 return label
& label_omod4
;
235 add_label(label_omod5
);
240 return label
& label_omod5
;
243 void set_omod_success(Instruction
* omod_instr
)
245 add_label(label_omod_success
);
249 bool is_omod_success()
251 return label
& label_omod_success
;
256 add_label(label_clamp
);
261 return label
& label_clamp
;
264 void set_clamp_success(Instruction
* clamp_instr
)
266 add_label(label_clamp_success
);
270 bool is_clamp_success()
272 return label
& label_clamp_success
;
277 add_label(label_undefined
);
282 return label
& label_undefined
;
285 void set_vcc(Temp vcc
)
287 add_label(label_vcc
);
293 return label
& label_vcc
;
296 bool is_constant_or_literal()
298 return is_constant() || is_literal();
301 void set_b2f(Temp val
)
303 add_label(label_b2f
);
309 return label
& label_b2f
;
312 void set_add_sub(Instruction
*add_sub_instr
)
314 add_label(label_add_sub
);
315 instr
= add_sub_instr
;
320 return label
& label_add_sub
;
323 void set_bitwise(Instruction
*bitwise_instr
)
325 add_label(label_bitwise
);
326 instr
= bitwise_instr
;
331 return label
& label_bitwise
;
334 void set_minmax(Instruction
*minmax_instr
)
336 add_label(label_minmax
);
337 instr
= minmax_instr
;
342 return label
& label_minmax
;
345 void set_fcmp(Instruction
*fcmp_instr
)
347 add_label(label_fcmp
);
353 return label
& label_fcmp
;
360 std::vector
<aco_ptr
<Instruction
>> instructions
;
362 std::pair
<uint32_t,Temp
> last_literal
;
363 std::vector
<mad_info
> mad_infos
;
364 std::vector
<uint16_t> uses
;
367 bool can_swap_operands(aco_ptr
<Instruction
>& instr
)
369 if (instr
->operands
[0].isConstant() ||
370 (instr
->operands
[0].isTemp() && instr
->operands
[0].getTemp().type() == RegType::sgpr
))
373 switch (instr
->opcode
) {
374 case aco_opcode::v_add_f32
:
375 case aco_opcode::v_mul_f32
:
376 case aco_opcode::v_or_b32
:
377 case aco_opcode::v_and_b32
:
378 case aco_opcode::v_xor_b32
:
379 case aco_opcode::v_max_f32
:
380 case aco_opcode::v_min_f32
:
381 case aco_opcode::v_cmp_eq_f32
:
382 case aco_opcode::v_cmp_lg_f32
:
384 case aco_opcode::v_sub_f32
:
385 instr
->opcode
= aco_opcode::v_subrev_f32
;
387 case aco_opcode::v_cmp_lt_f32
:
388 instr
->opcode
= aco_opcode::v_cmp_gt_f32
;
390 case aco_opcode::v_cmp_ge_f32
:
391 instr
->opcode
= aco_opcode::v_cmp_le_f32
;
393 case aco_opcode::v_cmp_lt_i32
:
394 instr
->opcode
= aco_opcode::v_cmp_gt_i32
;
401 bool can_use_VOP3(aco_ptr
<Instruction
>& instr
)
403 if (instr
->operands
.size() && instr
->operands
[0].isLiteral())
406 if (instr
->isDPP() || instr
->isSDWA())
409 return instr
->opcode
!= aco_opcode::v_madmk_f32
&&
410 instr
->opcode
!= aco_opcode::v_madak_f32
&&
411 instr
->opcode
!= aco_opcode::v_madmk_f16
&&
412 instr
->opcode
!= aco_opcode::v_madak_f16
;
415 bool can_apply_sgprs(aco_ptr
<Instruction
>& instr
)
417 return instr
->opcode
!= aco_opcode::v_readfirstlane_b32
&&
418 instr
->opcode
!= aco_opcode::v_readlane_b32
&&
419 instr
->opcode
!= aco_opcode::v_writelane_b32
;
422 void to_VOP3(opt_ctx
& ctx
, aco_ptr
<Instruction
>& instr
)
427 assert(!instr
->operands
[0].isLiteral());
428 aco_ptr
<Instruction
> tmp
= std::move(instr
);
429 Format format
= asVOP3(tmp
->format
);
430 instr
.reset(create_instruction
<VOP3A_instruction
>(tmp
->opcode
, format
, tmp
->operands
.size(), tmp
->definitions
.size()));
431 std::copy(tmp
->operands
.cbegin(), tmp
->operands
.cend(), instr
->operands
.begin());
432 for (unsigned i
= 0; i
< instr
->definitions
.size(); i
++) {
433 instr
->definitions
[i
] = tmp
->definitions
[i
];
434 if (instr
->definitions
[i
].isTemp()) {
435 ssa_info
& info
= ctx
.info
[instr
->definitions
[i
].tempId()];
436 if (info
.label
& instr_labels
&& info
.instr
== tmp
.get())
437 info
.instr
= instr
.get();
442 /* only covers special cases */
443 bool can_accept_constant(aco_ptr
<Instruction
>& instr
, unsigned operand
)
445 switch (instr
->opcode
) {
446 case aco_opcode::v_interp_p2_f32
:
447 case aco_opcode::v_mac_f32
:
448 case aco_opcode::v_writelane_b32
:
449 case aco_opcode::v_cndmask_b32
:
451 case aco_opcode::s_addk_i32
:
452 case aco_opcode::s_mulk_i32
:
453 case aco_opcode::p_wqm
:
454 case aco_opcode::p_extract_vector
:
455 case aco_opcode::p_split_vector
:
456 case aco_opcode::v_readlane_b32
:
457 case aco_opcode::v_readfirstlane_b32
:
460 if ((instr
->format
== Format::MUBUF
||
461 instr
->format
== Format::MIMG
) &&
462 instr
->definitions
.size() == 1 &&
463 instr
->operands
.size() == 4) {
470 bool valu_can_accept_literal(opt_ctx
& ctx
, aco_ptr
<Instruction
>& instr
, unsigned operand
)
472 // TODO: VOP3 can take a literal on GFX10
473 return !instr
->isSDWA() && !instr
->isDPP() && !instr
->isVOP3() &&
474 operand
== 0 && can_accept_constant(instr
, operand
);
477 bool parse_base_offset(opt_ctx
&ctx
, Instruction
* instr
, unsigned op_index
, Temp
*base
, uint32_t *offset
)
479 Operand op
= instr
->operands
[op_index
];
483 Temp tmp
= op
.getTemp();
484 if (!ctx
.info
[tmp
.id()].is_add_sub())
487 Instruction
*add_instr
= ctx
.info
[tmp
.id()].instr
;
489 switch (add_instr
->opcode
) {
490 case aco_opcode::v_add_u32
:
491 case aco_opcode::v_add_co_u32
:
492 case aco_opcode::s_add_i32
:
493 case aco_opcode::s_add_u32
:
499 if (add_instr
->usesModifiers())
502 for (unsigned i
= 0; i
< 2; i
++) {
503 if (add_instr
->operands
[i
].isConstant()) {
504 *offset
= add_instr
->operands
[i
].constantValue();
505 } else if (add_instr
->operands
[i
].isTemp() &&
506 ctx
.info
[add_instr
->operands
[i
].tempId()].is_constant_or_literal()) {
507 *offset
= ctx
.info
[add_instr
->operands
[i
].tempId()].val
;
511 if (!add_instr
->operands
[!i
].isTemp())
514 uint32_t offset2
= 0;
515 if (parse_base_offset(ctx
, add_instr
, !i
, base
, &offset2
)) {
518 *base
= add_instr
->operands
[!i
].getTemp();
526 void label_instruction(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
528 if (instr
->isSALU() || instr
->isVALU() || instr
->format
== Format::PSEUDO
) {
529 ASSERTED
bool all_const
= false;
530 for (Operand
& op
: instr
->operands
)
531 all_const
= all_const
&& (!op
.isTemp() || ctx
.info
[op
.tempId()].is_constant_or_literal());
532 perfwarn(all_const
, "All instruction operands are constant", instr
.get());
535 for (unsigned i
= 0; i
< instr
->operands
.size(); i
++)
537 if (!instr
->operands
[i
].isTemp())
540 ssa_info info
= ctx
.info
[instr
->operands
[i
].tempId()];
541 /* propagate undef */
542 if (info
.is_undefined() && is_phi(instr
))
543 instr
->operands
[i
] = Operand(instr
->operands
[i
].regClass());
544 /* propagate reg->reg of same type */
545 if (info
.is_temp() && info
.temp
.regClass() == instr
->operands
[i
].getTemp().regClass()) {
546 instr
->operands
[i
].setTemp(ctx
.info
[instr
->operands
[i
].tempId()].temp
);
547 info
= ctx
.info
[info
.temp
.id()];
550 /* SALU / PSEUDO: propagate inline constants */
551 if (instr
->isSALU() || instr
->format
== Format::PSEUDO
) {
552 if (info
.is_temp() && info
.temp
.type() == RegType::sgpr
) {
553 instr
->operands
[i
].setTemp(info
.temp
);
554 info
= ctx
.info
[info
.temp
.id()];
555 } else if (info
.is_temp() && info
.temp
.type() == RegType::vgpr
) {
556 /* propagate vgpr if it can take it */
557 switch (instr
->opcode
) {
558 case aco_opcode::p_create_vector
:
559 case aco_opcode::p_split_vector
:
560 case aco_opcode::p_extract_vector
:
561 case aco_opcode::p_phi
: {
562 const bool all_vgpr
= std::none_of(instr
->definitions
.begin(), instr
->definitions
.end(),
563 [] (const Definition
& def
) { return def
.getTemp().type() != RegType::vgpr
;});
565 instr
->operands
[i
] = Operand(info
.temp
);
566 info
= ctx
.info
[info
.temp
.id()];
574 if ((info
.is_constant() || (info
.is_literal() && instr
->format
== Format::PSEUDO
)) && !instr
->operands
[i
].isFixed() && can_accept_constant(instr
, i
)) {
575 instr
->operands
[i
] = Operand(info
.val
);
580 /* VALU: propagate neg, abs & inline constants */
581 else if (instr
->isVALU()) {
582 if (info
.is_temp() && info
.temp
.type() == RegType::vgpr
) {
583 instr
->operands
[i
].setTemp(info
.temp
);
584 info
= ctx
.info
[info
.temp
.id()];
586 if (info
.is_abs() && (can_use_VOP3(instr
) || instr
->isDPP()) && instr_info
.can_use_input_modifiers
[(int)instr
->opcode
]) {
589 instr
->operands
[i
] = Operand(info
.temp
);
591 static_cast<DPP_instruction
*>(instr
.get())->abs
[i
] = true;
593 static_cast<VOP3A_instruction
*>(instr
.get())->abs
[i
] = true;
595 if (info
.is_neg() && instr
->opcode
== aco_opcode::v_add_f32
) {
596 instr
->opcode
= i
? aco_opcode::v_sub_f32
: aco_opcode::v_subrev_f32
;
597 instr
->operands
[i
].setTemp(info
.temp
);
599 } else if (info
.is_neg() && (can_use_VOP3(instr
) || instr
->isDPP()) && instr_info
.can_use_input_modifiers
[(int)instr
->opcode
]) {
602 instr
->operands
[i
].setTemp(info
.temp
);
604 static_cast<DPP_instruction
*>(instr
.get())->neg
[i
] = true;
606 static_cast<VOP3A_instruction
*>(instr
.get())->neg
[i
] = true;
609 if (info
.is_constant() && can_accept_constant(instr
, i
)) {
610 perfwarn(instr
->opcode
== aco_opcode::v_cndmask_b32
&& i
== 2, "v_cndmask_b32 with a constant selector", instr
.get());
612 instr
->operands
[i
] = Operand(info
.val
);
614 } else if (!instr
->isVOP3() && can_swap_operands(instr
)) {
615 instr
->operands
[i
] = instr
->operands
[0];
616 instr
->operands
[0] = Operand(info
.val
);
618 } else if (can_use_VOP3(instr
)) {
620 instr
->operands
[i
] = Operand(info
.val
);
626 /* MUBUF: propagate constants and combine additions */
627 else if (instr
->format
== Format::MUBUF
) {
628 MUBUF_instruction
*mubuf
= static_cast<MUBUF_instruction
*>(instr
.get());
631 while (info
.is_temp())
632 info
= ctx
.info
[info
.temp
.id()];
634 if (mubuf
->offen
&& i
== 0 && info
.is_constant_or_literal() && mubuf
->offset
+ info
.val
< 4096) {
635 assert(!mubuf
->idxen
);
636 instr
->operands
[i
] = Operand(v1
);
637 mubuf
->offset
+= info
.val
;
638 mubuf
->offen
= false;
640 } else if (i
== 2 && info
.is_constant_or_literal() && mubuf
->offset
+ info
.val
< 4096) {
641 instr
->operands
[2] = Operand((uint32_t) 0);
642 mubuf
->offset
+= info
.val
;
644 } else if (mubuf
->offen
&& i
== 0 && parse_base_offset(ctx
, instr
.get(), i
, &base
, &offset
) && base
.regClass() == v1
&& mubuf
->offset
+ offset
< 4096) {
645 assert(!mubuf
->idxen
);
646 instr
->operands
[i
].setTemp(base
);
647 mubuf
->offset
+= offset
;
649 } else if (i
== 2 && parse_base_offset(ctx
, instr
.get(), i
, &base
, &offset
) && base
.regClass() == s1
&& mubuf
->offset
+ offset
< 4096) {
650 instr
->operands
[i
].setTemp(base
);
651 mubuf
->offset
+= offset
;
656 /* DS: combine additions */
657 else if (instr
->format
== Format::DS
) {
659 DS_instruction
*ds
= static_cast<DS_instruction
*>(instr
.get());
662 if (i
== 0 && parse_base_offset(ctx
, instr
.get(), i
, &base
, &offset
) && base
.regClass() == instr
->operands
[i
].regClass()) {
663 if (instr
->opcode
== aco_opcode::ds_write2_b32
|| instr
->opcode
== aco_opcode::ds_read2_b32
||
664 instr
->opcode
== aco_opcode::ds_write2_b64
|| instr
->opcode
== aco_opcode::ds_read2_b64
) {
665 if (offset
% 4 == 0 &&
666 ds
->offset0
+ (offset
>> 2) <= 255 &&
667 ds
->offset1
+ (offset
>> 2) <= 255) {
668 instr
->operands
[i
].setTemp(base
);
669 ds
->offset0
+= offset
>> 2;
670 ds
->offset1
+= offset
>> 2;
673 if (ds
->offset0
+ offset
<= 65535) {
674 instr
->operands
[i
].setTemp(base
);
675 ds
->offset0
+= offset
;
681 /* SMEM: propagate constants and combine additions */
682 else if (instr
->format
== Format::SMEM
) {
684 SMEM_instruction
*smem
= static_cast<SMEM_instruction
*>(instr
.get());
687 if (i
== 1 && info
.is_constant_or_literal() && info
.val
<= 0xFFFFF) {
688 instr
->operands
[i
] = Operand(info
.val
);
690 } else if (i
== 1 && parse_base_offset(ctx
, instr
.get(), i
, &base
, &offset
) && base
.regClass() == s1
&& offset
<= 0xFFFFF && ctx
.program
->chip_class
>= GFX9
) {
691 bool soe
= smem
->operands
.size() >= (!smem
->definitions
.empty() ? 3 : 4);
693 (!ctx
.info
[smem
->operands
.back().tempId()].is_constant_or_literal() ||
694 ctx
.info
[smem
->operands
.back().tempId()].val
!= 0)) {
698 smem
->operands
[1] = Operand(offset
);
699 smem
->operands
.back() = Operand(base
);
701 SMEM_instruction
*new_instr
= create_instruction
<SMEM_instruction
>(smem
->opcode
, Format::SMEM
, smem
->operands
.size() + 1, smem
->definitions
.size());
702 new_instr
->operands
[0] = smem
->operands
[0];
703 new_instr
->operands
[1] = Operand(offset
);
704 if (smem
->definitions
.empty())
705 new_instr
->operands
[2] = smem
->operands
[2];
706 new_instr
->operands
.back() = Operand(base
);
707 if (!smem
->definitions
.empty())
708 new_instr
->definitions
[0] = smem
->definitions
[0];
709 new_instr
->can_reorder
= smem
->can_reorder
;
710 new_instr
->barrier
= smem
->barrier
;
711 instr
.reset(new_instr
);
712 smem
= static_cast<SMEM_instruction
*>(instr
.get());
719 /* if this instruction doesn't define anything, return */
720 if (instr
->definitions
.empty())
723 switch (instr
->opcode
) {
724 case aco_opcode::p_create_vector
: {
725 unsigned num_ops
= instr
->operands
.size();
726 for (const Operand
& op
: instr
->operands
) {
727 if (op
.isTemp() && ctx
.info
[op
.tempId()].is_vec())
728 num_ops
+= ctx
.info
[op
.tempId()].instr
->operands
.size() - 1;
730 if (num_ops
!= instr
->operands
.size()) {
731 aco_ptr
<Instruction
> old_vec
= std::move(instr
);
732 instr
.reset(create_instruction
<Pseudo_instruction
>(aco_opcode::p_create_vector
, Format::PSEUDO
, num_ops
, 1));
733 instr
->definitions
[0] = old_vec
->definitions
[0];
735 for (Operand
& old_op
: old_vec
->operands
) {
736 if (old_op
.isTemp() && ctx
.info
[old_op
.tempId()].is_vec()) {
737 for (unsigned j
= 0; j
< ctx
.info
[old_op
.tempId()].instr
->operands
.size(); j
++)
738 instr
->operands
[k
++] = ctx
.info
[old_op
.tempId()].instr
->operands
[j
];
740 instr
->operands
[k
++] = old_op
;
743 assert(k
== num_ops
);
745 if (instr
->operands
.size() == 1 && instr
->operands
[0].isTemp())
746 ctx
.info
[instr
->definitions
[0].tempId()].set_temp(instr
->operands
[0].getTemp());
747 else if (instr
->definitions
[0].getTemp().size() == instr
->operands
.size())
748 ctx
.info
[instr
->definitions
[0].tempId()].set_vec(instr
.get());
751 case aco_opcode::p_split_vector
: {
752 if (!ctx
.info
[instr
->operands
[0].tempId()].is_vec())
754 Instruction
* vec
= ctx
.info
[instr
->operands
[0].tempId()].instr
;
755 assert(instr
->definitions
.size() == vec
->operands
.size());
756 for (unsigned i
= 0; i
< instr
->definitions
.size(); i
++) {
757 Operand vec_op
= vec
->operands
[i
];
758 if (vec_op
.isConstant()) {
759 if (vec_op
.isLiteral())
760 ctx
.info
[instr
->definitions
[i
].tempId()].set_literal(vec_op
.constantValue());
762 ctx
.info
[instr
->definitions
[i
].tempId()].set_constant(vec_op
.constantValue());
764 assert(vec_op
.isTemp());
765 ctx
.info
[instr
->definitions
[i
].tempId()].set_temp(vec_op
.getTemp());
770 case aco_opcode::p_extract_vector
: { /* mov */
771 if (!ctx
.info
[instr
->operands
[0].tempId()].is_vec())
773 Instruction
* vec
= ctx
.info
[instr
->operands
[0].tempId()].instr
;
774 if (vec
->definitions
[0].getTemp().size() == vec
->operands
.size() && /* TODO: what about 64bit or other combinations? */
775 vec
->operands
[0].size() == instr
->definitions
[0].size()) {
777 /* convert this extract into a mov instruction */
778 Operand vec_op
= vec
->operands
[instr
->operands
[1].constantValue()];
779 bool is_vgpr
= instr
->definitions
[0].getTemp().type() == RegType::vgpr
;
780 aco_opcode opcode
= is_vgpr
? aco_opcode::v_mov_b32
: aco_opcode::s_mov_b32
;
781 Format format
= is_vgpr
? Format::VOP1
: Format::SOP1
;
782 instr
->opcode
= opcode
;
783 instr
->format
= format
;
784 instr
->operands
= {instr
->operands
.begin(), 1 };
785 instr
->operands
[0] = vec_op
;
787 if (vec_op
.isConstant()) {
788 if (vec_op
.isLiteral())
789 ctx
.info
[instr
->definitions
[0].tempId()].set_literal(vec_op
.constantValue());
791 ctx
.info
[instr
->definitions
[0].tempId()].set_constant(vec_op
.constantValue());
793 assert(vec_op
.isTemp());
794 ctx
.info
[instr
->definitions
[0].tempId()].set_temp(vec_op
.getTemp());
799 case aco_opcode::s_mov_b32
: /* propagate */
800 case aco_opcode::s_mov_b64
:
801 case aco_opcode::v_mov_b32
:
802 case aco_opcode::p_as_uniform
:
803 if (instr
->definitions
[0].isFixed()) {
804 /* don't copy-propagate copies into fixed registers */
805 } else if (instr
->usesModifiers()) {
807 } else if (instr
->operands
[0].isConstant()) {
808 if (instr
->operands
[0].isLiteral())
809 ctx
.info
[instr
->definitions
[0].tempId()].set_literal(instr
->operands
[0].constantValue());
811 ctx
.info
[instr
->definitions
[0].tempId()].set_constant(instr
->operands
[0].constantValue());
812 } else if (instr
->operands
[0].isTemp()) {
813 ctx
.info
[instr
->definitions
[0].tempId()].set_temp(instr
->operands
[0].getTemp());
815 assert(instr
->operands
[0].isFixed());
818 case aco_opcode::p_is_helper
:
819 if (!ctx
.program
->needs_wqm
)
820 ctx
.info
[instr
->definitions
[0].tempId()].set_constant(0u);
822 case aco_opcode::s_movk_i32
: {
823 uint32_t v
= static_cast<SOPK_instruction
*>(instr
.get())->imm
;
824 v
= v
& 0x8000 ? (v
| 0xffff0000) : v
;
825 if (v
<= 64 || v
>= 0xfffffff0)
826 ctx
.info
[instr
->definitions
[0].tempId()].set_constant(v
);
828 ctx
.info
[instr
->definitions
[0].tempId()].set_literal(v
);
831 case aco_opcode::v_bfrev_b32
:
832 case aco_opcode::s_brev_b32
: {
833 if (instr
->operands
[0].isConstant()) {
834 uint32_t v
= util_bitreverse(instr
->operands
[0].constantValue());
835 if (v
<= 64 || v
>= 0xfffffff0)
836 ctx
.info
[instr
->definitions
[0].tempId()].set_constant(v
);
838 ctx
.info
[instr
->definitions
[0].tempId()].set_literal(v
);
842 case aco_opcode::s_bfm_b32
: {
843 if (instr
->operands
[0].isConstant() && instr
->operands
[1].isConstant()) {
844 unsigned size
= instr
->operands
[0].constantValue() & 0x1f;
845 unsigned start
= instr
->operands
[1].constantValue() & 0x1f;
846 uint32_t v
= ((1u << size
) - 1u) << start
;
847 if (v
<= 64 || v
>= 0xfffffff0)
848 ctx
.info
[instr
->definitions
[0].tempId()].set_constant(v
);
850 ctx
.info
[instr
->definitions
[0].tempId()].set_literal(v
);
853 case aco_opcode::v_mul_f32
: { /* omod */
854 /* TODO: try to move the negate/abs modifier to the consumer instead */
855 if (instr
->usesModifiers())
858 for (unsigned i
= 0; i
< 2; i
++) {
859 if (instr
->operands
[!i
].isConstant() && instr
->operands
[i
].isTemp()) {
860 if (instr
->operands
[!i
].constantValue() == 0x40000000) { /* 2.0 */
861 ctx
.info
[instr
->operands
[i
].tempId()].set_omod2();
862 } else if (instr
->operands
[!i
].constantValue() == 0x40800000) { /* 4.0 */
863 ctx
.info
[instr
->operands
[i
].tempId()].set_omod4();
864 } else if (instr
->operands
[!i
].constantValue() == 0x3f000000) { /* 0.5 */
865 ctx
.info
[instr
->operands
[i
].tempId()].set_omod5();
866 } else if (instr
->operands
[!i
].constantValue() == 0x3f800000) { /* 1.0 */
867 ctx
.info
[instr
->definitions
[0].tempId()].set_temp(instr
->operands
[i
].getTemp());
876 case aco_opcode::v_and_b32
: /* abs */
877 if (instr
->operands
[0].constantEquals(0x7FFFFFFF) && instr
->operands
[1].isTemp())
878 ctx
.info
[instr
->definitions
[0].tempId()].set_abs(instr
->operands
[1].getTemp());
880 ctx
.info
[instr
->definitions
[0].tempId()].set_bitwise(instr
.get());
882 case aco_opcode::v_xor_b32
: { /* neg */
883 if (instr
->operands
[0].constantEquals(0x80000000u
) && instr
->operands
[1].isTemp()) {
884 if (ctx
.info
[instr
->operands
[1].tempId()].is_neg()) {
885 ctx
.info
[instr
->definitions
[0].tempId()].set_temp(ctx
.info
[instr
->operands
[1].tempId()].temp
);
887 if (ctx
.info
[instr
->operands
[1].tempId()].is_abs()) { /* neg(abs(x)) */
888 instr
->operands
[1].setTemp(ctx
.info
[instr
->operands
[1].tempId()].temp
);
889 instr
->opcode
= aco_opcode::v_or_b32
;
890 ctx
.info
[instr
->definitions
[0].tempId()].set_neg_abs(instr
->operands
[1].getTemp());
892 ctx
.info
[instr
->definitions
[0].tempId()].set_neg(instr
->operands
[1].getTemp());
896 ctx
.info
[instr
->definitions
[0].tempId()].set_bitwise(instr
.get());
900 case aco_opcode::v_med3_f32
: { /* clamp */
901 VOP3A_instruction
* vop3
= static_cast<VOP3A_instruction
*>(instr
.get());
902 if (vop3
->abs
[0] || vop3
->neg
[0] || vop3
->opsel
[0] ||
903 vop3
->abs
[1] || vop3
->neg
[1] || vop3
->opsel
[1] ||
904 vop3
->abs
[2] || vop3
->neg
[2] || vop3
->opsel
[2] ||
909 bool found_zero
= false, found_one
= false;
910 for (unsigned i
= 0; i
< 3; i
++)
912 if (instr
->operands
[i
].constantEquals(0))
914 else if (instr
->operands
[i
].constantEquals(0x3f800000)) /* 1.0 */
919 if (found_zero
&& found_one
&& instr
->operands
[idx
].isTemp()) {
920 ctx
.info
[instr
->operands
[idx
].tempId()].set_clamp();
924 case aco_opcode::v_cndmask_b32
:
925 if (instr
->operands
[0].constantEquals(0) &&
926 instr
->operands
[1].constantEquals(0xFFFFFFFF) &&
927 instr
->operands
[2].isTemp())
928 ctx
.info
[instr
->definitions
[0].tempId()].set_vcc(instr
->operands
[2].getTemp());
929 else if (instr
->operands
[0].constantEquals(0) &&
930 instr
->operands
[1].constantEquals(0x3f800000u
) &&
931 instr
->operands
[2].isTemp())
932 ctx
.info
[instr
->definitions
[0].tempId()].set_b2f(instr
->operands
[2].getTemp());
934 case aco_opcode::v_cmp_lg_u32
:
935 if (instr
->format
== Format::VOPC
&& /* don't optimize VOP3 / SDWA / DPP */
936 instr
->operands
[0].constantEquals(0) &&
937 instr
->operands
[1].isTemp() && ctx
.info
[instr
->operands
[1].tempId()].is_vcc())
938 ctx
.info
[instr
->definitions
[0].tempId()].set_temp(ctx
.info
[instr
->operands
[1].tempId()].temp
);
940 case aco_opcode::p_phi
:
941 case aco_opcode::p_linear_phi
: {
942 /* lower_bool_phis() can create phis like this */
943 bool all_same_temp
= instr
->operands
[0].isTemp();
944 /* this check is needed when moving uniform loop counters out of a divergent loop */
946 all_same_temp
= instr
->definitions
[0].regClass() == instr
->operands
[0].regClass();
947 for (unsigned i
= 1; all_same_temp
&& (i
< instr
->operands
.size()); i
++) {
948 if (!instr
->operands
[i
].isTemp() || instr
->operands
[i
].tempId() != instr
->operands
[0].tempId())
949 all_same_temp
= false;
952 ctx
.info
[instr
->definitions
[0].tempId()].set_temp(instr
->operands
[0].getTemp());
954 bool all_undef
= instr
->operands
[0].isUndefined();
955 for (unsigned i
= 1; all_undef
&& (i
< instr
->operands
.size()); i
++) {
956 if (!instr
->operands
[i
].isUndefined())
960 ctx
.info
[instr
->definitions
[0].tempId()].set_undefined();
964 case aco_opcode::v_add_u32
:
965 case aco_opcode::v_add_co_u32
:
966 case aco_opcode::s_add_i32
:
967 case aco_opcode::s_add_u32
:
968 ctx
.info
[instr
->definitions
[0].tempId()].set_add_sub(instr
.get());
970 case aco_opcode::s_not_b32
:
971 case aco_opcode::s_not_b64
:
972 case aco_opcode::s_and_b32
:
973 case aco_opcode::s_and_b64
:
974 case aco_opcode::s_or_b32
:
975 case aco_opcode::s_or_b64
:
976 case aco_opcode::s_xor_b32
:
977 case aco_opcode::s_xor_b64
:
978 case aco_opcode::s_lshl_b32
:
979 case aco_opcode::v_or_b32
:
980 case aco_opcode::v_lshlrev_b32
:
981 ctx
.info
[instr
->definitions
[0].tempId()].set_bitwise(instr
.get());
983 case aco_opcode::v_min_f32
:
984 case aco_opcode::v_min_f16
:
985 case aco_opcode::v_min_u32
:
986 case aco_opcode::v_min_i32
:
987 case aco_opcode::v_min_u16
:
988 case aco_opcode::v_min_i16
:
989 case aco_opcode::v_max_f32
:
990 case aco_opcode::v_max_f16
:
991 case aco_opcode::v_max_u32
:
992 case aco_opcode::v_max_i32
:
993 case aco_opcode::v_max_u16
:
994 case aco_opcode::v_max_i16
:
995 ctx
.info
[instr
->definitions
[0].tempId()].set_minmax(instr
.get());
997 case aco_opcode::v_cmp_lt_f32
:
998 case aco_opcode::v_cmp_eq_f32
:
999 case aco_opcode::v_cmp_le_f32
:
1000 case aco_opcode::v_cmp_gt_f32
:
1001 case aco_opcode::v_cmp_lg_f32
:
1002 case aco_opcode::v_cmp_ge_f32
:
1003 case aco_opcode::v_cmp_o_f32
:
1004 case aco_opcode::v_cmp_u_f32
:
1005 case aco_opcode::v_cmp_nge_f32
:
1006 case aco_opcode::v_cmp_nlg_f32
:
1007 case aco_opcode::v_cmp_ngt_f32
:
1008 case aco_opcode::v_cmp_nle_f32
:
1009 case aco_opcode::v_cmp_neq_f32
:
1010 case aco_opcode::v_cmp_nlt_f32
:
1011 ctx
.info
[instr
->definitions
[0].tempId()].set_fcmp(instr
.get());
1018 ALWAYS_INLINE
bool get_cmp_info(aco_opcode op
, aco_opcode
*ordered
, aco_opcode
*unordered
, aco_opcode
*inverse
)
1020 *ordered
= *unordered
= op
;
1022 #define CMP(ord, unord) \
1023 case aco_opcode::v_cmp_##ord##_f32:\
1024 case aco_opcode::v_cmp_n##unord##_f32:\
1025 *ordered = aco_opcode::v_cmp_##ord##_f32;\
1026 *unordered = aco_opcode::v_cmp_n##unord##_f32;\
1027 *inverse = op == aco_opcode::v_cmp_n##unord##_f32 ? aco_opcode::v_cmp_##unord##_f32 : aco_opcode::v_cmp_n##ord##_f32;\
1041 aco_opcode
get_ordered(aco_opcode op
)
1043 aco_opcode ordered
, unordered
, inverse
;
1044 return get_cmp_info(op
, &ordered
, &unordered
, &inverse
) ? ordered
: aco_opcode::last_opcode
;
1047 aco_opcode
get_unordered(aco_opcode op
)
1049 aco_opcode ordered
, unordered
, inverse
;
1050 return get_cmp_info(op
, &ordered
, &unordered
, &inverse
) ? unordered
: aco_opcode::last_opcode
;
1053 aco_opcode
get_inverse(aco_opcode op
)
1055 aco_opcode ordered
, unordered
, inverse
;
1056 return get_cmp_info(op
, &ordered
, &unordered
, &inverse
) ? inverse
: aco_opcode::last_opcode
;
1059 bool is_cmp(aco_opcode op
)
1061 aco_opcode ordered
, unordered
, inverse
;
1062 return get_cmp_info(op
, &ordered
, &unordered
, &inverse
);
1065 unsigned original_temp_id(opt_ctx
&ctx
, Temp tmp
)
1067 if (ctx
.info
[tmp
.id()].is_temp())
1068 return ctx
.info
[tmp
.id()].temp
.id();
1073 void decrease_uses(opt_ctx
&ctx
, Instruction
* instr
)
1075 if (!--ctx
.uses
[instr
->definitions
[0].tempId()]) {
1076 for (const Operand
& op
: instr
->operands
) {
1078 ctx
.uses
[op
.tempId()]--;
1083 Instruction
*follow_operand(opt_ctx
&ctx
, Operand op
, bool ignore_uses
=false)
1085 if (!op
.isTemp() || !(ctx
.info
[op
.tempId()].label
& instr_labels
))
1087 if (!ignore_uses
&& ctx
.uses
[op
.tempId()] > 1)
1090 Instruction
*instr
= ctx
.info
[op
.tempId()].instr
;
1092 if (instr
->definitions
.size() == 2) {
1093 assert(instr
->definitions
[0].isTemp() && instr
->definitions
[0].tempId() == op
.tempId());
1094 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1101 /* s_or_b64(neq(a, a), neq(b, b)) -> v_cmp_u_f32(a, b)
1102 * s_and_b64(eq(a, a), eq(b, b)) -> v_cmp_o_f32(a, b) */
1103 bool combine_ordering_test(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
1105 if (instr
->opcode
!= aco_opcode::s_or_b64
&& instr
->opcode
!= aco_opcode::s_and_b64
)
1107 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1110 bool neg
[2] = {false, false};
1111 bool abs
[2] = {false, false};
1112 bool opsel
[2] = {false, false};
1113 Instruction
*op_instr
[2];
1116 for (unsigned i
= 0; i
< 2; i
++) {
1117 op_instr
[i
] = follow_operand(ctx
, instr
->operands
[i
], true);
1121 aco_opcode expected_cmp
= instr
->opcode
== aco_opcode::s_or_b64
?
1122 aco_opcode::v_cmp_neq_f32
: aco_opcode::v_cmp_eq_f32
;
1124 if (op_instr
[i
]->opcode
!= expected_cmp
)
1126 if (!op_instr
[i
]->operands
[0].isTemp() || !op_instr
[i
]->operands
[1].isTemp())
1129 if (op_instr
[i
]->isVOP3()) {
1130 VOP3A_instruction
*vop3
= static_cast<VOP3A_instruction
*>(op_instr
[i
]);
1131 if (vop3
->neg
[0] != vop3
->neg
[1] || vop3
->abs
[0] != vop3
->abs
[1] || vop3
->opsel
[0] != vop3
->opsel
[1])
1133 neg
[i
] = vop3
->neg
[0];
1134 abs
[i
] = vop3
->abs
[0];
1135 opsel
[i
] = vop3
->opsel
[0];
1138 Temp op0
= op_instr
[i
]->operands
[0].getTemp();
1139 Temp op1
= op_instr
[i
]->operands
[1].getTemp();
1140 if (original_temp_id(ctx
, op0
) != original_temp_id(ctx
, op1
))
1142 /* shouldn't happen yet, but best to be safe */
1143 if (op1
.type() != RegType::vgpr
)
1149 ctx
.uses
[op
[0].id()]++;
1150 ctx
.uses
[op
[1].id()]++;
1151 decrease_uses(ctx
, op_instr
[0]);
1152 decrease_uses(ctx
, op_instr
[1]);
1154 aco_opcode new_op
= instr
->opcode
== aco_opcode::s_or_b64
?
1155 aco_opcode::v_cmp_u_f32
: aco_opcode::v_cmp_o_f32
;
1156 Instruction
*new_instr
;
1157 if (neg
[0] || neg
[1] || abs
[0] || abs
[1] || opsel
[0] || opsel
[1]) {
1158 VOP3A_instruction
*vop3
= create_instruction
<VOP3A_instruction
>(new_op
, asVOP3(Format::VOPC
), 2, 1);
1159 for (unsigned i
= 0; i
< 2; i
++) {
1160 vop3
->neg
[i
] = neg
[i
];
1161 vop3
->abs
[i
] = abs
[i
];
1162 vop3
->opsel
[i
] = opsel
[i
];
1164 new_instr
= static_cast<Instruction
*>(vop3
);
1166 new_instr
= create_instruction
<VOPC_instruction
>(new_op
, Format::VOPC
, 2, 1);
1168 new_instr
->operands
[0] = Operand(op
[0]);
1169 new_instr
->operands
[1] = Operand(op
[1]);
1170 new_instr
->definitions
[0] = instr
->definitions
[0];
1172 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
1173 ctx
.info
[instr
->definitions
[0].tempId()].set_fcmp(new_instr
);
1175 instr
.reset(new_instr
);
1180 /* s_or_b64(v_cmp_u_f32(a, b), cmp(a, b)) -> get_unordered(cmp)(a, b)
1181 * s_and_b64(v_cmp_o_f32(a, b), cmp(a, b)) -> get_ordered(cmp)(a, b) */
1182 bool combine_comparison_ordering(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
1184 if (instr
->opcode
!= aco_opcode::s_or_b64
&& instr
->opcode
!= aco_opcode::s_and_b64
)
1186 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1189 aco_opcode expected_nan_test
= instr
->opcode
== aco_opcode::s_or_b64
?
1190 aco_opcode::v_cmp_u_f32
: aco_opcode::v_cmp_o_f32
;
1192 Instruction
*nan_test
= follow_operand(ctx
, instr
->operands
[0], true);
1193 Instruction
*cmp
= follow_operand(ctx
, instr
->operands
[1], true);
1194 if (!nan_test
|| !cmp
)
1197 if (cmp
->opcode
== expected_nan_test
)
1198 std::swap(nan_test
, cmp
);
1199 else if (nan_test
->opcode
!= expected_nan_test
)
1202 if (!is_cmp(cmp
->opcode
))
1205 if (!nan_test
->operands
[0].isTemp() || !nan_test
->operands
[1].isTemp())
1207 if (!cmp
->operands
[0].isTemp() || !cmp
->operands
[1].isTemp())
1210 unsigned prop_cmp0
= original_temp_id(ctx
, cmp
->operands
[0].getTemp());
1211 unsigned prop_cmp1
= original_temp_id(ctx
, cmp
->operands
[1].getTemp());
1212 unsigned prop_nan0
= original_temp_id(ctx
, nan_test
->operands
[0].getTemp());
1213 unsigned prop_nan1
= original_temp_id(ctx
, nan_test
->operands
[1].getTemp());
1214 if (prop_cmp0
!= prop_nan0
&& prop_cmp0
!= prop_nan1
)
1216 if (prop_cmp1
!= prop_nan0
&& prop_cmp1
!= prop_nan1
)
1219 ctx
.uses
[cmp
->operands
[0].tempId()]++;
1220 ctx
.uses
[cmp
->operands
[1].tempId()]++;
1221 decrease_uses(ctx
, nan_test
);
1222 decrease_uses(ctx
, cmp
);
1224 aco_opcode new_op
= instr
->opcode
== aco_opcode::s_or_b64
?
1225 get_unordered(cmp
->opcode
) : get_ordered(cmp
->opcode
);
1226 Instruction
*new_instr
;
1227 if (cmp
->isVOP3()) {
1228 VOP3A_instruction
*new_vop3
= create_instruction
<VOP3A_instruction
>(new_op
, asVOP3(Format::VOPC
), 2, 1);
1229 VOP3A_instruction
*cmp_vop3
= static_cast<VOP3A_instruction
*>(cmp
);
1230 memcpy(new_vop3
->abs
, cmp_vop3
->abs
, sizeof(new_vop3
->abs
));
1231 memcpy(new_vop3
->opsel
, cmp_vop3
->opsel
, sizeof(new_vop3
->opsel
));
1232 memcpy(new_vop3
->neg
, cmp_vop3
->neg
, sizeof(new_vop3
->neg
));
1233 new_vop3
->clamp
= cmp_vop3
->clamp
;
1234 new_vop3
->omod
= cmp_vop3
->omod
;
1235 new_instr
= new_vop3
;
1237 new_instr
= create_instruction
<VOPC_instruction
>(new_op
, Format::VOPC
, 2, 1);
1239 new_instr
->operands
[0] = cmp
->operands
[0];
1240 new_instr
->operands
[1] = cmp
->operands
[1];
1241 new_instr
->definitions
[0] = instr
->definitions
[0];
1243 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
1244 ctx
.info
[instr
->definitions
[0].tempId()].set_fcmp(new_instr
);
1246 instr
.reset(new_instr
);
1251 /* s_or_b64(v_cmp_neq_f32(a, a), cmp(a, #b)) and b is not NaN -> get_unordered(cmp)(a, b)
1252 * s_and_b64(v_cmp_eq_f32(a, a), cmp(a, #b)) and b is not NaN -> get_ordered(cmp)(a, b) */
1253 bool combine_constant_comparison_ordering(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
1255 if (instr
->opcode
!= aco_opcode::s_or_b64
&& instr
->opcode
!= aco_opcode::s_and_b64
)
1257 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1260 Instruction
*nan_test
= follow_operand(ctx
, instr
->operands
[0], true);
1261 Instruction
*cmp
= follow_operand(ctx
, instr
->operands
[1], true);
1263 if (!nan_test
|| !cmp
)
1266 aco_opcode expected_nan_test
= instr
->opcode
== aco_opcode::s_or_b64
?
1267 aco_opcode::v_cmp_neq_f32
: aco_opcode::v_cmp_eq_f32
;
1268 if (cmp
->opcode
== expected_nan_test
)
1269 std::swap(nan_test
, cmp
);
1270 else if (nan_test
->opcode
!= expected_nan_test
)
1273 if (!is_cmp(cmp
->opcode
))
1276 if (!nan_test
->operands
[0].isTemp() || !nan_test
->operands
[1].isTemp())
1278 if (!cmp
->operands
[0].isTemp() && !cmp
->operands
[1].isTemp())
1281 unsigned prop_nan0
= original_temp_id(ctx
, nan_test
->operands
[0].getTemp());
1282 unsigned prop_nan1
= original_temp_id(ctx
, nan_test
->operands
[1].getTemp());
1283 if (prop_nan0
!= prop_nan1
)
1286 int constant_operand
= -1;
1287 for (unsigned i
= 0; i
< 2; i
++) {
1288 if (cmp
->operands
[i
].isTemp() && original_temp_id(ctx
, cmp
->operands
[i
].getTemp()) == prop_nan0
) {
1289 constant_operand
= !i
;
1293 if (constant_operand
== -1)
1297 if (cmp
->operands
[constant_operand
].isConstant()) {
1298 constant
= cmp
->operands
[constant_operand
].constantValue();
1299 } else if (cmp
->operands
[constant_operand
].isTemp()) {
1300 unsigned id
= cmp
->operands
[constant_operand
].tempId();
1301 if (!ctx
.info
[id
].is_constant() && !ctx
.info
[id
].is_literal())
1303 constant
= ctx
.info
[id
].val
;
1309 memcpy(&constantf
, &constant
, 4);
1310 if (isnan(constantf
))
1313 if (cmp
->operands
[0].isTemp())
1314 ctx
.uses
[cmp
->operands
[0].tempId()]++;
1315 if (cmp
->operands
[1].isTemp())
1316 ctx
.uses
[cmp
->operands
[1].tempId()]++;
1317 decrease_uses(ctx
, nan_test
);
1318 decrease_uses(ctx
, cmp
);
1320 aco_opcode new_op
= instr
->opcode
== aco_opcode::s_or_b64
?
1321 get_unordered(cmp
->opcode
) : get_ordered(cmp
->opcode
);
1322 Instruction
*new_instr
;
1323 if (cmp
->isVOP3()) {
1324 VOP3A_instruction
*new_vop3
= create_instruction
<VOP3A_instruction
>(new_op
, asVOP3(Format::VOPC
), 2, 1);
1325 VOP3A_instruction
*cmp_vop3
= static_cast<VOP3A_instruction
*>(cmp
);
1326 memcpy(new_vop3
->abs
, cmp_vop3
->abs
, sizeof(new_vop3
->abs
));
1327 memcpy(new_vop3
->opsel
, cmp_vop3
->opsel
, sizeof(new_vop3
->opsel
));
1328 memcpy(new_vop3
->neg
, cmp_vop3
->neg
, sizeof(new_vop3
->neg
));
1329 new_vop3
->clamp
= cmp_vop3
->clamp
;
1330 new_vop3
->omod
= cmp_vop3
->omod
;
1331 new_instr
= new_vop3
;
1333 new_instr
= create_instruction
<VOPC_instruction
>(new_op
, Format::VOPC
, 2, 1);
1335 new_instr
->operands
[0] = cmp
->operands
[0];
1336 new_instr
->operands
[1] = cmp
->operands
[1];
1337 new_instr
->definitions
[0] = instr
->definitions
[0];
1339 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
1340 ctx
.info
[instr
->definitions
[0].tempId()].set_fcmp(new_instr
);
1342 instr
.reset(new_instr
);
1347 /* s_not_b64(cmp(a, b) -> get_inverse(cmp)(a, b) */
1348 bool combine_inverse_comparison(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
1350 if (instr
->opcode
!= aco_opcode::s_not_b64
)
1352 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1354 if (!instr
->operands
[0].isTemp())
1357 Instruction
*cmp
= follow_operand(ctx
, instr
->operands
[0]);
1361 aco_opcode new_opcode
= get_inverse(cmp
->opcode
);
1362 if (new_opcode
== aco_opcode::last_opcode
)
1365 if (cmp
->operands
[0].isTemp())
1366 ctx
.uses
[cmp
->operands
[0].tempId()]++;
1367 if (cmp
->operands
[1].isTemp())
1368 ctx
.uses
[cmp
->operands
[1].tempId()]++;
1369 decrease_uses(ctx
, cmp
);
1371 Instruction
*new_instr
;
1372 if (cmp
->isVOP3()) {
1373 VOP3A_instruction
*new_vop3
= create_instruction
<VOP3A_instruction
>(new_opcode
, asVOP3(Format::VOPC
), 2, 1);
1374 VOP3A_instruction
*cmp_vop3
= static_cast<VOP3A_instruction
*>(cmp
);
1375 memcpy(new_vop3
->abs
, cmp_vop3
->abs
, sizeof(new_vop3
->abs
));
1376 memcpy(new_vop3
->opsel
, cmp_vop3
->opsel
, sizeof(new_vop3
->opsel
));
1377 memcpy(new_vop3
->neg
, cmp_vop3
->neg
, sizeof(new_vop3
->neg
));
1378 new_vop3
->clamp
= cmp_vop3
->clamp
;
1379 new_vop3
->omod
= cmp_vop3
->omod
;
1380 new_instr
= new_vop3
;
1382 new_instr
= create_instruction
<VOPC_instruction
>(new_opcode
, Format::VOPC
, 2, 1);
1384 new_instr
->operands
[0] = cmp
->operands
[0];
1385 new_instr
->operands
[1] = cmp
->operands
[1];
1386 new_instr
->definitions
[0] = instr
->definitions
[0];
1388 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
1389 ctx
.info
[instr
->definitions
[0].tempId()].set_fcmp(new_instr
);
1391 instr
.reset(new_instr
);
1396 /* op1(op2(1, 2), 0) if swap = false
1397 * op1(0, op2(1, 2)) if swap = true */
1398 bool match_op3_for_vop3(opt_ctx
&ctx
, aco_opcode op1
, aco_opcode op2
,
1399 Instruction
* op1_instr
, bool swap
, const char *shuffle_str
,
1400 Operand operands
[3], bool neg
[3], bool abs
[3], bool opsel
[3],
1401 bool *op1_clamp
, unsigned *op1_omod
,
1402 bool *inbetween_neg
, bool *inbetween_abs
, bool *inbetween_opsel
)
1405 if (op1_instr
->opcode
!= op1
)
1408 Instruction
*op2_instr
= follow_operand(ctx
, op1_instr
->operands
[swap
]);
1409 if (!op2_instr
|| op2_instr
->opcode
!= op2
)
1412 VOP3A_instruction
*op1_vop3
= op1_instr
->isVOP3() ? static_cast<VOP3A_instruction
*>(op1_instr
) : NULL
;
1413 VOP3A_instruction
*op2_vop3
= op2_instr
->isVOP3() ? static_cast<VOP3A_instruction
*>(op2_instr
) : NULL
;
1415 /* don't support inbetween clamp/omod */
1416 if (op2_vop3
&& (op2_vop3
->clamp
|| op2_vop3
->omod
))
1419 /* get operands and modifiers and check inbetween modifiers */
1420 *op1_clamp
= op1_vop3
? op1_vop3
->clamp
: false;
1421 *op1_omod
= op1_vop3
? op1_vop3
->omod
: 0u;
1424 *inbetween_neg
= op1_vop3
? op1_vop3
->neg
[swap
] : false;
1425 else if (op1_vop3
&& op1_vop3
->neg
[swap
])
1429 *inbetween_abs
= op1_vop3
? op1_vop3
->abs
[swap
] : false;
1430 else if (op1_vop3
&& op1_vop3
->abs
[swap
])
1433 if (inbetween_opsel
)
1434 *inbetween_opsel
= op1_vop3
? op1_vop3
->opsel
[swap
] : false;
1435 else if (op1_vop3
&& op1_vop3
->opsel
[swap
])
1439 shuffle
[shuffle_str
[0] - '0'] = 0;
1440 shuffle
[shuffle_str
[1] - '0'] = 1;
1441 shuffle
[shuffle_str
[2] - '0'] = 2;
1443 operands
[shuffle
[0]] = op1_instr
->operands
[!swap
];
1444 neg
[shuffle
[0]] = op1_vop3
? op1_vop3
->neg
[!swap
] : false;
1445 abs
[shuffle
[0]] = op1_vop3
? op1_vop3
->abs
[!swap
] : false;
1446 opsel
[shuffle
[0]] = op1_vop3
? op1_vop3
->opsel
[!swap
] : false;
1448 for (unsigned i
= 0; i
< 2; i
++) {
1449 operands
[shuffle
[i
+ 1]] = op2_instr
->operands
[i
];
1450 neg
[shuffle
[i
+ 1]] = op2_vop3
? op2_vop3
->neg
[i
] : false;
1451 abs
[shuffle
[i
+ 1]] = op2_vop3
? op2_vop3
->abs
[i
] : false;
1452 opsel
[shuffle
[i
+ 1]] = op2_vop3
? op2_vop3
->opsel
[i
] : false;
1455 /* check operands */
1456 unsigned sgpr_id
= 0;
1457 for (unsigned i
= 0; i
< 3; i
++) {
1458 Operand op
= operands
[i
];
1459 if (op
.isLiteral()) {
1461 } else if (op
.isTemp() && op
.getTemp().type() == RegType::sgpr
) {
1462 if (sgpr_id
&& sgpr_id
!= op
.tempId())
1464 sgpr_id
= op
.tempId();
1471 void create_vop3_for_op3(opt_ctx
& ctx
, aco_opcode opcode
, aco_ptr
<Instruction
>& instr
,
1472 Operand operands
[3], bool neg
[3], bool abs
[3], bool opsel
[3],
1473 bool clamp
, unsigned omod
)
1475 VOP3A_instruction
*new_instr
= create_instruction
<VOP3A_instruction
>(opcode
, Format::VOP3A
, 3, 1);
1476 memcpy(new_instr
->abs
, abs
, sizeof(bool[3]));
1477 memcpy(new_instr
->opsel
, opsel
, sizeof(bool[3]));
1478 memcpy(new_instr
->neg
, neg
, sizeof(bool[3]));
1479 new_instr
->clamp
= clamp
;
1480 new_instr
->omod
= omod
;
1481 new_instr
->operands
[0] = operands
[0];
1482 new_instr
->operands
[1] = operands
[1];
1483 new_instr
->operands
[2] = operands
[2];
1484 new_instr
->definitions
[0] = instr
->definitions
[0];
1485 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
1487 instr
.reset(new_instr
);
1490 bool combine_three_valu_op(opt_ctx
& ctx
, aco_ptr
<Instruction
>& instr
, aco_opcode op2
, aco_opcode new_op
, const char *shuffle
, uint8_t ops
)
1492 uint32_t omod_clamp
= ctx
.info
[instr
->definitions
[0].tempId()].label
&
1493 (label_omod_success
| label_clamp_success
);
1495 for (unsigned swap
= 0; swap
< 2; swap
++) {
1496 if (!((1 << swap
) & ops
))
1499 Operand operands
[3];
1500 bool neg
[3], abs
[3], opsel
[3], clamp
;
1502 if (match_op3_for_vop3(ctx
, instr
->opcode
, op2
,
1503 instr
.get(), swap
, shuffle
,
1504 operands
, neg
, abs
, opsel
,
1505 &clamp
, &omod
, NULL
, NULL
, NULL
)) {
1506 ctx
.uses
[instr
->operands
[swap
].tempId()]--;
1507 create_vop3_for_op3(ctx
, new_op
, instr
, operands
, neg
, abs
, opsel
, clamp
, omod
);
1508 if (omod_clamp
& label_omod_success
)
1509 ctx
.info
[instr
->definitions
[0].tempId()].set_omod_success(instr
.get());
1510 if (omod_clamp
& label_clamp_success
)
1511 ctx
.info
[instr
->definitions
[0].tempId()].set_clamp_success(instr
.get());
1518 /* s_not_b32(s_and_b32(a, b)) -> s_nand_b32(a, b)
1519 * s_not_b32(s_or_b32(a, b)) -> s_nor_b32(a, b)
1520 * s_not_b32(s_xor_b32(a, b)) -> s_xnor_b32(a, b)
1521 * s_not_b64(s_and_b64(a, b)) -> s_nand_b64(a, b)
1522 * s_not_b64(s_or_b64(a, b)) -> s_nor_b64(a, b)
1523 * s_not_b64(s_xor_b64(a, b)) -> s_xnor_b64(a, b) */
1524 bool combine_salu_not_bitwise(opt_ctx
& ctx
, aco_ptr
<Instruction
>& instr
)
1527 if (!instr
->operands
[0].isTemp())
1529 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1532 Instruction
*op2_instr
= follow_operand(ctx
, instr
->operands
[0]);
1535 switch (op2_instr
->opcode
) {
1536 case aco_opcode::s_and_b32
:
1537 case aco_opcode::s_or_b32
:
1538 case aco_opcode::s_xor_b32
:
1539 case aco_opcode::s_and_b64
:
1540 case aco_opcode::s_or_b64
:
1541 case aco_opcode::s_xor_b64
:
1547 /* create instruction */
1548 std::swap(instr
->definitions
[0], op2_instr
->definitions
[0]);
1549 ctx
.uses
[instr
->operands
[0].tempId()]--;
1550 ctx
.info
[op2_instr
->definitions
[0].tempId()].label
= 0;
1552 switch (op2_instr
->opcode
) {
1553 case aco_opcode::s_and_b32
:
1554 op2_instr
->opcode
= aco_opcode::s_nand_b32
;
1556 case aco_opcode::s_or_b32
:
1557 op2_instr
->opcode
= aco_opcode::s_nor_b32
;
1559 case aco_opcode::s_xor_b32
:
1560 op2_instr
->opcode
= aco_opcode::s_xnor_b32
;
1562 case aco_opcode::s_and_b64
:
1563 op2_instr
->opcode
= aco_opcode::s_nand_b64
;
1565 case aco_opcode::s_or_b64
:
1566 op2_instr
->opcode
= aco_opcode::s_nor_b64
;
1568 case aco_opcode::s_xor_b64
:
1569 op2_instr
->opcode
= aco_opcode::s_xnor_b64
;
1578 /* s_and_b32(a, s_not_b32(b)) -> s_andn2_b32(a, b)
1579 * s_or_b32(a, s_not_b32(b)) -> s_orn2_b32(a, b)
1580 * s_and_b64(a, s_not_b64(b)) -> s_andn2_b64(a, b)
1581 * s_or_b64(a, s_not_b64(b)) -> s_orn2_b64(a, b) */
1582 bool combine_salu_n2(opt_ctx
& ctx
, aco_ptr
<Instruction
>& instr
)
1584 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1587 for (unsigned i
= 0; i
< 2; i
++) {
1588 Instruction
*op2_instr
= follow_operand(ctx
, instr
->operands
[i
]);
1589 if (!op2_instr
|| (op2_instr
->opcode
!= aco_opcode::s_not_b32
&& op2_instr
->opcode
!= aco_opcode::s_not_b64
))
1592 ctx
.uses
[instr
->operands
[i
].tempId()]--;
1593 instr
->operands
[0] = instr
->operands
[!i
];
1594 instr
->operands
[1] = op2_instr
->operands
[0];
1595 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
1597 switch (instr
->opcode
) {
1598 case aco_opcode::s_and_b32
:
1599 instr
->opcode
= aco_opcode::s_andn2_b32
;
1601 case aco_opcode::s_or_b32
:
1602 instr
->opcode
= aco_opcode::s_orn2_b32
;
1604 case aco_opcode::s_and_b64
:
1605 instr
->opcode
= aco_opcode::s_andn2_b64
;
1607 case aco_opcode::s_or_b64
:
1608 instr
->opcode
= aco_opcode::s_orn2_b64
;
1619 /* s_add_{i32,u32}(a, s_lshl_b32(b, <n>)) -> s_lshl<n>_add_u32(a, b) */
1620 bool combine_salu_lshl_add(opt_ctx
& ctx
, aco_ptr
<Instruction
>& instr
)
1622 if (instr
->definitions
[1].isTemp() && ctx
.uses
[instr
->definitions
[1].tempId()])
1625 for (unsigned i
= 0; i
< 2; i
++) {
1626 Instruction
*op2_instr
= follow_operand(ctx
, instr
->operands
[i
]);
1627 if (!op2_instr
|| op2_instr
->opcode
!= aco_opcode::s_lshl_b32
|| !op2_instr
->operands
[1].isConstant())
1630 uint32_t shift
= op2_instr
->operands
[1].constantValue();
1631 if (shift
< 1 || shift
> 4)
1634 ctx
.uses
[instr
->operands
[i
].tempId()]--;
1635 instr
->operands
[1] = instr
->operands
[!i
];
1636 instr
->operands
[0] = op2_instr
->operands
[0];
1637 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
1639 instr
->opcode
= ((aco_opcode
[]){aco_opcode::s_lshl1_add_u32
,
1640 aco_opcode::s_lshl2_add_u32
,
1641 aco_opcode::s_lshl3_add_u32
,
1642 aco_opcode::s_lshl4_add_u32
})[shift
- 1];
1649 bool get_minmax_info(aco_opcode op
, aco_opcode
*min
, aco_opcode
*max
, aco_opcode
*min3
, aco_opcode
*max3
, aco_opcode
*med3
, bool *some_gfx9_only
)
1652 #define MINMAX(type, gfx9) \
1653 case aco_opcode::v_min_##type:\
1654 case aco_opcode::v_max_##type:\
1655 case aco_opcode::v_med3_##type:\
1656 *min = aco_opcode::v_min_##type;\
1657 *max = aco_opcode::v_max_##type;\
1658 *med3 = aco_opcode::v_med3_##type;\
1659 *min3 = aco_opcode::v_min3_##type;\
1660 *max3 = aco_opcode::v_max3_##type;\
1661 *some_gfx9_only = gfx9;\
1675 /* v_min_{f,u,i}{16,32}(v_max_{f,u,i}{16,32}(a, lb), ub) -> v_med3_{f,u,i}{16,32}(a, lb, ub) when ub > lb
1676 * v_max_{f,u,i}{16,32}(v_min_{f,u,i}{16,32}(a, ub), lb) -> v_med3_{f,u,i}{16,32}(a, lb, ub) when ub > lb */
1677 bool combine_clamp(opt_ctx
& ctx
, aco_ptr
<Instruction
>& instr
,
1678 aco_opcode min
, aco_opcode max
, aco_opcode med
)
1680 aco_opcode other_op
;
1681 if (instr
->opcode
== min
)
1683 else if (instr
->opcode
== max
)
1688 uint32_t omod_clamp
= ctx
.info
[instr
->definitions
[0].tempId()].label
&
1689 (label_omod_success
| label_clamp_success
);
1691 for (unsigned swap
= 0; swap
< 2; swap
++) {
1692 Operand operands
[3];
1693 bool neg
[3], abs
[3], opsel
[3], clamp
, inbetween_neg
, inbetween_abs
;
1695 if (match_op3_for_vop3(ctx
, instr
->opcode
, other_op
, instr
.get(), swap
,
1696 "012", operands
, neg
, abs
, opsel
,
1697 &clamp
, &omod
, &inbetween_neg
, &inbetween_abs
, NULL
)) {
1698 int const0_idx
= -1, const1_idx
= -1;
1699 uint32_t const0
= 0, const1
= 0;
1700 for (int i
= 0; i
< 3; i
++) {
1702 if (operands
[i
].isConstant()) {
1703 val
= operands
[i
].constantValue();
1704 } else if (operands
[i
].isTemp() && ctx
.uses
[operands
[i
].tempId()] == 1 &&
1705 ctx
.info
[operands
[i
].tempId()].is_constant_or_literal()) {
1706 val
= ctx
.info
[operands
[i
].tempId()].val
;
1710 if (const0_idx
>= 0) {
1718 if (const0_idx
< 0 || const1_idx
< 0)
1721 if (opsel
[const0_idx
])
1723 if (opsel
[const1_idx
])
1726 int lower_idx
= const0_idx
;
1728 case aco_opcode::v_min_f32
:
1729 case aco_opcode::v_min_f16
: {
1730 float const0_f
, const1_f
;
1731 if (min
== aco_opcode::v_min_f32
) {
1732 memcpy(&const0_f
, &const0
, 4);
1733 memcpy(&const1_f
, &const1
, 4);
1735 const0_f
= _mesa_half_to_float(const0
);
1736 const1_f
= _mesa_half_to_float(const1
);
1738 if (abs
[const0_idx
]) const0_f
= fabsf(const0_f
);
1739 if (abs
[const1_idx
]) const1_f
= fabsf(const1_f
);
1740 if (neg
[const0_idx
]) const0_f
= -const0_f
;
1741 if (neg
[const1_idx
]) const1_f
= -const1_f
;
1742 lower_idx
= const0_f
< const1_f
? const0_idx
: const1_idx
;
1745 case aco_opcode::v_min_u32
: {
1746 lower_idx
= const0
< const1
? const0_idx
: const1_idx
;
1749 case aco_opcode::v_min_u16
: {
1750 lower_idx
= (uint16_t)const0
< (uint16_t)const1
? const0_idx
: const1_idx
;
1753 case aco_opcode::v_min_i32
: {
1754 int32_t const0_i
= const0
& 0x80000000u
? -2147483648 + (int32_t)(const0
& 0x7fffffffu
) : const0
;
1755 int32_t const1_i
= const1
& 0x80000000u
? -2147483648 + (int32_t)(const1
& 0x7fffffffu
) : const1
;
1756 lower_idx
= const0_i
< const1_i
? const0_idx
: const1_idx
;
1759 case aco_opcode::v_min_i16
: {
1760 int16_t const0_i
= const0
& 0x8000u
? -32768 + (int16_t)(const0
& 0x7fffu
) : const0
;
1761 int16_t const1_i
= const1
& 0x8000u
? -32768 + (int16_t)(const1
& 0x7fffu
) : const1
;
1762 lower_idx
= const0_i
< const1_i
? const0_idx
: const1_idx
;
1768 int upper_idx
= lower_idx
== const0_idx
? const1_idx
: const0_idx
;
1770 if (instr
->opcode
== min
) {
1771 if (upper_idx
!= 0 || lower_idx
== 0)
1774 if (upper_idx
== 0 || lower_idx
!= 0)
1778 neg
[1] ^= inbetween_neg
;
1779 neg
[2] ^= inbetween_neg
;
1780 abs
[1] |= inbetween_abs
;
1781 abs
[2] |= inbetween_abs
;
1783 ctx
.uses
[instr
->operands
[swap
].tempId()]--;
1784 create_vop3_for_op3(ctx
, med
, instr
, operands
, neg
, abs
, opsel
, clamp
, omod
);
1785 if (omod_clamp
& label_omod_success
)
1786 ctx
.info
[instr
->definitions
[0].tempId()].set_omod_success(instr
.get());
1787 if (omod_clamp
& label_clamp_success
)
1788 ctx
.info
[instr
->definitions
[0].tempId()].set_clamp_success(instr
.get());
1798 void apply_sgprs(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
1801 uint32_t sgpr_idx
= 0;
1802 uint32_t sgpr_info_id
= 0;
1803 bool has_sgpr
= false;
1804 uint32_t sgpr_ssa_id
= 0;
1805 /* find 'best' possible sgpr */
1806 for (unsigned i
= 0; i
< instr
->operands
.size(); i
++)
1808 if (instr
->operands
[i
].isLiteral()) {
1812 if (!instr
->operands
[i
].isTemp())
1814 if (instr
->operands
[i
].getTemp().type() == RegType::sgpr
) {
1816 sgpr_ssa_id
= instr
->operands
[i
].tempId();
1819 ssa_info
& info
= ctx
.info
[instr
->operands
[i
].tempId()];
1820 if (info
.is_temp() && info
.temp
.type() == RegType::sgpr
) {
1821 uint16_t uses
= ctx
.uses
[instr
->operands
[i
].tempId()];
1822 if (sgpr_info_id
== 0 || uses
< ctx
.uses
[sgpr_info_id
]) {
1824 sgpr_info_id
= instr
->operands
[i
].tempId();
1828 if (!has_sgpr
&& sgpr_info_id
!= 0) {
1829 ssa_info
& info
= ctx
.info
[sgpr_info_id
];
1830 if (sgpr_idx
== 0 || instr
->isVOP3()) {
1831 instr
->operands
[sgpr_idx
] = Operand(info
.temp
);
1832 ctx
.uses
[sgpr_info_id
]--;
1833 ctx
.uses
[info
.temp
.id()]++;
1834 } else if (can_swap_operands(instr
)) {
1835 instr
->operands
[sgpr_idx
] = instr
->operands
[0];
1836 instr
->operands
[0] = Operand(info
.temp
);
1837 ctx
.uses
[sgpr_info_id
]--;
1838 ctx
.uses
[info
.temp
.id()]++;
1839 } else if (can_use_VOP3(instr
)) {
1840 to_VOP3(ctx
, instr
);
1841 instr
->operands
[sgpr_idx
] = Operand(info
.temp
);
1842 ctx
.uses
[sgpr_info_id
]--;
1843 ctx
.uses
[info
.temp
.id()]++;
1846 /* we can have two sgprs on one instruction if it is the same sgpr! */
1847 } else if (sgpr_info_id
!= 0 &&
1848 sgpr_ssa_id
== sgpr_info_id
&&
1849 ctx
.uses
[sgpr_info_id
] == 1 &&
1850 can_use_VOP3(instr
)) {
1851 to_VOP3(ctx
, instr
);
1852 instr
->operands
[sgpr_idx
] = Operand(ctx
.info
[sgpr_info_id
].temp
);
1853 ctx
.uses
[sgpr_info_id
]--;
1854 ctx
.uses
[ctx
.info
[sgpr_info_id
].temp
.id()]++;
1858 bool apply_omod_clamp(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
1860 /* check if we could apply omod on predecessor */
1861 if (instr
->opcode
== aco_opcode::v_mul_f32
) {
1862 if (instr
->operands
[1].isTemp() && ctx
.info
[instr
->operands
[1].tempId()].is_omod_success()) {
1864 /* omod was successfully applied */
1865 /* if the omod instruction is v_mad, we also have to change the original add */
1866 if (ctx
.info
[instr
->operands
[1].tempId()].is_mad()) {
1867 Instruction
* add_instr
= ctx
.mad_infos
[ctx
.info
[instr
->operands
[1].tempId()].val
].add_instr
.get();
1868 if (ctx
.info
[instr
->definitions
[0].tempId()].is_clamp())
1869 static_cast<VOP3A_instruction
*>(add_instr
)->clamp
= true;
1870 add_instr
->definitions
[0] = instr
->definitions
[0];
1873 Instruction
* omod_instr
= ctx
.info
[instr
->operands
[1].tempId()].instr
;
1874 /* check if we have an additional clamp modifier */
1875 if (ctx
.info
[instr
->definitions
[0].tempId()].is_clamp() && ctx
.uses
[instr
->definitions
[0].tempId()] == 1) {
1876 static_cast<VOP3A_instruction
*>(omod_instr
)->clamp
= true;
1877 ctx
.info
[instr
->definitions
[0].tempId()].set_clamp_success(omod_instr
);
1879 /* change definition ssa-id of modified instruction */
1880 omod_instr
->definitions
[0] = instr
->definitions
[0];
1882 /* change the definition of instr to something unused, e.g. the original omod def */
1883 instr
->definitions
[0] = Definition(instr
->operands
[1].getTemp());
1884 ctx
.uses
[instr
->definitions
[0].tempId()] = 0;
1887 if (!ctx
.info
[instr
->definitions
[0].tempId()].label
) {
1888 /* in all other cases, label this instruction as option for multiply-add */
1889 ctx
.info
[instr
->definitions
[0].tempId()].set_mul(instr
.get());
1893 /* check if we could apply clamp on predecessor */
1894 if (instr
->opcode
== aco_opcode::v_med3_f32
) {
1896 bool found_zero
= false, found_one
= false;
1897 for (unsigned i
= 0; i
< 3; i
++)
1899 if (instr
->operands
[i
].constantEquals(0))
1901 else if (instr
->operands
[i
].constantEquals(0x3f800000)) /* 1.0 */
1906 if (found_zero
&& found_one
&& instr
->operands
[idx
].isTemp() &&
1907 ctx
.info
[instr
->operands
[idx
].tempId()].is_clamp_success()) {
1908 /* clamp was successfully applied */
1909 /* if the clamp instruction is v_mad, we also have to change the original add */
1910 if (ctx
.info
[instr
->operands
[idx
].tempId()].is_mad()) {
1911 Instruction
* add_instr
= ctx
.mad_infos
[ctx
.info
[instr
->operands
[idx
].tempId()].val
].add_instr
.get();
1912 add_instr
->definitions
[0] = instr
->definitions
[0];
1914 Instruction
* clamp_instr
= ctx
.info
[instr
->operands
[idx
].tempId()].instr
;
1915 /* change definition ssa-id of modified instruction */
1916 clamp_instr
->definitions
[0] = instr
->definitions
[0];
1918 /* change the definition of instr to something unused, e.g. the original omod def */
1919 instr
->definitions
[0] = Definition(instr
->operands
[idx
].getTemp());
1920 ctx
.uses
[instr
->definitions
[0].tempId()] = 0;
1925 /* apply omod / clamp modifiers if the def is used only once and the instruction can have modifiers */
1926 if (!instr
->definitions
.empty() && ctx
.uses
[instr
->definitions
[0].tempId()] == 1 &&
1927 can_use_VOP3(instr
) && instr_info
.can_use_output_modifiers
[(int)instr
->opcode
]) {
1928 if(ctx
.info
[instr
->definitions
[0].tempId()].is_omod2()) {
1929 to_VOP3(ctx
, instr
);
1930 static_cast<VOP3A_instruction
*>(instr
.get())->omod
= 1;
1931 ctx
.info
[instr
->definitions
[0].tempId()].set_omod_success(instr
.get());
1932 } else if (ctx
.info
[instr
->definitions
[0].tempId()].is_omod4()) {
1933 to_VOP3(ctx
, instr
);
1934 static_cast<VOP3A_instruction
*>(instr
.get())->omod
= 2;
1935 ctx
.info
[instr
->definitions
[0].tempId()].set_omod_success(instr
.get());
1936 } else if (ctx
.info
[instr
->definitions
[0].tempId()].is_omod5()) {
1937 to_VOP3(ctx
, instr
);
1938 static_cast<VOP3A_instruction
*>(instr
.get())->omod
= 3;
1939 ctx
.info
[instr
->definitions
[0].tempId()].set_omod_success(instr
.get());
1940 } else if (ctx
.info
[instr
->definitions
[0].tempId()].is_clamp()) {
1941 to_VOP3(ctx
, instr
);
1942 static_cast<VOP3A_instruction
*>(instr
.get())->clamp
= true;
1943 ctx
.info
[instr
->definitions
[0].tempId()].set_clamp_success(instr
.get());
1950 // TODO: we could possibly move the whole label_instruction pass to combine_instruction:
1951 // this would mean that we'd have to fix the instruction uses while value propagation
1953 void combine_instruction(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
1955 if (instr
->definitions
.empty() || !ctx
.uses
[instr
->definitions
[0].tempId()])
1958 if (instr
->isVALU()) {
1959 if (can_apply_sgprs(instr
))
1960 apply_sgprs(ctx
, instr
);
1961 if (apply_omod_clamp(ctx
, instr
))
1965 /* TODO: There are still some peephole optimizations that could be done:
1966 * - abs(a - b) -> s_absdiff_i32
1967 * - various patterns for s_bitcmp{0,1}_b32 and s_bitset{0,1}_b32
1968 * - patterns for v_alignbit_b32 and v_alignbyte_b32
1969 * These aren't probably too interesting though.
1970 * There are also patterns for v_cmp_class_f{16,32,64}. This is difficult but
1971 * probably more useful than the previously mentioned optimizations.
1972 * The various comparison optimizations also currently only work with 32-bit
1975 /* neg(mul(a, b)) -> mul(neg(a), b) */
1976 if (ctx
.info
[instr
->definitions
[0].tempId()].is_neg() && ctx
.uses
[instr
->operands
[1].tempId()] == 1) {
1977 Temp val
= ctx
.info
[instr
->definitions
[0].tempId()].temp
;
1979 if (!ctx
.info
[val
.id()].is_mul())
1982 Instruction
* mul_instr
= ctx
.info
[val
.id()].instr
;
1984 if (mul_instr
->operands
[0].isLiteral())
1986 if (mul_instr
->isVOP3() && static_cast<VOP3A_instruction
*>(mul_instr
)->clamp
)
1989 /* convert to mul(neg(a), b) */
1990 ctx
.uses
[mul_instr
->definitions
[0].tempId()]--;
1991 Definition def
= instr
->definitions
[0];
1992 /* neg(abs(mul(a, b))) -> mul(neg(abs(a)), abs(b)) */
1993 bool is_abs
= ctx
.info
[instr
->definitions
[0].tempId()].is_abs();
1994 instr
.reset(create_instruction
<VOP3A_instruction
>(aco_opcode::v_mul_f32
, asVOP3(Format::VOP2
), 2, 1));
1995 instr
->operands
[0] = mul_instr
->operands
[0];
1996 instr
->operands
[1] = mul_instr
->operands
[1];
1997 instr
->definitions
[0] = def
;
1998 VOP3A_instruction
* new_mul
= static_cast<VOP3A_instruction
*>(instr
.get());
1999 if (mul_instr
->isVOP3()) {
2000 VOP3A_instruction
* mul
= static_cast<VOP3A_instruction
*>(mul_instr
);
2001 new_mul
->neg
[0] = mul
->neg
[0] && !is_abs
;
2002 new_mul
->neg
[1] = mul
->neg
[1] && !is_abs
;
2003 new_mul
->abs
[0] = mul
->abs
[0] || is_abs
;
2004 new_mul
->abs
[1] = mul
->abs
[1] || is_abs
;
2005 new_mul
->omod
= mul
->omod
;
2007 new_mul
->neg
[0] ^= true;
2008 new_mul
->clamp
= false;
2010 ctx
.info
[instr
->definitions
[0].tempId()].set_mul(instr
.get());
2013 /* combine mul+add -> mad */
2014 else if (instr
->opcode
== aco_opcode::v_add_f32
||
2015 instr
->opcode
== aco_opcode::v_sub_f32
||
2016 instr
->opcode
== aco_opcode::v_subrev_f32
) {
2018 uint32_t uses_src0
= UINT32_MAX
;
2019 uint32_t uses_src1
= UINT32_MAX
;
2020 Instruction
* mul_instr
= nullptr;
2021 unsigned add_op_idx
;
2022 /* check if any of the operands is a multiplication */
2023 if (instr
->operands
[0].isTemp() && ctx
.info
[instr
->operands
[0].tempId()].is_mul())
2024 uses_src0
= ctx
.uses
[instr
->operands
[0].tempId()];
2025 if (instr
->operands
[1].isTemp() && ctx
.info
[instr
->operands
[1].tempId()].is_mul())
2026 uses_src1
= ctx
.uses
[instr
->operands
[1].tempId()];
2028 /* find the 'best' mul instruction to combine with the add */
2029 if (uses_src0
< uses_src1
) {
2030 mul_instr
= ctx
.info
[instr
->operands
[0].tempId()].instr
;
2032 } else if (uses_src1
< uses_src0
) {
2033 mul_instr
= ctx
.info
[instr
->operands
[1].tempId()].instr
;
2035 } else if (uses_src0
!= UINT32_MAX
) {
2036 /* tiebreaker: quite random what to pick */
2037 if (ctx
.info
[instr
->operands
[0].tempId()].instr
->operands
[0].isLiteral()) {
2038 mul_instr
= ctx
.info
[instr
->operands
[1].tempId()].instr
;
2041 mul_instr
= ctx
.info
[instr
->operands
[0].tempId()].instr
;
2046 Operand op
[3] = {Operand(v1
), Operand(v1
), Operand(v1
)};
2047 bool neg
[3] = {false, false, false};
2048 bool abs
[3] = {false, false, false};
2051 bool need_vop3
= false;
2053 op
[0] = mul_instr
->operands
[0];
2054 op
[1] = mul_instr
->operands
[1];
2055 op
[2] = instr
->operands
[add_op_idx
];
2056 for (unsigned i
= 0; i
< 3; i
++)
2058 if (op
[i
].isLiteral())
2060 if (op
[i
].isTemp() && op
[i
].getTemp().type() == RegType::sgpr
)
2062 if (!(i
== 0 || (op
[i
].isTemp() && op
[i
].getTemp().type() == RegType::vgpr
)))
2065 // TODO: would be better to check this before selecting a mul instr?
2069 if (mul_instr
->isVOP3()) {
2070 VOP3A_instruction
* vop3
= static_cast<VOP3A_instruction
*> (mul_instr
);
2071 neg
[0] = vop3
->neg
[0];
2072 neg
[1] = vop3
->neg
[1];
2073 abs
[0] = vop3
->abs
[0];
2074 abs
[1] = vop3
->abs
[1];
2076 /* we cannot use these modifiers between mul and add */
2077 if (vop3
->clamp
|| vop3
->omod
)
2081 /* convert to mad */
2082 ctx
.uses
[mul_instr
->definitions
[0].tempId()]--;
2083 if (ctx
.uses
[mul_instr
->definitions
[0].tempId()]) {
2085 ctx
.uses
[op
[0].tempId()]++;
2087 ctx
.uses
[op
[1].tempId()]++;
2090 if (instr
->isVOP3()) {
2091 VOP3A_instruction
* vop3
= static_cast<VOP3A_instruction
*> (instr
.get());
2092 neg
[2] = vop3
->neg
[add_op_idx
];
2093 abs
[2] = vop3
->abs
[add_op_idx
];
2095 clamp
= vop3
->clamp
;
2096 /* abs of the multiplication result */
2097 if (vop3
->abs
[1 - add_op_idx
]) {
2103 /* neg of the multiplication result */
2104 neg
[1] = neg
[1] ^ vop3
->neg
[1 - add_op_idx
];
2107 if (instr
->opcode
== aco_opcode::v_sub_f32
) {
2108 neg
[1 + add_op_idx
] = neg
[1 + add_op_idx
] ^ true;
2110 } else if (instr
->opcode
== aco_opcode::v_subrev_f32
) {
2111 neg
[2 - add_op_idx
] = neg
[2 - add_op_idx
] ^ true;
2115 aco_ptr
<VOP3A_instruction
> mad
{create_instruction
<VOP3A_instruction
>(aco_opcode::v_mad_f32
, Format::VOP3A
, 3, 1)};
2116 for (unsigned i
= 0; i
< 3; i
++)
2118 mad
->operands
[i
] = op
[i
];
2119 mad
->neg
[i
] = neg
[i
];
2120 mad
->abs
[i
] = abs
[i
];
2124 mad
->definitions
[0] = instr
->definitions
[0];
2126 /* mark this ssa_def to be re-checked for profitability and literals */
2127 ctx
.mad_infos
.emplace_back(std::move(instr
), mul_instr
->definitions
[0].tempId(), need_vop3
);
2128 ctx
.info
[mad
->definitions
[0].tempId()].set_mad(mad
.get(), ctx
.mad_infos
.size() - 1);
2129 instr
.reset(mad
.release());
2133 /* v_mul_f32(v_cndmask_b32(0, 1.0, cond), a) -> v_cndmask_b32(0, a, cond) */
2134 else if (instr
->opcode
== aco_opcode::v_mul_f32
&& !instr
->isVOP3()) {
2135 for (unsigned i
= 0; i
< 2; i
++) {
2136 if (instr
->operands
[i
].isTemp() && ctx
.info
[instr
->operands
[i
].tempId()].is_b2f() &&
2137 ctx
.uses
[instr
->operands
[i
].tempId()] == 1 &&
2138 instr
->operands
[!i
].isTemp() && instr
->operands
[!i
].getTemp().type() == RegType::vgpr
) {
2139 ctx
.uses
[instr
->operands
[i
].tempId()]--;
2140 ctx
.uses
[ctx
.info
[instr
->operands
[i
].tempId()].temp
.id()]++;
2142 aco_ptr
<VOP2_instruction
> new_instr
{create_instruction
<VOP2_instruction
>(aco_opcode::v_cndmask_b32
, Format::VOP2
, 3, 1)};
2143 new_instr
->operands
[0] = Operand(0u);
2144 new_instr
->operands
[1] = instr
->operands
[!i
];
2145 new_instr
->operands
[2] = Operand(ctx
.info
[instr
->operands
[i
].tempId()].temp
);
2146 new_instr
->definitions
[0] = instr
->definitions
[0];
2147 instr
.reset(new_instr
.release());
2148 ctx
.info
[instr
->definitions
[0].tempId()].label
= 0;
2152 } else if (instr
->opcode
== aco_opcode::v_or_b32
&& ctx
.program
->chip_class
>= GFX9
) {
2153 if (combine_three_valu_op(ctx
, instr
, aco_opcode::v_or_b32
, aco_opcode::v_or3_b32
, "012", 1 | 2)) ;
2154 else if (combine_three_valu_op(ctx
, instr
, aco_opcode::v_and_b32
, aco_opcode::v_and_or_b32
, "120", 1 | 2)) ;
2155 else combine_three_valu_op(ctx
, instr
, aco_opcode::v_lshlrev_b32
, aco_opcode::v_lshl_or_b32
, "210", 1 | 2);
2156 } else if (instr
->opcode
== aco_opcode::v_add_u32
&& ctx
.program
->chip_class
>= GFX9
) {
2157 if (combine_three_valu_op(ctx
, instr
, aco_opcode::v_xor_b32
, aco_opcode::v_xad_u32
, "120", 1 | 2)) ;
2158 else if (combine_three_valu_op(ctx
, instr
, aco_opcode::v_add_u32
, aco_opcode::v_add3_u32
, "012", 1 | 2)) ;
2159 else combine_three_valu_op(ctx
, instr
, aco_opcode::v_lshlrev_b32
, aco_opcode::v_lshl_add_u32
, "210", 1 | 2);
2160 } else if (instr
->opcode
== aco_opcode::v_lshlrev_b32
&& ctx
.program
->chip_class
>= GFX9
) {
2161 combine_three_valu_op(ctx
, instr
, aco_opcode::v_add_u32
, aco_opcode::v_add_lshl_u32
, "120", 2);
2162 } else if ((instr
->opcode
== aco_opcode::s_add_u32
|| instr
->opcode
== aco_opcode::s_add_i32
) && ctx
.program
->chip_class
>= GFX9
) {
2163 combine_salu_lshl_add(ctx
, instr
);
2164 } else if (instr
->opcode
== aco_opcode::s_not_b32
) {
2165 combine_salu_not_bitwise(ctx
, instr
);
2166 } else if (instr
->opcode
== aco_opcode::s_not_b64
) {
2167 if (combine_inverse_comparison(ctx
, instr
)) ;
2168 else combine_salu_not_bitwise(ctx
, instr
);
2169 } else if (instr
->opcode
== aco_opcode::s_and_b32
|| instr
->opcode
== aco_opcode::s_or_b32
) {
2170 combine_salu_n2(ctx
, instr
);
2171 } else if (instr
->opcode
== aco_opcode::s_and_b64
|| instr
->opcode
== aco_opcode::s_or_b64
) {
2172 if (combine_ordering_test(ctx
, instr
)) ;
2173 else if (combine_comparison_ordering(ctx
, instr
)) ;
2174 else if (combine_constant_comparison_ordering(ctx
, instr
)) ;
2175 else combine_salu_n2(ctx
, instr
);
2177 aco_opcode min
, max
, min3
, max3
, med3
;
2178 bool some_gfx9_only
;
2179 if (get_minmax_info(instr
->opcode
, &min
, &max
, &min3
, &max3
, &med3
, &some_gfx9_only
) &&
2180 (!some_gfx9_only
|| ctx
.program
->chip_class
>= GFX9
)) {
2181 if (combine_three_valu_op(ctx
, instr
, instr
->opcode
, instr
->opcode
== min
? min3
: max3
, "012", 1 | 2));
2182 else combine_clamp(ctx
, instr
, min
, max
, med3
);
2188 void select_instruction(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
2190 const uint32_t threshold
= 4;
2192 /* Dead Code Elimination:
2193 * We remove instructions if they define temporaries which all are unused */
2194 const bool is_used
= instr
->definitions
.empty() ||
2195 std::any_of(instr
->definitions
.begin(), instr
->definitions
.end(),
2196 [&ctx
](const Definition
& def
) { return ctx
.uses
[def
.tempId()]; });
2202 /* convert split_vector into extract_vector if only one definition is ever used */
2203 if (instr
->opcode
== aco_opcode::p_split_vector
) {
2204 unsigned num_used
= 0;
2206 for (unsigned i
= 0; i
< instr
->definitions
.size(); i
++) {
2207 if (ctx
.uses
[instr
->definitions
[i
].tempId()]) {
2212 if (num_used
== 1) {
2213 aco_ptr
<Pseudo_instruction
> extract
{create_instruction
<Pseudo_instruction
>(aco_opcode::p_extract_vector
, Format::PSEUDO
, 2, 1)};
2214 extract
->operands
[0] = instr
->operands
[0];
2215 extract
->operands
[1] = Operand((uint32_t) idx
);
2216 extract
->definitions
[0] = instr
->definitions
[idx
];
2217 instr
.reset(extract
.release());
2221 /* re-check mad instructions */
2222 if (instr
->opcode
== aco_opcode::v_mad_f32
&& ctx
.info
[instr
->definitions
[0].tempId()].is_mad()) {
2223 mad_info
* info
= &ctx
.mad_infos
[ctx
.info
[instr
->definitions
[0].tempId()].val
];
2224 /* first, check profitability */
2225 if (ctx
.uses
[info
->mul_temp_id
]) {
2226 ctx
.uses
[info
->mul_temp_id
]++;
2227 instr
.swap(info
->add_instr
);
2229 /* second, check possible literals */
2230 } else if (!info
->needs_vop3
) {
2231 uint32_t literal_idx
= 0;
2232 uint32_t literal_uses
= UINT32_MAX
;
2233 for (unsigned i
= 0; i
< instr
->operands
.size(); i
++)
2235 if (!instr
->operands
[i
].isTemp())
2237 /* if one of the operands is sgpr, we cannot add a literal somewhere else */
2238 if (instr
->operands
[i
].getTemp().type() == RegType::sgpr
) {
2239 if (ctx
.info
[instr
->operands
[i
].tempId()].is_literal()) {
2240 literal_uses
= ctx
.uses
[instr
->operands
[i
].tempId()];
2243 literal_uses
= UINT32_MAX
;
2247 else if (ctx
.info
[instr
->operands
[i
].tempId()].is_literal() &&
2248 ctx
.uses
[instr
->operands
[i
].tempId()] < literal_uses
) {
2249 literal_uses
= ctx
.uses
[instr
->operands
[i
].tempId()];
2253 if (literal_uses
< threshold
) {
2254 ctx
.uses
[instr
->operands
[literal_idx
].tempId()]--;
2255 info
->check_literal
= true;
2256 info
->literal_idx
= literal_idx
;
2262 /* check for literals */
2263 /* we do not apply the literals yet as we don't know if it is profitable */
2264 if (instr
->isSALU()) {
2265 uint32_t literal_idx
= 0;
2266 uint32_t literal_uses
= UINT32_MAX
;
2267 bool has_literal
= false;
2268 for (unsigned i
= 0; i
< instr
->operands
.size(); i
++)
2270 if (instr
->operands
[i
].isLiteral()) {
2274 if (!instr
->operands
[i
].isTemp())
2276 if (ctx
.info
[instr
->operands
[i
].tempId()].is_literal() &&
2277 ctx
.uses
[instr
->operands
[i
].tempId()] < literal_uses
) {
2278 literal_uses
= ctx
.uses
[instr
->operands
[i
].tempId()];
2282 if (!has_literal
&& literal_uses
< threshold
) {
2283 ctx
.uses
[instr
->operands
[literal_idx
].tempId()]--;
2284 if (ctx
.uses
[instr
->operands
[literal_idx
].tempId()] == 0)
2285 instr
->operands
[literal_idx
] = Operand(ctx
.info
[instr
->operands
[literal_idx
].tempId()].val
);
2287 } else if (instr
->isVALU() && valu_can_accept_literal(ctx
, instr
, 0) &&
2288 instr
->operands
[0].isTemp() &&
2289 ctx
.info
[instr
->operands
[0].tempId()].is_literal() &&
2290 ctx
.uses
[instr
->operands
[0].tempId()] < threshold
) {
2291 ctx
.uses
[instr
->operands
[0].tempId()]--;
2292 if (ctx
.uses
[instr
->operands
[0].tempId()] == 0)
2293 instr
->operands
[0] = Operand(ctx
.info
[instr
->operands
[0].tempId()].val
);
2299 void apply_literals(opt_ctx
&ctx
, aco_ptr
<Instruction
>& instr
)
2301 /* Cleanup Dead Instructions */
2305 /* apply literals on SALU */
2306 if (instr
->isSALU()) {
2307 for (Operand
& op
: instr
->operands
) {
2312 if (ctx
.info
[op
.tempId()].is_literal() &&
2313 ctx
.uses
[op
.tempId()] == 0)
2314 op
= Operand(ctx
.info
[op
.tempId()].val
);
2318 /* apply literals on VALU */
2319 else if (instr
->isVALU() && !instr
->isVOP3() &&
2320 instr
->operands
[0].isTemp() &&
2321 ctx
.info
[instr
->operands
[0].tempId()].is_literal() &&
2322 ctx
.uses
[instr
->operands
[0].tempId()] == 0) {
2323 instr
->operands
[0] = Operand(ctx
.info
[instr
->operands
[0].tempId()].val
);
2326 /* apply literals on MAD */
2327 else if (instr
->opcode
== aco_opcode::v_mad_f32
&& ctx
.info
[instr
->definitions
[0].tempId()].is_mad()) {
2328 mad_info
* info
= &ctx
.mad_infos
[ctx
.info
[instr
->definitions
[0].tempId()].val
];
2329 aco_ptr
<Instruction
> new_mad
;
2330 if (info
->check_literal
&& ctx
.uses
[instr
->operands
[info
->literal_idx
].tempId()] == 0) {
2331 if (info
->literal_idx
== 2) { /* add literal -> madak */
2332 new_mad
.reset(create_instruction
<VOP2_instruction
>(aco_opcode::v_madak_f32
, Format::VOP2
, 3, 1));
2333 new_mad
->operands
[0] = instr
->operands
[0];
2334 new_mad
->operands
[1] = instr
->operands
[1];
2335 } else { /* mul literal -> madmk */
2336 new_mad
.reset(create_instruction
<VOP2_instruction
>(aco_opcode::v_madmk_f32
, Format::VOP2
, 3, 1));
2337 new_mad
->operands
[0] = instr
->operands
[1 - info
->literal_idx
];
2338 new_mad
->operands
[1] = instr
->operands
[2];
2340 new_mad
->operands
[2] = Operand(ctx
.info
[instr
->operands
[info
->literal_idx
].tempId()].val
);
2341 new_mad
->definitions
[0] = instr
->definitions
[0];
2342 instr
.swap(new_mad
);
2346 ctx
.instructions
.emplace_back(std::move(instr
));
2350 void optimize(Program
* program
)
2353 ctx
.program
= program
;
2354 std::vector
<ssa_info
> info(program
->peekAllocationId());
2355 ctx
.info
= info
.data();
2357 /* 1. Bottom-Up DAG pass (forward) to label all ssa-defs */
2358 for (Block
& block
: program
->blocks
) {
2359 for (aco_ptr
<Instruction
>& instr
: block
.instructions
)
2360 label_instruction(ctx
, instr
);
2363 ctx
.uses
= std::move(dead_code_analysis(program
));
2365 /* 2. Combine v_mad, omod, clamp and propagate sgpr on VALU instructions */
2366 for (Block
& block
: program
->blocks
) {
2367 for (aco_ptr
<Instruction
>& instr
: block
.instructions
)
2368 combine_instruction(ctx
, instr
);
2371 /* 3. Top-Down DAG pass (backward) to select instructions (includes DCE) */
2372 for (std::vector
<Block
>::reverse_iterator it
= program
->blocks
.rbegin(); it
!= program
->blocks
.rend(); ++it
) {
2373 Block
* block
= &(*it
);
2374 for (std::vector
<aco_ptr
<Instruction
>>::reverse_iterator it
= block
->instructions
.rbegin(); it
!= block
->instructions
.rend(); ++it
)
2375 select_instruction(ctx
, *it
);
2378 /* 4. Add literals to instructions */
2379 for (Block
& block
: program
->blocks
) {
2380 ctx
.instructions
.clear();
2381 for (aco_ptr
<Instruction
>& instr
: block
.instructions
)
2382 apply_literals(ctx
, instr
);
2383 block
.instructions
.swap(ctx
.instructions
);