src/amd/compiler/aco_print_ir.cpp

   1 #include "aco_ir.h"
   2 #include "aco_builder.h"
   3
   4 #include "sid.h"
   5 #include "ac_shader_util.h"
   6
   7 namespace aco {
   8
   9 static const char *reduce_ops[] = {
  10    [iadd32] = "iadd32",
  11    [iadd64] = "iadd64",
  12    [imul32] = "imul32",
  13    [imul64] = "imul64",
  14    [fadd32] = "fadd32",
  15    [fadd64] = "fadd64",
  16    [fmul32] = "fmul32",
  17    [fmul64] = "fmul64",
  18    [imin32] = "imin32",
  19    [imin64] = "imin64",
  20    [imax32] = "imax32",
  21    [imax64] = "imax64",
  22    [umin32] = "umin32",
  23    [umin64] = "umin64",
  24    [umax32] = "umax32",
  25    [umax64] = "umax64",
  26    [fmin32] = "fmin32",
  27    [fmin64] = "fmin64",
  28    [fmax32] = "fmax32",
  29    [fmax64] = "fmax64",
  30    [iand32] = "iand32",
  31    [iand64] = "iand64",
  32    [ior32] = "ior32",
  33    [ior64] = "ior64",
  34    [ixor32] = "ixor32",
  35    [ixor64] = "ixor64",
  36    [gfx10_wave64_bpermute] = "gfx10_wave64_bpermute",
  37 };
  38
  39 static void print_reg_class(const RegClass rc, FILE *output)
  40 {
  41    switch (rc) {
  42       case RegClass::s1: fprintf(output, " s1: "); return;
  43       case RegClass::s2: fprintf(output, " s2: "); return;
  44       case RegClass::s3: fprintf(output, " s3: "); return;
  45       case RegClass::s4: fprintf(output, " s4: "); return;
  46       case RegClass::s6: fprintf(output, " s6: "); return;
  47       case RegClass::s8: fprintf(output, " s8: "); return;
  48       case RegClass::s16: fprintf(output, "s16: "); return;
  49       case RegClass::v1: fprintf(output, " v1: "); return;
  50       case RegClass::v2: fprintf(output, " v2: "); return;
  51       case RegClass::v3: fprintf(output, " v3: "); return;
  52       case RegClass::v4: fprintf(output, " v4: "); return;
  53       case RegClass::v5: fprintf(output, " v5: "); return;
  54       case RegClass::v6: fprintf(output, " v6: "); return;
  55       case RegClass::v7: fprintf(output, " v7: "); return;
  56       case RegClass::v8: fprintf(output, " v8: "); return;
  57       case RegClass::v1_linear: fprintf(output, " v1: "); return;
  58       case RegClass::v2_linear: fprintf(output, " v2: "); return;
  59    }
  60 }
  61
  62 void print_physReg(unsigned reg, unsigned size, FILE *output)
  63 {
  64    if (reg == 124) {
  65       fprintf(output, ":m0");
  66    } else if (reg == 106) {
  67       fprintf(output, ":vcc");
  68    } else if (reg == 253) {
  69       fprintf(output, ":scc");
  70    } else if (reg == 126) {
  71       fprintf(output, ":exec");
  72    } else {
  73       bool is_vgpr = reg / 256;
  74       reg = reg % 256;
  75       fprintf(output, ":%c[%d", is_vgpr ? 'v' : 's', reg);
  76       if (size > 1)
  77          fprintf(output, "-%d]", reg + size -1);
  78       else
  79          fprintf(output, "]");
  80    }
  81 }
  82
  83 static void print_constant(uint8_t reg, FILE *output)
  84 {
  85    if (reg >= 128 && reg <= 192) {
  86       fprintf(output, "%d", reg - 128);
  87       return;
  88    } else if (reg >= 192 && reg <= 208) {
  89       fprintf(output, "%d", 192 - reg);
  90       return;
  91    }
  92
  93    switch (reg) {
  94    case 240:
  95       fprintf(output, "0.5");
  96       break;
  97    case 241:
  98       fprintf(output, "-0.5");
  99       break;
 100    case 242:
 101       fprintf(output, "1.0");
 102       break;
 103    case 243:
 104       fprintf(output, "-1.0");
 105       break;
 106    case 244:
 107       fprintf(output, "2.0");
 108       break;
 109    case 245:
 110       fprintf(output, "-2.0");
 111       break;
 112    case 246:
 113       fprintf(output, "4.0");
 114       break;
 115    case 247:
 116       fprintf(output, "-4.0");
 117       break;
 118    case 248:
 119       fprintf(output, "1/(2*PI)");
 120       break;
 121    }
 122 }
 123
 124 static void print_operand(const Operand *operand, FILE *output)
 125 {
 126    if (operand->isLiteral()) {
 127       fprintf(output, "0x%x", operand->constantValue());
 128    } else if (operand->isConstant()) {
 129       print_constant(operand->physReg().reg, output);
 130    } else if (operand->isUndefined()) {
 131       print_reg_class(operand->regClass(), output);
 132       fprintf(output, "undef");
 133    } else {
 134       fprintf(output, "%%%d", operand->tempId());
 135
 136       if (operand->isFixed())
 137          print_physReg(operand->physReg(), operand->size(), output);
 138    }
 139 }
 140
 141 static void print_definition(const Definition *definition, FILE *output)
 142 {
 143    print_reg_class(definition->regClass(), output);
 144    fprintf(output, "%%%d", definition->tempId());
 145
 146    if (definition->isFixed())
 147       print_physReg(definition->physReg(), definition->size(), output);
 148 }
 149
 150 static void print_barrier_reorder(bool can_reorder, barrier_interaction barrier, FILE *output)
 151 {
 152    if (can_reorder)
 153       fprintf(output, " reorder");
 154
 155    if (barrier & barrier_buffer)
 156       fprintf(output, " buffer");
 157    if (barrier & barrier_image)
 158       fprintf(output, " image");
 159    if (barrier & barrier_atomic)
 160       fprintf(output, " atomic");
 161    if (barrier & barrier_shared)
 162       fprintf(output, " shared");
 163    if (barrier & barrier_gs_data)
 164       fprintf(output, " gs_data");
 165    if (barrier & barrier_gs_sendmsg)
 166       fprintf(output, " gs_sendmsg");
 167 }
 168
 169 static void print_instr_format_specific(struct Instruction *instr, FILE *output)
 170 {
 171    switch (instr->format) {
 172    case Format::SOPK: {
 173       SOPK_instruction* sopk = static_cast<SOPK_instruction*>(instr);
 174       fprintf(output, " imm:%d", sopk->imm & 0x8000 ? (sopk->imm - 65536) : sopk->imm);
 175       break;
 176    }
 177    case Format::SOPP: {
 178       SOPP_instruction* sopp = static_cast<SOPP_instruction*>(instr);
 179       uint16_t imm = sopp->imm;
 180       switch (instr->opcode) {
 181       case aco_opcode::s_waitcnt: {
 182          /* we usually should check the chip class for vmcnt/lgkm, but
 183           * insert_waitcnt() should fill it in regardless. */
 184          unsigned vmcnt = (imm & 0xF) | ((imm & (0x3 << 14)) >> 10);
 185          if (vmcnt != 63) fprintf(output, " vmcnt(%d)", vmcnt);
 186          if (((imm >> 4) & 0x7) < 0x7) fprintf(output, " expcnt(%d)", (imm >> 4) & 0x7);
 187          if (((imm >> 8) & 0x3F) < 0x3F) fprintf(output, " lgkmcnt(%d)", (imm >> 8) & 0x3F);
 188          break;
 189       }
 190       case aco_opcode::s_endpgm:
 191       case aco_opcode::s_endpgm_saved:
 192       case aco_opcode::s_endpgm_ordered_ps_done:
 193       case aco_opcode::s_wakeup:
 194       case aco_opcode::s_barrier:
 195       case aco_opcode::s_icache_inv:
 196       case aco_opcode::s_ttracedata:
 197       case aco_opcode::s_set_gpr_idx_off: {
 198          break;
 199       }
 200       case aco_opcode::s_sendmsg: {
 201          unsigned id = imm & sendmsg_id_mask;
 202          switch (id) {
 203          case sendmsg_none:
 204             fprintf(output, " sendmsg(MSG_NONE)");
 205             break;
 206          case _sendmsg_gs:
 207             fprintf(output, " sendmsg(gs%s%s, %u)",
 208                     imm & 0x10 ? ", cut" : "", imm & 0x20 ? ", emit" : "", imm >> 8);
 209             break;
 210          case _sendmsg_gs_done:
 211             fprintf(output, " sendmsg(gs_done%s%s, %u)",
 212                     imm & 0x10 ? ", cut" : "", imm & 0x20 ? ", emit" : "", imm >> 8);
 213             break;
 214          case sendmsg_save_wave:
 215             fprintf(output, " sendmsg(save_wave)");
 216             break;
 217          case sendmsg_stall_wave_gen:
 218             fprintf(output, " sendmsg(stall_wave_gen)");
 219             break;
 220          case sendmsg_halt_waves:
 221             fprintf(output, " sendmsg(halt_waves)");
 222             break;
 223          case sendmsg_ordered_ps_done:
 224             fprintf(output, " sendmsg(ordered_ps_done)");
 225             break;
 226          case sendmsg_early_prim_dealloc:
 227             fprintf(output, " sendmsg(early_prim_dealloc)");
 228             break;
 229          case sendmsg_gs_alloc_req:
 230             fprintf(output, " sendmsg(gs_alloc_req)");
 231             break;
 232          }
 233          break;
 234       }
 235       default: {
 236          if (imm)
 237             fprintf(output, " imm:%u", imm);
 238          break;
 239       }
 240       }
 241       if (sopp->block != -1)
 242          fprintf(output, " block:BB%d", sopp->block);
 243       break;
 244    }
 245    case Format::SMEM: {
 246       SMEM_instruction* smem = static_cast<SMEM_instruction*>(instr);
 247       if (smem->glc)
 248          fprintf(output, " glc");
 249       if (smem->dlc)
 250          fprintf(output, " dlc");
 251       if (smem->nv)
 252          fprintf(output, " nv");
 253       print_barrier_reorder(smem->can_reorder, smem->barrier, output);
 254       break;
 255    }
 256    case Format::VINTRP: {
 257       Interp_instruction* vintrp = static_cast<Interp_instruction*>(instr);
 258       fprintf(output, " attr%d.%c", vintrp->attribute, "xyzw"[vintrp->component]);
 259       break;
 260    }
 261    case Format::DS: {
 262       DS_instruction* ds = static_cast<DS_instruction*>(instr);
 263       if (ds->offset0)
 264          fprintf(output, " offset0:%u", ds->offset0);
 265       if (ds->offset1)
 266          fprintf(output, " offset1:%u", ds->offset1);
 267       if (ds->gds)
 268          fprintf(output, " gds");
 269       break;
 270    }
 271    case Format::MUBUF: {
 272       MUBUF_instruction* mubuf = static_cast<MUBUF_instruction*>(instr);
 273       if (mubuf->offset)
 274          fprintf(output, " offset:%u", mubuf->offset);
 275       if (mubuf->offen)
 276          fprintf(output, " offen");
 277       if (mubuf->idxen)
 278          fprintf(output, " idxen");
 279       if (mubuf->addr64)
 280          fprintf(output, " addr64");
 281       if (mubuf->glc)
 282          fprintf(output, " glc");
 283       if (mubuf->dlc)
 284          fprintf(output, " dlc");
 285       if (mubuf->slc)
 286          fprintf(output, " slc");
 287       if (mubuf->tfe)
 288          fprintf(output, " tfe");
 289       if (mubuf->lds)
 290          fprintf(output, " lds");
 291       if (mubuf->disable_wqm)
 292          fprintf(output, " disable_wqm");
 293       print_barrier_reorder(mubuf->can_reorder, mubuf->barrier, output);
 294       break;
 295    }
 296    case Format::MIMG: {
 297       MIMG_instruction* mimg = static_cast<MIMG_instruction*>(instr);
 298       unsigned identity_dmask = !instr->definitions.empty() ?
 299                                 (1 << instr->definitions[0].size()) - 1 :
 300                                 0xf;
 301       if ((mimg->dmask & identity_dmask) != identity_dmask)
 302          fprintf(output, " dmask:%s%s%s%s",
 303                  mimg->dmask & 0x1 ? "x" : "",
 304                  mimg->dmask & 0x2 ? "y" : "",
 305                  mimg->dmask & 0x4 ? "z" : "",
 306                  mimg->dmask & 0x8 ? "w" : "");
 307       switch (mimg->dim) {
 308       case ac_image_1d:
 309          fprintf(output, " 1d");
 310          break;
 311       case ac_image_2d:
 312          fprintf(output, " 2d");
 313          break;
 314       case ac_image_3d:
 315          fprintf(output, " 3d");
 316          break;
 317       case ac_image_cube:
 318          fprintf(output, " cube");
 319          break;
 320       case ac_image_1darray:
 321          fprintf(output, " 1darray");
 322          break;
 323       case ac_image_2darray:
 324          fprintf(output, " 2darray");
 325          break;
 326       case ac_image_2dmsaa:
 327          fprintf(output, " 2dmsaa");
 328          break;
 329       case ac_image_2darraymsaa:
 330          fprintf(output, " 2darraymsaa");
 331          break;
 332       }
 333       if (mimg->unrm)
 334          fprintf(output, " unrm");
 335       if (mimg->glc)
 336          fprintf(output, " glc");
 337       if (mimg->dlc)
 338          fprintf(output, " dlc");
 339       if (mimg->slc)
 340          fprintf(output, " slc");
 341       if (mimg->tfe)
 342          fprintf(output, " tfe");
 343       if (mimg->da)
 344          fprintf(output, " da");
 345       if (mimg->lwe)
 346          fprintf(output, " lwe");
 347       if (mimg->r128 || mimg->a16)
 348          fprintf(output, " r128/a16");
 349       if (mimg->d16)
 350          fprintf(output, " d16");
 351       if (mimg->disable_wqm)
 352          fprintf(output, " disable_wqm");
 353       print_barrier_reorder(mimg->can_reorder, mimg->barrier, output);
 354       break;
 355    }
 356    case Format::EXP: {
 357       Export_instruction* exp = static_cast<Export_instruction*>(instr);
 358       unsigned identity_mask = exp->compressed ? 0x5 : 0xf;
 359       if ((exp->enabled_mask & identity_mask) != identity_mask)
 360          fprintf(output, " en:%c%c%c%c",
 361                  exp->enabled_mask & 0x1 ? 'r' : '*',
 362                  exp->enabled_mask & 0x2 ? 'g' : '*',
 363                  exp->enabled_mask & 0x4 ? 'b' : '*',
 364                  exp->enabled_mask & 0x8 ? 'a' : '*');
 365       if (exp->compressed)
 366          fprintf(output, " compr");
 367       if (exp->done)
 368          fprintf(output, " done");
 369       if (exp->valid_mask)
 370          fprintf(output, " vm");
 371
 372       if (exp->dest <= V_008DFC_SQ_EXP_MRT + 7)
 373          fprintf(output, " mrt%d", exp->dest - V_008DFC_SQ_EXP_MRT);
 374       else if (exp->dest == V_008DFC_SQ_EXP_MRTZ)
 375          fprintf(output, " mrtz");
 376       else if (exp->dest == V_008DFC_SQ_EXP_NULL)
 377          fprintf(output, " null");
 378       else if (exp->dest >= V_008DFC_SQ_EXP_POS && exp->dest <= V_008DFC_SQ_EXP_POS + 3)
 379          fprintf(output, " pos%d", exp->dest - V_008DFC_SQ_EXP_POS);
 380       else if (exp->dest >= V_008DFC_SQ_EXP_PARAM && exp->dest <= V_008DFC_SQ_EXP_PARAM + 31)
 381          fprintf(output, " param%d", exp->dest - V_008DFC_SQ_EXP_PARAM);
 382       break;
 383    }
 384    case Format::PSEUDO_BRANCH: {
 385       Pseudo_branch_instruction* branch = static_cast<Pseudo_branch_instruction*>(instr);
 386       /* Note: BB0 cannot be a branch target */
 387       if (branch->target[0] != 0)
 388          fprintf(output, " BB%d", branch->target[0]);
 389       if (branch->target[1] != 0)
 390          fprintf(output, ", BB%d", branch->target[1]);
 391       break;
 392    }
 393    case Format::PSEUDO_REDUCTION: {
 394       Pseudo_reduction_instruction* reduce = static_cast<Pseudo_reduction_instruction*>(instr);
 395       fprintf(output, " op:%s", reduce_ops[reduce->reduce_op]);
 396       if (reduce->cluster_size)
 397          fprintf(output, " cluster_size:%u", reduce->cluster_size);
 398       break;
 399    }
 400    case Format::FLAT:
 401    case Format::GLOBAL:
 402    case Format::SCRATCH: {
 403       FLAT_instruction* flat = static_cast<FLAT_instruction*>(instr);
 404       if (flat->offset)
 405          fprintf(output, " offset:%u", flat->offset);
 406       if (flat->glc)
 407          fprintf(output, " glc");
 408       if (flat->dlc)
 409          fprintf(output, " dlc");
 410       if (flat->slc)
 411          fprintf(output, " slc");
 412       if (flat->lds)
 413          fprintf(output, " lds");
 414       if (flat->nv)
 415          fprintf(output, " nv");
 416       if (flat->disable_wqm)
 417          fprintf(output, " disable_wqm");
 418       print_barrier_reorder(flat->can_reorder, flat->barrier, output);
 419       break;
 420    }
 421    case Format::MTBUF: {
 422       MTBUF_instruction* mtbuf = static_cast<MTBUF_instruction*>(instr);
 423       fprintf(output, " dfmt:");
 424       switch (mtbuf->dfmt) {
 425       case V_008F0C_BUF_DATA_FORMAT_8: fprintf(output, "8"); break;
 426       case V_008F0C_BUF_DATA_FORMAT_16: fprintf(output, "16"); break;
 427       case V_008F0C_BUF_DATA_FORMAT_8_8: fprintf(output, "8_8"); break;
 428       case V_008F0C_BUF_DATA_FORMAT_32: fprintf(output, "32"); break;
 429       case V_008F0C_BUF_DATA_FORMAT_16_16: fprintf(output, "16_16"); break;
 430       case V_008F0C_BUF_DATA_FORMAT_10_11_11: fprintf(output, "10_11_11"); break;
 431       case V_008F0C_BUF_DATA_FORMAT_11_11_10: fprintf(output, "11_11_10"); break;
 432       case V_008F0C_BUF_DATA_FORMAT_10_10_10_2: fprintf(output, "10_10_10_2"); break;
 433       case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: fprintf(output, "2_10_10_10"); break;
 434       case V_008F0C_BUF_DATA_FORMAT_8_8_8_8: fprintf(output, "8_8_8_8"); break;
 435       case V_008F0C_BUF_DATA_FORMAT_32_32: fprintf(output, "32_32"); break;
 436       case V_008F0C_BUF_DATA_FORMAT_16_16_16_16: fprintf(output, "16_16_16_16"); break;
 437       case V_008F0C_BUF_DATA_FORMAT_32_32_32: fprintf(output, "32_32_32"); break;
 438       case V_008F0C_BUF_DATA_FORMAT_32_32_32_32: fprintf(output, "32_32_32_32"); break;
 439       case V_008F0C_BUF_DATA_FORMAT_RESERVED_15: fprintf(output, "reserved15"); break;
 440       }
 441       fprintf(output, " nfmt:");
 442       switch (mtbuf->nfmt) {
 443       case V_008F0C_BUF_NUM_FORMAT_UNORM: fprintf(output, "unorm"); break;
 444       case V_008F0C_BUF_NUM_FORMAT_SNORM: fprintf(output, "snorm"); break;
 445       case V_008F0C_BUF_NUM_FORMAT_USCALED: fprintf(output, "uscaled"); break;
 446       case V_008F0C_BUF_NUM_FORMAT_SSCALED: fprintf(output, "sscaled"); break;
 447       case V_008F0C_BUF_NUM_FORMAT_UINT: fprintf(output, "uint"); break;
 448       case V_008F0C_BUF_NUM_FORMAT_SINT: fprintf(output, "sint"); break;
 449       case V_008F0C_BUF_NUM_FORMAT_SNORM_OGL: fprintf(output, "snorm"); break;
 450       case V_008F0C_BUF_NUM_FORMAT_FLOAT: fprintf(output, "float"); break;
 451       }
 452       if (mtbuf->offset)
 453          fprintf(output, " offset:%u", mtbuf->offset);
 454       if (mtbuf->offen)
 455          fprintf(output, " offen");
 456       if (mtbuf->idxen)
 457          fprintf(output, " idxen");
 458       if (mtbuf->glc)
 459          fprintf(output, " glc");
 460       if (mtbuf->dlc)
 461          fprintf(output, " dlc");
 462       if (mtbuf->slc)
 463          fprintf(output, " slc");
 464       if (mtbuf->tfe)
 465          fprintf(output, " tfe");
 466       if (mtbuf->disable_wqm)
 467          fprintf(output, " disable_wqm");
 468       print_barrier_reorder(mtbuf->can_reorder, mtbuf->barrier, output);
 469       break;
 470    }
 471    default: {
 472       break;
 473    }
 474    }
 475    if (instr->isVOP3()) {
 476       VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 477       switch (vop3->omod) {
 478       case 1:
 479          fprintf(output, " *2");
 480          break;
 481       case 2:
 482          fprintf(output, " *4");
 483          break;
 484       case 3:
 485          fprintf(output, " *0.5");
 486          break;
 487       }
 488       if (vop3->clamp)
 489          fprintf(output, " clamp");
 490    } else if (instr->isDPP()) {
 491       DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 492       if (dpp->dpp_ctrl <= 0xff) {
 493          fprintf(output, " quad_perm:[%d,%d,%d,%d]",
 494                  dpp->dpp_ctrl & 0x3, (dpp->dpp_ctrl >> 2) & 0x3,
 495                  (dpp->dpp_ctrl >> 4) & 0x3, (dpp->dpp_ctrl >> 6) & 0x3);
 496       } else if (dpp->dpp_ctrl >= 0x101 && dpp->dpp_ctrl <= 0x10f) {
 497          fprintf(output, " row_shl:%d", dpp->dpp_ctrl & 0xf);
 498       } else if (dpp->dpp_ctrl >= 0x111 && dpp->dpp_ctrl <= 0x11f) {
 499          fprintf(output, " row_shr:%d", dpp->dpp_ctrl & 0xf);
 500       } else if (dpp->dpp_ctrl >= 0x121 && dpp->dpp_ctrl <= 0x12f) {
 501          fprintf(output, " row_ror:%d", dpp->dpp_ctrl & 0xf);
 502       } else if (dpp->dpp_ctrl == dpp_wf_sl1) {
 503          fprintf(output, " wave_shl:1");
 504       } else if (dpp->dpp_ctrl == dpp_wf_rl1) {
 505          fprintf(output, " wave_rol:1");
 506       } else if (dpp->dpp_ctrl == dpp_wf_sr1) {
 507          fprintf(output, " wave_shr:1");
 508       } else if (dpp->dpp_ctrl == dpp_wf_rr1) {
 509          fprintf(output, " wave_ror:1");
 510       } else if (dpp->dpp_ctrl == dpp_row_mirror) {
 511          fprintf(output, " row_mirror");
 512       } else if (dpp->dpp_ctrl == dpp_row_half_mirror) {
 513          fprintf(output, " row_half_mirror");
 514       } else if (dpp->dpp_ctrl == dpp_row_bcast15) {
 515          fprintf(output, " row_bcast:15");
 516       } else if (dpp->dpp_ctrl == dpp_row_bcast31) {
 517          fprintf(output, " row_bcast:31");
 518       } else {
 519          fprintf(output, " dpp_ctrl:0x%.3x", dpp->dpp_ctrl);
 520       }
 521       if (dpp->row_mask != 0xf)
 522          fprintf(output, " row_mask:0x%.1x", dpp->row_mask);
 523       if (dpp->bank_mask != 0xf)
 524          fprintf(output, " bank_mask:0x%.1x", dpp->bank_mask);
 525       if (dpp->bound_ctrl)
 526          fprintf(output, " bound_ctrl:1");
 527    } else if ((int)instr->format & (int)Format::SDWA) {
 528       fprintf(output, " (printing unimplemented)");
 529    }
 530 }
 531
 532 void aco_print_instr(struct Instruction *instr, FILE *output)
 533 {
 534    if (!instr->definitions.empty()) {
 535       for (unsigned i = 0; i < instr->definitions.size(); ++i) {
 536          print_definition(&instr->definitions[i], output);
 537          if (i + 1 != instr->definitions.size())
 538             fprintf(output, ", ");
 539       }
 540       fprintf(output, " = ");
 541    }
 542    fprintf(output, "%s", instr_info.name[(int)instr->opcode]);
 543    if (instr->operands.size()) {
 544       bool abs[instr->operands.size()];
 545       bool neg[instr->operands.size()];
 546       if ((int)instr->format & (int)Format::VOP3A) {
 547          VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 548          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 549             abs[i] = vop3->abs[i];
 550             neg[i] = vop3->neg[i];
 551          }
 552       } else if (instr->isDPP()) {
 553          DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 554          assert(instr->operands.size() <= 2);
 555          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 556             abs[i] = dpp->abs[i];
 557             neg[i] = dpp->neg[i];
 558          }
 559       } else {
 560          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 561             abs[i] = false;
 562             neg[i] = false;
 563          }
 564       }
 565       for (unsigned i = 0; i < instr->operands.size(); ++i) {
 566          if (i)
 567             fprintf(output, ", ");
 568          else
 569             fprintf(output, " ");
 570
 571          if (neg[i])
 572             fprintf(output, "-");
 573          if (abs[i])
 574             fprintf(output, "|");
 575          print_operand(&instr->operands[i], output);
 576          if (abs[i])
 577             fprintf(output, "|");
 578        }
 579    }
 580    print_instr_format_specific(instr, output);
 581 }
 582
 583 static void print_block_kind(uint16_t kind, FILE *output)
 584 {
 585    if (kind & block_kind_uniform)
 586       fprintf(output, "uniform, ");
 587    if (kind & block_kind_top_level)
 588       fprintf(output, "top-level, ");
 589    if (kind & block_kind_loop_preheader)
 590       fprintf(output, "loop-preheader, ");
 591    if (kind & block_kind_loop_header)
 592       fprintf(output, "loop-header, ");
 593    if (kind & block_kind_loop_exit)
 594       fprintf(output, "loop-exit, ");
 595    if (kind & block_kind_continue)
 596       fprintf(output, "continue, ");
 597    if (kind & block_kind_break)
 598       fprintf(output, "break, ");
 599    if (kind & block_kind_continue_or_break)
 600       fprintf(output, "continue_or_break, ");
 601    if (kind & block_kind_discard)
 602       fprintf(output, "discard, ");
 603    if (kind & block_kind_branch)
 604       fprintf(output, "branch, ");
 605    if (kind & block_kind_merge)
 606       fprintf(output, "merge, ");
 607    if (kind & block_kind_invert)
 608       fprintf(output, "invert, ");
 609    if (kind & block_kind_uses_discard_if)
 610       fprintf(output, "discard_if, ");
 611    if (kind & block_kind_needs_lowering)
 612       fprintf(output, "needs_lowering, ");
 613    if (kind & block_kind_uses_demote)
 614       fprintf(output, "uses_demote, ");
 615 }
 616
 617 void aco_print_block(const struct Block* block, FILE *output)
 618 {
 619    fprintf(output, "BB%d\n", block->index);
 620    fprintf(output, "/* logical preds: ");
 621    for (unsigned pred : block->logical_preds)
 622       fprintf(output, "BB%d, ", pred);
 623    fprintf(output, "/ linear preds: ");
 624    for (unsigned pred : block->linear_preds)
 625       fprintf(output, "BB%d, ", pred);
 626    fprintf(output, "/ kind: ");
 627    print_block_kind(block->kind, output);
 628    fprintf(output, "*/\n");
 629    for (auto const& instr : block->instructions) {
 630       fprintf(output, "\t");
 631       aco_print_instr(instr.get(), output);
 632       fprintf(output, "\n");
 633    }
 634 }
 635
 636 void aco_print_program(Program *program, FILE *output)
 637 {
 638    for (Block const& block : program->blocks)
 639       aco_print_block(&block, output);
 640
 641    if (program->constant_data.size()) {
 642       fprintf(output, "\n/* constant data */\n");
 643       for (unsigned i = 0; i < program->constant_data.size(); i += 32) {
 644          fprintf(output, "[%06d] ", i);
 645          unsigned line_size = std::min<size_t>(program->constant_data.size() - i, 32);
 646          for (unsigned j = 0; j < line_size; j += 4) {
 647             unsigned size = std::min<size_t>(program->constant_data.size() - (i + j), 4);
 648             uint32_t v = 0;
 649             memcpy(&v, &program->constant_data[i + j], size);
 650             fprintf(output, " %08x", v);
 651          }
 652          fprintf(output, "\n");
 653       }
 654    }
 655
 656    fprintf(output, "\n");
 657 }
 658
 659 }