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[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 enum ac_descriptor_type desc_type,
66 const nir_instr *instr,
67 bool image, bool write);
68
69 static void
70 build_store_values_extended(struct ac_llvm_context *ac,
71 LLVMValueRef *values,
72 unsigned value_count,
73 unsigned value_stride,
74 LLVMValueRef vec)
75 {
76 LLVMBuilderRef builder = ac->builder;
77 unsigned i;
78
79 for (i = 0; i < value_count; i++) {
80 LLVMValueRef ptr = values[i * value_stride];
81 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
82 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
83 LLVMBuildStore(builder, value, ptr);
84 }
85 }
86
87 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
88 const nir_ssa_def *def)
89 {
90 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
91 if (def->num_components > 1) {
92 type = LLVMVectorType(type, def->num_components);
93 }
94 return type;
95 }
96
97 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
98 {
99 assert(src.is_ssa);
100 return nir->ssa_defs[src.ssa->index];
101 }
102
103 static LLVMValueRef
104 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
105 {
106 LLVMValueRef ptr = get_src(ctx, src);
107 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
108 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
109
110 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
111
112 return LLVMBuildBitCast(ctx->ac.builder, ptr,
113 LLVMPointerType(type, addr_space), "");
114 }
115
116 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
117 const struct nir_block *b)
118 {
119 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
120 return (LLVMBasicBlockRef)entry->data;
121 }
122
123 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
124 nir_alu_src src,
125 unsigned num_components)
126 {
127 LLVMValueRef value = get_src(ctx, src.src);
128 bool need_swizzle = false;
129
130 assert(value);
131 unsigned src_components = ac_get_llvm_num_components(value);
132 for (unsigned i = 0; i < num_components; ++i) {
133 assert(src.swizzle[i] < src_components);
134 if (src.swizzle[i] != i)
135 need_swizzle = true;
136 }
137
138 if (need_swizzle || num_components != src_components) {
139 LLVMValueRef masks[] = {
140 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
141 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
142 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
143 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
144
145 if (src_components > 1 && num_components == 1) {
146 value = LLVMBuildExtractElement(ctx->ac.builder, value,
147 masks[0], "");
148 } else if (src_components == 1 && num_components > 1) {
149 LLVMValueRef values[] = {value, value, value, value};
150 value = ac_build_gather_values(&ctx->ac, values, num_components);
151 } else {
152 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
153 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
154 swizzle, "");
155 }
156 }
157 assert(!src.negate);
158 assert(!src.abs);
159 return value;
160 }
161
162 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
163 LLVMIntPredicate pred, LLVMValueRef src0,
164 LLVMValueRef src1)
165 {
166 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
167 return LLVMBuildSelect(ctx->builder, result,
168 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
169 ctx->i32_0, "");
170 }
171
172 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
173 LLVMRealPredicate pred, LLVMValueRef src0,
174 LLVMValueRef src1)
175 {
176 LLVMValueRef result;
177 src0 = ac_to_float(ctx, src0);
178 src1 = ac_to_float(ctx, src1);
179 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
180 return LLVMBuildSelect(ctx->builder, result,
181 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
182 ctx->i32_0, "");
183 }
184
185 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
186 const char *intrin,
187 LLVMTypeRef result_type,
188 LLVMValueRef src0)
189 {
190 char name[64];
191 LLVMValueRef params[] = {
192 ac_to_float(ctx, src0),
193 };
194
195 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
196 ac_get_elem_bits(ctx, result_type));
197 assert(length < sizeof(name));
198 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
199 }
200
201 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
202 const char *intrin,
203 LLVMTypeRef result_type,
204 LLVMValueRef src0, LLVMValueRef src1)
205 {
206 char name[64];
207 LLVMValueRef params[] = {
208 ac_to_float(ctx, src0),
209 ac_to_float(ctx, src1),
210 };
211
212 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
213 ac_get_elem_bits(ctx, result_type));
214 assert(length < sizeof(name));
215 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
216 }
217
218 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 ac_to_float(ctx, src1),
227 ac_to_float(ctx, src2),
228 };
229
230 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
231 ac_get_elem_bits(ctx, result_type));
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
237 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
238 {
239 LLVMTypeRef src1_type = LLVMTypeOf(src1);
240 LLVMTypeRef src2_type = LLVMTypeOf(src2);
241
242 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
243
244 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
245 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
246 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
247 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
248 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
249 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
250 }
251
252 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
253 ctx->i32_0, "");
254 return LLVMBuildSelect(ctx->builder, v,
255 ac_to_integer_or_pointer(ctx, src1),
256 ac_to_integer_or_pointer(ctx, src2), "");
257 }
258
259 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
260 LLVMValueRef src0)
261 {
262 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
263 }
264
265 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMValueRef src0, LLVMValueRef src1)
268 {
269 LLVMTypeRef ret_type;
270 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
271 LLVMValueRef res;
272 LLVMValueRef params[] = { src0, src1 };
273 ret_type = LLVMStructTypeInContext(ctx->context, types,
274 2, true);
275
276 res = ac_build_intrinsic(ctx, intrin, ret_type,
277 params, 2, AC_FUNC_ATTR_READNONE);
278
279 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
280 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
281 return res;
282 }
283
284 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
285 LLVMValueRef src0,
286 unsigned bitsize)
287 {
288 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
289 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
290 "");
291 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
292
293 switch (bitsize) {
294 case 16:
295 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
296 case 32:
297 return result;
298 case 64:
299 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
300 default:
301 unreachable("Unsupported bit size.");
302 }
303 }
304
305 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
306 LLVMValueRef src0)
307 {
308 src0 = ac_to_float(ctx, src0);
309 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
310 return LLVMBuildSExt(ctx->builder,
311 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
312 ctx->i32, "");
313 }
314
315 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
316 LLVMValueRef src0,
317 unsigned bitsize)
318 {
319 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
320
321 switch (bitsize) {
322 case 8:
323 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
324 case 16:
325 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
326 case 32:
327 return result;
328 case 64:
329 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
330 default:
331 unreachable("Unsupported bit size.");
332 }
333 }
334
335 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
336 LLVMValueRef src0)
337 {
338 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
339 return LLVMBuildSExt(ctx->builder,
340 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
341 ctx->i32, "");
342 }
343
344 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
345 LLVMValueRef src0)
346 {
347 LLVMValueRef result;
348 LLVMValueRef cond = NULL;
349
350 src0 = ac_to_float(ctx, src0);
351 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
352
353 if (ctx->chip_class >= GFX8) {
354 LLVMValueRef args[2];
355 /* Check if the result is a denormal - and flush to 0 if so. */
356 args[0] = result;
357 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
358 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
359 }
360
361 /* need to convert back up to f32 */
362 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
363
364 if (ctx->chip_class >= GFX8)
365 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
366 else {
367 /* for GFX6-GFX7 */
368 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
369 * so compare the result and flush to 0 if it's smaller.
370 */
371 LLVMValueRef temp, cond2;
372 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
373 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
374 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
375 temp, "");
376 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
377 temp, ctx->f32_0, "");
378 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
379 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
380 }
381 return result;
382 }
383
384 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
385 LLVMValueRef src0, LLVMValueRef src1)
386 {
387 LLVMValueRef dst64, result;
388 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
389 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
390
391 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
392 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
393 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
394 return result;
395 }
396
397 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
398 LLVMValueRef src0, LLVMValueRef src1)
399 {
400 LLVMValueRef dst64, result;
401 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
402 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
403
404 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
405 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
406 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
407 return result;
408 }
409
410 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
411 LLVMValueRef bits, LLVMValueRef offset)
412 {
413 /* mask = ((1 << bits) - 1) << offset */
414 return LLVMBuildShl(ctx->builder,
415 LLVMBuildSub(ctx->builder,
416 LLVMBuildShl(ctx->builder,
417 ctx->i32_1,
418 bits, ""),
419 ctx->i32_1, ""),
420 offset, "");
421 }
422
423 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
424 LLVMValueRef mask, LLVMValueRef insert,
425 LLVMValueRef base)
426 {
427 /* Calculate:
428 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
429 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
430 */
431 return LLVMBuildXor(ctx->builder, base,
432 LLVMBuildAnd(ctx->builder, mask,
433 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
434 }
435
436 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
437 LLVMValueRef src0,
438 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
439 LLVMValueRef args[2]))
440 {
441 LLVMValueRef comp[2];
442
443 src0 = ac_to_float(ctx, src0);
444 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
445 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
446
447 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
448 }
449
450 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
451 LLVMValueRef src0)
452 {
453 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
454 LLVMValueRef temps[2], val;
455 int i;
456
457 for (i = 0; i < 2; i++) {
458 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
459 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
460 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
461 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
462 }
463 return ac_build_gather_values(ctx, temps, 2);
464 }
465
466 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
467 nir_op op,
468 LLVMValueRef src0)
469 {
470 unsigned mask;
471 int idx;
472 LLVMValueRef result;
473
474 if (op == nir_op_fddx_fine)
475 mask = AC_TID_MASK_LEFT;
476 else if (op == nir_op_fddy_fine)
477 mask = AC_TID_MASK_TOP;
478 else
479 mask = AC_TID_MASK_TOP_LEFT;
480
481 /* for DDX we want to next X pixel, DDY next Y pixel. */
482 if (op == nir_op_fddx_fine ||
483 op == nir_op_fddx_coarse ||
484 op == nir_op_fddx)
485 idx = 1;
486 else
487 idx = 2;
488
489 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
490 return result;
491 }
492
493 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
494 {
495 LLVMValueRef src[4], result = NULL;
496 unsigned num_components = instr->dest.dest.ssa.num_components;
497 unsigned src_components;
498 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
499
500 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
501 switch (instr->op) {
502 case nir_op_vec2:
503 case nir_op_vec3:
504 case nir_op_vec4:
505 src_components = 1;
506 break;
507 case nir_op_pack_half_2x16:
508 case nir_op_pack_snorm_2x16:
509 case nir_op_pack_unorm_2x16:
510 src_components = 2;
511 break;
512 case nir_op_unpack_half_2x16:
513 src_components = 1;
514 break;
515 case nir_op_cube_face_coord:
516 case nir_op_cube_face_index:
517 src_components = 3;
518 break;
519 default:
520 src_components = num_components;
521 break;
522 }
523 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
524 src[i] = get_alu_src(ctx, instr->src[i], src_components);
525
526 switch (instr->op) {
527 case nir_op_mov:
528 result = src[0];
529 break;
530 case nir_op_fneg:
531 src[0] = ac_to_float(&ctx->ac, src[0]);
532 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
533 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
534 /* fneg will be optimized by backend compiler with sign
535 * bit removed via XOR. This is probably a LLVM bug.
536 */
537 result = ac_build_canonicalize(&ctx->ac, result,
538 instr->dest.dest.ssa.bit_size);
539 }
540 break;
541 case nir_op_ineg:
542 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
543 break;
544 case nir_op_inot:
545 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
546 break;
547 case nir_op_iadd:
548 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
549 break;
550 case nir_op_fadd:
551 src[0] = ac_to_float(&ctx->ac, src[0]);
552 src[1] = ac_to_float(&ctx->ac, src[1]);
553 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
554 break;
555 case nir_op_fsub:
556 src[0] = ac_to_float(&ctx->ac, src[0]);
557 src[1] = ac_to_float(&ctx->ac, src[1]);
558 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
559 break;
560 case nir_op_isub:
561 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
562 break;
563 case nir_op_imul:
564 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
565 break;
566 case nir_op_imod:
567 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
568 break;
569 case nir_op_umod:
570 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_fmod:
573 /* lower_fmod only lower 16-bit and 32-bit fmod */
574 assert(instr->dest.dest.ssa.bit_size == 64);
575 src[0] = ac_to_float(&ctx->ac, src[0]);
576 src[1] = ac_to_float(&ctx->ac, src[1]);
577 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
578 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
579 ac_to_float_type(&ctx->ac, def_type), result);
580 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
581 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
582 break;
583 case nir_op_irem:
584 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_idiv:
587 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_udiv:
590 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_fmul:
593 src[0] = ac_to_float(&ctx->ac, src[0]);
594 src[1] = ac_to_float(&ctx->ac, src[1]);
595 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
596 break;
597 case nir_op_frcp:
598 src[0] = ac_to_float(&ctx->ac, src[0]);
599 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
600 break;
601 case nir_op_iand:
602 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_ior:
605 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_ixor:
608 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
609 break;
610 case nir_op_ishl:
611 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
612 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
613 LLVMTypeOf(src[0]), "");
614 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
615 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
616 LLVMTypeOf(src[0]), "");
617 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ishr:
620 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
621 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
622 LLVMTypeOf(src[0]), "");
623 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
624 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
625 LLVMTypeOf(src[0]), "");
626 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
627 break;
628 case nir_op_ushr:
629 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
633 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
634 LLVMTypeOf(src[0]), "");
635 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_ilt32:
638 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
639 break;
640 case nir_op_ine32:
641 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
642 break;
643 case nir_op_ieq32:
644 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
645 break;
646 case nir_op_ige32:
647 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
648 break;
649 case nir_op_ult32:
650 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
651 break;
652 case nir_op_uge32:
653 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
654 break;
655 case nir_op_feq32:
656 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
657 break;
658 case nir_op_fne32:
659 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
660 break;
661 case nir_op_flt32:
662 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
663 break;
664 case nir_op_fge32:
665 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
666 break;
667 case nir_op_fabs:
668 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
669 ac_to_float_type(&ctx->ac, def_type), src[0]);
670 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
671 /* fabs will be optimized by backend compiler with sign
672 * bit removed via AND.
673 */
674 result = ac_build_canonicalize(&ctx->ac, result,
675 instr->dest.dest.ssa.bit_size);
676 }
677 break;
678 case nir_op_iabs:
679 result = emit_iabs(&ctx->ac, src[0]);
680 break;
681 case nir_op_imax:
682 result = ac_build_imax(&ctx->ac, src[0], src[1]);
683 break;
684 case nir_op_imin:
685 result = ac_build_imin(&ctx->ac, src[0], src[1]);
686 break;
687 case nir_op_umax:
688 result = ac_build_umax(&ctx->ac, src[0], src[1]);
689 break;
690 case nir_op_umin:
691 result = ac_build_umin(&ctx->ac, src[0], src[1]);
692 break;
693 case nir_op_isign:
694 result = ac_build_isign(&ctx->ac, src[0],
695 instr->dest.dest.ssa.bit_size);
696 break;
697 case nir_op_fsign:
698 src[0] = ac_to_float(&ctx->ac, src[0]);
699 result = ac_build_fsign(&ctx->ac, src[0],
700 instr->dest.dest.ssa.bit_size);
701 break;
702 case nir_op_ffloor:
703 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
704 ac_to_float_type(&ctx->ac, def_type), src[0]);
705 break;
706 case nir_op_ftrunc:
707 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
708 ac_to_float_type(&ctx->ac, def_type), src[0]);
709 break;
710 case nir_op_fceil:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_fround_even:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
716 ac_to_float_type(&ctx->ac, def_type),src[0]);
717 break;
718 case nir_op_ffract:
719 src[0] = ac_to_float(&ctx->ac, src[0]);
720 result = ac_build_fract(&ctx->ac, src[0],
721 instr->dest.dest.ssa.bit_size);
722 break;
723 case nir_op_fsin:
724 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
725 ac_to_float_type(&ctx->ac, def_type), src[0]);
726 break;
727 case nir_op_fcos:
728 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
729 ac_to_float_type(&ctx->ac, def_type), src[0]);
730 break;
731 case nir_op_fsqrt:
732 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
733 ac_to_float_type(&ctx->ac, def_type), src[0]);
734 break;
735 case nir_op_fexp2:
736 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 break;
739 case nir_op_flog2:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_frsq:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
747 break;
748 case nir_op_frexp_exp:
749 src[0] = ac_to_float(&ctx->ac, src[0]);
750 result = ac_build_frexp_exp(&ctx->ac, src[0],
751 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
752 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
753 result = LLVMBuildSExt(ctx->ac.builder, result,
754 ctx->ac.i32, "");
755 break;
756 case nir_op_frexp_sig:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_frexp_mant(&ctx->ac, src[0],
759 instr->dest.dest.ssa.bit_size);
760 break;
761 case nir_op_fpow:
762 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
763 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
764 break;
765 case nir_op_fmax:
766 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
767 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
768 if (ctx->ac.chip_class < GFX9 &&
769 instr->dest.dest.ssa.bit_size == 32) {
770 /* Only pre-GFX9 chips do not flush denorms. */
771 result = ac_build_canonicalize(&ctx->ac, result,
772 instr->dest.dest.ssa.bit_size);
773 }
774 break;
775 case nir_op_fmin:
776 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
777 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
778 if (ctx->ac.chip_class < GFX9 &&
779 instr->dest.dest.ssa.bit_size == 32) {
780 /* Only pre-GFX9 chips do not flush denorms. */
781 result = ac_build_canonicalize(&ctx->ac, result,
782 instr->dest.dest.ssa.bit_size);
783 }
784 break;
785 case nir_op_ffma:
786 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
787 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
788 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
789 break;
790 case nir_op_ldexp:
791 src[0] = ac_to_float(&ctx->ac, src[0]);
792 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
793 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
794 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
795 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
796 else
797 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
798 break;
799 case nir_op_bfm:
800 result = emit_bfm(&ctx->ac, src[0], src[1]);
801 break;
802 case nir_op_bitfield_select:
803 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
804 break;
805 case nir_op_ubfe:
806 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
807 break;
808 case nir_op_ibfe:
809 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
810 break;
811 case nir_op_bitfield_reverse:
812 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
813 break;
814 case nir_op_bit_count:
815 result = ac_build_bit_count(&ctx->ac, src[0]);
816 break;
817 case nir_op_vec2:
818 case nir_op_vec3:
819 case nir_op_vec4:
820 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
821 src[i] = ac_to_integer(&ctx->ac, src[i]);
822 result = ac_build_gather_values(&ctx->ac, src, num_components);
823 break;
824 case nir_op_f2i8:
825 case nir_op_f2i16:
826 case nir_op_f2i32:
827 case nir_op_f2i64:
828 src[0] = ac_to_float(&ctx->ac, src[0]);
829 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
830 break;
831 case nir_op_f2u8:
832 case nir_op_f2u16:
833 case nir_op_f2u32:
834 case nir_op_f2u64:
835 src[0] = ac_to_float(&ctx->ac, src[0]);
836 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
837 break;
838 case nir_op_i2f16:
839 case nir_op_i2f32:
840 case nir_op_i2f64:
841 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
842 break;
843 case nir_op_u2f16:
844 case nir_op_u2f32:
845 case nir_op_u2f64:
846 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
847 break;
848 case nir_op_f2f16_rtz:
849 src[0] = ac_to_float(&ctx->ac, src[0]);
850 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
851 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
852 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
853 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
854 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
855 break;
856 case nir_op_f2f16_rtne:
857 case nir_op_f2f16:
858 case nir_op_f2f32:
859 case nir_op_f2f64:
860 src[0] = ac_to_float(&ctx->ac, src[0]);
861 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
862 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
863 else
864 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
865 break;
866 case nir_op_u2u8:
867 case nir_op_u2u16:
868 case nir_op_u2u32:
869 case nir_op_u2u64:
870 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
871 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
872 else
873 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
874 break;
875 case nir_op_i2i8:
876 case nir_op_i2i16:
877 case nir_op_i2i32:
878 case nir_op_i2i64:
879 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
880 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
881 else
882 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
883 break;
884 case nir_op_b32csel:
885 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
886 break;
887 case nir_op_find_lsb:
888 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
889 break;
890 case nir_op_ufind_msb:
891 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
892 break;
893 case nir_op_ifind_msb:
894 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
895 break;
896 case nir_op_uadd_carry:
897 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
898 break;
899 case nir_op_usub_borrow:
900 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
901 break;
902 case nir_op_b2f16:
903 case nir_op_b2f32:
904 case nir_op_b2f64:
905 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
906 break;
907 case nir_op_f2b32:
908 result = emit_f2b(&ctx->ac, src[0]);
909 break;
910 case nir_op_b2i8:
911 case nir_op_b2i16:
912 case nir_op_b2i32:
913 case nir_op_b2i64:
914 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
915 break;
916 case nir_op_i2b32:
917 result = emit_i2b(&ctx->ac, src[0]);
918 break;
919 case nir_op_fquantize2f16:
920 result = emit_f2f16(&ctx->ac, src[0]);
921 break;
922 case nir_op_umul_high:
923 result = emit_umul_high(&ctx->ac, src[0], src[1]);
924 break;
925 case nir_op_imul_high:
926 result = emit_imul_high(&ctx->ac, src[0], src[1]);
927 break;
928 case nir_op_pack_half_2x16:
929 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
930 break;
931 case nir_op_pack_snorm_2x16:
932 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
933 break;
934 case nir_op_pack_unorm_2x16:
935 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
936 break;
937 case nir_op_unpack_half_2x16:
938 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
939 break;
940 case nir_op_fddx:
941 case nir_op_fddy:
942 case nir_op_fddx_fine:
943 case nir_op_fddy_fine:
944 case nir_op_fddx_coarse:
945 case nir_op_fddy_coarse:
946 result = emit_ddxy(ctx, instr->op, src[0]);
947 break;
948
949 case nir_op_unpack_64_2x32_split_x: {
950 assert(ac_get_llvm_num_components(src[0]) == 1);
951 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
952 ctx->ac.v2i32,
953 "");
954 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
955 ctx->ac.i32_0, "");
956 break;
957 }
958
959 case nir_op_unpack_64_2x32_split_y: {
960 assert(ac_get_llvm_num_components(src[0]) == 1);
961 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
962 ctx->ac.v2i32,
963 "");
964 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
965 ctx->ac.i32_1, "");
966 break;
967 }
968
969 case nir_op_pack_64_2x32_split: {
970 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
971 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
972 break;
973 }
974
975 case nir_op_pack_32_2x16_split: {
976 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
977 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
978 break;
979 }
980
981 case nir_op_unpack_32_2x16_split_x: {
982 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
983 ctx->ac.v2i16,
984 "");
985 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
986 ctx->ac.i32_0, "");
987 break;
988 }
989
990 case nir_op_unpack_32_2x16_split_y: {
991 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
992 ctx->ac.v2i16,
993 "");
994 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
995 ctx->ac.i32_1, "");
996 break;
997 }
998
999 case nir_op_cube_face_coord: {
1000 src[0] = ac_to_float(&ctx->ac, src[0]);
1001 LLVMValueRef results[2];
1002 LLVMValueRef in[3];
1003 for (unsigned chan = 0; chan < 3; chan++)
1004 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1005 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1006 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1007 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1008 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1009 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1010 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1011 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1012 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1013 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1014 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1015 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1016 result = ac_build_gather_values(&ctx->ac, results, 2);
1017 break;
1018 }
1019
1020 case nir_op_cube_face_index: {
1021 src[0] = ac_to_float(&ctx->ac, src[0]);
1022 LLVMValueRef in[3];
1023 for (unsigned chan = 0; chan < 3; chan++)
1024 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1025 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1026 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1027 break;
1028 }
1029
1030 case nir_op_fmin3:
1031 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1032 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1033 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1034 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1035 break;
1036 case nir_op_umin3:
1037 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1038 result = ac_build_umin(&ctx->ac, result, src[2]);
1039 break;
1040 case nir_op_imin3:
1041 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1042 result = ac_build_imin(&ctx->ac, result, src[2]);
1043 break;
1044 case nir_op_fmax3:
1045 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1046 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1047 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1048 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1049 break;
1050 case nir_op_umax3:
1051 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1052 result = ac_build_umax(&ctx->ac, result, src[2]);
1053 break;
1054 case nir_op_imax3:
1055 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1056 result = ac_build_imax(&ctx->ac, result, src[2]);
1057 break;
1058 case nir_op_fmed3: {
1059 src[0] = ac_to_float(&ctx->ac, src[0]);
1060 src[1] = ac_to_float(&ctx->ac, src[1]);
1061 src[2] = ac_to_float(&ctx->ac, src[2]);
1062 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1063 instr->dest.dest.ssa.bit_size);
1064 break;
1065 }
1066 case nir_op_imed3: {
1067 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1068 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1069 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1070 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1071 break;
1072 }
1073 case nir_op_umed3: {
1074 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1075 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1076 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1077 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1078 break;
1079 }
1080
1081 default:
1082 fprintf(stderr, "Unknown NIR alu instr: ");
1083 nir_print_instr(&instr->instr, stderr);
1084 fprintf(stderr, "\n");
1085 abort();
1086 }
1087
1088 if (result) {
1089 assert(instr->dest.dest.is_ssa);
1090 result = ac_to_integer_or_pointer(&ctx->ac, result);
1091 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1092 }
1093 }
1094
1095 static void visit_load_const(struct ac_nir_context *ctx,
1096 const nir_load_const_instr *instr)
1097 {
1098 LLVMValueRef values[4], value = NULL;
1099 LLVMTypeRef element_type =
1100 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1101
1102 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1103 switch (instr->def.bit_size) {
1104 case 8:
1105 values[i] = LLVMConstInt(element_type,
1106 instr->value[i].u8, false);
1107 break;
1108 case 16:
1109 values[i] = LLVMConstInt(element_type,
1110 instr->value[i].u16, false);
1111 break;
1112 case 32:
1113 values[i] = LLVMConstInt(element_type,
1114 instr->value[i].u32, false);
1115 break;
1116 case 64:
1117 values[i] = LLVMConstInt(element_type,
1118 instr->value[i].u64, false);
1119 break;
1120 default:
1121 fprintf(stderr,
1122 "unsupported nir load_const bit_size: %d\n",
1123 instr->def.bit_size);
1124 abort();
1125 }
1126 }
1127 if (instr->def.num_components > 1) {
1128 value = LLVMConstVector(values, instr->def.num_components);
1129 } else
1130 value = values[0];
1131
1132 ctx->ssa_defs[instr->def.index] = value;
1133 }
1134
1135 static LLVMValueRef
1136 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1137 {
1138 LLVMValueRef size =
1139 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1140 LLVMConstInt(ctx->ac.i32, 2, false), "");
1141
1142 /* GFX8 only */
1143 if (ctx->ac.chip_class == GFX8 && in_elements) {
1144 /* On GFX8, the descriptor contains the size in bytes,
1145 * but TXQ must return the size in elements.
1146 * The stride is always non-zero for resources using TXQ.
1147 */
1148 LLVMValueRef stride =
1149 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1150 ctx->ac.i32_1, "");
1151 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1152 LLVMConstInt(ctx->ac.i32, 16, false), "");
1153 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1154 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1155
1156 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1157 }
1158 return size;
1159 }
1160
1161 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1162 * incorrectly forces nearest filtering if the texture format is integer.
1163 * The only effect it has on Gather4, which always returns 4 texels for
1164 * bilinear filtering, is that the final coordinates are off by 0.5 of
1165 * the texel size.
1166 *
1167 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1168 * or (0.5 / size) from the normalized coordinates.
1169 *
1170 * However, cube textures with 8_8_8_8 data formats require a different
1171 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1172 * precision in 32-bit data formats, so it needs to be applied dynamically at
1173 * runtime. In this case, return an i1 value that indicates whether the
1174 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1175 */
1176 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1177 nir_variable *var,
1178 struct ac_image_args *args,
1179 const nir_tex_instr *instr)
1180 {
1181 const struct glsl_type *type = glsl_without_array(var->type);
1182 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1183 LLVMValueRef wa_8888 = NULL;
1184 LLVMValueRef half_texel[2];
1185 LLVMValueRef result;
1186
1187 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1188
1189 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1190 LLVMValueRef formats;
1191 LLVMValueRef data_format;
1192 LLVMValueRef wa_formats;
1193
1194 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1195
1196 data_format = LLVMBuildLShr(ctx->builder, formats,
1197 LLVMConstInt(ctx->i32, 20, false), "");
1198 data_format = LLVMBuildAnd(ctx->builder, data_format,
1199 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1200 wa_8888 = LLVMBuildICmp(
1201 ctx->builder, LLVMIntEQ, data_format,
1202 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1203 "");
1204
1205 uint32_t wa_num_format =
1206 stype == GLSL_TYPE_UINT ?
1207 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1208 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1209 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1210 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1211 "");
1212 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1213 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1214
1215 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1216 args->resource = LLVMBuildInsertElement(
1217 ctx->builder, args->resource, formats, ctx->i32_1, "");
1218 }
1219
1220 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1221 assert(!wa_8888);
1222 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1223 } else {
1224 struct ac_image_args resinfo = {};
1225 LLVMBasicBlockRef bbs[2];
1226
1227 LLVMValueRef unnorm = NULL;
1228 LLVMValueRef default_offset = ctx->f32_0;
1229 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1230 !instr->is_array) {
1231 /* In vulkan, whether the sampler uses unnormalized
1232 * coordinates or not is a dynamic property of the
1233 * sampler. Hence, to figure out whether or not we
1234 * need to divide by the texture size, we need to test
1235 * the sampler at runtime. This tests the bit set by
1236 * radv_init_sampler().
1237 */
1238 LLVMValueRef sampler0 =
1239 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1240 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1241 LLVMConstInt(ctx->i32, 15, false), "");
1242 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1243 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1244 default_offset = LLVMConstReal(ctx->f32, -0.5);
1245 }
1246
1247 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1248 if (wa_8888 || unnorm) {
1249 assert(!(wa_8888 && unnorm));
1250 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1251 /* Skip the texture size query entirely if we don't need it. */
1252 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1253 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1254 }
1255
1256 /* Query the texture size. */
1257 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1258 resinfo.opcode = ac_image_get_resinfo;
1259 resinfo.dmask = 0xf;
1260 resinfo.lod = ctx->i32_0;
1261 resinfo.resource = args->resource;
1262 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1263 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1264
1265 /* Compute -0.5 / size. */
1266 for (unsigned c = 0; c < 2; c++) {
1267 half_texel[c] =
1268 LLVMBuildExtractElement(ctx->builder, size,
1269 LLVMConstInt(ctx->i32, c, 0), "");
1270 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1271 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1272 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1273 LLVMConstReal(ctx->f32, -0.5), "");
1274 }
1275
1276 if (wa_8888 || unnorm) {
1277 ac_build_endif(ctx, 2000);
1278
1279 for (unsigned c = 0; c < 2; c++) {
1280 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1281 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1282 values, bbs);
1283 }
1284 }
1285 }
1286
1287 for (unsigned c = 0; c < 2; c++) {
1288 LLVMValueRef tmp;
1289 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1290 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1291 }
1292
1293 args->attributes = AC_FUNC_ATTR_READNONE;
1294 result = ac_build_image_opcode(ctx, args);
1295
1296 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1297 LLVMValueRef tmp, tmp2;
1298
1299 /* if the cube workaround is in place, f2i the result. */
1300 for (unsigned c = 0; c < 4; c++) {
1301 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1302 if (stype == GLSL_TYPE_UINT)
1303 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1304 else
1305 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1306 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1307 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1308 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1309 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1310 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1311 }
1312 }
1313 return result;
1314 }
1315
1316 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1317 {
1318 nir_deref_instr *texture_deref_instr = NULL;
1319
1320 for (unsigned i = 0; i < instr->num_srcs; i++) {
1321 switch (instr->src[i].src_type) {
1322 case nir_tex_src_texture_deref:
1323 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1324 break;
1325 default:
1326 break;
1327 }
1328 }
1329 return texture_deref_instr;
1330 }
1331
1332 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1333 const nir_tex_instr *instr,
1334 struct ac_image_args *args)
1335 {
1336 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1337 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1338
1339 return ac_build_buffer_load_format(&ctx->ac,
1340 args->resource,
1341 args->coords[0],
1342 ctx->ac.i32_0,
1343 util_last_bit(mask),
1344 0, true);
1345 }
1346
1347 args->opcode = ac_image_sample;
1348
1349 switch (instr->op) {
1350 case nir_texop_txf:
1351 case nir_texop_txf_ms:
1352 case nir_texop_samples_identical:
1353 args->opcode = args->level_zero ||
1354 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1355 ac_image_load : ac_image_load_mip;
1356 args->level_zero = false;
1357 break;
1358 case nir_texop_txs:
1359 case nir_texop_query_levels:
1360 args->opcode = ac_image_get_resinfo;
1361 if (!args->lod)
1362 args->lod = ctx->ac.i32_0;
1363 args->level_zero = false;
1364 break;
1365 case nir_texop_tex:
1366 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1367 assert(!args->lod);
1368 args->level_zero = true;
1369 }
1370 break;
1371 case nir_texop_tg4:
1372 args->opcode = ac_image_gather4;
1373 args->level_zero = true;
1374 break;
1375 case nir_texop_lod:
1376 args->opcode = ac_image_get_lod;
1377 break;
1378 case nir_texop_fragment_fetch:
1379 case nir_texop_fragment_mask_fetch:
1380 args->opcode = ac_image_load;
1381 args->level_zero = false;
1382 break;
1383 default:
1384 break;
1385 }
1386
1387 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1388 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1389 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1390 const struct glsl_type *type = glsl_without_array(var->type);
1391 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1392 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1393 return lower_gather4_integer(&ctx->ac, var, args, instr);
1394 }
1395 }
1396
1397 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1398 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1399 if ((args->dim == ac_image_2darray ||
1400 args->dim == ac_image_2d) && !args->coords[1]) {
1401 args->coords[1] = ctx->ac.i32_0;
1402 }
1403 }
1404
1405 args->attributes = AC_FUNC_ATTR_READNONE;
1406 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1407 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1408 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1409 /* Prevent texture instructions with implicit derivatives from being
1410 * sinked into branches. */
1411 switch (instr->op) {
1412 case nir_texop_tex:
1413 case nir_texop_txb:
1414 case nir_texop_lod:
1415 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1416 break;
1417 default:
1418 break;
1419 }
1420 }
1421
1422 return ac_build_image_opcode(&ctx->ac, args);
1423 }
1424
1425 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1426 nir_intrinsic_instr *instr)
1427 {
1428 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1429 LLVMValueRef index = get_src(ctx, instr->src[1]);
1430
1431 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1432 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1433 return result;
1434 }
1435
1436 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1437 nir_intrinsic_instr *instr)
1438 {
1439 LLVMValueRef ptr, addr;
1440 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1441 unsigned index = nir_intrinsic_base(instr);
1442
1443 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1444 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1445
1446 /* Load constant values from user SGPRS when possible, otherwise
1447 * fallback to the default path that loads directly from memory.
1448 */
1449 if (LLVMIsConstant(src0) &&
1450 instr->dest.ssa.bit_size == 32) {
1451 unsigned count = instr->dest.ssa.num_components;
1452 unsigned offset = index;
1453
1454 offset += LLVMConstIntGetZExtValue(src0);
1455 offset /= 4;
1456
1457 offset -= ctx->args->base_inline_push_consts;
1458
1459 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1460 if (offset + count <= num_inline_push_consts) {
1461 LLVMValueRef push_constants[num_inline_push_consts];
1462 for (unsigned i = 0; i < num_inline_push_consts; i++)
1463 push_constants[i] = ac_get_arg(&ctx->ac,
1464 ctx->args->inline_push_consts[i]);
1465 return ac_build_gather_values(&ctx->ac,
1466 push_constants + offset,
1467 count);
1468 }
1469 }
1470
1471 ptr = LLVMBuildGEP(ctx->ac.builder,
1472 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1473
1474 if (instr->dest.ssa.bit_size == 8) {
1475 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1476 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1477 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1478 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1479
1480 LLVMValueRef params[3];
1481 if (load_dwords > 1) {
1482 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1483 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1484 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1485 } else {
1486 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1487 params[0] = ctx->ac.i32_0;
1488 params[1] = res;
1489 }
1490 params[2] = addr;
1491 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1492
1493 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1494 if (instr->dest.ssa.num_components > 1)
1495 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1496 return res;
1497 } else if (instr->dest.ssa.bit_size == 16) {
1498 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1499 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1500 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1501 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1502 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1503 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1504 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1505 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1506 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1507 LLVMConstInt(ctx->ac.i32, 4, false)};
1508 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1509 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1510 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1511 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1512 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1513 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1514 }
1515
1516 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1517
1518 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1519 }
1520
1521 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1522 const nir_intrinsic_instr *instr)
1523 {
1524 LLVMValueRef index = get_src(ctx, instr->src[0]);
1525
1526 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1527 }
1528
1529 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1530 {
1531 uint32_t new_mask = 0;
1532 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1533 if (mask & (1u << i))
1534 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1535 return new_mask;
1536 }
1537
1538 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1539 unsigned start, unsigned count)
1540 {
1541 LLVMValueRef mask[] = {
1542 ctx->i32_0, ctx->i32_1,
1543 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1544
1545 unsigned src_elements = ac_get_llvm_num_components(src);
1546
1547 if (count == src_elements) {
1548 assert(start == 0);
1549 return src;
1550 } else if (count == 1) {
1551 assert(start < src_elements);
1552 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1553 } else {
1554 assert(start + count <= src_elements);
1555 assert(count <= 4);
1556 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1557 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1558 }
1559 }
1560
1561 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1562 enum gl_access_qualifier access,
1563 bool may_store_unaligned,
1564 bool writeonly_memory)
1565 {
1566 unsigned cache_policy = 0;
1567
1568 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1569 * store opcodes not aligned to a dword are affected. The only way to
1570 * get unaligned stores is through shader images.
1571 */
1572 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1573 /* If this is write-only, don't keep data in L1 to prevent
1574 * evicting L1 cache lines that may be needed by other
1575 * instructions.
1576 */
1577 writeonly_memory ||
1578 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1579 cache_policy |= ac_glc;
1580 }
1581
1582 if (access & ACCESS_STREAM_CACHE_POLICY)
1583 cache_policy |= ac_slc;
1584
1585 return cache_policy;
1586 }
1587
1588 static void visit_store_ssbo(struct ac_nir_context *ctx,
1589 nir_intrinsic_instr *instr)
1590 {
1591 if (ctx->ac.postponed_kill) {
1592 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1593 ctx->ac.postponed_kill, "");
1594 ac_build_ifcc(&ctx->ac, cond, 7000);
1595 }
1596
1597 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1598 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1599 unsigned writemask = nir_intrinsic_write_mask(instr);
1600 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1601 bool writeonly_memory = access & ACCESS_NON_READABLE;
1602 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1603
1604 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1605 get_src(ctx, instr->src[1]), true);
1606 LLVMValueRef base_data = src_data;
1607 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1608 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1609
1610 while (writemask) {
1611 int start, count;
1612 LLVMValueRef data, offset;
1613 LLVMTypeRef data_type;
1614
1615 u_bit_scan_consecutive_range(&writemask, &start, &count);
1616
1617 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1618 * writes into a 2-element and a 1-element write. */
1619 if (count == 3 &&
1620 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1621 writemask |= 1 << (start + 2);
1622 count = 2;
1623 }
1624 int num_bytes = count * elem_size_bytes; /* count in bytes */
1625
1626 /* we can only store 4 DWords at the same time.
1627 * can only happen for 64 Bit vectors. */
1628 if (num_bytes > 16) {
1629 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1630 count = 2;
1631 num_bytes = 16;
1632 }
1633
1634 /* check alignment of 16 Bit stores */
1635 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1636 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1637 count = 1;
1638 num_bytes = 2;
1639 }
1640 data = extract_vector_range(&ctx->ac, base_data, start, count);
1641
1642 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1643 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1644
1645 if (num_bytes == 1) {
1646 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1647 offset, ctx->ac.i32_0,
1648 cache_policy);
1649 } else if (num_bytes == 2) {
1650 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1651 offset, ctx->ac.i32_0,
1652 cache_policy);
1653 } else {
1654 int num_channels = num_bytes / 4;
1655
1656 switch (num_bytes) {
1657 case 16: /* v4f32 */
1658 data_type = ctx->ac.v4f32;
1659 break;
1660 case 12: /* v3f32 */
1661 data_type = ctx->ac.v3f32;
1662 break;
1663 case 8: /* v2f32 */
1664 data_type = ctx->ac.v2f32;
1665 break;
1666 case 4: /* f32 */
1667 data_type = ctx->ac.f32;
1668 break;
1669 default:
1670 unreachable("Malformed vector store.");
1671 }
1672 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1673
1674 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1675 num_channels, offset,
1676 ctx->ac.i32_0, 0,
1677 cache_policy);
1678 }
1679 }
1680
1681 if (ctx->ac.postponed_kill)
1682 ac_build_endif(&ctx->ac, 7000);
1683 }
1684
1685 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1686 LLVMValueRef descriptor,
1687 LLVMValueRef offset,
1688 LLVMValueRef compare,
1689 LLVMValueRef exchange)
1690 {
1691 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1692 if (ctx->abi->robust_buffer_access) {
1693 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1694
1695 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1696 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1697
1698 ac_build_ifcc(&ctx->ac, cond, -1);
1699
1700 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1701 }
1702
1703 LLVMValueRef ptr_parts[2] = {
1704 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1705 LLVMBuildAnd(ctx->ac.builder,
1706 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1707 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1708 };
1709
1710 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1711 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1712
1713 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1714
1715 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1716 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1717 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1718 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1719
1720 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1721 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1722
1723 if (ctx->abi->robust_buffer_access) {
1724 ac_build_endif(&ctx->ac, -1);
1725
1726 LLVMBasicBlockRef incoming_blocks[2] = {
1727 start_block,
1728 then_block,
1729 };
1730
1731 LLVMValueRef incoming_values[2] = {
1732 LLVMConstInt(ctx->ac.i64, 0, 0),
1733 result,
1734 };
1735 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1736 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1737 return ret;
1738 } else {
1739 return result;
1740 }
1741 }
1742
1743 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1744 const nir_intrinsic_instr *instr)
1745 {
1746 if (ctx->ac.postponed_kill) {
1747 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1748 ctx->ac.postponed_kill, "");
1749 ac_build_ifcc(&ctx->ac, cond, 7001);
1750 }
1751
1752 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1753 const char *op;
1754 char name[64], type[8];
1755 LLVMValueRef params[6], descriptor;
1756 LLVMValueRef result;
1757 int arg_count = 0;
1758
1759 switch (instr->intrinsic) {
1760 case nir_intrinsic_ssbo_atomic_add:
1761 op = "add";
1762 break;
1763 case nir_intrinsic_ssbo_atomic_imin:
1764 op = "smin";
1765 break;
1766 case nir_intrinsic_ssbo_atomic_umin:
1767 op = "umin";
1768 break;
1769 case nir_intrinsic_ssbo_atomic_imax:
1770 op = "smax";
1771 break;
1772 case nir_intrinsic_ssbo_atomic_umax:
1773 op = "umax";
1774 break;
1775 case nir_intrinsic_ssbo_atomic_and:
1776 op = "and";
1777 break;
1778 case nir_intrinsic_ssbo_atomic_or:
1779 op = "or";
1780 break;
1781 case nir_intrinsic_ssbo_atomic_xor:
1782 op = "xor";
1783 break;
1784 case nir_intrinsic_ssbo_atomic_exchange:
1785 op = "swap";
1786 break;
1787 case nir_intrinsic_ssbo_atomic_comp_swap:
1788 op = "cmpswap";
1789 break;
1790 default:
1791 abort();
1792 }
1793
1794 descriptor = ctx->abi->load_ssbo(ctx->abi,
1795 get_src(ctx, instr->src[0]),
1796 true);
1797
1798 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1799 return_type == ctx->ac.i64) {
1800 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1801 get_src(ctx, instr->src[1]),
1802 get_src(ctx, instr->src[2]),
1803 get_src(ctx, instr->src[3]));
1804 if (ctx->ac.postponed_kill)
1805 ac_build_endif(&ctx->ac, 7001);
1806 return result;
1807 }
1808 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1809 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1810 }
1811 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1812 params[arg_count++] = descriptor;
1813
1814 if (LLVM_VERSION_MAJOR >= 9) {
1815 /* XXX: The new raw/struct atomic intrinsics are buggy with
1816 * LLVM 8, see r358579.
1817 */
1818 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1819 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1820 params[arg_count++] = ctx->ac.i32_0; /* slc */
1821
1822 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1823 snprintf(name, sizeof(name),
1824 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1825 } else {
1826 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1827 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1828 params[arg_count++] = ctx->ac.i1false; /* slc */
1829
1830 assert(return_type == ctx->ac.i32);
1831 snprintf(name, sizeof(name),
1832 "llvm.amdgcn.buffer.atomic.%s", op);
1833 }
1834
1835 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1836 arg_count, 0);
1837 if (ctx->ac.postponed_kill)
1838 ac_build_endif(&ctx->ac, 7001);
1839 return result;
1840 }
1841
1842 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1843 const nir_intrinsic_instr *instr)
1844 {
1845 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1846 int num_components = instr->num_components;
1847 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1848 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1849
1850 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1851 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1852 get_src(ctx, instr->src[0]), false);
1853 LLVMValueRef vindex = ctx->ac.i32_0;
1854
1855 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1856 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1857
1858 LLVMValueRef results[4];
1859 for (int i = 0; i < num_components;) {
1860 int num_elems = num_components - i;
1861 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1862 num_elems = 1;
1863 if (num_elems * elem_size_bytes > 16)
1864 num_elems = 16 / elem_size_bytes;
1865 int load_bytes = num_elems * elem_size_bytes;
1866
1867 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1868
1869 LLVMValueRef ret;
1870
1871 if (load_bytes == 1) {
1872 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1873 rsrc,
1874 offset,
1875 ctx->ac.i32_0,
1876 immoffset,
1877 cache_policy);
1878 } else if (load_bytes == 2) {
1879 ret = ac_build_tbuffer_load_short(&ctx->ac,
1880 rsrc,
1881 offset,
1882 ctx->ac.i32_0,
1883 immoffset,
1884 cache_policy);
1885 } else {
1886 int num_channels = util_next_power_of_two(load_bytes) / 4;
1887 bool can_speculate = access & ACCESS_CAN_REORDER;
1888
1889 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1890 vindex, offset, immoffset, 0,
1891 cache_policy, can_speculate, false);
1892 }
1893
1894 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1895 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1896 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1897
1898 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1899 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1900
1901 for (unsigned j = 0; j < num_elems; j++) {
1902 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1903 }
1904 i += num_elems;
1905 }
1906
1907 return ac_build_gather_values(&ctx->ac, results, num_components);
1908 }
1909
1910 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1911 const nir_intrinsic_instr *instr)
1912 {
1913 LLVMValueRef ret;
1914 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1915 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1916 int num_components = instr->num_components;
1917
1918 if (ctx->abi->load_ubo)
1919 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1920
1921 if (instr->dest.ssa.bit_size == 64)
1922 num_components *= 2;
1923
1924 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1925 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1926 LLVMValueRef results[num_components];
1927 for (unsigned i = 0; i < num_components; ++i) {
1928 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1929 load_bytes * i, 0);
1930
1931 if (load_bytes == 1) {
1932 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1933 rsrc,
1934 offset,
1935 ctx->ac.i32_0,
1936 immoffset,
1937 0);
1938 } else {
1939 assert(load_bytes == 2);
1940 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1941 rsrc,
1942 offset,
1943 ctx->ac.i32_0,
1944 immoffset,
1945 0);
1946 }
1947 }
1948 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1949 } else {
1950 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1951 NULL, 0, 0, true, true);
1952
1953 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1954 }
1955
1956 return LLVMBuildBitCast(ctx->ac.builder, ret,
1957 get_def_type(ctx, &instr->dest.ssa), "");
1958 }
1959
1960 static void
1961 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1962 bool vs_in, unsigned *vertex_index_out,
1963 LLVMValueRef *vertex_index_ref,
1964 unsigned *const_out, LLVMValueRef *indir_out)
1965 {
1966 nir_variable *var = nir_deref_instr_get_variable(instr);
1967 nir_deref_path path;
1968 unsigned idx_lvl = 1;
1969
1970 nir_deref_path_init(&path, instr, NULL);
1971
1972 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1973 if (vertex_index_ref) {
1974 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1975 if (vertex_index_out)
1976 *vertex_index_out = 0;
1977 } else {
1978 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1979 }
1980 ++idx_lvl;
1981 }
1982
1983 uint32_t const_offset = 0;
1984 LLVMValueRef offset = NULL;
1985
1986 if (var->data.compact) {
1987 assert(instr->deref_type == nir_deref_type_array);
1988 const_offset = nir_src_as_uint(instr->arr.index);
1989 goto out;
1990 }
1991
1992 for (; path.path[idx_lvl]; ++idx_lvl) {
1993 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1994 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1995 unsigned index = path.path[idx_lvl]->strct.index;
1996
1997 for (unsigned i = 0; i < index; i++) {
1998 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1999 const_offset += glsl_count_attribute_slots(ft, vs_in);
2000 }
2001 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2002 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2003 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2004 const_offset += size *
2005 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2006 } else {
2007 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2008 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2009 if (offset)
2010 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2011 else
2012 offset = array_off;
2013 }
2014 } else
2015 unreachable("Uhandled deref type in get_deref_instr_offset");
2016 }
2017
2018 out:
2019 nir_deref_path_finish(&path);
2020
2021 if (const_offset && offset)
2022 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2023 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2024 "");
2025
2026 *const_out = const_offset;
2027 *indir_out = offset;
2028 }
2029
2030 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2031 nir_intrinsic_instr *instr,
2032 bool load_inputs)
2033 {
2034 LLVMValueRef result;
2035 LLVMValueRef vertex_index = NULL;
2036 LLVMValueRef indir_index = NULL;
2037 unsigned const_index = 0;
2038
2039 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2040
2041 unsigned location = var->data.location;
2042 unsigned driver_location = var->data.driver_location;
2043 const bool is_patch = var->data.patch ||
2044 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2045 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2046 const bool is_compact = var->data.compact;
2047
2048 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2049 false, NULL, is_patch ? NULL : &vertex_index,
2050 &const_index, &indir_index);
2051
2052 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2053
2054 LLVMTypeRef src_component_type;
2055 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2056 src_component_type = LLVMGetElementType(dest_type);
2057 else
2058 src_component_type = dest_type;
2059
2060 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2061 vertex_index, indir_index,
2062 const_index, location, driver_location,
2063 var->data.location_frac,
2064 instr->num_components,
2065 is_patch, is_compact, load_inputs);
2066 if (instr->dest.ssa.bit_size == 16) {
2067 result = ac_to_integer(&ctx->ac, result);
2068 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2069 }
2070 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2071 }
2072
2073 static unsigned
2074 type_scalar_size_bytes(const struct glsl_type *type)
2075 {
2076 assert(glsl_type_is_vector_or_scalar(type) ||
2077 glsl_type_is_matrix(type));
2078 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2079 }
2080
2081 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2082 nir_intrinsic_instr *instr)
2083 {
2084 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2085 nir_variable *var = nir_deref_instr_get_variable(deref);
2086
2087 LLVMValueRef values[8];
2088 int idx = 0;
2089 int ve = instr->dest.ssa.num_components;
2090 unsigned comp = 0;
2091 LLVMValueRef indir_index;
2092 LLVMValueRef ret;
2093 unsigned const_index;
2094 unsigned stride = 4;
2095 int mode = deref->mode;
2096
2097 if (var) {
2098 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2099 var->data.mode == nir_var_shader_in;
2100 idx = var->data.driver_location;
2101 comp = var->data.location_frac;
2102 mode = var->data.mode;
2103
2104 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2105 &const_index, &indir_index);
2106
2107 if (var->data.compact) {
2108 stride = 1;
2109 const_index += comp;
2110 comp = 0;
2111 }
2112 }
2113
2114 if (instr->dest.ssa.bit_size == 64 &&
2115 (deref->mode == nir_var_shader_in ||
2116 deref->mode == nir_var_shader_out ||
2117 deref->mode == nir_var_function_temp))
2118 ve *= 2;
2119
2120 switch (mode) {
2121 case nir_var_shader_in:
2122 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2123 ctx->stage == MESA_SHADER_TESS_EVAL) {
2124 return load_tess_varyings(ctx, instr, true);
2125 }
2126
2127 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2128 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2129 LLVMValueRef indir_index;
2130 unsigned const_index, vertex_index;
2131 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2132 &const_index, &indir_index);
2133 assert(indir_index == NULL);
2134
2135 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2136 var->data.driver_location,
2137 var->data.location_frac,
2138 instr->num_components, vertex_index, const_index, type);
2139 }
2140
2141 for (unsigned chan = comp; chan < ve + comp; chan++) {
2142 if (indir_index) {
2143 unsigned count = glsl_count_attribute_slots(
2144 var->type,
2145 ctx->stage == MESA_SHADER_VERTEX);
2146 count -= chan / 4;
2147 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2148 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2149 stride, false, true);
2150
2151 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2152 tmp_vec,
2153 indir_index, "");
2154 } else
2155 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2156 }
2157 break;
2158 case nir_var_function_temp:
2159 for (unsigned chan = 0; chan < ve; chan++) {
2160 if (indir_index) {
2161 unsigned count = glsl_count_attribute_slots(
2162 var->type, false);
2163 count -= chan / 4;
2164 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2165 &ctx->ac, ctx->locals + idx + chan, count,
2166 stride, true, true);
2167
2168 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2169 tmp_vec,
2170 indir_index, "");
2171 } else {
2172 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2173 }
2174 }
2175 break;
2176 case nir_var_shader_out:
2177 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2178 return load_tess_varyings(ctx, instr, false);
2179 }
2180
2181 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2182 var->data.fb_fetch_output &&
2183 ctx->abi->emit_fbfetch)
2184 return ctx->abi->emit_fbfetch(ctx->abi);
2185
2186 for (unsigned chan = comp; chan < ve + comp; chan++) {
2187 if (indir_index) {
2188 unsigned count = glsl_count_attribute_slots(
2189 var->type, false);
2190 count -= chan / 4;
2191 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2192 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2193 stride, true, true);
2194
2195 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2196 tmp_vec,
2197 indir_index, "");
2198 } else {
2199 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2200 ctx->abi->outputs[idx + chan + const_index * stride],
2201 "");
2202 }
2203 }
2204 break;
2205 case nir_var_mem_global: {
2206 LLVMValueRef address = get_src(ctx, instr->src[0]);
2207 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2208 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2209 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2210
2211 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2212 if (stride != natural_stride) {
2213 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2214 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2215 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2216
2217 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2218 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2219 values[i] = LLVMBuildLoad(ctx->ac.builder,
2220 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2221 }
2222 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2223 } else {
2224 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2225 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2226 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2227 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2228 return val;
2229 }
2230 }
2231 default:
2232 unreachable("unhandle variable mode");
2233 }
2234 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2235 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2236 }
2237
2238 static void
2239 visit_store_var(struct ac_nir_context *ctx,
2240 nir_intrinsic_instr *instr)
2241 {
2242 if (ctx->ac.postponed_kill) {
2243 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2244 ctx->ac.postponed_kill, "");
2245 ac_build_ifcc(&ctx->ac, cond, 7002);
2246 }
2247
2248 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2249 nir_variable *var = nir_deref_instr_get_variable(deref);
2250
2251 LLVMValueRef temp_ptr, value;
2252 int idx = 0;
2253 unsigned comp = 0;
2254 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2255 int writemask = instr->const_index[0];
2256 LLVMValueRef indir_index;
2257 unsigned const_index;
2258
2259 if (var) {
2260 get_deref_offset(ctx, deref, false,
2261 NULL, NULL, &const_index, &indir_index);
2262 idx = var->data.driver_location;
2263 comp = var->data.location_frac;
2264
2265 if (var->data.compact) {
2266 const_index += comp;
2267 comp = 0;
2268 }
2269 }
2270
2271 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2272 (deref->mode == nir_var_shader_out ||
2273 deref->mode == nir_var_function_temp)) {
2274
2275 src = LLVMBuildBitCast(ctx->ac.builder, src,
2276 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2277 "");
2278
2279 writemask = widen_mask(writemask, 2);
2280 }
2281
2282 writemask = writemask << comp;
2283
2284 switch (deref->mode) {
2285 case nir_var_shader_out:
2286
2287 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2288 LLVMValueRef vertex_index = NULL;
2289 LLVMValueRef indir_index = NULL;
2290 unsigned const_index = 0;
2291 const bool is_patch = var->data.patch ||
2292 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2293 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2294
2295 get_deref_offset(ctx, deref, false, NULL,
2296 is_patch ? NULL : &vertex_index,
2297 &const_index, &indir_index);
2298
2299 ctx->abi->store_tcs_outputs(ctx->abi, var,
2300 vertex_index, indir_index,
2301 const_index, src, writemask);
2302 break;
2303 }
2304
2305 for (unsigned chan = 0; chan < 8; chan++) {
2306 int stride = 4;
2307 if (!(writemask & (1 << chan)))
2308 continue;
2309
2310 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2311
2312 if (var->data.compact)
2313 stride = 1;
2314 if (indir_index) {
2315 unsigned count = glsl_count_attribute_slots(
2316 var->type, false);
2317 count -= chan / 4;
2318 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2319 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2320 stride, true, true);
2321
2322 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2323 value, indir_index, "");
2324 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2325 count, stride, tmp_vec);
2326
2327 } else {
2328 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2329
2330 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2331 }
2332 }
2333 break;
2334 case nir_var_function_temp:
2335 for (unsigned chan = 0; chan < 8; chan++) {
2336 if (!(writemask & (1 << chan)))
2337 continue;
2338
2339 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2340 if (indir_index) {
2341 unsigned count = glsl_count_attribute_slots(
2342 var->type, false);
2343 count -= chan / 4;
2344 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2345 &ctx->ac, ctx->locals + idx + chan, count,
2346 4, true, true);
2347
2348 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2349 value, indir_index, "");
2350 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2351 count, 4, tmp_vec);
2352 } else {
2353 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2354
2355 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2356 }
2357 }
2358 break;
2359
2360 case nir_var_mem_global: {
2361 int writemask = instr->const_index[0];
2362 LLVMValueRef address = get_src(ctx, instr->src[0]);
2363 LLVMValueRef val = get_src(ctx, instr->src[1]);
2364
2365 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2366 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2367 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2368
2369 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2370 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2371 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2372
2373 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2374 stride == natural_stride) {
2375 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2376 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2377 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2378
2379 val = LLVMBuildBitCast(ctx->ac.builder, val,
2380 LLVMGetElementType(LLVMTypeOf(address)), "");
2381 LLVMBuildStore(ctx->ac.builder, val, address);
2382 } else {
2383 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2384 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2385 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2386 for (unsigned chan = 0; chan < 4; chan++) {
2387 if (!(writemask & (1 << chan)))
2388 continue;
2389
2390 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2391
2392 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2393 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2394 chan);
2395 src = LLVMBuildBitCast(ctx->ac.builder, src,
2396 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2397 LLVMBuildStore(ctx->ac.builder, src, ptr);
2398 }
2399 }
2400 break;
2401 }
2402 default:
2403 abort();
2404 break;
2405 }
2406
2407 if (ctx->ac.postponed_kill)
2408 ac_build_endif(&ctx->ac, 7002);
2409 }
2410
2411 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2412 {
2413 switch (dim) {
2414 case GLSL_SAMPLER_DIM_BUF:
2415 return 1;
2416 case GLSL_SAMPLER_DIM_1D:
2417 return array ? 2 : 1;
2418 case GLSL_SAMPLER_DIM_2D:
2419 return array ? 3 : 2;
2420 case GLSL_SAMPLER_DIM_MS:
2421 return array ? 4 : 3;
2422 case GLSL_SAMPLER_DIM_3D:
2423 case GLSL_SAMPLER_DIM_CUBE:
2424 return 3;
2425 case GLSL_SAMPLER_DIM_RECT:
2426 case GLSL_SAMPLER_DIM_SUBPASS:
2427 return 2;
2428 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2429 return 3;
2430 default:
2431 break;
2432 }
2433 return 0;
2434 }
2435
2436 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2437 LLVMValueRef coord_x, LLVMValueRef coord_y,
2438 LLVMValueRef coord_z,
2439 LLVMValueRef sample_index,
2440 LLVMValueRef fmask_desc_ptr)
2441 {
2442 unsigned sample_chan = coord_z ? 3 : 2;
2443 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2444 addr[sample_chan] = sample_index;
2445
2446 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2447 return addr[sample_chan];
2448 }
2449
2450 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2451 {
2452 assert(instr->src[0].is_ssa);
2453 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2454 }
2455
2456 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2457 const nir_intrinsic_instr *instr,
2458 enum ac_descriptor_type desc_type,
2459 bool write)
2460 {
2461 nir_deref_instr *deref_instr =
2462 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2463 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2464
2465 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2466 }
2467
2468 static void get_image_coords(struct ac_nir_context *ctx,
2469 const nir_intrinsic_instr *instr,
2470 struct ac_image_args *args,
2471 enum glsl_sampler_dim dim,
2472 bool is_array)
2473 {
2474 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2475 LLVMValueRef masks[] = {
2476 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2477 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2478 };
2479 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2480
2481 int count;
2482 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2483 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2484 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2485 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2486 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2487 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2488 count = image_type_to_components_count(dim, is_array);
2489
2490 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2491 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2492 LLVMValueRef fmask_load_address[3];
2493
2494 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2495 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2496 if (is_array)
2497 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2498 else
2499 fmask_load_address[2] = NULL;
2500
2501 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2502 fmask_load_address[0],
2503 fmask_load_address[1],
2504 fmask_load_address[2],
2505 sample_index,
2506 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2507 AC_DESC_FMASK, &instr->instr, true, false));
2508 }
2509 if (count == 1 && !gfx9_1d) {
2510 if (instr->src[1].ssa->num_components)
2511 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2512 else
2513 args->coords[0] = src0;
2514 } else {
2515 int chan;
2516 if (is_ms)
2517 count--;
2518 for (chan = 0; chan < count; ++chan) {
2519 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2520 }
2521
2522 if (gfx9_1d) {
2523 if (is_array) {
2524 args->coords[2] = args->coords[1];
2525 args->coords[1] = ctx->ac.i32_0;
2526 } else
2527 args->coords[1] = ctx->ac.i32_0;
2528 count++;
2529 }
2530 if (ctx->ac.chip_class == GFX9 &&
2531 dim == GLSL_SAMPLER_DIM_2D &&
2532 !is_array) {
2533 /* The hw can't bind a slice of a 3D image as a 2D
2534 * image, because it ignores BASE_ARRAY if the target
2535 * is 3D. The workaround is to read BASE_ARRAY and set
2536 * it as the 3rd address operand for all 2D images.
2537 */
2538 LLVMValueRef first_layer, const5, mask;
2539
2540 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2541 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2542 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2543 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2544
2545 args->coords[count] = first_layer;
2546 count++;
2547 }
2548
2549
2550 if (is_ms) {
2551 args->coords[count] = sample_index;
2552 count++;
2553 }
2554 }
2555 }
2556
2557 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2558 const nir_intrinsic_instr *instr,
2559 bool write, bool atomic)
2560 {
2561 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2562 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2563 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2564 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2565 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2566
2567 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2568 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2569 elem_count, stride, "");
2570
2571 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2572 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2573 }
2574 return rsrc;
2575 }
2576
2577 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2578 const nir_intrinsic_instr *instr,
2579 bool bindless)
2580 {
2581 LLVMValueRef res;
2582
2583 enum glsl_sampler_dim dim;
2584 enum gl_access_qualifier access;
2585 bool is_array;
2586 if (bindless) {
2587 dim = nir_intrinsic_image_dim(instr);
2588 access = nir_intrinsic_access(instr);
2589 is_array = nir_intrinsic_image_array(instr);
2590 } else {
2591 const nir_deref_instr *image_deref = get_image_deref(instr);
2592 const struct glsl_type *type = image_deref->type;
2593 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2594 dim = glsl_get_sampler_dim(type);
2595 access = var->data.access;
2596 is_array = glsl_sampler_type_is_array(type);
2597 }
2598
2599 struct ac_image_args args = {};
2600
2601 args.cache_policy = get_cache_policy(ctx, access, false, false);
2602
2603 if (dim == GLSL_SAMPLER_DIM_BUF) {
2604 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2605 unsigned num_channels = util_last_bit(mask);
2606 LLVMValueRef rsrc, vindex;
2607
2608 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2609 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2610 ctx->ac.i32_0, "");
2611
2612 bool can_speculate = access & ACCESS_CAN_REORDER;
2613 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2614 ctx->ac.i32_0, num_channels,
2615 args.cache_policy,
2616 can_speculate);
2617 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2618
2619 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2620 res = ac_to_integer(&ctx->ac, res);
2621 } else {
2622 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2623
2624 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2625 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2626 get_image_coords(ctx, instr, &args, dim, is_array);
2627 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2628 if (!level_zero)
2629 args.lod = get_src(ctx, instr->src[3]);
2630 args.dmask = 15;
2631 args.attributes = AC_FUNC_ATTR_READONLY;
2632
2633 res = ac_build_image_opcode(&ctx->ac, &args);
2634 }
2635 return res;
2636 }
2637
2638 static void visit_image_store(struct ac_nir_context *ctx,
2639 nir_intrinsic_instr *instr,
2640 bool bindless)
2641 {
2642 if (ctx->ac.postponed_kill) {
2643 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2644 ctx->ac.postponed_kill, "");
2645 ac_build_ifcc(&ctx->ac, cond, 7003);
2646 }
2647
2648 enum glsl_sampler_dim dim;
2649 enum gl_access_qualifier access;
2650 bool is_array;
2651 if (bindless) {
2652 dim = nir_intrinsic_image_dim(instr);
2653 access = nir_intrinsic_access(instr);
2654 is_array = nir_intrinsic_image_array(instr);
2655 } else {
2656 const nir_deref_instr *image_deref = get_image_deref(instr);
2657 const struct glsl_type *type = image_deref->type;
2658 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2659 dim = glsl_get_sampler_dim(type);
2660 access = var->data.access;
2661 is_array = glsl_sampler_type_is_array(type);
2662 }
2663
2664 bool writeonly_memory = access & ACCESS_NON_READABLE;
2665 struct ac_image_args args = {};
2666
2667 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2668
2669 if (dim == GLSL_SAMPLER_DIM_BUF) {
2670 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2671 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2672 unsigned src_channels = ac_get_llvm_num_components(src);
2673 LLVMValueRef vindex;
2674
2675 if (src_channels == 3)
2676 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2677
2678 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2679 get_src(ctx, instr->src[1]),
2680 ctx->ac.i32_0, "");
2681
2682 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2683 ctx->ac.i32_0, src_channels,
2684 args.cache_policy);
2685 } else {
2686 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2687
2688 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2689 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2690 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2691 get_image_coords(ctx, instr, &args, dim, is_array);
2692 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2693 if (!level_zero)
2694 args.lod = get_src(ctx, instr->src[4]);
2695 args.dmask = 15;
2696
2697 ac_build_image_opcode(&ctx->ac, &args);
2698 }
2699
2700 if (ctx->ac.postponed_kill)
2701 ac_build_endif(&ctx->ac, 7003);
2702 }
2703
2704 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2705 const nir_intrinsic_instr *instr,
2706 bool bindless)
2707 {
2708 if (ctx->ac.postponed_kill) {
2709 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2710 ctx->ac.postponed_kill, "");
2711 ac_build_ifcc(&ctx->ac, cond, 7004);
2712 }
2713
2714 LLVMValueRef params[7];
2715 int param_count = 0;
2716
2717 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2718 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2719 const char *atomic_name;
2720 char intrinsic_name[64];
2721 enum ac_atomic_op atomic_subop;
2722 ASSERTED int length;
2723
2724 enum glsl_sampler_dim dim;
2725 bool is_array;
2726 if (bindless) {
2727 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2728 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2729 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2730 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2731 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2732 assert(format == GL_R32UI || format == GL_R32I);
2733 }
2734 dim = nir_intrinsic_image_dim(instr);
2735 is_array = nir_intrinsic_image_array(instr);
2736 } else {
2737 const struct glsl_type *type = get_image_deref(instr)->type;
2738 dim = glsl_get_sampler_dim(type);
2739 is_array = glsl_sampler_type_is_array(type);
2740 }
2741
2742 switch (instr->intrinsic) {
2743 case nir_intrinsic_bindless_image_atomic_add:
2744 case nir_intrinsic_image_deref_atomic_add:
2745 atomic_name = "add";
2746 atomic_subop = ac_atomic_add;
2747 break;
2748 case nir_intrinsic_bindless_image_atomic_imin:
2749 case nir_intrinsic_image_deref_atomic_imin:
2750 atomic_name = "smin";
2751 atomic_subop = ac_atomic_smin;
2752 break;
2753 case nir_intrinsic_bindless_image_atomic_umin:
2754 case nir_intrinsic_image_deref_atomic_umin:
2755 atomic_name = "umin";
2756 atomic_subop = ac_atomic_umin;
2757 break;
2758 case nir_intrinsic_bindless_image_atomic_imax:
2759 case nir_intrinsic_image_deref_atomic_imax:
2760 atomic_name = "smax";
2761 atomic_subop = ac_atomic_smax;
2762 break;
2763 case nir_intrinsic_bindless_image_atomic_umax:
2764 case nir_intrinsic_image_deref_atomic_umax:
2765 atomic_name = "umax";
2766 atomic_subop = ac_atomic_umax;
2767 break;
2768 case nir_intrinsic_bindless_image_atomic_and:
2769 case nir_intrinsic_image_deref_atomic_and:
2770 atomic_name = "and";
2771 atomic_subop = ac_atomic_and;
2772 break;
2773 case nir_intrinsic_bindless_image_atomic_or:
2774 case nir_intrinsic_image_deref_atomic_or:
2775 atomic_name = "or";
2776 atomic_subop = ac_atomic_or;
2777 break;
2778 case nir_intrinsic_bindless_image_atomic_xor:
2779 case nir_intrinsic_image_deref_atomic_xor:
2780 atomic_name = "xor";
2781 atomic_subop = ac_atomic_xor;
2782 break;
2783 case nir_intrinsic_bindless_image_atomic_exchange:
2784 case nir_intrinsic_image_deref_atomic_exchange:
2785 atomic_name = "swap";
2786 atomic_subop = ac_atomic_swap;
2787 break;
2788 case nir_intrinsic_bindless_image_atomic_comp_swap:
2789 case nir_intrinsic_image_deref_atomic_comp_swap:
2790 atomic_name = "cmpswap";
2791 atomic_subop = 0; /* not used */
2792 break;
2793 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2794 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2795 atomic_name = "inc";
2796 atomic_subop = ac_atomic_inc_wrap;
2797 /* ATOMIC_INC instruction does:
2798 * value = (value + 1) % (data + 1)
2799 * but we want:
2800 * value = (value + 1) % data
2801 * So replace 'data' by 'data - 1'.
2802 */
2803 ctx->ssa_defs[instr->src[3].ssa->index] =
2804 LLVMBuildSub(ctx->ac.builder,
2805 ctx->ssa_defs[instr->src[3].ssa->index],
2806 ctx->ac.i32_1, "");
2807 break;
2808 }
2809 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2810 case nir_intrinsic_image_deref_atomic_dec_wrap:
2811 atomic_name = "dec";
2812 atomic_subop = ac_atomic_dec_wrap;
2813 break;
2814 default:
2815 abort();
2816 }
2817
2818 if (cmpswap)
2819 params[param_count++] = get_src(ctx, instr->src[4]);
2820 params[param_count++] = get_src(ctx, instr->src[3]);
2821
2822 LLVMValueRef result;
2823 if (dim == GLSL_SAMPLER_DIM_BUF) {
2824 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2825 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2826 ctx->ac.i32_0, ""); /* vindex */
2827 params[param_count++] = ctx->ac.i32_0; /* voffset */
2828 if (LLVM_VERSION_MAJOR >= 9) {
2829 /* XXX: The new raw/struct atomic intrinsics are buggy
2830 * with LLVM 8, see r358579.
2831 */
2832 params[param_count++] = ctx->ac.i32_0; /* soffset */
2833 params[param_count++] = ctx->ac.i32_0; /* slc */
2834
2835 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2836 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2837 } else {
2838 params[param_count++] = ctx->ac.i1false; /* slc */
2839
2840 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2841 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2842 }
2843
2844 assert(length < sizeof(intrinsic_name));
2845 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2846 params, param_count, 0);
2847 } else {
2848 struct ac_image_args args = {};
2849 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2850 args.atomic = atomic_subop;
2851 args.data[0] = params[0];
2852 if (cmpswap)
2853 args.data[1] = params[1];
2854 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2855 get_image_coords(ctx, instr, &args, dim, is_array);
2856 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2857
2858 result = ac_build_image_opcode(&ctx->ac, &args);
2859 }
2860
2861 if (ctx->ac.postponed_kill)
2862 ac_build_endif(&ctx->ac, 7004);
2863 return result;
2864 }
2865
2866 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2867 const nir_intrinsic_instr *instr)
2868 {
2869 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2870
2871 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2872 }
2873
2874 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2875 const nir_intrinsic_instr *instr,
2876 bool bindless)
2877 {
2878 LLVMValueRef res;
2879
2880 enum glsl_sampler_dim dim;
2881 bool is_array;
2882 if (bindless) {
2883 dim = nir_intrinsic_image_dim(instr);
2884 is_array = nir_intrinsic_image_array(instr);
2885 } else {
2886 const struct glsl_type *type = get_image_deref(instr)->type;
2887 dim = glsl_get_sampler_dim(type);
2888 is_array = glsl_sampler_type_is_array(type);
2889 }
2890
2891 if (dim == GLSL_SAMPLER_DIM_BUF)
2892 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2893
2894 struct ac_image_args args = { 0 };
2895
2896 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2897 args.dmask = 0xf;
2898 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2899 args.opcode = ac_image_get_resinfo;
2900 args.lod = ctx->ac.i32_0;
2901 args.attributes = AC_FUNC_ATTR_READNONE;
2902
2903 res = ac_build_image_opcode(&ctx->ac, &args);
2904
2905 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2906
2907 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2908 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2909 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2910 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2911 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2912 }
2913 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2914 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2915 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2916 ctx->ac.i32_1, "");
2917
2918 }
2919 return res;
2920 }
2921
2922 static void emit_membar(struct ac_llvm_context *ac,
2923 const nir_intrinsic_instr *instr)
2924 {
2925 unsigned wait_flags = 0;
2926
2927 switch (instr->intrinsic) {
2928 case nir_intrinsic_memory_barrier:
2929 case nir_intrinsic_group_memory_barrier:
2930 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2931 break;
2932 case nir_intrinsic_memory_barrier_buffer:
2933 case nir_intrinsic_memory_barrier_image:
2934 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2935 break;
2936 case nir_intrinsic_memory_barrier_shared:
2937 wait_flags = AC_WAIT_LGKM;
2938 break;
2939 default:
2940 break;
2941 }
2942
2943 ac_build_waitcnt(ac, wait_flags);
2944 }
2945
2946 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2947 {
2948 /* GFX6 only (thanks to a hw bug workaround):
2949 * The real barrier instruction isn’t needed, because an entire patch
2950 * always fits into a single wave.
2951 */
2952 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2953 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2954 return;
2955 }
2956 ac_build_s_barrier(ac);
2957 }
2958
2959 static void emit_discard(struct ac_nir_context *ctx,
2960 const nir_intrinsic_instr *instr)
2961 {
2962 LLVMValueRef cond;
2963
2964 if (instr->intrinsic == nir_intrinsic_discard_if) {
2965 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2966 get_src(ctx, instr->src[0]),
2967 ctx->ac.i32_0, "");
2968 } else {
2969 assert(instr->intrinsic == nir_intrinsic_discard);
2970 cond = ctx->ac.i1false;
2971 }
2972
2973 ctx->abi->emit_kill(ctx->abi, cond);
2974 }
2975
2976 static void emit_demote(struct ac_nir_context *ctx,
2977 const nir_intrinsic_instr *instr)
2978 {
2979 LLVMValueRef cond;
2980
2981 if (instr->intrinsic == nir_intrinsic_demote_if) {
2982 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2983 get_src(ctx, instr->src[0]),
2984 ctx->ac.i32_0, "");
2985 } else {
2986 assert(instr->intrinsic == nir_intrinsic_demote);
2987 cond = ctx->ac.i1false;
2988 }
2989
2990 /* Kill immediately while maintaining WQM. */
2991 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
2992
2993 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
2994 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
2995 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
2996 return;
2997 }
2998
2999 static LLVMValueRef
3000 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3001 {
3002 LLVMValueRef result;
3003 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3004 result = LLVMBuildAnd(ctx->ac.builder,
3005 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3006 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3007
3008 if (ctx->ac.wave_size == 32)
3009 result = LLVMBuildLShr(ctx->ac.builder, result,
3010 LLVMConstInt(ctx->ac.i32, 1, false), "");
3011
3012 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3013 }
3014
3015 static LLVMValueRef
3016 visit_load_subgroup_id(struct ac_nir_context *ctx)
3017 {
3018 if (ctx->stage == MESA_SHADER_COMPUTE) {
3019 LLVMValueRef result;
3020 result = LLVMBuildAnd(ctx->ac.builder,
3021 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3022 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3023 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3024 } else {
3025 return LLVMConstInt(ctx->ac.i32, 0, false);
3026 }
3027 }
3028
3029 static LLVMValueRef
3030 visit_load_num_subgroups(struct ac_nir_context *ctx)
3031 {
3032 if (ctx->stage == MESA_SHADER_COMPUTE) {
3033 return LLVMBuildAnd(ctx->ac.builder,
3034 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3035 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3036 } else {
3037 return LLVMConstInt(ctx->ac.i32, 1, false);
3038 }
3039 }
3040
3041 static LLVMValueRef
3042 visit_first_invocation(struct ac_nir_context *ctx)
3043 {
3044 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3045 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3046
3047 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3048 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3049 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3050 ctx->ac.iN_wavemask, args, 2,
3051 AC_FUNC_ATTR_NOUNWIND |
3052 AC_FUNC_ATTR_READNONE);
3053
3054 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3055 }
3056
3057 static LLVMValueRef
3058 visit_load_shared(struct ac_nir_context *ctx,
3059 const nir_intrinsic_instr *instr)
3060 {
3061 LLVMValueRef values[4], derived_ptr, index, ret;
3062
3063 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3064 instr->dest.ssa.bit_size);
3065
3066 for (int chan = 0; chan < instr->num_components; chan++) {
3067 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3068 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3069 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3070 }
3071
3072 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3073 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3074 }
3075
3076 static void
3077 visit_store_shared(struct ac_nir_context *ctx,
3078 const nir_intrinsic_instr *instr)
3079 {
3080 LLVMValueRef derived_ptr, data,index;
3081 LLVMBuilderRef builder = ctx->ac.builder;
3082
3083 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3084 instr->src[0].ssa->bit_size);
3085 LLVMValueRef src = get_src(ctx, instr->src[0]);
3086
3087 int writemask = nir_intrinsic_write_mask(instr);
3088 for (int chan = 0; chan < 4; chan++) {
3089 if (!(writemask & (1 << chan))) {
3090 continue;
3091 }
3092 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3093 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3094 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3095 LLVMBuildStore(builder, data, derived_ptr);
3096 }
3097 }
3098
3099 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3100 const nir_intrinsic_instr *instr,
3101 LLVMValueRef ptr, int src_idx)
3102 {
3103 if (ctx->ac.postponed_kill) {
3104 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3105 ctx->ac.postponed_kill, "");
3106 ac_build_ifcc(&ctx->ac, cond, 7005);
3107 }
3108
3109 LLVMValueRef result;
3110 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3111
3112 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3113
3114 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3115 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3116 if (deref->mode == nir_var_mem_global) {
3117 /* use "singlethread" sync scope to implement relaxed ordering */
3118 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3119
3120 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3121 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3122 }
3123 }
3124
3125 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3126 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3127 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3128 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3129 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3130 } else {
3131 LLVMAtomicRMWBinOp op;
3132 switch (instr->intrinsic) {
3133 case nir_intrinsic_shared_atomic_add:
3134 case nir_intrinsic_deref_atomic_add:
3135 op = LLVMAtomicRMWBinOpAdd;
3136 break;
3137 case nir_intrinsic_shared_atomic_umin:
3138 case nir_intrinsic_deref_atomic_umin:
3139 op = LLVMAtomicRMWBinOpUMin;
3140 break;
3141 case nir_intrinsic_shared_atomic_umax:
3142 case nir_intrinsic_deref_atomic_umax:
3143 op = LLVMAtomicRMWBinOpUMax;
3144 break;
3145 case nir_intrinsic_shared_atomic_imin:
3146 case nir_intrinsic_deref_atomic_imin:
3147 op = LLVMAtomicRMWBinOpMin;
3148 break;
3149 case nir_intrinsic_shared_atomic_imax:
3150 case nir_intrinsic_deref_atomic_imax:
3151 op = LLVMAtomicRMWBinOpMax;
3152 break;
3153 case nir_intrinsic_shared_atomic_and:
3154 case nir_intrinsic_deref_atomic_and:
3155 op = LLVMAtomicRMWBinOpAnd;
3156 break;
3157 case nir_intrinsic_shared_atomic_or:
3158 case nir_intrinsic_deref_atomic_or:
3159 op = LLVMAtomicRMWBinOpOr;
3160 break;
3161 case nir_intrinsic_shared_atomic_xor:
3162 case nir_intrinsic_deref_atomic_xor:
3163 op = LLVMAtomicRMWBinOpXor;
3164 break;
3165 case nir_intrinsic_shared_atomic_exchange:
3166 case nir_intrinsic_deref_atomic_exchange:
3167 op = LLVMAtomicRMWBinOpXchg;
3168 break;
3169 default:
3170 return NULL;
3171 }
3172
3173 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3174 }
3175
3176 if (ctx->ac.postponed_kill)
3177 ac_build_endif(&ctx->ac, 7005);
3178 return result;
3179 }
3180
3181 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3182 {
3183 LLVMValueRef values[2];
3184 LLVMValueRef pos[2];
3185
3186 pos[0] = ac_to_float(&ctx->ac,
3187 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3188 pos[1] = ac_to_float(&ctx->ac,
3189 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3190
3191 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3192 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3193 return ac_build_gather_values(&ctx->ac, values, 2);
3194 }
3195
3196 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3197 enum glsl_interp_mode interp, unsigned location)
3198 {
3199 switch (interp) {
3200 case INTERP_MODE_FLAT:
3201 default:
3202 return NULL;
3203 case INTERP_MODE_SMOOTH:
3204 case INTERP_MODE_NONE:
3205 if (location == INTERP_CENTER)
3206 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3207 else if (location == INTERP_CENTROID)
3208 return ctx->abi->persp_centroid;
3209 else if (location == INTERP_SAMPLE)
3210 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3211 break;
3212 case INTERP_MODE_NOPERSPECTIVE:
3213 if (location == INTERP_CENTER)
3214 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3215 else if (location == INTERP_CENTROID)
3216 return ctx->abi->linear_centroid;
3217 else if (location == INTERP_SAMPLE)
3218 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3219 break;
3220 }
3221 return NULL;
3222 }
3223
3224 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3225 unsigned mode)
3226 {
3227 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3228 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3229 }
3230
3231 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3232 unsigned mode,
3233 LLVMValueRef offset)
3234 {
3235 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3236 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3237 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3238
3239 LLVMValueRef ij_out[2];
3240 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3241
3242 /*
3243 * take the I then J parameters, and the DDX/Y for it, and
3244 * calculate the IJ inputs for the interpolator.
3245 * temp1 = ddx * offset/sample.x + I;
3246 * interp_param.I = ddy * offset/sample.y + temp1;
3247 * temp1 = ddx * offset/sample.x + J;
3248 * interp_param.J = ddy * offset/sample.y + temp1;
3249 */
3250 for (unsigned i = 0; i < 2; i++) {
3251 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3252 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3253 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3254 ddxy_out, ix_ll, "");
3255 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3256 ddxy_out, iy_ll, "");
3257 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3258 interp_param, ix_ll, "");
3259 LLVMValueRef temp1, temp2;
3260
3261 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3262 ctx->ac.f32, "");
3263
3264 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3265 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3266
3267 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3268 temp2, ctx->ac.i32, "");
3269 }
3270 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3271 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3272 }
3273
3274 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3275 unsigned mode)
3276 {
3277 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3278 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3279 }
3280
3281 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3282 unsigned mode,
3283 LLVMValueRef sample_id)
3284 {
3285 if (ctx->abi->interp_at_sample_force_center)
3286 return barycentric_center(ctx, mode);
3287
3288 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3289
3290 /* fetch sample ID */
3291 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3292
3293 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3294 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3295 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3296 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3297 LLVMValueRef coords[] = { src_c0, src_c1 };
3298 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3299
3300 return barycentric_offset(ctx, mode, offset);
3301 }
3302
3303
3304 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3305 unsigned mode)
3306 {
3307 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3308 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3309 }
3310
3311 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3312 {
3313 return LLVMBuildBitCast(ctx->ac.builder,
3314 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3315 ctx->ac.v3i32, "");
3316 }
3317
3318 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3319 LLVMValueRef interp_param,
3320 unsigned index, unsigned comp_start,
3321 unsigned num_components,
3322 unsigned bitsize)
3323 {
3324 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3325
3326 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3327 interp_param, ctx->ac.v2f32, "");
3328 LLVMValueRef i = LLVMBuildExtractElement(
3329 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3330 LLVMValueRef j = LLVMBuildExtractElement(
3331 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3332
3333 LLVMValueRef values[4];
3334 assert(bitsize == 16 || bitsize == 32);
3335 for (unsigned comp = 0; comp < num_components; comp++) {
3336 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3337 if (bitsize == 16) {
3338 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3339 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3340 } else {
3341 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3342 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3343 }
3344 }
3345
3346 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3347 }
3348
3349 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3350 nir_intrinsic_instr *instr)
3351 {
3352 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3353
3354 /* We only lower inputs for fragment shaders ATM */
3355 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3356 assert(offset);
3357 assert(offset[0].i32 == 0);
3358
3359 unsigned component = nir_intrinsic_component(instr);
3360 unsigned index = nir_intrinsic_base(instr);
3361 unsigned vertex_id = 2; /* P0 */
3362
3363 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3364 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3365
3366 switch (src0[0].i32) {
3367 case 0:
3368 vertex_id = 2;
3369 break;
3370 case 1:
3371 vertex_id = 0;
3372 break;
3373 case 2:
3374 vertex_id = 1;
3375 break;
3376 default:
3377 unreachable("Invalid vertex index");
3378 }
3379 }
3380
3381 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3382 LLVMValueRef values[8];
3383
3384 /* Each component of a 64-bit value takes up two GL-level channels. */
3385 unsigned num_components = instr->dest.ssa.num_components;
3386 unsigned bit_size = instr->dest.ssa.bit_size;
3387 unsigned channels =
3388 bit_size == 64 ? num_components * 2 : num_components;
3389
3390 for (unsigned chan = 0; chan < channels; chan++) {
3391 if (component + chan > 4)
3392 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3393 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3394 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3395 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3396 llvm_chan,
3397 attr_number,
3398 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3399 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3400 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3401 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3402 }
3403
3404 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3405 if (bit_size == 64) {
3406 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3407 LLVMVectorType(ctx->ac.i64, num_components);
3408 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3409 }
3410 return result;
3411 }
3412
3413 static void visit_intrinsic(struct ac_nir_context *ctx,
3414 nir_intrinsic_instr *instr)
3415 {
3416 LLVMValueRef result = NULL;
3417
3418 switch (instr->intrinsic) {
3419 case nir_intrinsic_ballot:
3420 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3421 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3422 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3423 break;
3424 case nir_intrinsic_read_invocation:
3425 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3426 get_src(ctx, instr->src[1]));
3427 break;
3428 case nir_intrinsic_read_first_invocation:
3429 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3430 break;
3431 case nir_intrinsic_load_subgroup_invocation:
3432 result = ac_get_thread_id(&ctx->ac);
3433 break;
3434 case nir_intrinsic_load_work_group_id: {
3435 LLVMValueRef values[3];
3436
3437 for (int i = 0; i < 3; i++) {
3438 values[i] = ctx->args->workgroup_ids[i].used ?
3439 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3440 }
3441
3442 result = ac_build_gather_values(&ctx->ac, values, 3);
3443 break;
3444 }
3445 case nir_intrinsic_load_base_vertex:
3446 case nir_intrinsic_load_first_vertex:
3447 result = ctx->abi->load_base_vertex(ctx->abi);
3448 break;
3449 case nir_intrinsic_load_local_group_size:
3450 result = ctx->abi->load_local_group_size(ctx->abi);
3451 break;
3452 case nir_intrinsic_load_vertex_id:
3453 result = LLVMBuildAdd(ctx->ac.builder,
3454 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3455 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3456 break;
3457 case nir_intrinsic_load_vertex_id_zero_base: {
3458 result = ctx->abi->vertex_id;
3459 break;
3460 }
3461 case nir_intrinsic_load_local_invocation_id: {
3462 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3463 break;
3464 }
3465 case nir_intrinsic_load_base_instance:
3466 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3467 break;
3468 case nir_intrinsic_load_draw_id:
3469 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3470 break;
3471 case nir_intrinsic_load_view_index:
3472 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3473 break;
3474 case nir_intrinsic_load_invocation_id:
3475 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3476 result = ac_unpack_param(&ctx->ac,
3477 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3478 8, 5);
3479 } else {
3480 if (ctx->ac.chip_class >= GFX10) {
3481 result = LLVMBuildAnd(ctx->ac.builder,
3482 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3483 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3484 } else {
3485 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3486 }
3487 }
3488 break;
3489 case nir_intrinsic_load_primitive_id:
3490 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3491 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3492 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3493 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3494 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3495 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3496 } else
3497 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3498 break;
3499 case nir_intrinsic_load_sample_id:
3500 result = ac_unpack_param(&ctx->ac,
3501 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3502 8, 4);
3503 break;
3504 case nir_intrinsic_load_sample_pos:
3505 result = load_sample_pos(ctx);
3506 break;
3507 case nir_intrinsic_load_sample_mask_in:
3508 result = ctx->abi->load_sample_mask_in(ctx->abi);
3509 break;
3510 case nir_intrinsic_load_frag_coord: {
3511 LLVMValueRef values[4] = {
3512 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3513 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3514 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3515 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3516 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3517 };
3518 result = ac_to_integer(&ctx->ac,
3519 ac_build_gather_values(&ctx->ac, values, 4));
3520 break;
3521 }
3522 case nir_intrinsic_load_layer_id:
3523 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3524 break;
3525 case nir_intrinsic_load_front_face:
3526 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3527 break;
3528 case nir_intrinsic_load_helper_invocation:
3529 result = ac_build_load_helper_invocation(&ctx->ac);
3530 break;
3531 case nir_intrinsic_is_helper_invocation:
3532 result = ac_build_is_helper_invocation(&ctx->ac);
3533 break;
3534 case nir_intrinsic_load_color0:
3535 result = ctx->abi->color0;
3536 break;
3537 case nir_intrinsic_load_color1:
3538 result = ctx->abi->color1;
3539 break;
3540 case nir_intrinsic_load_user_data_amd:
3541 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3542 result = ctx->abi->user_data;
3543 break;
3544 case nir_intrinsic_load_instance_id:
3545 result = ctx->abi->instance_id;
3546 break;
3547 case nir_intrinsic_load_num_work_groups:
3548 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3549 break;
3550 case nir_intrinsic_load_local_invocation_index:
3551 result = visit_load_local_invocation_index(ctx);
3552 break;
3553 case nir_intrinsic_load_subgroup_id:
3554 result = visit_load_subgroup_id(ctx);
3555 break;
3556 case nir_intrinsic_load_num_subgroups:
3557 result = visit_load_num_subgroups(ctx);
3558 break;
3559 case nir_intrinsic_first_invocation:
3560 result = visit_first_invocation(ctx);
3561 break;
3562 case nir_intrinsic_load_push_constant:
3563 result = visit_load_push_constant(ctx, instr);
3564 break;
3565 case nir_intrinsic_vulkan_resource_index: {
3566 LLVMValueRef index = get_src(ctx, instr->src[0]);
3567 unsigned desc_set = nir_intrinsic_desc_set(instr);
3568 unsigned binding = nir_intrinsic_binding(instr);
3569
3570 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3571 binding);
3572 break;
3573 }
3574 case nir_intrinsic_vulkan_resource_reindex:
3575 result = visit_vulkan_resource_reindex(ctx, instr);
3576 break;
3577 case nir_intrinsic_store_ssbo:
3578 visit_store_ssbo(ctx, instr);
3579 break;
3580 case nir_intrinsic_load_ssbo:
3581 result = visit_load_buffer(ctx, instr);
3582 break;
3583 case nir_intrinsic_ssbo_atomic_add:
3584 case nir_intrinsic_ssbo_atomic_imin:
3585 case nir_intrinsic_ssbo_atomic_umin:
3586 case nir_intrinsic_ssbo_atomic_imax:
3587 case nir_intrinsic_ssbo_atomic_umax:
3588 case nir_intrinsic_ssbo_atomic_and:
3589 case nir_intrinsic_ssbo_atomic_or:
3590 case nir_intrinsic_ssbo_atomic_xor:
3591 case nir_intrinsic_ssbo_atomic_exchange:
3592 case nir_intrinsic_ssbo_atomic_comp_swap:
3593 result = visit_atomic_ssbo(ctx, instr);
3594 break;
3595 case nir_intrinsic_load_ubo:
3596 result = visit_load_ubo_buffer(ctx, instr);
3597 break;
3598 case nir_intrinsic_get_buffer_size:
3599 result = visit_get_buffer_size(ctx, instr);
3600 break;
3601 case nir_intrinsic_load_deref:
3602 result = visit_load_var(ctx, instr);
3603 break;
3604 case nir_intrinsic_store_deref:
3605 visit_store_var(ctx, instr);
3606 break;
3607 case nir_intrinsic_load_shared:
3608 result = visit_load_shared(ctx, instr);
3609 break;
3610 case nir_intrinsic_store_shared:
3611 visit_store_shared(ctx, instr);
3612 break;
3613 case nir_intrinsic_bindless_image_samples:
3614 case nir_intrinsic_image_deref_samples:
3615 result = visit_image_samples(ctx, instr);
3616 break;
3617 case nir_intrinsic_bindless_image_load:
3618 result = visit_image_load(ctx, instr, true);
3619 break;
3620 case nir_intrinsic_image_deref_load:
3621 result = visit_image_load(ctx, instr, false);
3622 break;
3623 case nir_intrinsic_bindless_image_store:
3624 visit_image_store(ctx, instr, true);
3625 break;
3626 case nir_intrinsic_image_deref_store:
3627 visit_image_store(ctx, instr, false);
3628 break;
3629 case nir_intrinsic_bindless_image_atomic_add:
3630 case nir_intrinsic_bindless_image_atomic_imin:
3631 case nir_intrinsic_bindless_image_atomic_umin:
3632 case nir_intrinsic_bindless_image_atomic_imax:
3633 case nir_intrinsic_bindless_image_atomic_umax:
3634 case nir_intrinsic_bindless_image_atomic_and:
3635 case nir_intrinsic_bindless_image_atomic_or:
3636 case nir_intrinsic_bindless_image_atomic_xor:
3637 case nir_intrinsic_bindless_image_atomic_exchange:
3638 case nir_intrinsic_bindless_image_atomic_comp_swap:
3639 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3640 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3641 result = visit_image_atomic(ctx, instr, true);
3642 break;
3643 case nir_intrinsic_image_deref_atomic_add:
3644 case nir_intrinsic_image_deref_atomic_imin:
3645 case nir_intrinsic_image_deref_atomic_umin:
3646 case nir_intrinsic_image_deref_atomic_imax:
3647 case nir_intrinsic_image_deref_atomic_umax:
3648 case nir_intrinsic_image_deref_atomic_and:
3649 case nir_intrinsic_image_deref_atomic_or:
3650 case nir_intrinsic_image_deref_atomic_xor:
3651 case nir_intrinsic_image_deref_atomic_exchange:
3652 case nir_intrinsic_image_deref_atomic_comp_swap:
3653 case nir_intrinsic_image_deref_atomic_inc_wrap:
3654 case nir_intrinsic_image_deref_atomic_dec_wrap:
3655 result = visit_image_atomic(ctx, instr, false);
3656 break;
3657 case nir_intrinsic_bindless_image_size:
3658 result = visit_image_size(ctx, instr, true);
3659 break;
3660 case nir_intrinsic_image_deref_size:
3661 result = visit_image_size(ctx, instr, false);
3662 break;
3663 case nir_intrinsic_shader_clock:
3664 result = ac_build_shader_clock(&ctx->ac);
3665 break;
3666 case nir_intrinsic_discard:
3667 case nir_intrinsic_discard_if:
3668 emit_discard(ctx, instr);
3669 break;
3670 case nir_intrinsic_demote:
3671 case nir_intrinsic_demote_if:
3672 emit_demote(ctx, instr);
3673 break;
3674 case nir_intrinsic_memory_barrier:
3675 case nir_intrinsic_group_memory_barrier:
3676 case nir_intrinsic_memory_barrier_buffer:
3677 case nir_intrinsic_memory_barrier_image:
3678 case nir_intrinsic_memory_barrier_shared:
3679 emit_membar(&ctx->ac, instr);
3680 break;
3681 case nir_intrinsic_memory_barrier_tcs_patch:
3682 break;
3683 case nir_intrinsic_control_barrier:
3684 ac_emit_barrier(&ctx->ac, ctx->stage);
3685 break;
3686 case nir_intrinsic_shared_atomic_add:
3687 case nir_intrinsic_shared_atomic_imin:
3688 case nir_intrinsic_shared_atomic_umin:
3689 case nir_intrinsic_shared_atomic_imax:
3690 case nir_intrinsic_shared_atomic_umax:
3691 case nir_intrinsic_shared_atomic_and:
3692 case nir_intrinsic_shared_atomic_or:
3693 case nir_intrinsic_shared_atomic_xor:
3694 case nir_intrinsic_shared_atomic_exchange:
3695 case nir_intrinsic_shared_atomic_comp_swap: {
3696 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3697 instr->src[1].ssa->bit_size);
3698 result = visit_var_atomic(ctx, instr, ptr, 1);
3699 break;
3700 }
3701 case nir_intrinsic_deref_atomic_add:
3702 case nir_intrinsic_deref_atomic_imin:
3703 case nir_intrinsic_deref_atomic_umin:
3704 case nir_intrinsic_deref_atomic_imax:
3705 case nir_intrinsic_deref_atomic_umax:
3706 case nir_intrinsic_deref_atomic_and:
3707 case nir_intrinsic_deref_atomic_or:
3708 case nir_intrinsic_deref_atomic_xor:
3709 case nir_intrinsic_deref_atomic_exchange:
3710 case nir_intrinsic_deref_atomic_comp_swap: {
3711 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3712 result = visit_var_atomic(ctx, instr, ptr, 1);
3713 break;
3714 }
3715 case nir_intrinsic_load_barycentric_pixel:
3716 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3717 break;
3718 case nir_intrinsic_load_barycentric_centroid:
3719 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3720 break;
3721 case nir_intrinsic_load_barycentric_sample:
3722 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3723 break;
3724 case nir_intrinsic_load_barycentric_model:
3725 result = barycentric_model(ctx);
3726 break;
3727 case nir_intrinsic_load_barycentric_at_offset: {
3728 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3729 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3730 break;
3731 }
3732 case nir_intrinsic_load_barycentric_at_sample: {
3733 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3734 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3735 break;
3736 }
3737 case nir_intrinsic_load_interpolated_input: {
3738 /* We assume any indirect loads have been lowered away */
3739 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3740 assert(offset);
3741 assert(offset[0].i32 == 0);
3742
3743 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3744 unsigned index = nir_intrinsic_base(instr);
3745 unsigned component = nir_intrinsic_component(instr);
3746 result = load_interpolated_input(ctx, interp_param, index,
3747 component,
3748 instr->dest.ssa.num_components,
3749 instr->dest.ssa.bit_size);
3750 break;
3751 }
3752 case nir_intrinsic_load_input:
3753 case nir_intrinsic_load_input_vertex:
3754 result = load_input(ctx, instr);
3755 break;
3756 case nir_intrinsic_emit_vertex:
3757 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3758 break;
3759 case nir_intrinsic_end_primitive:
3760 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3761 break;
3762 case nir_intrinsic_load_tess_coord:
3763 result = ctx->abi->load_tess_coord(ctx->abi);
3764 break;
3765 case nir_intrinsic_load_tess_level_outer:
3766 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3767 break;
3768 case nir_intrinsic_load_tess_level_inner:
3769 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3770 break;
3771 case nir_intrinsic_load_tess_level_outer_default:
3772 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3773 break;
3774 case nir_intrinsic_load_tess_level_inner_default:
3775 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3776 break;
3777 case nir_intrinsic_load_patch_vertices_in:
3778 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3779 break;
3780 case nir_intrinsic_vote_all: {
3781 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3782 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3783 break;
3784 }
3785 case nir_intrinsic_vote_any: {
3786 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3787 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3788 break;
3789 }
3790 case nir_intrinsic_shuffle:
3791 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3792 get_src(ctx, instr->src[1]));
3793 break;
3794 case nir_intrinsic_reduce:
3795 result = ac_build_reduce(&ctx->ac,
3796 get_src(ctx, instr->src[0]),
3797 instr->const_index[0],
3798 instr->const_index[1]);
3799 break;
3800 case nir_intrinsic_inclusive_scan:
3801 result = ac_build_inclusive_scan(&ctx->ac,
3802 get_src(ctx, instr->src[0]),
3803 instr->const_index[0]);
3804 break;
3805 case nir_intrinsic_exclusive_scan:
3806 result = ac_build_exclusive_scan(&ctx->ac,
3807 get_src(ctx, instr->src[0]),
3808 instr->const_index[0]);
3809 break;
3810 case nir_intrinsic_quad_broadcast: {
3811 unsigned lane = nir_src_as_uint(instr->src[1]);
3812 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3813 lane, lane, lane, lane);
3814 break;
3815 }
3816 case nir_intrinsic_quad_swap_horizontal:
3817 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3818 break;
3819 case nir_intrinsic_quad_swap_vertical:
3820 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3821 break;
3822 case nir_intrinsic_quad_swap_diagonal:
3823 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3824 break;
3825 case nir_intrinsic_quad_swizzle_amd: {
3826 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3827 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3828 mask & 0x3, (mask >> 2) & 0x3,
3829 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3830 break;
3831 }
3832 case nir_intrinsic_masked_swizzle_amd: {
3833 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3834 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3835 break;
3836 }
3837 case nir_intrinsic_write_invocation_amd:
3838 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3839 get_src(ctx, instr->src[1]),
3840 get_src(ctx, instr->src[2]));
3841 break;
3842 case nir_intrinsic_mbcnt_amd:
3843 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3844 break;
3845 case nir_intrinsic_load_scratch: {
3846 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3847 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3848 offset);
3849 LLVMTypeRef comp_type =
3850 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3851 LLVMTypeRef vec_type =
3852 instr->dest.ssa.num_components == 1 ? comp_type :
3853 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3854 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3855 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3856 LLVMPointerType(vec_type, addr_space), "");
3857 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3858 break;
3859 }
3860 case nir_intrinsic_store_scratch: {
3861 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3862 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3863 offset);
3864 LLVMTypeRef comp_type =
3865 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3866 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3867 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3868 LLVMPointerType(comp_type, addr_space), "");
3869 LLVMValueRef src = get_src(ctx, instr->src[0]);
3870 unsigned wrmask = nir_intrinsic_write_mask(instr);
3871 while (wrmask) {
3872 int start, count;
3873 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3874
3875 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3876 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3877 LLVMTypeRef vec_type =
3878 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3879 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3880 offset_ptr,
3881 LLVMPointerType(vec_type, addr_space),
3882 "");
3883 LLVMValueRef offset_src =
3884 ac_extract_components(&ctx->ac, src, start, count);
3885 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3886 }
3887 break;
3888 }
3889 case nir_intrinsic_load_constant: {
3890 unsigned base = nir_intrinsic_base(instr);
3891 unsigned range = nir_intrinsic_range(instr);
3892
3893 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3894 offset = LLVMBuildAdd(ctx->ac.builder, offset,
3895 LLVMConstInt(ctx->ac.i32, base, false), "");
3896
3897 /* Clamp the offset to avoid out-of-bound access because global
3898 * instructions can't handle them.
3899 */
3900 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
3901 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
3902 offset, size, "");
3903 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
3904
3905 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3906 offset);
3907 LLVMTypeRef comp_type =
3908 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3909 LLVMTypeRef vec_type =
3910 instr->dest.ssa.num_components == 1 ? comp_type :
3911 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3912 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3913 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3914 LLVMPointerType(vec_type, addr_space), "");
3915 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3916 break;
3917 }
3918 default:
3919 fprintf(stderr, "Unknown intrinsic: ");
3920 nir_print_instr(&instr->instr, stderr);
3921 fprintf(stderr, "\n");
3922 break;
3923 }
3924 if (result) {
3925 ctx->ssa_defs[instr->dest.ssa.index] = result;
3926 }
3927 }
3928
3929 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3930 unsigned base_index,
3931 unsigned constant_index,
3932 LLVMValueRef dynamic_index)
3933 {
3934 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3935 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3936 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3937
3938 /* Bindless uniforms are 64bit so multiple index by 8 */
3939 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3940 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3941
3942 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3943
3944 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3945 NULL, 0, 0, true, true);
3946
3947 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3948 }
3949
3950 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3951 nir_deref_instr *deref_instr,
3952 enum ac_descriptor_type desc_type,
3953 const nir_instr *instr,
3954 bool image, bool write)
3955 {
3956 LLVMValueRef index = NULL;
3957 unsigned constant_index = 0;
3958 unsigned descriptor_set;
3959 unsigned base_index;
3960 bool bindless = false;
3961
3962 if (!deref_instr) {
3963 descriptor_set = 0;
3964 if (image) {
3965 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3966 base_index = 0;
3967 bindless = true;
3968 index = get_src(ctx, img_instr->src[0]);
3969 } else {
3970 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3971 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3972 nir_tex_src_sampler_handle);
3973 if (sampSrcIdx != -1) {
3974 base_index = 0;
3975 bindless = true;
3976 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3977 } else {
3978 assert(tex_instr && !image);
3979 base_index = tex_instr->sampler_index;
3980 }
3981 }
3982 } else {
3983 while(deref_instr->deref_type != nir_deref_type_var) {
3984 if (deref_instr->deref_type == nir_deref_type_array) {
3985 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3986 if (!array_size)
3987 array_size = 1;
3988
3989 if (nir_src_is_const(deref_instr->arr.index)) {
3990 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3991 } else {
3992 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3993
3994 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3995 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3996
3997 if (!index)
3998 index = indirect;
3999 else
4000 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4001 }
4002
4003 deref_instr = nir_src_as_deref(deref_instr->parent);
4004 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4005 unsigned sidx = deref_instr->strct.index;
4006 deref_instr = nir_src_as_deref(deref_instr->parent);
4007 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4008 } else {
4009 unreachable("Unsupported deref type");
4010 }
4011 }
4012 descriptor_set = deref_instr->var->data.descriptor_set;
4013
4014 if (deref_instr->var->data.bindless) {
4015 /* For now just assert on unhandled variable types */
4016 assert(deref_instr->var->data.mode == nir_var_uniform);
4017
4018 base_index = deref_instr->var->data.driver_location;
4019 bindless = true;
4020
4021 index = index ? index : ctx->ac.i32_0;
4022 index = get_bindless_index_from_uniform(ctx, base_index,
4023 constant_index, index);
4024 } else
4025 base_index = deref_instr->var->data.binding;
4026 }
4027
4028 return ctx->abi->load_sampler_desc(ctx->abi,
4029 descriptor_set,
4030 base_index,
4031 constant_index, index,
4032 desc_type, image, write, bindless);
4033 }
4034
4035 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4036 *
4037 * GFX6-GFX7:
4038 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4039 * filtering manually. The driver sets img7 to a mask clearing
4040 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4041 * s_and_b32 samp0, samp0, img7
4042 *
4043 * GFX8:
4044 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4045 */
4046 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4047 LLVMValueRef res, LLVMValueRef samp)
4048 {
4049 LLVMBuilderRef builder = ctx->ac.builder;
4050 LLVMValueRef img7, samp0;
4051
4052 if (ctx->ac.chip_class >= GFX8)
4053 return samp;
4054
4055 img7 = LLVMBuildExtractElement(builder, res,
4056 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4057 samp0 = LLVMBuildExtractElement(builder, samp,
4058 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4059 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4060 return LLVMBuildInsertElement(builder, samp, samp0,
4061 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4062 }
4063
4064 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4065 nir_tex_instr *instr,
4066 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4067 LLVMValueRef *fmask_ptr)
4068 {
4069 nir_deref_instr *texture_deref_instr = NULL;
4070 nir_deref_instr *sampler_deref_instr = NULL;
4071 int plane = -1;
4072
4073 for (unsigned i = 0; i < instr->num_srcs; i++) {
4074 switch (instr->src[i].src_type) {
4075 case nir_tex_src_texture_deref:
4076 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4077 break;
4078 case nir_tex_src_sampler_deref:
4079 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4080 break;
4081 case nir_tex_src_plane:
4082 plane = nir_src_as_int(instr->src[i].src);
4083 break;
4084 default:
4085 break;
4086 }
4087 }
4088
4089 if (!sampler_deref_instr)
4090 sampler_deref_instr = texture_deref_instr;
4091
4092 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4093
4094 if (plane >= 0) {
4095 assert(instr->op != nir_texop_txf_ms &&
4096 instr->op != nir_texop_samples_identical);
4097 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4098
4099 main_descriptor = AC_DESC_PLANE_0 + plane;
4100 }
4101
4102 if (instr->op == nir_texop_fragment_mask_fetch) {
4103 /* The fragment mask is fetched from the compressed
4104 * multisampled surface.
4105 */
4106 main_descriptor = AC_DESC_FMASK;
4107 }
4108
4109 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
4110
4111 if (samp_ptr) {
4112 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
4113 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4114 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4115 }
4116 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4117 instr->op == nir_texop_samples_identical))
4118 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
4119 }
4120
4121 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4122 LLVMValueRef coord)
4123 {
4124 coord = ac_to_float(ctx, coord);
4125 coord = ac_build_round(ctx, coord);
4126 coord = ac_to_integer(ctx, coord);
4127 return coord;
4128 }
4129
4130 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4131 {
4132 LLVMValueRef result = NULL;
4133 struct ac_image_args args = { 0 };
4134 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4135 LLVMValueRef ddx = NULL, ddy = NULL;
4136 unsigned offset_src = 0;
4137
4138 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
4139
4140 for (unsigned i = 0; i < instr->num_srcs; i++) {
4141 switch (instr->src[i].src_type) {
4142 case nir_tex_src_coord: {
4143 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4144 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4145 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4146 break;
4147 }
4148 case nir_tex_src_projector:
4149 break;
4150 case nir_tex_src_comparator:
4151 if (instr->is_shadow) {
4152 args.compare = get_src(ctx, instr->src[i].src);
4153 args.compare = ac_to_float(&ctx->ac, args.compare);
4154 }
4155 break;
4156 case nir_tex_src_offset:
4157 args.offset = get_src(ctx, instr->src[i].src);
4158 offset_src = i;
4159 break;
4160 case nir_tex_src_bias:
4161 if (instr->op == nir_texop_txb)
4162 args.bias = get_src(ctx, instr->src[i].src);
4163 break;
4164 case nir_tex_src_lod: {
4165 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4166 args.level_zero = true;
4167 else
4168 args.lod = get_src(ctx, instr->src[i].src);
4169 break;
4170 }
4171 case nir_tex_src_ms_index:
4172 sample_index = get_src(ctx, instr->src[i].src);
4173 break;
4174 case nir_tex_src_ms_mcs:
4175 break;
4176 case nir_tex_src_ddx:
4177 ddx = get_src(ctx, instr->src[i].src);
4178 break;
4179 case nir_tex_src_ddy:
4180 ddy = get_src(ctx, instr->src[i].src);
4181 break;
4182 case nir_tex_src_texture_offset:
4183 case nir_tex_src_sampler_offset:
4184 case nir_tex_src_plane:
4185 default:
4186 break;
4187 }
4188 }
4189
4190 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4191 result = get_buffer_size(ctx, args.resource, true);
4192 goto write_result;
4193 }
4194
4195 if (instr->op == nir_texop_texture_samples) {
4196 LLVMValueRef res, samples, is_msaa;
4197 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4198 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4199 LLVMConstInt(ctx->ac.i32, 3, false), "");
4200 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4201 LLVMConstInt(ctx->ac.i32, 28, false), "");
4202 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4203 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4204 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4205 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4206
4207 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4208 LLVMConstInt(ctx->ac.i32, 16, false), "");
4209 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4210 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4211 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4212 samples, "");
4213 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4214 ctx->ac.i32_1, "");
4215 result = samples;
4216 goto write_result;
4217 }
4218
4219 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4220 LLVMValueRef offset[3], pack;
4221 for (unsigned chan = 0; chan < 3; ++chan)
4222 offset[chan] = ctx->ac.i32_0;
4223
4224 unsigned num_components = ac_get_llvm_num_components(args.offset);
4225 for (unsigned chan = 0; chan < num_components; chan++) {
4226 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4227 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4228 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4229 if (chan)
4230 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4231 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4232 }
4233 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4234 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4235 args.offset = pack;
4236 }
4237
4238 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4239 * OpenGL 4.5 spec says:
4240 *
4241 * "If the texture’s internal format indicates a fixed-point
4242 * depth texture, then D_t and D_ref are clamped to the
4243 * range [0, 1]; otherwise no clamping is performed."
4244 *
4245 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4246 * so the depth comparison value isn't clamped for Z16 and
4247 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4248 * an explicitly clamped 32-bit float format.
4249 */
4250 if (args.compare &&
4251 ctx->ac.chip_class >= GFX8 &&
4252 ctx->ac.chip_class <= GFX9 &&
4253 ctx->abi->clamp_shadow_reference) {
4254 LLVMValueRef upgraded, clamped;
4255
4256 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4257 LLVMConstInt(ctx->ac.i32, 3, false), "");
4258 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4259 LLVMConstInt(ctx->ac.i32, 29, false), "");
4260 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4261 clamped = ac_build_clamp(&ctx->ac, args.compare);
4262 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4263 args.compare, "");
4264 }
4265
4266 /* pack derivatives */
4267 if (ddx || ddy) {
4268 int num_src_deriv_channels, num_dest_deriv_channels;
4269 switch (instr->sampler_dim) {
4270 case GLSL_SAMPLER_DIM_3D:
4271 case GLSL_SAMPLER_DIM_CUBE:
4272 num_src_deriv_channels = 3;
4273 num_dest_deriv_channels = 3;
4274 break;
4275 case GLSL_SAMPLER_DIM_2D:
4276 default:
4277 num_src_deriv_channels = 2;
4278 num_dest_deriv_channels = 2;
4279 break;
4280 case GLSL_SAMPLER_DIM_1D:
4281 num_src_deriv_channels = 1;
4282 if (ctx->ac.chip_class == GFX9) {
4283 num_dest_deriv_channels = 2;
4284 } else {
4285 num_dest_deriv_channels = 1;
4286 }
4287 break;
4288 }
4289
4290 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4291 args.derivs[i] = ac_to_float(&ctx->ac,
4292 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4293 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4294 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4295 }
4296 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4297 args.derivs[i] = ctx->ac.f32_0;
4298 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4299 }
4300 }
4301
4302 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4303 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4304 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4305 if (instr->coord_components == 3)
4306 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4307 ac_prepare_cube_coords(&ctx->ac,
4308 instr->op == nir_texop_txd, instr->is_array,
4309 instr->op == nir_texop_lod, args.coords, args.derivs);
4310 }
4311
4312 /* Texture coordinates fixups */
4313 if (instr->coord_components > 1 &&
4314 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4315 instr->is_array &&
4316 instr->op != nir_texop_txf) {
4317 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4318 }
4319
4320 if (instr->coord_components > 2 &&
4321 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4322 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4323 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4324 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4325 instr->is_array &&
4326 instr->op != nir_texop_txf &&
4327 instr->op != nir_texop_txf_ms &&
4328 instr->op != nir_texop_fragment_fetch &&
4329 instr->op != nir_texop_fragment_mask_fetch) {
4330 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4331 }
4332
4333 if (ctx->ac.chip_class == GFX9 &&
4334 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4335 instr->op != nir_texop_lod) {
4336 LLVMValueRef filler;
4337 if (instr->op == nir_texop_txf)
4338 filler = ctx->ac.i32_0;
4339 else
4340 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4341
4342 if (instr->is_array)
4343 args.coords[2] = args.coords[1];
4344 args.coords[1] = filler;
4345 }
4346
4347 /* Pack sample index */
4348 if (sample_index && (instr->op == nir_texop_txf_ms ||
4349 instr->op == nir_texop_fragment_fetch))
4350 args.coords[instr->coord_components] = sample_index;
4351
4352 if (instr->op == nir_texop_samples_identical) {
4353 struct ac_image_args txf_args = { 0 };
4354 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4355
4356 txf_args.dmask = 0xf;
4357 txf_args.resource = fmask_ptr;
4358 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4359 result = build_tex_intrinsic(ctx, instr, &txf_args);
4360
4361 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4362 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4363 goto write_result;
4364 }
4365
4366 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4367 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4368 instr->op != nir_texop_txs &&
4369 instr->op != nir_texop_fragment_fetch &&
4370 instr->op != nir_texop_fragment_mask_fetch) {
4371 unsigned sample_chan = instr->is_array ? 3 : 2;
4372 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4373 &ctx->ac, args.coords[0], args.coords[1],
4374 instr->is_array ? args.coords[2] : NULL,
4375 args.coords[sample_chan], fmask_ptr);
4376 }
4377
4378 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4379 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4380 num_offsets = MIN2(num_offsets, instr->coord_components);
4381 for (unsigned i = 0; i < num_offsets; ++i) {
4382 args.coords[i] = LLVMBuildAdd(
4383 ctx->ac.builder, args.coords[i],
4384 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4385 }
4386 args.offset = NULL;
4387 }
4388
4389 /* DMASK was repurposed for GATHER4. 4 components are always
4390 * returned and DMASK works like a swizzle - it selects
4391 * the component to fetch. The only valid DMASK values are
4392 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4393 * (red,red,red,red) etc.) The ISA document doesn't mention
4394 * this.
4395 */
4396 args.dmask = 0xf;
4397 if (instr->op == nir_texop_tg4) {
4398 if (instr->is_shadow)
4399 args.dmask = 1;
4400 else
4401 args.dmask = 1 << instr->component;
4402 }
4403
4404 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4405 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4406 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4407 }
4408
4409 /* Adjust the number of coordinates because we only need (x,y) for 2D
4410 * multisampled images and (x,y,layer) for 2D multisampled layered
4411 * images or for multisampled input attachments.
4412 */
4413 if (instr->op == nir_texop_fragment_mask_fetch) {
4414 if (args.dim == ac_image_2dmsaa) {
4415 args.dim = ac_image_2d;
4416 } else {
4417 assert(args.dim == ac_image_2darraymsaa);
4418 args.dim = ac_image_2darray;
4419 }
4420 }
4421
4422 result = build_tex_intrinsic(ctx, instr, &args);
4423
4424 if (instr->op == nir_texop_query_levels)
4425 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4426 else if (instr->is_shadow && instr->is_new_style_shadow &&
4427 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4428 instr->op != nir_texop_tg4)
4429 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4430 else if (instr->op == nir_texop_txs &&
4431 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4432 instr->is_array) {
4433 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4434 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4435 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4436 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4437 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4438 } else if (ctx->ac.chip_class == GFX9 &&
4439 instr->op == nir_texop_txs &&
4440 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4441 instr->is_array) {
4442 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4443 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4444 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4445 ctx->ac.i32_1, "");
4446 } else if (instr->dest.ssa.num_components != 4)
4447 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4448
4449 write_result:
4450 if (result) {
4451 assert(instr->dest.is_ssa);
4452 result = ac_to_integer(&ctx->ac, result);
4453 ctx->ssa_defs[instr->dest.ssa.index] = result;
4454 }
4455 }
4456
4457
4458 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4459 {
4460 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4461 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4462
4463 ctx->ssa_defs[instr->dest.ssa.index] = result;
4464 _mesa_hash_table_insert(ctx->phis, instr, result);
4465 }
4466
4467 static void visit_post_phi(struct ac_nir_context *ctx,
4468 nir_phi_instr *instr,
4469 LLVMValueRef llvm_phi)
4470 {
4471 nir_foreach_phi_src(src, instr) {
4472 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4473 LLVMValueRef llvm_src = get_src(ctx, src->src);
4474
4475 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4476 }
4477 }
4478
4479 static void phi_post_pass(struct ac_nir_context *ctx)
4480 {
4481 hash_table_foreach(ctx->phis, entry) {
4482 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4483 (LLVMValueRef)entry->data);
4484 }
4485 }
4486
4487
4488 static void visit_ssa_undef(struct ac_nir_context *ctx,
4489 const nir_ssa_undef_instr *instr)
4490 {
4491 unsigned num_components = instr->def.num_components;
4492 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4493 LLVMValueRef undef;
4494
4495 if (num_components == 1)
4496 undef = LLVMGetUndef(type);
4497 else {
4498 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4499 }
4500 ctx->ssa_defs[instr->def.index] = undef;
4501 }
4502
4503 static void visit_jump(struct ac_llvm_context *ctx,
4504 const nir_jump_instr *instr)
4505 {
4506 switch (instr->type) {
4507 case nir_jump_break:
4508 ac_build_break(ctx);
4509 break;
4510 case nir_jump_continue:
4511 ac_build_continue(ctx);
4512 break;
4513 default:
4514 fprintf(stderr, "Unknown NIR jump instr: ");
4515 nir_print_instr(&instr->instr, stderr);
4516 fprintf(stderr, "\n");
4517 abort();
4518 }
4519 }
4520
4521 static LLVMTypeRef
4522 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4523 enum glsl_base_type type)
4524 {
4525 switch (type) {
4526 case GLSL_TYPE_INT:
4527 case GLSL_TYPE_UINT:
4528 case GLSL_TYPE_BOOL:
4529 case GLSL_TYPE_SUBROUTINE:
4530 return ac->i32;
4531 case GLSL_TYPE_INT8:
4532 case GLSL_TYPE_UINT8:
4533 return ac->i8;
4534 case GLSL_TYPE_INT16:
4535 case GLSL_TYPE_UINT16:
4536 return ac->i16;
4537 case GLSL_TYPE_FLOAT:
4538 return ac->f32;
4539 case GLSL_TYPE_FLOAT16:
4540 return ac->f16;
4541 case GLSL_TYPE_INT64:
4542 case GLSL_TYPE_UINT64:
4543 return ac->i64;
4544 case GLSL_TYPE_DOUBLE:
4545 return ac->f64;
4546 default:
4547 unreachable("unknown GLSL type");
4548 }
4549 }
4550
4551 static LLVMTypeRef
4552 glsl_to_llvm_type(struct ac_llvm_context *ac,
4553 const struct glsl_type *type)
4554 {
4555 if (glsl_type_is_scalar(type)) {
4556 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4557 }
4558
4559 if (glsl_type_is_vector(type)) {
4560 return LLVMVectorType(
4561 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4562 glsl_get_vector_elements(type));
4563 }
4564
4565 if (glsl_type_is_matrix(type)) {
4566 return LLVMArrayType(
4567 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4568 glsl_get_matrix_columns(type));
4569 }
4570
4571 if (glsl_type_is_array(type)) {
4572 return LLVMArrayType(
4573 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4574 glsl_get_length(type));
4575 }
4576
4577 assert(glsl_type_is_struct_or_ifc(type));
4578
4579 LLVMTypeRef member_types[glsl_get_length(type)];
4580
4581 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4582 member_types[i] =
4583 glsl_to_llvm_type(ac,
4584 glsl_get_struct_field(type, i));
4585 }
4586
4587 return LLVMStructTypeInContext(ac->context, member_types,
4588 glsl_get_length(type), false);
4589 }
4590
4591 static void visit_deref(struct ac_nir_context *ctx,
4592 nir_deref_instr *instr)
4593 {
4594 if (instr->mode != nir_var_mem_shared &&
4595 instr->mode != nir_var_mem_global)
4596 return;
4597
4598 LLVMValueRef result = NULL;
4599 switch(instr->deref_type) {
4600 case nir_deref_type_var: {
4601 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4602 result = entry->data;
4603 break;
4604 }
4605 case nir_deref_type_struct:
4606 if (instr->mode == nir_var_mem_global) {
4607 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4608 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4609 instr->strct.index);
4610 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4611 LLVMConstInt(ctx->ac.i32, offset, 0));
4612 } else {
4613 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4614 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4615 }
4616 break;
4617 case nir_deref_type_array:
4618 if (instr->mode == nir_var_mem_global) {
4619 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4620 unsigned stride = glsl_get_explicit_stride(parent->type);
4621
4622 if ((glsl_type_is_matrix(parent->type) &&
4623 glsl_matrix_type_is_row_major(parent->type)) ||
4624 (glsl_type_is_vector(parent->type) && stride == 0))
4625 stride = type_scalar_size_bytes(parent->type);
4626
4627 assert(stride > 0);
4628 LLVMValueRef index = get_src(ctx, instr->arr.index);
4629 if (LLVMTypeOf(index) != ctx->ac.i64)
4630 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4631
4632 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4633
4634 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4635 } else {
4636 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4637 get_src(ctx, instr->arr.index));
4638 }
4639 break;
4640 case nir_deref_type_ptr_as_array:
4641 if (instr->mode == nir_var_mem_global) {
4642 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4643
4644 LLVMValueRef index = get_src(ctx, instr->arr.index);
4645 if (LLVMTypeOf(index) != ctx->ac.i64)
4646 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4647
4648 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4649
4650 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4651 } else {
4652 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4653 get_src(ctx, instr->arr.index));
4654 }
4655 break;
4656 case nir_deref_type_cast: {
4657 result = get_src(ctx, instr->parent);
4658
4659 /* We can't use the structs from LLVM because the shader
4660 * specifies its own offsets. */
4661 LLVMTypeRef pointee_type = ctx->ac.i8;
4662 if (instr->mode == nir_var_mem_shared)
4663 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4664
4665 unsigned address_space;
4666
4667 switch(instr->mode) {
4668 case nir_var_mem_shared:
4669 address_space = AC_ADDR_SPACE_LDS;
4670 break;
4671 case nir_var_mem_global:
4672 address_space = AC_ADDR_SPACE_GLOBAL;
4673 break;
4674 default:
4675 unreachable("Unhandled address space");
4676 }
4677
4678 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4679
4680 if (LLVMTypeOf(result) != type) {
4681 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4682 result = LLVMBuildBitCast(ctx->ac.builder, result,
4683 type, "");
4684 } else {
4685 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4686 type, "");
4687 }
4688 }
4689 break;
4690 }
4691 default:
4692 unreachable("Unhandled deref_instr deref type");
4693 }
4694
4695 ctx->ssa_defs[instr->dest.ssa.index] = result;
4696 }
4697
4698 static void visit_cf_list(struct ac_nir_context *ctx,
4699 struct exec_list *list);
4700
4701 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4702 {
4703 nir_foreach_instr(instr, block)
4704 {
4705 switch (instr->type) {
4706 case nir_instr_type_alu:
4707 visit_alu(ctx, nir_instr_as_alu(instr));
4708 break;
4709 case nir_instr_type_load_const:
4710 visit_load_const(ctx, nir_instr_as_load_const(instr));
4711 break;
4712 case nir_instr_type_intrinsic:
4713 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4714 break;
4715 case nir_instr_type_tex:
4716 visit_tex(ctx, nir_instr_as_tex(instr));
4717 break;
4718 case nir_instr_type_phi:
4719 visit_phi(ctx, nir_instr_as_phi(instr));
4720 break;
4721 case nir_instr_type_ssa_undef:
4722 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4723 break;
4724 case nir_instr_type_jump:
4725 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4726 break;
4727 case nir_instr_type_deref:
4728 visit_deref(ctx, nir_instr_as_deref(instr));
4729 break;
4730 default:
4731 fprintf(stderr, "Unknown NIR instr type: ");
4732 nir_print_instr(instr, stderr);
4733 fprintf(stderr, "\n");
4734 abort();
4735 }
4736 }
4737
4738 _mesa_hash_table_insert(ctx->defs, block,
4739 LLVMGetInsertBlock(ctx->ac.builder));
4740 }
4741
4742 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4743 {
4744 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4745
4746 nir_block *then_block =
4747 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4748
4749 ac_build_uif(&ctx->ac, value, then_block->index);
4750
4751 visit_cf_list(ctx, &if_stmt->then_list);
4752
4753 if (!exec_list_is_empty(&if_stmt->else_list)) {
4754 nir_block *else_block =
4755 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4756
4757 ac_build_else(&ctx->ac, else_block->index);
4758 visit_cf_list(ctx, &if_stmt->else_list);
4759 }
4760
4761 ac_build_endif(&ctx->ac, then_block->index);
4762 }
4763
4764 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4765 {
4766 nir_block *first_loop_block =
4767 (nir_block *) exec_list_get_head(&loop->body);
4768
4769 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4770
4771 visit_cf_list(ctx, &loop->body);
4772
4773 ac_build_endloop(&ctx->ac, first_loop_block->index);
4774 }
4775
4776 static void visit_cf_list(struct ac_nir_context *ctx,
4777 struct exec_list *list)
4778 {
4779 foreach_list_typed(nir_cf_node, node, node, list)
4780 {
4781 switch (node->type) {
4782 case nir_cf_node_block:
4783 visit_block(ctx, nir_cf_node_as_block(node));
4784 break;
4785
4786 case nir_cf_node_if:
4787 visit_if(ctx, nir_cf_node_as_if(node));
4788 break;
4789
4790 case nir_cf_node_loop:
4791 visit_loop(ctx, nir_cf_node_as_loop(node));
4792 break;
4793
4794 default:
4795 assert(0);
4796 }
4797 }
4798 }
4799
4800 void
4801 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4802 struct ac_shader_abi *abi,
4803 struct nir_shader *nir,
4804 struct nir_variable *variable,
4805 gl_shader_stage stage)
4806 {
4807 unsigned output_loc = variable->data.driver_location / 4;
4808 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4809
4810 /* tess ctrl has it's own load/store paths for outputs */
4811 if (stage == MESA_SHADER_TESS_CTRL)
4812 return;
4813
4814 if (stage == MESA_SHADER_VERTEX ||
4815 stage == MESA_SHADER_TESS_EVAL ||
4816 stage == MESA_SHADER_GEOMETRY) {
4817 int idx = variable->data.location + variable->data.index;
4818 if (idx == VARYING_SLOT_CLIP_DIST0) {
4819 int length = nir->info.clip_distance_array_size +
4820 nir->info.cull_distance_array_size;
4821
4822 if (length > 4)
4823 attrib_count = 2;
4824 else
4825 attrib_count = 1;
4826 }
4827 }
4828
4829 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4830 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4831 for (unsigned i = 0; i < attrib_count; ++i) {
4832 for (unsigned chan = 0; chan < 4; chan++) {
4833 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4834 ac_build_alloca_undef(ctx, type, "");
4835 }
4836 }
4837 }
4838
4839 static void
4840 setup_locals(struct ac_nir_context *ctx,
4841 struct nir_function *func)
4842 {
4843 int i, j;
4844 ctx->num_locals = 0;
4845 nir_foreach_variable(variable, &func->impl->locals) {
4846 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4847 variable->data.driver_location = ctx->num_locals * 4;
4848 variable->data.location_frac = 0;
4849 ctx->num_locals += attrib_count;
4850 }
4851 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4852 if (!ctx->locals)
4853 return;
4854
4855 for (i = 0; i < ctx->num_locals; i++) {
4856 for (j = 0; j < 4; j++) {
4857 ctx->locals[i * 4 + j] =
4858 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4859 }
4860 }
4861 }
4862
4863 static void
4864 setup_scratch(struct ac_nir_context *ctx,
4865 struct nir_shader *shader)
4866 {
4867 if (shader->scratch_size == 0)
4868 return;
4869
4870 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4871 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4872 "scratch");
4873 }
4874
4875 static void
4876 setup_constant_data(struct ac_nir_context *ctx,
4877 struct nir_shader *shader)
4878 {
4879 if (!shader->constant_data)
4880 return;
4881
4882 LLVMValueRef data =
4883 LLVMConstStringInContext(ctx->ac.context,
4884 shader->constant_data,
4885 shader->constant_data_size,
4886 true);
4887 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4888
4889 /* We want to put the constant data in the CONST address space so that
4890 * we can use scalar loads. However, LLVM versions before 10 put these
4891 * variables in the same section as the code, which is unacceptable
4892 * for RadeonSI as it needs to relocate all the data sections after
4893 * the code sections. See https://reviews.llvm.org/D65813.
4894 */
4895 unsigned address_space =
4896 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4897
4898 LLVMValueRef global =
4899 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4900 "const_data",
4901 address_space);
4902
4903 LLVMSetInitializer(global, data);
4904 LLVMSetGlobalConstant(global, true);
4905 LLVMSetVisibility(global, LLVMHiddenVisibility);
4906 ctx->constant_data = global;
4907 }
4908
4909 static void
4910 setup_shared(struct ac_nir_context *ctx,
4911 struct nir_shader *nir)
4912 {
4913 if (ctx->ac.lds)
4914 return;
4915
4916 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
4917 nir->info.cs.shared_size);
4918
4919 LLVMValueRef lds =
4920 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4921 "compute_lds",
4922 AC_ADDR_SPACE_LDS);
4923 LLVMSetAlignment(lds, 64 * 1024);
4924
4925 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
4926 LLVMPointerType(ctx->ac.i8,
4927 AC_ADDR_SPACE_LDS), "");
4928 }
4929
4930 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4931 const struct ac_shader_args *args, struct nir_shader *nir)
4932 {
4933 struct ac_nir_context ctx = {};
4934 struct nir_function *func;
4935
4936 ctx.ac = *ac;
4937 ctx.abi = abi;
4938 ctx.args = args;
4939
4940 ctx.stage = nir->info.stage;
4941 ctx.info = &nir->info;
4942
4943 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4944
4945 nir_foreach_variable(variable, &nir->outputs)
4946 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4947 ctx.stage);
4948
4949 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4950 _mesa_key_pointer_equal);
4951 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4952 _mesa_key_pointer_equal);
4953 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4954 _mesa_key_pointer_equal);
4955
4956 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4957
4958 nir_index_ssa_defs(func->impl);
4959 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4960
4961 setup_locals(&ctx, func);
4962 setup_scratch(&ctx, nir);
4963 setup_constant_data(&ctx, nir);
4964
4965 if (gl_shader_stage_is_compute(nir->info.stage))
4966 setup_shared(&ctx, nir);
4967
4968 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
4969 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
4970 /* true = don't kill. */
4971 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
4972 }
4973
4974 visit_cf_list(&ctx, &func->impl->body);
4975 phi_post_pass(&ctx);
4976
4977 if (ctx.ac.postponed_kill)
4978 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
4979 ctx.ac.postponed_kill, ""));
4980
4981 if (!gl_shader_stage_is_compute(nir->info.stage))
4982 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4983 ctx.abi->outputs);
4984
4985 free(ctx.locals);
4986 free(ctx.ssa_defs);
4987 ralloc_free(ctx.defs);
4988 ralloc_free(ctx.phis);
4989 ralloc_free(ctx.vars);
4990 }
4991
4992 bool
4993 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4994 {
4995 bool progress = false;
4996
4997 /* Lower large variables to scratch first so that we won't bloat the
4998 * shader by generating large if ladders for them. We later lower
4999 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5000 */
5001 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5002 nir_var_function_temp,
5003 256,
5004 glsl_get_natural_size_align_bytes);
5005
5006 /* While it would be nice not to have this flag, we are constrained
5007 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5008 */
5009 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5010
5011 /* TODO: Indirect indexing of GS inputs is unimplemented.
5012 *
5013 * TCS and TES load inputs directly from LDS or offchip memory, so
5014 * indirect indexing is trivial.
5015 */
5016 nir_variable_mode indirect_mask = 0;
5017 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5018 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5019 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5020 !llvm_has_working_vgpr_indexing)) {
5021 indirect_mask |= nir_var_shader_in;
5022 }
5023 if (!llvm_has_working_vgpr_indexing &&
5024 nir->info.stage != MESA_SHADER_TESS_CTRL)
5025 indirect_mask |= nir_var_shader_out;
5026
5027 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5028 * smart enough to handle indirects without causing excess spilling
5029 * causing the gpu to hang.
5030 *
5031 * See the following thread for more details of the problem:
5032 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5033 */
5034 indirect_mask |= nir_var_function_temp;
5035
5036 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5037 return progress;
5038 }
5039
5040 static unsigned
5041 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5042 {
5043 if (intrin->intrinsic != nir_intrinsic_store_deref)
5044 return 0;
5045
5046 nir_variable *var =
5047 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5048
5049 if (var->data.mode != nir_var_shader_out)
5050 return 0;
5051
5052 unsigned writemask = 0;
5053 const int location = var->data.location;
5054 unsigned first_component = var->data.location_frac;
5055 unsigned num_comps = intrin->dest.ssa.num_components;
5056
5057 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5058 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5059 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5060 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5061
5062 return writemask;
5063 }
5064
5065 static void
5066 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5067 unsigned *cond_block_tf_writemask,
5068 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5069 {
5070 switch (cf_node->type) {
5071 case nir_cf_node_block: {
5072 nir_block *block = nir_cf_node_as_block(cf_node);
5073 nir_foreach_instr(instr, block) {
5074 if (instr->type != nir_instr_type_intrinsic)
5075 continue;
5076
5077 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5078 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5079
5080 /* If we find a barrier in nested control flow put this in the
5081 * too hard basket. In GLSL this is not possible but it is in
5082 * SPIR-V.
5083 */
5084 if (is_nested_cf) {
5085 *tessfactors_are_def_in_all_invocs = false;
5086 return;
5087 }
5088
5089 /* The following case must be prevented:
5090 * gl_TessLevelInner = ...;
5091 * barrier();
5092 * if (gl_InvocationID == 1)
5093 * gl_TessLevelInner = ...;
5094 *
5095 * If you consider disjoint code segments separated by barriers, each
5096 * such segment that writes tess factor channels should write the same
5097 * channels in all codepaths within that segment.
5098 */
5099 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5100 /* Accumulate the result: */
5101 *tessfactors_are_def_in_all_invocs &=
5102 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5103
5104 /* Analyze the next code segment from scratch. */
5105 *upper_block_tf_writemask = 0;
5106 *cond_block_tf_writemask = 0;
5107 }
5108 } else
5109 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5110 }
5111
5112 break;
5113 }
5114 case nir_cf_node_if: {
5115 unsigned then_tessfactor_writemask = 0;
5116 unsigned else_tessfactor_writemask = 0;
5117
5118 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5119 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5120 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5121 cond_block_tf_writemask,
5122 tessfactors_are_def_in_all_invocs, true);
5123 }
5124
5125 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5126 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5127 cond_block_tf_writemask,
5128 tessfactors_are_def_in_all_invocs, true);
5129 }
5130
5131 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5132 /* If both statements write the same tess factor channels,
5133 * we can say that the upper block writes them too.
5134 */
5135 *upper_block_tf_writemask |= then_tessfactor_writemask &
5136 else_tessfactor_writemask;
5137 *cond_block_tf_writemask |= then_tessfactor_writemask |
5138 else_tessfactor_writemask;
5139 }
5140
5141 break;
5142 }
5143 case nir_cf_node_loop: {
5144 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5145 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5146 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5147 cond_block_tf_writemask,
5148 tessfactors_are_def_in_all_invocs, true);
5149 }
5150
5151 break;
5152 }
5153 default:
5154 unreachable("unknown cf node type");
5155 }
5156 }
5157
5158 bool
5159 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5160 {
5161 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5162
5163 /* The pass works as follows:
5164 * If all codepaths write tess factors, we can say that all
5165 * invocations define tess factors.
5166 *
5167 * Each tess factor channel is tracked separately.
5168 */
5169 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5170 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5171
5172 /* Initial value = true. Here the pass will accumulate results from
5173 * multiple segments surrounded by barriers. If tess factors aren't
5174 * written at all, it's a shader bug and we don't care if this will be
5175 * true.
5176 */
5177 bool tessfactors_are_def_in_all_invocs = true;
5178
5179 nir_foreach_function(function, nir) {
5180 if (function->impl) {
5181 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5182 scan_tess_ctrl(node, &main_block_tf_writemask,
5183 &cond_block_tf_writemask,
5184 &tessfactors_are_def_in_all_invocs,
5185 false);
5186 }
5187 }
5188 }
5189
5190 /* Accumulate the result for the last code segment separated by a
5191 * barrier.
5192 */
5193 if (main_block_tf_writemask || cond_block_tf_writemask) {
5194 tessfactors_are_def_in_all_invocs &=
5195 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5196 }
5197
5198 return tessfactors_are_def_in_all_invocs;
5199 }