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amd/llvm: Fix divergent descriptor indexing. (v3)
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 const nir_instr *instr,
66 bool image);
67
68 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
69 nir_deref_instr *deref_instr,
70 enum ac_descriptor_type desc_type,
71 const nir_instr *instr,
72 LLVMValueRef index,
73 bool image, bool write);
74
75 static void
76 build_store_values_extended(struct ac_llvm_context *ac,
77 LLVMValueRef *values,
78 unsigned value_count,
79 unsigned value_stride,
80 LLVMValueRef vec)
81 {
82 LLVMBuilderRef builder = ac->builder;
83 unsigned i;
84
85 for (i = 0; i < value_count; i++) {
86 LLVMValueRef ptr = values[i * value_stride];
87 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
88 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
89 LLVMBuildStore(builder, value, ptr);
90 }
91 }
92
93 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
94 const nir_ssa_def *def)
95 {
96 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
97 if (def->num_components > 1) {
98 type = LLVMVectorType(type, def->num_components);
99 }
100 return type;
101 }
102
103 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
104 {
105 assert(src.is_ssa);
106 return nir->ssa_defs[src.ssa->index];
107 }
108
109 static LLVMValueRef
110 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
111 {
112 LLVMValueRef ptr = get_src(ctx, src);
113 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
114 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
115
116 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
117
118 return LLVMBuildBitCast(ctx->ac.builder, ptr,
119 LLVMPointerType(type, addr_space), "");
120 }
121
122 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
123 const struct nir_block *b)
124 {
125 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
126 return (LLVMBasicBlockRef)entry->data;
127 }
128
129 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
130 nir_alu_src src,
131 unsigned num_components)
132 {
133 LLVMValueRef value = get_src(ctx, src.src);
134 bool need_swizzle = false;
135
136 assert(value);
137 unsigned src_components = ac_get_llvm_num_components(value);
138 for (unsigned i = 0; i < num_components; ++i) {
139 assert(src.swizzle[i] < src_components);
140 if (src.swizzle[i] != i)
141 need_swizzle = true;
142 }
143
144 if (need_swizzle || num_components != src_components) {
145 LLVMValueRef masks[] = {
146 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
147 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
150
151 if (src_components > 1 && num_components == 1) {
152 value = LLVMBuildExtractElement(ctx->ac.builder, value,
153 masks[0], "");
154 } else if (src_components == 1 && num_components > 1) {
155 LLVMValueRef values[] = {value, value, value, value};
156 value = ac_build_gather_values(&ctx->ac, values, num_components);
157 } else {
158 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
159 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
160 swizzle, "");
161 }
162 }
163 assert(!src.negate);
164 assert(!src.abs);
165 return value;
166 }
167
168 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
169 LLVMIntPredicate pred, LLVMValueRef src0,
170 LLVMValueRef src1)
171 {
172 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
173 return LLVMBuildSelect(ctx->builder, result,
174 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
175 ctx->i32_0, "");
176 }
177
178 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
179 LLVMRealPredicate pred, LLVMValueRef src0,
180 LLVMValueRef src1)
181 {
182 LLVMValueRef result;
183 src0 = ac_to_float(ctx, src0);
184 src1 = ac_to_float(ctx, src1);
185 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
186 return LLVMBuildSelect(ctx->builder, result,
187 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
188 ctx->i32_0, "");
189 }
190
191 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
192 const char *intrin,
193 LLVMTypeRef result_type,
194 LLVMValueRef src0)
195 {
196 char name[64];
197 LLVMValueRef params[] = {
198 ac_to_float(ctx, src0),
199 };
200
201 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
202 ac_get_elem_bits(ctx, result_type));
203 assert(length < sizeof(name));
204 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
205 }
206
207 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
208 const char *intrin,
209 LLVMTypeRef result_type,
210 LLVMValueRef src0, LLVMValueRef src1)
211 {
212 char name[64];
213 LLVMValueRef params[] = {
214 ac_to_float(ctx, src0),
215 ac_to_float(ctx, src1),
216 };
217
218 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
219 ac_get_elem_bits(ctx, result_type));
220 assert(length < sizeof(name));
221 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
222 }
223
224 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
225 const char *intrin,
226 LLVMTypeRef result_type,
227 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
228 {
229 char name[64];
230 LLVMValueRef params[] = {
231 ac_to_float(ctx, src0),
232 ac_to_float(ctx, src1),
233 ac_to_float(ctx, src2),
234 };
235
236 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
237 ac_get_elem_bits(ctx, result_type));
238 assert(length < sizeof(name));
239 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
240 }
241
242 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
243 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
244 {
245 LLVMTypeRef src1_type = LLVMTypeOf(src1);
246 LLVMTypeRef src2_type = LLVMTypeOf(src2);
247
248 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
249
250 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
251 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
252 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
253 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
254 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
255 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
256 }
257
258 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
259 ctx->i32_0, "");
260 return LLVMBuildSelect(ctx->builder, v,
261 ac_to_integer_or_pointer(ctx, src1),
262 ac_to_integer_or_pointer(ctx, src2), "");
263 }
264
265 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
266 LLVMValueRef src0)
267 {
268 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
269 }
270
271 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
272 const char *intrin,
273 LLVMValueRef src0, LLVMValueRef src1)
274 {
275 LLVMTypeRef ret_type;
276 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
277 LLVMValueRef res;
278 LLVMValueRef params[] = { src0, src1 };
279 ret_type = LLVMStructTypeInContext(ctx->context, types,
280 2, true);
281
282 res = ac_build_intrinsic(ctx, intrin, ret_type,
283 params, 2, AC_FUNC_ATTR_READNONE);
284
285 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
286 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
287 return res;
288 }
289
290 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
291 LLVMValueRef src0,
292 unsigned bitsize)
293 {
294 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
295 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
296 "");
297 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
298
299 switch (bitsize) {
300 case 16:
301 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
302 case 32:
303 return result;
304 case 64:
305 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
306 default:
307 unreachable("Unsupported bit size.");
308 }
309 }
310
311 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
312 LLVMValueRef src0)
313 {
314 src0 = ac_to_float(ctx, src0);
315 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
316 return LLVMBuildSExt(ctx->builder,
317 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
318 ctx->i32, "");
319 }
320
321 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
322 LLVMValueRef src0,
323 unsigned bitsize)
324 {
325 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
326
327 switch (bitsize) {
328 case 8:
329 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
330 case 16:
331 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
332 case 32:
333 return result;
334 case 64:
335 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
336 default:
337 unreachable("Unsupported bit size.");
338 }
339 }
340
341 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
342 LLVMValueRef src0)
343 {
344 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
345 return LLVMBuildSExt(ctx->builder,
346 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
347 ctx->i32, "");
348 }
349
350 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
351 LLVMValueRef src0)
352 {
353 LLVMValueRef result;
354 LLVMValueRef cond = NULL;
355
356 src0 = ac_to_float(ctx, src0);
357 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
358
359 if (ctx->chip_class >= GFX8) {
360 LLVMValueRef args[2];
361 /* Check if the result is a denormal - and flush to 0 if so. */
362 args[0] = result;
363 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
364 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
365 }
366
367 /* need to convert back up to f32 */
368 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
369
370 if (ctx->chip_class >= GFX8)
371 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
372 else {
373 /* for GFX6-GFX7 */
374 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
375 * so compare the result and flush to 0 if it's smaller.
376 */
377 LLVMValueRef temp, cond2;
378 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
379 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
380 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
381 temp, "");
382 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
383 temp, ctx->f32_0, "");
384 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
385 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
386 }
387 return result;
388 }
389
390 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
391 LLVMValueRef src0, LLVMValueRef src1)
392 {
393 LLVMValueRef dst64, result;
394 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
395 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
396
397 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
398 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
399 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
400 return result;
401 }
402
403 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
404 LLVMValueRef src0, LLVMValueRef src1)
405 {
406 LLVMValueRef dst64, result;
407 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
408 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
409
410 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
411 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
412 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
413 return result;
414 }
415
416 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
417 LLVMValueRef bits, LLVMValueRef offset)
418 {
419 /* mask = ((1 << bits) - 1) << offset */
420 return LLVMBuildShl(ctx->builder,
421 LLVMBuildSub(ctx->builder,
422 LLVMBuildShl(ctx->builder,
423 ctx->i32_1,
424 bits, ""),
425 ctx->i32_1, ""),
426 offset, "");
427 }
428
429 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
430 LLVMValueRef mask, LLVMValueRef insert,
431 LLVMValueRef base)
432 {
433 /* Calculate:
434 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
435 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
436 */
437 return LLVMBuildXor(ctx->builder, base,
438 LLVMBuildAnd(ctx->builder, mask,
439 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
440 }
441
442 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
443 LLVMValueRef src0,
444 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
445 LLVMValueRef args[2]))
446 {
447 LLVMValueRef comp[2];
448
449 src0 = ac_to_float(ctx, src0);
450 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
451 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
452
453 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
454 }
455
456 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
457 LLVMValueRef src0)
458 {
459 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
460 LLVMValueRef temps[2], val;
461 int i;
462
463 for (i = 0; i < 2; i++) {
464 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
465 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
466 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
467 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
468 }
469 return ac_build_gather_values(ctx, temps, 2);
470 }
471
472 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
473 nir_op op,
474 LLVMValueRef src0)
475 {
476 unsigned mask;
477 int idx;
478 LLVMValueRef result;
479
480 if (op == nir_op_fddx_fine)
481 mask = AC_TID_MASK_LEFT;
482 else if (op == nir_op_fddy_fine)
483 mask = AC_TID_MASK_TOP;
484 else
485 mask = AC_TID_MASK_TOP_LEFT;
486
487 /* for DDX we want to next X pixel, DDY next Y pixel. */
488 if (op == nir_op_fddx_fine ||
489 op == nir_op_fddx_coarse ||
490 op == nir_op_fddx)
491 idx = 1;
492 else
493 idx = 2;
494
495 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
496 return result;
497 }
498
499 struct waterfall_context {
500 LLVMBasicBlockRef phi_bb[2];
501 bool use_waterfall;
502 };
503
504 /* To deal with divergent descriptors we can create a loop that handles all
505 * lanes with the same descriptor on a given iteration (henceforth a
506 * waterfall loop).
507 *
508 * These helper create the begin and end of the loop leaving the caller
509 * to implement the body.
510 *
511 * params:
512 * - ctx is the usal nir context
513 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
514 * - value is the possibly divergent value for which we built the loop
515 * - divergent is whether value is actually divergent. If false we just pass
516 * things through.
517 */
518 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
519 struct waterfall_context *wctx,
520 LLVMValueRef value, bool divergent)
521 {
522 /* If the app claims the value is divergent but it is constant we can
523 * end up with a dynamic index of NULL. */
524 if (!value)
525 divergent = false;
526
527 wctx->use_waterfall = divergent;
528 if (!divergent)
529 return value;
530
531 ac_build_bgnloop(&ctx->ac, 6000);
532
533 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
534
535 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
536 scalar_value, "uniform_active");
537
538 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
539 ac_build_ifcc(&ctx->ac, active, 6001);
540
541 return scalar_value;
542 }
543
544 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
545 struct waterfall_context *wctx,
546 LLVMValueRef value)
547 {
548 LLVMValueRef ret = NULL;
549 LLVMValueRef phi_src[2];
550 LLVMValueRef cc_phi_src[2] = {
551 LLVMConstInt(ctx->ac.i32, 0, false),
552 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
553 };
554
555 if (!wctx->use_waterfall)
556 return value;
557
558 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
559
560 ac_build_endif(&ctx->ac, 6001);
561
562 if (value) {
563 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
564 phi_src[1] = value;
565
566 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
567 }
568
569 /*
570 * By using the optimization barrier on the exit decision, we decouple
571 * the operations from the break, and hence avoid LLVM hoisting the
572 * opteration into the break block.
573 */
574 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
575 ac_build_optimization_barrier(&ctx->ac, &cc);
576
577 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
578 ac_build_ifcc(&ctx->ac, active, 6002);
579 ac_build_break(&ctx->ac);
580 ac_build_endif(&ctx->ac, 6002);
581
582 ac_build_endloop(&ctx->ac, 6000);
583 return ret;
584 }
585
586 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
587 {
588 LLVMValueRef src[4], result = NULL;
589 unsigned num_components = instr->dest.dest.ssa.num_components;
590 unsigned src_components;
591 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
592
593 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
594 switch (instr->op) {
595 case nir_op_vec2:
596 case nir_op_vec3:
597 case nir_op_vec4:
598 src_components = 1;
599 break;
600 case nir_op_pack_half_2x16:
601 case nir_op_pack_snorm_2x16:
602 case nir_op_pack_unorm_2x16:
603 src_components = 2;
604 break;
605 case nir_op_unpack_half_2x16:
606 src_components = 1;
607 break;
608 case nir_op_cube_face_coord:
609 case nir_op_cube_face_index:
610 src_components = 3;
611 break;
612 default:
613 src_components = num_components;
614 break;
615 }
616 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
617 src[i] = get_alu_src(ctx, instr->src[i], src_components);
618
619 switch (instr->op) {
620 case nir_op_mov:
621 result = src[0];
622 break;
623 case nir_op_fneg:
624 src[0] = ac_to_float(&ctx->ac, src[0]);
625 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
626 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
627 /* fneg will be optimized by backend compiler with sign
628 * bit removed via XOR. This is probably a LLVM bug.
629 */
630 result = ac_build_canonicalize(&ctx->ac, result,
631 instr->dest.dest.ssa.bit_size);
632 }
633 break;
634 case nir_op_ineg:
635 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
636 break;
637 case nir_op_inot:
638 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
639 break;
640 case nir_op_iadd:
641 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_fadd:
644 src[0] = ac_to_float(&ctx->ac, src[0]);
645 src[1] = ac_to_float(&ctx->ac, src[1]);
646 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_fsub:
649 src[0] = ac_to_float(&ctx->ac, src[0]);
650 src[1] = ac_to_float(&ctx->ac, src[1]);
651 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
652 break;
653 case nir_op_isub:
654 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
655 break;
656 case nir_op_imul:
657 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_imod:
660 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
661 break;
662 case nir_op_umod:
663 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
664 break;
665 case nir_op_fmod:
666 /* lower_fmod only lower 16-bit and 32-bit fmod */
667 assert(instr->dest.dest.ssa.bit_size == 64);
668 src[0] = ac_to_float(&ctx->ac, src[0]);
669 src[1] = ac_to_float(&ctx->ac, src[1]);
670 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
671 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
672 ac_to_float_type(&ctx->ac, def_type), result);
673 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
674 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
675 break;
676 case nir_op_irem:
677 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
678 break;
679 case nir_op_idiv:
680 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_udiv:
683 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
684 break;
685 case nir_op_fmul:
686 src[0] = ac_to_float(&ctx->ac, src[0]);
687 src[1] = ac_to_float(&ctx->ac, src[1]);
688 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
689 break;
690 case nir_op_frcp:
691 src[0] = ac_to_float(&ctx->ac, src[0]);
692 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
693 break;
694 case nir_op_iand:
695 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
696 break;
697 case nir_op_ior:
698 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
699 break;
700 case nir_op_ixor:
701 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
702 break;
703 case nir_op_ishl:
704 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
705 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
706 LLVMTypeOf(src[0]), "");
707 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
708 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
709 LLVMTypeOf(src[0]), "");
710 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
711 break;
712 case nir_op_ishr:
713 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
714 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
715 LLVMTypeOf(src[0]), "");
716 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
717 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
718 LLVMTypeOf(src[0]), "");
719 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
720 break;
721 case nir_op_ushr:
722 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
723 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
724 LLVMTypeOf(src[0]), "");
725 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
726 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
727 LLVMTypeOf(src[0]), "");
728 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
729 break;
730 case nir_op_ilt32:
731 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
732 break;
733 case nir_op_ine32:
734 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
735 break;
736 case nir_op_ieq32:
737 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
738 break;
739 case nir_op_ige32:
740 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
741 break;
742 case nir_op_ult32:
743 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
744 break;
745 case nir_op_uge32:
746 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
747 break;
748 case nir_op_feq32:
749 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
750 break;
751 case nir_op_fne32:
752 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
753 break;
754 case nir_op_flt32:
755 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
756 break;
757 case nir_op_fge32:
758 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
759 break;
760 case nir_op_fabs:
761 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
762 ac_to_float_type(&ctx->ac, def_type), src[0]);
763 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
764 /* fabs will be optimized by backend compiler with sign
765 * bit removed via AND.
766 */
767 result = ac_build_canonicalize(&ctx->ac, result,
768 instr->dest.dest.ssa.bit_size);
769 }
770 break;
771 case nir_op_iabs:
772 result = emit_iabs(&ctx->ac, src[0]);
773 break;
774 case nir_op_imax:
775 result = ac_build_imax(&ctx->ac, src[0], src[1]);
776 break;
777 case nir_op_imin:
778 result = ac_build_imin(&ctx->ac, src[0], src[1]);
779 break;
780 case nir_op_umax:
781 result = ac_build_umax(&ctx->ac, src[0], src[1]);
782 break;
783 case nir_op_umin:
784 result = ac_build_umin(&ctx->ac, src[0], src[1]);
785 break;
786 case nir_op_isign:
787 result = ac_build_isign(&ctx->ac, src[0],
788 instr->dest.dest.ssa.bit_size);
789 break;
790 case nir_op_fsign:
791 src[0] = ac_to_float(&ctx->ac, src[0]);
792 result = ac_build_fsign(&ctx->ac, src[0],
793 instr->dest.dest.ssa.bit_size);
794 break;
795 case nir_op_ffloor:
796 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
797 ac_to_float_type(&ctx->ac, def_type), src[0]);
798 break;
799 case nir_op_ftrunc:
800 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
801 ac_to_float_type(&ctx->ac, def_type), src[0]);
802 break;
803 case nir_op_fceil:
804 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
805 ac_to_float_type(&ctx->ac, def_type), src[0]);
806 break;
807 case nir_op_fround_even:
808 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
809 ac_to_float_type(&ctx->ac, def_type),src[0]);
810 break;
811 case nir_op_ffract:
812 src[0] = ac_to_float(&ctx->ac, src[0]);
813 result = ac_build_fract(&ctx->ac, src[0],
814 instr->dest.dest.ssa.bit_size);
815 break;
816 case nir_op_fsin:
817 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
818 ac_to_float_type(&ctx->ac, def_type), src[0]);
819 break;
820 case nir_op_fcos:
821 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
822 ac_to_float_type(&ctx->ac, def_type), src[0]);
823 break;
824 case nir_op_fsqrt:
825 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
826 ac_to_float_type(&ctx->ac, def_type), src[0]);
827 break;
828 case nir_op_fexp2:
829 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
830 ac_to_float_type(&ctx->ac, def_type), src[0]);
831 break;
832 case nir_op_flog2:
833 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
834 ac_to_float_type(&ctx->ac, def_type), src[0]);
835 break;
836 case nir_op_frsq:
837 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
838 ac_to_float_type(&ctx->ac, def_type), src[0]);
839 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
840 break;
841 case nir_op_frexp_exp:
842 src[0] = ac_to_float(&ctx->ac, src[0]);
843 result = ac_build_frexp_exp(&ctx->ac, src[0],
844 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
845 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
846 result = LLVMBuildSExt(ctx->ac.builder, result,
847 ctx->ac.i32, "");
848 break;
849 case nir_op_frexp_sig:
850 src[0] = ac_to_float(&ctx->ac, src[0]);
851 result = ac_build_frexp_mant(&ctx->ac, src[0],
852 instr->dest.dest.ssa.bit_size);
853 break;
854 case nir_op_fpow:
855 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
856 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
857 break;
858 case nir_op_fmax:
859 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
860 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
861 if (ctx->ac.chip_class < GFX9 &&
862 instr->dest.dest.ssa.bit_size == 32) {
863 /* Only pre-GFX9 chips do not flush denorms. */
864 result = ac_build_canonicalize(&ctx->ac, result,
865 instr->dest.dest.ssa.bit_size);
866 }
867 break;
868 case nir_op_fmin:
869 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
870 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
871 if (ctx->ac.chip_class < GFX9 &&
872 instr->dest.dest.ssa.bit_size == 32) {
873 /* Only pre-GFX9 chips do not flush denorms. */
874 result = ac_build_canonicalize(&ctx->ac, result,
875 instr->dest.dest.ssa.bit_size);
876 }
877 break;
878 case nir_op_ffma:
879 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
880 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
881 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
882 break;
883 case nir_op_ldexp:
884 src[0] = ac_to_float(&ctx->ac, src[0]);
885 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
886 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
887 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
888 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
889 else
890 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
891 break;
892 case nir_op_bfm:
893 result = emit_bfm(&ctx->ac, src[0], src[1]);
894 break;
895 case nir_op_bitfield_select:
896 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
897 break;
898 case nir_op_ubfe:
899 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
900 break;
901 case nir_op_ibfe:
902 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
903 break;
904 case nir_op_bitfield_reverse:
905 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
906 break;
907 case nir_op_bit_count:
908 result = ac_build_bit_count(&ctx->ac, src[0]);
909 break;
910 case nir_op_vec2:
911 case nir_op_vec3:
912 case nir_op_vec4:
913 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
914 src[i] = ac_to_integer(&ctx->ac, src[i]);
915 result = ac_build_gather_values(&ctx->ac, src, num_components);
916 break;
917 case nir_op_f2i8:
918 case nir_op_f2i16:
919 case nir_op_f2i32:
920 case nir_op_f2i64:
921 src[0] = ac_to_float(&ctx->ac, src[0]);
922 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
923 break;
924 case nir_op_f2u8:
925 case nir_op_f2u16:
926 case nir_op_f2u32:
927 case nir_op_f2u64:
928 src[0] = ac_to_float(&ctx->ac, src[0]);
929 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
930 break;
931 case nir_op_i2f16:
932 case nir_op_i2f32:
933 case nir_op_i2f64:
934 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
935 break;
936 case nir_op_u2f16:
937 case nir_op_u2f32:
938 case nir_op_u2f64:
939 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
940 break;
941 case nir_op_f2f16_rtz:
942 src[0] = ac_to_float(&ctx->ac, src[0]);
943 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
944 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
945 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
946 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
947 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
948 break;
949 case nir_op_f2f16_rtne:
950 case nir_op_f2f16:
951 case nir_op_f2f32:
952 case nir_op_f2f64:
953 src[0] = ac_to_float(&ctx->ac, src[0]);
954 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
955 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
956 else
957 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
958 break;
959 case nir_op_u2u8:
960 case nir_op_u2u16:
961 case nir_op_u2u32:
962 case nir_op_u2u64:
963 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
964 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
965 else
966 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
967 break;
968 case nir_op_i2i8:
969 case nir_op_i2i16:
970 case nir_op_i2i32:
971 case nir_op_i2i64:
972 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
973 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
974 else
975 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
976 break;
977 case nir_op_b32csel:
978 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
979 break;
980 case nir_op_find_lsb:
981 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
982 break;
983 case nir_op_ufind_msb:
984 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
985 break;
986 case nir_op_ifind_msb:
987 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
988 break;
989 case nir_op_uadd_carry:
990 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
991 break;
992 case nir_op_usub_borrow:
993 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
994 break;
995 case nir_op_b2f16:
996 case nir_op_b2f32:
997 case nir_op_b2f64:
998 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
999 break;
1000 case nir_op_f2b32:
1001 result = emit_f2b(&ctx->ac, src[0]);
1002 break;
1003 case nir_op_b2i8:
1004 case nir_op_b2i16:
1005 case nir_op_b2i32:
1006 case nir_op_b2i64:
1007 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1008 break;
1009 case nir_op_i2b32:
1010 result = emit_i2b(&ctx->ac, src[0]);
1011 break;
1012 case nir_op_fquantize2f16:
1013 result = emit_f2f16(&ctx->ac, src[0]);
1014 break;
1015 case nir_op_umul_high:
1016 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1017 break;
1018 case nir_op_imul_high:
1019 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1020 break;
1021 case nir_op_pack_half_2x16:
1022 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1023 break;
1024 case nir_op_pack_snorm_2x16:
1025 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1026 break;
1027 case nir_op_pack_unorm_2x16:
1028 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1029 break;
1030 case nir_op_unpack_half_2x16:
1031 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1032 break;
1033 case nir_op_fddx:
1034 case nir_op_fddy:
1035 case nir_op_fddx_fine:
1036 case nir_op_fddy_fine:
1037 case nir_op_fddx_coarse:
1038 case nir_op_fddy_coarse:
1039 result = emit_ddxy(ctx, instr->op, src[0]);
1040 break;
1041
1042 case nir_op_unpack_64_2x32_split_x: {
1043 assert(ac_get_llvm_num_components(src[0]) == 1);
1044 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1045 ctx->ac.v2i32,
1046 "");
1047 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1048 ctx->ac.i32_0, "");
1049 break;
1050 }
1051
1052 case nir_op_unpack_64_2x32_split_y: {
1053 assert(ac_get_llvm_num_components(src[0]) == 1);
1054 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1055 ctx->ac.v2i32,
1056 "");
1057 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1058 ctx->ac.i32_1, "");
1059 break;
1060 }
1061
1062 case nir_op_pack_64_2x32_split: {
1063 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1064 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1065 break;
1066 }
1067
1068 case nir_op_pack_32_2x16_split: {
1069 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1070 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1071 break;
1072 }
1073
1074 case nir_op_unpack_32_2x16_split_x: {
1075 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1076 ctx->ac.v2i16,
1077 "");
1078 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1079 ctx->ac.i32_0, "");
1080 break;
1081 }
1082
1083 case nir_op_unpack_32_2x16_split_y: {
1084 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1085 ctx->ac.v2i16,
1086 "");
1087 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1088 ctx->ac.i32_1, "");
1089 break;
1090 }
1091
1092 case nir_op_cube_face_coord: {
1093 src[0] = ac_to_float(&ctx->ac, src[0]);
1094 LLVMValueRef results[2];
1095 LLVMValueRef in[3];
1096 for (unsigned chan = 0; chan < 3; chan++)
1097 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1098 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1099 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1100 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1101 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1102 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1103 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1104 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1105 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1106 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1107 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1108 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1109 result = ac_build_gather_values(&ctx->ac, results, 2);
1110 break;
1111 }
1112
1113 case nir_op_cube_face_index: {
1114 src[0] = ac_to_float(&ctx->ac, src[0]);
1115 LLVMValueRef in[3];
1116 for (unsigned chan = 0; chan < 3; chan++)
1117 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1118 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1119 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1120 break;
1121 }
1122
1123 case nir_op_fmin3:
1124 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1125 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1126 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1127 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1128 break;
1129 case nir_op_umin3:
1130 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1131 result = ac_build_umin(&ctx->ac, result, src[2]);
1132 break;
1133 case nir_op_imin3:
1134 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1135 result = ac_build_imin(&ctx->ac, result, src[2]);
1136 break;
1137 case nir_op_fmax3:
1138 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1139 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1140 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1141 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1142 break;
1143 case nir_op_umax3:
1144 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1145 result = ac_build_umax(&ctx->ac, result, src[2]);
1146 break;
1147 case nir_op_imax3:
1148 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1149 result = ac_build_imax(&ctx->ac, result, src[2]);
1150 break;
1151 case nir_op_fmed3: {
1152 src[0] = ac_to_float(&ctx->ac, src[0]);
1153 src[1] = ac_to_float(&ctx->ac, src[1]);
1154 src[2] = ac_to_float(&ctx->ac, src[2]);
1155 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1156 instr->dest.dest.ssa.bit_size);
1157 break;
1158 }
1159 case nir_op_imed3: {
1160 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1161 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1162 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1163 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1164 break;
1165 }
1166 case nir_op_umed3: {
1167 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1168 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1169 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1170 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1171 break;
1172 }
1173
1174 default:
1175 fprintf(stderr, "Unknown NIR alu instr: ");
1176 nir_print_instr(&instr->instr, stderr);
1177 fprintf(stderr, "\n");
1178 abort();
1179 }
1180
1181 if (result) {
1182 assert(instr->dest.dest.is_ssa);
1183 result = ac_to_integer_or_pointer(&ctx->ac, result);
1184 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1185 }
1186 }
1187
1188 static void visit_load_const(struct ac_nir_context *ctx,
1189 const nir_load_const_instr *instr)
1190 {
1191 LLVMValueRef values[4], value = NULL;
1192 LLVMTypeRef element_type =
1193 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1194
1195 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1196 switch (instr->def.bit_size) {
1197 case 8:
1198 values[i] = LLVMConstInt(element_type,
1199 instr->value[i].u8, false);
1200 break;
1201 case 16:
1202 values[i] = LLVMConstInt(element_type,
1203 instr->value[i].u16, false);
1204 break;
1205 case 32:
1206 values[i] = LLVMConstInt(element_type,
1207 instr->value[i].u32, false);
1208 break;
1209 case 64:
1210 values[i] = LLVMConstInt(element_type,
1211 instr->value[i].u64, false);
1212 break;
1213 default:
1214 fprintf(stderr,
1215 "unsupported nir load_const bit_size: %d\n",
1216 instr->def.bit_size);
1217 abort();
1218 }
1219 }
1220 if (instr->def.num_components > 1) {
1221 value = LLVMConstVector(values, instr->def.num_components);
1222 } else
1223 value = values[0];
1224
1225 ctx->ssa_defs[instr->def.index] = value;
1226 }
1227
1228 static LLVMValueRef
1229 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1230 {
1231 LLVMValueRef size =
1232 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1233 LLVMConstInt(ctx->ac.i32, 2, false), "");
1234
1235 /* GFX8 only */
1236 if (ctx->ac.chip_class == GFX8 && in_elements) {
1237 /* On GFX8, the descriptor contains the size in bytes,
1238 * but TXQ must return the size in elements.
1239 * The stride is always non-zero for resources using TXQ.
1240 */
1241 LLVMValueRef stride =
1242 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1243 ctx->ac.i32_1, "");
1244 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1245 LLVMConstInt(ctx->ac.i32, 16, false), "");
1246 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1247 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1248
1249 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1250 }
1251 return size;
1252 }
1253
1254 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1255 * incorrectly forces nearest filtering if the texture format is integer.
1256 * The only effect it has on Gather4, which always returns 4 texels for
1257 * bilinear filtering, is that the final coordinates are off by 0.5 of
1258 * the texel size.
1259 *
1260 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1261 * or (0.5 / size) from the normalized coordinates.
1262 *
1263 * However, cube textures with 8_8_8_8 data formats require a different
1264 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1265 * precision in 32-bit data formats, so it needs to be applied dynamically at
1266 * runtime. In this case, return an i1 value that indicates whether the
1267 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1268 */
1269 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1270 nir_variable *var,
1271 struct ac_image_args *args,
1272 const nir_tex_instr *instr)
1273 {
1274 const struct glsl_type *type = glsl_without_array(var->type);
1275 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1276 LLVMValueRef wa_8888 = NULL;
1277 LLVMValueRef half_texel[2];
1278 LLVMValueRef result;
1279
1280 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1281
1282 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1283 LLVMValueRef formats;
1284 LLVMValueRef data_format;
1285 LLVMValueRef wa_formats;
1286
1287 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1288
1289 data_format = LLVMBuildLShr(ctx->builder, formats,
1290 LLVMConstInt(ctx->i32, 20, false), "");
1291 data_format = LLVMBuildAnd(ctx->builder, data_format,
1292 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1293 wa_8888 = LLVMBuildICmp(
1294 ctx->builder, LLVMIntEQ, data_format,
1295 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1296 "");
1297
1298 uint32_t wa_num_format =
1299 stype == GLSL_TYPE_UINT ?
1300 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1301 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1302 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1303 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1304 "");
1305 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1306 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1307
1308 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1309 args->resource = LLVMBuildInsertElement(
1310 ctx->builder, args->resource, formats, ctx->i32_1, "");
1311 }
1312
1313 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1314 assert(!wa_8888);
1315 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1316 } else {
1317 struct ac_image_args resinfo = {};
1318 LLVMBasicBlockRef bbs[2];
1319
1320 LLVMValueRef unnorm = NULL;
1321 LLVMValueRef default_offset = ctx->f32_0;
1322 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1323 !instr->is_array) {
1324 /* In vulkan, whether the sampler uses unnormalized
1325 * coordinates or not is a dynamic property of the
1326 * sampler. Hence, to figure out whether or not we
1327 * need to divide by the texture size, we need to test
1328 * the sampler at runtime. This tests the bit set by
1329 * radv_init_sampler().
1330 */
1331 LLVMValueRef sampler0 =
1332 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1333 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1334 LLVMConstInt(ctx->i32, 15, false), "");
1335 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1336 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1337 default_offset = LLVMConstReal(ctx->f32, -0.5);
1338 }
1339
1340 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1341 if (wa_8888 || unnorm) {
1342 assert(!(wa_8888 && unnorm));
1343 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1344 /* Skip the texture size query entirely if we don't need it. */
1345 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1346 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1347 }
1348
1349 /* Query the texture size. */
1350 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1351 resinfo.opcode = ac_image_get_resinfo;
1352 resinfo.dmask = 0xf;
1353 resinfo.lod = ctx->i32_0;
1354 resinfo.resource = args->resource;
1355 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1356 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1357
1358 /* Compute -0.5 / size. */
1359 for (unsigned c = 0; c < 2; c++) {
1360 half_texel[c] =
1361 LLVMBuildExtractElement(ctx->builder, size,
1362 LLVMConstInt(ctx->i32, c, 0), "");
1363 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1364 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1365 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1366 LLVMConstReal(ctx->f32, -0.5), "");
1367 }
1368
1369 if (wa_8888 || unnorm) {
1370 ac_build_endif(ctx, 2000);
1371
1372 for (unsigned c = 0; c < 2; c++) {
1373 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1374 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1375 values, bbs);
1376 }
1377 }
1378 }
1379
1380 for (unsigned c = 0; c < 2; c++) {
1381 LLVMValueRef tmp;
1382 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1383 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1384 }
1385
1386 args->attributes = AC_FUNC_ATTR_READNONE;
1387 result = ac_build_image_opcode(ctx, args);
1388
1389 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1390 LLVMValueRef tmp, tmp2;
1391
1392 /* if the cube workaround is in place, f2i the result. */
1393 for (unsigned c = 0; c < 4; c++) {
1394 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1395 if (stype == GLSL_TYPE_UINT)
1396 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1397 else
1398 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1399 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1400 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1401 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1402 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1403 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1404 }
1405 }
1406 return result;
1407 }
1408
1409 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1410 {
1411 nir_deref_instr *texture_deref_instr = NULL;
1412
1413 for (unsigned i = 0; i < instr->num_srcs; i++) {
1414 switch (instr->src[i].src_type) {
1415 case nir_tex_src_texture_deref:
1416 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1417 break;
1418 default:
1419 break;
1420 }
1421 }
1422 return texture_deref_instr;
1423 }
1424
1425 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1426 const nir_tex_instr *instr,
1427 struct ac_image_args *args)
1428 {
1429 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1430 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1431
1432 return ac_build_buffer_load_format(&ctx->ac,
1433 args->resource,
1434 args->coords[0],
1435 ctx->ac.i32_0,
1436 util_last_bit(mask),
1437 0, true);
1438 }
1439
1440 args->opcode = ac_image_sample;
1441
1442 switch (instr->op) {
1443 case nir_texop_txf:
1444 case nir_texop_txf_ms:
1445 case nir_texop_samples_identical:
1446 args->opcode = args->level_zero ||
1447 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1448 ac_image_load : ac_image_load_mip;
1449 args->level_zero = false;
1450 break;
1451 case nir_texop_txs:
1452 case nir_texop_query_levels:
1453 args->opcode = ac_image_get_resinfo;
1454 if (!args->lod)
1455 args->lod = ctx->ac.i32_0;
1456 args->level_zero = false;
1457 break;
1458 case nir_texop_tex:
1459 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1460 assert(!args->lod);
1461 args->level_zero = true;
1462 }
1463 break;
1464 case nir_texop_tg4:
1465 args->opcode = ac_image_gather4;
1466 args->level_zero = true;
1467 break;
1468 case nir_texop_lod:
1469 args->opcode = ac_image_get_lod;
1470 break;
1471 case nir_texop_fragment_fetch:
1472 case nir_texop_fragment_mask_fetch:
1473 args->opcode = ac_image_load;
1474 args->level_zero = false;
1475 break;
1476 default:
1477 break;
1478 }
1479
1480 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1481 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1482 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1483 const struct glsl_type *type = glsl_without_array(var->type);
1484 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1485 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1486 return lower_gather4_integer(&ctx->ac, var, args, instr);
1487 }
1488 }
1489
1490 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1491 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1492 if ((args->dim == ac_image_2darray ||
1493 args->dim == ac_image_2d) && !args->coords[1]) {
1494 args->coords[1] = ctx->ac.i32_0;
1495 }
1496 }
1497
1498 args->attributes = AC_FUNC_ATTR_READNONE;
1499 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1500 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1501 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1502 /* Prevent texture instructions with implicit derivatives from being
1503 * sinked into branches. */
1504 switch (instr->op) {
1505 case nir_texop_tex:
1506 case nir_texop_txb:
1507 case nir_texop_lod:
1508 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1509 break;
1510 default:
1511 break;
1512 }
1513 }
1514
1515 return ac_build_image_opcode(&ctx->ac, args);
1516 }
1517
1518 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1519 nir_intrinsic_instr *instr)
1520 {
1521 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1522 LLVMValueRef index = get_src(ctx, instr->src[1]);
1523
1524 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1525 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1526 return result;
1527 }
1528
1529 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1530 nir_intrinsic_instr *instr)
1531 {
1532 LLVMValueRef ptr, addr;
1533 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1534 unsigned index = nir_intrinsic_base(instr);
1535
1536 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1537 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1538
1539 /* Load constant values from user SGPRS when possible, otherwise
1540 * fallback to the default path that loads directly from memory.
1541 */
1542 if (LLVMIsConstant(src0) &&
1543 instr->dest.ssa.bit_size == 32) {
1544 unsigned count = instr->dest.ssa.num_components;
1545 unsigned offset = index;
1546
1547 offset += LLVMConstIntGetZExtValue(src0);
1548 offset /= 4;
1549
1550 offset -= ctx->args->base_inline_push_consts;
1551
1552 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1553 if (offset + count <= num_inline_push_consts) {
1554 LLVMValueRef push_constants[num_inline_push_consts];
1555 for (unsigned i = 0; i < num_inline_push_consts; i++)
1556 push_constants[i] = ac_get_arg(&ctx->ac,
1557 ctx->args->inline_push_consts[i]);
1558 return ac_build_gather_values(&ctx->ac,
1559 push_constants + offset,
1560 count);
1561 }
1562 }
1563
1564 ptr = LLVMBuildGEP(ctx->ac.builder,
1565 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1566
1567 if (instr->dest.ssa.bit_size == 8) {
1568 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1569 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1570 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1571 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1572
1573 LLVMValueRef params[3];
1574 if (load_dwords > 1) {
1575 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1576 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1577 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1578 } else {
1579 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1580 params[0] = ctx->ac.i32_0;
1581 params[1] = res;
1582 }
1583 params[2] = addr;
1584 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1585
1586 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1587 if (instr->dest.ssa.num_components > 1)
1588 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1589 return res;
1590 } else if (instr->dest.ssa.bit_size == 16) {
1591 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1592 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1593 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1594 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1595 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1596 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1597 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1598 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1599 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1600 LLVMConstInt(ctx->ac.i32, 4, false)};
1601 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1602 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1603 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1604 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1605 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1606 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1607 }
1608
1609 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1610
1611 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1612 }
1613
1614 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1615 const nir_intrinsic_instr *instr)
1616 {
1617 LLVMValueRef index = get_src(ctx, instr->src[0]);
1618
1619 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1620 }
1621
1622 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1623 {
1624 uint32_t new_mask = 0;
1625 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1626 if (mask & (1u << i))
1627 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1628 return new_mask;
1629 }
1630
1631 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1632 unsigned start, unsigned count)
1633 {
1634 LLVMValueRef mask[] = {
1635 ctx->i32_0, ctx->i32_1,
1636 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1637
1638 unsigned src_elements = ac_get_llvm_num_components(src);
1639
1640 if (count == src_elements) {
1641 assert(start == 0);
1642 return src;
1643 } else if (count == 1) {
1644 assert(start < src_elements);
1645 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1646 } else {
1647 assert(start + count <= src_elements);
1648 assert(count <= 4);
1649 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1650 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1651 }
1652 }
1653
1654 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1655 enum gl_access_qualifier access,
1656 bool may_store_unaligned,
1657 bool writeonly_memory)
1658 {
1659 unsigned cache_policy = 0;
1660
1661 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1662 * store opcodes not aligned to a dword are affected. The only way to
1663 * get unaligned stores is through shader images.
1664 */
1665 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1666 /* If this is write-only, don't keep data in L1 to prevent
1667 * evicting L1 cache lines that may be needed by other
1668 * instructions.
1669 */
1670 writeonly_memory ||
1671 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1672 cache_policy |= ac_glc;
1673 }
1674
1675 if (access & ACCESS_STREAM_CACHE_POLICY)
1676 cache_policy |= ac_slc;
1677
1678 return cache_policy;
1679 }
1680
1681 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1682 struct waterfall_context *wctx,
1683 const nir_intrinsic_instr *instr,
1684 nir_src src)
1685 {
1686 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1687 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1688 }
1689
1690 static void visit_store_ssbo(struct ac_nir_context *ctx,
1691 nir_intrinsic_instr *instr)
1692 {
1693 if (ctx->ac.postponed_kill) {
1694 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1695 ctx->ac.postponed_kill, "");
1696 ac_build_ifcc(&ctx->ac, cond, 7000);
1697 }
1698
1699 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1700 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1701 unsigned writemask = nir_intrinsic_write_mask(instr);
1702 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1703 bool writeonly_memory = access & ACCESS_NON_READABLE;
1704 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1705
1706 struct waterfall_context wctx;
1707 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1708
1709 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1710 LLVMValueRef base_data = src_data;
1711 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1712 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1713
1714 while (writemask) {
1715 int start, count;
1716 LLVMValueRef data, offset;
1717 LLVMTypeRef data_type;
1718
1719 u_bit_scan_consecutive_range(&writemask, &start, &count);
1720
1721 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1722 * writes into a 2-element and a 1-element write. */
1723 if (count == 3 &&
1724 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1725 writemask |= 1 << (start + 2);
1726 count = 2;
1727 }
1728 int num_bytes = count * elem_size_bytes; /* count in bytes */
1729
1730 /* we can only store 4 DWords at the same time.
1731 * can only happen for 64 Bit vectors. */
1732 if (num_bytes > 16) {
1733 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1734 count = 2;
1735 num_bytes = 16;
1736 }
1737
1738 /* check alignment of 16 Bit stores */
1739 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1740 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1741 count = 1;
1742 num_bytes = 2;
1743 }
1744 data = extract_vector_range(&ctx->ac, base_data, start, count);
1745
1746 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1747 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1748
1749 if (num_bytes == 1) {
1750 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1751 offset, ctx->ac.i32_0,
1752 cache_policy);
1753 } else if (num_bytes == 2) {
1754 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1755 offset, ctx->ac.i32_0,
1756 cache_policy);
1757 } else {
1758 int num_channels = num_bytes / 4;
1759
1760 switch (num_bytes) {
1761 case 16: /* v4f32 */
1762 data_type = ctx->ac.v4f32;
1763 break;
1764 case 12: /* v3f32 */
1765 data_type = ctx->ac.v3f32;
1766 break;
1767 case 8: /* v2f32 */
1768 data_type = ctx->ac.v2f32;
1769 break;
1770 case 4: /* f32 */
1771 data_type = ctx->ac.f32;
1772 break;
1773 default:
1774 unreachable("Malformed vector store.");
1775 }
1776 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1777
1778 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1779 num_channels, offset,
1780 ctx->ac.i32_0, 0,
1781 cache_policy);
1782 }
1783 }
1784
1785 exit_waterfall(ctx, &wctx, NULL);
1786
1787 if (ctx->ac.postponed_kill)
1788 ac_build_endif(&ctx->ac, 7000);
1789 }
1790
1791 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1792 LLVMValueRef descriptor,
1793 LLVMValueRef offset,
1794 LLVMValueRef compare,
1795 LLVMValueRef exchange)
1796 {
1797 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1798 if (ctx->abi->robust_buffer_access) {
1799 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1800
1801 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1802 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1803
1804 ac_build_ifcc(&ctx->ac, cond, -1);
1805
1806 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1807 }
1808
1809 LLVMValueRef ptr_parts[2] = {
1810 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1811 LLVMBuildAnd(ctx->ac.builder,
1812 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1813 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1814 };
1815
1816 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1817 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1818
1819 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1820
1821 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1822 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1823 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1824 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1825
1826 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1827 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1828
1829 if (ctx->abi->robust_buffer_access) {
1830 ac_build_endif(&ctx->ac, -1);
1831
1832 LLVMBasicBlockRef incoming_blocks[2] = {
1833 start_block,
1834 then_block,
1835 };
1836
1837 LLVMValueRef incoming_values[2] = {
1838 LLVMConstInt(ctx->ac.i64, 0, 0),
1839 result,
1840 };
1841 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1842 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1843 return ret;
1844 } else {
1845 return result;
1846 }
1847 }
1848
1849 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1850 nir_intrinsic_instr *instr)
1851 {
1852 if (ctx->ac.postponed_kill) {
1853 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1854 ctx->ac.postponed_kill, "");
1855 ac_build_ifcc(&ctx->ac, cond, 7001);
1856 }
1857
1858 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1859 const char *op;
1860 char name[64], type[8];
1861 LLVMValueRef params[6], descriptor;
1862 LLVMValueRef result;
1863 int arg_count = 0;
1864
1865 struct waterfall_context wctx;
1866 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1867
1868 switch (instr->intrinsic) {
1869 case nir_intrinsic_ssbo_atomic_add:
1870 op = "add";
1871 break;
1872 case nir_intrinsic_ssbo_atomic_imin:
1873 op = "smin";
1874 break;
1875 case nir_intrinsic_ssbo_atomic_umin:
1876 op = "umin";
1877 break;
1878 case nir_intrinsic_ssbo_atomic_imax:
1879 op = "smax";
1880 break;
1881 case nir_intrinsic_ssbo_atomic_umax:
1882 op = "umax";
1883 break;
1884 case nir_intrinsic_ssbo_atomic_and:
1885 op = "and";
1886 break;
1887 case nir_intrinsic_ssbo_atomic_or:
1888 op = "or";
1889 break;
1890 case nir_intrinsic_ssbo_atomic_xor:
1891 op = "xor";
1892 break;
1893 case nir_intrinsic_ssbo_atomic_exchange:
1894 op = "swap";
1895 break;
1896 case nir_intrinsic_ssbo_atomic_comp_swap:
1897 op = "cmpswap";
1898 break;
1899 default:
1900 abort();
1901 }
1902
1903 descriptor = ctx->abi->load_ssbo(ctx->abi,
1904 rsrc_base,
1905 true);
1906
1907 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1908 return_type == ctx->ac.i64) {
1909 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1910 get_src(ctx, instr->src[1]),
1911 get_src(ctx, instr->src[2]),
1912 get_src(ctx, instr->src[3]));
1913 } else {
1914 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1915 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1916 }
1917 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1918 params[arg_count++] = descriptor;
1919
1920 if (LLVM_VERSION_MAJOR >= 9) {
1921 /* XXX: The new raw/struct atomic intrinsics are buggy with
1922 * LLVM 8, see r358579.
1923 */
1924 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1925 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1926 params[arg_count++] = ctx->ac.i32_0; /* slc */
1927
1928 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1929 snprintf(name, sizeof(name),
1930 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1931 } else {
1932 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1933 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1934 params[arg_count++] = ctx->ac.i1false; /* slc */
1935
1936 assert(return_type == ctx->ac.i32);
1937 snprintf(name, sizeof(name),
1938 "llvm.amdgcn.buffer.atomic.%s", op);
1939 }
1940
1941 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1942 arg_count, 0);
1943 }
1944
1945 result = exit_waterfall(ctx, &wctx, result);
1946 if (ctx->ac.postponed_kill)
1947 ac_build_endif(&ctx->ac, 7001);
1948 return result;
1949 }
1950
1951 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1952 nir_intrinsic_instr *instr)
1953 {
1954 struct waterfall_context wctx;
1955 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1956
1957 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1958 int num_components = instr->num_components;
1959 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1960 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1961
1962 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1963 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1964 LLVMValueRef vindex = ctx->ac.i32_0;
1965
1966 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1967 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1968
1969 LLVMValueRef results[4];
1970 for (int i = 0; i < num_components;) {
1971 int num_elems = num_components - i;
1972 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1973 num_elems = 1;
1974 if (num_elems * elem_size_bytes > 16)
1975 num_elems = 16 / elem_size_bytes;
1976 int load_bytes = num_elems * elem_size_bytes;
1977
1978 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1979
1980 LLVMValueRef ret;
1981
1982 if (load_bytes == 1) {
1983 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1984 rsrc,
1985 offset,
1986 ctx->ac.i32_0,
1987 immoffset,
1988 cache_policy);
1989 } else if (load_bytes == 2) {
1990 ret = ac_build_tbuffer_load_short(&ctx->ac,
1991 rsrc,
1992 offset,
1993 ctx->ac.i32_0,
1994 immoffset,
1995 cache_policy);
1996 } else {
1997 int num_channels = util_next_power_of_two(load_bytes) / 4;
1998 bool can_speculate = access & ACCESS_CAN_REORDER;
1999
2000 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2001 vindex, offset, immoffset, 0,
2002 cache_policy, can_speculate, false);
2003 }
2004
2005 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2006 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2007 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2008
2009 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2010 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2011
2012 for (unsigned j = 0; j < num_elems; j++) {
2013 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2014 }
2015 i += num_elems;
2016 }
2017
2018 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2019 return exit_waterfall(ctx, &wctx, ret);
2020 }
2021
2022 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2023 struct waterfall_context *wctx,
2024 const nir_intrinsic_instr *instr)
2025 {
2026 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2027 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2028 }
2029
2030 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2031 nir_intrinsic_instr *instr)
2032 {
2033 struct waterfall_context wctx;
2034 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2035
2036 LLVMValueRef ret;
2037 LLVMValueRef rsrc = rsrc_base;
2038 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2039 int num_components = instr->num_components;
2040
2041 if (ctx->abi->load_ubo)
2042 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2043
2044 if (instr->dest.ssa.bit_size == 64)
2045 num_components *= 2;
2046
2047 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2048 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2049 LLVMValueRef results[num_components];
2050 for (unsigned i = 0; i < num_components; ++i) {
2051 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2052 load_bytes * i, 0);
2053
2054 if (load_bytes == 1) {
2055 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2056 rsrc,
2057 offset,
2058 ctx->ac.i32_0,
2059 immoffset,
2060 0);
2061 } else {
2062 assert(load_bytes == 2);
2063 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2064 rsrc,
2065 offset,
2066 ctx->ac.i32_0,
2067 immoffset,
2068 0);
2069 }
2070 }
2071 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2072 } else {
2073 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2074 NULL, 0, 0, true, true);
2075
2076 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2077 }
2078
2079 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2080 get_def_type(ctx, &instr->dest.ssa), "");
2081
2082 return exit_waterfall(ctx, &wctx, ret);
2083 }
2084
2085 static void
2086 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2087 bool vs_in, unsigned *vertex_index_out,
2088 LLVMValueRef *vertex_index_ref,
2089 unsigned *const_out, LLVMValueRef *indir_out)
2090 {
2091 nir_variable *var = nir_deref_instr_get_variable(instr);
2092 nir_deref_path path;
2093 unsigned idx_lvl = 1;
2094
2095 nir_deref_path_init(&path, instr, NULL);
2096
2097 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2098 if (vertex_index_ref) {
2099 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2100 if (vertex_index_out)
2101 *vertex_index_out = 0;
2102 } else {
2103 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2104 }
2105 ++idx_lvl;
2106 }
2107
2108 uint32_t const_offset = 0;
2109 LLVMValueRef offset = NULL;
2110
2111 if (var->data.compact) {
2112 assert(instr->deref_type == nir_deref_type_array);
2113 const_offset = nir_src_as_uint(instr->arr.index);
2114 goto out;
2115 }
2116
2117 for (; path.path[idx_lvl]; ++idx_lvl) {
2118 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2119 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2120 unsigned index = path.path[idx_lvl]->strct.index;
2121
2122 for (unsigned i = 0; i < index; i++) {
2123 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2124 const_offset += glsl_count_attribute_slots(ft, vs_in);
2125 }
2126 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2127 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2128 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2129 const_offset += size *
2130 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2131 } else {
2132 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2133 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2134 if (offset)
2135 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2136 else
2137 offset = array_off;
2138 }
2139 } else
2140 unreachable("Uhandled deref type in get_deref_instr_offset");
2141 }
2142
2143 out:
2144 nir_deref_path_finish(&path);
2145
2146 if (const_offset && offset)
2147 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2148 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2149 "");
2150
2151 *const_out = const_offset;
2152 *indir_out = offset;
2153 }
2154
2155 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2156 nir_intrinsic_instr *instr,
2157 bool load_inputs)
2158 {
2159 LLVMValueRef result;
2160 LLVMValueRef vertex_index = NULL;
2161 LLVMValueRef indir_index = NULL;
2162 unsigned const_index = 0;
2163
2164 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2165
2166 unsigned location = var->data.location;
2167 unsigned driver_location = var->data.driver_location;
2168 const bool is_patch = var->data.patch ||
2169 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2170 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2171 const bool is_compact = var->data.compact;
2172
2173 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2174 false, NULL, is_patch ? NULL : &vertex_index,
2175 &const_index, &indir_index);
2176
2177 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2178
2179 LLVMTypeRef src_component_type;
2180 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2181 src_component_type = LLVMGetElementType(dest_type);
2182 else
2183 src_component_type = dest_type;
2184
2185 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2186 vertex_index, indir_index,
2187 const_index, location, driver_location,
2188 var->data.location_frac,
2189 instr->num_components,
2190 is_patch, is_compact, load_inputs);
2191 if (instr->dest.ssa.bit_size == 16) {
2192 result = ac_to_integer(&ctx->ac, result);
2193 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2194 }
2195 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2196 }
2197
2198 static unsigned
2199 type_scalar_size_bytes(const struct glsl_type *type)
2200 {
2201 assert(glsl_type_is_vector_or_scalar(type) ||
2202 glsl_type_is_matrix(type));
2203 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2204 }
2205
2206 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2207 nir_intrinsic_instr *instr)
2208 {
2209 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2210 nir_variable *var = nir_deref_instr_get_variable(deref);
2211
2212 LLVMValueRef values[8];
2213 int idx = 0;
2214 int ve = instr->dest.ssa.num_components;
2215 unsigned comp = 0;
2216 LLVMValueRef indir_index;
2217 LLVMValueRef ret;
2218 unsigned const_index;
2219 unsigned stride = 4;
2220 int mode = deref->mode;
2221
2222 if (var) {
2223 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2224 var->data.mode == nir_var_shader_in;
2225 idx = var->data.driver_location;
2226 comp = var->data.location_frac;
2227 mode = var->data.mode;
2228
2229 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2230 &const_index, &indir_index);
2231
2232 if (var->data.compact) {
2233 stride = 1;
2234 const_index += comp;
2235 comp = 0;
2236 }
2237 }
2238
2239 if (instr->dest.ssa.bit_size == 64 &&
2240 (deref->mode == nir_var_shader_in ||
2241 deref->mode == nir_var_shader_out ||
2242 deref->mode == nir_var_function_temp))
2243 ve *= 2;
2244
2245 switch (mode) {
2246 case nir_var_shader_in:
2247 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2248 ctx->stage == MESA_SHADER_TESS_EVAL) {
2249 return load_tess_varyings(ctx, instr, true);
2250 }
2251
2252 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2253 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2254 LLVMValueRef indir_index;
2255 unsigned const_index, vertex_index;
2256 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2257 &const_index, &indir_index);
2258 assert(indir_index == NULL);
2259
2260 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2261 var->data.driver_location,
2262 var->data.location_frac,
2263 instr->num_components, vertex_index, const_index, type);
2264 }
2265
2266 for (unsigned chan = comp; chan < ve + comp; chan++) {
2267 if (indir_index) {
2268 unsigned count = glsl_count_attribute_slots(
2269 var->type,
2270 ctx->stage == MESA_SHADER_VERTEX);
2271 count -= chan / 4;
2272 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2273 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2274 stride, false, true);
2275
2276 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2277 tmp_vec,
2278 indir_index, "");
2279 } else
2280 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2281 }
2282 break;
2283 case nir_var_function_temp:
2284 for (unsigned chan = 0; chan < ve; chan++) {
2285 if (indir_index) {
2286 unsigned count = glsl_count_attribute_slots(
2287 var->type, false);
2288 count -= chan / 4;
2289 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2290 &ctx->ac, ctx->locals + idx + chan, count,
2291 stride, true, true);
2292
2293 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2294 tmp_vec,
2295 indir_index, "");
2296 } else {
2297 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2298 }
2299 }
2300 break;
2301 case nir_var_shader_out:
2302 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2303 return load_tess_varyings(ctx, instr, false);
2304 }
2305
2306 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2307 var->data.fb_fetch_output &&
2308 ctx->abi->emit_fbfetch)
2309 return ctx->abi->emit_fbfetch(ctx->abi);
2310
2311 for (unsigned chan = comp; chan < ve + comp; chan++) {
2312 if (indir_index) {
2313 unsigned count = glsl_count_attribute_slots(
2314 var->type, false);
2315 count -= chan / 4;
2316 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2317 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2318 stride, true, true);
2319
2320 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2321 tmp_vec,
2322 indir_index, "");
2323 } else {
2324 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2325 ctx->abi->outputs[idx + chan + const_index * stride],
2326 "");
2327 }
2328 }
2329 break;
2330 case nir_var_mem_global: {
2331 LLVMValueRef address = get_src(ctx, instr->src[0]);
2332 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2333 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2334 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2335
2336 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2337 if (stride != natural_stride) {
2338 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2339 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2340 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2341
2342 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2343 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2344 values[i] = LLVMBuildLoad(ctx->ac.builder,
2345 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2346 }
2347 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2348 } else {
2349 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2350 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2351 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2352 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2353 return val;
2354 }
2355 }
2356 default:
2357 unreachable("unhandle variable mode");
2358 }
2359 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2360 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2361 }
2362
2363 static void
2364 visit_store_var(struct ac_nir_context *ctx,
2365 nir_intrinsic_instr *instr)
2366 {
2367 if (ctx->ac.postponed_kill) {
2368 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2369 ctx->ac.postponed_kill, "");
2370 ac_build_ifcc(&ctx->ac, cond, 7002);
2371 }
2372
2373 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2374 nir_variable *var = nir_deref_instr_get_variable(deref);
2375
2376 LLVMValueRef temp_ptr, value;
2377 int idx = 0;
2378 unsigned comp = 0;
2379 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2380 int writemask = instr->const_index[0];
2381 LLVMValueRef indir_index;
2382 unsigned const_index;
2383
2384 if (var) {
2385 get_deref_offset(ctx, deref, false,
2386 NULL, NULL, &const_index, &indir_index);
2387 idx = var->data.driver_location;
2388 comp = var->data.location_frac;
2389
2390 if (var->data.compact) {
2391 const_index += comp;
2392 comp = 0;
2393 }
2394 }
2395
2396 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2397 (deref->mode == nir_var_shader_out ||
2398 deref->mode == nir_var_function_temp)) {
2399
2400 src = LLVMBuildBitCast(ctx->ac.builder, src,
2401 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2402 "");
2403
2404 writemask = widen_mask(writemask, 2);
2405 }
2406
2407 writemask = writemask << comp;
2408
2409 switch (deref->mode) {
2410 case nir_var_shader_out:
2411
2412 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2413 LLVMValueRef vertex_index = NULL;
2414 LLVMValueRef indir_index = NULL;
2415 unsigned const_index = 0;
2416 const bool is_patch = var->data.patch ||
2417 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2418 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2419
2420 get_deref_offset(ctx, deref, false, NULL,
2421 is_patch ? NULL : &vertex_index,
2422 &const_index, &indir_index);
2423
2424 ctx->abi->store_tcs_outputs(ctx->abi, var,
2425 vertex_index, indir_index,
2426 const_index, src, writemask);
2427 break;
2428 }
2429
2430 for (unsigned chan = 0; chan < 8; chan++) {
2431 int stride = 4;
2432 if (!(writemask & (1 << chan)))
2433 continue;
2434
2435 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2436
2437 if (var->data.compact)
2438 stride = 1;
2439 if (indir_index) {
2440 unsigned count = glsl_count_attribute_slots(
2441 var->type, false);
2442 count -= chan / 4;
2443 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2444 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2445 stride, true, true);
2446
2447 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2448 value, indir_index, "");
2449 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2450 count, stride, tmp_vec);
2451
2452 } else {
2453 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2454
2455 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2456 }
2457 }
2458 break;
2459 case nir_var_function_temp:
2460 for (unsigned chan = 0; chan < 8; chan++) {
2461 if (!(writemask & (1 << chan)))
2462 continue;
2463
2464 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2465 if (indir_index) {
2466 unsigned count = glsl_count_attribute_slots(
2467 var->type, false);
2468 count -= chan / 4;
2469 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2470 &ctx->ac, ctx->locals + idx + chan, count,
2471 4, true, true);
2472
2473 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2474 value, indir_index, "");
2475 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2476 count, 4, tmp_vec);
2477 } else {
2478 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2479
2480 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2481 }
2482 }
2483 break;
2484
2485 case nir_var_mem_global: {
2486 int writemask = instr->const_index[0];
2487 LLVMValueRef address = get_src(ctx, instr->src[0]);
2488 LLVMValueRef val = get_src(ctx, instr->src[1]);
2489
2490 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2491 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2492 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2493
2494 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2495 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2496 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2497
2498 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2499 stride == natural_stride) {
2500 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2501 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2502 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2503
2504 val = LLVMBuildBitCast(ctx->ac.builder, val,
2505 LLVMGetElementType(LLVMTypeOf(address)), "");
2506 LLVMBuildStore(ctx->ac.builder, val, address);
2507 } else {
2508 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2509 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2510 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2511 for (unsigned chan = 0; chan < 4; chan++) {
2512 if (!(writemask & (1 << chan)))
2513 continue;
2514
2515 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2516
2517 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2518 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2519 chan);
2520 src = LLVMBuildBitCast(ctx->ac.builder, src,
2521 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2522 LLVMBuildStore(ctx->ac.builder, src, ptr);
2523 }
2524 }
2525 break;
2526 }
2527 default:
2528 abort();
2529 break;
2530 }
2531
2532 if (ctx->ac.postponed_kill)
2533 ac_build_endif(&ctx->ac, 7002);
2534 }
2535
2536 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2537 {
2538 switch (dim) {
2539 case GLSL_SAMPLER_DIM_BUF:
2540 return 1;
2541 case GLSL_SAMPLER_DIM_1D:
2542 return array ? 2 : 1;
2543 case GLSL_SAMPLER_DIM_2D:
2544 return array ? 3 : 2;
2545 case GLSL_SAMPLER_DIM_MS:
2546 return array ? 4 : 3;
2547 case GLSL_SAMPLER_DIM_3D:
2548 case GLSL_SAMPLER_DIM_CUBE:
2549 return 3;
2550 case GLSL_SAMPLER_DIM_RECT:
2551 case GLSL_SAMPLER_DIM_SUBPASS:
2552 return 2;
2553 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2554 return 3;
2555 default:
2556 break;
2557 }
2558 return 0;
2559 }
2560
2561 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2562 LLVMValueRef coord_x, LLVMValueRef coord_y,
2563 LLVMValueRef coord_z,
2564 LLVMValueRef sample_index,
2565 LLVMValueRef fmask_desc_ptr)
2566 {
2567 unsigned sample_chan = coord_z ? 3 : 2;
2568 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2569 addr[sample_chan] = sample_index;
2570
2571 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2572 return addr[sample_chan];
2573 }
2574
2575 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2576 {
2577 assert(instr->src[0].is_ssa);
2578 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2579 }
2580
2581 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2582 const nir_intrinsic_instr *instr,
2583 LLVMValueRef dynamic_index,
2584 enum ac_descriptor_type desc_type,
2585 bool write)
2586 {
2587 nir_deref_instr *deref_instr =
2588 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2589 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2590
2591 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2592 }
2593
2594 static void get_image_coords(struct ac_nir_context *ctx,
2595 const nir_intrinsic_instr *instr,
2596 LLVMValueRef dynamic_desc_index,
2597 struct ac_image_args *args,
2598 enum glsl_sampler_dim dim,
2599 bool is_array)
2600 {
2601 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2602 LLVMValueRef masks[] = {
2603 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2604 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2605 };
2606 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2607
2608 int count;
2609 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2610 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2611 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2612 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2613 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2614 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2615 count = image_type_to_components_count(dim, is_array);
2616
2617 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2618 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2619 LLVMValueRef fmask_load_address[3];
2620
2621 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2622 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2623 if (is_array)
2624 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2625 else
2626 fmask_load_address[2] = NULL;
2627
2628 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2629 fmask_load_address[0],
2630 fmask_load_address[1],
2631 fmask_load_address[2],
2632 sample_index,
2633 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2634 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2635 }
2636 if (count == 1 && !gfx9_1d) {
2637 if (instr->src[1].ssa->num_components)
2638 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2639 else
2640 args->coords[0] = src0;
2641 } else {
2642 int chan;
2643 if (is_ms)
2644 count--;
2645 for (chan = 0; chan < count; ++chan) {
2646 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2647 }
2648
2649 if (gfx9_1d) {
2650 if (is_array) {
2651 args->coords[2] = args->coords[1];
2652 args->coords[1] = ctx->ac.i32_0;
2653 } else
2654 args->coords[1] = ctx->ac.i32_0;
2655 count++;
2656 }
2657 if (ctx->ac.chip_class == GFX9 &&
2658 dim == GLSL_SAMPLER_DIM_2D &&
2659 !is_array) {
2660 /* The hw can't bind a slice of a 3D image as a 2D
2661 * image, because it ignores BASE_ARRAY if the target
2662 * is 3D. The workaround is to read BASE_ARRAY and set
2663 * it as the 3rd address operand for all 2D images.
2664 */
2665 LLVMValueRef first_layer, const5, mask;
2666
2667 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2668 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2669 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2670 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2671
2672 args->coords[count] = first_layer;
2673 count++;
2674 }
2675
2676
2677 if (is_ms) {
2678 args->coords[count] = sample_index;
2679 count++;
2680 }
2681 }
2682 }
2683
2684 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2685 const nir_intrinsic_instr *instr,
2686 LLVMValueRef dynamic_index,
2687 bool write, bool atomic)
2688 {
2689 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2690 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2691 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2692 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2693 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2694
2695 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2696 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2697 elem_count, stride, "");
2698
2699 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2700 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2701 }
2702 return rsrc;
2703 }
2704
2705 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2706 struct waterfall_context *wctx,
2707 const nir_intrinsic_instr *instr)
2708 {
2709 nir_deref_instr *deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2710 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2711 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2712 }
2713
2714 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2715 const nir_intrinsic_instr *instr,
2716 bool bindless)
2717 {
2718 LLVMValueRef res;
2719
2720 enum glsl_sampler_dim dim;
2721 enum gl_access_qualifier access;
2722 bool is_array;
2723 if (bindless) {
2724 dim = nir_intrinsic_image_dim(instr);
2725 access = nir_intrinsic_access(instr);
2726 is_array = nir_intrinsic_image_array(instr);
2727 } else {
2728 const nir_deref_instr *image_deref = get_image_deref(instr);
2729 const struct glsl_type *type = image_deref->type;
2730 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2731 dim = glsl_get_sampler_dim(type);
2732 access = var->data.access;
2733 is_array = glsl_sampler_type_is_array(type);
2734 }
2735
2736 struct waterfall_context wctx;
2737 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2738
2739 struct ac_image_args args = {};
2740
2741 args.cache_policy = get_cache_policy(ctx, access, false, false);
2742
2743 if (dim == GLSL_SAMPLER_DIM_BUF) {
2744 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2745 unsigned num_channels = util_last_bit(mask);
2746 LLVMValueRef rsrc, vindex;
2747
2748 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2749 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2750 ctx->ac.i32_0, "");
2751
2752 bool can_speculate = access & ACCESS_CAN_REORDER;
2753 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2754 ctx->ac.i32_0, num_channels,
2755 args.cache_policy,
2756 can_speculate);
2757 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2758
2759 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2760 res = ac_to_integer(&ctx->ac, res);
2761 } else {
2762 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2763
2764 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2765 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2766 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2767 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2768 if (!level_zero)
2769 args.lod = get_src(ctx, instr->src[3]);
2770 args.dmask = 15;
2771 args.attributes = AC_FUNC_ATTR_READONLY;
2772
2773 res = ac_build_image_opcode(&ctx->ac, &args);
2774 }
2775 return exit_waterfall(ctx, &wctx, res);
2776 }
2777
2778 static void visit_image_store(struct ac_nir_context *ctx,
2779 const nir_intrinsic_instr *instr,
2780 bool bindless)
2781 {
2782 if (ctx->ac.postponed_kill) {
2783 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2784 ctx->ac.postponed_kill, "");
2785 ac_build_ifcc(&ctx->ac, cond, 7003);
2786 }
2787
2788 enum glsl_sampler_dim dim;
2789 enum gl_access_qualifier access;
2790 bool is_array;
2791
2792 if (bindless) {
2793 dim = nir_intrinsic_image_dim(instr);
2794 access = nir_intrinsic_access(instr);
2795 is_array = nir_intrinsic_image_array(instr);
2796 } else {
2797 const nir_deref_instr *image_deref = get_image_deref(instr);
2798 const struct glsl_type *type = image_deref->type;
2799 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2800 dim = glsl_get_sampler_dim(type);
2801 access = var->data.access;
2802 is_array = glsl_sampler_type_is_array(type);
2803 }
2804
2805 struct waterfall_context wctx;
2806 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2807
2808 bool writeonly_memory = access & ACCESS_NON_READABLE;
2809 struct ac_image_args args = {};
2810
2811 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2812
2813 if (dim == GLSL_SAMPLER_DIM_BUF) {
2814 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2815 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2816 unsigned src_channels = ac_get_llvm_num_components(src);
2817 LLVMValueRef vindex;
2818
2819 if (src_channels == 3)
2820 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2821
2822 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2823 get_src(ctx, instr->src[1]),
2824 ctx->ac.i32_0, "");
2825
2826 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2827 ctx->ac.i32_0, src_channels,
2828 args.cache_policy);
2829 } else {
2830 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2831
2832 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2833 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2834 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2835 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2836 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2837 if (!level_zero)
2838 args.lod = get_src(ctx, instr->src[4]);
2839 args.dmask = 15;
2840
2841 ac_build_image_opcode(&ctx->ac, &args);
2842 }
2843
2844 exit_waterfall(ctx, &wctx, NULL);
2845 if (ctx->ac.postponed_kill)
2846 ac_build_endif(&ctx->ac, 7003);
2847 }
2848
2849 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2850 const nir_intrinsic_instr *instr,
2851 bool bindless)
2852 {
2853 if (ctx->ac.postponed_kill) {
2854 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2855 ctx->ac.postponed_kill, "");
2856 ac_build_ifcc(&ctx->ac, cond, 7004);
2857 }
2858
2859 LLVMValueRef params[7];
2860 int param_count = 0;
2861
2862 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2863 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2864 const char *atomic_name;
2865 char intrinsic_name[64];
2866 enum ac_atomic_op atomic_subop;
2867 ASSERTED int length;
2868
2869 enum glsl_sampler_dim dim;
2870 bool is_array;
2871 if (bindless) {
2872 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2873 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2874 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2875 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2876 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2877 assert(format == GL_R32UI || format == GL_R32I);
2878 }
2879 dim = nir_intrinsic_image_dim(instr);
2880 is_array = nir_intrinsic_image_array(instr);
2881 } else {
2882 const struct glsl_type *type = get_image_deref(instr)->type;
2883 dim = glsl_get_sampler_dim(type);
2884 is_array = glsl_sampler_type_is_array(type);
2885 }
2886
2887 struct waterfall_context wctx;
2888 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2889
2890 switch (instr->intrinsic) {
2891 case nir_intrinsic_bindless_image_atomic_add:
2892 case nir_intrinsic_image_deref_atomic_add:
2893 atomic_name = "add";
2894 atomic_subop = ac_atomic_add;
2895 break;
2896 case nir_intrinsic_bindless_image_atomic_imin:
2897 case nir_intrinsic_image_deref_atomic_imin:
2898 atomic_name = "smin";
2899 atomic_subop = ac_atomic_smin;
2900 break;
2901 case nir_intrinsic_bindless_image_atomic_umin:
2902 case nir_intrinsic_image_deref_atomic_umin:
2903 atomic_name = "umin";
2904 atomic_subop = ac_atomic_umin;
2905 break;
2906 case nir_intrinsic_bindless_image_atomic_imax:
2907 case nir_intrinsic_image_deref_atomic_imax:
2908 atomic_name = "smax";
2909 atomic_subop = ac_atomic_smax;
2910 break;
2911 case nir_intrinsic_bindless_image_atomic_umax:
2912 case nir_intrinsic_image_deref_atomic_umax:
2913 atomic_name = "umax";
2914 atomic_subop = ac_atomic_umax;
2915 break;
2916 case nir_intrinsic_bindless_image_atomic_and:
2917 case nir_intrinsic_image_deref_atomic_and:
2918 atomic_name = "and";
2919 atomic_subop = ac_atomic_and;
2920 break;
2921 case nir_intrinsic_bindless_image_atomic_or:
2922 case nir_intrinsic_image_deref_atomic_or:
2923 atomic_name = "or";
2924 atomic_subop = ac_atomic_or;
2925 break;
2926 case nir_intrinsic_bindless_image_atomic_xor:
2927 case nir_intrinsic_image_deref_atomic_xor:
2928 atomic_name = "xor";
2929 atomic_subop = ac_atomic_xor;
2930 break;
2931 case nir_intrinsic_bindless_image_atomic_exchange:
2932 case nir_intrinsic_image_deref_atomic_exchange:
2933 atomic_name = "swap";
2934 atomic_subop = ac_atomic_swap;
2935 break;
2936 case nir_intrinsic_bindless_image_atomic_comp_swap:
2937 case nir_intrinsic_image_deref_atomic_comp_swap:
2938 atomic_name = "cmpswap";
2939 atomic_subop = 0; /* not used */
2940 break;
2941 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2942 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2943 atomic_name = "inc";
2944 atomic_subop = ac_atomic_inc_wrap;
2945 /* ATOMIC_INC instruction does:
2946 * value = (value + 1) % (data + 1)
2947 * but we want:
2948 * value = (value + 1) % data
2949 * So replace 'data' by 'data - 1'.
2950 */
2951 ctx->ssa_defs[instr->src[3].ssa->index] =
2952 LLVMBuildSub(ctx->ac.builder,
2953 ctx->ssa_defs[instr->src[3].ssa->index],
2954 ctx->ac.i32_1, "");
2955 break;
2956 }
2957 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2958 case nir_intrinsic_image_deref_atomic_dec_wrap:
2959 atomic_name = "dec";
2960 atomic_subop = ac_atomic_dec_wrap;
2961 break;
2962 default:
2963 abort();
2964 }
2965
2966 if (cmpswap)
2967 params[param_count++] = get_src(ctx, instr->src[4]);
2968 params[param_count++] = get_src(ctx, instr->src[3]);
2969
2970 LLVMValueRef result;
2971 if (dim == GLSL_SAMPLER_DIM_BUF) {
2972 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
2973 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2974 ctx->ac.i32_0, ""); /* vindex */
2975 params[param_count++] = ctx->ac.i32_0; /* voffset */
2976 if (LLVM_VERSION_MAJOR >= 9) {
2977 /* XXX: The new raw/struct atomic intrinsics are buggy
2978 * with LLVM 8, see r358579.
2979 */
2980 params[param_count++] = ctx->ac.i32_0; /* soffset */
2981 params[param_count++] = ctx->ac.i32_0; /* slc */
2982
2983 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2984 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2985 } else {
2986 params[param_count++] = ctx->ac.i1false; /* slc */
2987
2988 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2989 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2990 }
2991
2992 assert(length < sizeof(intrinsic_name));
2993 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2994 params, param_count, 0);
2995 } else {
2996 struct ac_image_args args = {};
2997 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2998 args.atomic = atomic_subop;
2999 args.data[0] = params[0];
3000 if (cmpswap)
3001 args.data[1] = params[1];
3002 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3003 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3004 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3005
3006 result = ac_build_image_opcode(&ctx->ac, &args);
3007 }
3008
3009 result = exit_waterfall(ctx, &wctx, result);
3010 if (ctx->ac.postponed_kill)
3011 ac_build_endif(&ctx->ac, 7004);
3012 return result;
3013 }
3014
3015 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3016 nir_intrinsic_instr *instr)
3017 {
3018 struct waterfall_context wctx;
3019 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3020 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3021
3022 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3023
3024 return exit_waterfall(ctx, &wctx, ret);
3025 }
3026
3027 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3028 const nir_intrinsic_instr *instr,
3029 bool bindless)
3030 {
3031 LLVMValueRef res;
3032
3033 enum glsl_sampler_dim dim;
3034 bool is_array;
3035 if (bindless) {
3036 dim = nir_intrinsic_image_dim(instr);
3037 is_array = nir_intrinsic_image_array(instr);
3038 } else {
3039 const struct glsl_type *type = get_image_deref(instr)->type;
3040 dim = glsl_get_sampler_dim(type);
3041 is_array = glsl_sampler_type_is_array(type);
3042 }
3043
3044 struct waterfall_context wctx;
3045 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3046
3047 if (dim == GLSL_SAMPLER_DIM_BUF) {
3048 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3049 } else {
3050
3051 struct ac_image_args args = { 0 };
3052
3053 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3054 args.dmask = 0xf;
3055 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3056 args.opcode = ac_image_get_resinfo;
3057 args.lod = ctx->ac.i32_0;
3058 args.attributes = AC_FUNC_ATTR_READNONE;
3059
3060 res = ac_build_image_opcode(&ctx->ac, &args);
3061
3062 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3063
3064 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3065 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3066 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3067 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3068 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3069 }
3070
3071 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3072 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3073 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3074 ctx->ac.i32_1, "");
3075 }
3076 }
3077 return exit_waterfall(ctx, &wctx, res);
3078 }
3079
3080 static void emit_membar(struct ac_llvm_context *ac,
3081 const nir_intrinsic_instr *instr)
3082 {
3083 unsigned wait_flags = 0;
3084
3085 switch (instr->intrinsic) {
3086 case nir_intrinsic_memory_barrier:
3087 case nir_intrinsic_group_memory_barrier:
3088 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3089 break;
3090 case nir_intrinsic_memory_barrier_buffer:
3091 case nir_intrinsic_memory_barrier_image:
3092 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3093 break;
3094 case nir_intrinsic_memory_barrier_shared:
3095 wait_flags = AC_WAIT_LGKM;
3096 break;
3097 default:
3098 break;
3099 }
3100
3101 ac_build_waitcnt(ac, wait_flags);
3102 }
3103
3104 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3105 {
3106 /* GFX6 only (thanks to a hw bug workaround):
3107 * The real barrier instruction isn’t needed, because an entire patch
3108 * always fits into a single wave.
3109 */
3110 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3111 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3112 return;
3113 }
3114 ac_build_s_barrier(ac);
3115 }
3116
3117 static void emit_discard(struct ac_nir_context *ctx,
3118 const nir_intrinsic_instr *instr)
3119 {
3120 LLVMValueRef cond;
3121
3122 if (instr->intrinsic == nir_intrinsic_discard_if) {
3123 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3124 get_src(ctx, instr->src[0]),
3125 ctx->ac.i32_0, "");
3126 } else {
3127 assert(instr->intrinsic == nir_intrinsic_discard);
3128 cond = ctx->ac.i1false;
3129 }
3130
3131 ac_build_kill_if_false(&ctx->ac, cond);
3132 }
3133
3134 static void emit_demote(struct ac_nir_context *ctx,
3135 const nir_intrinsic_instr *instr)
3136 {
3137 LLVMValueRef cond;
3138
3139 if (instr->intrinsic == nir_intrinsic_demote_if) {
3140 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3141 get_src(ctx, instr->src[0]),
3142 ctx->ac.i32_0, "");
3143 } else {
3144 assert(instr->intrinsic == nir_intrinsic_demote);
3145 cond = ctx->ac.i1false;
3146 }
3147
3148 /* Kill immediately while maintaining WQM. */
3149 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3150
3151 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3152 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3153 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3154 return;
3155 }
3156
3157 static LLVMValueRef
3158 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3159 {
3160 LLVMValueRef result;
3161 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3162 result = LLVMBuildAnd(ctx->ac.builder,
3163 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3164 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3165
3166 if (ctx->ac.wave_size == 32)
3167 result = LLVMBuildLShr(ctx->ac.builder, result,
3168 LLVMConstInt(ctx->ac.i32, 1, false), "");
3169
3170 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3171 }
3172
3173 static LLVMValueRef
3174 visit_load_subgroup_id(struct ac_nir_context *ctx)
3175 {
3176 if (ctx->stage == MESA_SHADER_COMPUTE) {
3177 LLVMValueRef result;
3178 result = LLVMBuildAnd(ctx->ac.builder,
3179 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3180 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3181 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3182 } else {
3183 return LLVMConstInt(ctx->ac.i32, 0, false);
3184 }
3185 }
3186
3187 static LLVMValueRef
3188 visit_load_num_subgroups(struct ac_nir_context *ctx)
3189 {
3190 if (ctx->stage == MESA_SHADER_COMPUTE) {
3191 return LLVMBuildAnd(ctx->ac.builder,
3192 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3193 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3194 } else {
3195 return LLVMConstInt(ctx->ac.i32, 1, false);
3196 }
3197 }
3198
3199 static LLVMValueRef
3200 visit_first_invocation(struct ac_nir_context *ctx)
3201 {
3202 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3203 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3204
3205 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3206 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3207 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3208 ctx->ac.iN_wavemask, args, 2,
3209 AC_FUNC_ATTR_NOUNWIND |
3210 AC_FUNC_ATTR_READNONE);
3211
3212 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3213 }
3214
3215 static LLVMValueRef
3216 visit_load_shared(struct ac_nir_context *ctx,
3217 const nir_intrinsic_instr *instr)
3218 {
3219 LLVMValueRef values[4], derived_ptr, index, ret;
3220
3221 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3222 instr->dest.ssa.bit_size);
3223
3224 for (int chan = 0; chan < instr->num_components; chan++) {
3225 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3226 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3227 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3228 }
3229
3230 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3231 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3232 }
3233
3234 static void
3235 visit_store_shared(struct ac_nir_context *ctx,
3236 const nir_intrinsic_instr *instr)
3237 {
3238 LLVMValueRef derived_ptr, data,index;
3239 LLVMBuilderRef builder = ctx->ac.builder;
3240
3241 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3242 instr->src[0].ssa->bit_size);
3243 LLVMValueRef src = get_src(ctx, instr->src[0]);
3244
3245 int writemask = nir_intrinsic_write_mask(instr);
3246 for (int chan = 0; chan < 4; chan++) {
3247 if (!(writemask & (1 << chan))) {
3248 continue;
3249 }
3250 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3251 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3252 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3253 LLVMBuildStore(builder, data, derived_ptr);
3254 }
3255 }
3256
3257 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3258 const nir_intrinsic_instr *instr,
3259 LLVMValueRef ptr, int src_idx)
3260 {
3261 if (ctx->ac.postponed_kill) {
3262 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3263 ctx->ac.postponed_kill, "");
3264 ac_build_ifcc(&ctx->ac, cond, 7005);
3265 }
3266
3267 LLVMValueRef result;
3268 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3269
3270 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3271
3272 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3273 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3274 if (deref->mode == nir_var_mem_global) {
3275 /* use "singlethread" sync scope to implement relaxed ordering */
3276 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3277
3278 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3279 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3280 }
3281 }
3282
3283 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3284 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3285 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3286 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3287 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3288 } else {
3289 LLVMAtomicRMWBinOp op;
3290 switch (instr->intrinsic) {
3291 case nir_intrinsic_shared_atomic_add:
3292 case nir_intrinsic_deref_atomic_add:
3293 op = LLVMAtomicRMWBinOpAdd;
3294 break;
3295 case nir_intrinsic_shared_atomic_umin:
3296 case nir_intrinsic_deref_atomic_umin:
3297 op = LLVMAtomicRMWBinOpUMin;
3298 break;
3299 case nir_intrinsic_shared_atomic_umax:
3300 case nir_intrinsic_deref_atomic_umax:
3301 op = LLVMAtomicRMWBinOpUMax;
3302 break;
3303 case nir_intrinsic_shared_atomic_imin:
3304 case nir_intrinsic_deref_atomic_imin:
3305 op = LLVMAtomicRMWBinOpMin;
3306 break;
3307 case nir_intrinsic_shared_atomic_imax:
3308 case nir_intrinsic_deref_atomic_imax:
3309 op = LLVMAtomicRMWBinOpMax;
3310 break;
3311 case nir_intrinsic_shared_atomic_and:
3312 case nir_intrinsic_deref_atomic_and:
3313 op = LLVMAtomicRMWBinOpAnd;
3314 break;
3315 case nir_intrinsic_shared_atomic_or:
3316 case nir_intrinsic_deref_atomic_or:
3317 op = LLVMAtomicRMWBinOpOr;
3318 break;
3319 case nir_intrinsic_shared_atomic_xor:
3320 case nir_intrinsic_deref_atomic_xor:
3321 op = LLVMAtomicRMWBinOpXor;
3322 break;
3323 case nir_intrinsic_shared_atomic_exchange:
3324 case nir_intrinsic_deref_atomic_exchange:
3325 op = LLVMAtomicRMWBinOpXchg;
3326 break;
3327 default:
3328 return NULL;
3329 }
3330
3331 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3332 }
3333
3334 if (ctx->ac.postponed_kill)
3335 ac_build_endif(&ctx->ac, 7005);
3336 return result;
3337 }
3338
3339 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3340 {
3341 LLVMValueRef values[2];
3342 LLVMValueRef pos[2];
3343
3344 pos[0] = ac_to_float(&ctx->ac,
3345 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3346 pos[1] = ac_to_float(&ctx->ac,
3347 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3348
3349 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3350 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3351 return ac_build_gather_values(&ctx->ac, values, 2);
3352 }
3353
3354 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3355 enum glsl_interp_mode interp, unsigned location)
3356 {
3357 switch (interp) {
3358 case INTERP_MODE_FLAT:
3359 default:
3360 return NULL;
3361 case INTERP_MODE_SMOOTH:
3362 case INTERP_MODE_NONE:
3363 if (location == INTERP_CENTER)
3364 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3365 else if (location == INTERP_CENTROID)
3366 return ctx->abi->persp_centroid;
3367 else if (location == INTERP_SAMPLE)
3368 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3369 break;
3370 case INTERP_MODE_NOPERSPECTIVE:
3371 if (location == INTERP_CENTER)
3372 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3373 else if (location == INTERP_CENTROID)
3374 return ctx->abi->linear_centroid;
3375 else if (location == INTERP_SAMPLE)
3376 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3377 break;
3378 }
3379 return NULL;
3380 }
3381
3382 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3383 unsigned mode)
3384 {
3385 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3386 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3387 }
3388
3389 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3390 unsigned mode,
3391 LLVMValueRef offset)
3392 {
3393 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3394 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3395 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3396
3397 LLVMValueRef ij_out[2];
3398 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3399
3400 /*
3401 * take the I then J parameters, and the DDX/Y for it, and
3402 * calculate the IJ inputs for the interpolator.
3403 * temp1 = ddx * offset/sample.x + I;
3404 * interp_param.I = ddy * offset/sample.y + temp1;
3405 * temp1 = ddx * offset/sample.x + J;
3406 * interp_param.J = ddy * offset/sample.y + temp1;
3407 */
3408 for (unsigned i = 0; i < 2; i++) {
3409 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3410 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3411 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3412 ddxy_out, ix_ll, "");
3413 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3414 ddxy_out, iy_ll, "");
3415 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3416 interp_param, ix_ll, "");
3417 LLVMValueRef temp1, temp2;
3418
3419 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3420 ctx->ac.f32, "");
3421
3422 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3423 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3424
3425 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3426 temp2, ctx->ac.i32, "");
3427 }
3428 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3429 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3430 }
3431
3432 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3433 unsigned mode)
3434 {
3435 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3436 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3437 }
3438
3439 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3440 unsigned mode,
3441 LLVMValueRef sample_id)
3442 {
3443 if (ctx->abi->interp_at_sample_force_center)
3444 return barycentric_center(ctx, mode);
3445
3446 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3447
3448 /* fetch sample ID */
3449 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3450
3451 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3452 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3453 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3454 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3455 LLVMValueRef coords[] = { src_c0, src_c1 };
3456 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3457
3458 return barycentric_offset(ctx, mode, offset);
3459 }
3460
3461
3462 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3463 unsigned mode)
3464 {
3465 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3466 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3467 }
3468
3469 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3470 {
3471 return LLVMBuildBitCast(ctx->ac.builder,
3472 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3473 ctx->ac.v3i32, "");
3474 }
3475
3476 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3477 LLVMValueRef interp_param,
3478 unsigned index, unsigned comp_start,
3479 unsigned num_components,
3480 unsigned bitsize)
3481 {
3482 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3483
3484 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3485 interp_param, ctx->ac.v2f32, "");
3486 LLVMValueRef i = LLVMBuildExtractElement(
3487 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3488 LLVMValueRef j = LLVMBuildExtractElement(
3489 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3490
3491 LLVMValueRef values[4];
3492 assert(bitsize == 16 || bitsize == 32);
3493 for (unsigned comp = 0; comp < num_components; comp++) {
3494 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3495 if (bitsize == 16) {
3496 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3497 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3498 } else {
3499 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3500 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3501 }
3502 }
3503
3504 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3505 }
3506
3507 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3508 nir_intrinsic_instr *instr)
3509 {
3510 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3511
3512 /* We only lower inputs for fragment shaders ATM */
3513 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3514 assert(offset);
3515 assert(offset[0].i32 == 0);
3516
3517 unsigned component = nir_intrinsic_component(instr);
3518 unsigned index = nir_intrinsic_base(instr);
3519 unsigned vertex_id = 2; /* P0 */
3520
3521 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3522 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3523
3524 switch (src0[0].i32) {
3525 case 0:
3526 vertex_id = 2;
3527 break;
3528 case 1:
3529 vertex_id = 0;
3530 break;
3531 case 2:
3532 vertex_id = 1;
3533 break;
3534 default:
3535 unreachable("Invalid vertex index");
3536 }
3537 }
3538
3539 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3540 LLVMValueRef values[8];
3541
3542 /* Each component of a 64-bit value takes up two GL-level channels. */
3543 unsigned num_components = instr->dest.ssa.num_components;
3544 unsigned bit_size = instr->dest.ssa.bit_size;
3545 unsigned channels =
3546 bit_size == 64 ? num_components * 2 : num_components;
3547
3548 for (unsigned chan = 0; chan < channels; chan++) {
3549 if (component + chan > 4)
3550 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3551 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3552 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3553 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3554 llvm_chan,
3555 attr_number,
3556 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3557 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3558 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3559 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3560 }
3561
3562 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3563 if (bit_size == 64) {
3564 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3565 LLVMVectorType(ctx->ac.i64, num_components);
3566 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3567 }
3568 return result;
3569 }
3570
3571 static void visit_intrinsic(struct ac_nir_context *ctx,
3572 nir_intrinsic_instr *instr)
3573 {
3574 LLVMValueRef result = NULL;
3575
3576 switch (instr->intrinsic) {
3577 case nir_intrinsic_ballot:
3578 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3579 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3580 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3581 break;
3582 case nir_intrinsic_read_invocation:
3583 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3584 get_src(ctx, instr->src[1]));
3585 break;
3586 case nir_intrinsic_read_first_invocation:
3587 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3588 break;
3589 case nir_intrinsic_load_subgroup_invocation:
3590 result = ac_get_thread_id(&ctx->ac);
3591 break;
3592 case nir_intrinsic_load_work_group_id: {
3593 LLVMValueRef values[3];
3594
3595 for (int i = 0; i < 3; i++) {
3596 values[i] = ctx->args->workgroup_ids[i].used ?
3597 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3598 }
3599
3600 result = ac_build_gather_values(&ctx->ac, values, 3);
3601 break;
3602 }
3603 case nir_intrinsic_load_base_vertex:
3604 case nir_intrinsic_load_first_vertex:
3605 result = ctx->abi->load_base_vertex(ctx->abi);
3606 break;
3607 case nir_intrinsic_load_local_group_size:
3608 result = ctx->abi->load_local_group_size(ctx->abi);
3609 break;
3610 case nir_intrinsic_load_vertex_id:
3611 result = LLVMBuildAdd(ctx->ac.builder,
3612 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3613 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3614 break;
3615 case nir_intrinsic_load_vertex_id_zero_base: {
3616 result = ctx->abi->vertex_id;
3617 break;
3618 }
3619 case nir_intrinsic_load_local_invocation_id: {
3620 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3621 break;
3622 }
3623 case nir_intrinsic_load_base_instance:
3624 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3625 break;
3626 case nir_intrinsic_load_draw_id:
3627 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3628 break;
3629 case nir_intrinsic_load_view_index:
3630 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3631 break;
3632 case nir_intrinsic_load_invocation_id:
3633 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3634 result = ac_unpack_param(&ctx->ac,
3635 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3636 8, 5);
3637 } else {
3638 if (ctx->ac.chip_class >= GFX10) {
3639 result = LLVMBuildAnd(ctx->ac.builder,
3640 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3641 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3642 } else {
3643 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3644 }
3645 }
3646 break;
3647 case nir_intrinsic_load_primitive_id:
3648 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3649 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3650 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3651 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3652 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3653 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3654 } else
3655 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3656 break;
3657 case nir_intrinsic_load_sample_id:
3658 result = ac_unpack_param(&ctx->ac,
3659 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3660 8, 4);
3661 break;
3662 case nir_intrinsic_load_sample_pos:
3663 result = load_sample_pos(ctx);
3664 break;
3665 case nir_intrinsic_load_sample_mask_in:
3666 result = ctx->abi->load_sample_mask_in(ctx->abi);
3667 break;
3668 case nir_intrinsic_load_frag_coord: {
3669 LLVMValueRef values[4] = {
3670 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3671 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3672 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3673 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3674 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3675 };
3676 result = ac_to_integer(&ctx->ac,
3677 ac_build_gather_values(&ctx->ac, values, 4));
3678 break;
3679 }
3680 case nir_intrinsic_load_layer_id:
3681 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3682 break;
3683 case nir_intrinsic_load_front_face:
3684 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3685 break;
3686 case nir_intrinsic_load_helper_invocation:
3687 result = ac_build_load_helper_invocation(&ctx->ac);
3688 break;
3689 case nir_intrinsic_is_helper_invocation:
3690 result = ac_build_is_helper_invocation(&ctx->ac);
3691 break;
3692 case nir_intrinsic_load_color0:
3693 result = ctx->abi->color0;
3694 break;
3695 case nir_intrinsic_load_color1:
3696 result = ctx->abi->color1;
3697 break;
3698 case nir_intrinsic_load_user_data_amd:
3699 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3700 result = ctx->abi->user_data;
3701 break;
3702 case nir_intrinsic_load_instance_id:
3703 result = ctx->abi->instance_id;
3704 break;
3705 case nir_intrinsic_load_num_work_groups:
3706 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3707 break;
3708 case nir_intrinsic_load_local_invocation_index:
3709 result = visit_load_local_invocation_index(ctx);
3710 break;
3711 case nir_intrinsic_load_subgroup_id:
3712 result = visit_load_subgroup_id(ctx);
3713 break;
3714 case nir_intrinsic_load_num_subgroups:
3715 result = visit_load_num_subgroups(ctx);
3716 break;
3717 case nir_intrinsic_first_invocation:
3718 result = visit_first_invocation(ctx);
3719 break;
3720 case nir_intrinsic_load_push_constant:
3721 result = visit_load_push_constant(ctx, instr);
3722 break;
3723 case nir_intrinsic_vulkan_resource_index: {
3724 LLVMValueRef index = get_src(ctx, instr->src[0]);
3725 unsigned desc_set = nir_intrinsic_desc_set(instr);
3726 unsigned binding = nir_intrinsic_binding(instr);
3727
3728 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3729 binding);
3730 break;
3731 }
3732 case nir_intrinsic_vulkan_resource_reindex:
3733 result = visit_vulkan_resource_reindex(ctx, instr);
3734 break;
3735 case nir_intrinsic_store_ssbo:
3736 visit_store_ssbo(ctx, instr);
3737 break;
3738 case nir_intrinsic_load_ssbo:
3739 result = visit_load_buffer(ctx, instr);
3740 break;
3741 case nir_intrinsic_ssbo_atomic_add:
3742 case nir_intrinsic_ssbo_atomic_imin:
3743 case nir_intrinsic_ssbo_atomic_umin:
3744 case nir_intrinsic_ssbo_atomic_imax:
3745 case nir_intrinsic_ssbo_atomic_umax:
3746 case nir_intrinsic_ssbo_atomic_and:
3747 case nir_intrinsic_ssbo_atomic_or:
3748 case nir_intrinsic_ssbo_atomic_xor:
3749 case nir_intrinsic_ssbo_atomic_exchange:
3750 case nir_intrinsic_ssbo_atomic_comp_swap:
3751 result = visit_atomic_ssbo(ctx, instr);
3752 break;
3753 case nir_intrinsic_load_ubo:
3754 result = visit_load_ubo_buffer(ctx, instr);
3755 break;
3756 case nir_intrinsic_get_buffer_size:
3757 result = visit_get_buffer_size(ctx, instr);
3758 break;
3759 case nir_intrinsic_load_deref:
3760 result = visit_load_var(ctx, instr);
3761 break;
3762 case nir_intrinsic_store_deref:
3763 visit_store_var(ctx, instr);
3764 break;
3765 case nir_intrinsic_load_shared:
3766 result = visit_load_shared(ctx, instr);
3767 break;
3768 case nir_intrinsic_store_shared:
3769 visit_store_shared(ctx, instr);
3770 break;
3771 case nir_intrinsic_bindless_image_samples:
3772 case nir_intrinsic_image_deref_samples:
3773 result = visit_image_samples(ctx, instr);
3774 break;
3775 case nir_intrinsic_bindless_image_load:
3776 result = visit_image_load(ctx, instr, true);
3777 break;
3778 case nir_intrinsic_image_deref_load:
3779 result = visit_image_load(ctx, instr, false);
3780 break;
3781 case nir_intrinsic_bindless_image_store:
3782 visit_image_store(ctx, instr, true);
3783 break;
3784 case nir_intrinsic_image_deref_store:
3785 visit_image_store(ctx, instr, false);
3786 break;
3787 case nir_intrinsic_bindless_image_atomic_add:
3788 case nir_intrinsic_bindless_image_atomic_imin:
3789 case nir_intrinsic_bindless_image_atomic_umin:
3790 case nir_intrinsic_bindless_image_atomic_imax:
3791 case nir_intrinsic_bindless_image_atomic_umax:
3792 case nir_intrinsic_bindless_image_atomic_and:
3793 case nir_intrinsic_bindless_image_atomic_or:
3794 case nir_intrinsic_bindless_image_atomic_xor:
3795 case nir_intrinsic_bindless_image_atomic_exchange:
3796 case nir_intrinsic_bindless_image_atomic_comp_swap:
3797 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3798 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3799 result = visit_image_atomic(ctx, instr, true);
3800 break;
3801 case nir_intrinsic_image_deref_atomic_add:
3802 case nir_intrinsic_image_deref_atomic_imin:
3803 case nir_intrinsic_image_deref_atomic_umin:
3804 case nir_intrinsic_image_deref_atomic_imax:
3805 case nir_intrinsic_image_deref_atomic_umax:
3806 case nir_intrinsic_image_deref_atomic_and:
3807 case nir_intrinsic_image_deref_atomic_or:
3808 case nir_intrinsic_image_deref_atomic_xor:
3809 case nir_intrinsic_image_deref_atomic_exchange:
3810 case nir_intrinsic_image_deref_atomic_comp_swap:
3811 case nir_intrinsic_image_deref_atomic_inc_wrap:
3812 case nir_intrinsic_image_deref_atomic_dec_wrap:
3813 result = visit_image_atomic(ctx, instr, false);
3814 break;
3815 case nir_intrinsic_bindless_image_size:
3816 result = visit_image_size(ctx, instr, true);
3817 break;
3818 case nir_intrinsic_image_deref_size:
3819 result = visit_image_size(ctx, instr, false);
3820 break;
3821 case nir_intrinsic_shader_clock:
3822 result = ac_build_shader_clock(&ctx->ac);
3823 break;
3824 case nir_intrinsic_discard:
3825 case nir_intrinsic_discard_if:
3826 emit_discard(ctx, instr);
3827 break;
3828 case nir_intrinsic_demote:
3829 case nir_intrinsic_demote_if:
3830 emit_demote(ctx, instr);
3831 break;
3832 case nir_intrinsic_memory_barrier:
3833 case nir_intrinsic_group_memory_barrier:
3834 case nir_intrinsic_memory_barrier_buffer:
3835 case nir_intrinsic_memory_barrier_image:
3836 case nir_intrinsic_memory_barrier_shared:
3837 emit_membar(&ctx->ac, instr);
3838 break;
3839 case nir_intrinsic_memory_barrier_tcs_patch:
3840 break;
3841 case nir_intrinsic_control_barrier:
3842 ac_emit_barrier(&ctx->ac, ctx->stage);
3843 break;
3844 case nir_intrinsic_shared_atomic_add:
3845 case nir_intrinsic_shared_atomic_imin:
3846 case nir_intrinsic_shared_atomic_umin:
3847 case nir_intrinsic_shared_atomic_imax:
3848 case nir_intrinsic_shared_atomic_umax:
3849 case nir_intrinsic_shared_atomic_and:
3850 case nir_intrinsic_shared_atomic_or:
3851 case nir_intrinsic_shared_atomic_xor:
3852 case nir_intrinsic_shared_atomic_exchange:
3853 case nir_intrinsic_shared_atomic_comp_swap: {
3854 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3855 instr->src[1].ssa->bit_size);
3856 result = visit_var_atomic(ctx, instr, ptr, 1);
3857 break;
3858 }
3859 case nir_intrinsic_deref_atomic_add:
3860 case nir_intrinsic_deref_atomic_imin:
3861 case nir_intrinsic_deref_atomic_umin:
3862 case nir_intrinsic_deref_atomic_imax:
3863 case nir_intrinsic_deref_atomic_umax:
3864 case nir_intrinsic_deref_atomic_and:
3865 case nir_intrinsic_deref_atomic_or:
3866 case nir_intrinsic_deref_atomic_xor:
3867 case nir_intrinsic_deref_atomic_exchange:
3868 case nir_intrinsic_deref_atomic_comp_swap: {
3869 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3870 result = visit_var_atomic(ctx, instr, ptr, 1);
3871 break;
3872 }
3873 case nir_intrinsic_load_barycentric_pixel:
3874 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3875 break;
3876 case nir_intrinsic_load_barycentric_centroid:
3877 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3878 break;
3879 case nir_intrinsic_load_barycentric_sample:
3880 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3881 break;
3882 case nir_intrinsic_load_barycentric_model:
3883 result = barycentric_model(ctx);
3884 break;
3885 case nir_intrinsic_load_barycentric_at_offset: {
3886 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3887 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3888 break;
3889 }
3890 case nir_intrinsic_load_barycentric_at_sample: {
3891 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3892 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3893 break;
3894 }
3895 case nir_intrinsic_load_interpolated_input: {
3896 /* We assume any indirect loads have been lowered away */
3897 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3898 assert(offset);
3899 assert(offset[0].i32 == 0);
3900
3901 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3902 unsigned index = nir_intrinsic_base(instr);
3903 unsigned component = nir_intrinsic_component(instr);
3904 result = load_interpolated_input(ctx, interp_param, index,
3905 component,
3906 instr->dest.ssa.num_components,
3907 instr->dest.ssa.bit_size);
3908 break;
3909 }
3910 case nir_intrinsic_load_input:
3911 case nir_intrinsic_load_input_vertex:
3912 result = load_input(ctx, instr);
3913 break;
3914 case nir_intrinsic_emit_vertex:
3915 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3916 break;
3917 case nir_intrinsic_end_primitive:
3918 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3919 break;
3920 case nir_intrinsic_load_tess_coord:
3921 result = ctx->abi->load_tess_coord(ctx->abi);
3922 break;
3923 case nir_intrinsic_load_tess_level_outer:
3924 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3925 break;
3926 case nir_intrinsic_load_tess_level_inner:
3927 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3928 break;
3929 case nir_intrinsic_load_tess_level_outer_default:
3930 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3931 break;
3932 case nir_intrinsic_load_tess_level_inner_default:
3933 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3934 break;
3935 case nir_intrinsic_load_patch_vertices_in:
3936 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3937 break;
3938 case nir_intrinsic_vote_all: {
3939 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3940 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3941 break;
3942 }
3943 case nir_intrinsic_vote_any: {
3944 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3945 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3946 break;
3947 }
3948 case nir_intrinsic_shuffle:
3949 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3950 get_src(ctx, instr->src[1]));
3951 break;
3952 case nir_intrinsic_reduce:
3953 result = ac_build_reduce(&ctx->ac,
3954 get_src(ctx, instr->src[0]),
3955 instr->const_index[0],
3956 instr->const_index[1]);
3957 break;
3958 case nir_intrinsic_inclusive_scan:
3959 result = ac_build_inclusive_scan(&ctx->ac,
3960 get_src(ctx, instr->src[0]),
3961 instr->const_index[0]);
3962 break;
3963 case nir_intrinsic_exclusive_scan:
3964 result = ac_build_exclusive_scan(&ctx->ac,
3965 get_src(ctx, instr->src[0]),
3966 instr->const_index[0]);
3967 break;
3968 case nir_intrinsic_quad_broadcast: {
3969 unsigned lane = nir_src_as_uint(instr->src[1]);
3970 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3971 lane, lane, lane, lane);
3972 break;
3973 }
3974 case nir_intrinsic_quad_swap_horizontal:
3975 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3976 break;
3977 case nir_intrinsic_quad_swap_vertical:
3978 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3979 break;
3980 case nir_intrinsic_quad_swap_diagonal:
3981 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3982 break;
3983 case nir_intrinsic_quad_swizzle_amd: {
3984 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3985 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3986 mask & 0x3, (mask >> 2) & 0x3,
3987 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3988 break;
3989 }
3990 case nir_intrinsic_masked_swizzle_amd: {
3991 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3992 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3993 break;
3994 }
3995 case nir_intrinsic_write_invocation_amd:
3996 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3997 get_src(ctx, instr->src[1]),
3998 get_src(ctx, instr->src[2]));
3999 break;
4000 case nir_intrinsic_mbcnt_amd:
4001 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4002 break;
4003 case nir_intrinsic_load_scratch: {
4004 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4005 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4006 offset);
4007 LLVMTypeRef comp_type =
4008 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4009 LLVMTypeRef vec_type =
4010 instr->dest.ssa.num_components == 1 ? comp_type :
4011 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4012 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4013 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4014 LLVMPointerType(vec_type, addr_space), "");
4015 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4016 break;
4017 }
4018 case nir_intrinsic_store_scratch: {
4019 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4020 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4021 offset);
4022 LLVMTypeRef comp_type =
4023 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4024 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4025 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4026 LLVMPointerType(comp_type, addr_space), "");
4027 LLVMValueRef src = get_src(ctx, instr->src[0]);
4028 unsigned wrmask = nir_intrinsic_write_mask(instr);
4029 while (wrmask) {
4030 int start, count;
4031 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4032
4033 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4034 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4035 LLVMTypeRef vec_type =
4036 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4037 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4038 offset_ptr,
4039 LLVMPointerType(vec_type, addr_space),
4040 "");
4041 LLVMValueRef offset_src =
4042 ac_extract_components(&ctx->ac, src, start, count);
4043 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4044 }
4045 break;
4046 }
4047 case nir_intrinsic_load_constant: {
4048 unsigned base = nir_intrinsic_base(instr);
4049 unsigned range = nir_intrinsic_range(instr);
4050
4051 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4052 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4053 LLVMConstInt(ctx->ac.i32, base, false), "");
4054
4055 /* Clamp the offset to avoid out-of-bound access because global
4056 * instructions can't handle them.
4057 */
4058 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4059 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4060 offset, size, "");
4061 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4062
4063 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4064 offset);
4065 LLVMTypeRef comp_type =
4066 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4067 LLVMTypeRef vec_type =
4068 instr->dest.ssa.num_components == 1 ? comp_type :
4069 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4070 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4071 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4072 LLVMPointerType(vec_type, addr_space), "");
4073 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4074 break;
4075 }
4076 default:
4077 fprintf(stderr, "Unknown intrinsic: ");
4078 nir_print_instr(&instr->instr, stderr);
4079 fprintf(stderr, "\n");
4080 break;
4081 }
4082 if (result) {
4083 ctx->ssa_defs[instr->dest.ssa.index] = result;
4084 }
4085 }
4086
4087 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4088 unsigned base_index,
4089 unsigned constant_index,
4090 LLVMValueRef dynamic_index)
4091 {
4092 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4093 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4094 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4095
4096 /* Bindless uniforms are 64bit so multiple index by 8 */
4097 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4098 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4099
4100 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4101
4102 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4103 NULL, 0, 0, true, true);
4104
4105 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4106 }
4107
4108 struct sampler_desc_address {
4109 unsigned descriptor_set;
4110 unsigned base_index; /* binding in vulkan */
4111 unsigned constant_index;
4112 LLVMValueRef dynamic_index;
4113 bool image;
4114 bool bindless;
4115 };
4116
4117 static struct sampler_desc_address
4118 get_sampler_desc_internal(struct ac_nir_context *ctx,
4119 nir_deref_instr *deref_instr,
4120 const nir_instr *instr,
4121 bool image)
4122 {
4123 LLVMValueRef index = NULL;
4124 unsigned constant_index = 0;
4125 unsigned descriptor_set;
4126 unsigned base_index;
4127 bool bindless = false;
4128
4129 if (!deref_instr) {
4130 descriptor_set = 0;
4131 if (image) {
4132 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4133 base_index = 0;
4134 bindless = true;
4135 index = get_src(ctx, img_instr->src[0]);
4136 } else {
4137 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4138 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4139 nir_tex_src_sampler_handle);
4140 if (sampSrcIdx != -1) {
4141 base_index = 0;
4142 bindless = true;
4143 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4144 } else {
4145 assert(tex_instr && !image);
4146 base_index = tex_instr->sampler_index;
4147 }
4148 }
4149 } else {
4150 while(deref_instr->deref_type != nir_deref_type_var) {
4151 if (deref_instr->deref_type == nir_deref_type_array) {
4152 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4153 if (!array_size)
4154 array_size = 1;
4155
4156 if (nir_src_is_const(deref_instr->arr.index)) {
4157 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4158 } else {
4159 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4160
4161 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4162 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4163
4164 if (!index)
4165 index = indirect;
4166 else
4167 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4168 }
4169
4170 deref_instr = nir_src_as_deref(deref_instr->parent);
4171 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4172 unsigned sidx = deref_instr->strct.index;
4173 deref_instr = nir_src_as_deref(deref_instr->parent);
4174 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4175 } else {
4176 unreachable("Unsupported deref type");
4177 }
4178 }
4179 descriptor_set = deref_instr->var->data.descriptor_set;
4180
4181 if (deref_instr->var->data.bindless) {
4182 /* For now just assert on unhandled variable types */
4183 assert(deref_instr->var->data.mode == nir_var_uniform);
4184
4185 base_index = deref_instr->var->data.driver_location;
4186 bindless = true;
4187
4188 index = index ? index : ctx->ac.i32_0;
4189 index = get_bindless_index_from_uniform(ctx, base_index,
4190 constant_index, index);
4191 } else
4192 base_index = deref_instr->var->data.binding;
4193 }
4194 return (struct sampler_desc_address) {
4195 .descriptor_set = descriptor_set,
4196 .base_index = base_index,
4197 .constant_index = constant_index,
4198 .dynamic_index = index,
4199 .image = image,
4200 .bindless = bindless,
4201 };
4202 }
4203
4204 /* Extract any possibly divergent index into a separate value that can be fed
4205 * into get_sampler_desc with the same arguments. */
4206 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4207 nir_deref_instr *deref_instr,
4208 const nir_instr *instr,
4209 bool image)
4210 {
4211 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4212 return addr.dynamic_index;
4213 }
4214
4215 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4216 nir_deref_instr *deref_instr,
4217 enum ac_descriptor_type desc_type,
4218 const nir_instr *instr,
4219 LLVMValueRef index,
4220 bool image, bool write)
4221 {
4222 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4223 return ctx->abi->load_sampler_desc(ctx->abi,
4224 addr.descriptor_set,
4225 addr.base_index,
4226 addr.constant_index, index,
4227 desc_type, addr.image, write, addr.bindless);
4228 }
4229
4230 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4231 *
4232 * GFX6-GFX7:
4233 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4234 * filtering manually. The driver sets img7 to a mask clearing
4235 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4236 * s_and_b32 samp0, samp0, img7
4237 *
4238 * GFX8:
4239 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4240 */
4241 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4242 LLVMValueRef res, LLVMValueRef samp)
4243 {
4244 LLVMBuilderRef builder = ctx->ac.builder;
4245 LLVMValueRef img7, samp0;
4246
4247 if (ctx->ac.chip_class >= GFX8)
4248 return samp;
4249
4250 img7 = LLVMBuildExtractElement(builder, res,
4251 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4252 samp0 = LLVMBuildExtractElement(builder, samp,
4253 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4254 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4255 return LLVMBuildInsertElement(builder, samp, samp0,
4256 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4257 }
4258
4259 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4260 nir_tex_instr *instr,
4261 struct waterfall_context *wctx,
4262 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4263 LLVMValueRef *fmask_ptr)
4264 {
4265 nir_deref_instr *texture_deref_instr = NULL;
4266 nir_deref_instr *sampler_deref_instr = NULL;
4267 int plane = -1;
4268
4269 for (unsigned i = 0; i < instr->num_srcs; i++) {
4270 switch (instr->src[i].src_type) {
4271 case nir_tex_src_texture_deref:
4272 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4273 break;
4274 case nir_tex_src_sampler_deref:
4275 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4276 break;
4277 case nir_tex_src_plane:
4278 plane = nir_src_as_int(instr->src[i].src);
4279 break;
4280 default:
4281 break;
4282 }
4283 }
4284
4285 if (!sampler_deref_instr)
4286 sampler_deref_instr = texture_deref_instr;
4287
4288 LLVMValueRef texture_dynamic_index = NULL, sampler_dynamic_index = NULL;
4289 if (texture_deref_instr) {
4290 texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr, &instr->instr, false);
4291 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, instr->texture_non_uniform);
4292 }
4293
4294 if (sampler_deref_instr && sampler_deref_instr != texture_deref_instr) {
4295 sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr, &instr->instr, false);
4296 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, instr->sampler_non_uniform);
4297 } else
4298 sampler_dynamic_index = texture_dynamic_index;
4299
4300 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4301
4302 if (plane >= 0) {
4303 assert(instr->op != nir_texop_txf_ms &&
4304 instr->op != nir_texop_samples_identical);
4305 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4306
4307 main_descriptor = AC_DESC_PLANE_0 + plane;
4308 }
4309
4310 if (instr->op == nir_texop_fragment_mask_fetch) {
4311 /* The fragment mask is fetched from the compressed
4312 * multisampled surface.
4313 */
4314 main_descriptor = AC_DESC_FMASK;
4315 }
4316
4317 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4318 texture_dynamic_index, false, false);
4319
4320 if (samp_ptr) {
4321 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4322 sampler_dynamic_index, false, false);
4323 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4324 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4325 }
4326 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4327 instr->op == nir_texop_samples_identical))
4328 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4329 &instr->instr, texture_dynamic_index, false, false);
4330 }
4331
4332 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4333 LLVMValueRef coord)
4334 {
4335 coord = ac_to_float(ctx, coord);
4336 coord = ac_build_round(ctx, coord);
4337 coord = ac_to_integer(ctx, coord);
4338 return coord;
4339 }
4340
4341 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4342 {
4343 LLVMValueRef result = NULL;
4344 struct ac_image_args args = { 0 };
4345 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4346 LLVMValueRef ddx = NULL, ddy = NULL;
4347 unsigned offset_src = 0;
4348 struct waterfall_context wctx[2] = {{{0}}};
4349
4350 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4351
4352 for (unsigned i = 0; i < instr->num_srcs; i++) {
4353 switch (instr->src[i].src_type) {
4354 case nir_tex_src_coord: {
4355 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4356 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4357 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4358 break;
4359 }
4360 case nir_tex_src_projector:
4361 break;
4362 case nir_tex_src_comparator:
4363 if (instr->is_shadow) {
4364 args.compare = get_src(ctx, instr->src[i].src);
4365 args.compare = ac_to_float(&ctx->ac, args.compare);
4366 }
4367 break;
4368 case nir_tex_src_offset:
4369 args.offset = get_src(ctx, instr->src[i].src);
4370 offset_src = i;
4371 break;
4372 case nir_tex_src_bias:
4373 if (instr->op == nir_texop_txb)
4374 args.bias = get_src(ctx, instr->src[i].src);
4375 break;
4376 case nir_tex_src_lod: {
4377 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4378 args.level_zero = true;
4379 else
4380 args.lod = get_src(ctx, instr->src[i].src);
4381 break;
4382 }
4383 case nir_tex_src_ms_index:
4384 sample_index = get_src(ctx, instr->src[i].src);
4385 break;
4386 case nir_tex_src_ms_mcs:
4387 break;
4388 case nir_tex_src_ddx:
4389 ddx = get_src(ctx, instr->src[i].src);
4390 break;
4391 case nir_tex_src_ddy:
4392 ddy = get_src(ctx, instr->src[i].src);
4393 break;
4394 case nir_tex_src_texture_offset:
4395 case nir_tex_src_sampler_offset:
4396 case nir_tex_src_plane:
4397 default:
4398 break;
4399 }
4400 }
4401
4402 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4403 result = get_buffer_size(ctx, args.resource, true);
4404 goto write_result;
4405 }
4406
4407 if (instr->op == nir_texop_texture_samples) {
4408 LLVMValueRef res, samples, is_msaa;
4409 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4410 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4411 LLVMConstInt(ctx->ac.i32, 3, false), "");
4412 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4413 LLVMConstInt(ctx->ac.i32, 28, false), "");
4414 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4415 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4416 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4417 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4418
4419 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4420 LLVMConstInt(ctx->ac.i32, 16, false), "");
4421 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4422 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4423 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4424 samples, "");
4425 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4426 ctx->ac.i32_1, "");
4427 result = samples;
4428 goto write_result;
4429 }
4430
4431 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4432 LLVMValueRef offset[3], pack;
4433 for (unsigned chan = 0; chan < 3; ++chan)
4434 offset[chan] = ctx->ac.i32_0;
4435
4436 unsigned num_components = ac_get_llvm_num_components(args.offset);
4437 for (unsigned chan = 0; chan < num_components; chan++) {
4438 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4439 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4440 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4441 if (chan)
4442 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4443 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4444 }
4445 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4446 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4447 args.offset = pack;
4448 }
4449
4450 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4451 * OpenGL 4.5 spec says:
4452 *
4453 * "If the texture’s internal format indicates a fixed-point
4454 * depth texture, then D_t and D_ref are clamped to the
4455 * range [0, 1]; otherwise no clamping is performed."
4456 *
4457 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4458 * so the depth comparison value isn't clamped for Z16 and
4459 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4460 * an explicitly clamped 32-bit float format.
4461 */
4462 if (args.compare &&
4463 ctx->ac.chip_class >= GFX8 &&
4464 ctx->ac.chip_class <= GFX9 &&
4465 ctx->abi->clamp_shadow_reference) {
4466 LLVMValueRef upgraded, clamped;
4467
4468 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4469 LLVMConstInt(ctx->ac.i32, 3, false), "");
4470 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4471 LLVMConstInt(ctx->ac.i32, 29, false), "");
4472 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4473 clamped = ac_build_clamp(&ctx->ac, args.compare);
4474 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4475 args.compare, "");
4476 }
4477
4478 /* pack derivatives */
4479 if (ddx || ddy) {
4480 int num_src_deriv_channels, num_dest_deriv_channels;
4481 switch (instr->sampler_dim) {
4482 case GLSL_SAMPLER_DIM_3D:
4483 case GLSL_SAMPLER_DIM_CUBE:
4484 num_src_deriv_channels = 3;
4485 num_dest_deriv_channels = 3;
4486 break;
4487 case GLSL_SAMPLER_DIM_2D:
4488 default:
4489 num_src_deriv_channels = 2;
4490 num_dest_deriv_channels = 2;
4491 break;
4492 case GLSL_SAMPLER_DIM_1D:
4493 num_src_deriv_channels = 1;
4494 if (ctx->ac.chip_class == GFX9) {
4495 num_dest_deriv_channels = 2;
4496 } else {
4497 num_dest_deriv_channels = 1;
4498 }
4499 break;
4500 }
4501
4502 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4503 args.derivs[i] = ac_to_float(&ctx->ac,
4504 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4505 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4506 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4507 }
4508 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4509 args.derivs[i] = ctx->ac.f32_0;
4510 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4511 }
4512 }
4513
4514 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4515 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4516 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4517 if (instr->coord_components == 3)
4518 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4519 ac_prepare_cube_coords(&ctx->ac,
4520 instr->op == nir_texop_txd, instr->is_array,
4521 instr->op == nir_texop_lod, args.coords, args.derivs);
4522 }
4523
4524 /* Texture coordinates fixups */
4525 if (instr->coord_components > 1 &&
4526 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4527 instr->is_array &&
4528 instr->op != nir_texop_txf) {
4529 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4530 }
4531
4532 if (instr->coord_components > 2 &&
4533 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4534 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4535 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4536 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4537 instr->is_array &&
4538 instr->op != nir_texop_txf &&
4539 instr->op != nir_texop_txf_ms &&
4540 instr->op != nir_texop_fragment_fetch &&
4541 instr->op != nir_texop_fragment_mask_fetch) {
4542 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4543 }
4544
4545 if (ctx->ac.chip_class == GFX9 &&
4546 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4547 instr->op != nir_texop_lod) {
4548 LLVMValueRef filler;
4549 if (instr->op == nir_texop_txf)
4550 filler = ctx->ac.i32_0;
4551 else
4552 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4553
4554 if (instr->is_array)
4555 args.coords[2] = args.coords[1];
4556 args.coords[1] = filler;
4557 }
4558
4559 /* Pack sample index */
4560 if (sample_index && (instr->op == nir_texop_txf_ms ||
4561 instr->op == nir_texop_fragment_fetch))
4562 args.coords[instr->coord_components] = sample_index;
4563
4564 if (instr->op == nir_texop_samples_identical) {
4565 struct ac_image_args txf_args = { 0 };
4566 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4567
4568 txf_args.dmask = 0xf;
4569 txf_args.resource = fmask_ptr;
4570 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4571 result = build_tex_intrinsic(ctx, instr, &txf_args);
4572
4573 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4574 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4575 goto write_result;
4576 }
4577
4578 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4579 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4580 instr->op != nir_texop_txs &&
4581 instr->op != nir_texop_fragment_fetch &&
4582 instr->op != nir_texop_fragment_mask_fetch) {
4583 unsigned sample_chan = instr->is_array ? 3 : 2;
4584 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4585 &ctx->ac, args.coords[0], args.coords[1],
4586 instr->is_array ? args.coords[2] : NULL,
4587 args.coords[sample_chan], fmask_ptr);
4588 }
4589
4590 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4591 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4592 num_offsets = MIN2(num_offsets, instr->coord_components);
4593 for (unsigned i = 0; i < num_offsets; ++i) {
4594 args.coords[i] = LLVMBuildAdd(
4595 ctx->ac.builder, args.coords[i],
4596 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4597 }
4598 args.offset = NULL;
4599 }
4600
4601 /* DMASK was repurposed for GATHER4. 4 components are always
4602 * returned and DMASK works like a swizzle - it selects
4603 * the component to fetch. The only valid DMASK values are
4604 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4605 * (red,red,red,red) etc.) The ISA document doesn't mention
4606 * this.
4607 */
4608 args.dmask = 0xf;
4609 if (instr->op == nir_texop_tg4) {
4610 if (instr->is_shadow)
4611 args.dmask = 1;
4612 else
4613 args.dmask = 1 << instr->component;
4614 }
4615
4616 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4617 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4618 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4619 }
4620
4621 /* Adjust the number of coordinates because we only need (x,y) for 2D
4622 * multisampled images and (x,y,layer) for 2D multisampled layered
4623 * images or for multisampled input attachments.
4624 */
4625 if (instr->op == nir_texop_fragment_mask_fetch) {
4626 if (args.dim == ac_image_2dmsaa) {
4627 args.dim = ac_image_2d;
4628 } else {
4629 assert(args.dim == ac_image_2darraymsaa);
4630 args.dim = ac_image_2darray;
4631 }
4632 }
4633
4634 result = build_tex_intrinsic(ctx, instr, &args);
4635
4636 if (instr->op == nir_texop_query_levels)
4637 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4638 else if (instr->is_shadow && instr->is_new_style_shadow &&
4639 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4640 instr->op != nir_texop_tg4)
4641 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4642 else if (instr->op == nir_texop_txs &&
4643 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4644 instr->is_array) {
4645 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4646 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4647 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4648 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4649 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4650 } else if (ctx->ac.chip_class == GFX9 &&
4651 instr->op == nir_texop_txs &&
4652 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4653 instr->is_array) {
4654 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4655 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4656 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4657 ctx->ac.i32_1, "");
4658 } else if (instr->dest.ssa.num_components != 4)
4659 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4660
4661 write_result:
4662 if (result) {
4663 assert(instr->dest.is_ssa);
4664 result = ac_to_integer(&ctx->ac, result);
4665
4666 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4667 result = exit_waterfall(ctx, wctx + i, result);
4668 }
4669
4670 ctx->ssa_defs[instr->dest.ssa.index] = result;
4671 }
4672 }
4673
4674 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4675 {
4676 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4677 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4678
4679 ctx->ssa_defs[instr->dest.ssa.index] = result;
4680 _mesa_hash_table_insert(ctx->phis, instr, result);
4681 }
4682
4683 static void visit_post_phi(struct ac_nir_context *ctx,
4684 nir_phi_instr *instr,
4685 LLVMValueRef llvm_phi)
4686 {
4687 nir_foreach_phi_src(src, instr) {
4688 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4689 LLVMValueRef llvm_src = get_src(ctx, src->src);
4690
4691 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4692 }
4693 }
4694
4695 static void phi_post_pass(struct ac_nir_context *ctx)
4696 {
4697 hash_table_foreach(ctx->phis, entry) {
4698 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4699 (LLVMValueRef)entry->data);
4700 }
4701 }
4702
4703
4704 static void visit_ssa_undef(struct ac_nir_context *ctx,
4705 const nir_ssa_undef_instr *instr)
4706 {
4707 unsigned num_components = instr->def.num_components;
4708 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4709 LLVMValueRef undef;
4710
4711 if (num_components == 1)
4712 undef = LLVMGetUndef(type);
4713 else {
4714 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4715 }
4716 ctx->ssa_defs[instr->def.index] = undef;
4717 }
4718
4719 static void visit_jump(struct ac_llvm_context *ctx,
4720 const nir_jump_instr *instr)
4721 {
4722 switch (instr->type) {
4723 case nir_jump_break:
4724 ac_build_break(ctx);
4725 break;
4726 case nir_jump_continue:
4727 ac_build_continue(ctx);
4728 break;
4729 default:
4730 fprintf(stderr, "Unknown NIR jump instr: ");
4731 nir_print_instr(&instr->instr, stderr);
4732 fprintf(stderr, "\n");
4733 abort();
4734 }
4735 }
4736
4737 static LLVMTypeRef
4738 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4739 enum glsl_base_type type)
4740 {
4741 switch (type) {
4742 case GLSL_TYPE_INT:
4743 case GLSL_TYPE_UINT:
4744 case GLSL_TYPE_BOOL:
4745 case GLSL_TYPE_SUBROUTINE:
4746 return ac->i32;
4747 case GLSL_TYPE_INT8:
4748 case GLSL_TYPE_UINT8:
4749 return ac->i8;
4750 case GLSL_TYPE_INT16:
4751 case GLSL_TYPE_UINT16:
4752 return ac->i16;
4753 case GLSL_TYPE_FLOAT:
4754 return ac->f32;
4755 case GLSL_TYPE_FLOAT16:
4756 return ac->f16;
4757 case GLSL_TYPE_INT64:
4758 case GLSL_TYPE_UINT64:
4759 return ac->i64;
4760 case GLSL_TYPE_DOUBLE:
4761 return ac->f64;
4762 default:
4763 unreachable("unknown GLSL type");
4764 }
4765 }
4766
4767 static LLVMTypeRef
4768 glsl_to_llvm_type(struct ac_llvm_context *ac,
4769 const struct glsl_type *type)
4770 {
4771 if (glsl_type_is_scalar(type)) {
4772 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4773 }
4774
4775 if (glsl_type_is_vector(type)) {
4776 return LLVMVectorType(
4777 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4778 glsl_get_vector_elements(type));
4779 }
4780
4781 if (glsl_type_is_matrix(type)) {
4782 return LLVMArrayType(
4783 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4784 glsl_get_matrix_columns(type));
4785 }
4786
4787 if (glsl_type_is_array(type)) {
4788 return LLVMArrayType(
4789 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4790 glsl_get_length(type));
4791 }
4792
4793 assert(glsl_type_is_struct_or_ifc(type));
4794
4795 LLVMTypeRef member_types[glsl_get_length(type)];
4796
4797 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4798 member_types[i] =
4799 glsl_to_llvm_type(ac,
4800 glsl_get_struct_field(type, i));
4801 }
4802
4803 return LLVMStructTypeInContext(ac->context, member_types,
4804 glsl_get_length(type), false);
4805 }
4806
4807 static void visit_deref(struct ac_nir_context *ctx,
4808 nir_deref_instr *instr)
4809 {
4810 if (instr->mode != nir_var_mem_shared &&
4811 instr->mode != nir_var_mem_global)
4812 return;
4813
4814 LLVMValueRef result = NULL;
4815 switch(instr->deref_type) {
4816 case nir_deref_type_var: {
4817 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4818 result = entry->data;
4819 break;
4820 }
4821 case nir_deref_type_struct:
4822 if (instr->mode == nir_var_mem_global) {
4823 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4824 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4825 instr->strct.index);
4826 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4827 LLVMConstInt(ctx->ac.i32, offset, 0));
4828 } else {
4829 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4830 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4831 }
4832 break;
4833 case nir_deref_type_array:
4834 if (instr->mode == nir_var_mem_global) {
4835 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4836 unsigned stride = glsl_get_explicit_stride(parent->type);
4837
4838 if ((glsl_type_is_matrix(parent->type) &&
4839 glsl_matrix_type_is_row_major(parent->type)) ||
4840 (glsl_type_is_vector(parent->type) && stride == 0))
4841 stride = type_scalar_size_bytes(parent->type);
4842
4843 assert(stride > 0);
4844 LLVMValueRef index = get_src(ctx, instr->arr.index);
4845 if (LLVMTypeOf(index) != ctx->ac.i64)
4846 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4847
4848 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4849
4850 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4851 } else {
4852 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4853 get_src(ctx, instr->arr.index));
4854 }
4855 break;
4856 case nir_deref_type_ptr_as_array:
4857 if (instr->mode == nir_var_mem_global) {
4858 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4859
4860 LLVMValueRef index = get_src(ctx, instr->arr.index);
4861 if (LLVMTypeOf(index) != ctx->ac.i64)
4862 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4863
4864 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4865
4866 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4867 } else {
4868 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4869 get_src(ctx, instr->arr.index));
4870 }
4871 break;
4872 case nir_deref_type_cast: {
4873 result = get_src(ctx, instr->parent);
4874
4875 /* We can't use the structs from LLVM because the shader
4876 * specifies its own offsets. */
4877 LLVMTypeRef pointee_type = ctx->ac.i8;
4878 if (instr->mode == nir_var_mem_shared)
4879 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4880
4881 unsigned address_space;
4882
4883 switch(instr->mode) {
4884 case nir_var_mem_shared:
4885 address_space = AC_ADDR_SPACE_LDS;
4886 break;
4887 case nir_var_mem_global:
4888 address_space = AC_ADDR_SPACE_GLOBAL;
4889 break;
4890 default:
4891 unreachable("Unhandled address space");
4892 }
4893
4894 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4895
4896 if (LLVMTypeOf(result) != type) {
4897 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4898 result = LLVMBuildBitCast(ctx->ac.builder, result,
4899 type, "");
4900 } else {
4901 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4902 type, "");
4903 }
4904 }
4905 break;
4906 }
4907 default:
4908 unreachable("Unhandled deref_instr deref type");
4909 }
4910
4911 ctx->ssa_defs[instr->dest.ssa.index] = result;
4912 }
4913
4914 static void visit_cf_list(struct ac_nir_context *ctx,
4915 struct exec_list *list);
4916
4917 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4918 {
4919 nir_foreach_instr(instr, block)
4920 {
4921 switch (instr->type) {
4922 case nir_instr_type_alu:
4923 visit_alu(ctx, nir_instr_as_alu(instr));
4924 break;
4925 case nir_instr_type_load_const:
4926 visit_load_const(ctx, nir_instr_as_load_const(instr));
4927 break;
4928 case nir_instr_type_intrinsic:
4929 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4930 break;
4931 case nir_instr_type_tex:
4932 visit_tex(ctx, nir_instr_as_tex(instr));
4933 break;
4934 case nir_instr_type_phi:
4935 visit_phi(ctx, nir_instr_as_phi(instr));
4936 break;
4937 case nir_instr_type_ssa_undef:
4938 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4939 break;
4940 case nir_instr_type_jump:
4941 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4942 break;
4943 case nir_instr_type_deref:
4944 visit_deref(ctx, nir_instr_as_deref(instr));
4945 break;
4946 default:
4947 fprintf(stderr, "Unknown NIR instr type: ");
4948 nir_print_instr(instr, stderr);
4949 fprintf(stderr, "\n");
4950 abort();
4951 }
4952 }
4953
4954 _mesa_hash_table_insert(ctx->defs, block,
4955 LLVMGetInsertBlock(ctx->ac.builder));
4956 }
4957
4958 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4959 {
4960 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4961
4962 nir_block *then_block =
4963 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4964
4965 ac_build_uif(&ctx->ac, value, then_block->index);
4966
4967 visit_cf_list(ctx, &if_stmt->then_list);
4968
4969 if (!exec_list_is_empty(&if_stmt->else_list)) {
4970 nir_block *else_block =
4971 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4972
4973 ac_build_else(&ctx->ac, else_block->index);
4974 visit_cf_list(ctx, &if_stmt->else_list);
4975 }
4976
4977 ac_build_endif(&ctx->ac, then_block->index);
4978 }
4979
4980 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4981 {
4982 nir_block *first_loop_block =
4983 (nir_block *) exec_list_get_head(&loop->body);
4984
4985 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4986
4987 visit_cf_list(ctx, &loop->body);
4988
4989 ac_build_endloop(&ctx->ac, first_loop_block->index);
4990 }
4991
4992 static void visit_cf_list(struct ac_nir_context *ctx,
4993 struct exec_list *list)
4994 {
4995 foreach_list_typed(nir_cf_node, node, node, list)
4996 {
4997 switch (node->type) {
4998 case nir_cf_node_block:
4999 visit_block(ctx, nir_cf_node_as_block(node));
5000 break;
5001
5002 case nir_cf_node_if:
5003 visit_if(ctx, nir_cf_node_as_if(node));
5004 break;
5005
5006 case nir_cf_node_loop:
5007 visit_loop(ctx, nir_cf_node_as_loop(node));
5008 break;
5009
5010 default:
5011 assert(0);
5012 }
5013 }
5014 }
5015
5016 void
5017 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5018 struct ac_shader_abi *abi,
5019 struct nir_shader *nir,
5020 struct nir_variable *variable,
5021 gl_shader_stage stage)
5022 {
5023 unsigned output_loc = variable->data.driver_location / 4;
5024 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5025
5026 /* tess ctrl has it's own load/store paths for outputs */
5027 if (stage == MESA_SHADER_TESS_CTRL)
5028 return;
5029
5030 if (stage == MESA_SHADER_VERTEX ||
5031 stage == MESA_SHADER_TESS_EVAL ||
5032 stage == MESA_SHADER_GEOMETRY) {
5033 int idx = variable->data.location + variable->data.index;
5034 if (idx == VARYING_SLOT_CLIP_DIST0) {
5035 int length = nir->info.clip_distance_array_size +
5036 nir->info.cull_distance_array_size;
5037
5038 if (length > 4)
5039 attrib_count = 2;
5040 else
5041 attrib_count = 1;
5042 }
5043 }
5044
5045 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5046 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5047 for (unsigned i = 0; i < attrib_count; ++i) {
5048 for (unsigned chan = 0; chan < 4; chan++) {
5049 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5050 ac_build_alloca_undef(ctx, type, "");
5051 }
5052 }
5053 }
5054
5055 static void
5056 setup_locals(struct ac_nir_context *ctx,
5057 struct nir_function *func)
5058 {
5059 int i, j;
5060 ctx->num_locals = 0;
5061 nir_foreach_variable(variable, &func->impl->locals) {
5062 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5063 variable->data.driver_location = ctx->num_locals * 4;
5064 variable->data.location_frac = 0;
5065 ctx->num_locals += attrib_count;
5066 }
5067 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5068 if (!ctx->locals)
5069 return;
5070
5071 for (i = 0; i < ctx->num_locals; i++) {
5072 for (j = 0; j < 4; j++) {
5073 ctx->locals[i * 4 + j] =
5074 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5075 }
5076 }
5077 }
5078
5079 static void
5080 setup_scratch(struct ac_nir_context *ctx,
5081 struct nir_shader *shader)
5082 {
5083 if (shader->scratch_size == 0)
5084 return;
5085
5086 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5087 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5088 "scratch");
5089 }
5090
5091 static void
5092 setup_constant_data(struct ac_nir_context *ctx,
5093 struct nir_shader *shader)
5094 {
5095 if (!shader->constant_data)
5096 return;
5097
5098 LLVMValueRef data =
5099 LLVMConstStringInContext(ctx->ac.context,
5100 shader->constant_data,
5101 shader->constant_data_size,
5102 true);
5103 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5104
5105 /* We want to put the constant data in the CONST address space so that
5106 * we can use scalar loads. However, LLVM versions before 10 put these
5107 * variables in the same section as the code, which is unacceptable
5108 * for RadeonSI as it needs to relocate all the data sections after
5109 * the code sections. See https://reviews.llvm.org/D65813.
5110 */
5111 unsigned address_space =
5112 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5113
5114 LLVMValueRef global =
5115 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5116 "const_data",
5117 address_space);
5118
5119 LLVMSetInitializer(global, data);
5120 LLVMSetGlobalConstant(global, true);
5121 LLVMSetVisibility(global, LLVMHiddenVisibility);
5122 ctx->constant_data = global;
5123 }
5124
5125 static void
5126 setup_shared(struct ac_nir_context *ctx,
5127 struct nir_shader *nir)
5128 {
5129 if (ctx->ac.lds)
5130 return;
5131
5132 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5133 nir->info.cs.shared_size);
5134
5135 LLVMValueRef lds =
5136 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5137 "compute_lds",
5138 AC_ADDR_SPACE_LDS);
5139 LLVMSetAlignment(lds, 64 * 1024);
5140
5141 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5142 LLVMPointerType(ctx->ac.i8,
5143 AC_ADDR_SPACE_LDS), "");
5144 }
5145
5146 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5147 const struct ac_shader_args *args, struct nir_shader *nir)
5148 {
5149 struct ac_nir_context ctx = {};
5150 struct nir_function *func;
5151
5152 ctx.ac = *ac;
5153 ctx.abi = abi;
5154 ctx.args = args;
5155
5156 ctx.stage = nir->info.stage;
5157 ctx.info = &nir->info;
5158
5159 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5160
5161 nir_foreach_variable(variable, &nir->outputs)
5162 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5163 ctx.stage);
5164
5165 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5166 _mesa_key_pointer_equal);
5167 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5168 _mesa_key_pointer_equal);
5169 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5170 _mesa_key_pointer_equal);
5171
5172 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5173
5174 nir_index_ssa_defs(func->impl);
5175 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5176
5177 setup_locals(&ctx, func);
5178 setup_scratch(&ctx, nir);
5179 setup_constant_data(&ctx, nir);
5180
5181 if (gl_shader_stage_is_compute(nir->info.stage))
5182 setup_shared(&ctx, nir);
5183
5184 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5185 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5186 /* true = don't kill. */
5187 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5188 }
5189
5190 visit_cf_list(&ctx, &func->impl->body);
5191 phi_post_pass(&ctx);
5192
5193 if (ctx.ac.postponed_kill)
5194 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5195 ctx.ac.postponed_kill, ""));
5196
5197 if (!gl_shader_stage_is_compute(nir->info.stage))
5198 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5199 ctx.abi->outputs);
5200
5201 free(ctx.locals);
5202 free(ctx.ssa_defs);
5203 ralloc_free(ctx.defs);
5204 ralloc_free(ctx.phis);
5205 ralloc_free(ctx.vars);
5206 }
5207
5208 bool
5209 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5210 {
5211 bool progress = false;
5212
5213 /* Lower large variables to scratch first so that we won't bloat the
5214 * shader by generating large if ladders for them. We later lower
5215 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5216 */
5217 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5218 nir_var_function_temp,
5219 256,
5220 glsl_get_natural_size_align_bytes);
5221
5222 /* While it would be nice not to have this flag, we are constrained
5223 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5224 */
5225 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5226
5227 /* TODO: Indirect indexing of GS inputs is unimplemented.
5228 *
5229 * TCS and TES load inputs directly from LDS or offchip memory, so
5230 * indirect indexing is trivial.
5231 */
5232 nir_variable_mode indirect_mask = 0;
5233 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5234 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5235 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5236 !llvm_has_working_vgpr_indexing)) {
5237 indirect_mask |= nir_var_shader_in;
5238 }
5239 if (!llvm_has_working_vgpr_indexing &&
5240 nir->info.stage != MESA_SHADER_TESS_CTRL)
5241 indirect_mask |= nir_var_shader_out;
5242
5243 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5244 * smart enough to handle indirects without causing excess spilling
5245 * causing the gpu to hang.
5246 *
5247 * See the following thread for more details of the problem:
5248 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5249 */
5250 indirect_mask |= nir_var_function_temp;
5251
5252 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5253 return progress;
5254 }
5255
5256 static unsigned
5257 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5258 {
5259 if (intrin->intrinsic != nir_intrinsic_store_deref)
5260 return 0;
5261
5262 nir_variable *var =
5263 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5264
5265 if (var->data.mode != nir_var_shader_out)
5266 return 0;
5267
5268 unsigned writemask = 0;
5269 const int location = var->data.location;
5270 unsigned first_component = var->data.location_frac;
5271 unsigned num_comps = intrin->dest.ssa.num_components;
5272
5273 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5274 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5275 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5276 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5277
5278 return writemask;
5279 }
5280
5281 static void
5282 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5283 unsigned *cond_block_tf_writemask,
5284 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5285 {
5286 switch (cf_node->type) {
5287 case nir_cf_node_block: {
5288 nir_block *block = nir_cf_node_as_block(cf_node);
5289 nir_foreach_instr(instr, block) {
5290 if (instr->type != nir_instr_type_intrinsic)
5291 continue;
5292
5293 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5294 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5295
5296 /* If we find a barrier in nested control flow put this in the
5297 * too hard basket. In GLSL this is not possible but it is in
5298 * SPIR-V.
5299 */
5300 if (is_nested_cf) {
5301 *tessfactors_are_def_in_all_invocs = false;
5302 return;
5303 }
5304
5305 /* The following case must be prevented:
5306 * gl_TessLevelInner = ...;
5307 * barrier();
5308 * if (gl_InvocationID == 1)
5309 * gl_TessLevelInner = ...;
5310 *
5311 * If you consider disjoint code segments separated by barriers, each
5312 * such segment that writes tess factor channels should write the same
5313 * channels in all codepaths within that segment.
5314 */
5315 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5316 /* Accumulate the result: */
5317 *tessfactors_are_def_in_all_invocs &=
5318 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5319
5320 /* Analyze the next code segment from scratch. */
5321 *upper_block_tf_writemask = 0;
5322 *cond_block_tf_writemask = 0;
5323 }
5324 } else
5325 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5326 }
5327
5328 break;
5329 }
5330 case nir_cf_node_if: {
5331 unsigned then_tessfactor_writemask = 0;
5332 unsigned else_tessfactor_writemask = 0;
5333
5334 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5335 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5336 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5337 cond_block_tf_writemask,
5338 tessfactors_are_def_in_all_invocs, true);
5339 }
5340
5341 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5342 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5343 cond_block_tf_writemask,
5344 tessfactors_are_def_in_all_invocs, true);
5345 }
5346
5347 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5348 /* If both statements write the same tess factor channels,
5349 * we can say that the upper block writes them too.
5350 */
5351 *upper_block_tf_writemask |= then_tessfactor_writemask &
5352 else_tessfactor_writemask;
5353 *cond_block_tf_writemask |= then_tessfactor_writemask |
5354 else_tessfactor_writemask;
5355 }
5356
5357 break;
5358 }
5359 case nir_cf_node_loop: {
5360 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5361 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5362 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5363 cond_block_tf_writemask,
5364 tessfactors_are_def_in_all_invocs, true);
5365 }
5366
5367 break;
5368 }
5369 default:
5370 unreachable("unknown cf node type");
5371 }
5372 }
5373
5374 bool
5375 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5376 {
5377 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5378
5379 /* The pass works as follows:
5380 * If all codepaths write tess factors, we can say that all
5381 * invocations define tess factors.
5382 *
5383 * Each tess factor channel is tracked separately.
5384 */
5385 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5386 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5387
5388 /* Initial value = true. Here the pass will accumulate results from
5389 * multiple segments surrounded by barriers. If tess factors aren't
5390 * written at all, it's a shader bug and we don't care if this will be
5391 * true.
5392 */
5393 bool tessfactors_are_def_in_all_invocs = true;
5394
5395 nir_foreach_function(function, nir) {
5396 if (function->impl) {
5397 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5398 scan_tess_ctrl(node, &main_block_tf_writemask,
5399 &cond_block_tf_writemask,
5400 &tessfactors_are_def_in_all_invocs,
5401 false);
5402 }
5403 }
5404 }
5405
5406 /* Accumulate the result for the last code segment separated by a
5407 * barrier.
5408 */
5409 if (main_block_tf_writemask || cond_block_tf_writemask) {
5410 tessfactors_are_def_in_all_invocs &=
5411 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5412 }
5413
5414 return tessfactors_are_def_in_all_invocs;
5415 }