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Revert "ac: generate FMA for inexact instructions for radeonsi"
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0, LLVMValueRef src1)
223 {
224 char name[64], type[64];
225 LLVMValueRef params[] = {
226 ac_to_float(ctx, src0),
227 ac_to_float(ctx, src1),
228 };
229
230 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
231 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
240 {
241 char name[64], type[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 ac_to_float(ctx, src2),
246 };
247
248 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
249 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
250 assert(length < sizeof(name));
251 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
252 }
253
254 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
255 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
256 {
257 LLVMTypeRef src1_type = LLVMTypeOf(src1);
258 LLVMTypeRef src2_type = LLVMTypeOf(src2);
259
260 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
261
262 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
263 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
264 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
265 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
266 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
267 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
268 }
269
270 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
271 ctx->i32_0, "");
272 return LLVMBuildSelect(ctx->builder, v,
273 ac_to_integer_or_pointer(ctx, src1),
274 ac_to_integer_or_pointer(ctx, src2), "");
275 }
276
277 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
278 LLVMValueRef src0)
279 {
280 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
281 }
282
283 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
284 const char *intrin,
285 LLVMValueRef src0, LLVMValueRef src1)
286 {
287 LLVMTypeRef ret_type;
288 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
289 LLVMValueRef res;
290 LLVMValueRef params[] = { src0, src1 };
291 ret_type = LLVMStructTypeInContext(ctx->context, types,
292 2, true);
293
294 res = ac_build_intrinsic(ctx, intrin, ret_type,
295 params, 2, AC_FUNC_ATTR_READNONE);
296
297 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
298 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
299 return res;
300 }
301
302 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
307 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
308 "");
309 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
310
311 switch (bitsize) {
312 case 16:
313 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
314 case 32:
315 return result;
316 case 64:
317 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
318 default:
319 unreachable("Unsupported bit size.");
320 }
321 }
322
323 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
324 LLVMValueRef src0)
325 {
326 src0 = ac_to_float(ctx, src0);
327 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
328 return LLVMBuildSExt(ctx->builder,
329 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
330 ctx->i32, "");
331 }
332
333 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
334 LLVMValueRef src0,
335 unsigned bitsize)
336 {
337 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
338
339 switch (bitsize) {
340 case 8:
341 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
342 case 16:
343 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
344 case 32:
345 return result;
346 case 64:
347 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
348 default:
349 unreachable("Unsupported bit size.");
350 }
351 }
352
353 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
354 LLVMValueRef src0)
355 {
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
363 LLVMValueRef src0)
364 {
365 LLVMValueRef result;
366 LLVMValueRef cond = NULL;
367
368 src0 = ac_to_float(ctx, src0);
369 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
370
371 if (ctx->chip_class >= GFX8) {
372 LLVMValueRef args[2];
373 /* Check if the result is a denormal - and flush to 0 if so. */
374 args[0] = result;
375 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
376 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
377 }
378
379 /* need to convert back up to f32 */
380 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
381
382 if (ctx->chip_class >= GFX8)
383 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
384 else {
385 /* for GFX6-GFX7 */
386 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
387 * so compare the result and flush to 0 if it's smaller.
388 */
389 LLVMValueRef temp, cond2;
390 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
391 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
392 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
393 temp, "");
394 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
395 temp, ctx->f32_0, "");
396 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
397 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
398 }
399 return result;
400 }
401
402 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
403 LLVMValueRef src0, LLVMValueRef src1)
404 {
405 LLVMValueRef dst64, result;
406 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
407 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
408
409 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
410 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
411 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
412 return result;
413 }
414
415 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
416 LLVMValueRef src0, LLVMValueRef src1)
417 {
418 LLVMValueRef dst64, result;
419 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
420 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
421
422 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
423 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
424 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
425 return result;
426 }
427
428 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
429 LLVMValueRef bits, LLVMValueRef offset)
430 {
431 /* mask = ((1 << bits) - 1) << offset */
432 return LLVMBuildShl(ctx->builder,
433 LLVMBuildSub(ctx->builder,
434 LLVMBuildShl(ctx->builder,
435 ctx->i32_1,
436 bits, ""),
437 ctx->i32_1, ""),
438 offset, "");
439 }
440
441 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
442 LLVMValueRef mask, LLVMValueRef insert,
443 LLVMValueRef base)
444 {
445 /* Calculate:
446 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
447 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
448 */
449 return LLVMBuildXor(ctx->builder, base,
450 LLVMBuildAnd(ctx->builder, mask,
451 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
452 }
453
454 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
455 LLVMValueRef src0,
456 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
457 LLVMValueRef args[2]))
458 {
459 LLVMValueRef comp[2];
460
461 src0 = ac_to_float(ctx, src0);
462 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
463 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
464
465 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
466 }
467
468 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
469 LLVMValueRef src0)
470 {
471 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
472 LLVMValueRef temps[2], val;
473 int i;
474
475 for (i = 0; i < 2; i++) {
476 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
477 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
478 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
479 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
480 }
481 return ac_build_gather_values(ctx, temps, 2);
482 }
483
484 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
485 nir_op op,
486 LLVMValueRef src0)
487 {
488 unsigned mask;
489 int idx;
490 LLVMValueRef result;
491
492 if (op == nir_op_fddx_fine)
493 mask = AC_TID_MASK_LEFT;
494 else if (op == nir_op_fddy_fine)
495 mask = AC_TID_MASK_TOP;
496 else
497 mask = AC_TID_MASK_TOP_LEFT;
498
499 /* for DDX we want to next X pixel, DDY next Y pixel. */
500 if (op == nir_op_fddx_fine ||
501 op == nir_op_fddx_coarse ||
502 op == nir_op_fddx)
503 idx = 1;
504 else
505 idx = 2;
506
507 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
508 return result;
509 }
510
511 struct waterfall_context {
512 LLVMBasicBlockRef phi_bb[2];
513 bool use_waterfall;
514 };
515
516 /* To deal with divergent descriptors we can create a loop that handles all
517 * lanes with the same descriptor on a given iteration (henceforth a
518 * waterfall loop).
519 *
520 * These helper create the begin and end of the loop leaving the caller
521 * to implement the body.
522 *
523 * params:
524 * - ctx is the usal nir context
525 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
526 * - value is the possibly divergent value for which we built the loop
527 * - divergent is whether value is actually divergent. If false we just pass
528 * things through.
529 */
530 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
531 struct waterfall_context *wctx,
532 LLVMValueRef value, bool divergent)
533 {
534 /* If the app claims the value is divergent but it is constant we can
535 * end up with a dynamic index of NULL. */
536 if (!value)
537 divergent = false;
538
539 wctx->use_waterfall = divergent;
540 if (!divergent)
541 return value;
542
543 ac_build_bgnloop(&ctx->ac, 6000);
544
545 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
546
547 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
548 scalar_value, "uniform_active");
549
550 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
551 ac_build_ifcc(&ctx->ac, active, 6001);
552
553 return scalar_value;
554 }
555
556 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
557 struct waterfall_context *wctx,
558 LLVMValueRef value)
559 {
560 LLVMValueRef ret = NULL;
561 LLVMValueRef phi_src[2];
562 LLVMValueRef cc_phi_src[2] = {
563 LLVMConstInt(ctx->ac.i32, 0, false),
564 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
565 };
566
567 if (!wctx->use_waterfall)
568 return value;
569
570 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
571
572 ac_build_endif(&ctx->ac, 6001);
573
574 if (value) {
575 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
576 phi_src[1] = value;
577
578 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
579 }
580
581 /*
582 * By using the optimization barrier on the exit decision, we decouple
583 * the operations from the break, and hence avoid LLVM hoisting the
584 * opteration into the break block.
585 */
586 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
587 ac_build_optimization_barrier(&ctx->ac, &cc);
588
589 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
590 ac_build_ifcc(&ctx->ac, active, 6002);
591 ac_build_break(&ctx->ac);
592 ac_build_endif(&ctx->ac, 6002);
593
594 ac_build_endloop(&ctx->ac, 6000);
595 return ret;
596 }
597
598 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
599 {
600 LLVMValueRef src[4], result = NULL;
601 unsigned num_components = instr->dest.dest.ssa.num_components;
602 unsigned src_components;
603 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
604
605 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
606 switch (instr->op) {
607 case nir_op_vec2:
608 case nir_op_vec3:
609 case nir_op_vec4:
610 src_components = 1;
611 break;
612 case nir_op_pack_half_2x16:
613 case nir_op_pack_snorm_2x16:
614 case nir_op_pack_unorm_2x16:
615 src_components = 2;
616 break;
617 case nir_op_unpack_half_2x16:
618 src_components = 1;
619 break;
620 case nir_op_cube_face_coord:
621 case nir_op_cube_face_index:
622 src_components = 3;
623 break;
624 default:
625 src_components = num_components;
626 break;
627 }
628 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
629 src[i] = get_alu_src(ctx, instr->src[i], src_components);
630
631 switch (instr->op) {
632 case nir_op_mov:
633 result = src[0];
634 break;
635 case nir_op_fneg:
636 src[0] = ac_to_float(&ctx->ac, src[0]);
637 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
638 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
639 /* fneg will be optimized by backend compiler with sign
640 * bit removed via XOR. This is probably a LLVM bug.
641 */
642 result = ac_build_canonicalize(&ctx->ac, result,
643 instr->dest.dest.ssa.bit_size);
644 }
645 break;
646 case nir_op_ineg:
647 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
648 break;
649 case nir_op_inot:
650 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
651 break;
652 case nir_op_iadd:
653 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
654 break;
655 case nir_op_fadd:
656 src[0] = ac_to_float(&ctx->ac, src[0]);
657 src[1] = ac_to_float(&ctx->ac, src[1]);
658 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
659 break;
660 case nir_op_fsub:
661 src[0] = ac_to_float(&ctx->ac, src[0]);
662 src[1] = ac_to_float(&ctx->ac, src[1]);
663 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
664 break;
665 case nir_op_isub:
666 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
667 break;
668 case nir_op_imul:
669 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
670 break;
671 case nir_op_imod:
672 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
673 break;
674 case nir_op_umod:
675 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
676 break;
677 case nir_op_fmod:
678 /* lower_fmod only lower 16-bit and 32-bit fmod */
679 assert(instr->dest.dest.ssa.bit_size == 64);
680 src[0] = ac_to_float(&ctx->ac, src[0]);
681 src[1] = ac_to_float(&ctx->ac, src[1]);
682 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
683 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
684 ac_to_float_type(&ctx->ac, def_type), result);
685 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
686 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
687 break;
688 case nir_op_irem:
689 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
690 break;
691 case nir_op_idiv:
692 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
693 break;
694 case nir_op_udiv:
695 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
696 break;
697 case nir_op_fmul:
698 src[0] = ac_to_float(&ctx->ac, src[0]);
699 src[1] = ac_to_float(&ctx->ac, src[1]);
700 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
701 break;
702 case nir_op_frcp:
703 /* For doubles, we need precise division to pass GLCTS. */
704 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
705 ac_get_type_size(def_type) == 8) {
706 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
707 ac_to_float(&ctx->ac, src[0]), "");
708 } else {
709 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
710 ac_to_float_type(&ctx->ac, def_type), src[0]);
711 }
712 if (ctx->abi->clamp_div_by_zero)
713 result = ac_build_fmin(&ctx->ac, result,
714 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
715 break;
716 case nir_op_iand:
717 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
718 break;
719 case nir_op_ior:
720 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
721 break;
722 case nir_op_ixor:
723 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
724 break;
725 case nir_op_ishl:
726 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
727 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
728 LLVMTypeOf(src[0]), "");
729 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
730 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
731 LLVMTypeOf(src[0]), "");
732 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
733 break;
734 case nir_op_ishr:
735 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
736 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
737 LLVMTypeOf(src[0]), "");
738 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
739 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
740 LLVMTypeOf(src[0]), "");
741 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
742 break;
743 case nir_op_ushr:
744 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
745 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
746 LLVMTypeOf(src[0]), "");
747 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
748 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
749 LLVMTypeOf(src[0]), "");
750 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
751 break;
752 case nir_op_ilt32:
753 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
754 break;
755 case nir_op_ine32:
756 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
757 break;
758 case nir_op_ieq32:
759 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
760 break;
761 case nir_op_ige32:
762 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
763 break;
764 case nir_op_ult32:
765 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
766 break;
767 case nir_op_uge32:
768 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
769 break;
770 case nir_op_feq32:
771 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
772 break;
773 case nir_op_fneu32:
774 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
775 break;
776 case nir_op_flt32:
777 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
778 break;
779 case nir_op_fge32:
780 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
781 break;
782 case nir_op_fabs:
783 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
784 ac_to_float_type(&ctx->ac, def_type), src[0]);
785 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
786 /* fabs will be optimized by backend compiler with sign
787 * bit removed via AND.
788 */
789 result = ac_build_canonicalize(&ctx->ac, result,
790 instr->dest.dest.ssa.bit_size);
791 }
792 break;
793 case nir_op_iabs:
794 result = emit_iabs(&ctx->ac, src[0]);
795 break;
796 case nir_op_imax:
797 result = ac_build_imax(&ctx->ac, src[0], src[1]);
798 break;
799 case nir_op_imin:
800 result = ac_build_imin(&ctx->ac, src[0], src[1]);
801 break;
802 case nir_op_umax:
803 result = ac_build_umax(&ctx->ac, src[0], src[1]);
804 break;
805 case nir_op_umin:
806 result = ac_build_umin(&ctx->ac, src[0], src[1]);
807 break;
808 case nir_op_isign:
809 result = ac_build_isign(&ctx->ac, src[0],
810 instr->dest.dest.ssa.bit_size);
811 break;
812 case nir_op_fsign:
813 src[0] = ac_to_float(&ctx->ac, src[0]);
814 result = ac_build_fsign(&ctx->ac, src[0],
815 instr->dest.dest.ssa.bit_size);
816 break;
817 case nir_op_ffloor:
818 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
819 ac_to_float_type(&ctx->ac, def_type), src[0]);
820 break;
821 case nir_op_ftrunc:
822 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
823 ac_to_float_type(&ctx->ac, def_type), src[0]);
824 break;
825 case nir_op_fceil:
826 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
827 ac_to_float_type(&ctx->ac, def_type), src[0]);
828 break;
829 case nir_op_fround_even:
830 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
831 ac_to_float_type(&ctx->ac, def_type),src[0]);
832 break;
833 case nir_op_ffract:
834 src[0] = ac_to_float(&ctx->ac, src[0]);
835 result = ac_build_fract(&ctx->ac, src[0],
836 instr->dest.dest.ssa.bit_size);
837 break;
838 case nir_op_fsin:
839 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
840 ac_to_float_type(&ctx->ac, def_type), src[0]);
841 break;
842 case nir_op_fcos:
843 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
844 ac_to_float_type(&ctx->ac, def_type), src[0]);
845 break;
846 case nir_op_fsqrt:
847 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
848 ac_to_float_type(&ctx->ac, def_type), src[0]);
849 break;
850 case nir_op_fexp2:
851 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
852 ac_to_float_type(&ctx->ac, def_type), src[0]);
853 break;
854 case nir_op_flog2:
855 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
856 ac_to_float_type(&ctx->ac, def_type), src[0]);
857 break;
858 case nir_op_frsq:
859 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
860 ac_to_float_type(&ctx->ac, def_type), src[0]);
861 if (ctx->abi->clamp_div_by_zero)
862 result = ac_build_fmin(&ctx->ac, result,
863 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
864 break;
865 case nir_op_frexp_exp:
866 src[0] = ac_to_float(&ctx->ac, src[0]);
867 result = ac_build_frexp_exp(&ctx->ac, src[0],
868 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
869 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
870 result = LLVMBuildSExt(ctx->ac.builder, result,
871 ctx->ac.i32, "");
872 break;
873 case nir_op_frexp_sig:
874 src[0] = ac_to_float(&ctx->ac, src[0]);
875 result = ac_build_frexp_mant(&ctx->ac, src[0],
876 instr->dest.dest.ssa.bit_size);
877 break;
878 case nir_op_fpow:
879 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
880 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
881 break;
882 case nir_op_fmax:
883 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
884 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
885 if (ctx->ac.chip_class < GFX9 &&
886 instr->dest.dest.ssa.bit_size == 32) {
887 /* Only pre-GFX9 chips do not flush denorms. */
888 result = ac_build_canonicalize(&ctx->ac, result,
889 instr->dest.dest.ssa.bit_size);
890 }
891 break;
892 case nir_op_fmin:
893 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
894 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
895 if (ctx->ac.chip_class < GFX9 &&
896 instr->dest.dest.ssa.bit_size == 32) {
897 /* Only pre-GFX9 chips do not flush denorms. */
898 result = ac_build_canonicalize(&ctx->ac, result,
899 instr->dest.dest.ssa.bit_size);
900 }
901 break;
902 case nir_op_ffma:
903 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
904 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
905 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
906 break;
907 case nir_op_ldexp:
908 src[0] = ac_to_float(&ctx->ac, src[0]);
909 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
910 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
911 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
912 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
913 else
914 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
915 break;
916 case nir_op_bfm:
917 result = emit_bfm(&ctx->ac, src[0], src[1]);
918 break;
919 case nir_op_bitfield_select:
920 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
921 break;
922 case nir_op_ubfe:
923 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
924 break;
925 case nir_op_ibfe:
926 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
927 break;
928 case nir_op_bitfield_reverse:
929 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
930 break;
931 case nir_op_bit_count:
932 result = ac_build_bit_count(&ctx->ac, src[0]);
933 break;
934 case nir_op_vec2:
935 case nir_op_vec3:
936 case nir_op_vec4:
937 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
938 src[i] = ac_to_integer(&ctx->ac, src[i]);
939 result = ac_build_gather_values(&ctx->ac, src, num_components);
940 break;
941 case nir_op_f2i8:
942 case nir_op_f2i16:
943 case nir_op_f2i32:
944 case nir_op_f2i64:
945 src[0] = ac_to_float(&ctx->ac, src[0]);
946 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
947 break;
948 case nir_op_f2u8:
949 case nir_op_f2u16:
950 case nir_op_f2u32:
951 case nir_op_f2u64:
952 src[0] = ac_to_float(&ctx->ac, src[0]);
953 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
954 break;
955 case nir_op_i2f16:
956 case nir_op_i2f32:
957 case nir_op_i2f64:
958 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
959 break;
960 case nir_op_u2f16:
961 case nir_op_u2f32:
962 case nir_op_u2f64:
963 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
964 break;
965 case nir_op_f2f16_rtz:
966 case nir_op_f2f16:
967 case nir_op_f2fmp:
968 src[0] = ac_to_float(&ctx->ac, src[0]);
969
970 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
971 * all f32->f16 conversions have to round towards zero, because both scalar
972 * and vec2 down-conversions have to round equally.
973 */
974 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
975 instr->op == nir_op_f2f16_rtz) {
976 src[0] = ac_to_float(&ctx->ac, src[0]);
977
978 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
979 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
980
981 /* Fast path conversion. This only works if NIR is vectorized
982 * to vec2 16.
983 */
984 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
985 LLVMValueRef args[] = {
986 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
987 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
988 };
989 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
990 break;
991 }
992
993 assert(ac_get_llvm_num_components(src[0]) == 1);
994 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
995 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
996 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
997 } else {
998 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
999 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1000 else
1001 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1002 }
1003 break;
1004 case nir_op_f2f16_rtne:
1005 case nir_op_f2f32:
1006 case nir_op_f2f64:
1007 src[0] = ac_to_float(&ctx->ac, src[0]);
1008 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1009 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1010 else
1011 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1012 break;
1013 case nir_op_u2u8:
1014 case nir_op_u2u16:
1015 case nir_op_u2ump:
1016 case nir_op_u2u32:
1017 case nir_op_u2u64:
1018 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1019 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1020 else
1021 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1022 break;
1023 case nir_op_i2i8:
1024 case nir_op_i2i16:
1025 case nir_op_i2imp:
1026 case nir_op_i2i32:
1027 case nir_op_i2i64:
1028 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1029 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1030 else
1031 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1032 break;
1033 case nir_op_b32csel:
1034 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1035 break;
1036 case nir_op_find_lsb:
1037 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1038 break;
1039 case nir_op_ufind_msb:
1040 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1041 break;
1042 case nir_op_ifind_msb:
1043 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1044 break;
1045 case nir_op_uadd_carry:
1046 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1047 break;
1048 case nir_op_usub_borrow:
1049 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1050 break;
1051 case nir_op_b2f16:
1052 case nir_op_b2f32:
1053 case nir_op_b2f64:
1054 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1055 break;
1056 case nir_op_f2b32:
1057 result = emit_f2b(&ctx->ac, src[0]);
1058 break;
1059 case nir_op_b2i8:
1060 case nir_op_b2i16:
1061 case nir_op_b2i32:
1062 case nir_op_b2i64:
1063 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1064 break;
1065 case nir_op_i2b32:
1066 result = emit_i2b(&ctx->ac, src[0]);
1067 break;
1068 case nir_op_fquantize2f16:
1069 result = emit_f2f16(&ctx->ac, src[0]);
1070 break;
1071 case nir_op_umul_high:
1072 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1073 break;
1074 case nir_op_imul_high:
1075 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1076 break;
1077 case nir_op_pack_half_2x16:
1078 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1079 break;
1080 case nir_op_pack_snorm_2x16:
1081 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1082 break;
1083 case nir_op_pack_unorm_2x16:
1084 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1085 break;
1086 case nir_op_unpack_half_2x16:
1087 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1088 break;
1089 case nir_op_fddx:
1090 case nir_op_fddy:
1091 case nir_op_fddx_fine:
1092 case nir_op_fddy_fine:
1093 case nir_op_fddx_coarse:
1094 case nir_op_fddy_coarse:
1095 result = emit_ddxy(ctx, instr->op, src[0]);
1096 break;
1097
1098 case nir_op_unpack_64_2x32_split_x: {
1099 assert(ac_get_llvm_num_components(src[0]) == 1);
1100 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1101 ctx->ac.v2i32,
1102 "");
1103 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1104 ctx->ac.i32_0, "");
1105 break;
1106 }
1107
1108 case nir_op_unpack_64_2x32_split_y: {
1109 assert(ac_get_llvm_num_components(src[0]) == 1);
1110 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1111 ctx->ac.v2i32,
1112 "");
1113 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1114 ctx->ac.i32_1, "");
1115 break;
1116 }
1117
1118 case nir_op_pack_64_2x32_split: {
1119 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1120 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1121 break;
1122 }
1123
1124 case nir_op_pack_32_2x16_split: {
1125 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1126 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1127 break;
1128 }
1129
1130 case nir_op_unpack_32_2x16_split_x: {
1131 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1132 ctx->ac.v2i16,
1133 "");
1134 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1135 ctx->ac.i32_0, "");
1136 break;
1137 }
1138
1139 case nir_op_unpack_32_2x16_split_y: {
1140 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1141 ctx->ac.v2i16,
1142 "");
1143 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1144 ctx->ac.i32_1, "");
1145 break;
1146 }
1147
1148 case nir_op_cube_face_coord: {
1149 src[0] = ac_to_float(&ctx->ac, src[0]);
1150 LLVMValueRef results[2];
1151 LLVMValueRef in[3];
1152 for (unsigned chan = 0; chan < 3; chan++)
1153 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1154 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1155 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1156 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1157 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1158 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1159 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1160 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1161 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1162 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1163 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1164 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1165 result = ac_build_gather_values(&ctx->ac, results, 2);
1166 break;
1167 }
1168
1169 case nir_op_cube_face_index: {
1170 src[0] = ac_to_float(&ctx->ac, src[0]);
1171 LLVMValueRef in[3];
1172 for (unsigned chan = 0; chan < 3; chan++)
1173 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1174 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1175 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1176 break;
1177 }
1178
1179 default:
1180 fprintf(stderr, "Unknown NIR alu instr: ");
1181 nir_print_instr(&instr->instr, stderr);
1182 fprintf(stderr, "\n");
1183 abort();
1184 }
1185
1186 if (result) {
1187 assert(instr->dest.dest.is_ssa);
1188 result = ac_to_integer_or_pointer(&ctx->ac, result);
1189 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1190 }
1191 }
1192
1193 static void visit_load_const(struct ac_nir_context *ctx,
1194 const nir_load_const_instr *instr)
1195 {
1196 LLVMValueRef values[4], value = NULL;
1197 LLVMTypeRef element_type =
1198 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1199
1200 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1201 switch (instr->def.bit_size) {
1202 case 8:
1203 values[i] = LLVMConstInt(element_type,
1204 instr->value[i].u8, false);
1205 break;
1206 case 16:
1207 values[i] = LLVMConstInt(element_type,
1208 instr->value[i].u16, false);
1209 break;
1210 case 32:
1211 values[i] = LLVMConstInt(element_type,
1212 instr->value[i].u32, false);
1213 break;
1214 case 64:
1215 values[i] = LLVMConstInt(element_type,
1216 instr->value[i].u64, false);
1217 break;
1218 default:
1219 fprintf(stderr,
1220 "unsupported nir load_const bit_size: %d\n",
1221 instr->def.bit_size);
1222 abort();
1223 }
1224 }
1225 if (instr->def.num_components > 1) {
1226 value = LLVMConstVector(values, instr->def.num_components);
1227 } else
1228 value = values[0];
1229
1230 ctx->ssa_defs[instr->def.index] = value;
1231 }
1232
1233 static LLVMValueRef
1234 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1235 {
1236 LLVMValueRef size =
1237 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1238 LLVMConstInt(ctx->ac.i32, 2, false), "");
1239
1240 /* GFX8 only */
1241 if (ctx->ac.chip_class == GFX8 && in_elements) {
1242 /* On GFX8, the descriptor contains the size in bytes,
1243 * but TXQ must return the size in elements.
1244 * The stride is always non-zero for resources using TXQ.
1245 */
1246 LLVMValueRef stride =
1247 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1248 ctx->ac.i32_1, "");
1249 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1250 LLVMConstInt(ctx->ac.i32, 16, false), "");
1251 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1252 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1253
1254 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1255 }
1256 return size;
1257 }
1258
1259 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1260 * incorrectly forces nearest filtering if the texture format is integer.
1261 * The only effect it has on Gather4, which always returns 4 texels for
1262 * bilinear filtering, is that the final coordinates are off by 0.5 of
1263 * the texel size.
1264 *
1265 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1266 * or (0.5 / size) from the normalized coordinates.
1267 *
1268 * However, cube textures with 8_8_8_8 data formats require a different
1269 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1270 * precision in 32-bit data formats, so it needs to be applied dynamically at
1271 * runtime. In this case, return an i1 value that indicates whether the
1272 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1273 */
1274 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1275 nir_variable *var,
1276 struct ac_image_args *args,
1277 const nir_tex_instr *instr)
1278 {
1279 const struct glsl_type *type = glsl_without_array(var->type);
1280 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1281 LLVMValueRef wa_8888 = NULL;
1282 LLVMValueRef half_texel[2];
1283 LLVMValueRef result;
1284
1285 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1286
1287 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1288 LLVMValueRef formats;
1289 LLVMValueRef data_format;
1290 LLVMValueRef wa_formats;
1291
1292 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1293
1294 data_format = LLVMBuildLShr(ctx->builder, formats,
1295 LLVMConstInt(ctx->i32, 20, false), "");
1296 data_format = LLVMBuildAnd(ctx->builder, data_format,
1297 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1298 wa_8888 = LLVMBuildICmp(
1299 ctx->builder, LLVMIntEQ, data_format,
1300 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1301 "");
1302
1303 uint32_t wa_num_format =
1304 stype == GLSL_TYPE_UINT ?
1305 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1306 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1307 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1308 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1309 "");
1310 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1311 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1312
1313 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1314 args->resource = LLVMBuildInsertElement(
1315 ctx->builder, args->resource, formats, ctx->i32_1, "");
1316 }
1317
1318 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1319 assert(!wa_8888);
1320 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1321 } else {
1322 struct ac_image_args resinfo = {};
1323 LLVMBasicBlockRef bbs[2];
1324
1325 LLVMValueRef unnorm = NULL;
1326 LLVMValueRef default_offset = ctx->f32_0;
1327 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1328 !instr->is_array) {
1329 /* In vulkan, whether the sampler uses unnormalized
1330 * coordinates or not is a dynamic property of the
1331 * sampler. Hence, to figure out whether or not we
1332 * need to divide by the texture size, we need to test
1333 * the sampler at runtime. This tests the bit set by
1334 * radv_init_sampler().
1335 */
1336 LLVMValueRef sampler0 =
1337 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1338 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1339 LLVMConstInt(ctx->i32, 15, false), "");
1340 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1341 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1342 default_offset = LLVMConstReal(ctx->f32, -0.5);
1343 }
1344
1345 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1346 if (wa_8888 || unnorm) {
1347 assert(!(wa_8888 && unnorm));
1348 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1349 /* Skip the texture size query entirely if we don't need it. */
1350 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1351 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1352 }
1353
1354 /* Query the texture size. */
1355 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1356 resinfo.opcode = ac_image_get_resinfo;
1357 resinfo.dmask = 0xf;
1358 resinfo.lod = ctx->i32_0;
1359 resinfo.resource = args->resource;
1360 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1361 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1362
1363 /* Compute -0.5 / size. */
1364 for (unsigned c = 0; c < 2; c++) {
1365 half_texel[c] =
1366 LLVMBuildExtractElement(ctx->builder, size,
1367 LLVMConstInt(ctx->i32, c, 0), "");
1368 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1369 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1370 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1371 LLVMConstReal(ctx->f32, -0.5), "");
1372 }
1373
1374 if (wa_8888 || unnorm) {
1375 ac_build_endif(ctx, 2000);
1376
1377 for (unsigned c = 0; c < 2; c++) {
1378 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1379 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1380 values, bbs);
1381 }
1382 }
1383 }
1384
1385 for (unsigned c = 0; c < 2; c++) {
1386 LLVMValueRef tmp;
1387 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1388 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1389 }
1390
1391 args->attributes = AC_FUNC_ATTR_READNONE;
1392 result = ac_build_image_opcode(ctx, args);
1393
1394 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1395 LLVMValueRef tmp, tmp2;
1396
1397 /* if the cube workaround is in place, f2i the result. */
1398 for (unsigned c = 0; c < 4; c++) {
1399 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1400 if (stype == GLSL_TYPE_UINT)
1401 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1402 else
1403 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1404 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1405 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1406 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1407 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1408 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1409 }
1410 }
1411 return result;
1412 }
1413
1414 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1415 {
1416 nir_deref_instr *texture_deref_instr = NULL;
1417
1418 for (unsigned i = 0; i < instr->num_srcs; i++) {
1419 switch (instr->src[i].src_type) {
1420 case nir_tex_src_texture_deref:
1421 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1422 break;
1423 default:
1424 break;
1425 }
1426 }
1427 return texture_deref_instr;
1428 }
1429
1430 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1431 const nir_tex_instr *instr,
1432 struct ac_image_args *args)
1433 {
1434 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1435 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1436
1437 assert(instr->dest.is_ssa);
1438 return ac_build_buffer_load_format(&ctx->ac,
1439 args->resource,
1440 args->coords[0],
1441 ctx->ac.i32_0,
1442 util_last_bit(mask),
1443 0, true,
1444 instr->dest.ssa.bit_size == 16);
1445 }
1446
1447 args->opcode = ac_image_sample;
1448
1449 switch (instr->op) {
1450 case nir_texop_txf:
1451 case nir_texop_txf_ms:
1452 case nir_texop_samples_identical:
1453 args->opcode = args->level_zero ||
1454 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1455 ac_image_load : ac_image_load_mip;
1456 args->level_zero = false;
1457 break;
1458 case nir_texop_txs:
1459 case nir_texop_query_levels:
1460 args->opcode = ac_image_get_resinfo;
1461 if (!args->lod)
1462 args->lod = ctx->ac.i32_0;
1463 args->level_zero = false;
1464 break;
1465 case nir_texop_tex:
1466 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1467 assert(!args->lod);
1468 args->level_zero = true;
1469 }
1470 break;
1471 case nir_texop_tg4:
1472 args->opcode = ac_image_gather4;
1473 if (!args->lod && !args->bias)
1474 args->level_zero = true;
1475 break;
1476 case nir_texop_lod:
1477 args->opcode = ac_image_get_lod;
1478 break;
1479 case nir_texop_fragment_fetch:
1480 case nir_texop_fragment_mask_fetch:
1481 args->opcode = ac_image_load;
1482 args->level_zero = false;
1483 break;
1484 default:
1485 break;
1486 }
1487
1488 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1489 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1490 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1491 const struct glsl_type *type = glsl_without_array(var->type);
1492 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1493 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1494 return lower_gather4_integer(&ctx->ac, var, args, instr);
1495 }
1496 }
1497
1498 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1499 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1500 if ((args->dim == ac_image_2darray ||
1501 args->dim == ac_image_2d) && !args->coords[1]) {
1502 args->coords[1] = ctx->ac.i32_0;
1503 }
1504 }
1505
1506 args->attributes = AC_FUNC_ATTR_READNONE;
1507 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1508 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1509 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1510 /* Prevent texture instructions with implicit derivatives from being
1511 * sinked into branches. */
1512 switch (instr->op) {
1513 case nir_texop_tex:
1514 case nir_texop_txb:
1515 case nir_texop_lod:
1516 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1517 break;
1518 default:
1519 break;
1520 }
1521 }
1522
1523 return ac_build_image_opcode(&ctx->ac, args);
1524 }
1525
1526 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1527 nir_intrinsic_instr *instr)
1528 {
1529 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1530 LLVMValueRef index = get_src(ctx, instr->src[1]);
1531
1532 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1533 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1534 return result;
1535 }
1536
1537 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1538 nir_intrinsic_instr *instr)
1539 {
1540 LLVMValueRef ptr, addr;
1541 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1542 unsigned index = nir_intrinsic_base(instr);
1543
1544 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1545 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1546
1547 /* Load constant values from user SGPRS when possible, otherwise
1548 * fallback to the default path that loads directly from memory.
1549 */
1550 if (LLVMIsConstant(src0) &&
1551 instr->dest.ssa.bit_size == 32) {
1552 unsigned count = instr->dest.ssa.num_components;
1553 unsigned offset = index;
1554
1555 offset += LLVMConstIntGetZExtValue(src0);
1556 offset /= 4;
1557
1558 offset -= ctx->args->base_inline_push_consts;
1559
1560 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1561 if (offset + count <= num_inline_push_consts) {
1562 LLVMValueRef push_constants[num_inline_push_consts];
1563 for (unsigned i = 0; i < num_inline_push_consts; i++)
1564 push_constants[i] = ac_get_arg(&ctx->ac,
1565 ctx->args->inline_push_consts[i]);
1566 return ac_build_gather_values(&ctx->ac,
1567 push_constants + offset,
1568 count);
1569 }
1570 }
1571
1572 ptr = LLVMBuildGEP(ctx->ac.builder,
1573 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1574
1575 if (instr->dest.ssa.bit_size == 8) {
1576 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1577 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1578 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1579 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1580
1581 LLVMValueRef params[3];
1582 if (load_dwords > 1) {
1583 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1584 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1585 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1586 } else {
1587 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1588 params[0] = ctx->ac.i32_0;
1589 params[1] = res;
1590 }
1591 params[2] = addr;
1592 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1593
1594 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1595 if (instr->dest.ssa.num_components > 1)
1596 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1597 return res;
1598 } else if (instr->dest.ssa.bit_size == 16) {
1599 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1600 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1601 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1602 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1603 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1604 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1605 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1606 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1607 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1608 LLVMConstInt(ctx->ac.i32, 4, false)};
1609 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1610 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1611 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1612 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1613 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1614 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1615 }
1616
1617 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1618
1619 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1620 }
1621
1622 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1623 const nir_intrinsic_instr *instr)
1624 {
1625 LLVMValueRef index = get_src(ctx, instr->src[0]);
1626
1627 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1628 }
1629
1630 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1631 {
1632 uint32_t new_mask = 0;
1633 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1634 if (mask & (1u << i))
1635 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1636 return new_mask;
1637 }
1638
1639 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1640 unsigned start, unsigned count)
1641 {
1642 LLVMValueRef mask[] = {
1643 ctx->i32_0, ctx->i32_1,
1644 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1645
1646 unsigned src_elements = ac_get_llvm_num_components(src);
1647
1648 if (count == src_elements) {
1649 assert(start == 0);
1650 return src;
1651 } else if (count == 1) {
1652 assert(start < src_elements);
1653 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1654 } else {
1655 assert(start + count <= src_elements);
1656 assert(count <= 4);
1657 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1658 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1659 }
1660 }
1661
1662 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1663 enum gl_access_qualifier access,
1664 bool may_store_unaligned,
1665 bool writeonly_memory)
1666 {
1667 unsigned cache_policy = 0;
1668
1669 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1670 * store opcodes not aligned to a dword are affected. The only way to
1671 * get unaligned stores is through shader images.
1672 */
1673 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1674 /* If this is write-only, don't keep data in L1 to prevent
1675 * evicting L1 cache lines that may be needed by other
1676 * instructions.
1677 */
1678 writeonly_memory ||
1679 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1680 cache_policy |= ac_glc;
1681 }
1682
1683 if (access & ACCESS_STREAM_CACHE_POLICY)
1684 cache_policy |= ac_slc | ac_glc;
1685
1686 return cache_policy;
1687 }
1688
1689 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1690 struct waterfall_context *wctx,
1691 const nir_intrinsic_instr *instr,
1692 nir_src src)
1693 {
1694 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1695 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1696 }
1697
1698 static void visit_store_ssbo(struct ac_nir_context *ctx,
1699 nir_intrinsic_instr *instr)
1700 {
1701 if (ctx->ac.postponed_kill) {
1702 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1703 ctx->ac.postponed_kill, "");
1704 ac_build_ifcc(&ctx->ac, cond, 7000);
1705 }
1706
1707 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1708 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1709 unsigned writemask = nir_intrinsic_write_mask(instr);
1710 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1711 bool writeonly_memory = access & ACCESS_NON_READABLE;
1712 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1713
1714 struct waterfall_context wctx;
1715 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1716
1717 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1718 LLVMValueRef base_data = src_data;
1719 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1720 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1721
1722 while (writemask) {
1723 int start, count;
1724 LLVMValueRef data, offset;
1725 LLVMTypeRef data_type;
1726
1727 u_bit_scan_consecutive_range(&writemask, &start, &count);
1728
1729 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1730 * writes into a 2-element and a 1-element write. */
1731 if (count == 3 &&
1732 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1733 writemask |= 1 << (start + 2);
1734 count = 2;
1735 }
1736 int num_bytes = count * elem_size_bytes; /* count in bytes */
1737
1738 /* we can only store 4 DWords at the same time.
1739 * can only happen for 64 Bit vectors. */
1740 if (num_bytes > 16) {
1741 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1742 count = 2;
1743 num_bytes = 16;
1744 }
1745
1746 /* check alignment of 16 Bit stores */
1747 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1748 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1749 count = 1;
1750 num_bytes = 2;
1751 }
1752
1753 /* Due to alignment issues, split stores of 8-bit/16-bit
1754 * vectors.
1755 */
1756 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1757 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1758 count = 1;
1759 num_bytes = elem_size_bytes;
1760 }
1761
1762 data = extract_vector_range(&ctx->ac, base_data, start, count);
1763
1764 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1765 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1766
1767 if (num_bytes == 1) {
1768 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1769 offset, ctx->ac.i32_0,
1770 cache_policy);
1771 } else if (num_bytes == 2) {
1772 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1773 offset, ctx->ac.i32_0,
1774 cache_policy);
1775 } else {
1776 int num_channels = num_bytes / 4;
1777
1778 switch (num_bytes) {
1779 case 16: /* v4f32 */
1780 data_type = ctx->ac.v4f32;
1781 break;
1782 case 12: /* v3f32 */
1783 data_type = ctx->ac.v3f32;
1784 break;
1785 case 8: /* v2f32 */
1786 data_type = ctx->ac.v2f32;
1787 break;
1788 case 4: /* f32 */
1789 data_type = ctx->ac.f32;
1790 break;
1791 default:
1792 unreachable("Malformed vector store.");
1793 }
1794 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1795
1796 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1797 num_channels, offset,
1798 ctx->ac.i32_0, 0,
1799 cache_policy);
1800 }
1801 }
1802
1803 exit_waterfall(ctx, &wctx, NULL);
1804
1805 if (ctx->ac.postponed_kill)
1806 ac_build_endif(&ctx->ac, 7000);
1807 }
1808
1809 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1810 LLVMValueRef descriptor,
1811 LLVMValueRef offset,
1812 LLVMValueRef compare,
1813 LLVMValueRef exchange)
1814 {
1815 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1816 if (ctx->abi->robust_buffer_access) {
1817 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1818
1819 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1820 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1821
1822 ac_build_ifcc(&ctx->ac, cond, -1);
1823
1824 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1825 }
1826
1827 LLVMValueRef ptr_parts[2] = {
1828 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1829 LLVMBuildAnd(ctx->ac.builder,
1830 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1831 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1832 };
1833
1834 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1835 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1836
1837 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1838
1839 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1840 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1841 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1842 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1843
1844 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1845 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1846
1847 if (ctx->abi->robust_buffer_access) {
1848 ac_build_endif(&ctx->ac, -1);
1849
1850 LLVMBasicBlockRef incoming_blocks[2] = {
1851 start_block,
1852 then_block,
1853 };
1854
1855 LLVMValueRef incoming_values[2] = {
1856 LLVMConstInt(ctx->ac.i64, 0, 0),
1857 result,
1858 };
1859 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1860 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1861 return ret;
1862 } else {
1863 return result;
1864 }
1865 }
1866
1867 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1868 nir_intrinsic_instr *instr)
1869 {
1870 if (ctx->ac.postponed_kill) {
1871 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1872 ctx->ac.postponed_kill, "");
1873 ac_build_ifcc(&ctx->ac, cond, 7001);
1874 }
1875
1876 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1877 const char *op;
1878 char name[64], type[8];
1879 LLVMValueRef params[6], descriptor;
1880 LLVMValueRef result;
1881 int arg_count = 0;
1882
1883 struct waterfall_context wctx;
1884 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1885
1886 switch (instr->intrinsic) {
1887 case nir_intrinsic_ssbo_atomic_add:
1888 op = "add";
1889 break;
1890 case nir_intrinsic_ssbo_atomic_imin:
1891 op = "smin";
1892 break;
1893 case nir_intrinsic_ssbo_atomic_umin:
1894 op = "umin";
1895 break;
1896 case nir_intrinsic_ssbo_atomic_imax:
1897 op = "smax";
1898 break;
1899 case nir_intrinsic_ssbo_atomic_umax:
1900 op = "umax";
1901 break;
1902 case nir_intrinsic_ssbo_atomic_and:
1903 op = "and";
1904 break;
1905 case nir_intrinsic_ssbo_atomic_or:
1906 op = "or";
1907 break;
1908 case nir_intrinsic_ssbo_atomic_xor:
1909 op = "xor";
1910 break;
1911 case nir_intrinsic_ssbo_atomic_exchange:
1912 op = "swap";
1913 break;
1914 case nir_intrinsic_ssbo_atomic_comp_swap:
1915 op = "cmpswap";
1916 break;
1917 default:
1918 abort();
1919 }
1920
1921 descriptor = ctx->abi->load_ssbo(ctx->abi,
1922 rsrc_base,
1923 true);
1924
1925 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1926 return_type == ctx->ac.i64) {
1927 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1928 get_src(ctx, instr->src[1]),
1929 get_src(ctx, instr->src[2]),
1930 get_src(ctx, instr->src[3]));
1931 } else {
1932 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1933 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1934 }
1935 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1936 params[arg_count++] = descriptor;
1937
1938 if (LLVM_VERSION_MAJOR >= 9) {
1939 /* XXX: The new raw/struct atomic intrinsics are buggy with
1940 * LLVM 8, see r358579.
1941 */
1942 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1943 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1944 params[arg_count++] = ctx->ac.i32_0; /* slc */
1945
1946 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1947 snprintf(name, sizeof(name),
1948 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1949 } else {
1950 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1951 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1952 params[arg_count++] = ctx->ac.i1false; /* slc */
1953
1954 assert(return_type == ctx->ac.i32);
1955 snprintf(name, sizeof(name),
1956 "llvm.amdgcn.buffer.atomic.%s", op);
1957 }
1958
1959 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1960 arg_count, 0);
1961 }
1962
1963 result = exit_waterfall(ctx, &wctx, result);
1964 if (ctx->ac.postponed_kill)
1965 ac_build_endif(&ctx->ac, 7001);
1966 return result;
1967 }
1968
1969 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1970 nir_intrinsic_instr *instr)
1971 {
1972 struct waterfall_context wctx;
1973 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1974
1975 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1976 int num_components = instr->num_components;
1977 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1978 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1979
1980 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1981 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1982 LLVMValueRef vindex = ctx->ac.i32_0;
1983
1984 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1985 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1986
1987 LLVMValueRef results[4];
1988 for (int i = 0; i < num_components;) {
1989 int num_elems = num_components - i;
1990 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1991 num_elems = 1;
1992 if (num_elems * elem_size_bytes > 16)
1993 num_elems = 16 / elem_size_bytes;
1994 int load_bytes = num_elems * elem_size_bytes;
1995
1996 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1997
1998 LLVMValueRef ret;
1999
2000 if (load_bytes == 1) {
2001 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2002 rsrc,
2003 offset,
2004 ctx->ac.i32_0,
2005 immoffset,
2006 cache_policy);
2007 } else if (load_bytes == 2) {
2008 ret = ac_build_tbuffer_load_short(&ctx->ac,
2009 rsrc,
2010 offset,
2011 ctx->ac.i32_0,
2012 immoffset,
2013 cache_policy);
2014 } else {
2015 int num_channels = util_next_power_of_two(load_bytes) / 4;
2016 bool can_speculate = access & ACCESS_CAN_REORDER;
2017
2018 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2019 vindex, offset, immoffset, 0,
2020 cache_policy, can_speculate, false);
2021 }
2022
2023 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2024 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2025 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2026
2027 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2028 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2029
2030 for (unsigned j = 0; j < num_elems; j++) {
2031 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2032 }
2033 i += num_elems;
2034 }
2035
2036 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2037 return exit_waterfall(ctx, &wctx, ret);
2038 }
2039
2040 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2041 struct waterfall_context *wctx,
2042 const nir_intrinsic_instr *instr)
2043 {
2044 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2045 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2046 }
2047
2048 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2049 nir_intrinsic_instr *instr)
2050 {
2051 struct waterfall_context wctx;
2052 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2053
2054 LLVMValueRef ret;
2055 LLVMValueRef rsrc = rsrc_base;
2056 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2057 int num_components = instr->num_components;
2058
2059 if (ctx->abi->load_ubo)
2060 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2061
2062 if (instr->dest.ssa.bit_size == 64)
2063 num_components *= 2;
2064
2065 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2066 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2067 LLVMValueRef results[num_components];
2068 for (unsigned i = 0; i < num_components; ++i) {
2069 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2070 load_bytes * i, 0);
2071
2072 if (load_bytes == 1) {
2073 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2074 rsrc,
2075 offset,
2076 ctx->ac.i32_0,
2077 immoffset,
2078 0);
2079 } else {
2080 assert(load_bytes == 2);
2081 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2082 rsrc,
2083 offset,
2084 ctx->ac.i32_0,
2085 immoffset,
2086 0);
2087 }
2088 }
2089 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2090 } else {
2091 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2092 NULL, 0, 0, true, true);
2093
2094 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2095 }
2096
2097 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2098 get_def_type(ctx, &instr->dest.ssa), "");
2099
2100 return exit_waterfall(ctx, &wctx, ret);
2101 }
2102
2103 static void
2104 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2105 bool vs_in, unsigned *vertex_index_out,
2106 LLVMValueRef *vertex_index_ref,
2107 unsigned *const_out, LLVMValueRef *indir_out)
2108 {
2109 nir_variable *var = nir_deref_instr_get_variable(instr);
2110 nir_deref_path path;
2111 unsigned idx_lvl = 1;
2112
2113 nir_deref_path_init(&path, instr, NULL);
2114
2115 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2116 if (vertex_index_ref) {
2117 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2118 if (vertex_index_out)
2119 *vertex_index_out = 0;
2120 } else {
2121 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2122 }
2123 ++idx_lvl;
2124 }
2125
2126 uint32_t const_offset = 0;
2127 LLVMValueRef offset = NULL;
2128
2129 if (var->data.compact) {
2130 assert(instr->deref_type == nir_deref_type_array);
2131 const_offset = nir_src_as_uint(instr->arr.index);
2132 goto out;
2133 }
2134
2135 for (; path.path[idx_lvl]; ++idx_lvl) {
2136 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2137 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2138 unsigned index = path.path[idx_lvl]->strct.index;
2139
2140 for (unsigned i = 0; i < index; i++) {
2141 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2142 const_offset += glsl_count_attribute_slots(ft, vs_in);
2143 }
2144 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2145 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2146 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2147 const_offset += size *
2148 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2149 } else {
2150 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2151 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2152 if (offset)
2153 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2154 else
2155 offset = array_off;
2156 }
2157 } else
2158 unreachable("Uhandled deref type in get_deref_instr_offset");
2159 }
2160
2161 out:
2162 nir_deref_path_finish(&path);
2163
2164 if (const_offset && offset)
2165 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2166 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2167 "");
2168
2169 *const_out = const_offset;
2170 *indir_out = offset;
2171 }
2172
2173 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2174 nir_intrinsic_instr *instr,
2175 bool load_inputs)
2176 {
2177 LLVMValueRef result;
2178 LLVMValueRef vertex_index = NULL;
2179 LLVMValueRef indir_index = NULL;
2180 unsigned const_index = 0;
2181
2182 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2183
2184 unsigned location = var->data.location;
2185 unsigned driver_location = var->data.driver_location;
2186 const bool is_patch = var->data.patch ||
2187 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2188 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2189 const bool is_compact = var->data.compact;
2190
2191 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2192 false, NULL, is_patch ? NULL : &vertex_index,
2193 &const_index, &indir_index);
2194
2195 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2196
2197 LLVMTypeRef src_component_type;
2198 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2199 src_component_type = LLVMGetElementType(dest_type);
2200 else
2201 src_component_type = dest_type;
2202
2203 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2204 vertex_index, indir_index,
2205 const_index, location, driver_location,
2206 var->data.location_frac,
2207 instr->num_components,
2208 is_patch, is_compact, load_inputs);
2209 if (instr->dest.ssa.bit_size == 16) {
2210 result = ac_to_integer(&ctx->ac, result);
2211 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2212 }
2213 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2214 }
2215
2216 static unsigned
2217 type_scalar_size_bytes(const struct glsl_type *type)
2218 {
2219 assert(glsl_type_is_vector_or_scalar(type) ||
2220 glsl_type_is_matrix(type));
2221 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2222 }
2223
2224 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2225 nir_intrinsic_instr *instr)
2226 {
2227 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2228 nir_variable *var = nir_deref_instr_get_variable(deref);
2229
2230 LLVMValueRef values[8];
2231 int idx = 0;
2232 int ve = instr->dest.ssa.num_components;
2233 unsigned comp = 0;
2234 LLVMValueRef indir_index;
2235 LLVMValueRef ret;
2236 unsigned const_index;
2237 unsigned stride = 4;
2238 int mode = deref->mode;
2239
2240 if (var) {
2241 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2242 var->data.mode == nir_var_shader_in;
2243 idx = var->data.driver_location;
2244 comp = var->data.location_frac;
2245 mode = var->data.mode;
2246
2247 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2248 &const_index, &indir_index);
2249
2250 if (var->data.compact) {
2251 stride = 1;
2252 const_index += comp;
2253 comp = 0;
2254 }
2255 }
2256
2257 if (instr->dest.ssa.bit_size == 64 &&
2258 (deref->mode == nir_var_shader_in ||
2259 deref->mode == nir_var_shader_out ||
2260 deref->mode == nir_var_function_temp))
2261 ve *= 2;
2262
2263 switch (mode) {
2264 case nir_var_shader_in:
2265 /* TODO: remove this after RADV switches to lowered IO */
2266 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2267 ctx->stage == MESA_SHADER_TESS_EVAL) {
2268 return load_tess_varyings(ctx, instr, true);
2269 }
2270
2271 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2272 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2273 LLVMValueRef indir_index;
2274 unsigned const_index, vertex_index;
2275 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2276 &const_index, &indir_index);
2277 assert(indir_index == NULL);
2278
2279 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2280 var->data.driver_location,
2281 var->data.location_frac,
2282 instr->num_components, vertex_index, const_index, type);
2283 }
2284
2285 for (unsigned chan = comp; chan < ve + comp; chan++) {
2286 if (indir_index) {
2287 unsigned count = glsl_count_attribute_slots(
2288 var->type,
2289 ctx->stage == MESA_SHADER_VERTEX);
2290 count -= chan / 4;
2291 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2292 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2293 stride, false, true);
2294
2295 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2296 tmp_vec,
2297 indir_index, "");
2298 } else
2299 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2300 }
2301 break;
2302 case nir_var_function_temp:
2303 for (unsigned chan = 0; chan < ve; chan++) {
2304 if (indir_index) {
2305 unsigned count = glsl_count_attribute_slots(
2306 var->type, false);
2307 count -= chan / 4;
2308 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2309 &ctx->ac, ctx->locals + idx + chan, count,
2310 stride, true, true);
2311
2312 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2313 tmp_vec,
2314 indir_index, "");
2315 } else {
2316 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2317 }
2318 }
2319 break;
2320 case nir_var_shader_out:
2321 /* TODO: remove this after RADV switches to lowered IO */
2322 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2323 return load_tess_varyings(ctx, instr, false);
2324 }
2325
2326 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2327 var->data.fb_fetch_output &&
2328 ctx->abi->emit_fbfetch)
2329 return ctx->abi->emit_fbfetch(ctx->abi);
2330
2331 for (unsigned chan = comp; chan < ve + comp; chan++) {
2332 if (indir_index) {
2333 unsigned count = glsl_count_attribute_slots(
2334 var->type, false);
2335 count -= chan / 4;
2336 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2337 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2338 stride, true, true);
2339
2340 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2341 tmp_vec,
2342 indir_index, "");
2343 } else {
2344 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2345 ctx->abi->outputs[idx + chan + const_index * stride],
2346 "");
2347 }
2348 }
2349 break;
2350 case nir_var_mem_global: {
2351 LLVMValueRef address = get_src(ctx, instr->src[0]);
2352 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2353 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2354 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2355 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2356 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2357 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2358
2359 if (stride != natural_stride || split_loads) {
2360 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2361 result_type = LLVMGetElementType(result_type);
2362
2363 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2364 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2365 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2366
2367 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2368 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2369 values[i] = LLVMBuildLoad(ctx->ac.builder,
2370 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2371
2372 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2373 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2374 }
2375 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2376 } else {
2377 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2378 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2379 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2380 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2381
2382 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2383 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2384 return val;
2385 }
2386 }
2387 default:
2388 unreachable("unhandle variable mode");
2389 }
2390 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2391 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2392 }
2393
2394 static void
2395 visit_store_var(struct ac_nir_context *ctx,
2396 nir_intrinsic_instr *instr)
2397 {
2398 if (ctx->ac.postponed_kill) {
2399 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2400 ctx->ac.postponed_kill, "");
2401 ac_build_ifcc(&ctx->ac, cond, 7002);
2402 }
2403
2404 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2405 nir_variable *var = nir_deref_instr_get_variable(deref);
2406
2407 LLVMValueRef temp_ptr, value;
2408 int idx = 0;
2409 unsigned comp = 0;
2410 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2411 int writemask = instr->const_index[0];
2412 LLVMValueRef indir_index;
2413 unsigned const_index;
2414
2415 if (var) {
2416 get_deref_offset(ctx, deref, false,
2417 NULL, NULL, &const_index, &indir_index);
2418 idx = var->data.driver_location;
2419 comp = var->data.location_frac;
2420
2421 if (var->data.compact) {
2422 const_index += comp;
2423 comp = 0;
2424 }
2425 }
2426
2427 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2428 (deref->mode == nir_var_shader_out ||
2429 deref->mode == nir_var_function_temp)) {
2430
2431 src = LLVMBuildBitCast(ctx->ac.builder, src,
2432 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2433 "");
2434
2435 writemask = widen_mask(writemask, 2);
2436 }
2437
2438 writemask = writemask << comp;
2439
2440 switch (deref->mode) {
2441 case nir_var_shader_out:
2442 /* TODO: remove this after RADV switches to lowered IO */
2443 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2444 LLVMValueRef vertex_index = NULL;
2445 LLVMValueRef indir_index = NULL;
2446 unsigned const_index = 0;
2447 const bool is_patch = var->data.patch ||
2448 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2449 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2450
2451 get_deref_offset(ctx, deref, false, NULL,
2452 is_patch ? NULL : &vertex_index,
2453 &const_index, &indir_index);
2454
2455 ctx->abi->store_tcs_outputs(ctx->abi, var,
2456 vertex_index, indir_index,
2457 const_index, src, writemask,
2458 var->data.location_frac,
2459 var->data.driver_location);
2460 break;
2461 }
2462
2463 for (unsigned chan = 0; chan < 8; chan++) {
2464 int stride = 4;
2465 if (!(writemask & (1 << chan)))
2466 continue;
2467
2468 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2469
2470 if (var->data.compact)
2471 stride = 1;
2472 if (indir_index) {
2473 unsigned count = glsl_count_attribute_slots(
2474 var->type, false);
2475 count -= chan / 4;
2476 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2477 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2478 stride, true, true);
2479
2480 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2481 value, indir_index, "");
2482 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2483 count, stride, tmp_vec);
2484
2485 } else {
2486 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2487
2488 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2489 }
2490 }
2491 break;
2492 case nir_var_function_temp:
2493 for (unsigned chan = 0; chan < 8; chan++) {
2494 if (!(writemask & (1 << chan)))
2495 continue;
2496
2497 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2498 if (indir_index) {
2499 unsigned count = glsl_count_attribute_slots(
2500 var->type, false);
2501 count -= chan / 4;
2502 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2503 &ctx->ac, ctx->locals + idx + chan, count,
2504 4, true, true);
2505
2506 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2507 value, indir_index, "");
2508 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2509 count, 4, tmp_vec);
2510 } else {
2511 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2512
2513 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2514 }
2515 }
2516 break;
2517
2518 case nir_var_mem_global: {
2519 int writemask = instr->const_index[0];
2520 LLVMValueRef address = get_src(ctx, instr->src[0]);
2521 LLVMValueRef val = get_src(ctx, instr->src[1]);
2522
2523 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2524 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2525 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2526 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2527 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2528
2529 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2530 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2531 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2532
2533 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2534 stride == natural_stride && !split_stores) {
2535 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2536 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2537 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2538
2539 val = LLVMBuildBitCast(ctx->ac.builder, val,
2540 LLVMGetElementType(LLVMTypeOf(address)), "");
2541 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2542
2543 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2544 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2545 } else {
2546 LLVMTypeRef val_type = LLVMTypeOf(val);
2547 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2548 val_type = LLVMGetElementType(val_type);
2549
2550 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2551 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2552 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2553 for (unsigned chan = 0; chan < 4; chan++) {
2554 if (!(writemask & (1 << chan)))
2555 continue;
2556
2557 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2558
2559 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2560 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2561 chan);
2562 src = LLVMBuildBitCast(ctx->ac.builder, src,
2563 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2564 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2565
2566 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2567 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2568 }
2569 }
2570 break;
2571 }
2572 default:
2573 abort();
2574 break;
2575 }
2576
2577 if (ctx->ac.postponed_kill)
2578 ac_build_endif(&ctx->ac, 7002);
2579 }
2580
2581 static void
2582 visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
2583 {
2584 if (ctx->ac.postponed_kill) {
2585 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2586 ctx->ac.postponed_kill, "");
2587 ac_build_ifcc(&ctx->ac, cond, 7002);
2588 }
2589
2590 unsigned base = nir_intrinsic_base(instr);
2591 unsigned writemask = nir_intrinsic_write_mask(instr);
2592 unsigned component = nir_intrinsic_component(instr);
2593 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
2594 nir_src offset = *nir_get_io_offset_src(instr);
2595 LLVMValueRef indir_index = NULL;
2596
2597 if (nir_src_is_const(offset))
2598 assert(nir_src_as_uint(offset) == 0);
2599 else
2600 indir_index = get_src(ctx, offset);
2601
2602 switch (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src))) {
2603 case 32:
2604 break;
2605 case 64:
2606 writemask = widen_mask(writemask, 2);
2607 src = LLVMBuildBitCast(ctx->ac.builder, src,
2608 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2609 "");
2610 break;
2611 default:
2612 unreachable("unhandled store_output bit size");
2613 return;
2614 }
2615
2616 writemask <<= component;
2617
2618 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2619 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
2620 LLVMValueRef vertex_index =
2621 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
2622
2623 ctx->abi->store_tcs_outputs(ctx->abi, NULL,
2624 vertex_index, indir_index,
2625 0, src, writemask,
2626 component, base * 4);
2627 return;
2628 }
2629
2630 /* No indirect indexing is allowed after this point. */
2631 assert(!indir_index);
2632
2633 for (unsigned chan = 0; chan < 8; chan++) {
2634 if (!(writemask & (1 << chan)))
2635 continue;
2636
2637 LLVMValueRef value = ac_llvm_extract_elem(&ctx->ac, src, chan - component);
2638 LLVMBuildStore(ctx->ac.builder, value,
2639 ctx->abi->outputs[base * 4 + chan]);
2640 }
2641
2642 if (ctx->ac.postponed_kill)
2643 ac_build_endif(&ctx->ac, 7002);
2644 }
2645
2646 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2647 {
2648 switch (dim) {
2649 case GLSL_SAMPLER_DIM_BUF:
2650 return 1;
2651 case GLSL_SAMPLER_DIM_1D:
2652 return array ? 2 : 1;
2653 case GLSL_SAMPLER_DIM_2D:
2654 return array ? 3 : 2;
2655 case GLSL_SAMPLER_DIM_MS:
2656 return array ? 4 : 3;
2657 case GLSL_SAMPLER_DIM_3D:
2658 case GLSL_SAMPLER_DIM_CUBE:
2659 return 3;
2660 case GLSL_SAMPLER_DIM_RECT:
2661 case GLSL_SAMPLER_DIM_SUBPASS:
2662 return 2;
2663 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2664 return 3;
2665 default:
2666 break;
2667 }
2668 return 0;
2669 }
2670
2671 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2672 LLVMValueRef coord_x, LLVMValueRef coord_y,
2673 LLVMValueRef coord_z,
2674 LLVMValueRef sample_index,
2675 LLVMValueRef fmask_desc_ptr)
2676 {
2677 unsigned sample_chan = coord_z ? 3 : 2;
2678 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2679 addr[sample_chan] = sample_index;
2680
2681 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2682 return addr[sample_chan];
2683 }
2684
2685 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2686 {
2687 assert(instr->src[0].is_ssa);
2688 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2689 }
2690
2691 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2692 const nir_intrinsic_instr *instr,
2693 LLVMValueRef dynamic_index,
2694 enum ac_descriptor_type desc_type,
2695 bool write)
2696 {
2697 nir_deref_instr *deref_instr =
2698 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2699 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2700
2701 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2702 }
2703
2704 static void get_image_coords(struct ac_nir_context *ctx,
2705 const nir_intrinsic_instr *instr,
2706 LLVMValueRef dynamic_desc_index,
2707 struct ac_image_args *args,
2708 enum glsl_sampler_dim dim,
2709 bool is_array)
2710 {
2711 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2712 LLVMValueRef masks[] = {
2713 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2714 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2715 };
2716 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2717
2718 int count;
2719 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2720 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2721 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2722 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2723 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2724 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2725 count = image_type_to_components_count(dim, is_array);
2726
2727 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2728 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2729 LLVMValueRef fmask_load_address[3];
2730
2731 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2732 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2733 if (is_array)
2734 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2735 else
2736 fmask_load_address[2] = NULL;
2737
2738 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2739 fmask_load_address[0],
2740 fmask_load_address[1],
2741 fmask_load_address[2],
2742 sample_index,
2743 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2744 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2745 }
2746 if (count == 1 && !gfx9_1d) {
2747 if (instr->src[1].ssa->num_components)
2748 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2749 else
2750 args->coords[0] = src0;
2751 } else {
2752 int chan;
2753 if (is_ms)
2754 count--;
2755 for (chan = 0; chan < count; ++chan) {
2756 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2757 }
2758
2759 if (gfx9_1d) {
2760 if (is_array) {
2761 args->coords[2] = args->coords[1];
2762 args->coords[1] = ctx->ac.i32_0;
2763 } else
2764 args->coords[1] = ctx->ac.i32_0;
2765 count++;
2766 }
2767 if (ctx->ac.chip_class == GFX9 &&
2768 dim == GLSL_SAMPLER_DIM_2D &&
2769 !is_array) {
2770 /* The hw can't bind a slice of a 3D image as a 2D
2771 * image, because it ignores BASE_ARRAY if the target
2772 * is 3D. The workaround is to read BASE_ARRAY and set
2773 * it as the 3rd address operand for all 2D images.
2774 */
2775 LLVMValueRef first_layer, const5, mask;
2776
2777 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2778 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2779 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2780 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2781
2782 args->coords[count] = first_layer;
2783 count++;
2784 }
2785
2786
2787 if (is_ms) {
2788 args->coords[count] = sample_index;
2789 count++;
2790 }
2791 }
2792 }
2793
2794 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2795 const nir_intrinsic_instr *instr,
2796 LLVMValueRef dynamic_index,
2797 bool write, bool atomic)
2798 {
2799 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2800 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2801 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2802 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2803 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2804
2805 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2806 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2807 elem_count, stride, "");
2808
2809 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2810 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2811 }
2812 return rsrc;
2813 }
2814
2815 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2816 struct waterfall_context *wctx,
2817 const nir_intrinsic_instr *instr)
2818 {
2819 nir_deref_instr *deref_instr = NULL;
2820
2821 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2822 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2823
2824 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2825 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2826 }
2827
2828 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2829 const nir_intrinsic_instr *instr,
2830 bool bindless)
2831 {
2832 LLVMValueRef res;
2833
2834 enum glsl_sampler_dim dim;
2835 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2836 bool is_array;
2837 if (bindless) {
2838 dim = nir_intrinsic_image_dim(instr);
2839 is_array = nir_intrinsic_image_array(instr);
2840 } else {
2841 const nir_deref_instr *image_deref = get_image_deref(instr);
2842 const struct glsl_type *type = image_deref->type;
2843 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2844 dim = glsl_get_sampler_dim(type);
2845 access |= var->data.access;
2846 is_array = glsl_sampler_type_is_array(type);
2847 }
2848
2849 struct waterfall_context wctx;
2850 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2851
2852 struct ac_image_args args = {};
2853
2854 args.cache_policy = get_cache_policy(ctx, access, false, false);
2855
2856 if (dim == GLSL_SAMPLER_DIM_BUF) {
2857 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2858 unsigned num_channels = util_last_bit(mask);
2859 LLVMValueRef rsrc, vindex;
2860
2861 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2862 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2863 ctx->ac.i32_0, "");
2864
2865 assert(instr->dest.is_ssa);
2866 bool can_speculate = access & ACCESS_CAN_REORDER;
2867 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2868 ctx->ac.i32_0, num_channels,
2869 args.cache_policy,
2870 can_speculate,
2871 instr->dest.ssa.bit_size == 16);
2872 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2873
2874 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2875 res = ac_to_integer(&ctx->ac, res);
2876 } else {
2877 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2878
2879 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2880 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2881 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2882 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2883 if (!level_zero)
2884 args.lod = get_src(ctx, instr->src[3]);
2885 args.dmask = 15;
2886 args.attributes = AC_FUNC_ATTR_READONLY;
2887
2888 assert(instr->dest.is_ssa);
2889 args.d16 = instr->dest.ssa.bit_size == 16;
2890
2891 res = ac_build_image_opcode(&ctx->ac, &args);
2892 }
2893 return exit_waterfall(ctx, &wctx, res);
2894 }
2895
2896 static void visit_image_store(struct ac_nir_context *ctx,
2897 const nir_intrinsic_instr *instr,
2898 bool bindless)
2899 {
2900 if (ctx->ac.postponed_kill) {
2901 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2902 ctx->ac.postponed_kill, "");
2903 ac_build_ifcc(&ctx->ac, cond, 7003);
2904 }
2905
2906 enum glsl_sampler_dim dim;
2907 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2908 bool is_array;
2909
2910 if (bindless) {
2911 dim = nir_intrinsic_image_dim(instr);
2912 is_array = nir_intrinsic_image_array(instr);
2913 } else {
2914 const nir_deref_instr *image_deref = get_image_deref(instr);
2915 const struct glsl_type *type = image_deref->type;
2916 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2917 dim = glsl_get_sampler_dim(type);
2918 access |= var->data.access;
2919 is_array = glsl_sampler_type_is_array(type);
2920 }
2921
2922 struct waterfall_context wctx;
2923 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2924
2925 bool writeonly_memory = access & ACCESS_NON_READABLE;
2926 struct ac_image_args args = {};
2927
2928 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2929
2930 if (dim == GLSL_SAMPLER_DIM_BUF) {
2931 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2932 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2933 unsigned src_channels = ac_get_llvm_num_components(src);
2934 LLVMValueRef vindex;
2935
2936 if (src_channels == 3)
2937 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2938
2939 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2940 get_src(ctx, instr->src[1]),
2941 ctx->ac.i32_0, "");
2942
2943 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2944 ctx->ac.i32_0, args.cache_policy);
2945 } else {
2946 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2947
2948 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2949 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2950 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2951 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2952 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2953 if (!level_zero)
2954 args.lod = get_src(ctx, instr->src[4]);
2955 args.dmask = 15;
2956 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2957
2958 ac_build_image_opcode(&ctx->ac, &args);
2959 }
2960
2961 exit_waterfall(ctx, &wctx, NULL);
2962 if (ctx->ac.postponed_kill)
2963 ac_build_endif(&ctx->ac, 7003);
2964 }
2965
2966 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2967 const nir_intrinsic_instr *instr,
2968 bool bindless)
2969 {
2970 if (ctx->ac.postponed_kill) {
2971 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2972 ctx->ac.postponed_kill, "");
2973 ac_build_ifcc(&ctx->ac, cond, 7004);
2974 }
2975
2976 LLVMValueRef params[7];
2977 int param_count = 0;
2978
2979 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2980 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2981 const char *atomic_name;
2982 char intrinsic_name[64];
2983 enum ac_atomic_op atomic_subop;
2984 ASSERTED int length;
2985
2986 enum glsl_sampler_dim dim;
2987 bool is_array;
2988 if (bindless) {
2989 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2990 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2991 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2992 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2993 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2994 assert(format == GL_R32UI || format == GL_R32I);
2995 }
2996 dim = nir_intrinsic_image_dim(instr);
2997 is_array = nir_intrinsic_image_array(instr);
2998 } else {
2999 const struct glsl_type *type = get_image_deref(instr)->type;
3000 dim = glsl_get_sampler_dim(type);
3001 is_array = glsl_sampler_type_is_array(type);
3002 }
3003
3004 struct waterfall_context wctx;
3005 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3006
3007 switch (instr->intrinsic) {
3008 case nir_intrinsic_bindless_image_atomic_add:
3009 case nir_intrinsic_image_deref_atomic_add:
3010 atomic_name = "add";
3011 atomic_subop = ac_atomic_add;
3012 break;
3013 case nir_intrinsic_bindless_image_atomic_imin:
3014 case nir_intrinsic_image_deref_atomic_imin:
3015 atomic_name = "smin";
3016 atomic_subop = ac_atomic_smin;
3017 break;
3018 case nir_intrinsic_bindless_image_atomic_umin:
3019 case nir_intrinsic_image_deref_atomic_umin:
3020 atomic_name = "umin";
3021 atomic_subop = ac_atomic_umin;
3022 break;
3023 case nir_intrinsic_bindless_image_atomic_imax:
3024 case nir_intrinsic_image_deref_atomic_imax:
3025 atomic_name = "smax";
3026 atomic_subop = ac_atomic_smax;
3027 break;
3028 case nir_intrinsic_bindless_image_atomic_umax:
3029 case nir_intrinsic_image_deref_atomic_umax:
3030 atomic_name = "umax";
3031 atomic_subop = ac_atomic_umax;
3032 break;
3033 case nir_intrinsic_bindless_image_atomic_and:
3034 case nir_intrinsic_image_deref_atomic_and:
3035 atomic_name = "and";
3036 atomic_subop = ac_atomic_and;
3037 break;
3038 case nir_intrinsic_bindless_image_atomic_or:
3039 case nir_intrinsic_image_deref_atomic_or:
3040 atomic_name = "or";
3041 atomic_subop = ac_atomic_or;
3042 break;
3043 case nir_intrinsic_bindless_image_atomic_xor:
3044 case nir_intrinsic_image_deref_atomic_xor:
3045 atomic_name = "xor";
3046 atomic_subop = ac_atomic_xor;
3047 break;
3048 case nir_intrinsic_bindless_image_atomic_exchange:
3049 case nir_intrinsic_image_deref_atomic_exchange:
3050 atomic_name = "swap";
3051 atomic_subop = ac_atomic_swap;
3052 break;
3053 case nir_intrinsic_bindless_image_atomic_comp_swap:
3054 case nir_intrinsic_image_deref_atomic_comp_swap:
3055 atomic_name = "cmpswap";
3056 atomic_subop = 0; /* not used */
3057 break;
3058 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3059 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3060 atomic_name = "inc";
3061 atomic_subop = ac_atomic_inc_wrap;
3062 break;
3063 }
3064 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3065 case nir_intrinsic_image_deref_atomic_dec_wrap:
3066 atomic_name = "dec";
3067 atomic_subop = ac_atomic_dec_wrap;
3068 break;
3069 default:
3070 abort();
3071 }
3072
3073 if (cmpswap)
3074 params[param_count++] = get_src(ctx, instr->src[4]);
3075 params[param_count++] = get_src(ctx, instr->src[3]);
3076
3077 LLVMValueRef result;
3078 if (dim == GLSL_SAMPLER_DIM_BUF) {
3079 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3080 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3081 ctx->ac.i32_0, ""); /* vindex */
3082 params[param_count++] = ctx->ac.i32_0; /* voffset */
3083 if (LLVM_VERSION_MAJOR >= 9) {
3084 /* XXX: The new raw/struct atomic intrinsics are buggy
3085 * with LLVM 8, see r358579.
3086 */
3087 params[param_count++] = ctx->ac.i32_0; /* soffset */
3088 params[param_count++] = ctx->ac.i32_0; /* slc */
3089
3090 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3091 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3092 } else {
3093 params[param_count++] = ctx->ac.i1false; /* slc */
3094
3095 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3096 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3097 }
3098
3099 assert(length < sizeof(intrinsic_name));
3100 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3101 params, param_count, 0);
3102 } else {
3103 struct ac_image_args args = {};
3104 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3105 args.atomic = atomic_subop;
3106 args.data[0] = params[0];
3107 if (cmpswap)
3108 args.data[1] = params[1];
3109 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3110 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3111 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3112
3113 result = ac_build_image_opcode(&ctx->ac, &args);
3114 }
3115
3116 result = exit_waterfall(ctx, &wctx, result);
3117 if (ctx->ac.postponed_kill)
3118 ac_build_endif(&ctx->ac, 7004);
3119 return result;
3120 }
3121
3122 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3123 nir_intrinsic_instr *instr)
3124 {
3125 struct waterfall_context wctx;
3126 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3127 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3128
3129 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3130
3131 return exit_waterfall(ctx, &wctx, ret);
3132 }
3133
3134 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3135 const nir_intrinsic_instr *instr,
3136 bool bindless)
3137 {
3138 LLVMValueRef res;
3139
3140 enum glsl_sampler_dim dim;
3141 bool is_array;
3142 if (bindless) {
3143 dim = nir_intrinsic_image_dim(instr);
3144 is_array = nir_intrinsic_image_array(instr);
3145 } else {
3146 const struct glsl_type *type = get_image_deref(instr)->type;
3147 dim = glsl_get_sampler_dim(type);
3148 is_array = glsl_sampler_type_is_array(type);
3149 }
3150
3151 struct waterfall_context wctx;
3152 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3153
3154 if (dim == GLSL_SAMPLER_DIM_BUF) {
3155 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3156 } else {
3157
3158 struct ac_image_args args = { 0 };
3159
3160 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3161 args.dmask = 0xf;
3162 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3163 args.opcode = ac_image_get_resinfo;
3164 assert(nir_src_as_uint(instr->src[1]) == 0);
3165 args.lod = ctx->ac.i32_0;
3166 args.attributes = AC_FUNC_ATTR_READNONE;
3167
3168 res = ac_build_image_opcode(&ctx->ac, &args);
3169
3170 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3171
3172 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3173 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3174 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3175 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3176 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3177 }
3178
3179 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3180 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3181 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3182 ctx->ac.i32_1, "");
3183 }
3184 }
3185 return exit_waterfall(ctx, &wctx, res);
3186 }
3187
3188 static void emit_membar(struct ac_llvm_context *ac,
3189 const nir_intrinsic_instr *instr)
3190 {
3191 unsigned wait_flags = 0;
3192
3193 switch (instr->intrinsic) {
3194 case nir_intrinsic_memory_barrier:
3195 case nir_intrinsic_group_memory_barrier:
3196 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3197 break;
3198 case nir_intrinsic_memory_barrier_buffer:
3199 case nir_intrinsic_memory_barrier_image:
3200 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3201 break;
3202 case nir_intrinsic_memory_barrier_shared:
3203 wait_flags = AC_WAIT_LGKM;
3204 break;
3205 default:
3206 break;
3207 }
3208
3209 ac_build_waitcnt(ac, wait_flags);
3210 }
3211
3212 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3213 {
3214 /* GFX6 only (thanks to a hw bug workaround):
3215 * The real barrier instruction isn’t needed, because an entire patch
3216 * always fits into a single wave.
3217 */
3218 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3219 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3220 return;
3221 }
3222 ac_build_s_barrier(ac);
3223 }
3224
3225 static void emit_discard(struct ac_nir_context *ctx,
3226 const nir_intrinsic_instr *instr)
3227 {
3228 LLVMValueRef cond;
3229
3230 if (instr->intrinsic == nir_intrinsic_discard_if) {
3231 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3232 get_src(ctx, instr->src[0]),
3233 ctx->ac.i32_0, "");
3234 } else {
3235 assert(instr->intrinsic == nir_intrinsic_discard);
3236 cond = ctx->ac.i1false;
3237 }
3238
3239 ac_build_kill_if_false(&ctx->ac, cond);
3240 }
3241
3242 static void emit_demote(struct ac_nir_context *ctx,
3243 const nir_intrinsic_instr *instr)
3244 {
3245 LLVMValueRef cond;
3246
3247 if (instr->intrinsic == nir_intrinsic_demote_if) {
3248 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3249 get_src(ctx, instr->src[0]),
3250 ctx->ac.i32_0, "");
3251 } else {
3252 assert(instr->intrinsic == nir_intrinsic_demote);
3253 cond = ctx->ac.i1false;
3254 }
3255
3256 /* Kill immediately while maintaining WQM. */
3257 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3258
3259 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3260 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3261 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3262 return;
3263 }
3264
3265 static LLVMValueRef
3266 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3267 {
3268 LLVMValueRef result;
3269 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3270 result = LLVMBuildAnd(ctx->ac.builder,
3271 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3272 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3273
3274 if (ctx->ac.wave_size == 32)
3275 result = LLVMBuildLShr(ctx->ac.builder, result,
3276 LLVMConstInt(ctx->ac.i32, 1, false), "");
3277
3278 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3279 }
3280
3281 static LLVMValueRef
3282 visit_load_subgroup_id(struct ac_nir_context *ctx)
3283 {
3284 if (ctx->stage == MESA_SHADER_COMPUTE) {
3285 LLVMValueRef result;
3286 result = LLVMBuildAnd(ctx->ac.builder,
3287 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3288 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3289 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3290 } else {
3291 return LLVMConstInt(ctx->ac.i32, 0, false);
3292 }
3293 }
3294
3295 static LLVMValueRef
3296 visit_load_num_subgroups(struct ac_nir_context *ctx)
3297 {
3298 if (ctx->stage == MESA_SHADER_COMPUTE) {
3299 return LLVMBuildAnd(ctx->ac.builder,
3300 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3301 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3302 } else {
3303 return LLVMConstInt(ctx->ac.i32, 1, false);
3304 }
3305 }
3306
3307 static LLVMValueRef
3308 visit_first_invocation(struct ac_nir_context *ctx)
3309 {
3310 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3311 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3312
3313 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3314 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3315 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3316 ctx->ac.iN_wavemask, args, 2,
3317 AC_FUNC_ATTR_NOUNWIND |
3318 AC_FUNC_ATTR_READNONE);
3319
3320 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3321 }
3322
3323 static LLVMValueRef
3324 visit_load_shared(struct ac_nir_context *ctx,
3325 const nir_intrinsic_instr *instr)
3326 {
3327 LLVMValueRef values[4], derived_ptr, index, ret;
3328
3329 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3330 instr->dest.ssa.bit_size);
3331
3332 for (int chan = 0; chan < instr->num_components; chan++) {
3333 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3334 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3335 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3336 }
3337
3338 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3339 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3340 }
3341
3342 static void
3343 visit_store_shared(struct ac_nir_context *ctx,
3344 const nir_intrinsic_instr *instr)
3345 {
3346 LLVMValueRef derived_ptr, data,index;
3347 LLVMBuilderRef builder = ctx->ac.builder;
3348
3349 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3350 instr->src[0].ssa->bit_size);
3351 LLVMValueRef src = get_src(ctx, instr->src[0]);
3352
3353 int writemask = nir_intrinsic_write_mask(instr);
3354 for (int chan = 0; chan < 4; chan++) {
3355 if (!(writemask & (1 << chan))) {
3356 continue;
3357 }
3358 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3359 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3360 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3361 LLVMBuildStore(builder, data, derived_ptr);
3362 }
3363 }
3364
3365 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3366 const nir_intrinsic_instr *instr,
3367 LLVMValueRef ptr, int src_idx)
3368 {
3369 if (ctx->ac.postponed_kill) {
3370 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3371 ctx->ac.postponed_kill, "");
3372 ac_build_ifcc(&ctx->ac, cond, 7005);
3373 }
3374
3375 LLVMValueRef result;
3376 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3377
3378 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3379
3380 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3381 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3382 if (deref->mode == nir_var_mem_global) {
3383 /* use "singlethread" sync scope to implement relaxed ordering */
3384 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3385
3386 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3387 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3388 }
3389 }
3390
3391 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3392 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3393 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3394 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3395 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3396 } else {
3397 LLVMAtomicRMWBinOp op;
3398 switch (instr->intrinsic) {
3399 case nir_intrinsic_shared_atomic_add:
3400 case nir_intrinsic_deref_atomic_add:
3401 op = LLVMAtomicRMWBinOpAdd;
3402 break;
3403 case nir_intrinsic_shared_atomic_umin:
3404 case nir_intrinsic_deref_atomic_umin:
3405 op = LLVMAtomicRMWBinOpUMin;
3406 break;
3407 case nir_intrinsic_shared_atomic_umax:
3408 case nir_intrinsic_deref_atomic_umax:
3409 op = LLVMAtomicRMWBinOpUMax;
3410 break;
3411 case nir_intrinsic_shared_atomic_imin:
3412 case nir_intrinsic_deref_atomic_imin:
3413 op = LLVMAtomicRMWBinOpMin;
3414 break;
3415 case nir_intrinsic_shared_atomic_imax:
3416 case nir_intrinsic_deref_atomic_imax:
3417 op = LLVMAtomicRMWBinOpMax;
3418 break;
3419 case nir_intrinsic_shared_atomic_and:
3420 case nir_intrinsic_deref_atomic_and:
3421 op = LLVMAtomicRMWBinOpAnd;
3422 break;
3423 case nir_intrinsic_shared_atomic_or:
3424 case nir_intrinsic_deref_atomic_or:
3425 op = LLVMAtomicRMWBinOpOr;
3426 break;
3427 case nir_intrinsic_shared_atomic_xor:
3428 case nir_intrinsic_deref_atomic_xor:
3429 op = LLVMAtomicRMWBinOpXor;
3430 break;
3431 case nir_intrinsic_shared_atomic_exchange:
3432 case nir_intrinsic_deref_atomic_exchange:
3433 op = LLVMAtomicRMWBinOpXchg;
3434 break;
3435 #if LLVM_VERSION_MAJOR >= 10
3436 case nir_intrinsic_shared_atomic_fadd:
3437 case nir_intrinsic_deref_atomic_fadd:
3438 op = LLVMAtomicRMWBinOpFAdd;
3439 break;
3440 #endif
3441 default:
3442 return NULL;
3443 }
3444
3445 LLVMValueRef val;
3446
3447 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3448 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3449 val = ac_to_float(&ctx->ac, src);
3450 } else {
3451 val = ac_to_integer(&ctx->ac, src);
3452 }
3453
3454 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3455 }
3456
3457 if (ctx->ac.postponed_kill)
3458 ac_build_endif(&ctx->ac, 7005);
3459 return result;
3460 }
3461
3462 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3463 {
3464 LLVMValueRef values[2];
3465 LLVMValueRef pos[2];
3466
3467 pos[0] = ac_to_float(&ctx->ac,
3468 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3469 pos[1] = ac_to_float(&ctx->ac,
3470 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3471
3472 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3473 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3474 return ac_build_gather_values(&ctx->ac, values, 2);
3475 }
3476
3477 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3478 enum glsl_interp_mode interp, unsigned location)
3479 {
3480 switch (interp) {
3481 case INTERP_MODE_FLAT:
3482 default:
3483 return NULL;
3484 case INTERP_MODE_SMOOTH:
3485 case INTERP_MODE_NONE:
3486 if (location == INTERP_CENTER)
3487 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3488 else if (location == INTERP_CENTROID)
3489 return ctx->abi->persp_centroid;
3490 else if (location == INTERP_SAMPLE)
3491 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3492 break;
3493 case INTERP_MODE_NOPERSPECTIVE:
3494 if (location == INTERP_CENTER)
3495 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3496 else if (location == INTERP_CENTROID)
3497 return ctx->abi->linear_centroid;
3498 else if (location == INTERP_SAMPLE)
3499 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3500 break;
3501 }
3502 return NULL;
3503 }
3504
3505 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3506 unsigned mode)
3507 {
3508 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3509 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3510 }
3511
3512 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3513 unsigned mode,
3514 LLVMValueRef offset)
3515 {
3516 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3517 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3518 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3519
3520 LLVMValueRef ij_out[2];
3521 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3522
3523 /*
3524 * take the I then J parameters, and the DDX/Y for it, and
3525 * calculate the IJ inputs for the interpolator.
3526 * temp1 = ddx * offset/sample.x + I;
3527 * interp_param.I = ddy * offset/sample.y + temp1;
3528 * temp1 = ddx * offset/sample.x + J;
3529 * interp_param.J = ddy * offset/sample.y + temp1;
3530 */
3531 for (unsigned i = 0; i < 2; i++) {
3532 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3533 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3534 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3535 ddxy_out, ix_ll, "");
3536 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3537 ddxy_out, iy_ll, "");
3538 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3539 interp_param, ix_ll, "");
3540 LLVMValueRef temp1, temp2;
3541
3542 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3543 ctx->ac.f32, "");
3544
3545 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3546 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3547
3548 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3549 temp2, ctx->ac.i32, "");
3550 }
3551 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3552 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3553 }
3554
3555 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3556 unsigned mode)
3557 {
3558 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3559 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3560 }
3561
3562 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3563 unsigned mode,
3564 LLVMValueRef sample_id)
3565 {
3566 if (ctx->abi->interp_at_sample_force_center)
3567 return barycentric_center(ctx, mode);
3568
3569 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3570
3571 /* fetch sample ID */
3572 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3573
3574 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3575 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3576 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3577 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3578 LLVMValueRef coords[] = { src_c0, src_c1 };
3579 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3580
3581 return barycentric_offset(ctx, mode, offset);
3582 }
3583
3584
3585 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3586 unsigned mode)
3587 {
3588 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3589 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3590 }
3591
3592 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3593 {
3594 return LLVMBuildBitCast(ctx->ac.builder,
3595 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3596 ctx->ac.v3i32, "");
3597 }
3598
3599 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3600 LLVMValueRef interp_param,
3601 unsigned index, unsigned comp_start,
3602 unsigned num_components,
3603 unsigned bitsize)
3604 {
3605 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3606 LLVMValueRef interp_param_f;
3607
3608 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3609 interp_param, ctx->ac.v2f32, "");
3610 LLVMValueRef i = LLVMBuildExtractElement(
3611 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3612 LLVMValueRef j = LLVMBuildExtractElement(
3613 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3614
3615 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3616 if (ctx->verified_interp &&
3617 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3618 LLVMValueRef args[2];
3619 args[0] = i;
3620 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3621 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3622 args, 2, AC_FUNC_ATTR_READNONE);
3623 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3624 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3625 }
3626
3627 LLVMValueRef values[4];
3628 assert(bitsize == 16 || bitsize == 32);
3629 for (unsigned comp = 0; comp < num_components; comp++) {
3630 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3631 if (bitsize == 16) {
3632 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3633 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3634 } else {
3635 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3636 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3637 }
3638 }
3639
3640 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3641 }
3642
3643 static LLVMValueRef visit_load(struct ac_nir_context *ctx,
3644 nir_intrinsic_instr *instr, bool is_output)
3645 {
3646 LLVMValueRef values[8];
3647 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
3648 LLVMTypeRef component_type;
3649 unsigned base = nir_intrinsic_base(instr);
3650 unsigned component = nir_intrinsic_component(instr);
3651 unsigned count = instr->dest.ssa.num_components *
3652 (instr->dest.ssa.bit_size == 64 ? 2 : 1);
3653 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
3654 LLVMValueRef vertex_index =
3655 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
3656 nir_src offset = *nir_get_io_offset_src(instr);
3657 LLVMValueRef indir_index = NULL;
3658
3659 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
3660 component_type = LLVMGetElementType(dest_type);
3661 else
3662 component_type = dest_type;
3663
3664 if (nir_src_is_const(offset))
3665 assert(nir_src_as_uint(offset) == 0);
3666 else
3667 indir_index = get_src(ctx, offset);
3668
3669 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
3670 (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) {
3671 LLVMValueRef result =
3672 ctx->abi->load_tess_varyings(ctx->abi, component_type,
3673 vertex_index, indir_index,
3674 0, 0, base * 4,
3675 component,
3676 instr->num_components,
3677 false, false, !is_output);
3678 if (instr->dest.ssa.bit_size == 16) {
3679 result = ac_to_integer(&ctx->ac, result);
3680 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
3681 }
3682 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3683 }
3684
3685 /* No indirect indexing is allowed after this point. */
3686 assert(!indir_index);
3687
3688 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3689 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3690 assert(nir_src_is_const(*vertex_index_src));
3691
3692 return ctx->abi->load_inputs(ctx->abi, 0, base * 4, component,
3693 instr->num_components,
3694 nir_src_as_uint(*vertex_index_src),
3695 0, type);
3696 }
3697
3698 if (ctx->stage == MESA_SHADER_FRAGMENT && is_output &&
3699 nir_intrinsic_io_semantics(instr).fb_fetch_output)
3700 return ctx->abi->emit_fbfetch(ctx->abi);
3701
3702 /* Other non-fragment cases have inputs and outputs in temporaries. */
3703 if (ctx->stage != MESA_SHADER_FRAGMENT) {
3704 for (unsigned chan = component; chan < count + component; chan++) {
3705 if (is_output) {
3706 values[chan] = LLVMBuildLoad(ctx->ac.builder,
3707 ctx->abi->outputs[base * 4 + chan], "");
3708 } else {
3709 values[chan] = ctx->abi->inputs[base * 4 + chan];
3710 if (!values[chan])
3711 values[chan] = LLVMGetUndef(ctx->ac.i32);
3712 }
3713 }
3714 LLVMValueRef result = ac_build_varying_gather_values(&ctx->ac, values, count, component);
3715 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3716 }
3717
3718 /* Fragment shader inputs. */
3719 unsigned vertex_id = 2; /* P0 */
3720
3721 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3722 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3723
3724 switch (src0[0].i32) {
3725 case 0:
3726 vertex_id = 2;
3727 break;
3728 case 1:
3729 vertex_id = 0;
3730 break;
3731 case 2:
3732 vertex_id = 1;
3733 break;
3734 default:
3735 unreachable("Invalid vertex index");
3736 }
3737 }
3738
3739 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, base, false);
3740
3741 for (unsigned chan = 0; chan < count; chan++) {
3742 if (component + chan > 4)
3743 attr_number = LLVMConstInt(ctx->ac.i32, base + 1, false);
3744 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3745 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3746 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3747 llvm_chan,
3748 attr_number,
3749 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3750 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3751 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3752 instr->dest.ssa.bit_size == 16 ? ctx->ac.i16
3753 : ctx->ac.i32, "");
3754 }
3755
3756 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, count);
3757 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3758 }
3759
3760 static void visit_intrinsic(struct ac_nir_context *ctx,
3761 nir_intrinsic_instr *instr)
3762 {
3763 LLVMValueRef result = NULL;
3764
3765 switch (instr->intrinsic) {
3766 case nir_intrinsic_ballot:
3767 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3768 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3769 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3770 break;
3771 case nir_intrinsic_read_invocation:
3772 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3773 get_src(ctx, instr->src[1]));
3774 break;
3775 case nir_intrinsic_read_first_invocation:
3776 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3777 break;
3778 case nir_intrinsic_load_subgroup_invocation:
3779 result = ac_get_thread_id(&ctx->ac);
3780 break;
3781 case nir_intrinsic_load_work_group_id: {
3782 LLVMValueRef values[3];
3783
3784 for (int i = 0; i < 3; i++) {
3785 values[i] = ctx->args->workgroup_ids[i].used ?
3786 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3787 }
3788
3789 result = ac_build_gather_values(&ctx->ac, values, 3);
3790 break;
3791 }
3792 case nir_intrinsic_load_base_vertex:
3793 case nir_intrinsic_load_first_vertex:
3794 result = ctx->abi->load_base_vertex(ctx->abi);
3795 break;
3796 case nir_intrinsic_load_local_group_size:
3797 result = ctx->abi->load_local_group_size(ctx->abi);
3798 break;
3799 case nir_intrinsic_load_vertex_id:
3800 result = LLVMBuildAdd(ctx->ac.builder,
3801 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3802 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3803 break;
3804 case nir_intrinsic_load_vertex_id_zero_base: {
3805 result = ctx->abi->vertex_id;
3806 break;
3807 }
3808 case nir_intrinsic_load_local_invocation_id: {
3809 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3810 break;
3811 }
3812 case nir_intrinsic_load_base_instance:
3813 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3814 break;
3815 case nir_intrinsic_load_draw_id:
3816 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3817 break;
3818 case nir_intrinsic_load_view_index:
3819 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3820 break;
3821 case nir_intrinsic_load_invocation_id:
3822 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3823 result = ac_unpack_param(&ctx->ac,
3824 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3825 8, 5);
3826 } else {
3827 if (ctx->ac.chip_class >= GFX10) {
3828 result = LLVMBuildAnd(ctx->ac.builder,
3829 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3830 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3831 } else {
3832 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3833 }
3834 }
3835 break;
3836 case nir_intrinsic_load_primitive_id:
3837 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3838 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3839 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3840 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3841 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3842 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3843 } else
3844 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3845 break;
3846 case nir_intrinsic_load_sample_id:
3847 result = ac_unpack_param(&ctx->ac,
3848 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3849 8, 4);
3850 break;
3851 case nir_intrinsic_load_sample_pos:
3852 result = load_sample_pos(ctx);
3853 break;
3854 case nir_intrinsic_load_sample_mask_in:
3855 result = ctx->abi->load_sample_mask_in(ctx->abi);
3856 break;
3857 case nir_intrinsic_load_frag_coord: {
3858 LLVMValueRef values[4] = {
3859 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3860 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3861 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3862 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3863 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3864 };
3865 result = ac_to_integer(&ctx->ac,
3866 ac_build_gather_values(&ctx->ac, values, 4));
3867 break;
3868 }
3869 case nir_intrinsic_load_layer_id:
3870 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3871 break;
3872 case nir_intrinsic_load_front_face:
3873 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3874 break;
3875 case nir_intrinsic_load_helper_invocation:
3876 result = ac_build_load_helper_invocation(&ctx->ac);
3877 break;
3878 case nir_intrinsic_is_helper_invocation:
3879 result = ac_build_is_helper_invocation(&ctx->ac);
3880 break;
3881 case nir_intrinsic_load_color0:
3882 result = ctx->abi->color0;
3883 break;
3884 case nir_intrinsic_load_color1:
3885 result = ctx->abi->color1;
3886 break;
3887 case nir_intrinsic_load_user_data_amd:
3888 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3889 result = ctx->abi->user_data;
3890 break;
3891 case nir_intrinsic_load_instance_id:
3892 result = ctx->abi->instance_id;
3893 break;
3894 case nir_intrinsic_load_num_work_groups:
3895 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3896 break;
3897 case nir_intrinsic_load_local_invocation_index:
3898 result = visit_load_local_invocation_index(ctx);
3899 break;
3900 case nir_intrinsic_load_subgroup_id:
3901 result = visit_load_subgroup_id(ctx);
3902 break;
3903 case nir_intrinsic_load_num_subgroups:
3904 result = visit_load_num_subgroups(ctx);
3905 break;
3906 case nir_intrinsic_first_invocation:
3907 result = visit_first_invocation(ctx);
3908 break;
3909 case nir_intrinsic_load_push_constant:
3910 result = visit_load_push_constant(ctx, instr);
3911 break;
3912 case nir_intrinsic_vulkan_resource_index: {
3913 LLVMValueRef index = get_src(ctx, instr->src[0]);
3914 unsigned desc_set = nir_intrinsic_desc_set(instr);
3915 unsigned binding = nir_intrinsic_binding(instr);
3916
3917 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3918 binding);
3919 break;
3920 }
3921 case nir_intrinsic_vulkan_resource_reindex:
3922 result = visit_vulkan_resource_reindex(ctx, instr);
3923 break;
3924 case nir_intrinsic_store_ssbo:
3925 visit_store_ssbo(ctx, instr);
3926 break;
3927 case nir_intrinsic_load_ssbo:
3928 result = visit_load_buffer(ctx, instr);
3929 break;
3930 case nir_intrinsic_ssbo_atomic_add:
3931 case nir_intrinsic_ssbo_atomic_imin:
3932 case nir_intrinsic_ssbo_atomic_umin:
3933 case nir_intrinsic_ssbo_atomic_imax:
3934 case nir_intrinsic_ssbo_atomic_umax:
3935 case nir_intrinsic_ssbo_atomic_and:
3936 case nir_intrinsic_ssbo_atomic_or:
3937 case nir_intrinsic_ssbo_atomic_xor:
3938 case nir_intrinsic_ssbo_atomic_exchange:
3939 case nir_intrinsic_ssbo_atomic_comp_swap:
3940 result = visit_atomic_ssbo(ctx, instr);
3941 break;
3942 case nir_intrinsic_load_ubo:
3943 result = visit_load_ubo_buffer(ctx, instr);
3944 break;
3945 case nir_intrinsic_get_buffer_size:
3946 result = visit_get_buffer_size(ctx, instr);
3947 break;
3948 case nir_intrinsic_load_deref:
3949 result = visit_load_var(ctx, instr);
3950 break;
3951 case nir_intrinsic_store_deref:
3952 visit_store_var(ctx, instr);
3953 break;
3954 case nir_intrinsic_load_input:
3955 case nir_intrinsic_load_input_vertex:
3956 case nir_intrinsic_load_per_vertex_input:
3957 result = visit_load(ctx, instr, false);
3958 break;
3959 case nir_intrinsic_load_output:
3960 case nir_intrinsic_load_per_vertex_output:
3961 result = visit_load(ctx, instr, true);
3962 break;
3963 case nir_intrinsic_store_output:
3964 case nir_intrinsic_store_per_vertex_output:
3965 visit_store_output(ctx, instr);
3966 break;
3967 case nir_intrinsic_load_shared:
3968 result = visit_load_shared(ctx, instr);
3969 break;
3970 case nir_intrinsic_store_shared:
3971 visit_store_shared(ctx, instr);
3972 break;
3973 case nir_intrinsic_bindless_image_samples:
3974 case nir_intrinsic_image_deref_samples:
3975 result = visit_image_samples(ctx, instr);
3976 break;
3977 case nir_intrinsic_bindless_image_load:
3978 result = visit_image_load(ctx, instr, true);
3979 break;
3980 case nir_intrinsic_image_deref_load:
3981 result = visit_image_load(ctx, instr, false);
3982 break;
3983 case nir_intrinsic_bindless_image_store:
3984 visit_image_store(ctx, instr, true);
3985 break;
3986 case nir_intrinsic_image_deref_store:
3987 visit_image_store(ctx, instr, false);
3988 break;
3989 case nir_intrinsic_bindless_image_atomic_add:
3990 case nir_intrinsic_bindless_image_atomic_imin:
3991 case nir_intrinsic_bindless_image_atomic_umin:
3992 case nir_intrinsic_bindless_image_atomic_imax:
3993 case nir_intrinsic_bindless_image_atomic_umax:
3994 case nir_intrinsic_bindless_image_atomic_and:
3995 case nir_intrinsic_bindless_image_atomic_or:
3996 case nir_intrinsic_bindless_image_atomic_xor:
3997 case nir_intrinsic_bindless_image_atomic_exchange:
3998 case nir_intrinsic_bindless_image_atomic_comp_swap:
3999 case nir_intrinsic_bindless_image_atomic_inc_wrap:
4000 case nir_intrinsic_bindless_image_atomic_dec_wrap:
4001 result = visit_image_atomic(ctx, instr, true);
4002 break;
4003 case nir_intrinsic_image_deref_atomic_add:
4004 case nir_intrinsic_image_deref_atomic_imin:
4005 case nir_intrinsic_image_deref_atomic_umin:
4006 case nir_intrinsic_image_deref_atomic_imax:
4007 case nir_intrinsic_image_deref_atomic_umax:
4008 case nir_intrinsic_image_deref_atomic_and:
4009 case nir_intrinsic_image_deref_atomic_or:
4010 case nir_intrinsic_image_deref_atomic_xor:
4011 case nir_intrinsic_image_deref_atomic_exchange:
4012 case nir_intrinsic_image_deref_atomic_comp_swap:
4013 case nir_intrinsic_image_deref_atomic_inc_wrap:
4014 case nir_intrinsic_image_deref_atomic_dec_wrap:
4015 result = visit_image_atomic(ctx, instr, false);
4016 break;
4017 case nir_intrinsic_bindless_image_size:
4018 result = visit_image_size(ctx, instr, true);
4019 break;
4020 case nir_intrinsic_image_deref_size:
4021 result = visit_image_size(ctx, instr, false);
4022 break;
4023 case nir_intrinsic_shader_clock:
4024 result = ac_build_shader_clock(&ctx->ac,
4025 nir_intrinsic_memory_scope(instr));
4026 break;
4027 case nir_intrinsic_discard:
4028 case nir_intrinsic_discard_if:
4029 emit_discard(ctx, instr);
4030 break;
4031 case nir_intrinsic_demote:
4032 case nir_intrinsic_demote_if:
4033 emit_demote(ctx, instr);
4034 break;
4035 case nir_intrinsic_memory_barrier:
4036 case nir_intrinsic_group_memory_barrier:
4037 case nir_intrinsic_memory_barrier_buffer:
4038 case nir_intrinsic_memory_barrier_image:
4039 case nir_intrinsic_memory_barrier_shared:
4040 emit_membar(&ctx->ac, instr);
4041 break;
4042 case nir_intrinsic_scoped_barrier: {
4043 assert(!(nir_intrinsic_memory_semantics(instr) &
4044 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
4045
4046 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
4047
4048 unsigned wait_flags = 0;
4049 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
4050 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
4051 if (modes & nir_var_mem_shared)
4052 wait_flags |= AC_WAIT_LGKM;
4053
4054 if (wait_flags)
4055 ac_build_waitcnt(&ctx->ac, wait_flags);
4056
4057 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
4058 ac_emit_barrier(&ctx->ac, ctx->stage);
4059 break;
4060 }
4061 case nir_intrinsic_memory_barrier_tcs_patch:
4062 break;
4063 case nir_intrinsic_control_barrier:
4064 ac_emit_barrier(&ctx->ac, ctx->stage);
4065 break;
4066 case nir_intrinsic_shared_atomic_add:
4067 case nir_intrinsic_shared_atomic_imin:
4068 case nir_intrinsic_shared_atomic_umin:
4069 case nir_intrinsic_shared_atomic_imax:
4070 case nir_intrinsic_shared_atomic_umax:
4071 case nir_intrinsic_shared_atomic_and:
4072 case nir_intrinsic_shared_atomic_or:
4073 case nir_intrinsic_shared_atomic_xor:
4074 case nir_intrinsic_shared_atomic_exchange:
4075 case nir_intrinsic_shared_atomic_comp_swap:
4076 case nir_intrinsic_shared_atomic_fadd: {
4077 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
4078 instr->src[1].ssa->bit_size);
4079 result = visit_var_atomic(ctx, instr, ptr, 1);
4080 break;
4081 }
4082 case nir_intrinsic_deref_atomic_add:
4083 case nir_intrinsic_deref_atomic_imin:
4084 case nir_intrinsic_deref_atomic_umin:
4085 case nir_intrinsic_deref_atomic_imax:
4086 case nir_intrinsic_deref_atomic_umax:
4087 case nir_intrinsic_deref_atomic_and:
4088 case nir_intrinsic_deref_atomic_or:
4089 case nir_intrinsic_deref_atomic_xor:
4090 case nir_intrinsic_deref_atomic_exchange:
4091 case nir_intrinsic_deref_atomic_comp_swap:
4092 case nir_intrinsic_deref_atomic_fadd: {
4093 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4094 result = visit_var_atomic(ctx, instr, ptr, 1);
4095 break;
4096 }
4097 case nir_intrinsic_load_barycentric_pixel:
4098 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4099 break;
4100 case nir_intrinsic_load_barycentric_centroid:
4101 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4102 break;
4103 case nir_intrinsic_load_barycentric_sample:
4104 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4105 break;
4106 case nir_intrinsic_load_barycentric_model:
4107 result = barycentric_model(ctx);
4108 break;
4109 case nir_intrinsic_load_barycentric_at_offset: {
4110 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4111 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4112 break;
4113 }
4114 case nir_intrinsic_load_barycentric_at_sample: {
4115 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4116 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4117 break;
4118 }
4119 case nir_intrinsic_load_interpolated_input: {
4120 /* We assume any indirect loads have been lowered away */
4121 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4122 assert(offset);
4123 assert(offset[0].i32 == 0);
4124
4125 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4126 unsigned index = nir_intrinsic_base(instr);
4127 unsigned component = nir_intrinsic_component(instr);
4128 result = load_interpolated_input(ctx, interp_param, index,
4129 component,
4130 instr->dest.ssa.num_components,
4131 instr->dest.ssa.bit_size);
4132 break;
4133 }
4134 case nir_intrinsic_emit_vertex:
4135 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4136 break;
4137 case nir_intrinsic_emit_vertex_with_counter: {
4138 unsigned stream = nir_intrinsic_stream_id(instr);
4139 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4140 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4141 next_vertex,
4142 ctx->abi->outputs);
4143 break;
4144 }
4145 case nir_intrinsic_end_primitive:
4146 case nir_intrinsic_end_primitive_with_counter:
4147 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4148 break;
4149 case nir_intrinsic_load_tess_coord:
4150 result = ctx->abi->load_tess_coord(ctx->abi);
4151 break;
4152 case nir_intrinsic_load_tess_level_outer:
4153 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4154 break;
4155 case nir_intrinsic_load_tess_level_inner:
4156 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4157 break;
4158 case nir_intrinsic_load_tess_level_outer_default:
4159 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4160 break;
4161 case nir_intrinsic_load_tess_level_inner_default:
4162 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4163 break;
4164 case nir_intrinsic_load_patch_vertices_in:
4165 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4166 break;
4167 case nir_intrinsic_vote_all: {
4168 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4169 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4170 break;
4171 }
4172 case nir_intrinsic_vote_any: {
4173 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4174 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4175 break;
4176 }
4177 case nir_intrinsic_shuffle:
4178 if (ctx->ac.chip_class == GFX8 ||
4179 ctx->ac.chip_class == GFX9 ||
4180 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4181 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4182 get_src(ctx, instr->src[1]));
4183 } else {
4184 LLVMValueRef src = get_src(ctx, instr->src[0]);
4185 LLVMValueRef index = get_src(ctx, instr->src[1]);
4186 LLVMTypeRef type = LLVMTypeOf(src);
4187 struct waterfall_context wctx;
4188 LLVMValueRef index_val;
4189
4190 index_val = enter_waterfall(ctx, &wctx, index, true);
4191
4192 src = LLVMBuildZExt(ctx->ac.builder, src,
4193 ctx->ac.i32, "");
4194
4195 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4196 ctx->ac.i32,
4197 (LLVMValueRef []) { src, index_val }, 2,
4198 AC_FUNC_ATTR_READNONE |
4199 AC_FUNC_ATTR_CONVERGENT);
4200
4201 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4202
4203 result = exit_waterfall(ctx, &wctx, result);
4204 }
4205 break;
4206 case nir_intrinsic_reduce:
4207 result = ac_build_reduce(&ctx->ac,
4208 get_src(ctx, instr->src[0]),
4209 instr->const_index[0],
4210 instr->const_index[1]);
4211 break;
4212 case nir_intrinsic_inclusive_scan:
4213 result = ac_build_inclusive_scan(&ctx->ac,
4214 get_src(ctx, instr->src[0]),
4215 instr->const_index[0]);
4216 break;
4217 case nir_intrinsic_exclusive_scan:
4218 result = ac_build_exclusive_scan(&ctx->ac,
4219 get_src(ctx, instr->src[0]),
4220 instr->const_index[0]);
4221 break;
4222 case nir_intrinsic_quad_broadcast: {
4223 unsigned lane = nir_src_as_uint(instr->src[1]);
4224 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4225 lane, lane, lane, lane);
4226 break;
4227 }
4228 case nir_intrinsic_quad_swap_horizontal:
4229 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4230 break;
4231 case nir_intrinsic_quad_swap_vertical:
4232 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4233 break;
4234 case nir_intrinsic_quad_swap_diagonal:
4235 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4236 break;
4237 case nir_intrinsic_quad_swizzle_amd: {
4238 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4239 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4240 mask & 0x3, (mask >> 2) & 0x3,
4241 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4242 break;
4243 }
4244 case nir_intrinsic_masked_swizzle_amd: {
4245 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4246 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4247 break;
4248 }
4249 case nir_intrinsic_write_invocation_amd:
4250 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4251 get_src(ctx, instr->src[1]),
4252 get_src(ctx, instr->src[2]));
4253 break;
4254 case nir_intrinsic_mbcnt_amd:
4255 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4256 break;
4257 case nir_intrinsic_load_scratch: {
4258 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4259 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4260 offset);
4261 LLVMTypeRef comp_type =
4262 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4263 LLVMTypeRef vec_type =
4264 instr->dest.ssa.num_components == 1 ? comp_type :
4265 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4266 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4267 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4268 LLVMPointerType(vec_type, addr_space), "");
4269 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4270 break;
4271 }
4272 case nir_intrinsic_store_scratch: {
4273 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4274 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4275 offset);
4276 LLVMTypeRef comp_type =
4277 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4278 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4279 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4280 LLVMPointerType(comp_type, addr_space), "");
4281 LLVMValueRef src = get_src(ctx, instr->src[0]);
4282 unsigned wrmask = nir_intrinsic_write_mask(instr);
4283 while (wrmask) {
4284 int start, count;
4285 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4286
4287 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4288 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4289 LLVMTypeRef vec_type =
4290 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4291 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4292 offset_ptr,
4293 LLVMPointerType(vec_type, addr_space),
4294 "");
4295 LLVMValueRef offset_src =
4296 ac_extract_components(&ctx->ac, src, start, count);
4297 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4298 }
4299 break;
4300 }
4301 case nir_intrinsic_load_constant: {
4302 unsigned base = nir_intrinsic_base(instr);
4303 unsigned range = nir_intrinsic_range(instr);
4304
4305 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4306 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4307 LLVMConstInt(ctx->ac.i32, base, false), "");
4308
4309 /* Clamp the offset to avoid out-of-bound access because global
4310 * instructions can't handle them.
4311 */
4312 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4313 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4314 offset, size, "");
4315 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4316
4317 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4318 offset);
4319 LLVMTypeRef comp_type =
4320 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4321 LLVMTypeRef vec_type =
4322 instr->dest.ssa.num_components == 1 ? comp_type :
4323 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4324 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4325 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4326 LLVMPointerType(vec_type, addr_space), "");
4327 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4328 break;
4329 }
4330 default:
4331 fprintf(stderr, "Unknown intrinsic: ");
4332 nir_print_instr(&instr->instr, stderr);
4333 fprintf(stderr, "\n");
4334 break;
4335 }
4336 if (result) {
4337 ctx->ssa_defs[instr->dest.ssa.index] = result;
4338 }
4339 }
4340
4341 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4342 unsigned base_index,
4343 unsigned constant_index,
4344 LLVMValueRef dynamic_index)
4345 {
4346 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4347 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4348 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4349
4350 /* Bindless uniforms are 64bit so multiple index by 8 */
4351 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4352 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4353
4354 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4355
4356 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4357 NULL, 0, 0, true, true);
4358
4359 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4360 }
4361
4362 struct sampler_desc_address {
4363 unsigned descriptor_set;
4364 unsigned base_index; /* binding in vulkan */
4365 unsigned constant_index;
4366 LLVMValueRef dynamic_index;
4367 bool image;
4368 bool bindless;
4369 };
4370
4371 static struct sampler_desc_address
4372 get_sampler_desc_internal(struct ac_nir_context *ctx,
4373 nir_deref_instr *deref_instr,
4374 const nir_instr *instr,
4375 bool image)
4376 {
4377 LLVMValueRef index = NULL;
4378 unsigned constant_index = 0;
4379 unsigned descriptor_set;
4380 unsigned base_index;
4381 bool bindless = false;
4382
4383 if (!deref_instr) {
4384 descriptor_set = 0;
4385 if (image) {
4386 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4387 base_index = 0;
4388 bindless = true;
4389 index = get_src(ctx, img_instr->src[0]);
4390 } else {
4391 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4392 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4393 nir_tex_src_sampler_handle);
4394 if (sampSrcIdx != -1) {
4395 base_index = 0;
4396 bindless = true;
4397 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4398 } else {
4399 assert(tex_instr && !image);
4400 base_index = tex_instr->sampler_index;
4401 }
4402 }
4403 } else {
4404 while(deref_instr->deref_type != nir_deref_type_var) {
4405 if (deref_instr->deref_type == nir_deref_type_array) {
4406 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4407 if (!array_size)
4408 array_size = 1;
4409
4410 if (nir_src_is_const(deref_instr->arr.index)) {
4411 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4412 } else {
4413 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4414
4415 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4416 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4417
4418 if (!index)
4419 index = indirect;
4420 else
4421 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4422 }
4423
4424 deref_instr = nir_src_as_deref(deref_instr->parent);
4425 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4426 unsigned sidx = deref_instr->strct.index;
4427 deref_instr = nir_src_as_deref(deref_instr->parent);
4428 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4429 } else {
4430 unreachable("Unsupported deref type");
4431 }
4432 }
4433 descriptor_set = deref_instr->var->data.descriptor_set;
4434
4435 if (deref_instr->var->data.bindless) {
4436 /* For now just assert on unhandled variable types */
4437 assert(deref_instr->var->data.mode == nir_var_uniform);
4438
4439 base_index = deref_instr->var->data.driver_location;
4440 bindless = true;
4441
4442 index = index ? index : ctx->ac.i32_0;
4443 index = get_bindless_index_from_uniform(ctx, base_index,
4444 constant_index, index);
4445 } else
4446 base_index = deref_instr->var->data.binding;
4447 }
4448 return (struct sampler_desc_address) {
4449 .descriptor_set = descriptor_set,
4450 .base_index = base_index,
4451 .constant_index = constant_index,
4452 .dynamic_index = index,
4453 .image = image,
4454 .bindless = bindless,
4455 };
4456 }
4457
4458 /* Extract any possibly divergent index into a separate value that can be fed
4459 * into get_sampler_desc with the same arguments. */
4460 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4461 nir_deref_instr *deref_instr,
4462 const nir_instr *instr,
4463 bool image)
4464 {
4465 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4466 return addr.dynamic_index;
4467 }
4468
4469 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4470 nir_deref_instr *deref_instr,
4471 enum ac_descriptor_type desc_type,
4472 const nir_instr *instr,
4473 LLVMValueRef index,
4474 bool image, bool write)
4475 {
4476 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4477 return ctx->abi->load_sampler_desc(ctx->abi,
4478 addr.descriptor_set,
4479 addr.base_index,
4480 addr.constant_index, index,
4481 desc_type, addr.image, write, addr.bindless);
4482 }
4483
4484 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4485 *
4486 * GFX6-GFX7:
4487 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4488 * filtering manually. The driver sets img7 to a mask clearing
4489 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4490 * s_and_b32 samp0, samp0, img7
4491 *
4492 * GFX8:
4493 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4494 */
4495 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4496 LLVMValueRef res, LLVMValueRef samp)
4497 {
4498 LLVMBuilderRef builder = ctx->ac.builder;
4499 LLVMValueRef img7, samp0;
4500
4501 if (ctx->ac.chip_class >= GFX8)
4502 return samp;
4503
4504 img7 = LLVMBuildExtractElement(builder, res,
4505 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4506 samp0 = LLVMBuildExtractElement(builder, samp,
4507 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4508 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4509 return LLVMBuildInsertElement(builder, samp, samp0,
4510 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4511 }
4512
4513 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4514 nir_tex_instr *instr,
4515 struct waterfall_context *wctx,
4516 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4517 LLVMValueRef *fmask_ptr)
4518 {
4519 nir_deref_instr *texture_deref_instr = NULL;
4520 nir_deref_instr *sampler_deref_instr = NULL;
4521 int plane = -1;
4522
4523 for (unsigned i = 0; i < instr->num_srcs; i++) {
4524 switch (instr->src[i].src_type) {
4525 case nir_tex_src_texture_deref:
4526 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4527 break;
4528 case nir_tex_src_sampler_deref:
4529 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4530 break;
4531 case nir_tex_src_plane:
4532 plane = nir_src_as_int(instr->src[i].src);
4533 break;
4534 default:
4535 break;
4536 }
4537 }
4538
4539 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4540 &instr->instr, false);
4541 if (!sampler_deref_instr)
4542 sampler_deref_instr = texture_deref_instr;
4543
4544 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4545 &instr->instr, false);
4546 if (instr->texture_non_uniform)
4547 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4548
4549 if (instr->sampler_non_uniform)
4550 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4551
4552 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4553
4554 if (plane >= 0) {
4555 assert(instr->op != nir_texop_txf_ms &&
4556 instr->op != nir_texop_samples_identical);
4557 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4558
4559 main_descriptor = AC_DESC_PLANE_0 + plane;
4560 }
4561
4562 if (instr->op == nir_texop_fragment_mask_fetch) {
4563 /* The fragment mask is fetched from the compressed
4564 * multisampled surface.
4565 */
4566 main_descriptor = AC_DESC_FMASK;
4567 }
4568
4569 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4570 texture_dynamic_index, false, false);
4571
4572 if (samp_ptr) {
4573 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4574 sampler_dynamic_index, false, false);
4575 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4576 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4577 }
4578 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4579 instr->op == nir_texop_samples_identical))
4580 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4581 &instr->instr, texture_dynamic_index, false, false);
4582 }
4583
4584 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4585 LLVMValueRef coord)
4586 {
4587 coord = ac_to_float(ctx, coord);
4588 coord = ac_build_round(ctx, coord);
4589 coord = ac_to_integer(ctx, coord);
4590 return coord;
4591 }
4592
4593 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4594 {
4595 LLVMValueRef result = NULL;
4596 struct ac_image_args args = { 0 };
4597 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4598 LLVMValueRef ddx = NULL, ddy = NULL;
4599 unsigned offset_src = 0;
4600 struct waterfall_context wctx[2] = {{{0}}};
4601
4602 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4603
4604 for (unsigned i = 0; i < instr->num_srcs; i++) {
4605 switch (instr->src[i].src_type) {
4606 case nir_tex_src_coord: {
4607 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4608 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4609 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4610 break;
4611 }
4612 case nir_tex_src_projector:
4613 break;
4614 case nir_tex_src_comparator:
4615 if (instr->is_shadow) {
4616 args.compare = get_src(ctx, instr->src[i].src);
4617 args.compare = ac_to_float(&ctx->ac, args.compare);
4618 }
4619 break;
4620 case nir_tex_src_offset:
4621 args.offset = get_src(ctx, instr->src[i].src);
4622 offset_src = i;
4623 break;
4624 case nir_tex_src_bias:
4625 args.bias = get_src(ctx, instr->src[i].src);
4626 break;
4627 case nir_tex_src_lod: {
4628 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4629 args.level_zero = true;
4630 else
4631 args.lod = get_src(ctx, instr->src[i].src);
4632 break;
4633 }
4634 case nir_tex_src_ms_index:
4635 sample_index = get_src(ctx, instr->src[i].src);
4636 break;
4637 case nir_tex_src_ms_mcs:
4638 break;
4639 case nir_tex_src_ddx:
4640 ddx = get_src(ctx, instr->src[i].src);
4641 break;
4642 case nir_tex_src_ddy:
4643 ddy = get_src(ctx, instr->src[i].src);
4644 break;
4645 case nir_tex_src_min_lod:
4646 args.min_lod = get_src(ctx, instr->src[i].src);
4647 break;
4648 case nir_tex_src_texture_offset:
4649 case nir_tex_src_sampler_offset:
4650 case nir_tex_src_plane:
4651 default:
4652 break;
4653 }
4654 }
4655
4656 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4657 result = get_buffer_size(ctx, args.resource, true);
4658 goto write_result;
4659 }
4660
4661 if (instr->op == nir_texop_texture_samples) {
4662 LLVMValueRef res, samples, is_msaa;
4663 LLVMValueRef default_sample;
4664
4665 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4666 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4667 LLVMConstInt(ctx->ac.i32, 3, false), "");
4668 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4669 LLVMConstInt(ctx->ac.i32, 28, false), "");
4670 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4671 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4672 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4673 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4674
4675 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4676 LLVMConstInt(ctx->ac.i32, 16, false), "");
4677 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4678 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4679 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4680 samples, "");
4681
4682 if (ctx->abi->robust_buffer_access) {
4683 LLVMValueRef dword1, is_null_descriptor;
4684
4685 /* Extract the second dword of the descriptor, if it's
4686 * all zero, then it's a null descriptor.
4687 */
4688 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4689 LLVMConstInt(ctx->ac.i32, 1, false), "");
4690 is_null_descriptor =
4691 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4692 LLVMConstInt(ctx->ac.i32, 0, false), "");
4693 default_sample =
4694 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4695 ctx->ac.i32_0, ctx->ac.i32_1, "");
4696 } else {
4697 default_sample = ctx->ac.i32_1;
4698 }
4699
4700 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4701 default_sample, "");
4702 result = samples;
4703 goto write_result;
4704 }
4705
4706 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4707 LLVMValueRef offset[3], pack;
4708 for (unsigned chan = 0; chan < 3; ++chan)
4709 offset[chan] = ctx->ac.i32_0;
4710
4711 unsigned num_components = ac_get_llvm_num_components(args.offset);
4712 for (unsigned chan = 0; chan < num_components; chan++) {
4713 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4714 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4715 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4716 if (chan)
4717 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4718 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4719 }
4720 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4721 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4722 args.offset = pack;
4723 }
4724
4725 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4726 * OpenGL 4.5 spec says:
4727 *
4728 * "If the texture’s internal format indicates a fixed-point
4729 * depth texture, then D_t and D_ref are clamped to the
4730 * range [0, 1]; otherwise no clamping is performed."
4731 *
4732 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4733 * so the depth comparison value isn't clamped for Z16 and
4734 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4735 * an explicitly clamped 32-bit float format.
4736 */
4737 if (args.compare &&
4738 ctx->ac.chip_class >= GFX8 &&
4739 ctx->ac.chip_class <= GFX9 &&
4740 ctx->abi->clamp_shadow_reference) {
4741 LLVMValueRef upgraded, clamped;
4742
4743 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4744 LLVMConstInt(ctx->ac.i32, 3, false), "");
4745 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4746 LLVMConstInt(ctx->ac.i32, 29, false), "");
4747 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4748 clamped = ac_build_clamp(&ctx->ac, args.compare);
4749 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4750 args.compare, "");
4751 }
4752
4753 /* pack derivatives */
4754 if (ddx || ddy) {
4755 int num_src_deriv_channels, num_dest_deriv_channels;
4756 switch (instr->sampler_dim) {
4757 case GLSL_SAMPLER_DIM_3D:
4758 case GLSL_SAMPLER_DIM_CUBE:
4759 num_src_deriv_channels = 3;
4760 num_dest_deriv_channels = 3;
4761 break;
4762 case GLSL_SAMPLER_DIM_2D:
4763 default:
4764 num_src_deriv_channels = 2;
4765 num_dest_deriv_channels = 2;
4766 break;
4767 case GLSL_SAMPLER_DIM_1D:
4768 num_src_deriv_channels = 1;
4769 if (ctx->ac.chip_class == GFX9) {
4770 num_dest_deriv_channels = 2;
4771 } else {
4772 num_dest_deriv_channels = 1;
4773 }
4774 break;
4775 }
4776
4777 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4778 args.derivs[i] = ac_to_float(&ctx->ac,
4779 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4780 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4781 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4782 }
4783 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4784 args.derivs[i] = ctx->ac.f32_0;
4785 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4786 }
4787 }
4788
4789 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4790 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4791 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4792 if (instr->coord_components == 3)
4793 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4794 ac_prepare_cube_coords(&ctx->ac,
4795 instr->op == nir_texop_txd, instr->is_array,
4796 instr->op == nir_texop_lod, args.coords, args.derivs);
4797 }
4798
4799 /* Texture coordinates fixups */
4800 if (instr->coord_components > 1 &&
4801 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4802 instr->is_array &&
4803 instr->op != nir_texop_txf) {
4804 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4805 }
4806
4807 if (instr->coord_components > 2 &&
4808 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4809 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4810 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4811 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4812 instr->is_array &&
4813 instr->op != nir_texop_txf &&
4814 instr->op != nir_texop_txf_ms &&
4815 instr->op != nir_texop_fragment_fetch &&
4816 instr->op != nir_texop_fragment_mask_fetch) {
4817 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4818 }
4819
4820 if (ctx->ac.chip_class == GFX9 &&
4821 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4822 instr->op != nir_texop_lod) {
4823 LLVMValueRef filler;
4824 if (instr->op == nir_texop_txf)
4825 filler = ctx->ac.i32_0;
4826 else
4827 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4828
4829 if (instr->is_array)
4830 args.coords[2] = args.coords[1];
4831 args.coords[1] = filler;
4832 }
4833
4834 /* Pack sample index */
4835 if (sample_index && (instr->op == nir_texop_txf_ms ||
4836 instr->op == nir_texop_fragment_fetch))
4837 args.coords[instr->coord_components] = sample_index;
4838
4839 if (instr->op == nir_texop_samples_identical) {
4840 struct ac_image_args txf_args = { 0 };
4841 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4842
4843 txf_args.dmask = 0xf;
4844 txf_args.resource = fmask_ptr;
4845 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4846 result = build_tex_intrinsic(ctx, instr, &txf_args);
4847
4848 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4849 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4850 goto write_result;
4851 }
4852
4853 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4854 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4855 instr->op != nir_texop_txs &&
4856 instr->op != nir_texop_fragment_fetch &&
4857 instr->op != nir_texop_fragment_mask_fetch) {
4858 unsigned sample_chan = instr->is_array ? 3 : 2;
4859 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4860 &ctx->ac, args.coords[0], args.coords[1],
4861 instr->is_array ? args.coords[2] : NULL,
4862 args.coords[sample_chan], fmask_ptr);
4863 }
4864
4865 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4866 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4867 num_offsets = MIN2(num_offsets, instr->coord_components);
4868 for (unsigned i = 0; i < num_offsets; ++i) {
4869 args.coords[i] = LLVMBuildAdd(
4870 ctx->ac.builder, args.coords[i],
4871 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4872 }
4873 args.offset = NULL;
4874 }
4875
4876 /* DMASK was repurposed for GATHER4. 4 components are always
4877 * returned and DMASK works like a swizzle - it selects
4878 * the component to fetch. The only valid DMASK values are
4879 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4880 * (red,red,red,red) etc.) The ISA document doesn't mention
4881 * this.
4882 */
4883 args.dmask = 0xf;
4884 if (instr->op == nir_texop_tg4) {
4885 if (instr->is_shadow)
4886 args.dmask = 1;
4887 else
4888 args.dmask = 1 << instr->component;
4889 }
4890
4891 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4892 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4893 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4894 }
4895
4896 /* Adjust the number of coordinates because we only need (x,y) for 2D
4897 * multisampled images and (x,y,layer) for 2D multisampled layered
4898 * images or for multisampled input attachments.
4899 */
4900 if (instr->op == nir_texop_fragment_mask_fetch) {
4901 if (args.dim == ac_image_2dmsaa) {
4902 args.dim = ac_image_2d;
4903 } else {
4904 assert(args.dim == ac_image_2darraymsaa);
4905 args.dim = ac_image_2darray;
4906 }
4907 }
4908
4909 assert(instr->dest.is_ssa);
4910 args.d16 = instr->dest.ssa.bit_size == 16;
4911
4912 result = build_tex_intrinsic(ctx, instr, &args);
4913
4914 if (instr->op == nir_texop_query_levels)
4915 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4916 else if (instr->is_shadow && instr->is_new_style_shadow &&
4917 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4918 instr->op != nir_texop_tg4)
4919 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4920 else if (instr->op == nir_texop_txs &&
4921 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4922 instr->is_array) {
4923 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4924 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4925 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4926 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4927 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4928 } else if (ctx->ac.chip_class == GFX9 &&
4929 instr->op == nir_texop_txs &&
4930 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4931 instr->is_array) {
4932 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4933 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4934 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4935 ctx->ac.i32_1, "");
4936 } else if (instr->dest.ssa.num_components != 4)
4937 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4938
4939 write_result:
4940 if (result) {
4941 assert(instr->dest.is_ssa);
4942 result = ac_to_integer(&ctx->ac, result);
4943
4944 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4945 result = exit_waterfall(ctx, wctx + i, result);
4946 }
4947
4948 ctx->ssa_defs[instr->dest.ssa.index] = result;
4949 }
4950 }
4951
4952 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4953 {
4954 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4955 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4956
4957 ctx->ssa_defs[instr->dest.ssa.index] = result;
4958 _mesa_hash_table_insert(ctx->phis, instr, result);
4959 }
4960
4961 static void visit_post_phi(struct ac_nir_context *ctx,
4962 nir_phi_instr *instr,
4963 LLVMValueRef llvm_phi)
4964 {
4965 nir_foreach_phi_src(src, instr) {
4966 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4967 LLVMValueRef llvm_src = get_src(ctx, src->src);
4968
4969 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4970 }
4971 }
4972
4973 static void phi_post_pass(struct ac_nir_context *ctx)
4974 {
4975 hash_table_foreach(ctx->phis, entry) {
4976 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4977 (LLVMValueRef)entry->data);
4978 }
4979 }
4980
4981
4982 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4983 nir_foreach_use(use_src, def) {
4984 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4985 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4986 if (instr->intrinsic == nir_intrinsic_store_deref)
4987 return true;
4988 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4989 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4990 if (instr->op == nir_op_vec4 &&
4991 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4992 return true;
4993 }
4994 }
4995 }
4996 return false;
4997 }
4998
4999 static void visit_ssa_undef(struct ac_nir_context *ctx,
5000 const nir_ssa_undef_instr *instr)
5001 {
5002 unsigned num_components = instr->def.num_components;
5003 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
5004
5005 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
5006 LLVMValueRef undef;
5007
5008 if (num_components == 1)
5009 undef = LLVMGetUndef(type);
5010 else {
5011 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
5012 }
5013 ctx->ssa_defs[instr->def.index] = undef;
5014 } else {
5015 LLVMValueRef zero = LLVMConstInt(type, 0, false);
5016 if (num_components > 1) {
5017 zero = ac_build_gather_values_extended(
5018 &ctx->ac, &zero, 4, 0, false, false);
5019 }
5020 ctx->ssa_defs[instr->def.index] = zero;
5021 }
5022 }
5023
5024 static void visit_jump(struct ac_llvm_context *ctx,
5025 const nir_jump_instr *instr)
5026 {
5027 switch (instr->type) {
5028 case nir_jump_break:
5029 ac_build_break(ctx);
5030 break;
5031 case nir_jump_continue:
5032 ac_build_continue(ctx);
5033 break;
5034 default:
5035 fprintf(stderr, "Unknown NIR jump instr: ");
5036 nir_print_instr(&instr->instr, stderr);
5037 fprintf(stderr, "\n");
5038 abort();
5039 }
5040 }
5041
5042 static LLVMTypeRef
5043 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
5044 enum glsl_base_type type)
5045 {
5046 switch (type) {
5047 case GLSL_TYPE_INT:
5048 case GLSL_TYPE_UINT:
5049 case GLSL_TYPE_BOOL:
5050 case GLSL_TYPE_SUBROUTINE:
5051 return ac->i32;
5052 case GLSL_TYPE_INT8:
5053 case GLSL_TYPE_UINT8:
5054 return ac->i8;
5055 case GLSL_TYPE_INT16:
5056 case GLSL_TYPE_UINT16:
5057 return ac->i16;
5058 case GLSL_TYPE_FLOAT:
5059 return ac->f32;
5060 case GLSL_TYPE_FLOAT16:
5061 return ac->f16;
5062 case GLSL_TYPE_INT64:
5063 case GLSL_TYPE_UINT64:
5064 return ac->i64;
5065 case GLSL_TYPE_DOUBLE:
5066 return ac->f64;
5067 default:
5068 unreachable("unknown GLSL type");
5069 }
5070 }
5071
5072 static LLVMTypeRef
5073 glsl_to_llvm_type(struct ac_llvm_context *ac,
5074 const struct glsl_type *type)
5075 {
5076 if (glsl_type_is_scalar(type)) {
5077 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
5078 }
5079
5080 if (glsl_type_is_vector(type)) {
5081 return LLVMVectorType(
5082 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5083 glsl_get_vector_elements(type));
5084 }
5085
5086 if (glsl_type_is_matrix(type)) {
5087 return LLVMArrayType(
5088 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5089 glsl_get_matrix_columns(type));
5090 }
5091
5092 if (glsl_type_is_array(type)) {
5093 return LLVMArrayType(
5094 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5095 glsl_get_length(type));
5096 }
5097
5098 assert(glsl_type_is_struct_or_ifc(type));
5099
5100 LLVMTypeRef member_types[glsl_get_length(type)];
5101
5102 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5103 member_types[i] =
5104 glsl_to_llvm_type(ac,
5105 glsl_get_struct_field(type, i));
5106 }
5107
5108 return LLVMStructTypeInContext(ac->context, member_types,
5109 glsl_get_length(type), false);
5110 }
5111
5112 static void visit_deref(struct ac_nir_context *ctx,
5113 nir_deref_instr *instr)
5114 {
5115 if (instr->mode != nir_var_mem_shared &&
5116 instr->mode != nir_var_mem_global)
5117 return;
5118
5119 LLVMValueRef result = NULL;
5120 switch(instr->deref_type) {
5121 case nir_deref_type_var: {
5122 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5123 result = entry->data;
5124 break;
5125 }
5126 case nir_deref_type_struct:
5127 if (instr->mode == nir_var_mem_global) {
5128 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5129 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5130 instr->strct.index);
5131 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5132 LLVMConstInt(ctx->ac.i32, offset, 0));
5133 } else {
5134 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5135 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5136 }
5137 break;
5138 case nir_deref_type_array:
5139 if (instr->mode == nir_var_mem_global) {
5140 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5141 unsigned stride = glsl_get_explicit_stride(parent->type);
5142
5143 if ((glsl_type_is_matrix(parent->type) &&
5144 glsl_matrix_type_is_row_major(parent->type)) ||
5145 (glsl_type_is_vector(parent->type) && stride == 0))
5146 stride = type_scalar_size_bytes(parent->type);
5147
5148 assert(stride > 0);
5149 LLVMValueRef index = get_src(ctx, instr->arr.index);
5150 if (LLVMTypeOf(index) != ctx->ac.i64)
5151 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5152
5153 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5154
5155 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5156 } else {
5157 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5158 get_src(ctx, instr->arr.index));
5159 }
5160 break;
5161 case nir_deref_type_ptr_as_array:
5162 if (instr->mode == nir_var_mem_global) {
5163 unsigned stride = nir_deref_instr_array_stride(instr);
5164
5165 LLVMValueRef index = get_src(ctx, instr->arr.index);
5166 if (LLVMTypeOf(index) != ctx->ac.i64)
5167 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5168
5169 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5170
5171 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5172 } else {
5173 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5174 get_src(ctx, instr->arr.index));
5175 }
5176 break;
5177 case nir_deref_type_cast: {
5178 result = get_src(ctx, instr->parent);
5179
5180 /* We can't use the structs from LLVM because the shader
5181 * specifies its own offsets. */
5182 LLVMTypeRef pointee_type = ctx->ac.i8;
5183 if (instr->mode == nir_var_mem_shared)
5184 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5185
5186 unsigned address_space;
5187
5188 switch(instr->mode) {
5189 case nir_var_mem_shared:
5190 address_space = AC_ADDR_SPACE_LDS;
5191 break;
5192 case nir_var_mem_global:
5193 address_space = AC_ADDR_SPACE_GLOBAL;
5194 break;
5195 default:
5196 unreachable("Unhandled address space");
5197 }
5198
5199 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5200
5201 if (LLVMTypeOf(result) != type) {
5202 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5203 result = LLVMBuildBitCast(ctx->ac.builder, result,
5204 type, "");
5205 } else {
5206 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5207 type, "");
5208 }
5209 }
5210 break;
5211 }
5212 default:
5213 unreachable("Unhandled deref_instr deref type");
5214 }
5215
5216 ctx->ssa_defs[instr->dest.ssa.index] = result;
5217 }
5218
5219 static void visit_cf_list(struct ac_nir_context *ctx,
5220 struct exec_list *list);
5221
5222 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5223 {
5224 nir_foreach_instr(instr, block)
5225 {
5226 switch (instr->type) {
5227 case nir_instr_type_alu:
5228 visit_alu(ctx, nir_instr_as_alu(instr));
5229 break;
5230 case nir_instr_type_load_const:
5231 visit_load_const(ctx, nir_instr_as_load_const(instr));
5232 break;
5233 case nir_instr_type_intrinsic:
5234 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5235 break;
5236 case nir_instr_type_tex:
5237 visit_tex(ctx, nir_instr_as_tex(instr));
5238 break;
5239 case nir_instr_type_phi:
5240 visit_phi(ctx, nir_instr_as_phi(instr));
5241 break;
5242 case nir_instr_type_ssa_undef:
5243 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5244 break;
5245 case nir_instr_type_jump:
5246 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5247 break;
5248 case nir_instr_type_deref:
5249 visit_deref(ctx, nir_instr_as_deref(instr));
5250 break;
5251 default:
5252 fprintf(stderr, "Unknown NIR instr type: ");
5253 nir_print_instr(instr, stderr);
5254 fprintf(stderr, "\n");
5255 abort();
5256 }
5257 }
5258
5259 _mesa_hash_table_insert(ctx->defs, block,
5260 LLVMGetInsertBlock(ctx->ac.builder));
5261 }
5262
5263 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5264 {
5265 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5266
5267 nir_block *then_block =
5268 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5269
5270 ac_build_uif(&ctx->ac, value, then_block->index);
5271
5272 visit_cf_list(ctx, &if_stmt->then_list);
5273
5274 if (!exec_list_is_empty(&if_stmt->else_list)) {
5275 nir_block *else_block =
5276 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5277
5278 ac_build_else(&ctx->ac, else_block->index);
5279 visit_cf_list(ctx, &if_stmt->else_list);
5280 }
5281
5282 ac_build_endif(&ctx->ac, then_block->index);
5283 }
5284
5285 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5286 {
5287 nir_block *first_loop_block =
5288 (nir_block *) exec_list_get_head(&loop->body);
5289
5290 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5291
5292 visit_cf_list(ctx, &loop->body);
5293
5294 ac_build_endloop(&ctx->ac, first_loop_block->index);
5295 }
5296
5297 static void visit_cf_list(struct ac_nir_context *ctx,
5298 struct exec_list *list)
5299 {
5300 foreach_list_typed(nir_cf_node, node, node, list)
5301 {
5302 switch (node->type) {
5303 case nir_cf_node_block:
5304 visit_block(ctx, nir_cf_node_as_block(node));
5305 break;
5306
5307 case nir_cf_node_if:
5308 visit_if(ctx, nir_cf_node_as_if(node));
5309 break;
5310
5311 case nir_cf_node_loop:
5312 visit_loop(ctx, nir_cf_node_as_loop(node));
5313 break;
5314
5315 default:
5316 assert(0);
5317 }
5318 }
5319 }
5320
5321 void
5322 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5323 struct ac_shader_abi *abi,
5324 struct nir_shader *nir,
5325 struct nir_variable *variable,
5326 gl_shader_stage stage)
5327 {
5328 unsigned output_loc = variable->data.driver_location / 4;
5329 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5330
5331 /* tess ctrl has it's own load/store paths for outputs */
5332 if (stage == MESA_SHADER_TESS_CTRL)
5333 return;
5334
5335 if (stage == MESA_SHADER_VERTEX ||
5336 stage == MESA_SHADER_TESS_EVAL ||
5337 stage == MESA_SHADER_GEOMETRY) {
5338 int idx = variable->data.location + variable->data.index;
5339 if (idx == VARYING_SLOT_CLIP_DIST0) {
5340 int length = nir->info.clip_distance_array_size +
5341 nir->info.cull_distance_array_size;
5342
5343 if (length > 4)
5344 attrib_count = 2;
5345 else
5346 attrib_count = 1;
5347 }
5348 }
5349
5350 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5351 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5352 for (unsigned i = 0; i < attrib_count; ++i) {
5353 for (unsigned chan = 0; chan < 4; chan++) {
5354 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5355 ac_build_alloca_undef(ctx, type, "");
5356 }
5357 }
5358 }
5359
5360 static void
5361 setup_locals(struct ac_nir_context *ctx,
5362 struct nir_function *func)
5363 {
5364 int i, j;
5365 ctx->num_locals = 0;
5366 nir_foreach_function_temp_variable(variable, func->impl) {
5367 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5368 variable->data.driver_location = ctx->num_locals * 4;
5369 variable->data.location_frac = 0;
5370 ctx->num_locals += attrib_count;
5371 }
5372 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5373 if (!ctx->locals)
5374 return;
5375
5376 for (i = 0; i < ctx->num_locals; i++) {
5377 for (j = 0; j < 4; j++) {
5378 ctx->locals[i * 4 + j] =
5379 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5380 }
5381 }
5382 }
5383
5384 static void
5385 setup_scratch(struct ac_nir_context *ctx,
5386 struct nir_shader *shader)
5387 {
5388 if (shader->scratch_size == 0)
5389 return;
5390
5391 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5392 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5393 "scratch");
5394 }
5395
5396 static void
5397 setup_constant_data(struct ac_nir_context *ctx,
5398 struct nir_shader *shader)
5399 {
5400 if (!shader->constant_data)
5401 return;
5402
5403 LLVMValueRef data =
5404 LLVMConstStringInContext(ctx->ac.context,
5405 shader->constant_data,
5406 shader->constant_data_size,
5407 true);
5408 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5409
5410 /* We want to put the constant data in the CONST address space so that
5411 * we can use scalar loads. However, LLVM versions before 10 put these
5412 * variables in the same section as the code, which is unacceptable
5413 * for RadeonSI as it needs to relocate all the data sections after
5414 * the code sections. See https://reviews.llvm.org/D65813.
5415 */
5416 unsigned address_space =
5417 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5418
5419 LLVMValueRef global =
5420 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5421 "const_data",
5422 address_space);
5423
5424 LLVMSetInitializer(global, data);
5425 LLVMSetGlobalConstant(global, true);
5426 LLVMSetVisibility(global, LLVMHiddenVisibility);
5427 ctx->constant_data = global;
5428 }
5429
5430 static void
5431 setup_shared(struct ac_nir_context *ctx,
5432 struct nir_shader *nir)
5433 {
5434 if (ctx->ac.lds)
5435 return;
5436
5437 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5438 nir->info.cs.shared_size);
5439
5440 LLVMValueRef lds =
5441 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5442 "compute_lds",
5443 AC_ADDR_SPACE_LDS);
5444 LLVMSetAlignment(lds, 64 * 1024);
5445
5446 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5447 LLVMPointerType(ctx->ac.i8,
5448 AC_ADDR_SPACE_LDS), "");
5449 }
5450
5451 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5452 const struct ac_shader_args *args, struct nir_shader *nir)
5453 {
5454 struct ac_nir_context ctx = {};
5455 struct nir_function *func;
5456
5457 ctx.ac = *ac;
5458 ctx.abi = abi;
5459 ctx.args = args;
5460
5461 ctx.stage = nir->info.stage;
5462 ctx.info = &nir->info;
5463
5464 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5465
5466 /* TODO: remove this after RADV switches to lowered IO */
5467 if (!nir->info.io_lowered) {
5468 nir_foreach_shader_out_variable(variable, nir) {
5469 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5470 ctx.stage);
5471 }
5472 }
5473
5474 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5475 _mesa_key_pointer_equal);
5476 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5477 _mesa_key_pointer_equal);
5478 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5479 _mesa_key_pointer_equal);
5480
5481 if (ctx.abi->kill_ps_if_inf_interp)
5482 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5483 _mesa_key_pointer_equal);
5484
5485 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5486
5487 nir_index_ssa_defs(func->impl);
5488 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5489
5490 setup_locals(&ctx, func);
5491 setup_scratch(&ctx, nir);
5492 setup_constant_data(&ctx, nir);
5493
5494 if (gl_shader_stage_is_compute(nir->info.stage))
5495 setup_shared(&ctx, nir);
5496
5497 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5498 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5499 /* true = don't kill. */
5500 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5501 }
5502
5503 visit_cf_list(&ctx, &func->impl->body);
5504 phi_post_pass(&ctx);
5505
5506 if (ctx.ac.postponed_kill)
5507 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5508 ctx.ac.postponed_kill, ""));
5509
5510 if (!gl_shader_stage_is_compute(nir->info.stage))
5511 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5512 ctx.abi->outputs);
5513
5514 free(ctx.locals);
5515 free(ctx.ssa_defs);
5516 ralloc_free(ctx.defs);
5517 ralloc_free(ctx.phis);
5518 ralloc_free(ctx.vars);
5519 if (ctx.abi->kill_ps_if_inf_interp)
5520 ralloc_free(ctx.verified_interp);
5521 }
5522
5523 bool
5524 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5525 {
5526 bool progress = false;
5527
5528 /* Lower large variables to scratch first so that we won't bloat the
5529 * shader by generating large if ladders for them. We later lower
5530 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5531 */
5532 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5533 nir_var_function_temp,
5534 256,
5535 glsl_get_natural_size_align_bytes);
5536
5537 /* While it would be nice not to have this flag, we are constrained
5538 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5539 */
5540 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5541
5542 /* TODO: Indirect indexing of GS inputs is unimplemented.
5543 *
5544 * TCS and TES load inputs directly from LDS or offchip memory, so
5545 * indirect indexing is trivial.
5546 */
5547 nir_variable_mode indirect_mask = 0;
5548 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5549 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5550 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5551 !llvm_has_working_vgpr_indexing)) {
5552 indirect_mask |= nir_var_shader_in;
5553 }
5554 if (!llvm_has_working_vgpr_indexing &&
5555 nir->info.stage != MESA_SHADER_TESS_CTRL)
5556 indirect_mask |= nir_var_shader_out;
5557
5558 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5559 * smart enough to handle indirects without causing excess spilling
5560 * causing the gpu to hang.
5561 *
5562 * See the following thread for more details of the problem:
5563 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5564 */
5565 indirect_mask |= nir_var_function_temp;
5566
5567 progress |= nir_lower_indirect_derefs(nir, indirect_mask, UINT32_MAX);
5568 return progress;
5569 }
5570
5571 static unsigned
5572 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5573 {
5574 if (intrin->intrinsic != nir_intrinsic_store_output)
5575 return 0;
5576
5577 unsigned writemask = nir_intrinsic_write_mask(intrin) <<
5578 nir_intrinsic_component(intrin);
5579 unsigned location = nir_intrinsic_io_semantics(intrin).location;
5580
5581 if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5582 return writemask << 4;
5583 else if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5584 return writemask;
5585
5586 return 0;
5587 }
5588
5589 static void
5590 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5591 unsigned *cond_block_tf_writemask,
5592 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5593 {
5594 switch (cf_node->type) {
5595 case nir_cf_node_block: {
5596 nir_block *block = nir_cf_node_as_block(cf_node);
5597 nir_foreach_instr(instr, block) {
5598 if (instr->type != nir_instr_type_intrinsic)
5599 continue;
5600
5601 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5602 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5603
5604 /* If we find a barrier in nested control flow put this in the
5605 * too hard basket. In GLSL this is not possible but it is in
5606 * SPIR-V.
5607 */
5608 if (is_nested_cf) {
5609 *tessfactors_are_def_in_all_invocs = false;
5610 return;
5611 }
5612
5613 /* The following case must be prevented:
5614 * gl_TessLevelInner = ...;
5615 * barrier();
5616 * if (gl_InvocationID == 1)
5617 * gl_TessLevelInner = ...;
5618 *
5619 * If you consider disjoint code segments separated by barriers, each
5620 * such segment that writes tess factor channels should write the same
5621 * channels in all codepaths within that segment.
5622 */
5623 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5624 /* Accumulate the result: */
5625 *tessfactors_are_def_in_all_invocs &=
5626 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5627
5628 /* Analyze the next code segment from scratch. */
5629 *upper_block_tf_writemask = 0;
5630 *cond_block_tf_writemask = 0;
5631 }
5632 } else
5633 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5634 }
5635
5636 break;
5637 }
5638 case nir_cf_node_if: {
5639 unsigned then_tessfactor_writemask = 0;
5640 unsigned else_tessfactor_writemask = 0;
5641
5642 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5643 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5644 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5645 cond_block_tf_writemask,
5646 tessfactors_are_def_in_all_invocs, true);
5647 }
5648
5649 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5650 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5651 cond_block_tf_writemask,
5652 tessfactors_are_def_in_all_invocs, true);
5653 }
5654
5655 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5656 /* If both statements write the same tess factor channels,
5657 * we can say that the upper block writes them too.
5658 */
5659 *upper_block_tf_writemask |= then_tessfactor_writemask &
5660 else_tessfactor_writemask;
5661 *cond_block_tf_writemask |= then_tessfactor_writemask |
5662 else_tessfactor_writemask;
5663 }
5664
5665 break;
5666 }
5667 case nir_cf_node_loop: {
5668 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5669 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5670 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5671 cond_block_tf_writemask,
5672 tessfactors_are_def_in_all_invocs, true);
5673 }
5674
5675 break;
5676 }
5677 default:
5678 unreachable("unknown cf node type");
5679 }
5680 }
5681
5682 bool
5683 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5684 {
5685 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5686
5687 /* The pass works as follows:
5688 * If all codepaths write tess factors, we can say that all
5689 * invocations define tess factors.
5690 *
5691 * Each tess factor channel is tracked separately.
5692 */
5693 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5694 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5695
5696 /* Initial value = true. Here the pass will accumulate results from
5697 * multiple segments surrounded by barriers. If tess factors aren't
5698 * written at all, it's a shader bug and we don't care if this will be
5699 * true.
5700 */
5701 bool tessfactors_are_def_in_all_invocs = true;
5702
5703 nir_foreach_function(function, nir) {
5704 if (function->impl) {
5705 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5706 scan_tess_ctrl(node, &main_block_tf_writemask,
5707 &cond_block_tf_writemask,
5708 &tessfactors_are_def_in_all_invocs,
5709 false);
5710 }
5711 }
5712 }
5713
5714 /* Accumulate the result for the last code segment separated by a
5715 * barrier.
5716 */
5717 if (main_block_tf_writemask || cond_block_tf_writemask) {
5718 tessfactors_are_def_in_all_invocs &=
5719 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5720 }
5721
5722 return tessfactors_are_def_in_all_invocs;
5723 }