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radv: make descriptor BOs read-only for the GPU
[mesa.git] / src / amd / vulkan / radv_descriptor_set.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "util/mesa-sha1.h"
31 #include "radv_private.h"
32 #include "sid.h"
33
34 VkResult radv_CreateDescriptorSetLayout(
35 VkDevice _device,
36 const VkDescriptorSetLayoutCreateInfo* pCreateInfo,
37 const VkAllocationCallbacks* pAllocator,
38 VkDescriptorSetLayout* pSetLayout)
39 {
40 RADV_FROM_HANDLE(radv_device, device, _device);
41 struct radv_descriptor_set_layout *set_layout;
42
43 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO);
44
45 uint32_t max_binding = 0;
46 uint32_t immutable_sampler_count = 0;
47 for (uint32_t j = 0; j < pCreateInfo->bindingCount; j++) {
48 max_binding = MAX2(max_binding, pCreateInfo->pBindings[j].binding);
49 if (pCreateInfo->pBindings[j].pImmutableSamplers)
50 immutable_sampler_count += pCreateInfo->pBindings[j].descriptorCount;
51 }
52
53 uint32_t samplers_offset = sizeof(struct radv_descriptor_set_layout) +
54 (max_binding + 1) * sizeof(set_layout->binding[0]);
55 size_t size = samplers_offset + immutable_sampler_count * 4 * sizeof(uint32_t);
56
57 set_layout = vk_alloc2(&device->alloc, pAllocator, size, 8,
58 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
59 if (!set_layout)
60 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
61
62 set_layout->flags = pCreateInfo->flags;
63
64 /* We just allocate all the samplers at the end of the struct */
65 uint32_t *samplers = (uint32_t*)&set_layout->binding[max_binding + 1];
66
67 set_layout->binding_count = max_binding + 1;
68 set_layout->shader_stages = 0;
69 set_layout->dynamic_shader_stages = 0;
70 set_layout->has_immutable_samplers = false;
71 set_layout->size = 0;
72
73 memset(set_layout->binding, 0, size - sizeof(struct radv_descriptor_set_layout));
74
75 uint32_t buffer_count = 0;
76 uint32_t dynamic_offset_count = 0;
77
78 for (uint32_t j = 0; j < pCreateInfo->bindingCount; j++) {
79 const VkDescriptorSetLayoutBinding *binding = &pCreateInfo->pBindings[j];
80 uint32_t b = binding->binding;
81 uint32_t alignment;
82 unsigned binding_buffer_count = 0;
83
84 switch (binding->descriptorType) {
85 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
86 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
87 assert(!(pCreateInfo->flags & VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR));
88 set_layout->binding[b].dynamic_offset_count = 1;
89 set_layout->dynamic_shader_stages |= binding->stageFlags;
90 set_layout->binding[b].size = 0;
91 binding_buffer_count = 1;
92 alignment = 1;
93 break;
94 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
95 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
96 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
97 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
98 set_layout->binding[b].size = 16;
99 binding_buffer_count = 1;
100 alignment = 16;
101 break;
102 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
103 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
104 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
105 /* main descriptor + fmask descriptor */
106 set_layout->binding[b].size = 64;
107 binding_buffer_count = 1;
108 alignment = 32;
109 break;
110 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
111 /* main descriptor + fmask descriptor + sampler */
112 set_layout->binding[b].size = 96;
113 binding_buffer_count = 1;
114 alignment = 32;
115 break;
116 case VK_DESCRIPTOR_TYPE_SAMPLER:
117 set_layout->binding[b].size = 16;
118 alignment = 16;
119 break;
120 default:
121 unreachable("unknown descriptor type\n");
122 break;
123 }
124
125 set_layout->size = align(set_layout->size, alignment);
126 assert(binding->descriptorCount > 0);
127 set_layout->binding[b].type = binding->descriptorType;
128 set_layout->binding[b].array_size = binding->descriptorCount;
129 set_layout->binding[b].offset = set_layout->size;
130 set_layout->binding[b].buffer_offset = buffer_count;
131 set_layout->binding[b].dynamic_offset_offset = dynamic_offset_count;
132
133 if (binding->pImmutableSamplers) {
134 set_layout->binding[b].immutable_samplers_offset = samplers_offset;
135 set_layout->binding[b].immutable_samplers_equal = true;
136 set_layout->has_immutable_samplers = true;
137
138
139 for (uint32_t i = 0; i < binding->descriptorCount; i++)
140 memcpy(samplers + 4 * i, &radv_sampler_from_handle(binding->pImmutableSamplers[i])->state, 16);
141 for (uint32_t i = 1; i < binding->descriptorCount; i++)
142 if (memcmp(samplers + 4 * i, samplers, 16) != 0)
143 set_layout->binding[b].immutable_samplers_equal = false;
144
145 /* Don't reserve space for the samplers if they're not accessed. */
146 if (set_layout->binding[b].immutable_samplers_equal) {
147 if (binding->descriptorType == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
148 set_layout->binding[b].size -= 32;
149 else if (binding->descriptorType == VK_DESCRIPTOR_TYPE_SAMPLER)
150 set_layout->binding[b].size -= 16;
151 }
152 samplers += 4 * binding->descriptorCount;
153 samplers_offset += 4 * sizeof(uint32_t) * binding->descriptorCount;
154 }
155
156 set_layout->size += binding->descriptorCount * set_layout->binding[b].size;
157 buffer_count += binding->descriptorCount * binding_buffer_count;
158 dynamic_offset_count += binding->descriptorCount *
159 set_layout->binding[b].dynamic_offset_count;
160 set_layout->shader_stages |= binding->stageFlags;
161 }
162
163 set_layout->buffer_count = buffer_count;
164 set_layout->dynamic_offset_count = dynamic_offset_count;
165
166 *pSetLayout = radv_descriptor_set_layout_to_handle(set_layout);
167
168 return VK_SUCCESS;
169 }
170
171 void radv_DestroyDescriptorSetLayout(
172 VkDevice _device,
173 VkDescriptorSetLayout _set_layout,
174 const VkAllocationCallbacks* pAllocator)
175 {
176 RADV_FROM_HANDLE(radv_device, device, _device);
177 RADV_FROM_HANDLE(radv_descriptor_set_layout, set_layout, _set_layout);
178
179 if (!set_layout)
180 return;
181
182 vk_free2(&device->alloc, pAllocator, set_layout);
183 }
184
185 /*
186 * Pipeline layouts. These have nothing to do with the pipeline. They are
187 * just muttiple descriptor set layouts pasted together
188 */
189
190 VkResult radv_CreatePipelineLayout(
191 VkDevice _device,
192 const VkPipelineLayoutCreateInfo* pCreateInfo,
193 const VkAllocationCallbacks* pAllocator,
194 VkPipelineLayout* pPipelineLayout)
195 {
196 RADV_FROM_HANDLE(radv_device, device, _device);
197 struct radv_pipeline_layout *layout;
198 struct mesa_sha1 ctx;
199
200 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO);
201
202 layout = vk_alloc2(&device->alloc, pAllocator, sizeof(*layout), 8,
203 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
204 if (layout == NULL)
205 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
206
207 layout->num_sets = pCreateInfo->setLayoutCount;
208
209 unsigned dynamic_offset_count = 0;
210
211
212 _mesa_sha1_init(&ctx);
213 for (uint32_t set = 0; set < pCreateInfo->setLayoutCount; set++) {
214 RADV_FROM_HANDLE(radv_descriptor_set_layout, set_layout,
215 pCreateInfo->pSetLayouts[set]);
216 layout->set[set].layout = set_layout;
217
218 layout->set[set].dynamic_offset_start = dynamic_offset_count;
219 for (uint32_t b = 0; b < set_layout->binding_count; b++) {
220 dynamic_offset_count += set_layout->binding[b].array_size * set_layout->binding[b].dynamic_offset_count;
221 if (set_layout->binding[b].immutable_samplers_offset)
222 _mesa_sha1_update(&ctx, radv_immutable_samplers(set_layout, set_layout->binding + b),
223 set_layout->binding[b].array_size * 4 * sizeof(uint32_t));
224 }
225 _mesa_sha1_update(&ctx, set_layout->binding,
226 sizeof(set_layout->binding[0]) * set_layout->binding_count);
227 }
228
229 layout->dynamic_offset_count = dynamic_offset_count;
230 layout->push_constant_size = 0;
231 layout->push_constant_stages = 0;
232
233 for (unsigned i = 0; i < pCreateInfo->pushConstantRangeCount; ++i) {
234 const VkPushConstantRange *range = pCreateInfo->pPushConstantRanges + i;
235 layout->push_constant_size = MAX2(layout->push_constant_size,
236 range->offset + range->size);
237 layout->push_constant_stages |= range->stageFlags;
238 }
239
240 layout->push_constant_size = align(layout->push_constant_size, 16);
241 _mesa_sha1_update(&ctx, &layout->push_constant_size,
242 sizeof(layout->push_constant_size));
243 _mesa_sha1_final(&ctx, layout->sha1);
244 *pPipelineLayout = radv_pipeline_layout_to_handle(layout);
245
246 return VK_SUCCESS;
247 }
248
249 void radv_DestroyPipelineLayout(
250 VkDevice _device,
251 VkPipelineLayout _pipelineLayout,
252 const VkAllocationCallbacks* pAllocator)
253 {
254 RADV_FROM_HANDLE(radv_device, device, _device);
255 RADV_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, _pipelineLayout);
256
257 if (!pipeline_layout)
258 return;
259 vk_free2(&device->alloc, pAllocator, pipeline_layout);
260 }
261
262 #define EMPTY 1
263
264 static VkResult
265 radv_descriptor_set_create(struct radv_device *device,
266 struct radv_descriptor_pool *pool,
267 const struct radv_descriptor_set_layout *layout,
268 struct radv_descriptor_set **out_set)
269 {
270 struct radv_descriptor_set *set;
271 unsigned range_offset = sizeof(struct radv_descriptor_set) +
272 sizeof(struct radeon_winsys_bo *) * layout->buffer_count;
273 unsigned mem_size = range_offset +
274 sizeof(struct radv_descriptor_range) * layout->dynamic_offset_count;
275
276 if (pool->host_memory_base) {
277 if (pool->host_memory_end - pool->host_memory_ptr < mem_size)
278 return vk_error(VK_ERROR_OUT_OF_POOL_MEMORY_KHR);
279
280 set = (struct radv_descriptor_set*)pool->host_memory_ptr;
281 pool->host_memory_ptr += mem_size;
282 } else {
283 set = vk_alloc2(&device->alloc, NULL, mem_size, 8,
284 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
285
286 if (!set)
287 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
288 }
289
290 memset(set, 0, mem_size);
291
292 if (layout->dynamic_offset_count) {
293 set->dynamic_descriptors = (struct radv_descriptor_range*)((uint8_t*)set + range_offset);
294 }
295
296 set->layout = layout;
297 if (layout->size) {
298 uint32_t layout_size = align_u32(layout->size, 32);
299 set->size = layout->size;
300
301 if (!pool->host_memory_base && pool->entry_count == pool->max_entry_count) {
302 vk_free2(&device->alloc, NULL, set);
303 return vk_error(VK_ERROR_OUT_OF_POOL_MEMORY_KHR);
304 }
305
306 /* try to allocate linearly first, so that we don't spend
307 * time looking for gaps if the app only allocates &
308 * resets via the pool. */
309 if (pool->current_offset + layout_size <= pool->size) {
310 set->bo = pool->bo;
311 set->mapped_ptr = (uint32_t*)(pool->mapped_ptr + pool->current_offset);
312 set->va = radv_buffer_get_va(set->bo) + pool->current_offset;
313 if (!pool->host_memory_base) {
314 pool->entries[pool->entry_count].offset = pool->current_offset;
315 pool->entries[pool->entry_count].size = layout_size;
316 pool->entries[pool->entry_count].set = set;
317 pool->entry_count++;
318 }
319 pool->current_offset += layout_size;
320 } else if (!pool->host_memory_base) {
321 uint64_t offset = 0;
322 int index;
323
324 for (index = 0; index < pool->entry_count; ++index) {
325 if (pool->entries[index].offset - offset >= layout_size)
326 break;
327 offset = pool->entries[index].offset + pool->entries[index].size;
328 }
329
330 if (pool->size - offset < layout_size) {
331 vk_free2(&device->alloc, NULL, set);
332 return vk_error(VK_ERROR_OUT_OF_POOL_MEMORY_KHR);
333 }
334 set->bo = pool->bo;
335 set->mapped_ptr = (uint32_t*)(pool->mapped_ptr + offset);
336 set->va = radv_buffer_get_va(set->bo) + offset;
337 memmove(&pool->entries[index + 1], &pool->entries[index],
338 sizeof(pool->entries[0]) * (pool->entry_count - index));
339 pool->entries[index].offset = offset;
340 pool->entries[index].size = layout_size;
341 pool->entries[index].set = set;
342 pool->entry_count++;
343 } else
344 return vk_error(VK_ERROR_OUT_OF_POOL_MEMORY_KHR);
345 }
346
347 if (layout->has_immutable_samplers) {
348 for (unsigned i = 0; i < layout->binding_count; ++i) {
349 if (!layout->binding[i].immutable_samplers_offset ||
350 layout->binding[i].immutable_samplers_equal)
351 continue;
352
353 unsigned offset = layout->binding[i].offset / 4;
354 if (layout->binding[i].type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
355 offset += 16;
356
357 const uint32_t *samplers = (const uint32_t*)((const char*)layout + layout->binding[i].immutable_samplers_offset);
358 for (unsigned j = 0; j < layout->binding[i].array_size; ++j) {
359 memcpy(set->mapped_ptr + offset, samplers + 4 * j, 16);
360 offset += layout->binding[i].size / 4;
361 }
362
363 }
364 }
365 *out_set = set;
366 return VK_SUCCESS;
367 }
368
369 static void
370 radv_descriptor_set_destroy(struct radv_device *device,
371 struct radv_descriptor_pool *pool,
372 struct radv_descriptor_set *set,
373 bool free_bo)
374 {
375 assert(!pool->host_memory_base);
376
377 if (free_bo && set->size && !pool->host_memory_base) {
378 uint32_t offset = (uint8_t*)set->mapped_ptr - pool->mapped_ptr;
379 for (int i = 0; i < pool->entry_count; ++i) {
380 if (pool->entries[i].offset == offset) {
381 memmove(&pool->entries[i], &pool->entries[i+1],
382 sizeof(pool->entries[i]) * (pool->entry_count - i - 1));
383 --pool->entry_count;
384 break;
385 }
386 }
387 }
388 vk_free2(&device->alloc, NULL, set);
389 }
390
391 VkResult radv_CreateDescriptorPool(
392 VkDevice _device,
393 const VkDescriptorPoolCreateInfo* pCreateInfo,
394 const VkAllocationCallbacks* pAllocator,
395 VkDescriptorPool* pDescriptorPool)
396 {
397 RADV_FROM_HANDLE(radv_device, device, _device);
398 struct radv_descriptor_pool *pool;
399 int size = sizeof(struct radv_descriptor_pool);
400 uint64_t bo_size = 0, bo_count = 0, range_count = 0;
401
402
403 for (unsigned i = 0; i < pCreateInfo->poolSizeCount; ++i) {
404 if (pCreateInfo->pPoolSizes[i].type != VK_DESCRIPTOR_TYPE_SAMPLER)
405 bo_count += pCreateInfo->pPoolSizes[i].descriptorCount;
406
407 switch(pCreateInfo->pPoolSizes[i].type) {
408 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
409 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
410 range_count += pCreateInfo->pPoolSizes[i].descriptorCount;
411 break;
412 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
413 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
414 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
415 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
416 case VK_DESCRIPTOR_TYPE_SAMPLER:
417 /* 32 as we may need to align for images */
418 bo_size += 32 * pCreateInfo->pPoolSizes[i].descriptorCount;
419 break;
420 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
421 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
422 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
423 bo_size += 64 * pCreateInfo->pPoolSizes[i].descriptorCount;
424 break;
425 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
426 bo_size += 96 * pCreateInfo->pPoolSizes[i].descriptorCount;
427 break;
428 default:
429 unreachable("unknown descriptor type\n");
430 break;
431 }
432 }
433
434 if (!(pCreateInfo->flags & VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT)) {
435 uint64_t host_size = pCreateInfo->maxSets * sizeof(struct radv_descriptor_set);
436 host_size += sizeof(struct radeon_winsys_bo*) * bo_count;
437 host_size += sizeof(struct radv_descriptor_range) * range_count;
438 size += host_size;
439 } else {
440 size += sizeof(struct radv_descriptor_pool_entry) * pCreateInfo->maxSets;
441 }
442
443 pool = vk_alloc2(&device->alloc, pAllocator, size, 8,
444 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
445 if (!pool)
446 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
447
448 memset(pool, 0, sizeof(*pool));
449
450 if (!(pCreateInfo->flags & VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT)) {
451 pool->host_memory_base = (uint8_t*)pool + sizeof(struct radv_descriptor_pool);
452 pool->host_memory_ptr = pool->host_memory_base;
453 pool->host_memory_end = (uint8_t*)pool + size;
454 }
455
456 if (bo_size) {
457 pool->bo = device->ws->buffer_create(device->ws, bo_size, 32,
458 RADEON_DOMAIN_VRAM,
459 RADEON_FLAG_NO_INTERPROCESS_SHARING |
460 RADEON_FLAG_READ_ONLY);
461 pool->mapped_ptr = (uint8_t*)device->ws->buffer_map(pool->bo);
462 }
463 pool->size = bo_size;
464 pool->max_entry_count = pCreateInfo->maxSets;
465
466 *pDescriptorPool = radv_descriptor_pool_to_handle(pool);
467 return VK_SUCCESS;
468 }
469
470 void radv_DestroyDescriptorPool(
471 VkDevice _device,
472 VkDescriptorPool _pool,
473 const VkAllocationCallbacks* pAllocator)
474 {
475 RADV_FROM_HANDLE(radv_device, device, _device);
476 RADV_FROM_HANDLE(radv_descriptor_pool, pool, _pool);
477
478 if (!pool)
479 return;
480
481 if (!pool->host_memory_base) {
482 for(int i = 0; i < pool->entry_count; ++i) {
483 radv_descriptor_set_destroy(device, pool, pool->entries[i].set, false);
484 }
485 }
486
487 if (pool->bo)
488 device->ws->buffer_destroy(pool->bo);
489 vk_free2(&device->alloc, pAllocator, pool);
490 }
491
492 VkResult radv_ResetDescriptorPool(
493 VkDevice _device,
494 VkDescriptorPool descriptorPool,
495 VkDescriptorPoolResetFlags flags)
496 {
497 RADV_FROM_HANDLE(radv_device, device, _device);
498 RADV_FROM_HANDLE(radv_descriptor_pool, pool, descriptorPool);
499
500 if (!pool->host_memory_base) {
501 for(int i = 0; i < pool->entry_count; ++i) {
502 radv_descriptor_set_destroy(device, pool, pool->entries[i].set, false);
503 }
504 pool->entry_count = 0;
505 }
506
507 pool->current_offset = 0;
508 pool->host_memory_ptr = pool->host_memory_base;
509
510 return VK_SUCCESS;
511 }
512
513 VkResult radv_AllocateDescriptorSets(
514 VkDevice _device,
515 const VkDescriptorSetAllocateInfo* pAllocateInfo,
516 VkDescriptorSet* pDescriptorSets)
517 {
518 RADV_FROM_HANDLE(radv_device, device, _device);
519 RADV_FROM_HANDLE(radv_descriptor_pool, pool, pAllocateInfo->descriptorPool);
520
521 VkResult result = VK_SUCCESS;
522 uint32_t i;
523 struct radv_descriptor_set *set;
524
525 /* allocate a set of buffers for each shader to contain descriptors */
526 for (i = 0; i < pAllocateInfo->descriptorSetCount; i++) {
527 RADV_FROM_HANDLE(radv_descriptor_set_layout, layout,
528 pAllocateInfo->pSetLayouts[i]);
529
530 assert(!(layout->flags & VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR));
531
532 result = radv_descriptor_set_create(device, pool, layout, &set);
533 if (result != VK_SUCCESS)
534 break;
535
536 pDescriptorSets[i] = radv_descriptor_set_to_handle(set);
537 }
538
539 if (result != VK_SUCCESS)
540 radv_FreeDescriptorSets(_device, pAllocateInfo->descriptorPool,
541 i, pDescriptorSets);
542 return result;
543 }
544
545 VkResult radv_FreeDescriptorSets(
546 VkDevice _device,
547 VkDescriptorPool descriptorPool,
548 uint32_t count,
549 const VkDescriptorSet* pDescriptorSets)
550 {
551 RADV_FROM_HANDLE(radv_device, device, _device);
552 RADV_FROM_HANDLE(radv_descriptor_pool, pool, descriptorPool);
553
554 for (uint32_t i = 0; i < count; i++) {
555 RADV_FROM_HANDLE(radv_descriptor_set, set, pDescriptorSets[i]);
556
557 if (set && !pool->host_memory_base)
558 radv_descriptor_set_destroy(device, pool, set, true);
559 }
560 return VK_SUCCESS;
561 }
562
563 static void write_texel_buffer_descriptor(struct radv_device *device,
564 struct radv_cmd_buffer *cmd_buffer,
565 unsigned *dst,
566 struct radeon_winsys_bo **buffer_list,
567 const VkBufferView _buffer_view)
568 {
569 RADV_FROM_HANDLE(radv_buffer_view, buffer_view, _buffer_view);
570
571 memcpy(dst, buffer_view->state, 4 * 4);
572
573 if (cmd_buffer)
574 radv_cs_add_buffer(device->ws, cmd_buffer->cs, buffer_view->bo, 7);
575 else
576 *buffer_list = buffer_view->bo;
577 }
578
579 static void write_buffer_descriptor(struct radv_device *device,
580 struct radv_cmd_buffer *cmd_buffer,
581 unsigned *dst,
582 struct radeon_winsys_bo **buffer_list,
583 const VkDescriptorBufferInfo *buffer_info)
584 {
585 RADV_FROM_HANDLE(radv_buffer, buffer, buffer_info->buffer);
586 uint64_t va = radv_buffer_get_va(buffer->bo);
587 uint32_t range = buffer_info->range;
588
589 if (buffer_info->range == VK_WHOLE_SIZE)
590 range = buffer->size - buffer_info->offset;
591
592 va += buffer_info->offset + buffer->offset;
593 dst[0] = va;
594 dst[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
595 dst[2] = range;
596 dst[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) |
597 S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
598 S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
599 S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
600 S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
601 S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
602
603 if (cmd_buffer)
604 radv_cs_add_buffer(device->ws, cmd_buffer->cs, buffer->bo, 7);
605 else
606 *buffer_list = buffer->bo;
607 }
608
609 static void write_dynamic_buffer_descriptor(struct radv_device *device,
610 struct radv_descriptor_range *range,
611 struct radeon_winsys_bo **buffer_list,
612 const VkDescriptorBufferInfo *buffer_info)
613 {
614 RADV_FROM_HANDLE(radv_buffer, buffer, buffer_info->buffer);
615 uint64_t va = radv_buffer_get_va(buffer->bo);
616 unsigned size = buffer_info->range;
617
618 if (buffer_info->range == VK_WHOLE_SIZE)
619 size = buffer->size - buffer_info->offset;
620
621 va += buffer_info->offset + buffer->offset;
622 range->va = va;
623 range->size = size;
624
625 *buffer_list = buffer->bo;
626 }
627
628 static void
629 write_image_descriptor(struct radv_device *device,
630 struct radv_cmd_buffer *cmd_buffer,
631 unsigned *dst,
632 struct radeon_winsys_bo **buffer_list,
633 VkDescriptorType descriptor_type,
634 const VkDescriptorImageInfo *image_info)
635 {
636 RADV_FROM_HANDLE(radv_image_view, iview, image_info->imageView);
637 uint32_t *descriptor;
638
639 if (descriptor_type == VK_DESCRIPTOR_TYPE_STORAGE_IMAGE) {
640 descriptor = iview->storage_descriptor;
641 } else {
642 descriptor = iview->descriptor;
643 }
644
645 memcpy(dst, descriptor, 16 * 4);
646
647 if (cmd_buffer)
648 radv_cs_add_buffer(device->ws, cmd_buffer->cs, iview->bo, 7);
649 else
650 *buffer_list = iview->bo;
651 }
652
653 static void
654 write_combined_image_sampler_descriptor(struct radv_device *device,
655 struct radv_cmd_buffer *cmd_buffer,
656 unsigned *dst,
657 struct radeon_winsys_bo **buffer_list,
658 VkDescriptorType descriptor_type,
659 const VkDescriptorImageInfo *image_info,
660 bool has_sampler)
661 {
662 RADV_FROM_HANDLE(radv_sampler, sampler, image_info->sampler);
663
664 write_image_descriptor(device, cmd_buffer, dst, buffer_list, descriptor_type, image_info);
665 /* copy over sampler state */
666 if (has_sampler)
667 memcpy(dst + 16, sampler->state, 16);
668 }
669
670 static void
671 write_sampler_descriptor(struct radv_device *device,
672 unsigned *dst,
673 const VkDescriptorImageInfo *image_info)
674 {
675 RADV_FROM_HANDLE(radv_sampler, sampler, image_info->sampler);
676
677 memcpy(dst, sampler->state, 16);
678 }
679
680 void radv_update_descriptor_sets(
681 struct radv_device* device,
682 struct radv_cmd_buffer* cmd_buffer,
683 VkDescriptorSet dstSetOverride,
684 uint32_t descriptorWriteCount,
685 const VkWriteDescriptorSet* pDescriptorWrites,
686 uint32_t descriptorCopyCount,
687 const VkCopyDescriptorSet* pDescriptorCopies)
688 {
689 uint32_t i, j;
690 for (i = 0; i < descriptorWriteCount; i++) {
691 const VkWriteDescriptorSet *writeset = &pDescriptorWrites[i];
692 RADV_FROM_HANDLE(radv_descriptor_set, set,
693 dstSetOverride ? dstSetOverride : writeset->dstSet);
694 const struct radv_descriptor_set_binding_layout *binding_layout =
695 set->layout->binding + writeset->dstBinding;
696 uint32_t *ptr = set->mapped_ptr;
697 struct radeon_winsys_bo **buffer_list = set->descriptors;
698 /* Immutable samplers are not copied into push descriptors when they are
699 * allocated, so if we are writing push descriptors we have to copy the
700 * immutable samplers into them now.
701 */
702 const bool copy_immutable_samplers = cmd_buffer &&
703 binding_layout->immutable_samplers_offset && !binding_layout->immutable_samplers_equal;
704 const uint32_t *samplers = radv_immutable_samplers(set->layout, binding_layout);
705
706 ptr += binding_layout->offset / 4;
707 ptr += binding_layout->size * writeset->dstArrayElement / 4;
708 buffer_list += binding_layout->buffer_offset;
709 buffer_list += writeset->dstArrayElement;
710 for (j = 0; j < writeset->descriptorCount; ++j) {
711 switch(writeset->descriptorType) {
712 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
713 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: {
714 unsigned idx = writeset->dstArrayElement + j;
715 idx += binding_layout->dynamic_offset_offset;
716 assert(!(set->layout->flags & VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR));
717 write_dynamic_buffer_descriptor(device, set->dynamic_descriptors + idx,
718 buffer_list, writeset->pBufferInfo + j);
719 break;
720 }
721 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
722 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
723 write_buffer_descriptor(device, cmd_buffer, ptr, buffer_list,
724 writeset->pBufferInfo + j);
725 break;
726 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
727 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
728 write_texel_buffer_descriptor(device, cmd_buffer, ptr, buffer_list,
729 writeset->pTexelBufferView[j]);
730 break;
731 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
732 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
733 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
734 write_image_descriptor(device, cmd_buffer, ptr, buffer_list,
735 writeset->descriptorType,
736 writeset->pImageInfo + j);
737 break;
738 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
739 write_combined_image_sampler_descriptor(device, cmd_buffer, ptr, buffer_list,
740 writeset->descriptorType,
741 writeset->pImageInfo + j,
742 !binding_layout->immutable_samplers_offset);
743 if (copy_immutable_samplers) {
744 const unsigned idx = writeset->dstArrayElement + j;
745 memcpy(ptr + 16, samplers + 4 * idx, 16);
746 }
747 break;
748 case VK_DESCRIPTOR_TYPE_SAMPLER:
749 if (!binding_layout->immutable_samplers_offset) {
750 write_sampler_descriptor(device, ptr,
751 writeset->pImageInfo + j);
752 } else if (copy_immutable_samplers) {
753 unsigned idx = writeset->dstArrayElement + j;
754 memcpy(ptr, samplers + 4 * idx, 16);
755 }
756 break;
757 default:
758 unreachable("unimplemented descriptor type");
759 break;
760 }
761 ptr += binding_layout->size / 4;
762 ++buffer_list;
763 }
764
765 }
766
767 for (i = 0; i < descriptorCopyCount; i++) {
768 const VkCopyDescriptorSet *copyset = &pDescriptorCopies[i];
769 RADV_FROM_HANDLE(radv_descriptor_set, src_set,
770 copyset->srcSet);
771 RADV_FROM_HANDLE(radv_descriptor_set, dst_set,
772 copyset->dstSet);
773 const struct radv_descriptor_set_binding_layout *src_binding_layout =
774 src_set->layout->binding + copyset->srcBinding;
775 const struct radv_descriptor_set_binding_layout *dst_binding_layout =
776 dst_set->layout->binding + copyset->dstBinding;
777 uint32_t *src_ptr = src_set->mapped_ptr;
778 uint32_t *dst_ptr = dst_set->mapped_ptr;
779 struct radeon_winsys_bo **src_buffer_list = src_set->descriptors;
780 struct radeon_winsys_bo **dst_buffer_list = dst_set->descriptors;
781
782 src_ptr += src_binding_layout->offset / 4;
783 dst_ptr += dst_binding_layout->offset / 4;
784
785 src_ptr += src_binding_layout->size * copyset->srcArrayElement / 4;
786 dst_ptr += dst_binding_layout->size * copyset->dstArrayElement / 4;
787
788 src_buffer_list += src_binding_layout->buffer_offset;
789 src_buffer_list += copyset->srcArrayElement;
790
791 dst_buffer_list += dst_binding_layout->buffer_offset;
792 dst_buffer_list += copyset->dstArrayElement;
793
794 for (j = 0; j < copyset->descriptorCount; ++j) {
795 switch (src_binding_layout->type) {
796 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
797 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: {
798 unsigned src_idx = copyset->srcArrayElement + j;
799 unsigned dst_idx = copyset->dstArrayElement + j;
800 struct radv_descriptor_range *src_range, *dst_range;
801 src_idx += src_binding_layout->dynamic_offset_offset;
802 dst_idx += dst_binding_layout->dynamic_offset_offset;
803
804 src_range = src_set->dynamic_descriptors + src_idx;
805 dst_range = dst_set->dynamic_descriptors + dst_idx;
806 *dst_range = *src_range;
807 break;
808 }
809 default:
810 memcpy(dst_ptr, src_ptr, src_binding_layout->size);
811 }
812 src_ptr += src_binding_layout->size / 4;
813 dst_ptr += dst_binding_layout->size / 4;
814 dst_buffer_list[j] = src_buffer_list[j];
815 ++src_buffer_list;
816 ++dst_buffer_list;
817 }
818 }
819 }
820
821 void radv_UpdateDescriptorSets(
822 VkDevice _device,
823 uint32_t descriptorWriteCount,
824 const VkWriteDescriptorSet* pDescriptorWrites,
825 uint32_t descriptorCopyCount,
826 const VkCopyDescriptorSet* pDescriptorCopies)
827 {
828 RADV_FROM_HANDLE(radv_device, device, _device);
829
830 radv_update_descriptor_sets(device, NULL, VK_NULL_HANDLE, descriptorWriteCount, pDescriptorWrites,
831 descriptorCopyCount, pDescriptorCopies);
832 }
833
834 VkResult radv_CreateDescriptorUpdateTemplateKHR(VkDevice _device,
835 const VkDescriptorUpdateTemplateCreateInfoKHR *pCreateInfo,
836 const VkAllocationCallbacks *pAllocator,
837 VkDescriptorUpdateTemplateKHR *pDescriptorUpdateTemplate)
838 {
839 RADV_FROM_HANDLE(radv_device, device, _device);
840 RADV_FROM_HANDLE(radv_descriptor_set_layout, set_layout, pCreateInfo->descriptorSetLayout);
841 const uint32_t entry_count = pCreateInfo->descriptorUpdateEntryCount;
842 const size_t size = sizeof(struct radv_descriptor_update_template) +
843 sizeof(struct radv_descriptor_update_template_entry) * entry_count;
844 struct radv_descriptor_update_template *templ;
845 uint32_t i;
846
847 templ = vk_alloc2(&device->alloc, pAllocator, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
848 if (!templ)
849 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
850
851 templ->entry_count = entry_count;
852
853 for (i = 0; i < entry_count; i++) {
854 const VkDescriptorUpdateTemplateEntryKHR *entry = &pCreateInfo->pDescriptorUpdateEntries[i];
855 const struct radv_descriptor_set_binding_layout *binding_layout =
856 set_layout->binding + entry->dstBinding;
857 const uint32_t buffer_offset = binding_layout->buffer_offset + entry->dstArrayElement;
858 const uint32_t *immutable_samplers = NULL;
859 uint32_t dst_offset;
860 uint32_t dst_stride;
861
862 /* dst_offset is an offset into dynamic_descriptors when the descriptor
863 is dynamic, and an offset into mapped_ptr otherwise */
864 switch (entry->descriptorType) {
865 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
866 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
867 assert(pCreateInfo->templateType == VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR);
868 dst_offset = binding_layout->dynamic_offset_offset + entry->dstArrayElement;
869 dst_stride = 0; /* Not used */
870 break;
871 default:
872 switch (entry->descriptorType) {
873 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
874 case VK_DESCRIPTOR_TYPE_SAMPLER:
875 /* Immutable samplers are copied into push descriptors when they are pushed */
876 if (pCreateInfo->templateType == VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_PUSH_DESCRIPTORS_KHR &&
877 binding_layout->immutable_samplers_offset && !binding_layout->immutable_samplers_equal) {
878 immutable_samplers = radv_immutable_samplers(set_layout, binding_layout) + entry->dstArrayElement * 4;
879 }
880 break;
881 default:
882 break;
883 }
884 dst_offset = binding_layout->offset / 4 + binding_layout->size * entry->dstArrayElement / 4;
885 dst_stride = binding_layout->size / 4;
886 break;
887 }
888
889 templ->entry[i] = (struct radv_descriptor_update_template_entry) {
890 .descriptor_type = entry->descriptorType,
891 .descriptor_count = entry->descriptorCount,
892 .src_offset = entry->offset,
893 .src_stride = entry->stride,
894 .dst_offset = dst_offset,
895 .dst_stride = dst_stride,
896 .buffer_offset = buffer_offset,
897 .has_sampler = !binding_layout->immutable_samplers_offset,
898 .immutable_samplers = immutable_samplers
899 };
900 }
901
902 *pDescriptorUpdateTemplate = radv_descriptor_update_template_to_handle(templ);
903 return VK_SUCCESS;
904 }
905
906 void radv_DestroyDescriptorUpdateTemplateKHR(VkDevice _device,
907 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
908 const VkAllocationCallbacks *pAllocator)
909 {
910 RADV_FROM_HANDLE(radv_device, device, _device);
911 RADV_FROM_HANDLE(radv_descriptor_update_template, templ, descriptorUpdateTemplate);
912
913 if (!templ)
914 return;
915
916 vk_free2(&device->alloc, pAllocator, templ);
917 }
918
919 void radv_update_descriptor_set_with_template(struct radv_device *device,
920 struct radv_cmd_buffer *cmd_buffer,
921 struct radv_descriptor_set *set,
922 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
923 const void *pData)
924 {
925 RADV_FROM_HANDLE(radv_descriptor_update_template, templ, descriptorUpdateTemplate);
926 uint32_t i;
927
928 for (i = 0; i < templ->entry_count; ++i) {
929 struct radeon_winsys_bo **buffer_list = set->descriptors + templ->entry[i].buffer_offset;
930 uint32_t *pDst = set->mapped_ptr + templ->entry[i].dst_offset;
931 const uint8_t *pSrc = ((const uint8_t *) pData) + templ->entry[i].src_offset;
932 uint32_t j;
933
934 for (j = 0; j < templ->entry[i].descriptor_count; ++j) {
935 switch (templ->entry[i].descriptor_type) {
936 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
937 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: {
938 const unsigned idx = templ->entry[i].dst_offset + j;
939 assert(!(set->layout->flags & VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR));
940 write_dynamic_buffer_descriptor(device, set->dynamic_descriptors + idx,
941 buffer_list, (struct VkDescriptorBufferInfo *) pSrc);
942 break;
943 }
944 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
945 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
946 write_buffer_descriptor(device, cmd_buffer, pDst, buffer_list,
947 (struct VkDescriptorBufferInfo *) pSrc);
948 break;
949 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
950 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
951 write_texel_buffer_descriptor(device, cmd_buffer, pDst, buffer_list,
952 *(VkBufferView *) pSrc);
953 break;
954 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
955 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
956 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
957 write_image_descriptor(device, cmd_buffer, pDst, buffer_list,
958 templ->entry[i].descriptor_type,
959 (struct VkDescriptorImageInfo *) pSrc);
960 break;
961 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
962 write_combined_image_sampler_descriptor(device, cmd_buffer, pDst, buffer_list,
963 templ->entry[i].descriptor_type,
964 (struct VkDescriptorImageInfo *) pSrc,
965 templ->entry[i].has_sampler);
966 if (templ->entry[i].immutable_samplers)
967 memcpy(pDst + 16, templ->entry[i].immutable_samplers + 4 * j, 16);
968 break;
969 case VK_DESCRIPTOR_TYPE_SAMPLER:
970 if (templ->entry[i].has_sampler)
971 write_sampler_descriptor(device, pDst,
972 (struct VkDescriptorImageInfo *) pSrc);
973 else if (templ->entry[i].immutable_samplers)
974 memcpy(pDst, templ->entry[i].immutable_samplers + 4 * j, 16);
975 break;
976 default:
977 unreachable("unimplemented descriptor type");
978 break;
979 }
980 pSrc += templ->entry[i].src_stride;
981 pDst += templ->entry[i].dst_stride;
982 ++buffer_list;
983 }
984 }
985 }
986
987 void radv_UpdateDescriptorSetWithTemplateKHR(VkDevice _device,
988 VkDescriptorSet descriptorSet,
989 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
990 const void *pData)
991 {
992 RADV_FROM_HANDLE(radv_device, device, _device);
993 RADV_FROM_HANDLE(radv_descriptor_set, set, descriptorSet);
994
995 radv_update_descriptor_set_with_template(device, NULL, set, descriptorUpdateTemplate, pData);
996 }