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radv: mark the fence as submitted and signalled in vkAcquireNextImageKHR
[mesa.git] / src / amd / vulkan / radv_device.c
1 /*
2 * Copyright © 2016 Red Hat.
3 * Copyright © 2016 Bas Nieuwenhuizen
4 *
5 * based in part on anv driver which is:
6 * Copyright © 2015 Intel Corporation
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 * IN THE SOFTWARE.
26 */
27
28 #include <stdbool.h>
29 #include <string.h>
30 #include <unistd.h>
31 #include <fcntl.h>
32 #include "radv_private.h"
33 #include "util/strtod.h"
34
35 #include <xf86drm.h>
36 #include <amdgpu.h>
37 #include <amdgpu_drm.h>
38 #include "amdgpu_id.h"
39 #include "winsys/amdgpu/radv_amdgpu_winsys_public.h"
40 #include "ac_llvm_util.h"
41 #include "vk_format.h"
42 #include "sid.h"
43 #include "radv_timestamp.h"
44 #include "util/debug.h"
45 struct radv_dispatch_table dtable;
46
47 static VkResult
48 radv_physical_device_init(struct radv_physical_device *device,
49 struct radv_instance *instance,
50 const char *path)
51 {
52 VkResult result;
53 drmVersionPtr version;
54 int fd;
55
56 fd = open(path, O_RDWR | O_CLOEXEC);
57 if (fd < 0)
58 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
59 "failed to open %s: %m", path);
60
61 version = drmGetVersion(fd);
62 if (!version) {
63 close(fd);
64 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
65 "failed to get version %s: %m", path);
66 }
67
68 if (strcmp(version->name, "amdgpu")) {
69 drmFreeVersion(version);
70 close(fd);
71 return VK_ERROR_INCOMPATIBLE_DRIVER;
72 }
73 drmFreeVersion(version);
74
75 device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
76 device->instance = instance;
77 assert(strlen(path) < ARRAY_SIZE(device->path));
78 strncpy(device->path, path, ARRAY_SIZE(device->path));
79
80 device->ws = radv_amdgpu_winsys_create(fd);
81 if (!device->ws) {
82 result = VK_ERROR_INCOMPATIBLE_DRIVER;
83 goto fail;
84 }
85 device->ws->query_info(device->ws, &device->rad_info);
86 result = radv_init_wsi(device);
87 if (result != VK_SUCCESS) {
88 device->ws->destroy(device->ws);
89 goto fail;
90 }
91
92 fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n");
93 device->name = device->rad_info.name;
94 return VK_SUCCESS;
95
96 fail:
97 close(fd);
98 return result;
99 }
100
101 static void
102 radv_physical_device_finish(struct radv_physical_device *device)
103 {
104 radv_finish_wsi(device);
105 device->ws->destroy(device->ws);
106 }
107
108 static const VkExtensionProperties global_extensions[] = {
109 {
110 .extensionName = VK_KHR_SURFACE_EXTENSION_NAME,
111 .specVersion = 25,
112 },
113 #ifdef VK_USE_PLATFORM_XCB_KHR
114 {
115 .extensionName = VK_KHR_XCB_SURFACE_EXTENSION_NAME,
116 .specVersion = 5,
117 },
118 #endif
119 #ifdef VK_USE_PLATFORM_WAYLAND_KHR
120 {
121 .extensionName = VK_KHR_WAYLAND_SURFACE_EXTENSION_NAME,
122 .specVersion = 4,
123 },
124 #endif
125 };
126
127 static const VkExtensionProperties device_extensions[] = {
128 {
129 .extensionName = VK_KHR_SWAPCHAIN_EXTENSION_NAME,
130 .specVersion = 67,
131 },
132 };
133
134 static void *
135 default_alloc_func(void *pUserData, size_t size, size_t align,
136 VkSystemAllocationScope allocationScope)
137 {
138 return malloc(size);
139 }
140
141 static void *
142 default_realloc_func(void *pUserData, void *pOriginal, size_t size,
143 size_t align, VkSystemAllocationScope allocationScope)
144 {
145 return realloc(pOriginal, size);
146 }
147
148 static void
149 default_free_func(void *pUserData, void *pMemory)
150 {
151 free(pMemory);
152 }
153
154 static const VkAllocationCallbacks default_alloc = {
155 .pUserData = NULL,
156 .pfnAllocation = default_alloc_func,
157 .pfnReallocation = default_realloc_func,
158 .pfnFree = default_free_func,
159 };
160
161 VkResult radv_CreateInstance(
162 const VkInstanceCreateInfo* pCreateInfo,
163 const VkAllocationCallbacks* pAllocator,
164 VkInstance* pInstance)
165 {
166 struct radv_instance *instance;
167
168 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO);
169
170 uint32_t client_version;
171 if (pCreateInfo->pApplicationInfo &&
172 pCreateInfo->pApplicationInfo->apiVersion != 0) {
173 client_version = pCreateInfo->pApplicationInfo->apiVersion;
174 } else {
175 client_version = VK_MAKE_VERSION(1, 0, 0);
176 }
177
178 if (VK_MAKE_VERSION(1, 0, 0) > client_version ||
179 client_version > VK_MAKE_VERSION(1, 0, 0xfff)) {
180 return vk_errorf(VK_ERROR_INCOMPATIBLE_DRIVER,
181 "Client requested version %d.%d.%d",
182 VK_VERSION_MAJOR(client_version),
183 VK_VERSION_MINOR(client_version),
184 VK_VERSION_PATCH(client_version));
185 }
186
187 for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) {
188 bool found = false;
189 for (uint32_t j = 0; j < ARRAY_SIZE(global_extensions); j++) {
190 if (strcmp(pCreateInfo->ppEnabledExtensionNames[i],
191 global_extensions[j].extensionName) == 0) {
192 found = true;
193 break;
194 }
195 }
196 if (!found)
197 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT);
198 }
199
200 instance = vk_alloc2(&default_alloc, pAllocator, sizeof(*instance), 8,
201 VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE);
202 if (!instance)
203 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
204
205 instance->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
206
207 if (pAllocator)
208 instance->alloc = *pAllocator;
209 else
210 instance->alloc = default_alloc;
211
212 instance->apiVersion = client_version;
213 instance->physicalDeviceCount = -1;
214
215 _mesa_locale_init();
216
217 VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false));
218
219 *pInstance = radv_instance_to_handle(instance);
220
221 return VK_SUCCESS;
222 }
223
224 void radv_DestroyInstance(
225 VkInstance _instance,
226 const VkAllocationCallbacks* pAllocator)
227 {
228 RADV_FROM_HANDLE(radv_instance, instance, _instance);
229
230 if (instance->physicalDeviceCount > 0) {
231 /* We support at most one physical device. */
232 assert(instance->physicalDeviceCount == 1);
233 radv_physical_device_finish(&instance->physicalDevice);
234 }
235
236 VG(VALGRIND_DESTROY_MEMPOOL(instance));
237
238 _mesa_locale_fini();
239
240 vk_free(&instance->alloc, instance);
241 }
242
243 VkResult radv_EnumeratePhysicalDevices(
244 VkInstance _instance,
245 uint32_t* pPhysicalDeviceCount,
246 VkPhysicalDevice* pPhysicalDevices)
247 {
248 RADV_FROM_HANDLE(radv_instance, instance, _instance);
249 VkResult result;
250
251 if (instance->physicalDeviceCount < 0) {
252 char path[20];
253 for (unsigned i = 0; i < 8; i++) {
254 snprintf(path, sizeof(path), "/dev/dri/renderD%d", 128 + i);
255 result = radv_physical_device_init(&instance->physicalDevice,
256 instance, path);
257 if (result != VK_ERROR_INCOMPATIBLE_DRIVER)
258 break;
259 }
260
261 if (result == VK_ERROR_INCOMPATIBLE_DRIVER) {
262 instance->physicalDeviceCount = 0;
263 } else if (result == VK_SUCCESS) {
264 instance->physicalDeviceCount = 1;
265 } else {
266 return result;
267 }
268 }
269
270 /* pPhysicalDeviceCount is an out parameter if pPhysicalDevices is NULL;
271 * otherwise it's an inout parameter.
272 *
273 * The Vulkan spec (git aaed022) says:
274 *
275 * pPhysicalDeviceCount is a pointer to an unsigned integer variable
276 * that is initialized with the number of devices the application is
277 * prepared to receive handles to. pname:pPhysicalDevices is pointer to
278 * an array of at least this many VkPhysicalDevice handles [...].
279 *
280 * Upon success, if pPhysicalDevices is NULL, vkEnumeratePhysicalDevices
281 * overwrites the contents of the variable pointed to by
282 * pPhysicalDeviceCount with the number of physical devices in in the
283 * instance; otherwise, vkEnumeratePhysicalDevices overwrites
284 * pPhysicalDeviceCount with the number of physical handles written to
285 * pPhysicalDevices.
286 */
287 if (!pPhysicalDevices) {
288 *pPhysicalDeviceCount = instance->physicalDeviceCount;
289 } else if (*pPhysicalDeviceCount >= 1) {
290 pPhysicalDevices[0] = radv_physical_device_to_handle(&instance->physicalDevice);
291 *pPhysicalDeviceCount = 1;
292 } else if (*pPhysicalDeviceCount < instance->physicalDeviceCount) {
293 return VK_INCOMPLETE;
294 } else {
295 *pPhysicalDeviceCount = 0;
296 }
297
298 return VK_SUCCESS;
299 }
300
301 void radv_GetPhysicalDeviceFeatures(
302 VkPhysicalDevice physicalDevice,
303 VkPhysicalDeviceFeatures* pFeatures)
304 {
305 // RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
306
307 memset(pFeatures, 0, sizeof(*pFeatures));
308
309 *pFeatures = (VkPhysicalDeviceFeatures) {
310 .robustBufferAccess = true,
311 .fullDrawIndexUint32 = true,
312 .imageCubeArray = true,
313 .independentBlend = true,
314 .geometryShader = false,
315 .tessellationShader = false,
316 .sampleRateShading = false,
317 .dualSrcBlend = true,
318 .logicOp = true,
319 .multiDrawIndirect = true,
320 .drawIndirectFirstInstance = true,
321 .depthClamp = true,
322 .depthBiasClamp = true,
323 .fillModeNonSolid = true,
324 .depthBounds = true,
325 .wideLines = true,
326 .largePoints = true,
327 .alphaToOne = true,
328 .multiViewport = false,
329 .samplerAnisotropy = false, /* FINISHME */
330 .textureCompressionETC2 = false,
331 .textureCompressionASTC_LDR = false,
332 .textureCompressionBC = true,
333 .occlusionQueryPrecise = true,
334 .pipelineStatisticsQuery = false,
335 .vertexPipelineStoresAndAtomics = true,
336 .fragmentStoresAndAtomics = true,
337 .shaderTessellationAndGeometryPointSize = true,
338 .shaderImageGatherExtended = false,
339 .shaderStorageImageExtendedFormats = false,
340 .shaderStorageImageMultisample = false,
341 .shaderUniformBufferArrayDynamicIndexing = true,
342 .shaderSampledImageArrayDynamicIndexing = true,
343 .shaderStorageBufferArrayDynamicIndexing = true,
344 .shaderStorageImageArrayDynamicIndexing = true,
345 .shaderStorageImageReadWithoutFormat = false,
346 .shaderStorageImageWriteWithoutFormat = true,
347 .shaderClipDistance = true,
348 .shaderCullDistance = true,
349 .shaderFloat64 = false,
350 .shaderInt64 = false,
351 .shaderInt16 = false,
352 .alphaToOne = true,
353 .variableMultisampleRate = false,
354 .inheritedQueries = false,
355 };
356 }
357
358 void
359 radv_device_get_cache_uuid(void *uuid)
360 {
361 memset(uuid, 0, VK_UUID_SIZE);
362 snprintf(uuid, VK_UUID_SIZE, "radv-%s", RADV_TIMESTAMP);
363 }
364
365 void radv_GetPhysicalDeviceProperties(
366 VkPhysicalDevice physicalDevice,
367 VkPhysicalDeviceProperties* pProperties)
368 {
369 RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
370 VkSampleCountFlags sample_counts = 0xf;
371 VkPhysicalDeviceLimits limits = {
372 .maxImageDimension1D = (1 << 14),
373 .maxImageDimension2D = (1 << 14),
374 .maxImageDimension3D = (1 << 11),
375 .maxImageDimensionCube = (1 << 14),
376 .maxImageArrayLayers = (1 << 11),
377 .maxTexelBufferElements = 128 * 1024 * 1024,
378 .maxUniformBufferRange = UINT32_MAX,
379 .maxStorageBufferRange = UINT32_MAX,
380 .maxPushConstantsSize = MAX_PUSH_CONSTANTS_SIZE,
381 .maxMemoryAllocationCount = UINT32_MAX,
382 .maxSamplerAllocationCount = 64 * 1024,
383 .bufferImageGranularity = 64, /* A cache line */
384 .sparseAddressSpaceSize = 0,
385 .maxBoundDescriptorSets = MAX_SETS,
386 .maxPerStageDescriptorSamplers = 64,
387 .maxPerStageDescriptorUniformBuffers = 64,
388 .maxPerStageDescriptorStorageBuffers = 64,
389 .maxPerStageDescriptorSampledImages = 64,
390 .maxPerStageDescriptorStorageImages = 64,
391 .maxPerStageDescriptorInputAttachments = 64,
392 .maxPerStageResources = 128,
393 .maxDescriptorSetSamplers = 256,
394 .maxDescriptorSetUniformBuffers = 256,
395 .maxDescriptorSetUniformBuffersDynamic = 256,
396 .maxDescriptorSetStorageBuffers = 256,
397 .maxDescriptorSetStorageBuffersDynamic = 256,
398 .maxDescriptorSetSampledImages = 256,
399 .maxDescriptorSetStorageImages = 256,
400 .maxDescriptorSetInputAttachments = 256,
401 .maxVertexInputAttributes = 32,
402 .maxVertexInputBindings = 32,
403 .maxVertexInputAttributeOffset = 2047,
404 .maxVertexInputBindingStride = 2048,
405 .maxVertexOutputComponents = 128,
406 .maxTessellationGenerationLevel = 0,
407 .maxTessellationPatchSize = 0,
408 .maxTessellationControlPerVertexInputComponents = 0,
409 .maxTessellationControlPerVertexOutputComponents = 0,
410 .maxTessellationControlPerPatchOutputComponents = 0,
411 .maxTessellationControlTotalOutputComponents = 0,
412 .maxTessellationEvaluationInputComponents = 0,
413 .maxTessellationEvaluationOutputComponents = 0,
414 .maxGeometryShaderInvocations = 32,
415 .maxGeometryInputComponents = 64,
416 .maxGeometryOutputComponents = 128,
417 .maxGeometryOutputVertices = 256,
418 .maxGeometryTotalOutputComponents = 1024,
419 .maxFragmentInputComponents = 128,
420 .maxFragmentOutputAttachments = 8,
421 .maxFragmentDualSrcAttachments = 2,
422 .maxFragmentCombinedOutputResources = 8,
423 .maxComputeSharedMemorySize = 32768,
424 .maxComputeWorkGroupCount = { 65535, 65535, 65535 },
425 .maxComputeWorkGroupInvocations = 16 * 1024,
426 .maxComputeWorkGroupSize = {
427 16 * 1024/*devinfo->max_cs_threads*/,
428 16 * 1024,
429 16 * 1024
430 },
431 .subPixelPrecisionBits = 4 /* FIXME */,
432 .subTexelPrecisionBits = 4 /* FIXME */,
433 .mipmapPrecisionBits = 4 /* FIXME */,
434 .maxDrawIndexedIndexValue = UINT32_MAX,
435 .maxDrawIndirectCount = UINT32_MAX,
436 .maxSamplerLodBias = 16,
437 .maxSamplerAnisotropy = 16,
438 .maxViewports = MAX_VIEWPORTS,
439 .maxViewportDimensions = { (1 << 14), (1 << 14) },
440 .viewportBoundsRange = { INT16_MIN, INT16_MAX },
441 .viewportSubPixelBits = 13, /* We take a float? */
442 .minMemoryMapAlignment = 4096, /* A page */
443 .minTexelBufferOffsetAlignment = 1,
444 .minUniformBufferOffsetAlignment = 4,
445 .minStorageBufferOffsetAlignment = 4,
446 .minTexelOffset = -8,
447 .maxTexelOffset = 7,
448 .minTexelGatherOffset = -8,
449 .maxTexelGatherOffset = 7,
450 .minInterpolationOffset = 0, /* FIXME */
451 .maxInterpolationOffset = 0, /* FIXME */
452 .subPixelInterpolationOffsetBits = 0, /* FIXME */
453 .maxFramebufferWidth = (1 << 14),
454 .maxFramebufferHeight = (1 << 14),
455 .maxFramebufferLayers = (1 << 10),
456 .framebufferColorSampleCounts = sample_counts,
457 .framebufferDepthSampleCounts = sample_counts,
458 .framebufferStencilSampleCounts = sample_counts,
459 .framebufferNoAttachmentsSampleCounts = sample_counts,
460 .maxColorAttachments = MAX_RTS,
461 .sampledImageColorSampleCounts = sample_counts,
462 .sampledImageIntegerSampleCounts = VK_SAMPLE_COUNT_1_BIT,
463 .sampledImageDepthSampleCounts = sample_counts,
464 .sampledImageStencilSampleCounts = sample_counts,
465 .storageImageSampleCounts = VK_SAMPLE_COUNT_1_BIT,
466 .maxSampleMaskWords = 1,
467 .timestampComputeAndGraphics = false,
468 .timestampPeriod = 100000.0 / pdevice->rad_info.clock_crystal_freq,
469 .maxClipDistances = 8,
470 .maxCullDistances = 8,
471 .maxCombinedClipAndCullDistances = 8,
472 .discreteQueuePriorities = 1,
473 .pointSizeRange = { 0.125, 255.875 },
474 .lineWidthRange = { 0.0, 7.9921875 },
475 .pointSizeGranularity = (1.0 / 8.0),
476 .lineWidthGranularity = (1.0 / 128.0),
477 .strictLines = false, /* FINISHME */
478 .standardSampleLocations = true,
479 .optimalBufferCopyOffsetAlignment = 128,
480 .optimalBufferCopyRowPitchAlignment = 128,
481 .nonCoherentAtomSize = 64,
482 };
483
484 *pProperties = (VkPhysicalDeviceProperties) {
485 .apiVersion = VK_MAKE_VERSION(1, 0, 5),
486 .driverVersion = 1,
487 .vendorID = 0x1002,
488 .deviceID = pdevice->rad_info.pci_id,
489 .deviceType = VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU,
490 .limits = limits,
491 .sparseProperties = {0}, /* Broadwell doesn't do sparse. */
492 };
493
494 strcpy(pProperties->deviceName, pdevice->name);
495 radv_device_get_cache_uuid(pProperties->pipelineCacheUUID);
496 }
497
498 void radv_GetPhysicalDeviceQueueFamilyProperties(
499 VkPhysicalDevice physicalDevice,
500 uint32_t* pCount,
501 VkQueueFamilyProperties* pQueueFamilyProperties)
502 {
503 if (pQueueFamilyProperties == NULL) {
504 *pCount = 1;
505 return;
506 }
507 assert(*pCount >= 1);
508
509 *pQueueFamilyProperties = (VkQueueFamilyProperties) {
510 .queueFlags = VK_QUEUE_GRAPHICS_BIT |
511 VK_QUEUE_COMPUTE_BIT |
512 VK_QUEUE_TRANSFER_BIT,
513 .queueCount = 1,
514 .timestampValidBits = 64,
515 .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 },
516 };
517 }
518
519 void radv_GetPhysicalDeviceMemoryProperties(
520 VkPhysicalDevice physicalDevice,
521 VkPhysicalDeviceMemoryProperties* pMemoryProperties)
522 {
523 RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice);
524
525 pMemoryProperties->memoryTypeCount = 3;
526 pMemoryProperties->memoryTypes[0] = (VkMemoryType) {
527 .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT,
528 .heapIndex = 0,
529 };
530 pMemoryProperties->memoryTypes[1] = (VkMemoryType) {
531 .propertyFlags = VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT |
532 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
533 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT,
534 .heapIndex = 0,
535 };
536 pMemoryProperties->memoryTypes[2] = (VkMemoryType) {
537 .propertyFlags = VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT|
538 VK_MEMORY_PROPERTY_HOST_COHERENT_BIT |
539 VK_MEMORY_PROPERTY_HOST_CACHED_BIT,
540 .heapIndex = 1,
541 };
542
543 pMemoryProperties->memoryHeapCount = 2;
544 pMemoryProperties->memoryHeaps[0] = (VkMemoryHeap) {
545 .size = physical_device->rad_info.vram_size,
546 .flags = VK_MEMORY_HEAP_DEVICE_LOCAL_BIT,
547 };
548 pMemoryProperties->memoryHeaps[1] = (VkMemoryHeap) {
549 .size = physical_device->rad_info.gart_size,
550 .flags = 0,
551 };
552 }
553
554 static VkResult
555 radv_queue_init(struct radv_device *device, struct radv_queue *queue)
556 {
557 queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
558 queue->device = device;
559
560 return VK_SUCCESS;
561 }
562
563 static void
564 radv_queue_finish(struct radv_queue *queue)
565 {
566 }
567
568 VkResult radv_CreateDevice(
569 VkPhysicalDevice physicalDevice,
570 const VkDeviceCreateInfo* pCreateInfo,
571 const VkAllocationCallbacks* pAllocator,
572 VkDevice* pDevice)
573 {
574 RADV_FROM_HANDLE(radv_physical_device, physical_device, physicalDevice);
575 VkResult result;
576 struct radv_device *device;
577
578 for (uint32_t i = 0; i < pCreateInfo->enabledExtensionCount; i++) {
579 bool found = false;
580 for (uint32_t j = 0; j < ARRAY_SIZE(device_extensions); j++) {
581 if (strcmp(pCreateInfo->ppEnabledExtensionNames[i],
582 device_extensions[j].extensionName) == 0) {
583 found = true;
584 break;
585 }
586 }
587 if (!found)
588 return vk_error(VK_ERROR_EXTENSION_NOT_PRESENT);
589 }
590
591 device = vk_alloc2(&physical_device->instance->alloc, pAllocator,
592 sizeof(*device), 8,
593 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
594 if (!device)
595 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
596
597 device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
598 device->instance = physical_device->instance;
599
600 device->ws = physical_device->ws;
601 if (pAllocator)
602 device->alloc = *pAllocator;
603 else
604 device->alloc = physical_device->instance->alloc;
605
606 device->hw_ctx = device->ws->ctx_create(device->ws);
607 if (!device->hw_ctx) {
608 result = VK_ERROR_OUT_OF_HOST_MEMORY;
609 goto fail_free;
610 }
611
612 radv_queue_init(device, &device->queue);
613
614 result = radv_device_init_meta(device);
615 if (result != VK_SUCCESS) {
616 device->ws->ctx_destroy(device->hw_ctx);
617 goto fail_free;
618 }
619 device->allow_fast_clears = env_var_as_boolean("RADV_FAST_CLEARS", false);
620 device->allow_dcc = !env_var_as_boolean("RADV_DCC_DISABLE", false);
621
622 if (device->allow_fast_clears && device->allow_dcc)
623 radv_finishme("DCC fast clears have not been tested\n");
624
625 radv_device_init_msaa(device);
626 device->empty_cs = device->ws->cs_create(device->ws, RING_GFX);
627 radeon_emit(device->empty_cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
628 radeon_emit(device->empty_cs, CONTEXT_CONTROL_LOAD_ENABLE(1));
629 radeon_emit(device->empty_cs, CONTEXT_CONTROL_SHADOW_ENABLE(1));
630 device->ws->cs_finalize(device->empty_cs);
631 *pDevice = radv_device_to_handle(device);
632 return VK_SUCCESS;
633 fail_free:
634 vk_free(&device->alloc, device);
635 return result;
636 }
637
638 void radv_DestroyDevice(
639 VkDevice _device,
640 const VkAllocationCallbacks* pAllocator)
641 {
642 RADV_FROM_HANDLE(radv_device, device, _device);
643
644 device->ws->ctx_destroy(device->hw_ctx);
645 radv_queue_finish(&device->queue);
646 radv_device_finish_meta(device);
647
648 vk_free(&device->alloc, device);
649 }
650
651 VkResult radv_EnumerateInstanceExtensionProperties(
652 const char* pLayerName,
653 uint32_t* pPropertyCount,
654 VkExtensionProperties* pProperties)
655 {
656 unsigned i;
657 if (pProperties == NULL) {
658 *pPropertyCount = ARRAY_SIZE(global_extensions);
659 return VK_SUCCESS;
660 }
661
662 for (i = 0; i < *pPropertyCount; i++)
663 memcpy(&pProperties[i], &global_extensions[i], sizeof(VkExtensionProperties));
664
665 *pPropertyCount = i;
666 if (i < ARRAY_SIZE(global_extensions))
667 return VK_INCOMPLETE;
668
669 return VK_SUCCESS;
670 }
671
672 VkResult radv_EnumerateDeviceExtensionProperties(
673 VkPhysicalDevice physicalDevice,
674 const char* pLayerName,
675 uint32_t* pPropertyCount,
676 VkExtensionProperties* pProperties)
677 {
678 unsigned i;
679
680 if (pProperties == NULL) {
681 *pPropertyCount = ARRAY_SIZE(device_extensions);
682 return VK_SUCCESS;
683 }
684
685 for (i = 0; i < *pPropertyCount; i++)
686 memcpy(&pProperties[i], &device_extensions[i], sizeof(VkExtensionProperties));
687
688 *pPropertyCount = i;
689 if (i < ARRAY_SIZE(device_extensions))
690 return VK_INCOMPLETE;
691 return VK_SUCCESS;
692 }
693
694 VkResult radv_EnumerateInstanceLayerProperties(
695 uint32_t* pPropertyCount,
696 VkLayerProperties* pProperties)
697 {
698 if (pProperties == NULL) {
699 *pPropertyCount = 0;
700 return VK_SUCCESS;
701 }
702
703 /* None supported at this time */
704 return vk_error(VK_ERROR_LAYER_NOT_PRESENT);
705 }
706
707 VkResult radv_EnumerateDeviceLayerProperties(
708 VkPhysicalDevice physicalDevice,
709 uint32_t* pPropertyCount,
710 VkLayerProperties* pProperties)
711 {
712 if (pProperties == NULL) {
713 *pPropertyCount = 0;
714 return VK_SUCCESS;
715 }
716
717 /* None supported at this time */
718 return vk_error(VK_ERROR_LAYER_NOT_PRESENT);
719 }
720
721 void radv_GetDeviceQueue(
722 VkDevice _device,
723 uint32_t queueNodeIndex,
724 uint32_t queueIndex,
725 VkQueue* pQueue)
726 {
727 RADV_FROM_HANDLE(radv_device, device, _device);
728
729 assert(queueIndex == 0);
730
731 *pQueue = radv_queue_to_handle(&device->queue);
732 }
733
734 VkResult radv_QueueSubmit(
735 VkQueue _queue,
736 uint32_t submitCount,
737 const VkSubmitInfo* pSubmits,
738 VkFence _fence)
739 {
740 RADV_FROM_HANDLE(radv_queue, queue, _queue);
741 RADV_FROM_HANDLE(radv_fence, fence, _fence);
742 struct radeon_winsys_fence *base_fence = fence ? fence->fence : NULL;
743 struct radeon_winsys_ctx *ctx = queue->device->hw_ctx;
744 int ret;
745
746 for (uint32_t i = 0; i < submitCount; i++) {
747 struct radeon_winsys_cs **cs_array;
748 bool can_patch = true;
749
750 if (!pSubmits[i].commandBufferCount)
751 continue;
752
753 cs_array = malloc(sizeof(struct radeon_winsys_cs *) *
754 pSubmits[i].commandBufferCount);
755
756 for (uint32_t j = 0; j < pSubmits[i].commandBufferCount; j++) {
757 RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer,
758 pSubmits[i].pCommandBuffers[j]);
759 assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY);
760
761 cs_array[j] = cmd_buffer->cs;
762 if ((cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_SIMULTANEOUS_USE_BIT))
763 can_patch = false;
764 }
765 ret = queue->device->ws->cs_submit(ctx, cs_array,
766 pSubmits[i].commandBufferCount,
767 can_patch, base_fence);
768 if (ret)
769 radv_loge("failed to submit CS %d\n", i);
770 free(cs_array);
771 }
772
773 if (fence) {
774 if (!submitCount)
775 ret = queue->device->ws->cs_submit(ctx, &queue->device->empty_cs,
776 1, false, base_fence);
777
778 fence->submitted = true;
779 }
780
781 return VK_SUCCESS;
782 }
783
784 VkResult radv_QueueWaitIdle(
785 VkQueue _queue)
786 {
787 RADV_FROM_HANDLE(radv_queue, queue, _queue);
788
789 queue->device->ws->ctx_wait_idle(queue->device->hw_ctx);
790 return VK_SUCCESS;
791 }
792
793 VkResult radv_DeviceWaitIdle(
794 VkDevice _device)
795 {
796 RADV_FROM_HANDLE(radv_device, device, _device);
797
798 device->ws->ctx_wait_idle(device->hw_ctx);
799 return VK_SUCCESS;
800 }
801
802 PFN_vkVoidFunction radv_GetInstanceProcAddr(
803 VkInstance instance,
804 const char* pName)
805 {
806 return radv_lookup_entrypoint(pName);
807 }
808
809 /* The loader wants us to expose a second GetInstanceProcAddr function
810 * to work around certain LD_PRELOAD issues seen in apps.
811 */
812 PUBLIC
813 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr(
814 VkInstance instance,
815 const char* pName);
816
817 PUBLIC
818 VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr(
819 VkInstance instance,
820 const char* pName)
821 {
822 return radv_GetInstanceProcAddr(instance, pName);
823 }
824
825 PFN_vkVoidFunction radv_GetDeviceProcAddr(
826 VkDevice device,
827 const char* pName)
828 {
829 return radv_lookup_entrypoint(pName);
830 }
831
832 VkResult radv_AllocateMemory(
833 VkDevice _device,
834 const VkMemoryAllocateInfo* pAllocateInfo,
835 const VkAllocationCallbacks* pAllocator,
836 VkDeviceMemory* pMem)
837 {
838 RADV_FROM_HANDLE(radv_device, device, _device);
839 struct radv_device_memory *mem;
840 VkResult result;
841 enum radeon_bo_domain domain;
842 uint32_t flags = 0;
843 assert(pAllocateInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO);
844
845 if (pAllocateInfo->allocationSize == 0) {
846 /* Apparently, this is allowed */
847 *pMem = VK_NULL_HANDLE;
848 return VK_SUCCESS;
849 }
850
851 mem = vk_alloc2(&device->alloc, pAllocator, sizeof(*mem), 8,
852 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
853 if (mem == NULL)
854 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
855
856 uint64_t alloc_size = align_u64(pAllocateInfo->allocationSize, 4096);
857 if (pAllocateInfo->memoryTypeIndex == 2)
858 domain = RADEON_DOMAIN_GTT;
859 else
860 domain = RADEON_DOMAIN_VRAM;
861
862 if (pAllocateInfo->memoryTypeIndex == 0)
863 flags |= RADEON_FLAG_NO_CPU_ACCESS;
864 else
865 flags |= RADEON_FLAG_CPU_ACCESS;
866 mem->bo = device->ws->buffer_create(device->ws, alloc_size, 32768,
867 domain, flags);
868
869 if (!mem->bo) {
870 result = VK_ERROR_OUT_OF_DEVICE_MEMORY;
871 goto fail;
872 }
873 mem->type_index = pAllocateInfo->memoryTypeIndex;
874
875 *pMem = radv_device_memory_to_handle(mem);
876
877 return VK_SUCCESS;
878
879 fail:
880 vk_free2(&device->alloc, pAllocator, mem);
881
882 return result;
883 }
884
885 void radv_FreeMemory(
886 VkDevice _device,
887 VkDeviceMemory _mem,
888 const VkAllocationCallbacks* pAllocator)
889 {
890 RADV_FROM_HANDLE(radv_device, device, _device);
891 RADV_FROM_HANDLE(radv_device_memory, mem, _mem);
892
893 if (mem == NULL)
894 return;
895
896 device->ws->buffer_destroy(mem->bo);
897 mem->bo = NULL;
898
899 vk_free2(&device->alloc, pAllocator, mem);
900 }
901
902 VkResult radv_MapMemory(
903 VkDevice _device,
904 VkDeviceMemory _memory,
905 VkDeviceSize offset,
906 VkDeviceSize size,
907 VkMemoryMapFlags flags,
908 void** ppData)
909 {
910 RADV_FROM_HANDLE(radv_device, device, _device);
911 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
912
913 if (mem == NULL) {
914 *ppData = NULL;
915 return VK_SUCCESS;
916 }
917
918 *ppData = device->ws->buffer_map(mem->bo);
919 if (*ppData) {
920 *ppData += offset;
921 return VK_SUCCESS;
922 }
923
924 return VK_ERROR_MEMORY_MAP_FAILED;
925 }
926
927 void radv_UnmapMemory(
928 VkDevice _device,
929 VkDeviceMemory _memory)
930 {
931 RADV_FROM_HANDLE(radv_device, device, _device);
932 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
933
934 if (mem == NULL)
935 return;
936
937 device->ws->buffer_unmap(mem->bo);
938 }
939
940 VkResult radv_FlushMappedMemoryRanges(
941 VkDevice _device,
942 uint32_t memoryRangeCount,
943 const VkMappedMemoryRange* pMemoryRanges)
944 {
945 return VK_SUCCESS;
946 }
947
948 VkResult radv_InvalidateMappedMemoryRanges(
949 VkDevice _device,
950 uint32_t memoryRangeCount,
951 const VkMappedMemoryRange* pMemoryRanges)
952 {
953 return VK_SUCCESS;
954 }
955
956 void radv_GetBufferMemoryRequirements(
957 VkDevice device,
958 VkBuffer _buffer,
959 VkMemoryRequirements* pMemoryRequirements)
960 {
961 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
962
963 /* The Vulkan spec (git aaed022) says:
964 *
965 * memoryTypeBits is a bitfield and contains one bit set for every
966 * supported memory type for the resource. The bit `1<<i` is set if and
967 * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties
968 * structure for the physical device is supported.
969 *
970 * We support exactly one memory type.
971 */
972 pMemoryRequirements->memoryTypeBits = 0x7;
973
974 pMemoryRequirements->size = buffer->size;
975 pMemoryRequirements->alignment = 16;
976 }
977
978 void radv_GetImageMemoryRequirements(
979 VkDevice device,
980 VkImage _image,
981 VkMemoryRequirements* pMemoryRequirements)
982 {
983 RADV_FROM_HANDLE(radv_image, image, _image);
984
985 /* The Vulkan spec (git aaed022) says:
986 *
987 * memoryTypeBits is a bitfield and contains one bit set for every
988 * supported memory type for the resource. The bit `1<<i` is set if and
989 * only if the memory type `i` in the VkPhysicalDeviceMemoryProperties
990 * structure for the physical device is supported.
991 *
992 * We support exactly one memory type.
993 */
994 pMemoryRequirements->memoryTypeBits = 0x7;
995
996 pMemoryRequirements->size = image->size;
997 pMemoryRequirements->alignment = image->alignment;
998 }
999
1000 void radv_GetImageSparseMemoryRequirements(
1001 VkDevice device,
1002 VkImage image,
1003 uint32_t* pSparseMemoryRequirementCount,
1004 VkSparseImageMemoryRequirements* pSparseMemoryRequirements)
1005 {
1006 stub();
1007 }
1008
1009 void radv_GetDeviceMemoryCommitment(
1010 VkDevice device,
1011 VkDeviceMemory memory,
1012 VkDeviceSize* pCommittedMemoryInBytes)
1013 {
1014 *pCommittedMemoryInBytes = 0;
1015 }
1016
1017 VkResult radv_BindBufferMemory(
1018 VkDevice device,
1019 VkBuffer _buffer,
1020 VkDeviceMemory _memory,
1021 VkDeviceSize memoryOffset)
1022 {
1023 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1024 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
1025
1026 if (mem) {
1027 buffer->bo = mem->bo;
1028 buffer->offset = memoryOffset;
1029 } else {
1030 buffer->bo = NULL;
1031 buffer->offset = 0;
1032 }
1033
1034 return VK_SUCCESS;
1035 }
1036
1037 VkResult radv_BindImageMemory(
1038 VkDevice device,
1039 VkImage _image,
1040 VkDeviceMemory _memory,
1041 VkDeviceSize memoryOffset)
1042 {
1043 RADV_FROM_HANDLE(radv_device_memory, mem, _memory);
1044 RADV_FROM_HANDLE(radv_image, image, _image);
1045
1046 if (mem) {
1047 image->bo = mem->bo;
1048 image->offset = memoryOffset;
1049 } else {
1050 image->bo = NULL;
1051 image->offset = 0;
1052 }
1053
1054 return VK_SUCCESS;
1055 }
1056
1057 VkResult radv_QueueBindSparse(
1058 VkQueue queue,
1059 uint32_t bindInfoCount,
1060 const VkBindSparseInfo* pBindInfo,
1061 VkFence fence)
1062 {
1063 stub_return(VK_ERROR_INCOMPATIBLE_DRIVER);
1064 }
1065
1066 VkResult radv_CreateFence(
1067 VkDevice _device,
1068 const VkFenceCreateInfo* pCreateInfo,
1069 const VkAllocationCallbacks* pAllocator,
1070 VkFence* pFence)
1071 {
1072 RADV_FROM_HANDLE(radv_device, device, _device);
1073 struct radv_fence *fence = vk_alloc2(&device->alloc, pAllocator,
1074 sizeof(*fence), 8,
1075 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1076
1077 if (!fence)
1078 return VK_ERROR_OUT_OF_HOST_MEMORY;
1079
1080 memset(fence, 0, sizeof(*fence));
1081 fence->submitted = false;
1082 fence->signalled = !!(pCreateInfo->flags & VK_FENCE_CREATE_SIGNALED_BIT);
1083 fence->fence = device->ws->create_fence();
1084
1085
1086 *pFence = radv_fence_to_handle(fence);
1087
1088 return VK_SUCCESS;
1089 }
1090
1091 void radv_DestroyFence(
1092 VkDevice _device,
1093 VkFence _fence,
1094 const VkAllocationCallbacks* pAllocator)
1095 {
1096 RADV_FROM_HANDLE(radv_device, device, _device);
1097 RADV_FROM_HANDLE(radv_fence, fence, _fence);
1098
1099 if (!fence)
1100 return;
1101 device->ws->destroy_fence(fence->fence);
1102 vk_free2(&device->alloc, pAllocator, fence);
1103 }
1104
1105 static uint64_t radv_get_absolute_timeout(uint64_t timeout)
1106 {
1107 uint64_t current_time;
1108 struct timespec tv;
1109
1110 clock_gettime(CLOCK_MONOTONIC, &tv);
1111 current_time = tv.tv_nsec + tv.tv_sec*1000000000ull;
1112
1113 timeout = MIN2(UINT64_MAX - current_time, timeout);
1114
1115 return current_time + timeout;
1116 }
1117
1118 VkResult radv_WaitForFences(
1119 VkDevice _device,
1120 uint32_t fenceCount,
1121 const VkFence* pFences,
1122 VkBool32 waitAll,
1123 uint64_t timeout)
1124 {
1125 RADV_FROM_HANDLE(radv_device, device, _device);
1126 timeout = radv_get_absolute_timeout(timeout);
1127
1128 if (!waitAll && fenceCount > 1) {
1129 fprintf(stderr, "radv: WaitForFences without waitAll not implemented yet\n");
1130 }
1131
1132 for (uint32_t i = 0; i < fenceCount; ++i) {
1133 RADV_FROM_HANDLE(radv_fence, fence, pFences[i]);
1134 bool expired = false;
1135
1136 if (fence->signalled)
1137 continue;
1138
1139 if (!fence->submitted)
1140 return VK_TIMEOUT;
1141
1142 expired = device->ws->fence_wait(device->ws, fence->fence, true, timeout);
1143 if (!expired)
1144 return VK_TIMEOUT;
1145
1146 fence->signalled = true;
1147 }
1148
1149 return VK_SUCCESS;
1150 }
1151
1152 VkResult radv_ResetFences(VkDevice device,
1153 uint32_t fenceCount,
1154 const VkFence *pFences)
1155 {
1156 for (unsigned i = 0; i < fenceCount; ++i) {
1157 RADV_FROM_HANDLE(radv_fence, fence, pFences[i]);
1158 fence->submitted = fence->signalled = false;
1159 }
1160
1161 return VK_SUCCESS;
1162 }
1163
1164 VkResult radv_GetFenceStatus(VkDevice _device, VkFence _fence)
1165 {
1166 RADV_FROM_HANDLE(radv_device, device, _device);
1167 RADV_FROM_HANDLE(radv_fence, fence, _fence);
1168
1169 if (!fence->submitted)
1170 return VK_NOT_READY;
1171
1172 if (!device->ws->fence_wait(device->ws, fence->fence, false, 0))
1173 return VK_NOT_READY;
1174
1175 return VK_SUCCESS;
1176 }
1177
1178
1179 // Queue semaphore functions
1180
1181 VkResult radv_CreateSemaphore(
1182 VkDevice device,
1183 const VkSemaphoreCreateInfo* pCreateInfo,
1184 const VkAllocationCallbacks* pAllocator,
1185 VkSemaphore* pSemaphore)
1186 {
1187 /* The DRM execbuffer ioctl always execute in-oder, even between different
1188 * rings. As such, there's nothing to do for the user space semaphore.
1189 */
1190
1191 *pSemaphore = (VkSemaphore)1;
1192
1193 return VK_SUCCESS;
1194 }
1195
1196 void radv_DestroySemaphore(
1197 VkDevice device,
1198 VkSemaphore semaphore,
1199 const VkAllocationCallbacks* pAllocator)
1200 {
1201 }
1202
1203 VkResult radv_CreateEvent(
1204 VkDevice _device,
1205 const VkEventCreateInfo* pCreateInfo,
1206 const VkAllocationCallbacks* pAllocator,
1207 VkEvent* pEvent)
1208 {
1209 RADV_FROM_HANDLE(radv_device, device, _device);
1210 struct radv_event *event = vk_alloc2(&device->alloc, pAllocator,
1211 sizeof(*event), 8,
1212 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1213
1214 if (!event)
1215 return VK_ERROR_OUT_OF_HOST_MEMORY;
1216
1217 event->bo = device->ws->buffer_create(device->ws, 8, 8,
1218 RADEON_DOMAIN_GTT,
1219 RADEON_FLAG_CPU_ACCESS);
1220 if (!event->bo) {
1221 vk_free2(&device->alloc, pAllocator, event);
1222 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
1223 }
1224
1225 event->map = (uint64_t*)device->ws->buffer_map(event->bo);
1226
1227 *pEvent = radv_event_to_handle(event);
1228
1229 return VK_SUCCESS;
1230 }
1231
1232 void radv_DestroyEvent(
1233 VkDevice _device,
1234 VkEvent _event,
1235 const VkAllocationCallbacks* pAllocator)
1236 {
1237 RADV_FROM_HANDLE(radv_device, device, _device);
1238 RADV_FROM_HANDLE(radv_event, event, _event);
1239
1240 if (!event)
1241 return;
1242 device->ws->buffer_destroy(event->bo);
1243 vk_free2(&device->alloc, pAllocator, event);
1244 }
1245
1246 VkResult radv_GetEventStatus(
1247 VkDevice _device,
1248 VkEvent _event)
1249 {
1250 RADV_FROM_HANDLE(radv_event, event, _event);
1251
1252 if (*event->map == 1)
1253 return VK_EVENT_SET;
1254 return VK_EVENT_RESET;
1255 }
1256
1257 VkResult radv_SetEvent(
1258 VkDevice _device,
1259 VkEvent _event)
1260 {
1261 RADV_FROM_HANDLE(radv_event, event, _event);
1262 *event->map = 1;
1263
1264 return VK_SUCCESS;
1265 }
1266
1267 VkResult radv_ResetEvent(
1268 VkDevice _device,
1269 VkEvent _event)
1270 {
1271 RADV_FROM_HANDLE(radv_event, event, _event);
1272 *event->map = 0;
1273
1274 return VK_SUCCESS;
1275 }
1276
1277 VkResult radv_CreateBuffer(
1278 VkDevice _device,
1279 const VkBufferCreateInfo* pCreateInfo,
1280 const VkAllocationCallbacks* pAllocator,
1281 VkBuffer* pBuffer)
1282 {
1283 RADV_FROM_HANDLE(radv_device, device, _device);
1284 struct radv_buffer *buffer;
1285
1286 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
1287
1288 buffer = vk_alloc2(&device->alloc, pAllocator, sizeof(*buffer), 8,
1289 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1290 if (buffer == NULL)
1291 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1292
1293 buffer->size = pCreateInfo->size;
1294 buffer->usage = pCreateInfo->usage;
1295 buffer->bo = NULL;
1296 buffer->offset = 0;
1297
1298 *pBuffer = radv_buffer_to_handle(buffer);
1299
1300 return VK_SUCCESS;
1301 }
1302
1303 void radv_DestroyBuffer(
1304 VkDevice _device,
1305 VkBuffer _buffer,
1306 const VkAllocationCallbacks* pAllocator)
1307 {
1308 RADV_FROM_HANDLE(radv_device, device, _device);
1309 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
1310
1311 if (!buffer)
1312 return;
1313
1314 vk_free2(&device->alloc, pAllocator, buffer);
1315 }
1316
1317 static inline unsigned
1318 si_tile_mode_index(const struct radv_image *image, unsigned level, bool stencil)
1319 {
1320 if (stencil)
1321 return image->surface.stencil_tiling_index[level];
1322 else
1323 return image->surface.tiling_index[level];
1324 }
1325
1326 static void
1327 radv_initialise_color_surface(struct radv_device *device,
1328 struct radv_color_buffer_info *cb,
1329 struct radv_image_view *iview)
1330 {
1331 const struct vk_format_description *desc;
1332 unsigned ntype, format, swap, endian;
1333 unsigned blend_clamp = 0, blend_bypass = 0;
1334 unsigned pitch_tile_max, slice_tile_max, tile_mode_index;
1335 uint64_t va;
1336 const struct radeon_surf *surf = &iview->image->surface;
1337 const struct radeon_surf_level *level_info = &surf->level[iview->base_mip];
1338
1339 desc = vk_format_description(iview->vk_format);
1340
1341 memset(cb, 0, sizeof(*cb));
1342
1343 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1344 va += level_info->offset;
1345 cb->cb_color_base = va >> 8;
1346
1347 /* CMASK variables */
1348 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1349 va += iview->image->cmask.offset;
1350 cb->cb_color_cmask = va >> 8;
1351 cb->cb_color_cmask_slice = iview->image->cmask.slice_tile_max;
1352
1353 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1354 va += iview->image->dcc_offset;
1355 cb->cb_dcc_base = va >> 8;
1356
1357 cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) |
1358 S_028C6C_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1359
1360 cb->micro_tile_mode = iview->image->surface.micro_tile_mode;
1361 pitch_tile_max = level_info->nblk_x / 8 - 1;
1362 slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1;
1363 tile_mode_index = si_tile_mode_index(iview->image, iview->base_mip, false);
1364
1365 cb->cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max);
1366 cb->cb_color_slice = S_028C68_TILE_MAX(slice_tile_max);
1367
1368 /* Intensity is implemented as Red, so treat it that way. */
1369 cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == VK_SWIZZLE_1) |
1370 S_028C74_TILE_MODE_INDEX(tile_mode_index);
1371
1372 if (iview->image->samples > 1) {
1373 unsigned log_samples = util_logbase2(iview->image->samples);
1374
1375 cb->cb_color_attrib |= S_028C74_NUM_SAMPLES(log_samples) |
1376 S_028C74_NUM_FRAGMENTS(log_samples);
1377 }
1378
1379 if (iview->image->fmask.size) {
1380 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + iview->image->fmask.offset;
1381 if (device->instance->physicalDevice.rad_info.chip_class >= CIK)
1382 cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(iview->image->fmask.pitch_in_pixels / 8 - 1);
1383 cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(iview->image->fmask.tile_mode_index);
1384 cb->cb_color_fmask = va >> 8;
1385 cb->cb_color_fmask_slice = S_028C88_TILE_MAX(iview->image->fmask.slice_tile_max);
1386 } else {
1387 /* This must be set for fast clear to work without FMASK. */
1388 if (device->instance->physicalDevice.rad_info.chip_class >= CIK)
1389 cb->cb_color_pitch |= S_028C64_FMASK_TILE_MAX(pitch_tile_max);
1390 cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(tile_mode_index);
1391 cb->cb_color_fmask = cb->cb_color_base;
1392 cb->cb_color_fmask_slice = S_028C88_TILE_MAX(slice_tile_max);
1393 }
1394
1395 ntype = radv_translate_color_numformat(iview->vk_format,
1396 desc,
1397 vk_format_get_first_non_void_channel(iview->vk_format));
1398 format = radv_translate_colorformat(iview->vk_format);
1399 if (format == V_028C70_COLOR_INVALID || ntype == ~0u)
1400 radv_finishme("Illegal color\n");
1401 swap = radv_translate_colorswap(iview->vk_format, FALSE);
1402 endian = radv_colorformat_endian_swap(format);
1403
1404 /* blend clamp should be set for all NORM/SRGB types */
1405 if (ntype == V_028C70_NUMBER_UNORM ||
1406 ntype == V_028C70_NUMBER_SNORM ||
1407 ntype == V_028C70_NUMBER_SRGB)
1408 blend_clamp = 1;
1409
1410 /* set blend bypass according to docs if SINT/UINT or
1411 8/24 COLOR variants */
1412 if (ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT ||
1413 format == V_028C70_COLOR_8_24 || format == V_028C70_COLOR_24_8 ||
1414 format == V_028C70_COLOR_X24_8_32_FLOAT) {
1415 blend_clamp = 0;
1416 blend_bypass = 1;
1417 }
1418 #if 0
1419 if ((ntype == V_028C70_NUMBER_UINT || ntype == V_028C70_NUMBER_SINT) &&
1420 (format == V_028C70_COLOR_8 ||
1421 format == V_028C70_COLOR_8_8 ||
1422 format == V_028C70_COLOR_8_8_8_8))
1423 ->color_is_int8 = true;
1424 #endif
1425 cb->cb_color_info = S_028C70_FORMAT(format) |
1426 S_028C70_COMP_SWAP(swap) |
1427 S_028C70_BLEND_CLAMP(blend_clamp) |
1428 S_028C70_BLEND_BYPASS(blend_bypass) |
1429 S_028C70_SIMPLE_FLOAT(1) |
1430 S_028C70_ROUND_MODE(ntype != V_028C70_NUMBER_UNORM &&
1431 ntype != V_028C70_NUMBER_SNORM &&
1432 ntype != V_028C70_NUMBER_SRGB &&
1433 format != V_028C70_COLOR_8_24 &&
1434 format != V_028C70_COLOR_24_8) |
1435 S_028C70_NUMBER_TYPE(ntype) |
1436 S_028C70_ENDIAN(endian);
1437 if (iview->image->samples > 1)
1438 if (iview->image->fmask.size)
1439 cb->cb_color_info |= S_028C70_COMPRESSION(1);
1440
1441 if (iview->image->cmask.size && device->allow_fast_clears)
1442 cb->cb_color_info |= S_028C70_FAST_CLEAR(1);
1443
1444 if (iview->image->surface.dcc_size && level_info->dcc_enabled)
1445 cb->cb_color_info |= S_028C70_DCC_ENABLE(1);
1446
1447 if (device->instance->physicalDevice.rad_info.chip_class >= VI) {
1448 unsigned max_uncompressed_block_size = 2;
1449 if (iview->image->samples > 1) {
1450 if (iview->image->surface.bpe == 1)
1451 max_uncompressed_block_size = 0;
1452 else if (iview->image->surface.bpe == 2)
1453 max_uncompressed_block_size = 1;
1454 }
1455
1456 cb->cb_dcc_control = S_028C78_MAX_UNCOMPRESSED_BLOCK_SIZE(max_uncompressed_block_size) |
1457 S_028C78_INDEPENDENT_64B_BLOCKS(1);
1458 }
1459
1460 /* This must be set for fast clear to work without FMASK. */
1461 if (!iview->image->fmask.size &&
1462 device->instance->physicalDevice.rad_info.chip_class == SI) {
1463 unsigned bankh = util_logbase2(iview->image->surface.bankh);
1464 cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh);
1465 }
1466 }
1467
1468 static void
1469 radv_initialise_ds_surface(struct radv_device *device,
1470 struct radv_ds_buffer_info *ds,
1471 struct radv_image_view *iview)
1472 {
1473 unsigned level = iview->base_mip;
1474 unsigned format;
1475 uint64_t va, s_offs, z_offs;
1476 const struct radeon_surf_level *level_info = &iview->image->surface.level[level];
1477 memset(ds, 0, sizeof(*ds));
1478 switch (iview->vk_format) {
1479 case VK_FORMAT_D24_UNORM_S8_UINT:
1480 case VK_FORMAT_X8_D24_UNORM_PACK32:
1481 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-24);
1482 ds->offset_scale = 2.0f;
1483 break;
1484 case VK_FORMAT_D16_UNORM:
1485 case VK_FORMAT_D16_UNORM_S8_UINT:
1486 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-16);
1487 ds->offset_scale = 4.0f;
1488 break;
1489 case VK_FORMAT_D32_SFLOAT:
1490 case VK_FORMAT_D32_SFLOAT_S8_UINT:
1491 ds->pa_su_poly_offset_db_fmt_cntl = S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(-23) |
1492 S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(1);
1493 ds->offset_scale = 1.0f;
1494 break;
1495 default:
1496 break;
1497 }
1498
1499 format = radv_translate_dbformat(iview->vk_format);
1500 if (format == V_028040_Z_INVALID) {
1501 fprintf(stderr, "Invalid DB format: %d, disabling DB.\n", iview->vk_format);
1502 }
1503
1504 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset;
1505 s_offs = z_offs = va;
1506 z_offs += iview->image->surface.level[level].offset;
1507 s_offs += iview->image->surface.stencil_level[level].offset;
1508
1509 ds->db_depth_view = S_028008_SLICE_START(iview->base_layer) |
1510 S_028008_SLICE_MAX(iview->base_layer + iview->extent.depth - 1);
1511 ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(1);
1512 ds->db_z_info = S_028040_FORMAT(format) | S_028040_ZRANGE_PRECISION(1);
1513
1514 if (iview->image->samples > 1)
1515 ds->db_z_info |= S_028040_NUM_SAMPLES(util_logbase2(iview->image->samples));
1516
1517 if (iview->image->surface.flags & RADEON_SURF_SBUFFER)
1518 ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_8);
1519 else
1520 ds->db_stencil_info = S_028044_FORMAT(V_028044_STENCIL_INVALID);
1521
1522 if (device->instance->physicalDevice.rad_info.chip_class >= CIK) {
1523 struct radeon_info *info = &device->instance->physicalDevice.rad_info;
1524 unsigned tiling_index = iview->image->surface.tiling_index[level];
1525 unsigned stencil_index = iview->image->surface.stencil_tiling_index[level];
1526 unsigned macro_index = iview->image->surface.macro_tile_index;
1527 unsigned tile_mode = info->si_tile_mode_array[tiling_index];
1528 unsigned stencil_tile_mode = info->si_tile_mode_array[stencil_index];
1529 unsigned macro_mode = info->cik_macrotile_mode_array[macro_index];
1530
1531 ds->db_depth_info |=
1532 S_02803C_ARRAY_MODE(G_009910_ARRAY_MODE(tile_mode)) |
1533 S_02803C_PIPE_CONFIG(G_009910_PIPE_CONFIG(tile_mode)) |
1534 S_02803C_BANK_WIDTH(G_009990_BANK_WIDTH(macro_mode)) |
1535 S_02803C_BANK_HEIGHT(G_009990_BANK_HEIGHT(macro_mode)) |
1536 S_02803C_MACRO_TILE_ASPECT(G_009990_MACRO_TILE_ASPECT(macro_mode)) |
1537 S_02803C_NUM_BANKS(G_009990_NUM_BANKS(macro_mode));
1538 ds->db_z_info |= S_028040_TILE_SPLIT(G_009910_TILE_SPLIT(tile_mode));
1539 ds->db_stencil_info |= S_028044_TILE_SPLIT(G_009910_TILE_SPLIT(stencil_tile_mode));
1540 } else {
1541 unsigned tile_mode_index = si_tile_mode_index(iview->image, level, false);
1542 ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index);
1543 tile_mode_index = si_tile_mode_index(iview->image, level, true);
1544 ds->db_stencil_info |= S_028044_TILE_MODE_INDEX(tile_mode_index);
1545 }
1546
1547 if (iview->image->htile.size && !level) {
1548 ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1) |
1549 S_028040_ALLOW_EXPCLEAR(1);
1550
1551 if (iview->image->surface.flags & RADEON_SURF_SBUFFER) {
1552 /* Workaround: For a not yet understood reason, the
1553 * combination of MSAA, fast stencil clear and stencil
1554 * decompress messes with subsequent stencil buffer
1555 * uses. Problem was reproduced on Verde, Bonaire,
1556 * Tonga, and Carrizo.
1557 *
1558 * Disabling EXPCLEAR works around the problem.
1559 *
1560 * Check piglit's arb_texture_multisample-stencil-clear
1561 * test if you want to try changing this.
1562 */
1563 if (iview->image->samples <= 1)
1564 ds->db_stencil_info |= S_028044_ALLOW_EXPCLEAR(1);
1565 } else
1566 /* Use all of the htile_buffer for depth if there's no stencil. */
1567 ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1);
1568
1569 va = device->ws->buffer_get_va(iview->bo) + iview->image->offset +
1570 iview->image->htile.offset;
1571 ds->db_htile_data_base = va >> 8;
1572 ds->db_htile_surface = S_028ABC_FULL_CACHE(1);
1573 } else {
1574 ds->db_htile_data_base = 0;
1575 ds->db_htile_surface = 0;
1576 }
1577
1578 ds->db_z_read_base = ds->db_z_write_base = z_offs >> 8;
1579 ds->db_stencil_read_base = ds->db_stencil_write_base = s_offs >> 8;
1580
1581 ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) |
1582 S_028058_HEIGHT_TILE_MAX((level_info->nblk_y / 8) - 1);
1583 ds->db_depth_slice = S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1);
1584 }
1585
1586 VkResult radv_CreateFramebuffer(
1587 VkDevice _device,
1588 const VkFramebufferCreateInfo* pCreateInfo,
1589 const VkAllocationCallbacks* pAllocator,
1590 VkFramebuffer* pFramebuffer)
1591 {
1592 RADV_FROM_HANDLE(radv_device, device, _device);
1593 struct radv_framebuffer *framebuffer;
1594
1595 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
1596
1597 size_t size = sizeof(*framebuffer) +
1598 sizeof(struct radv_attachment_info) * pCreateInfo->attachmentCount;
1599 framebuffer = vk_alloc2(&device->alloc, pAllocator, size, 8,
1600 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1601 if (framebuffer == NULL)
1602 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1603
1604 framebuffer->attachment_count = pCreateInfo->attachmentCount;
1605 for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) {
1606 VkImageView _iview = pCreateInfo->pAttachments[i];
1607 struct radv_image_view *iview = radv_image_view_from_handle(_iview);
1608 framebuffer->attachments[i].attachment = iview;
1609 if (iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT) {
1610 radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview);
1611 } else if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) {
1612 radv_initialise_ds_surface(device, &framebuffer->attachments[i].ds, iview);
1613 }
1614 }
1615
1616 framebuffer->width = pCreateInfo->width;
1617 framebuffer->height = pCreateInfo->height;
1618 framebuffer->layers = pCreateInfo->layers;
1619
1620 *pFramebuffer = radv_framebuffer_to_handle(framebuffer);
1621 return VK_SUCCESS;
1622 }
1623
1624 void radv_DestroyFramebuffer(
1625 VkDevice _device,
1626 VkFramebuffer _fb,
1627 const VkAllocationCallbacks* pAllocator)
1628 {
1629 RADV_FROM_HANDLE(radv_device, device, _device);
1630 RADV_FROM_HANDLE(radv_framebuffer, fb, _fb);
1631
1632 if (!fb)
1633 return;
1634 vk_free2(&device->alloc, pAllocator, fb);
1635 }
1636
1637 static unsigned radv_tex_wrap(VkSamplerAddressMode address_mode)
1638 {
1639 switch (address_mode) {
1640 case VK_SAMPLER_ADDRESS_MODE_REPEAT:
1641 return V_008F30_SQ_TEX_WRAP;
1642 case VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT:
1643 return V_008F30_SQ_TEX_MIRROR;
1644 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE:
1645 return V_008F30_SQ_TEX_CLAMP_LAST_TEXEL;
1646 case VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER:
1647 return V_008F30_SQ_TEX_CLAMP_BORDER;
1648 case VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE:
1649 return V_008F30_SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
1650 default:
1651 unreachable("illegal tex wrap mode");
1652 break;
1653 }
1654 }
1655
1656 static unsigned
1657 radv_tex_compare(VkCompareOp op)
1658 {
1659 switch (op) {
1660 case VK_COMPARE_OP_NEVER:
1661 return V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER;
1662 case VK_COMPARE_OP_LESS:
1663 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESS;
1664 case VK_COMPARE_OP_EQUAL:
1665 return V_008F30_SQ_TEX_DEPTH_COMPARE_EQUAL;
1666 case VK_COMPARE_OP_LESS_OR_EQUAL:
1667 return V_008F30_SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
1668 case VK_COMPARE_OP_GREATER:
1669 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATER;
1670 case VK_COMPARE_OP_NOT_EQUAL:
1671 return V_008F30_SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
1672 case VK_COMPARE_OP_GREATER_OR_EQUAL:
1673 return V_008F30_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
1674 case VK_COMPARE_OP_ALWAYS:
1675 return V_008F30_SQ_TEX_DEPTH_COMPARE_ALWAYS;
1676 default:
1677 unreachable("illegal compare mode");
1678 break;
1679 }
1680 }
1681
1682 static unsigned
1683 radv_tex_filter(VkFilter filter, unsigned max_ansio)
1684 {
1685 switch (filter) {
1686 case VK_FILTER_NEAREST:
1687 return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_POINT :
1688 V_008F38_SQ_TEX_XY_FILTER_POINT);
1689 case VK_FILTER_LINEAR:
1690 return (max_ansio > 1 ? V_008F38_SQ_TEX_XY_FILTER_ANISO_BILINEAR :
1691 V_008F38_SQ_TEX_XY_FILTER_BILINEAR);
1692 case VK_FILTER_CUBIC_IMG:
1693 default:
1694 fprintf(stderr, "illegal texture filter");
1695 return 0;
1696 }
1697 }
1698
1699 static unsigned
1700 radv_tex_mipfilter(VkSamplerMipmapMode mode)
1701 {
1702 switch (mode) {
1703 case VK_SAMPLER_MIPMAP_MODE_NEAREST:
1704 return V_008F38_SQ_TEX_Z_FILTER_POINT;
1705 case VK_SAMPLER_MIPMAP_MODE_LINEAR:
1706 return V_008F38_SQ_TEX_Z_FILTER_LINEAR;
1707 default:
1708 return V_008F38_SQ_TEX_Z_FILTER_NONE;
1709 }
1710 }
1711
1712 static unsigned
1713 radv_tex_bordercolor(VkBorderColor bcolor)
1714 {
1715 switch (bcolor) {
1716 case VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK:
1717 case VK_BORDER_COLOR_INT_TRANSPARENT_BLACK:
1718 return V_008F3C_SQ_TEX_BORDER_COLOR_TRANS_BLACK;
1719 case VK_BORDER_COLOR_FLOAT_OPAQUE_BLACK:
1720 case VK_BORDER_COLOR_INT_OPAQUE_BLACK:
1721 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK;
1722 case VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE:
1723 case VK_BORDER_COLOR_INT_OPAQUE_WHITE:
1724 return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE;
1725 default:
1726 break;
1727 }
1728 return 0;
1729 }
1730
1731 static void
1732 radv_init_sampler(struct radv_device *device,
1733 struct radv_sampler *sampler,
1734 const VkSamplerCreateInfo *pCreateInfo)
1735 {
1736 uint32_t max_aniso = 0;
1737 uint32_t max_aniso_ratio = 0;//TODO
1738 bool is_vi;
1739 is_vi = (device->instance->physicalDevice.rad_info.chip_class >= VI);
1740
1741 sampler->state[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo->addressModeU)) |
1742 S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo->addressModeV)) |
1743 S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo->addressModeW)) |
1744 S_008F30_MAX_ANISO_RATIO(max_aniso_ratio) |
1745 S_008F30_DEPTH_COMPARE_FUNC(radv_tex_compare(pCreateInfo->compareOp)) |
1746 S_008F30_FORCE_UNNORMALIZED(pCreateInfo->unnormalizedCoordinates ? 1 : 0) |
1747 S_008F30_DISABLE_CUBE_WRAP(0) |
1748 S_008F30_COMPAT_MODE(is_vi));
1749 sampler->state[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(pCreateInfo->minLod, 0, 15), 8)) |
1750 S_008F34_MAX_LOD(S_FIXED(CLAMP(pCreateInfo->maxLod, 0, 15), 8)));
1751 sampler->state[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) |
1752 S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo->magFilter, max_aniso)) |
1753 S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) |
1754 S_008F38_MIP_FILTER(radv_tex_mipfilter(pCreateInfo->mipmapMode)) |
1755 S_008F38_MIP_POINT_PRECLAMP(1) |
1756 S_008F38_DISABLE_LSB_CEIL(1) |
1757 S_008F38_FILTER_PREC_FIX(1) |
1758 S_008F38_ANISO_OVERRIDE(is_vi));
1759 sampler->state[3] = (S_008F3C_BORDER_COLOR_PTR(0) |
1760 S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(pCreateInfo->borderColor)));
1761 }
1762
1763 VkResult radv_CreateSampler(
1764 VkDevice _device,
1765 const VkSamplerCreateInfo* pCreateInfo,
1766 const VkAllocationCallbacks* pAllocator,
1767 VkSampler* pSampler)
1768 {
1769 RADV_FROM_HANDLE(radv_device, device, _device);
1770 struct radv_sampler *sampler;
1771
1772 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
1773
1774 sampler = vk_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
1775 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1776 if (!sampler)
1777 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1778
1779 radv_init_sampler(device, sampler, pCreateInfo);
1780 *pSampler = radv_sampler_to_handle(sampler);
1781
1782 return VK_SUCCESS;
1783 }
1784
1785 void radv_DestroySampler(
1786 VkDevice _device,
1787 VkSampler _sampler,
1788 const VkAllocationCallbacks* pAllocator)
1789 {
1790 RADV_FROM_HANDLE(radv_device, device, _device);
1791 RADV_FROM_HANDLE(radv_sampler, sampler, _sampler);
1792
1793 if (!sampler)
1794 return;
1795 vk_free2(&device->alloc, pAllocator, sampler);
1796 }