radv: fix memory leaks in radv_load_meta_pipeline()
[mesa.git] / src / amd / vulkan / radv_meta.c
1 /*
2 * Copyright © 2016 Red Hat
3 * based on intel anv code:
4 * Copyright © 2015 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 */
25
26 #include "radv_meta.h"
27
28 #include <fcntl.h>
29 #include <limits.h>
30 #include <pwd.h>
31 #include <sys/stat.h>
32
33 void
34 radv_meta_save(struct radv_meta_saved_state *state,
35 struct radv_cmd_buffer *cmd_buffer, uint32_t flags)
36 {
37 VkPipelineBindPoint bind_point =
38 flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
39 VK_PIPELINE_BIND_POINT_GRAPHICS :
40 VK_PIPELINE_BIND_POINT_COMPUTE;
41 struct radv_descriptor_state *descriptors_state =
42 radv_get_descriptors_state(cmd_buffer, bind_point);
43
44 assert(flags & (RADV_META_SAVE_GRAPHICS_PIPELINE |
45 RADV_META_SAVE_COMPUTE_PIPELINE));
46
47 state->flags = flags;
48
49 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
50 assert(!(state->flags & RADV_META_SAVE_COMPUTE_PIPELINE));
51
52 state->old_pipeline = cmd_buffer->state.pipeline;
53
54 /* Save all viewports. */
55 state->viewport.count = cmd_buffer->state.dynamic.viewport.count;
56 typed_memcpy(state->viewport.viewports,
57 cmd_buffer->state.dynamic.viewport.viewports,
58 MAX_VIEWPORTS);
59
60 /* Save all scissors. */
61 state->scissor.count = cmd_buffer->state.dynamic.scissor.count;
62 typed_memcpy(state->scissor.scissors,
63 cmd_buffer->state.dynamic.scissor.scissors,
64 MAX_SCISSORS);
65
66 /* The most common meta operations all want to have the
67 * viewport reset and any scissors disabled. The rest of the
68 * dynamic state should have no effect.
69 */
70 cmd_buffer->state.dynamic.viewport.count = 0;
71 cmd_buffer->state.dynamic.scissor.count = 0;
72 cmd_buffer->state.dirty |= 1 << VK_DYNAMIC_STATE_VIEWPORT |
73 1 << VK_DYNAMIC_STATE_SCISSOR;
74 }
75
76 if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
77 assert(!(state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE));
78
79 state->old_pipeline = cmd_buffer->state.compute_pipeline;
80 }
81
82 if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
83 state->old_descriptor_set0 = descriptors_state->sets[0];
84 if (!state->old_descriptor_set0)
85 state->flags &= ~RADV_META_SAVE_DESCRIPTORS;
86 }
87
88 if (state->flags & RADV_META_SAVE_CONSTANTS) {
89 memcpy(state->push_constants, cmd_buffer->push_constants,
90 MAX_PUSH_CONSTANTS_SIZE);
91 }
92
93 if (state->flags & RADV_META_SAVE_PASS) {
94 state->pass = cmd_buffer->state.pass;
95 state->subpass = cmd_buffer->state.subpass;
96 state->framebuffer = cmd_buffer->state.framebuffer;
97 state->attachments = cmd_buffer->state.attachments;
98 state->render_area = cmd_buffer->state.render_area;
99 }
100 }
101
102 void
103 radv_meta_restore(const struct radv_meta_saved_state *state,
104 struct radv_cmd_buffer *cmd_buffer)
105 {
106 VkPipelineBindPoint bind_point =
107 state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
108 VK_PIPELINE_BIND_POINT_GRAPHICS :
109 VK_PIPELINE_BIND_POINT_COMPUTE;
110
111 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
112 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
113 VK_PIPELINE_BIND_POINT_GRAPHICS,
114 radv_pipeline_to_handle(state->old_pipeline));
115
116 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE;
117
118 /* Restore all viewports. */
119 cmd_buffer->state.dynamic.viewport.count = state->viewport.count;
120 typed_memcpy(cmd_buffer->state.dynamic.viewport.viewports,
121 state->viewport.viewports,
122 MAX_VIEWPORTS);
123
124 /* Restore all scissors. */
125 cmd_buffer->state.dynamic.scissor.count = state->scissor.count;
126 typed_memcpy(cmd_buffer->state.dynamic.scissor.scissors,
127 state->scissor.scissors,
128 MAX_SCISSORS);
129
130 cmd_buffer->state.dirty |= 1 << VK_DYNAMIC_STATE_VIEWPORT |
131 1 << VK_DYNAMIC_STATE_SCISSOR;
132 }
133
134 if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
135 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
136 VK_PIPELINE_BIND_POINT_COMPUTE,
137 radv_pipeline_to_handle(state->old_pipeline));
138 }
139
140 if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
141 radv_set_descriptor_set(cmd_buffer, bind_point,
142 state->old_descriptor_set0, 0);
143 }
144
145 if (state->flags & RADV_META_SAVE_CONSTANTS) {
146 memcpy(cmd_buffer->push_constants, state->push_constants,
147 MAX_PUSH_CONSTANTS_SIZE);
148 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT;
149
150 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
151 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_ALL_GRAPHICS;
152 }
153 }
154
155 if (state->flags & RADV_META_SAVE_PASS) {
156 cmd_buffer->state.pass = state->pass;
157 cmd_buffer->state.subpass = state->subpass;
158 cmd_buffer->state.framebuffer = state->framebuffer;
159 cmd_buffer->state.attachments = state->attachments;
160 cmd_buffer->state.render_area = state->render_area;
161 if (state->subpass)
162 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER;
163 }
164 }
165
166 VkImageViewType
167 radv_meta_get_view_type(const struct radv_image *image)
168 {
169 switch (image->type) {
170 case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D;
171 case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D;
172 case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D;
173 default:
174 unreachable("bad VkImageViewType");
175 }
176 }
177
178 /**
179 * When creating a destination VkImageView, this function provides the needed
180 * VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
181 */
182 uint32_t
183 radv_meta_get_iview_layer(const struct radv_image *dest_image,
184 const VkImageSubresourceLayers *dest_subresource,
185 const VkOffset3D *dest_offset)
186 {
187 switch (dest_image->type) {
188 case VK_IMAGE_TYPE_1D:
189 case VK_IMAGE_TYPE_2D:
190 return dest_subresource->baseArrayLayer;
191 case VK_IMAGE_TYPE_3D:
192 /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
193 * but meta does it anyway. When doing so, we translate the
194 * destination's z offset into an array offset.
195 */
196 return dest_offset->z;
197 default:
198 assert(!"bad VkImageType");
199 return 0;
200 }
201 }
202
203 static void *
204 meta_alloc(void* _device, size_t size, size_t alignment,
205 VkSystemAllocationScope allocationScope)
206 {
207 struct radv_device *device = _device;
208 return device->alloc.pfnAllocation(device->alloc.pUserData, size, alignment,
209 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
210 }
211
212 static void *
213 meta_realloc(void* _device, void *original, size_t size, size_t alignment,
214 VkSystemAllocationScope allocationScope)
215 {
216 struct radv_device *device = _device;
217 return device->alloc.pfnReallocation(device->alloc.pUserData, original,
218 size, alignment,
219 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
220 }
221
222 static void
223 meta_free(void* _device, void *data)
224 {
225 struct radv_device *device = _device;
226 return device->alloc.pfnFree(device->alloc.pUserData, data);
227 }
228
229 static bool
230 radv_builtin_cache_path(char *path)
231 {
232 char *xdg_cache_home = getenv("XDG_CACHE_HOME");
233 const char *suffix = "/radv_builtin_shaders";
234 const char *suffix2 = "/.cache/radv_builtin_shaders";
235 struct passwd pwd, *result;
236 char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
237
238 if (xdg_cache_home) {
239
240 if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX)
241 return false;
242
243 strcpy(path, xdg_cache_home);
244 strcat(path, suffix);
245 return true;
246 }
247
248 getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
249 if (!result)
250 return false;
251
252 strcpy(path, pwd.pw_dir);
253 strcat(path, "/.cache");
254 mkdir(path, 0755);
255
256 strcat(path, suffix);
257 return true;
258 }
259
260 static bool
261 radv_load_meta_pipeline(struct radv_device *device)
262 {
263 char path[PATH_MAX + 1];
264 struct stat st;
265 void *data = NULL;
266 bool ret = false;
267
268 if (!radv_builtin_cache_path(path))
269 return false;
270
271 int fd = open(path, O_RDONLY);
272 if (fd < 0)
273 return false;
274 if (fstat(fd, &st))
275 goto fail;
276 data = malloc(st.st_size);
277 if (!data)
278 goto fail;
279 if(read(fd, data, st.st_size) == -1)
280 goto fail;
281
282 ret = radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
283 fail:
284 free(data);
285 close(fd);
286 return ret;
287 }
288
289 static void
290 radv_store_meta_pipeline(struct radv_device *device)
291 {
292 char path[PATH_MAX + 1], path2[PATH_MAX + 7];
293 size_t size;
294 void *data = NULL;
295
296 if (!device->meta_state.cache.modified)
297 return;
298
299 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
300 radv_pipeline_cache_to_handle(&device->meta_state.cache),
301 &size, NULL))
302 return;
303
304 if (!radv_builtin_cache_path(path))
305 return;
306
307 strcpy(path2, path);
308 strcat(path2, "XXXXXX");
309 int fd = mkstemp(path2);//open(path, O_WRONLY | O_CREAT, 0600);
310 if (fd < 0)
311 return;
312 data = malloc(size);
313 if (!data)
314 goto fail;
315
316 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
317 radv_pipeline_cache_to_handle(&device->meta_state.cache),
318 &size, data))
319 goto fail;
320 if(write(fd, data, size) == -1)
321 goto fail;
322
323 rename(path2, path);
324 fail:
325 free(data);
326 close(fd);
327 unlink(path2);
328 }
329
330 VkResult
331 radv_device_init_meta(struct radv_device *device)
332 {
333 VkResult result;
334
335 memset(&device->meta_state, 0, sizeof(device->meta_state));
336
337 device->meta_state.alloc = (VkAllocationCallbacks) {
338 .pUserData = device,
339 .pfnAllocation = meta_alloc,
340 .pfnReallocation = meta_realloc,
341 .pfnFree = meta_free,
342 };
343
344 device->meta_state.cache.alloc = device->meta_state.alloc;
345 radv_pipeline_cache_init(&device->meta_state.cache, device);
346 bool loaded_cache = radv_load_meta_pipeline(device);
347 bool on_demand = !loaded_cache;
348
349 mtx_init(&device->meta_state.mtx, mtx_plain);
350
351 result = radv_device_init_meta_clear_state(device, on_demand);
352 if (result != VK_SUCCESS)
353 goto fail_clear;
354
355 result = radv_device_init_meta_resolve_state(device, on_demand);
356 if (result != VK_SUCCESS)
357 goto fail_resolve;
358
359 result = radv_device_init_meta_blit_state(device, on_demand);
360 if (result != VK_SUCCESS)
361 goto fail_blit;
362
363 result = radv_device_init_meta_blit2d_state(device, on_demand);
364 if (result != VK_SUCCESS)
365 goto fail_blit2d;
366
367 result = radv_device_init_meta_bufimage_state(device);
368 if (result != VK_SUCCESS)
369 goto fail_bufimage;
370
371 result = radv_device_init_meta_depth_decomp_state(device, on_demand);
372 if (result != VK_SUCCESS)
373 goto fail_depth_decomp;
374
375 result = radv_device_init_meta_buffer_state(device);
376 if (result != VK_SUCCESS)
377 goto fail_buffer;
378
379 result = radv_device_init_meta_query_state(device, on_demand);
380 if (result != VK_SUCCESS)
381 goto fail_query;
382
383 result = radv_device_init_meta_fast_clear_flush_state(device, on_demand);
384 if (result != VK_SUCCESS)
385 goto fail_fast_clear;
386
387 result = radv_device_init_meta_resolve_compute_state(device, on_demand);
388 if (result != VK_SUCCESS)
389 goto fail_resolve_compute;
390
391 result = radv_device_init_meta_resolve_fragment_state(device, on_demand);
392 if (result != VK_SUCCESS)
393 goto fail_resolve_fragment;
394 return VK_SUCCESS;
395
396 fail_resolve_fragment:
397 radv_device_finish_meta_resolve_compute_state(device);
398 fail_resolve_compute:
399 radv_device_finish_meta_fast_clear_flush_state(device);
400 fail_fast_clear:
401 radv_device_finish_meta_query_state(device);
402 fail_query:
403 radv_device_finish_meta_buffer_state(device);
404 fail_buffer:
405 radv_device_finish_meta_depth_decomp_state(device);
406 fail_depth_decomp:
407 radv_device_finish_meta_bufimage_state(device);
408 fail_bufimage:
409 radv_device_finish_meta_blit2d_state(device);
410 fail_blit2d:
411 radv_device_finish_meta_blit_state(device);
412 fail_blit:
413 radv_device_finish_meta_resolve_state(device);
414 fail_resolve:
415 radv_device_finish_meta_clear_state(device);
416 fail_clear:
417 mtx_destroy(&device->meta_state.mtx);
418 radv_pipeline_cache_finish(&device->meta_state.cache);
419 return result;
420 }
421
422 void
423 radv_device_finish_meta(struct radv_device *device)
424 {
425 radv_device_finish_meta_clear_state(device);
426 radv_device_finish_meta_resolve_state(device);
427 radv_device_finish_meta_blit_state(device);
428 radv_device_finish_meta_blit2d_state(device);
429 radv_device_finish_meta_bufimage_state(device);
430 radv_device_finish_meta_depth_decomp_state(device);
431 radv_device_finish_meta_query_state(device);
432 radv_device_finish_meta_buffer_state(device);
433 radv_device_finish_meta_fast_clear_flush_state(device);
434 radv_device_finish_meta_resolve_compute_state(device);
435 radv_device_finish_meta_resolve_fragment_state(device);
436
437 radv_store_meta_pipeline(device);
438 radv_pipeline_cache_finish(&device->meta_state.cache);
439 mtx_destroy(&device->meta_state.mtx);
440 }
441
442 nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)
443 {
444
445 nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(vs_b->shader, nir_intrinsic_load_vertex_id_zero_base);
446 nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid");
447 nir_builder_instr_insert(vs_b, &vertex_id->instr);
448
449 /* vertex 0 - -1.0, -1.0 */
450 /* vertex 1 - -1.0, 1.0 */
451 /* vertex 2 - 1.0, -1.0 */
452 /* so channel 0 is vertex_id != 2 ? -1.0 : 1.0
453 channel 1 is vertex id != 1 ? -1.0 : 1.0 */
454
455 nir_ssa_def *c0cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
456 nir_imm_int(vs_b, 2));
457 nir_ssa_def *c1cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
458 nir_imm_int(vs_b, 1));
459
460 nir_ssa_def *comp[4];
461 comp[0] = nir_bcsel(vs_b, c0cmp,
462 nir_imm_float(vs_b, -1.0),
463 nir_imm_float(vs_b, 1.0));
464
465 comp[1] = nir_bcsel(vs_b, c1cmp,
466 nir_imm_float(vs_b, -1.0),
467 nir_imm_float(vs_b, 1.0));
468 comp[2] = comp2;
469 comp[3] = nir_imm_float(vs_b, 1.0);
470 nir_ssa_def *outvec = nir_vec(vs_b, comp, 4);
471
472 return outvec;
473 }
474
475 nir_ssa_def *radv_meta_gen_rect_vertices(nir_builder *vs_b)
476 {
477 return radv_meta_gen_rect_vertices_comp2(vs_b, nir_imm_float(vs_b, 0.0));
478 }
479
480 /* vertex shader that generates vertices */
481 nir_shader *
482 radv_meta_build_nir_vs_generate_vertices(void)
483 {
484 const struct glsl_type *vec4 = glsl_vec4_type();
485
486 nir_builder b;
487 nir_variable *v_position;
488
489 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
490 b.shader->info.name = ralloc_strdup(b.shader, "meta_vs_gen_verts");
491
492 nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b);
493
494 v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
495 "gl_Position");
496 v_position->data.location = VARYING_SLOT_POS;
497
498 nir_store_var(&b, v_position, outvec, 0xf);
499
500 return b.shader;
501 }
502
503 nir_shader *
504 radv_meta_build_nir_fs_noop(void)
505 {
506 nir_builder b;
507
508 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
509 b.shader->info.name = ralloc_asprintf(b.shader,
510 "meta_noop_fs");
511
512 return b.shader;
513 }
514
515 void radv_meta_build_resolve_shader_core(nir_builder *b,
516 bool is_integer,
517 int samples,
518 nir_variable *input_img,
519 nir_variable *color,
520 nir_ssa_def *img_coord)
521 {
522 /* do a txf_ms on each sample */
523 nir_ssa_def *tmp;
524 nir_if *outer_if = NULL;
525
526 nir_ssa_def *input_img_deref = &nir_build_deref_var(b, input_img)->dest.ssa;
527
528 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 3);
529 tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
530 tex->op = nir_texop_txf_ms;
531 tex->src[0].src_type = nir_tex_src_coord;
532 tex->src[0].src = nir_src_for_ssa(img_coord);
533 tex->src[1].src_type = nir_tex_src_ms_index;
534 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
535 tex->src[2].src_type = nir_tex_src_texture_deref;
536 tex->src[2].src = nir_src_for_ssa(input_img_deref);
537 tex->dest_type = nir_type_float;
538 tex->is_array = false;
539 tex->coord_components = 2;
540
541 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
542 nir_builder_instr_insert(b, &tex->instr);
543
544 tmp = &tex->dest.ssa;
545
546 if (!is_integer && samples > 1) {
547 nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 2);
548 tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
549 tex_all_same->op = nir_texop_samples_identical;
550 tex_all_same->src[0].src_type = nir_tex_src_coord;
551 tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
552 tex_all_same->src[1].src_type = nir_tex_src_texture_deref;
553 tex_all_same->src[1].src = nir_src_for_ssa(input_img_deref);
554 tex_all_same->dest_type = nir_type_float;
555 tex_all_same->is_array = false;
556 tex_all_same->coord_components = 2;
557
558 nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex");
559 nir_builder_instr_insert(b, &tex_all_same->instr);
560
561 nir_ssa_def *all_same = nir_ieq(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0));
562 nir_if *if_stmt = nir_if_create(b->shader);
563 if_stmt->condition = nir_src_for_ssa(all_same);
564 nir_cf_node_insert(b->cursor, &if_stmt->cf_node);
565
566 b->cursor = nir_after_cf_list(&if_stmt->then_list);
567 for (int i = 1; i < samples; i++) {
568 nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 3);
569 tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
570 tex_add->op = nir_texop_txf_ms;
571 tex_add->src[0].src_type = nir_tex_src_coord;
572 tex_add->src[0].src = nir_src_for_ssa(img_coord);
573 tex_add->src[1].src_type = nir_tex_src_ms_index;
574 tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i));
575 tex_add->src[2].src_type = nir_tex_src_texture_deref;
576 tex_add->src[2].src = nir_src_for_ssa(input_img_deref);
577 tex_add->dest_type = nir_type_float;
578 tex_add->is_array = false;
579 tex_add->coord_components = 2;
580
581 nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
582 nir_builder_instr_insert(b, &tex_add->instr);
583
584 tmp = nir_fadd(b, tmp, &tex_add->dest.ssa);
585 }
586
587 tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples));
588 nir_store_var(b, color, tmp, 0xf);
589 b->cursor = nir_after_cf_list(&if_stmt->else_list);
590 outer_if = if_stmt;
591 }
592 nir_store_var(b, color, &tex->dest.ssa, 0xf);
593
594 if (outer_if)
595 b->cursor = nir_after_cf_node(&outer_if->cf_node);
596 }