radv/meta: refactor out some common shaders.
[mesa.git] / src / amd / vulkan / radv_meta_decompress.c
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26
27 #include "radv_meta.h"
28 #include "radv_private.h"
29 #include "sid.h"
30
31 static VkResult
32 create_pass(struct radv_device *device)
33 {
34 VkResult result;
35 VkDevice device_h = radv_device_to_handle(device);
36 const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
37 VkAttachmentDescription attachment;
38
39 attachment.format = VK_FORMAT_UNDEFINED;
40 attachment.samples = 1;
41 attachment.loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
42 attachment.storeOp = VK_ATTACHMENT_STORE_OP_STORE;
43 attachment.initialLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
44 attachment.finalLayout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL;
45
46 result = radv_CreateRenderPass(device_h,
47 &(VkRenderPassCreateInfo) {
48 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
49 .attachmentCount = 1,
50 .pAttachments = &attachment,
51 .subpassCount = 1,
52 .pSubpasses = &(VkSubpassDescription) {
53 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
54 .inputAttachmentCount = 0,
55 .colorAttachmentCount = 0,
56 .pColorAttachments = NULL,
57 .pResolveAttachments = NULL,
58 .pDepthStencilAttachment = &(VkAttachmentReference) {
59 .attachment = 0,
60 .layout = VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL,
61 },
62 .preserveAttachmentCount = 0,
63 .pPreserveAttachments = NULL,
64 },
65 .dependencyCount = 0,
66 },
67 alloc,
68 &device->meta_state.depth_decomp.pass);
69
70 return result;
71 }
72
73 static VkResult
74 create_pipeline(struct radv_device *device,
75 VkShaderModule vs_module_h)
76 {
77 VkResult result;
78 VkDevice device_h = radv_device_to_handle(device);
79
80 struct radv_shader_module fs_module = {
81 .nir = radv_meta_build_nir_fs_noop(),
82 };
83
84 if (!fs_module.nir) {
85 /* XXX: Need more accurate error */
86 result = VK_ERROR_OUT_OF_HOST_MEMORY;
87 goto cleanup;
88 }
89
90 const VkGraphicsPipelineCreateInfo pipeline_create_info = {
91 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
92 .stageCount = 2,
93 .pStages = (VkPipelineShaderStageCreateInfo[]) {
94 {
95 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
96 .stage = VK_SHADER_STAGE_VERTEX_BIT,
97 .module = vs_module_h,
98 .pName = "main",
99 },
100 {
101 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
102 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
103 .module = radv_shader_module_to_handle(&fs_module),
104 .pName = "main",
105 },
106 },
107 .pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) {
108 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
109 .vertexBindingDescriptionCount = 0,
110 .vertexAttributeDescriptionCount = 0,
111 },
112 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
113 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
114 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
115 .primitiveRestartEnable = false,
116 },
117 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
118 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
119 .viewportCount = 1,
120 .scissorCount = 1,
121 },
122 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
123 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
124 .depthClampEnable = false,
125 .rasterizerDiscardEnable = false,
126 .polygonMode = VK_POLYGON_MODE_FILL,
127 .cullMode = VK_CULL_MODE_NONE,
128 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
129 },
130 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
131 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
132 .rasterizationSamples = 1,
133 .sampleShadingEnable = false,
134 .pSampleMask = NULL,
135 .alphaToCoverageEnable = false,
136 .alphaToOneEnable = false,
137 },
138 .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
139 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
140 .logicOpEnable = false,
141 .attachmentCount = 0,
142 .pAttachments = NULL,
143 },
144 .pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
145 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
146 .depthTestEnable = false,
147 .depthWriteEnable = false,
148 .depthBoundsTestEnable = false,
149 .stencilTestEnable = false,
150 },
151 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
152 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
153 .dynamicStateCount = 2,
154 .pDynamicStates = (VkDynamicState[]) {
155 VK_DYNAMIC_STATE_VIEWPORT,
156 VK_DYNAMIC_STATE_SCISSOR,
157 },
158 },
159 .renderPass = device->meta_state.depth_decomp.pass,
160 .subpass = 0,
161 };
162
163 result = radv_graphics_pipeline_create(device_h,
164 radv_pipeline_cache_to_handle(&device->meta_state.cache),
165 &pipeline_create_info,
166 &(struct radv_graphics_pipeline_create_info) {
167 .use_rectlist = true,
168 .db_flush_depth_inplace = true,
169 .db_flush_stencil_inplace = true,
170 },
171 &device->meta_state.alloc,
172 &device->meta_state.depth_decomp.decompress_pipeline);
173 if (result != VK_SUCCESS)
174 goto cleanup;
175
176 result = radv_graphics_pipeline_create(device_h,
177 radv_pipeline_cache_to_handle(&device->meta_state.cache),
178 &pipeline_create_info,
179 &(struct radv_graphics_pipeline_create_info) {
180 .use_rectlist = true,
181 .db_flush_depth_inplace = true,
182 .db_flush_stencil_inplace = true,
183 .db_resummarize = true,
184 },
185 &device->meta_state.alloc,
186 &device->meta_state.depth_decomp.resummarize_pipeline);
187 if (result != VK_SUCCESS)
188 goto cleanup;
189
190 goto cleanup;
191
192 cleanup:
193 ralloc_free(fs_module.nir);
194 return result;
195 }
196
197 void
198 radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
199 {
200 struct radv_meta_state *state = &device->meta_state;
201 VkDevice device_h = radv_device_to_handle(device);
202 VkRenderPass pass_h = device->meta_state.depth_decomp.pass;
203 const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
204
205 if (pass_h)
206 radv_DestroyRenderPass(device_h, pass_h,
207 &device->meta_state.alloc);
208
209 VkPipeline pipeline_h = state->depth_decomp.decompress_pipeline;
210 if (pipeline_h) {
211 radv_DestroyPipeline(device_h, pipeline_h, alloc);
212 }
213 pipeline_h = state->depth_decomp.resummarize_pipeline;
214 if (pipeline_h) {
215 radv_DestroyPipeline(device_h, pipeline_h, alloc);
216 }
217 }
218
219 VkResult
220 radv_device_init_meta_depth_decomp_state(struct radv_device *device)
221 {
222 VkResult res = VK_SUCCESS;
223
224 zero(device->meta_state.depth_decomp);
225
226 struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
227 if (!vs_module.nir) {
228 /* XXX: Need more accurate error */
229 res = VK_ERROR_OUT_OF_HOST_MEMORY;
230 goto fail;
231 }
232
233 res = create_pass(device);
234 if (res != VK_SUCCESS)
235 goto fail;
236
237 VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
238 res = create_pipeline(device, vs_module_h);
239 if (res != VK_SUCCESS)
240 goto fail;
241
242 goto cleanup;
243
244 fail:
245 radv_device_finish_meta_depth_decomp_state(device);
246
247 cleanup:
248 ralloc_free(vs_module.nir);
249
250 return res;
251 }
252
253 static void
254 emit_depth_decomp(struct radv_cmd_buffer *cmd_buffer,
255 const VkOffset2D *dest_offset,
256 const VkExtent2D *depth_decomp_extent,
257 VkPipeline pipeline_h)
258 {
259 VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
260
261 RADV_FROM_HANDLE(radv_pipeline, pipeline, pipeline_h);
262
263 if (cmd_buffer->state.pipeline != pipeline) {
264 radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
265 pipeline_h);
266 }
267
268 radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
269 .x = dest_offset->x,
270 .y = dest_offset->y,
271 .width = depth_decomp_extent->width,
272 .height = depth_decomp_extent->height,
273 .minDepth = 0.0f,
274 .maxDepth = 1.0f
275 });
276
277 radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkRect2D) {
278 .offset = *dest_offset,
279 .extent = *depth_decomp_extent,
280 });
281
282 radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
283 }
284
285
286 static void radv_process_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
287 struct radv_image *image,
288 VkImageSubresourceRange *subresourceRange,
289 VkPipeline pipeline_h)
290 {
291 struct radv_meta_saved_state saved_state;
292 struct radv_meta_saved_pass_state saved_pass_state;
293 VkDevice device_h = radv_device_to_handle(cmd_buffer->device);
294 VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
295 uint32_t width = radv_minify(image->extent.width,
296 subresourceRange->baseMipLevel);
297 uint32_t height = radv_minify(image->extent.height,
298 subresourceRange->baseMipLevel);
299
300 if (!image->surface.htile_size)
301 return;
302 radv_meta_save_pass(&saved_pass_state, cmd_buffer);
303
304 radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer);
305
306 for (uint32_t layer = 0; layer < radv_get_layerCount(image, subresourceRange); layer++) {
307 struct radv_image_view iview;
308
309 radv_image_view_init(&iview, cmd_buffer->device,
310 &(VkImageViewCreateInfo) {
311 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
312 .image = radv_image_to_handle(image),
313 .format = image->vk_format,
314 .subresourceRange = {
315 .aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT,
316 .baseMipLevel = subresourceRange->baseMipLevel,
317 .levelCount = 1,
318 .baseArrayLayer = subresourceRange->baseArrayLayer + layer,
319 .layerCount = 1,
320 },
321 },
322 cmd_buffer, VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT);
323
324
325 VkFramebuffer fb_h;
326 radv_CreateFramebuffer(device_h,
327 &(VkFramebufferCreateInfo) {
328 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
329 .attachmentCount = 1,
330 .pAttachments = (VkImageView[]) {
331 radv_image_view_to_handle(&iview)
332 },
333 .width = width,
334 .height = height,
335 .layers = 1
336 },
337 &cmd_buffer->pool->alloc,
338 &fb_h);
339
340 radv_CmdBeginRenderPass(cmd_buffer_h,
341 &(VkRenderPassBeginInfo) {
342 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
343 .renderPass = cmd_buffer->device->meta_state.depth_decomp.pass,
344 .framebuffer = fb_h,
345 .renderArea = {
346 .offset = {
347 0,
348 0,
349 },
350 .extent = {
351 width,
352 height,
353 }
354 },
355 .clearValueCount = 0,
356 .pClearValues = NULL,
357 },
358 VK_SUBPASS_CONTENTS_INLINE);
359
360 emit_depth_decomp(cmd_buffer, &(VkOffset2D){0, 0 }, &(VkExtent2D){width, height}, pipeline_h);
361 radv_CmdEndRenderPass(cmd_buffer_h);
362
363 radv_DestroyFramebuffer(device_h, fb_h,
364 &cmd_buffer->pool->alloc);
365 }
366 radv_meta_restore(&saved_state, cmd_buffer);
367 radv_meta_restore_pass(&saved_pass_state, cmd_buffer);
368 }
369
370 void radv_decompress_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
371 struct radv_image *image,
372 VkImageSubresourceRange *subresourceRange)
373 {
374 assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
375 radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange,
376 cmd_buffer->device->meta_state.depth_decomp.decompress_pipeline);
377 }
378
379 void radv_resummarize_depth_image_inplace(struct radv_cmd_buffer *cmd_buffer,
380 struct radv_image *image,
381 VkImageSubresourceRange *subresourceRange)
382 {
383 assert(cmd_buffer->queue_family_index == RADV_QUEUE_GENERAL);
384 radv_process_depth_image_inplace(cmd_buffer, image, subresourceRange,
385 cmd_buffer->device->meta_state.depth_decomp.resummarize_pipeline);
386 }