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[mesa.git] / src / amd / vulkan / radv_meta_resolve.c
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26
27 #include "radv_meta.h"
28 #include "radv_private.h"
29 #include "vk_format.h"
30 #include "nir/nir_builder.h"
31 #include "sid.h"
32
33 /* emit 0, 0, 0, 1 */
34 static nir_shader *
35 build_nir_fs(void)
36 {
37 const struct glsl_type *vec4 = glsl_vec4_type();
38 nir_builder b;
39 nir_variable *f_color; /* vec4, fragment output color */
40
41 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
42 b.shader->info.name = ralloc_asprintf(b.shader,
43 "meta_resolve_fs");
44
45 f_color = nir_variable_create(b.shader, nir_var_shader_out, vec4,
46 "f_color");
47 f_color->data.location = FRAG_RESULT_DATA0;
48 nir_store_var(&b, f_color, nir_imm_vec4(&b, 0.0, 0.0, 0.0, 1.0), 0xf);
49
50 return b.shader;
51 }
52
53 static VkResult
54 create_pass(struct radv_device *device, VkFormat vk_format, VkRenderPass *pass)
55 {
56 VkResult result;
57 VkDevice device_h = radv_device_to_handle(device);
58 const VkAllocationCallbacks *alloc = &device->meta_state.alloc;
59 VkAttachmentDescription attachments[2];
60 int i;
61
62 for (i = 0; i < 2; i++) {
63 attachments[i].format = vk_format;
64 attachments[i].samples = 1;
65 attachments[i].loadOp = VK_ATTACHMENT_LOAD_OP_LOAD;
66 attachments[i].storeOp = VK_ATTACHMENT_STORE_OP_STORE;
67 }
68 attachments[0].initialLayout = VK_IMAGE_LAYOUT_GENERAL;
69 attachments[0].finalLayout = VK_IMAGE_LAYOUT_GENERAL;
70 attachments[1].initialLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
71 attachments[1].finalLayout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
72
73 result = radv_CreateRenderPass(device_h,
74 &(VkRenderPassCreateInfo) {
75 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
76 .attachmentCount = 2,
77 .pAttachments = attachments,
78 .subpassCount = 1,
79 .pSubpasses = &(VkSubpassDescription) {
80 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
81 .inputAttachmentCount = 0,
82 .colorAttachmentCount = 2,
83 .pColorAttachments = (VkAttachmentReference[]) {
84 {
85 .attachment = 0,
86 .layout = VK_IMAGE_LAYOUT_GENERAL,
87 },
88 {
89 .attachment = 1,
90 .layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL,
91 },
92 },
93 .pResolveAttachments = NULL,
94 .pDepthStencilAttachment = &(VkAttachmentReference) {
95 .attachment = VK_ATTACHMENT_UNUSED,
96 },
97 .preserveAttachmentCount = 0,
98 .pPreserveAttachments = NULL,
99 },
100 .dependencyCount = 0,
101 },
102 alloc,
103 pass);
104
105 return result;
106 }
107
108 static VkResult
109 create_pipeline(struct radv_device *device,
110 VkShaderModule vs_module_h,
111 VkPipeline *pipeline,
112 VkRenderPass pass)
113 {
114 VkResult result;
115 VkDevice device_h = radv_device_to_handle(device);
116
117 struct radv_shader_module fs_module = {
118 .nir = build_nir_fs(),
119 };
120
121 if (!fs_module.nir) {
122 /* XXX: Need more accurate error */
123 result = VK_ERROR_OUT_OF_HOST_MEMORY;
124 goto cleanup;
125 }
126
127 VkPipelineLayoutCreateInfo pl_create_info = {
128 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
129 .setLayoutCount = 0,
130 .pSetLayouts = NULL,
131 .pushConstantRangeCount = 0,
132 .pPushConstantRanges = NULL,
133 };
134
135 if (!device->meta_state.resolve.p_layout) {
136 result = radv_CreatePipelineLayout(radv_device_to_handle(device),
137 &pl_create_info,
138 &device->meta_state.alloc,
139 &device->meta_state.resolve.p_layout);
140 if (result != VK_SUCCESS)
141 goto cleanup;
142 }
143
144 result = radv_graphics_pipeline_create(device_h,
145 radv_pipeline_cache_to_handle(&device->meta_state.cache),
146 &(VkGraphicsPipelineCreateInfo) {
147 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
148 .stageCount = 2,
149 .pStages = (VkPipelineShaderStageCreateInfo[]) {
150 {
151 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
152 .stage = VK_SHADER_STAGE_VERTEX_BIT,
153 .module = vs_module_h,
154 .pName = "main",
155 },
156 {
157 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
158 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
159 .module = radv_shader_module_to_handle(&fs_module),
160 .pName = "main",
161 },
162 },
163 .pVertexInputState = &(VkPipelineVertexInputStateCreateInfo) {
164 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
165 .vertexBindingDescriptionCount = 0,
166 .vertexAttributeDescriptionCount = 0,
167 },
168 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
169 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
170 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
171 .primitiveRestartEnable = false,
172 },
173 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
174 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
175 .viewportCount = 1,
176 .scissorCount = 1,
177 },
178 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
179 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
180 .depthClampEnable = false,
181 .rasterizerDiscardEnable = false,
182 .polygonMode = VK_POLYGON_MODE_FILL,
183 .cullMode = VK_CULL_MODE_NONE,
184 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
185 },
186 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
187 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
188 .rasterizationSamples = 1,
189 .sampleShadingEnable = false,
190 .pSampleMask = NULL,
191 .alphaToCoverageEnable = false,
192 .alphaToOneEnable = false,
193 },
194 .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
195 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
196 .logicOpEnable = false,
197 .attachmentCount = 2,
198 .pAttachments = (VkPipelineColorBlendAttachmentState []) {
199 {
200 .colorWriteMask = VK_COLOR_COMPONENT_R_BIT |
201 VK_COLOR_COMPONENT_G_BIT |
202 VK_COLOR_COMPONENT_B_BIT |
203 VK_COLOR_COMPONENT_A_BIT,
204 },
205 {
206 .colorWriteMask = 0,
207
208 }
209 },
210 },
211 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
212 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
213 .dynamicStateCount = 2,
214 .pDynamicStates = (VkDynamicState[]) {
215 VK_DYNAMIC_STATE_VIEWPORT,
216 VK_DYNAMIC_STATE_SCISSOR,
217 },
218 },
219 .layout = device->meta_state.resolve.p_layout,
220 .renderPass = pass,
221 .subpass = 0,
222 },
223 &(struct radv_graphics_pipeline_create_info) {
224 .use_rectlist = true,
225 .custom_blend_mode = V_028808_CB_RESOLVE,
226 },
227 &device->meta_state.alloc, pipeline);
228 if (result != VK_SUCCESS)
229 goto cleanup;
230
231 goto cleanup;
232
233 cleanup:
234 ralloc_free(fs_module.nir);
235 return result;
236 }
237
238 void
239 radv_device_finish_meta_resolve_state(struct radv_device *device)
240 {
241 struct radv_meta_state *state = &device->meta_state;
242
243 for (uint32_t j = 0; j < NUM_META_FS_KEYS; j++) {
244 radv_DestroyRenderPass(radv_device_to_handle(device),
245 state->resolve.pass[j], &state->alloc);
246 radv_DestroyPipeline(radv_device_to_handle(device),
247 state->resolve.pipeline[j], &state->alloc);
248 }
249 radv_DestroyPipelineLayout(radv_device_to_handle(device),
250 state->resolve.p_layout, &state->alloc);
251
252 }
253
254 VkResult
255 radv_device_init_meta_resolve_state(struct radv_device *device, bool on_demand)
256 {
257 if (on_demand)
258 return VK_SUCCESS;
259
260 VkResult res = VK_SUCCESS;
261 struct radv_meta_state *state = &device->meta_state;
262 struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
263 if (!vs_module.nir) {
264 /* XXX: Need more accurate error */
265 res = VK_ERROR_OUT_OF_HOST_MEMORY;
266 goto fail;
267 }
268
269 for (uint32_t i = 0; i < NUM_META_FS_KEYS; ++i) {
270 VkFormat format = radv_fs_key_format_exemplars[i];
271 unsigned fs_key = radv_format_meta_fs_key(format);
272 res = create_pass(device, format, &state->resolve.pass[fs_key]);
273 if (res != VK_SUCCESS)
274 goto fail;
275
276 VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
277 res = create_pipeline(device, vs_module_h,
278 &state->resolve.pipeline[fs_key], state->resolve.pass[fs_key]);
279 if (res != VK_SUCCESS)
280 goto fail;
281 }
282
283 goto cleanup;
284
285 fail:
286 radv_device_finish_meta_resolve_state(device);
287
288 cleanup:
289 ralloc_free(vs_module.nir);
290
291 return res;
292 }
293
294 static void
295 emit_resolve(struct radv_cmd_buffer *cmd_buffer,
296 VkFormat vk_format,
297 const VkOffset2D *dest_offset,
298 const VkExtent2D *resolve_extent)
299 {
300 struct radv_device *device = cmd_buffer->device;
301 VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer);
302 unsigned fs_key = radv_format_meta_fs_key(vk_format);
303
304 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
305
306 radv_CmdBindPipeline(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
307 device->meta_state.resolve.pipeline[fs_key]);
308
309 radv_CmdSetViewport(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkViewport) {
310 .x = dest_offset->x,
311 .y = dest_offset->y,
312 .width = resolve_extent->width,
313 .height = resolve_extent->height,
314 .minDepth = 0.0f,
315 .maxDepth = 1.0f
316 });
317
318 radv_CmdSetScissor(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, &(VkRect2D) {
319 .offset = *dest_offset,
320 .extent = *resolve_extent,
321 });
322
323 radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0);
324 cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
325 }
326
327 enum radv_resolve_method {
328 RESOLVE_HW,
329 RESOLVE_COMPUTE,
330 RESOLVE_FRAGMENT,
331 };
332
333 static void radv_pick_resolve_method_images(struct radv_image *src_image,
334 VkFormat src_format,
335 struct radv_image *dest_image,
336 VkImageLayout dest_image_layout,
337 struct radv_cmd_buffer *cmd_buffer,
338 enum radv_resolve_method *method)
339
340 {
341 uint32_t queue_mask = radv_image_queue_family_mask(dest_image,
342 cmd_buffer->queue_family_index,
343 cmd_buffer->queue_family_index);
344
345 if (src_format == VK_FORMAT_R16G16_UNORM ||
346 src_format == VK_FORMAT_R16G16_SNORM)
347 *method = RESOLVE_COMPUTE;
348 else if (vk_format_is_int(src_format))
349 *method = RESOLVE_COMPUTE;
350 else if (src_image->info.array_size > 1 ||
351 dest_image->info.array_size > 1)
352 *method = RESOLVE_COMPUTE;
353
354 if (radv_layout_dcc_compressed(dest_image, dest_image_layout, queue_mask)) {
355 *method = RESOLVE_FRAGMENT;
356 } else if (dest_image->planes[0].surface.micro_tile_mode !=
357 src_image->planes[0].surface.micro_tile_mode) {
358 *method = RESOLVE_COMPUTE;
359 }
360 }
361
362 static VkResult
363 build_resolve_pipeline(struct radv_device *device,
364 unsigned fs_key)
365 {
366 VkResult result = VK_SUCCESS;
367
368 if (device->meta_state.resolve.pipeline[fs_key])
369 return result;
370
371 mtx_lock(&device->meta_state.mtx);
372 if (device->meta_state.resolve.pipeline[fs_key]) {
373 mtx_unlock(&device->meta_state.mtx);
374 return result;
375 }
376
377 struct radv_shader_module vs_module = { .nir = radv_meta_build_nir_vs_generate_vertices() };
378
379 result = create_pass(device, radv_fs_key_format_exemplars[fs_key], &device->meta_state.resolve.pass[fs_key]);
380 if (result != VK_SUCCESS)
381 goto fail;
382
383 VkShaderModule vs_module_h = radv_shader_module_to_handle(&vs_module);
384 result = create_pipeline(device, vs_module_h, &device->meta_state.resolve.pipeline[fs_key], device->meta_state.resolve.pass[fs_key]);
385
386 fail:
387 ralloc_free(vs_module.nir);
388 mtx_unlock(&device->meta_state.mtx);
389 return result;
390 }
391
392 void radv_CmdResolveImage(
393 VkCommandBuffer cmd_buffer_h,
394 VkImage src_image_h,
395 VkImageLayout src_image_layout,
396 VkImage dest_image_h,
397 VkImageLayout dest_image_layout,
398 uint32_t region_count,
399 const VkImageResolve* regions)
400 {
401 RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, cmd_buffer_h);
402 RADV_FROM_HANDLE(radv_image, src_image, src_image_h);
403 RADV_FROM_HANDLE(radv_image, dest_image, dest_image_h);
404 struct radv_device *device = cmd_buffer->device;
405 struct radv_meta_saved_state saved_state;
406 VkDevice device_h = radv_device_to_handle(device);
407 enum radv_resolve_method resolve_method = RESOLVE_HW;
408 /* we can use the hw resolve only for single full resolves */
409 if (region_count == 1) {
410 if (regions[0].srcOffset.x ||
411 regions[0].srcOffset.y ||
412 regions[0].srcOffset.z)
413 resolve_method = RESOLVE_COMPUTE;
414 if (regions[0].dstOffset.x ||
415 regions[0].dstOffset.y ||
416 regions[0].dstOffset.z)
417 resolve_method = RESOLVE_COMPUTE;
418
419 if (regions[0].extent.width != src_image->info.width ||
420 regions[0].extent.height != src_image->info.height ||
421 regions[0].extent.depth != src_image->info.depth)
422 resolve_method = RESOLVE_COMPUTE;
423 } else
424 resolve_method = RESOLVE_COMPUTE;
425
426 radv_pick_resolve_method_images(src_image, src_image->vk_format,
427 dest_image, dest_image_layout,
428 cmd_buffer, &resolve_method);
429
430 if (resolve_method == RESOLVE_FRAGMENT) {
431 radv_meta_resolve_fragment_image(cmd_buffer,
432 src_image,
433 src_image_layout,
434 dest_image,
435 dest_image_layout,
436 region_count, regions);
437 return;
438 }
439
440 if (resolve_method == RESOLVE_COMPUTE) {
441 radv_meta_resolve_compute_image(cmd_buffer,
442 src_image,
443 src_image->vk_format,
444 src_image_layout,
445 dest_image,
446 dest_image->vk_format,
447 dest_image_layout,
448 region_count, regions);
449 return;
450 }
451
452 radv_meta_save(&saved_state, cmd_buffer,
453 RADV_META_SAVE_GRAPHICS_PIPELINE);
454
455 assert(src_image->info.samples > 1);
456 if (src_image->info.samples <= 1) {
457 /* this causes GPU hangs if we get past here */
458 fprintf(stderr, "radv: Illegal resolve operation (src not multisampled), will hang GPU.");
459 return;
460 }
461 assert(dest_image->info.samples == 1);
462
463 if (src_image->info.array_size > 1)
464 radv_finishme("vkCmdResolveImage: multisample array images");
465
466 unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format);
467 for (uint32_t r = 0; r < region_count; ++r) {
468 const VkImageResolve *region = &regions[r];
469
470 /* From the Vulkan 1.0 spec:
471 *
472 * - The aspectMask member of srcSubresource and dstSubresource must
473 * only contain VK_IMAGE_ASPECT_COLOR_BIT
474 *
475 * - The layerCount member of srcSubresource and dstSubresource must
476 * match
477 */
478 assert(region->srcSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
479 assert(region->dstSubresource.aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
480 assert(region->srcSubresource.layerCount ==
481 region->dstSubresource.layerCount);
482
483 const uint32_t src_base_layer =
484 radv_meta_get_iview_layer(src_image, &region->srcSubresource,
485 &region->srcOffset);
486
487 const uint32_t dest_base_layer =
488 radv_meta_get_iview_layer(dest_image, &region->dstSubresource,
489 &region->dstOffset);
490
491 /**
492 * From Vulkan 1.0.6 spec: 18.6 Resolving Multisample Images
493 *
494 * extent is the size in texels of the source image to resolve in width,
495 * height and depth. 1D images use only x and width. 2D images use x, y,
496 * width and height. 3D images use x, y, z, width, height and depth.
497 *
498 * srcOffset and dstOffset select the initial x, y, and z offsets in
499 * texels of the sub-regions of the source and destination image data.
500 * extent is the size in texels of the source image to resolve in width,
501 * height and depth. 1D images use only x and width. 2D images use x, y,
502 * width and height. 3D images use x, y, z, width, height and depth.
503 */
504 const struct VkExtent3D extent =
505 radv_sanitize_image_extent(src_image->type, region->extent);
506 const struct VkOffset3D dstOffset =
507 radv_sanitize_image_offset(dest_image->type, region->dstOffset);
508
509 if (radv_dcc_enabled(dest_image, region->dstSubresource.mipLevel)) {
510 VkImageSubresourceRange range = {
511 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
512 .baseMipLevel = region->dstSubresource.mipLevel,
513 .levelCount = 1,
514 .baseArrayLayer = dest_base_layer,
515 .layerCount = region->dstSubresource.layerCount,
516 };
517
518 radv_initialize_dcc(cmd_buffer, dest_image, &range, 0xffffffff);
519 }
520
521 for (uint32_t layer = 0; layer < region->srcSubresource.layerCount;
522 ++layer) {
523
524 VkResult ret = build_resolve_pipeline(device, fs_key);
525 if (ret != VK_SUCCESS) {
526 cmd_buffer->record_result = ret;
527 break;
528 }
529
530 struct radv_image_view src_iview;
531 radv_image_view_init(&src_iview, cmd_buffer->device,
532 &(VkImageViewCreateInfo) {
533 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
534 .image = src_image_h,
535 .viewType = radv_meta_get_view_type(src_image),
536 .format = src_image->vk_format,
537 .subresourceRange = {
538 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
539 .baseMipLevel = region->srcSubresource.mipLevel,
540 .levelCount = 1,
541 .baseArrayLayer = src_base_layer + layer,
542 .layerCount = 1,
543 },
544 });
545
546 struct radv_image_view dest_iview;
547 radv_image_view_init(&dest_iview, cmd_buffer->device,
548 &(VkImageViewCreateInfo) {
549 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
550 .image = dest_image_h,
551 .viewType = radv_meta_get_view_type(dest_image),
552 .format = dest_image->vk_format,
553 .subresourceRange = {
554 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
555 .baseMipLevel = region->dstSubresource.mipLevel,
556 .levelCount = 1,
557 .baseArrayLayer = dest_base_layer + layer,
558 .layerCount = 1,
559 },
560 });
561
562 VkFramebuffer fb_h;
563 radv_CreateFramebuffer(device_h,
564 &(VkFramebufferCreateInfo) {
565 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
566 .attachmentCount = 2,
567 .pAttachments = (VkImageView[]) {
568 radv_image_view_to_handle(&src_iview),
569 radv_image_view_to_handle(&dest_iview),
570 },
571 .width = radv_minify(dest_image->info.width,
572 region->dstSubresource.mipLevel),
573 .height = radv_minify(dest_image->info.height,
574 region->dstSubresource.mipLevel),
575 .layers = 1
576 },
577 &cmd_buffer->pool->alloc,
578 &fb_h);
579
580 radv_CmdBeginRenderPass(cmd_buffer_h,
581 &(VkRenderPassBeginInfo) {
582 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
583 .renderPass = device->meta_state.resolve.pass[fs_key],
584 .framebuffer = fb_h,
585 .renderArea = {
586 .offset = {
587 dstOffset.x,
588 dstOffset.y,
589 },
590 .extent = {
591 extent.width,
592 extent.height,
593 }
594 },
595 .clearValueCount = 0,
596 .pClearValues = NULL,
597 },
598 VK_SUBPASS_CONTENTS_INLINE);
599
600 emit_resolve(cmd_buffer,
601 dest_iview.vk_format,
602 &(VkOffset2D) {
603 .x = dstOffset.x,
604 .y = dstOffset.y,
605 },
606 &(VkExtent2D) {
607 .width = extent.width,
608 .height = extent.height,
609 });
610
611 radv_CmdEndRenderPass(cmd_buffer_h);
612
613 radv_DestroyFramebuffer(device_h, fb_h,
614 &cmd_buffer->pool->alloc);
615 }
616 }
617
618 radv_meta_restore(&saved_state, cmd_buffer);
619 }
620
621 /**
622 * Emit any needed resolves for the current subpass.
623 */
624 void
625 radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer)
626 {
627 struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
628 const struct radv_subpass *subpass = cmd_buffer->state.subpass;
629 struct radv_meta_saved_state saved_state;
630 enum radv_resolve_method resolve_method = RESOLVE_HW;
631
632 if (!subpass->has_color_resolve)
633 return;
634
635 for (uint32_t i = 0; i < subpass->color_count; ++i) {
636 struct radv_subpass_attachment src_att = subpass->color_attachments[i];
637 struct radv_subpass_attachment dest_att = subpass->resolve_attachments[i];
638
639 if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
640 continue;
641
642 /* Make sure to not clear color attachments after resolves. */
643 cmd_buffer->state.attachments[dest_att.attachment].pending_clear_aspects = 0;
644
645 struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image;
646 struct radv_image_view *src_iview= cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment;
647 struct radv_image *src_img = src_iview->image;
648
649 radv_pick_resolve_method_images(src_img, src_iview->vk_format,
650 dst_img, dest_att.layout,
651 cmd_buffer, &resolve_method);
652
653 if (resolve_method == RESOLVE_FRAGMENT) {
654 break;
655 }
656 }
657
658 if (resolve_method == RESOLVE_COMPUTE) {
659 radv_cmd_buffer_resolve_subpass_cs(cmd_buffer);
660 return;
661 } else if (resolve_method == RESOLVE_FRAGMENT) {
662 radv_cmd_buffer_resolve_subpass_fs(cmd_buffer);
663 return;
664 }
665
666 radv_meta_save(&saved_state, cmd_buffer,
667 RADV_META_SAVE_GRAPHICS_PIPELINE);
668
669 for (uint32_t i = 0; i < subpass->color_count; ++i) {
670 struct radv_subpass_attachment src_att = subpass->color_attachments[i];
671 struct radv_subpass_attachment dest_att = subpass->resolve_attachments[i];
672
673 if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
674 continue;
675
676 struct radv_image_view *dest_iview = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment;
677 struct radv_image *dst_img = dest_iview->image;
678
679 if (radv_dcc_enabled(dst_img, dest_iview->base_mip)) {
680 VkImageSubresourceRange range = {
681 .aspectMask = dest_iview->aspect_mask,
682 .baseMipLevel = dest_iview->base_mip,
683 .levelCount = dest_iview->level_count,
684 .baseArrayLayer = dest_iview->base_layer,
685 .layerCount = dest_iview->layer_count,
686 };
687
688 radv_initialize_dcc(cmd_buffer, dst_img, &range, 0xffffffff);
689 cmd_buffer->state.attachments[dest_att.attachment].current_layout = VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
690 }
691
692 struct radv_subpass resolve_subpass = {
693 .color_count = 2,
694 .color_attachments = (struct radv_subpass_attachment[]) { src_att, dest_att },
695 .depth_stencil_attachment = NULL,
696 };
697
698 radv_cmd_buffer_set_subpass(cmd_buffer, &resolve_subpass);
699
700 VkResult ret = build_resolve_pipeline(cmd_buffer->device, radv_format_meta_fs_key(dest_iview->vk_format));
701 if (ret != VK_SUCCESS) {
702 cmd_buffer->record_result = ret;
703 continue;
704 }
705
706 emit_resolve(cmd_buffer,
707 dest_iview->vk_format,
708 &(VkOffset2D) { 0, 0 },
709 &(VkExtent2D) { fb->width, fb->height });
710 }
711
712 radv_cmd_buffer_set_subpass(cmd_buffer, subpass);
713
714 radv_meta_restore(&saved_state, cmd_buffer);
715 }
716
717 /**
718 * Decompress CMask/FMask before resolving a multisampled source image inside a
719 * subpass.
720 */
721 void
722 radv_decompress_resolve_subpass_src(struct radv_cmd_buffer *cmd_buffer)
723 {
724 const struct radv_subpass *subpass = cmd_buffer->state.subpass;
725 struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
726 uint32_t layer_count = fb->layers;
727
728 if (subpass->view_mask)
729 layer_count = util_last_bit(subpass->view_mask);
730
731 for (uint32_t i = 0; i < subpass->color_count; ++i) {
732 struct radv_subpass_attachment src_att = subpass->color_attachments[i];
733 struct radv_subpass_attachment dest_att = subpass->resolve_attachments[i];
734
735 if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
736 continue;
737
738 struct radv_image_view *src_iview =
739 fb->attachments[src_att.attachment].attachment;
740 struct radv_image *src_image = src_iview->image;
741
742 VkImageResolve region = {};
743 region.srcSubresource.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT;
744 region.srcSubresource.mipLevel = 0;
745 region.srcSubresource.baseArrayLayer = src_iview->base_layer;
746 region.srcSubresource.layerCount = layer_count;
747
748 radv_decompress_resolve_src(cmd_buffer, src_image,
749 src_att.layout, 1, &region);
750 }
751 }
752
753 /**
754 * Decompress CMask/FMask before resolving a multisampled source image.
755 */
756 void
757 radv_decompress_resolve_src(struct radv_cmd_buffer *cmd_buffer,
758 struct radv_image *src_image,
759 VkImageLayout src_image_layout,
760 uint32_t region_count,
761 const VkImageResolve *regions)
762 {
763 for (uint32_t r = 0; r < region_count; ++r) {
764 const VkImageResolve *region = &regions[r];
765 const uint32_t src_base_layer =
766 radv_meta_get_iview_layer(src_image, &region->srcSubresource,
767 &region->srcOffset);
768
769 VkImageMemoryBarrier barrier = {};
770 barrier.srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT;
771 barrier.dstAccessMask = VK_ACCESS_TRANSFER_READ_BIT;
772 barrier.oldLayout = src_image_layout;
773 barrier.newLayout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
774 barrier.image = radv_image_to_handle(src_image);
775 barrier.subresourceRange = (VkImageSubresourceRange) {
776 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
777 .baseMipLevel = region->srcSubresource.mipLevel,
778 .levelCount = 1,
779 .baseArrayLayer = src_base_layer,
780 .layerCount = region->srcSubresource.layerCount,
781 };
782
783 radv_CmdPipelineBarrier(radv_cmd_buffer_to_handle(cmd_buffer),
784 VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
785 VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
786 false, 0, NULL, 0, NULL, 1, &barrier);
787 }
788 }