2 * Copyright © 2016-2017 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "v3d_compiler.h"
27 vir_print_reg(struct v3d_compile
*c
, struct qreg reg
)
29 static const char *files
[] = {
34 [QFILE_TLBU
] = "tlbu",
36 static const char *quniform_names
[] = {
37 [QUNIFORM_VIEWPORT_X_SCALE
] = "vp_x_scale",
38 [QUNIFORM_VIEWPORT_Y_SCALE
] = "vp_y_scale",
39 [QUNIFORM_VIEWPORT_Z_OFFSET
] = "vp_z_offset",
40 [QUNIFORM_VIEWPORT_Z_SCALE
] = "vp_z_scale",
46 fprintf(stderr
, "null");
50 fprintf(stderr
, "0x%08x (%f)", reg
.index
, uif(reg
.index
));
54 fprintf(stderr
, "rf%d", reg
.index
);
58 fprintf(stderr
, "%s", v3d_qpu_magic_waddr_name(reg
.index
));
62 if ((int)reg
.index
>= -16 && (int)reg
.index
<= 15)
63 fprintf(stderr
, "%d", reg
.index
);
65 fprintf(stderr
, "%f", uif(reg
.index
));
69 fprintf(stderr
, "vpm%d.%d",
70 reg
.index
/ 4, reg
.index
% 4);
74 fprintf(stderr
, "%s", files
[reg
.file
]);
78 enum quniform_contents contents
= c
->uniform_contents
[reg
.index
];
80 fprintf(stderr
, "%s%d", files
[reg
.file
], reg
.index
);
83 case QUNIFORM_CONSTANT
:
84 fprintf(stderr
, " (0x%08x / %f)",
85 c
->uniform_data
[reg
.index
],
86 uif(c
->uniform_data
[reg
.index
]));
89 case QUNIFORM_UNIFORM
:
90 fprintf(stderr
, " (push[%d])",
91 c
->uniform_data
[reg
.index
]);
94 case QUNIFORM_TEXTURE_CONFIG_P1
:
95 fprintf(stderr
, " (tex[%d].p1)",
96 c
->uniform_data
[reg
.index
]);
99 case QUNIFORM_TEXTURE_WIDTH
:
100 fprintf(stderr
, " (tex[%d].width)",
101 c
->uniform_data
[reg
.index
]);
103 case QUNIFORM_TEXTURE_HEIGHT
:
104 fprintf(stderr
, " (tex[%d].height)",
105 c
->uniform_data
[reg
.index
]);
107 case QUNIFORM_TEXTURE_DEPTH
:
108 fprintf(stderr
, " (tex[%d].depth)",
109 c
->uniform_data
[reg
.index
]);
111 case QUNIFORM_TEXTURE_ARRAY_SIZE
:
112 fprintf(stderr
, " (tex[%d].array_size)",
113 c
->uniform_data
[reg
.index
]);
115 case QUNIFORM_TEXTURE_LEVELS
:
116 fprintf(stderr
, " (tex[%d].levels)",
117 c
->uniform_data
[reg
.index
]);
120 case QUNIFORM_UBO_ADDR
:
121 fprintf(stderr
, " (ubo[%d])",
122 c
->uniform_data
[reg
.index
]);
126 if (quniform_contents_is_texture_p0(contents
)) {
127 fprintf(stderr
, " (tex[%d].p0: 0x%08x)",
128 contents
- QUNIFORM_TEXTURE_CONFIG_P0_0
,
129 c
->uniform_data
[reg
.index
]);
130 } else if (contents
< ARRAY_SIZE(quniform_names
)) {
131 fprintf(stderr
, " (%s)",
132 quniform_names
[contents
]);
134 fprintf(stderr
, " (%d / 0x%08x)", contents
,
135 c
->uniform_data
[reg
.index
]);
143 fprintf(stderr
, "%s%d", files
[reg
.file
], reg
.index
);
149 vir_dump_sig(struct v3d_compile
*c
, struct qinst
*inst
)
151 struct v3d_qpu_sig
*sig
= &inst
->qpu
.sig
;
154 fprintf(stderr
, "; thrsw");
156 fprintf(stderr
, "; ldvary");
158 fprintf(stderr
, "; ldvpm");
160 fprintf(stderr
, "; ldtmu");
162 fprintf(stderr
, "; ldunif");
164 fprintf(stderr
, "; wrtmuc");
168 vir_dump_alu(struct v3d_compile
*c
, struct qinst
*inst
)
170 struct v3d_qpu_instr
*instr
= &inst
->qpu
;
171 int nsrc
= vir_get_non_sideband_nsrc(inst
);
172 int sideband_nsrc
= vir_get_nsrc(inst
);
173 enum v3d_qpu_input_unpack unpack
[2];
175 if (inst
->qpu
.alu
.add
.op
!= V3D_QPU_A_NOP
) {
176 fprintf(stderr
, "%s", v3d_qpu_add_op_name(instr
->alu
.add
.op
));
177 fprintf(stderr
, "%s", v3d_qpu_cond_name(instr
->flags
.ac
));
178 fprintf(stderr
, "%s", v3d_qpu_pf_name(instr
->flags
.apf
));
179 fprintf(stderr
, "%s", v3d_qpu_uf_name(instr
->flags
.auf
));
180 fprintf(stderr
, " ");
182 vir_print_reg(c
, inst
->dst
);
183 fprintf(stderr
, "%s", v3d_qpu_pack_name(instr
->alu
.add
.output_pack
));
185 unpack
[0] = instr
->alu
.add
.a_unpack
;
186 unpack
[1] = instr
->alu
.add
.b_unpack
;
188 fprintf(stderr
, "%s", v3d_qpu_mul_op_name(instr
->alu
.mul
.op
));
189 fprintf(stderr
, "%s", v3d_qpu_cond_name(instr
->flags
.mc
));
190 fprintf(stderr
, "%s", v3d_qpu_pf_name(instr
->flags
.mpf
));
191 fprintf(stderr
, "%s", v3d_qpu_uf_name(instr
->flags
.muf
));
192 fprintf(stderr
, " ");
194 vir_print_reg(c
, inst
->dst
);
195 fprintf(stderr
, "%s", v3d_qpu_pack_name(instr
->alu
.mul
.output_pack
));
197 unpack
[0] = instr
->alu
.mul
.a_unpack
;
198 unpack
[1] = instr
->alu
.mul
.b_unpack
;
201 for (int i
= 0; i
< sideband_nsrc
; i
++) {
202 fprintf(stderr
, ", ");
203 vir_print_reg(c
, inst
->src
[i
]);
205 fprintf(stderr
, "%s", v3d_qpu_unpack_name(unpack
[i
]));
208 vir_dump_sig(c
, inst
);
212 vir_dump_inst(struct v3d_compile
*c
, struct qinst
*inst
)
214 struct v3d_qpu_instr
*instr
= &inst
->qpu
;
216 switch (inst
->qpu
.type
) {
217 case V3D_QPU_INSTR_TYPE_ALU
:
218 vir_dump_alu(c
, inst
);
220 case V3D_QPU_INSTR_TYPE_BRANCH
:
221 fprintf(stderr
, "b");
222 if (instr
->branch
.ub
)
223 fprintf(stderr
, "u");
225 fprintf(stderr
, "%s",
226 v3d_qpu_branch_cond_name(instr
->branch
.cond
));
227 fprintf(stderr
, "%s", v3d_qpu_msfign_name(instr
->branch
.msfign
));
229 switch (instr
->branch
.bdi
) {
230 case V3D_QPU_BRANCH_DEST_ABS
:
231 fprintf(stderr
, " zero_addr+0x%08x", instr
->branch
.offset
);
234 case V3D_QPU_BRANCH_DEST_REL
:
235 fprintf(stderr
, " %d", instr
->branch
.offset
);
238 case V3D_QPU_BRANCH_DEST_LINK_REG
:
239 fprintf(stderr
, " lri");
242 case V3D_QPU_BRANCH_DEST_REGFILE
:
243 fprintf(stderr
, " rf%d", instr
->branch
.raddr_a
);
247 if (instr
->branch
.ub
) {
248 switch (instr
->branch
.bdu
) {
249 case V3D_QPU_BRANCH_DEST_ABS
:
250 fprintf(stderr
, ", a:unif");
253 case V3D_QPU_BRANCH_DEST_REL
:
254 fprintf(stderr
, ", r:unif");
257 case V3D_QPU_BRANCH_DEST_LINK_REG
:
258 fprintf(stderr
, ", lri");
261 case V3D_QPU_BRANCH_DEST_REGFILE
:
262 fprintf(stderr
, ", rf%d", instr
->branch
.raddr_a
);
267 if (vir_has_implicit_uniform(inst
)) {
268 fprintf(stderr
, " ");
269 vir_print_reg(c
, inst
->src
[vir_get_implicit_uniform_src(inst
)]);
277 vir_dump(struct v3d_compile
*c
)
281 vir_for_each_block(block
, c
) {
282 fprintf(stderr
, "BLOCK %d:\n", block
->index
);
283 vir_for_each_inst(inst
, block
) {
287 for (int i
= 0; i
< c
->num_temps
; i
++) {
288 if (c
->temp_start
[i
] != ip
)
294 fprintf(stderr
, ", ");
296 fprintf(stderr
, "S%4d", i
);
300 fprintf(stderr
, " ");
302 fprintf(stderr
, " ");
308 for (int i
= 0; i
< c
->num_temps
; i
++) {
309 if (c
->temp_end
[i
] != ip
)
315 fprintf(stderr
, ", ");
317 fprintf(stderr
, "E%4d", i
);
321 fprintf(stderr
, " ");
323 fprintf(stderr
, " ");
326 vir_dump_inst(c
, inst
);
327 fprintf(stderr
, "\n");
330 if (block
->successors
[1]) {
331 fprintf(stderr
, "-> BLOCK %d, %d\n",
332 block
->successors
[0]->index
,
333 block
->successors
[1]->index
);
334 } else if (block
->successors
[0]) {
335 fprintf(stderr
, "-> BLOCK %d\n",
336 block
->successors
[0]->index
);