nir: Embed the shader_info in the nir_shader again
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35
36 /*
37 * pass to lower GLSL IR to NIR
38 *
39 * This will lower variable dereferences to loads/stores of corresponding
40 * variables in NIR - the variables will be converted to registers in a later
41 * pass.
42 */
43
44 namespace {
45
46 class nir_visitor : public ir_visitor
47 {
48 public:
49 nir_visitor(nir_shader *shader);
50 ~nir_visitor();
51
52 virtual void visit(ir_variable *);
53 virtual void visit(ir_function *);
54 virtual void visit(ir_function_signature *);
55 virtual void visit(ir_loop *);
56 virtual void visit(ir_if *);
57 virtual void visit(ir_discard *);
58 virtual void visit(ir_loop_jump *);
59 virtual void visit(ir_return *);
60 virtual void visit(ir_call *);
61 virtual void visit(ir_assignment *);
62 virtual void visit(ir_emit_vertex *);
63 virtual void visit(ir_end_primitive *);
64 virtual void visit(ir_expression *);
65 virtual void visit(ir_swizzle *);
66 virtual void visit(ir_texture *);
67 virtual void visit(ir_constant *);
68 virtual void visit(ir_dereference_variable *);
69 virtual void visit(ir_dereference_record *);
70 virtual void visit(ir_dereference_array *);
71 virtual void visit(ir_barrier *);
72
73 void create_function(ir_function_signature *ir);
74
75 private:
76 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
77 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
78
79 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
82 nir_ssa_def *src2);
83 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
84 nir_ssa_def *src2, nir_ssa_def *src3);
85
86 bool supports_ints;
87
88 nir_shader *shader;
89 nir_function_impl *impl;
90 nir_builder b;
91 nir_ssa_def *result; /* result of the expression tree last visited */
92
93 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
94
95 /* the head of the dereference chain we're creating */
96 nir_deref_var *deref_head;
97 /* the tail of the dereference chain we're creating */
98 nir_deref *deref_tail;
99
100 nir_variable *var; /* variable created by ir_variable visitor */
101
102 /* whether the IR we're operating on is per-function or global */
103 bool is_global;
104
105 /* map of ir_variable -> nir_variable */
106 struct hash_table *var_table;
107
108 /* map of ir_function_signature -> nir_function_overload */
109 struct hash_table *overload_table;
110 };
111
112 /*
113 * This visitor runs before the main visitor, calling create_function() for
114 * each function so that the main visitor can resolve forward references in
115 * calls.
116 */
117
118 class nir_function_visitor : public ir_hierarchical_visitor
119 {
120 public:
121 nir_function_visitor(nir_visitor *v) : visitor(v)
122 {
123 }
124 virtual ir_visitor_status visit_enter(ir_function *);
125
126 private:
127 nir_visitor *visitor;
128 };
129
130 } /* end of anonymous namespace */
131
132 static void
133 nir_remap_attributes(nir_shader *shader)
134 {
135 nir_foreach_variable(var, &shader->inputs) {
136 var->data.location += _mesa_bitcount_64(shader->info.double_inputs_read &
137 BITFIELD64_MASK(var->data.location));
138 }
139
140 /* Once the remap is done, reset double_inputs_read, so later it will have
141 * which location/slots are doubles */
142 shader->info.double_inputs_read = 0;
143 }
144
145 nir_shader *
146 glsl_to_nir(const struct gl_shader_program *shader_prog,
147 gl_shader_stage stage,
148 const nir_shader_compiler_options *options)
149 {
150 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
151
152 nir_shader *shader = nir_shader_create(NULL, stage, options,
153 &sh->Program->info);
154
155 nir_visitor v1(shader);
156 nir_function_visitor v2(&v1);
157 v2.run(sh->ir);
158 visit_exec_list(sh->ir, &v1);
159
160 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
161
162 /* Remap the locations to slots so those requiring two slots will occupy
163 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
164 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
165 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
166 if (shader->stage == MESA_SHADER_VERTEX)
167 nir_remap_attributes(shader);
168
169 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
170 if (shader_prog->Label)
171 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
172 shader->info.has_transform_feedback_varyings =
173 shader_prog->TransformFeedback.NumVarying > 0;
174
175 return shader;
176 }
177
178 nir_visitor::nir_visitor(nir_shader *shader)
179 {
180 this->supports_ints = shader->options->native_integers;
181 this->shader = shader;
182 this->is_global = true;
183 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
184 _mesa_key_pointer_equal);
185 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
186 _mesa_key_pointer_equal);
187 this->result = NULL;
188 this->impl = NULL;
189 this->var = NULL;
190 this->deref_head = NULL;
191 this->deref_tail = NULL;
192 memset(&this->b, 0, sizeof(this->b));
193 }
194
195 nir_visitor::~nir_visitor()
196 {
197 _mesa_hash_table_destroy(this->var_table, NULL);
198 _mesa_hash_table_destroy(this->overload_table, NULL);
199 }
200
201 nir_deref_var *
202 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
203 {
204 ir->accept(this);
205 ralloc_steal(mem_ctx, this->deref_head);
206 return this->deref_head;
207 }
208
209 static nir_constant *
210 constant_copy(ir_constant *ir, void *mem_ctx)
211 {
212 if (ir == NULL)
213 return NULL;
214
215 nir_constant *ret = ralloc(mem_ctx, nir_constant);
216
217 const unsigned rows = ir->type->vector_elements;
218 const unsigned cols = ir->type->matrix_columns;
219 unsigned i;
220
221 ret->num_elements = 0;
222 switch (ir->type->base_type) {
223 case GLSL_TYPE_UINT:
224 /* Only float base types can be matrices. */
225 assert(cols == 1);
226
227 for (unsigned r = 0; r < rows; r++)
228 ret->values[0].u32[r] = ir->value.u[r];
229
230 break;
231
232 case GLSL_TYPE_INT:
233 /* Only float base types can be matrices. */
234 assert(cols == 1);
235
236 for (unsigned r = 0; r < rows; r++)
237 ret->values[0].i32[r] = ir->value.i[r];
238
239 break;
240
241 case GLSL_TYPE_FLOAT:
242 for (unsigned c = 0; c < cols; c++) {
243 for (unsigned r = 0; r < rows; r++)
244 ret->values[c].f32[r] = ir->value.f[c * rows + r];
245 }
246 break;
247
248 case GLSL_TYPE_DOUBLE:
249 for (unsigned c = 0; c < cols; c++) {
250 for (unsigned r = 0; r < rows; r++)
251 ret->values[c].f64[r] = ir->value.d[c * rows + r];
252 }
253 break;
254
255 case GLSL_TYPE_UINT64:
256 /* Only float base types can be matrices. */
257 assert(cols == 1);
258
259 for (unsigned r = 0; r < rows; r++)
260 ret->values[0].u64[r] = ir->value.u64[r];
261 break;
262
263 case GLSL_TYPE_INT64:
264 /* Only float base types can be matrices. */
265 assert(cols == 1);
266
267 for (unsigned r = 0; r < rows; r++)
268 ret->values[0].i64[r] = ir->value.i64[r];
269 break;
270
271 case GLSL_TYPE_BOOL:
272 /* Only float base types can be matrices. */
273 assert(cols == 1);
274
275 for (unsigned r = 0; r < rows; r++)
276 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
277
278 break;
279
280 case GLSL_TYPE_STRUCT:
281 ret->elements = ralloc_array(mem_ctx, nir_constant *,
282 ir->type->length);
283 ret->num_elements = ir->type->length;
284
285 i = 0;
286 foreach_in_list(ir_constant, field, &ir->components) {
287 ret->elements[i] = constant_copy(field, mem_ctx);
288 i++;
289 }
290 break;
291
292 case GLSL_TYPE_ARRAY:
293 ret->elements = ralloc_array(mem_ctx, nir_constant *,
294 ir->type->length);
295 ret->num_elements = ir->type->length;
296
297 for (i = 0; i < ir->type->length; i++)
298 ret->elements[i] = constant_copy(ir->array_elements[i], mem_ctx);
299 break;
300
301 default:
302 unreachable("not reached");
303 }
304
305 return ret;
306 }
307
308 void
309 nir_visitor::visit(ir_variable *ir)
310 {
311 /* TODO: In future we should switch to using the NIR lowering pass but for
312 * now just ignore these variables as GLSL IR should have lowered them.
313 * Anything remaining are just dead vars that weren't cleaned up.
314 */
315 if (ir->data.mode == ir_var_shader_shared)
316 return;
317
318 nir_variable *var = ralloc(shader, nir_variable);
319 var->type = ir->type;
320 var->name = ralloc_strdup(var, ir->name);
321
322 var->data.read_only = ir->data.read_only;
323 var->data.centroid = ir->data.centroid;
324 var->data.sample = ir->data.sample;
325 var->data.patch = ir->data.patch;
326 var->data.invariant = ir->data.invariant;
327 var->data.location = ir->data.location;
328 var->data.compact = false;
329
330 switch(ir->data.mode) {
331 case ir_var_auto:
332 case ir_var_temporary:
333 if (is_global)
334 var->data.mode = nir_var_global;
335 else
336 var->data.mode = nir_var_local;
337 break;
338
339 case ir_var_function_in:
340 case ir_var_function_out:
341 case ir_var_function_inout:
342 case ir_var_const_in:
343 var->data.mode = nir_var_local;
344 break;
345
346 case ir_var_shader_in:
347 if (shader->stage == MESA_SHADER_FRAGMENT &&
348 ir->data.location == VARYING_SLOT_FACE) {
349 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
350 var->data.location = SYSTEM_VALUE_FRONT_FACE;
351 var->data.mode = nir_var_system_value;
352 } else if (shader->stage == MESA_SHADER_GEOMETRY &&
353 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
354 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
355 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
356 var->data.mode = nir_var_system_value;
357 } else {
358 var->data.mode = nir_var_shader_in;
359
360 if (shader->stage == MESA_SHADER_TESS_EVAL &&
361 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
362 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
363 var->data.compact = ir->type->without_array()->is_scalar();
364 }
365 }
366
367 /* Mark all the locations that require two slots */
368 if (glsl_type_is_dual_slot(glsl_without_array(var->type))) {
369 for (uint i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
370 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
371 shader->info.double_inputs_read |= bitfield;
372 }
373 }
374 break;
375
376 case ir_var_shader_out:
377 var->data.mode = nir_var_shader_out;
378 if (shader->stage == MESA_SHADER_TESS_CTRL &&
379 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
380 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
381 var->data.compact = ir->type->without_array()->is_scalar();
382 }
383 break;
384
385 case ir_var_uniform:
386 var->data.mode = nir_var_uniform;
387 break;
388
389 case ir_var_shader_storage:
390 var->data.mode = nir_var_shader_storage;
391 break;
392
393 case ir_var_system_value:
394 var->data.mode = nir_var_system_value;
395 break;
396
397 default:
398 unreachable("not reached");
399 }
400
401 var->data.interpolation = ir->data.interpolation;
402 var->data.origin_upper_left = ir->data.origin_upper_left;
403 var->data.pixel_center_integer = ir->data.pixel_center_integer;
404 var->data.location_frac = ir->data.location_frac;
405
406 switch (ir->data.depth_layout) {
407 case ir_depth_layout_none:
408 var->data.depth_layout = nir_depth_layout_none;
409 break;
410 case ir_depth_layout_any:
411 var->data.depth_layout = nir_depth_layout_any;
412 break;
413 case ir_depth_layout_greater:
414 var->data.depth_layout = nir_depth_layout_greater;
415 break;
416 case ir_depth_layout_less:
417 var->data.depth_layout = nir_depth_layout_less;
418 break;
419 case ir_depth_layout_unchanged:
420 var->data.depth_layout = nir_depth_layout_unchanged;
421 break;
422 default:
423 unreachable("not reached");
424 }
425
426 var->data.index = ir->data.index;
427 var->data.binding = ir->data.binding;
428 var->data.offset = ir->data.offset;
429 var->data.image.read_only = ir->data.memory_read_only;
430 var->data.image.write_only = ir->data.memory_write_only;
431 var->data.image.coherent = ir->data.memory_coherent;
432 var->data.image._volatile = ir->data.memory_volatile;
433 var->data.image.restrict_flag = ir->data.memory_restrict;
434 var->data.image.format = ir->data.image_format;
435 var->data.fb_fetch_output = ir->data.fb_fetch_output;
436
437 var->num_state_slots = ir->get_num_state_slots();
438 if (var->num_state_slots > 0) {
439 var->state_slots = ralloc_array(var, nir_state_slot,
440 var->num_state_slots);
441
442 ir_state_slot *state_slots = ir->get_state_slots();
443 for (unsigned i = 0; i < var->num_state_slots; i++) {
444 for (unsigned j = 0; j < 5; j++)
445 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
446 var->state_slots[i].swizzle = state_slots[i].swizzle;
447 }
448 } else {
449 var->state_slots = NULL;
450 }
451
452 var->constant_initializer = constant_copy(ir->constant_initializer, var);
453
454 var->interface_type = ir->get_interface_type();
455
456 if (var->data.mode == nir_var_local)
457 nir_function_impl_add_variable(impl, var);
458 else
459 nir_shader_add_variable(shader, var);
460
461 _mesa_hash_table_insert(var_table, ir, var);
462 this->var = var;
463 }
464
465 ir_visitor_status
466 nir_function_visitor::visit_enter(ir_function *ir)
467 {
468 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
469 visitor->create_function(sig);
470 }
471 return visit_continue_with_parent;
472 }
473
474 void
475 nir_visitor::create_function(ir_function_signature *ir)
476 {
477 if (ir->is_intrinsic())
478 return;
479
480 nir_function *func = nir_function_create(shader, ir->function_name());
481
482 assert(ir->parameters.is_empty());
483 assert(ir->return_type == glsl_type::void_type);
484
485 _mesa_hash_table_insert(this->overload_table, ir, func);
486 }
487
488 void
489 nir_visitor::visit(ir_function *ir)
490 {
491 foreach_in_list(ir_function_signature, sig, &ir->signatures)
492 sig->accept(this);
493 }
494
495 void
496 nir_visitor::visit(ir_function_signature *ir)
497 {
498 if (ir->is_intrinsic())
499 return;
500
501 struct hash_entry *entry =
502 _mesa_hash_table_search(this->overload_table, ir);
503
504 assert(entry);
505 nir_function *func = (nir_function *) entry->data;
506
507 if (ir->is_defined) {
508 nir_function_impl *impl = nir_function_impl_create(func);
509 this->impl = impl;
510
511 assert(strcmp(func->name, "main") == 0);
512 assert(ir->parameters.is_empty());
513 assert(func->return_type == glsl_type::void_type);
514
515 this->is_global = false;
516
517 nir_builder_init(&b, impl);
518 b.cursor = nir_after_cf_list(&impl->body);
519 visit_exec_list(&ir->body, this);
520
521 this->is_global = true;
522 } else {
523 func->impl = NULL;
524 }
525 }
526
527 void
528 nir_visitor::visit(ir_loop *ir)
529 {
530 nir_push_loop(&b);
531 visit_exec_list(&ir->body_instructions, this);
532 nir_pop_loop(&b, NULL);
533 }
534
535 void
536 nir_visitor::visit(ir_if *ir)
537 {
538 nir_push_if(&b, evaluate_rvalue(ir->condition));
539 visit_exec_list(&ir->then_instructions, this);
540 nir_push_else(&b, NULL);
541 visit_exec_list(&ir->else_instructions, this);
542 nir_pop_if(&b, NULL);
543 }
544
545 void
546 nir_visitor::visit(ir_discard *ir)
547 {
548 /*
549 * discards aren't treated as control flow, because before we lower them
550 * they can appear anywhere in the shader and the stuff after them may still
551 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
552 * discards will be immediately followed by a return.
553 */
554
555 nir_intrinsic_instr *discard;
556 if (ir->condition) {
557 discard = nir_intrinsic_instr_create(this->shader,
558 nir_intrinsic_discard_if);
559 discard->src[0] =
560 nir_src_for_ssa(evaluate_rvalue(ir->condition));
561 } else {
562 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
563 }
564
565 nir_builder_instr_insert(&b, &discard->instr);
566 }
567
568 void
569 nir_visitor::visit(ir_emit_vertex *ir)
570 {
571 nir_intrinsic_instr *instr =
572 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
573 nir_intrinsic_set_stream_id(instr, ir->stream_id());
574 nir_builder_instr_insert(&b, &instr->instr);
575 }
576
577 void
578 nir_visitor::visit(ir_end_primitive *ir)
579 {
580 nir_intrinsic_instr *instr =
581 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
582 nir_intrinsic_set_stream_id(instr, ir->stream_id());
583 nir_builder_instr_insert(&b, &instr->instr);
584 }
585
586 void
587 nir_visitor::visit(ir_loop_jump *ir)
588 {
589 nir_jump_type type;
590 switch (ir->mode) {
591 case ir_loop_jump::jump_break:
592 type = nir_jump_break;
593 break;
594 case ir_loop_jump::jump_continue:
595 type = nir_jump_continue;
596 break;
597 default:
598 unreachable("not reached");
599 }
600
601 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
602 nir_builder_instr_insert(&b, &instr->instr);
603 }
604
605 void
606 nir_visitor::visit(ir_return *ir)
607 {
608 if (ir->value != NULL) {
609 nir_intrinsic_instr *copy =
610 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
611
612 copy->variables[0] = nir_deref_var_create(copy, this->impl->return_var);
613 copy->variables[1] = evaluate_deref(&copy->instr, ir->value);
614 }
615
616 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
617 nir_builder_instr_insert(&b, &instr->instr);
618 }
619
620 void
621 nir_visitor::visit(ir_call *ir)
622 {
623 if (ir->callee->is_intrinsic()) {
624 nir_intrinsic_op op;
625
626 switch (ir->callee->intrinsic_id) {
627 case ir_intrinsic_atomic_counter_read:
628 op = nir_intrinsic_atomic_counter_read_var;
629 break;
630 case ir_intrinsic_atomic_counter_increment:
631 op = nir_intrinsic_atomic_counter_inc_var;
632 break;
633 case ir_intrinsic_atomic_counter_predecrement:
634 op = nir_intrinsic_atomic_counter_dec_var;
635 break;
636 case ir_intrinsic_atomic_counter_add:
637 op = nir_intrinsic_atomic_counter_add_var;
638 break;
639 case ir_intrinsic_atomic_counter_and:
640 op = nir_intrinsic_atomic_counter_and_var;
641 break;
642 case ir_intrinsic_atomic_counter_or:
643 op = nir_intrinsic_atomic_counter_or_var;
644 break;
645 case ir_intrinsic_atomic_counter_xor:
646 op = nir_intrinsic_atomic_counter_xor_var;
647 break;
648 case ir_intrinsic_atomic_counter_min:
649 op = nir_intrinsic_atomic_counter_min_var;
650 break;
651 case ir_intrinsic_atomic_counter_max:
652 op = nir_intrinsic_atomic_counter_max_var;
653 break;
654 case ir_intrinsic_atomic_counter_exchange:
655 op = nir_intrinsic_atomic_counter_exchange_var;
656 break;
657 case ir_intrinsic_atomic_counter_comp_swap:
658 op = nir_intrinsic_atomic_counter_comp_swap_var;
659 break;
660 case ir_intrinsic_image_load:
661 op = nir_intrinsic_image_load;
662 break;
663 case ir_intrinsic_image_store:
664 op = nir_intrinsic_image_store;
665 break;
666 case ir_intrinsic_image_atomic_add:
667 op = nir_intrinsic_image_atomic_add;
668 break;
669 case ir_intrinsic_image_atomic_min:
670 op = nir_intrinsic_image_atomic_min;
671 break;
672 case ir_intrinsic_image_atomic_max:
673 op = nir_intrinsic_image_atomic_max;
674 break;
675 case ir_intrinsic_image_atomic_and:
676 op = nir_intrinsic_image_atomic_and;
677 break;
678 case ir_intrinsic_image_atomic_or:
679 op = nir_intrinsic_image_atomic_or;
680 break;
681 case ir_intrinsic_image_atomic_xor:
682 op = nir_intrinsic_image_atomic_xor;
683 break;
684 case ir_intrinsic_image_atomic_exchange:
685 op = nir_intrinsic_image_atomic_exchange;
686 break;
687 case ir_intrinsic_image_atomic_comp_swap:
688 op = nir_intrinsic_image_atomic_comp_swap;
689 break;
690 case ir_intrinsic_memory_barrier:
691 op = nir_intrinsic_memory_barrier;
692 break;
693 case ir_intrinsic_image_size:
694 op = nir_intrinsic_image_size;
695 break;
696 case ir_intrinsic_image_samples:
697 op = nir_intrinsic_image_samples;
698 break;
699 case ir_intrinsic_ssbo_store:
700 op = nir_intrinsic_store_ssbo;
701 break;
702 case ir_intrinsic_ssbo_load:
703 op = nir_intrinsic_load_ssbo;
704 break;
705 case ir_intrinsic_ssbo_atomic_add:
706 op = nir_intrinsic_ssbo_atomic_add;
707 break;
708 case ir_intrinsic_ssbo_atomic_and:
709 op = nir_intrinsic_ssbo_atomic_and;
710 break;
711 case ir_intrinsic_ssbo_atomic_or:
712 op = nir_intrinsic_ssbo_atomic_or;
713 break;
714 case ir_intrinsic_ssbo_atomic_xor:
715 op = nir_intrinsic_ssbo_atomic_xor;
716 break;
717 case ir_intrinsic_ssbo_atomic_min:
718 assert(ir->return_deref);
719 if (ir->return_deref->type == glsl_type::int_type)
720 op = nir_intrinsic_ssbo_atomic_imin;
721 else if (ir->return_deref->type == glsl_type::uint_type)
722 op = nir_intrinsic_ssbo_atomic_umin;
723 else
724 unreachable("Invalid type");
725 break;
726 case ir_intrinsic_ssbo_atomic_max:
727 assert(ir->return_deref);
728 if (ir->return_deref->type == glsl_type::int_type)
729 op = nir_intrinsic_ssbo_atomic_imax;
730 else if (ir->return_deref->type == glsl_type::uint_type)
731 op = nir_intrinsic_ssbo_atomic_umax;
732 else
733 unreachable("Invalid type");
734 break;
735 case ir_intrinsic_ssbo_atomic_exchange:
736 op = nir_intrinsic_ssbo_atomic_exchange;
737 break;
738 case ir_intrinsic_ssbo_atomic_comp_swap:
739 op = nir_intrinsic_ssbo_atomic_comp_swap;
740 break;
741 case ir_intrinsic_shader_clock:
742 op = nir_intrinsic_shader_clock;
743 break;
744 case ir_intrinsic_group_memory_barrier:
745 op = nir_intrinsic_group_memory_barrier;
746 break;
747 case ir_intrinsic_memory_barrier_atomic_counter:
748 op = nir_intrinsic_memory_barrier_atomic_counter;
749 break;
750 case ir_intrinsic_memory_barrier_buffer:
751 op = nir_intrinsic_memory_barrier_buffer;
752 break;
753 case ir_intrinsic_memory_barrier_image:
754 op = nir_intrinsic_memory_barrier_image;
755 break;
756 case ir_intrinsic_memory_barrier_shared:
757 op = nir_intrinsic_memory_barrier_shared;
758 break;
759 case ir_intrinsic_shared_load:
760 op = nir_intrinsic_load_shared;
761 break;
762 case ir_intrinsic_shared_store:
763 op = nir_intrinsic_store_shared;
764 break;
765 case ir_intrinsic_shared_atomic_add:
766 op = nir_intrinsic_shared_atomic_add;
767 break;
768 case ir_intrinsic_shared_atomic_and:
769 op = nir_intrinsic_shared_atomic_and;
770 break;
771 case ir_intrinsic_shared_atomic_or:
772 op = nir_intrinsic_shared_atomic_or;
773 break;
774 case ir_intrinsic_shared_atomic_xor:
775 op = nir_intrinsic_shared_atomic_xor;
776 break;
777 case ir_intrinsic_shared_atomic_min:
778 assert(ir->return_deref);
779 if (ir->return_deref->type == glsl_type::int_type)
780 op = nir_intrinsic_shared_atomic_imin;
781 else if (ir->return_deref->type == glsl_type::uint_type)
782 op = nir_intrinsic_shared_atomic_umin;
783 else
784 unreachable("Invalid type");
785 break;
786 case ir_intrinsic_shared_atomic_max:
787 assert(ir->return_deref);
788 if (ir->return_deref->type == glsl_type::int_type)
789 op = nir_intrinsic_shared_atomic_imax;
790 else if (ir->return_deref->type == glsl_type::uint_type)
791 op = nir_intrinsic_shared_atomic_umax;
792 else
793 unreachable("Invalid type");
794 break;
795 case ir_intrinsic_shared_atomic_exchange:
796 op = nir_intrinsic_shared_atomic_exchange;
797 break;
798 case ir_intrinsic_shared_atomic_comp_swap:
799 op = nir_intrinsic_shared_atomic_comp_swap;
800 break;
801 default:
802 unreachable("not reached");
803 }
804
805 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
806 nir_dest *dest = &instr->dest;
807
808 switch (op) {
809 case nir_intrinsic_atomic_counter_read_var:
810 case nir_intrinsic_atomic_counter_inc_var:
811 case nir_intrinsic_atomic_counter_dec_var:
812 case nir_intrinsic_atomic_counter_add_var:
813 case nir_intrinsic_atomic_counter_min_var:
814 case nir_intrinsic_atomic_counter_max_var:
815 case nir_intrinsic_atomic_counter_and_var:
816 case nir_intrinsic_atomic_counter_or_var:
817 case nir_intrinsic_atomic_counter_xor_var:
818 case nir_intrinsic_atomic_counter_exchange_var:
819 case nir_intrinsic_atomic_counter_comp_swap_var: {
820 /* Set the counter variable dereference. */
821 exec_node *param = ir->actual_parameters.get_head();
822 ir_dereference *counter = (ir_dereference *)param;
823
824 instr->variables[0] = evaluate_deref(&instr->instr, counter);
825 param = param->get_next();
826
827 /* Set the intrinsic destination. */
828 if (ir->return_deref) {
829 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
830 }
831
832 /* Set the intrinsic parameters. */
833 if (!param->is_tail_sentinel()) {
834 instr->src[0] =
835 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
836 param = param->get_next();
837 }
838
839 if (!param->is_tail_sentinel()) {
840 instr->src[1] =
841 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
842 param = param->get_next();
843 }
844
845 nir_builder_instr_insert(&b, &instr->instr);
846 break;
847 }
848 case nir_intrinsic_image_load:
849 case nir_intrinsic_image_store:
850 case nir_intrinsic_image_atomic_add:
851 case nir_intrinsic_image_atomic_min:
852 case nir_intrinsic_image_atomic_max:
853 case nir_intrinsic_image_atomic_and:
854 case nir_intrinsic_image_atomic_or:
855 case nir_intrinsic_image_atomic_xor:
856 case nir_intrinsic_image_atomic_exchange:
857 case nir_intrinsic_image_atomic_comp_swap:
858 case nir_intrinsic_image_samples:
859 case nir_intrinsic_image_size: {
860 nir_ssa_undef_instr *instr_undef =
861 nir_ssa_undef_instr_create(shader, 1, 32);
862 nir_builder_instr_insert(&b, &instr_undef->instr);
863
864 /* Set the image variable dereference. */
865 exec_node *param = ir->actual_parameters.get_head();
866 ir_dereference *image = (ir_dereference *)param;
867 const glsl_type *type =
868 image->variable_referenced()->type->without_array();
869
870 instr->variables[0] = evaluate_deref(&instr->instr, image);
871 param = param->get_next();
872
873 /* Set the intrinsic destination. */
874 if (ir->return_deref) {
875 unsigned num_components = ir->return_deref->type->vector_elements;
876 if (instr->intrinsic == nir_intrinsic_image_size)
877 instr->num_components = num_components;
878 nir_ssa_dest_init(&instr->instr, &instr->dest,
879 num_components, 32, NULL);
880 }
881
882 if (op == nir_intrinsic_image_size ||
883 op == nir_intrinsic_image_samples) {
884 nir_builder_instr_insert(&b, &instr->instr);
885 break;
886 }
887
888 /* Set the address argument, extending the coordinate vector to four
889 * components.
890 */
891 nir_ssa_def *src_addr =
892 evaluate_rvalue((ir_dereference *)param);
893 nir_ssa_def *srcs[4];
894
895 for (int i = 0; i < 4; i++) {
896 if (i < type->coordinate_components())
897 srcs[i] = nir_channel(&b, src_addr, i);
898 else
899 srcs[i] = &instr_undef->def;
900 }
901
902 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
903 param = param->get_next();
904
905 /* Set the sample argument, which is undefined for single-sample
906 * images.
907 */
908 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
909 instr->src[1] =
910 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
911 param = param->get_next();
912 } else {
913 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
914 }
915
916 /* Set the intrinsic parameters. */
917 if (!param->is_tail_sentinel()) {
918 instr->src[2] =
919 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
920 param = param->get_next();
921 }
922
923 if (!param->is_tail_sentinel()) {
924 instr->src[3] =
925 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
926 param = param->get_next();
927 }
928 nir_builder_instr_insert(&b, &instr->instr);
929 break;
930 }
931 case nir_intrinsic_memory_barrier:
932 case nir_intrinsic_group_memory_barrier:
933 case nir_intrinsic_memory_barrier_atomic_counter:
934 case nir_intrinsic_memory_barrier_buffer:
935 case nir_intrinsic_memory_barrier_image:
936 case nir_intrinsic_memory_barrier_shared:
937 nir_builder_instr_insert(&b, &instr->instr);
938 break;
939 case nir_intrinsic_shader_clock:
940 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
941 instr->num_components = 2;
942 nir_builder_instr_insert(&b, &instr->instr);
943 break;
944 case nir_intrinsic_store_ssbo: {
945 exec_node *param = ir->actual_parameters.get_head();
946 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
947
948 param = param->get_next();
949 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
950
951 param = param->get_next();
952 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
953
954 param = param->get_next();
955 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
956 assert(write_mask);
957
958 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
959 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
960 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
961 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
962 instr->num_components = val->type->vector_elements;
963
964 nir_builder_instr_insert(&b, &instr->instr);
965 break;
966 }
967 case nir_intrinsic_load_ssbo: {
968 exec_node *param = ir->actual_parameters.get_head();
969 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
970
971 param = param->get_next();
972 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
973
974 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
975 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
976
977 const glsl_type *type = ir->return_deref->var->type;
978 instr->num_components = type->vector_elements;
979
980 /* Setup destination register */
981 unsigned bit_size = glsl_get_bit_size(type);
982 nir_ssa_dest_init(&instr->instr, &instr->dest,
983 type->vector_elements, bit_size, NULL);
984
985 /* Insert the created nir instruction now since in the case of boolean
986 * result we will need to emit another instruction after it
987 */
988 nir_builder_instr_insert(&b, &instr->instr);
989
990 /*
991 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
992 * consider a true boolean to be ~0. Fix this up with a != 0
993 * comparison.
994 */
995 if (type->is_boolean()) {
996 nir_alu_instr *load_ssbo_compare =
997 nir_alu_instr_create(shader, nir_op_ine);
998 load_ssbo_compare->src[0].src.is_ssa = true;
999 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1000 load_ssbo_compare->src[1].src =
1001 nir_src_for_ssa(nir_imm_int(&b, 0));
1002 for (unsigned i = 0; i < type->vector_elements; i++)
1003 load_ssbo_compare->src[1].swizzle[i] = 0;
1004 nir_ssa_dest_init(&load_ssbo_compare->instr,
1005 &load_ssbo_compare->dest.dest,
1006 type->vector_elements, bit_size, NULL);
1007 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1008 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1009 dest = &load_ssbo_compare->dest.dest;
1010 }
1011 break;
1012 }
1013 case nir_intrinsic_ssbo_atomic_add:
1014 case nir_intrinsic_ssbo_atomic_imin:
1015 case nir_intrinsic_ssbo_atomic_umin:
1016 case nir_intrinsic_ssbo_atomic_imax:
1017 case nir_intrinsic_ssbo_atomic_umax:
1018 case nir_intrinsic_ssbo_atomic_and:
1019 case nir_intrinsic_ssbo_atomic_or:
1020 case nir_intrinsic_ssbo_atomic_xor:
1021 case nir_intrinsic_ssbo_atomic_exchange:
1022 case nir_intrinsic_ssbo_atomic_comp_swap: {
1023 int param_count = ir->actual_parameters.length();
1024 assert(param_count == 3 || param_count == 4);
1025
1026 /* Block index */
1027 exec_node *param = ir->actual_parameters.get_head();
1028 ir_instruction *inst = (ir_instruction *) param;
1029 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1030
1031 /* Offset */
1032 param = param->get_next();
1033 inst = (ir_instruction *) param;
1034 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1035
1036 /* data1 parameter (this is always present) */
1037 param = param->get_next();
1038 inst = (ir_instruction *) param;
1039 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1040
1041 /* data2 parameter (only with atomic_comp_swap) */
1042 if (param_count == 4) {
1043 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1044 param = param->get_next();
1045 inst = (ir_instruction *) param;
1046 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1047 }
1048
1049 /* Atomic result */
1050 assert(ir->return_deref);
1051 nir_ssa_dest_init(&instr->instr, &instr->dest,
1052 ir->return_deref->type->vector_elements, 32, NULL);
1053 nir_builder_instr_insert(&b, &instr->instr);
1054 break;
1055 }
1056 case nir_intrinsic_load_shared: {
1057 exec_node *param = ir->actual_parameters.get_head();
1058 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1059
1060 nir_intrinsic_set_base(instr, 0);
1061 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1062
1063 const glsl_type *type = ir->return_deref->var->type;
1064 instr->num_components = type->vector_elements;
1065
1066 /* Setup destination register */
1067 unsigned bit_size = glsl_get_bit_size(type);
1068 nir_ssa_dest_init(&instr->instr, &instr->dest,
1069 type->vector_elements, bit_size, NULL);
1070
1071 nir_builder_instr_insert(&b, &instr->instr);
1072 break;
1073 }
1074 case nir_intrinsic_store_shared: {
1075 exec_node *param = ir->actual_parameters.get_head();
1076 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1077
1078 param = param->get_next();
1079 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1080
1081 param = param->get_next();
1082 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1083 assert(write_mask);
1084
1085 nir_intrinsic_set_base(instr, 0);
1086 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1087
1088 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1089
1090 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1091 instr->num_components = val->type->vector_elements;
1092
1093 nir_builder_instr_insert(&b, &instr->instr);
1094 break;
1095 }
1096 case nir_intrinsic_shared_atomic_add:
1097 case nir_intrinsic_shared_atomic_imin:
1098 case nir_intrinsic_shared_atomic_umin:
1099 case nir_intrinsic_shared_atomic_imax:
1100 case nir_intrinsic_shared_atomic_umax:
1101 case nir_intrinsic_shared_atomic_and:
1102 case nir_intrinsic_shared_atomic_or:
1103 case nir_intrinsic_shared_atomic_xor:
1104 case nir_intrinsic_shared_atomic_exchange:
1105 case nir_intrinsic_shared_atomic_comp_swap: {
1106 int param_count = ir->actual_parameters.length();
1107 assert(param_count == 2 || param_count == 3);
1108
1109 /* Offset */
1110 exec_node *param = ir->actual_parameters.get_head();
1111 ir_instruction *inst = (ir_instruction *) param;
1112 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1113
1114 /* data1 parameter (this is always present) */
1115 param = param->get_next();
1116 inst = (ir_instruction *) param;
1117 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1118
1119 /* data2 parameter (only with atomic_comp_swap) */
1120 if (param_count == 3) {
1121 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1122 param = param->get_next();
1123 inst = (ir_instruction *) param;
1124 instr->src[2] =
1125 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1126 }
1127
1128 /* Atomic result */
1129 assert(ir->return_deref);
1130 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1131 nir_ssa_dest_init(&instr->instr, &instr->dest,
1132 ir->return_deref->type->vector_elements,
1133 bit_size, NULL);
1134 nir_builder_instr_insert(&b, &instr->instr);
1135 break;
1136 }
1137 default:
1138 unreachable("not reached");
1139 }
1140
1141 if (ir->return_deref) {
1142 nir_intrinsic_instr *store_instr =
1143 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1144 store_instr->num_components = ir->return_deref->type->vector_elements;
1145 nir_intrinsic_set_write_mask(store_instr,
1146 (1 << store_instr->num_components) - 1);
1147
1148 store_instr->variables[0] =
1149 evaluate_deref(&store_instr->instr, ir->return_deref);
1150 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1151
1152 nir_builder_instr_insert(&b, &store_instr->instr);
1153 }
1154
1155 return;
1156 }
1157
1158 struct hash_entry *entry =
1159 _mesa_hash_table_search(this->overload_table, ir->callee);
1160 assert(entry);
1161 nir_function *callee = (nir_function *) entry->data;
1162
1163 nir_call_instr *instr = nir_call_instr_create(this->shader, callee);
1164
1165 unsigned i = 0;
1166 foreach_in_list(ir_dereference, param, &ir->actual_parameters) {
1167 instr->params[i] = evaluate_deref(&instr->instr, param);
1168 i++;
1169 }
1170
1171 instr->return_deref = evaluate_deref(&instr->instr, ir->return_deref);
1172 nir_builder_instr_insert(&b, &instr->instr);
1173 }
1174
1175 void
1176 nir_visitor::visit(ir_assignment *ir)
1177 {
1178 unsigned num_components = ir->lhs->type->vector_elements;
1179
1180 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1181 ir->lhs->variable_referenced()->data.precise;
1182
1183 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1184 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1185 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1186 nir_intrinsic_instr *copy =
1187 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1188
1189 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1190 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1191
1192 if (ir->condition) {
1193 nir_push_if(&b, evaluate_rvalue(ir->condition));
1194 nir_builder_instr_insert(&b, &copy->instr);
1195 nir_pop_if(&b, NULL);
1196 } else {
1197 nir_builder_instr_insert(&b, &copy->instr);
1198 }
1199 return;
1200 }
1201
1202 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1203
1204 ir->lhs->accept(this);
1205 nir_deref_var *lhs_deref = this->deref_head;
1206 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1207
1208 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1209 /* GLSL IR will give us the input to the write-masked assignment in a
1210 * single packed vector. So, for example, if the writemask is xzw, then
1211 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1212 * from the load.
1213 */
1214 unsigned swiz[4];
1215 unsigned component = 0;
1216 for (unsigned i = 0; i < 4; i++) {
1217 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1218 }
1219 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1220 }
1221
1222 nir_intrinsic_instr *store =
1223 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1224 store->num_components = ir->lhs->type->vector_elements;
1225 nir_intrinsic_set_write_mask(store, ir->write_mask);
1226 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1227 store->src[0] = nir_src_for_ssa(src);
1228
1229 if (ir->condition) {
1230 nir_push_if(&b, evaluate_rvalue(ir->condition));
1231 nir_builder_instr_insert(&b, &store->instr);
1232 nir_pop_if(&b, NULL);
1233 } else {
1234 nir_builder_instr_insert(&b, &store->instr);
1235 }
1236 }
1237
1238 /*
1239 * Given an instruction, returns a pointer to its destination or NULL if there
1240 * is no destination.
1241 *
1242 * Note that this only handles instructions we generate at this level.
1243 */
1244 static nir_dest *
1245 get_instr_dest(nir_instr *instr)
1246 {
1247 nir_alu_instr *alu_instr;
1248 nir_intrinsic_instr *intrinsic_instr;
1249 nir_tex_instr *tex_instr;
1250
1251 switch (instr->type) {
1252 case nir_instr_type_alu:
1253 alu_instr = nir_instr_as_alu(instr);
1254 return &alu_instr->dest.dest;
1255
1256 case nir_instr_type_intrinsic:
1257 intrinsic_instr = nir_instr_as_intrinsic(instr);
1258 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1259 return &intrinsic_instr->dest;
1260 else
1261 return NULL;
1262
1263 case nir_instr_type_tex:
1264 tex_instr = nir_instr_as_tex(instr);
1265 return &tex_instr->dest;
1266
1267 default:
1268 unreachable("not reached");
1269 }
1270
1271 return NULL;
1272 }
1273
1274 void
1275 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1276 unsigned bit_size)
1277 {
1278 nir_dest *dest = get_instr_dest(instr);
1279
1280 if (dest)
1281 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1282
1283 nir_builder_instr_insert(&b, instr);
1284
1285 if (dest) {
1286 assert(dest->is_ssa);
1287 this->result = &dest->ssa;
1288 }
1289 }
1290
1291 nir_ssa_def *
1292 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1293 {
1294 ir->accept(this);
1295 if (ir->as_dereference() || ir->as_constant()) {
1296 /*
1297 * A dereference is being used on the right hand side, which means we
1298 * must emit a variable load.
1299 */
1300
1301 nir_intrinsic_instr *load_instr =
1302 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1303 load_instr->num_components = ir->type->vector_elements;
1304 load_instr->variables[0] = this->deref_head;
1305 ralloc_steal(load_instr, load_instr->variables[0]);
1306 unsigned bit_size = glsl_get_bit_size(ir->type);
1307 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1308 }
1309
1310 return this->result;
1311 }
1312
1313 static bool
1314 type_is_float(glsl_base_type type)
1315 {
1316 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE;
1317 }
1318
1319 static bool
1320 type_is_signed(glsl_base_type type)
1321 {
1322 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64;
1323 }
1324
1325 void
1326 nir_visitor::visit(ir_expression *ir)
1327 {
1328 /* Some special cases */
1329 switch (ir->operation) {
1330 case ir_binop_ubo_load: {
1331 nir_intrinsic_instr *load =
1332 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1333 unsigned bit_size = glsl_get_bit_size(ir->type);
1334 load->num_components = ir->type->vector_elements;
1335 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1336 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1337 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1338
1339 /*
1340 * In UBO's, a true boolean value is any non-zero value, but we consider
1341 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1342 */
1343
1344 if (ir->type->is_boolean())
1345 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1346
1347 return;
1348 }
1349
1350 case ir_unop_interpolate_at_centroid:
1351 case ir_binop_interpolate_at_offset:
1352 case ir_binop_interpolate_at_sample: {
1353 ir_dereference *deref = ir->operands[0]->as_dereference();
1354 ir_swizzle *swizzle = NULL;
1355 if (!deref) {
1356 /* the api does not allow a swizzle here, but the varying packing code
1357 * may have pushed one into here.
1358 */
1359 swizzle = ir->operands[0]->as_swizzle();
1360 assert(swizzle);
1361 deref = swizzle->val->as_dereference();
1362 assert(deref);
1363 }
1364
1365 deref->accept(this);
1366
1367 nir_intrinsic_op op;
1368 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1369 switch (ir->operation) {
1370 case ir_unop_interpolate_at_centroid:
1371 op = nir_intrinsic_interp_var_at_centroid;
1372 break;
1373 case ir_binop_interpolate_at_offset:
1374 op = nir_intrinsic_interp_var_at_offset;
1375 break;
1376 case ir_binop_interpolate_at_sample:
1377 op = nir_intrinsic_interp_var_at_sample;
1378 break;
1379 default:
1380 unreachable("Invalid interpolation intrinsic");
1381 }
1382 } else {
1383 /* This case can happen if the vertex shader does not write the
1384 * given varying. In this case, the linker will lower it to a
1385 * global variable. Since interpolating a variable makes no
1386 * sense, we'll just turn it into a load which will probably
1387 * eventually end up as an SSA definition.
1388 */
1389 assert(this->deref_head->var->data.mode == nir_var_global);
1390 op = nir_intrinsic_load_var;
1391 }
1392
1393 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1394 intrin->num_components = deref->type->vector_elements;
1395 intrin->variables[0] = this->deref_head;
1396 ralloc_steal(intrin, intrin->variables[0]);
1397
1398 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1399 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1400 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1401
1402 unsigned bit_size = glsl_get_bit_size(deref->type);
1403 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1404
1405 if (swizzle) {
1406 unsigned swiz[4] = {
1407 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1408 };
1409
1410 result = nir_swizzle(&b, result, swiz,
1411 swizzle->type->vector_elements, false);
1412 }
1413
1414 return;
1415 }
1416
1417 default:
1418 break;
1419 }
1420
1421 nir_ssa_def *srcs[4];
1422 for (unsigned i = 0; i < ir->get_num_operands(); i++)
1423 srcs[i] = evaluate_rvalue(ir->operands[i]);
1424
1425 glsl_base_type types[4];
1426 for (unsigned i = 0; i < ir->get_num_operands(); i++)
1427 if (supports_ints)
1428 types[i] = ir->operands[i]->type->base_type;
1429 else
1430 types[i] = GLSL_TYPE_FLOAT;
1431
1432 glsl_base_type out_type;
1433 if (supports_ints)
1434 out_type = ir->type->base_type;
1435 else
1436 out_type = GLSL_TYPE_FLOAT;
1437
1438 switch (ir->operation) {
1439 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1440 case ir_unop_logic_not:
1441 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1442 break;
1443 case ir_unop_neg:
1444 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1445 : nir_ineg(&b, srcs[0]);
1446 break;
1447 case ir_unop_abs:
1448 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1449 : nir_iabs(&b, srcs[0]);
1450 break;
1451 case ir_unop_saturate:
1452 assert(type_is_float(types[0]));
1453 result = nir_fsat(&b, srcs[0]);
1454 break;
1455 case ir_unop_sign:
1456 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1457 : nir_isign(&b, srcs[0]);
1458 break;
1459 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1460 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1461 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1462 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1463 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1464 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1465 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1466 case ir_unop_i2f:
1467 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1468 break;
1469 case ir_unop_u2f:
1470 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1471 break;
1472 case ir_unop_b2f:
1473 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1474 break;
1475 case ir_unop_f2i:
1476 case ir_unop_f2u:
1477 case ir_unop_f2b:
1478 case ir_unop_i2b:
1479 case ir_unop_b2i:
1480 case ir_unop_b2i64:
1481 case ir_unop_d2f:
1482 case ir_unop_f2d:
1483 case ir_unop_d2i:
1484 case ir_unop_d2u:
1485 case ir_unop_d2b:
1486 case ir_unop_i2d:
1487 case ir_unop_u2d:
1488 case ir_unop_i642i:
1489 case ir_unop_i642u:
1490 case ir_unop_i642f:
1491 case ir_unop_i642b:
1492 case ir_unop_i642d:
1493 case ir_unop_u642i:
1494 case ir_unop_u642u:
1495 case ir_unop_u642f:
1496 case ir_unop_u642d:
1497 case ir_unop_i2i64:
1498 case ir_unop_u2i64:
1499 case ir_unop_f2i64:
1500 case ir_unop_d2i64:
1501 case ir_unop_i2u64:
1502 case ir_unop_u2u64:
1503 case ir_unop_f2u64:
1504 case ir_unop_d2u64:
1505 case ir_unop_i2u:
1506 case ir_unop_u2i:
1507 case ir_unop_i642u64:
1508 case ir_unop_u642i64: {
1509 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1510 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1511 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type),
1512 srcs[0], NULL, NULL, NULL);
1513 /* b2i and b2f don't have fixed bit-size versions so the builder will
1514 * just assume 32 and we have to fix it up here.
1515 */
1516 result->bit_size = nir_alu_type_get_type_size(dst_type);
1517 break;
1518 }
1519
1520 case ir_unop_bitcast_i2f:
1521 case ir_unop_bitcast_f2i:
1522 case ir_unop_bitcast_u2f:
1523 case ir_unop_bitcast_f2u:
1524 case ir_unop_bitcast_i642d:
1525 case ir_unop_bitcast_d2i64:
1526 case ir_unop_bitcast_u642d:
1527 case ir_unop_bitcast_d2u64:
1528 case ir_unop_subroutine_to_int:
1529 /* no-op */
1530 result = nir_imov(&b, srcs[0]);
1531 break;
1532 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1533 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1534 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1535 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1536 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1537 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1538 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1539 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1540 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1541 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1542 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1543 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1544 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1545 case ir_unop_pack_snorm_2x16:
1546 result = nir_pack_snorm_2x16(&b, srcs[0]);
1547 break;
1548 case ir_unop_pack_snorm_4x8:
1549 result = nir_pack_snorm_4x8(&b, srcs[0]);
1550 break;
1551 case ir_unop_pack_unorm_2x16:
1552 result = nir_pack_unorm_2x16(&b, srcs[0]);
1553 break;
1554 case ir_unop_pack_unorm_4x8:
1555 result = nir_pack_unorm_4x8(&b, srcs[0]);
1556 break;
1557 case ir_unop_pack_half_2x16:
1558 result = nir_pack_half_2x16(&b, srcs[0]);
1559 break;
1560 case ir_unop_unpack_snorm_2x16:
1561 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1562 break;
1563 case ir_unop_unpack_snorm_4x8:
1564 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1565 break;
1566 case ir_unop_unpack_unorm_2x16:
1567 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1568 break;
1569 case ir_unop_unpack_unorm_4x8:
1570 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1571 break;
1572 case ir_unop_unpack_half_2x16:
1573 result = nir_unpack_half_2x16(&b, srcs[0]);
1574 break;
1575 case ir_unop_pack_double_2x32:
1576 case ir_unop_pack_int_2x32:
1577 case ir_unop_pack_uint_2x32:
1578 result = nir_pack_64_2x32(&b, srcs[0]);
1579 break;
1580 case ir_unop_unpack_double_2x32:
1581 case ir_unop_unpack_int_2x32:
1582 case ir_unop_unpack_uint_2x32:
1583 result = nir_unpack_64_2x32(&b, srcs[0]);
1584 break;
1585 case ir_unop_bitfield_reverse:
1586 result = nir_bitfield_reverse(&b, srcs[0]);
1587 break;
1588 case ir_unop_bit_count:
1589 result = nir_bit_count(&b, srcs[0]);
1590 break;
1591 case ir_unop_find_msb:
1592 switch (types[0]) {
1593 case GLSL_TYPE_UINT:
1594 result = nir_ufind_msb(&b, srcs[0]);
1595 break;
1596 case GLSL_TYPE_INT:
1597 result = nir_ifind_msb(&b, srcs[0]);
1598 break;
1599 default:
1600 unreachable("Invalid type for findMSB()");
1601 }
1602 break;
1603 case ir_unop_find_lsb:
1604 result = nir_find_lsb(&b, srcs[0]);
1605 break;
1606
1607 case ir_unop_noise:
1608 switch (ir->type->vector_elements) {
1609 case 1:
1610 switch (ir->operands[0]->type->vector_elements) {
1611 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1612 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1613 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1614 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1615 default: unreachable("not reached");
1616 }
1617 break;
1618 case 2:
1619 switch (ir->operands[0]->type->vector_elements) {
1620 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1621 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1622 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1623 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1624 default: unreachable("not reached");
1625 }
1626 break;
1627 case 3:
1628 switch (ir->operands[0]->type->vector_elements) {
1629 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1630 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1631 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1632 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1633 default: unreachable("not reached");
1634 }
1635 break;
1636 case 4:
1637 switch (ir->operands[0]->type->vector_elements) {
1638 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1639 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1640 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1641 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1642 default: unreachable("not reached");
1643 }
1644 break;
1645 default:
1646 unreachable("not reached");
1647 }
1648 break;
1649 case ir_unop_get_buffer_size: {
1650 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1651 this->shader,
1652 nir_intrinsic_get_buffer_size);
1653 load->num_components = ir->type->vector_elements;
1654 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1655 unsigned bit_size = glsl_get_bit_size(ir->type);
1656 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1657 return;
1658 }
1659
1660 case ir_binop_add:
1661 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1662 : nir_iadd(&b, srcs[0], srcs[1]);
1663 break;
1664 case ir_binop_sub:
1665 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1666 : nir_isub(&b, srcs[0], srcs[1]);
1667 break;
1668 case ir_binop_mul:
1669 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1670 : nir_imul(&b, srcs[0], srcs[1]);
1671 break;
1672 case ir_binop_div:
1673 if (type_is_float(out_type))
1674 result = nir_fdiv(&b, srcs[0], srcs[1]);
1675 else if (type_is_signed(out_type))
1676 result = nir_idiv(&b, srcs[0], srcs[1]);
1677 else
1678 result = nir_udiv(&b, srcs[0], srcs[1]);
1679 break;
1680 case ir_binop_mod:
1681 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1682 : nir_umod(&b, srcs[0], srcs[1]);
1683 break;
1684 case ir_binop_min:
1685 if (type_is_float(out_type))
1686 result = nir_fmin(&b, srcs[0], srcs[1]);
1687 else if (type_is_signed(out_type))
1688 result = nir_imin(&b, srcs[0], srcs[1]);
1689 else
1690 result = nir_umin(&b, srcs[0], srcs[1]);
1691 break;
1692 case ir_binop_max:
1693 if (type_is_float(out_type))
1694 result = nir_fmax(&b, srcs[0], srcs[1]);
1695 else if (type_is_signed(out_type))
1696 result = nir_imax(&b, srcs[0], srcs[1]);
1697 else
1698 result = nir_umax(&b, srcs[0], srcs[1]);
1699 break;
1700 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1701 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1702 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1703 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1704 case ir_binop_logic_and:
1705 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1706 : nir_fand(&b, srcs[0], srcs[1]);
1707 break;
1708 case ir_binop_logic_or:
1709 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1710 : nir_for(&b, srcs[0], srcs[1]);
1711 break;
1712 case ir_binop_logic_xor:
1713 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1714 : nir_fxor(&b, srcs[0], srcs[1]);
1715 break;
1716 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1717 case ir_binop_rshift:
1718 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1719 : nir_ushr(&b, srcs[0], srcs[1]);
1720 break;
1721 case ir_binop_imul_high:
1722 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1723 : nir_umul_high(&b, srcs[0], srcs[1]);
1724 break;
1725 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1726 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1727 case ir_binop_less:
1728 if (supports_ints) {
1729 if (type_is_float(types[0]))
1730 result = nir_flt(&b, srcs[0], srcs[1]);
1731 else if (type_is_signed(types[0]))
1732 result = nir_ilt(&b, srcs[0], srcs[1]);
1733 else
1734 result = nir_ult(&b, srcs[0], srcs[1]);
1735 } else {
1736 result = nir_slt(&b, srcs[0], srcs[1]);
1737 }
1738 break;
1739 case ir_binop_greater:
1740 if (supports_ints) {
1741 if (type_is_float(types[0]))
1742 result = nir_flt(&b, srcs[1], srcs[0]);
1743 else if (type_is_signed(types[0]))
1744 result = nir_ilt(&b, srcs[1], srcs[0]);
1745 else
1746 result = nir_ult(&b, srcs[1], srcs[0]);
1747 } else {
1748 result = nir_slt(&b, srcs[1], srcs[0]);
1749 }
1750 break;
1751 case ir_binop_lequal:
1752 if (supports_ints) {
1753 if (type_is_float(types[0]))
1754 result = nir_fge(&b, srcs[1], srcs[0]);
1755 else if (type_is_signed(types[0]))
1756 result = nir_ige(&b, srcs[1], srcs[0]);
1757 else
1758 result = nir_uge(&b, srcs[1], srcs[0]);
1759 } else {
1760 result = nir_slt(&b, srcs[1], srcs[0]);
1761 }
1762 break;
1763 case ir_binop_gequal:
1764 if (supports_ints) {
1765 if (type_is_float(types[0]))
1766 result = nir_fge(&b, srcs[0], srcs[1]);
1767 else if (type_is_signed(types[0]))
1768 result = nir_ige(&b, srcs[0], srcs[1]);
1769 else
1770 result = nir_uge(&b, srcs[0], srcs[1]);
1771 } else {
1772 result = nir_slt(&b, srcs[0], srcs[1]);
1773 }
1774 break;
1775 case ir_binop_equal:
1776 if (supports_ints) {
1777 if (type_is_float(types[0]))
1778 result = nir_feq(&b, srcs[0], srcs[1]);
1779 else
1780 result = nir_ieq(&b, srcs[0], srcs[1]);
1781 } else {
1782 result = nir_seq(&b, srcs[0], srcs[1]);
1783 }
1784 break;
1785 case ir_binop_nequal:
1786 if (supports_ints) {
1787 if (type_is_float(types[0]))
1788 result = nir_fne(&b, srcs[0], srcs[1]);
1789 else
1790 result = nir_ine(&b, srcs[0], srcs[1]);
1791 } else {
1792 result = nir_sne(&b, srcs[0], srcs[1]);
1793 }
1794 break;
1795 case ir_binop_all_equal:
1796 if (supports_ints) {
1797 if (type_is_float(types[0])) {
1798 switch (ir->operands[0]->type->vector_elements) {
1799 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1800 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1801 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1802 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1803 default:
1804 unreachable("not reached");
1805 }
1806 } else {
1807 switch (ir->operands[0]->type->vector_elements) {
1808 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1809 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1810 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1811 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1812 default:
1813 unreachable("not reached");
1814 }
1815 }
1816 } else {
1817 switch (ir->operands[0]->type->vector_elements) {
1818 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1819 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1820 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1821 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1822 default:
1823 unreachable("not reached");
1824 }
1825 }
1826 break;
1827 case ir_binop_any_nequal:
1828 if (supports_ints) {
1829 if (type_is_float(types[0])) {
1830 switch (ir->operands[0]->type->vector_elements) {
1831 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1832 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1833 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1834 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1835 default:
1836 unreachable("not reached");
1837 }
1838 } else {
1839 switch (ir->operands[0]->type->vector_elements) {
1840 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1841 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1842 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1843 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1844 default:
1845 unreachable("not reached");
1846 }
1847 }
1848 } else {
1849 switch (ir->operands[0]->type->vector_elements) {
1850 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1851 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1852 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1853 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1854 default:
1855 unreachable("not reached");
1856 }
1857 }
1858 break;
1859 case ir_binop_dot:
1860 switch (ir->operands[0]->type->vector_elements) {
1861 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1862 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1863 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1864 default:
1865 unreachable("not reached");
1866 }
1867 break;
1868
1869 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1870 case ir_triop_fma:
1871 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1872 break;
1873 case ir_triop_lrp:
1874 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1875 break;
1876 case ir_triop_csel:
1877 if (supports_ints)
1878 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1879 else
1880 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1881 break;
1882 case ir_triop_bitfield_extract:
1883 result = (out_type == GLSL_TYPE_INT) ?
1884 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1885 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1886 break;
1887 case ir_quadop_bitfield_insert:
1888 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1889 break;
1890 case ir_quadop_vector:
1891 result = nir_vec(&b, srcs, ir->type->vector_elements);
1892 break;
1893
1894 default:
1895 unreachable("not reached");
1896 }
1897 }
1898
1899 void
1900 nir_visitor::visit(ir_swizzle *ir)
1901 {
1902 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1903 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1904 ir->type->vector_elements, !supports_ints);
1905 }
1906
1907 void
1908 nir_visitor::visit(ir_texture *ir)
1909 {
1910 unsigned num_srcs;
1911 nir_texop op;
1912 switch (ir->op) {
1913 case ir_tex:
1914 op = nir_texop_tex;
1915 num_srcs = 1; /* coordinate */
1916 break;
1917
1918 case ir_txb:
1919 case ir_txl:
1920 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1921 num_srcs = 2; /* coordinate, bias/lod */
1922 break;
1923
1924 case ir_txd:
1925 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1926 num_srcs = 3;
1927 break;
1928
1929 case ir_txf:
1930 op = nir_texop_txf;
1931 if (ir->lod_info.lod != NULL)
1932 num_srcs = 2; /* coordinate, lod */
1933 else
1934 num_srcs = 1; /* coordinate */
1935 break;
1936
1937 case ir_txf_ms:
1938 op = nir_texop_txf_ms;
1939 num_srcs = 2; /* coordinate, sample_index */
1940 break;
1941
1942 case ir_txs:
1943 op = nir_texop_txs;
1944 if (ir->lod_info.lod != NULL)
1945 num_srcs = 1; /* lod */
1946 else
1947 num_srcs = 0;
1948 break;
1949
1950 case ir_lod:
1951 op = nir_texop_lod;
1952 num_srcs = 1; /* coordinate */
1953 break;
1954
1955 case ir_tg4:
1956 op = nir_texop_tg4;
1957 num_srcs = 1; /* coordinate */
1958 break;
1959
1960 case ir_query_levels:
1961 op = nir_texop_query_levels;
1962 num_srcs = 0;
1963 break;
1964
1965 case ir_texture_samples:
1966 op = nir_texop_texture_samples;
1967 num_srcs = 0;
1968 break;
1969
1970 case ir_samples_identical:
1971 op = nir_texop_samples_identical;
1972 num_srcs = 1; /* coordinate */
1973 break;
1974
1975 default:
1976 unreachable("not reached");
1977 }
1978
1979 if (ir->projector != NULL)
1980 num_srcs++;
1981 if (ir->shadow_comparator != NULL)
1982 num_srcs++;
1983 if (ir->offset != NULL)
1984 num_srcs++;
1985
1986 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
1987
1988 instr->op = op;
1989 instr->sampler_dim =
1990 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
1991 instr->is_array = ir->sampler->type->sampler_array;
1992 instr->is_shadow = ir->sampler->type->sampler_shadow;
1993 if (instr->is_shadow)
1994 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
1995 switch (ir->type->base_type) {
1996 case GLSL_TYPE_FLOAT:
1997 instr->dest_type = nir_type_float;
1998 break;
1999 case GLSL_TYPE_INT:
2000 instr->dest_type = nir_type_int;
2001 break;
2002 case GLSL_TYPE_BOOL:
2003 case GLSL_TYPE_UINT:
2004 instr->dest_type = nir_type_uint;
2005 break;
2006 default:
2007 unreachable("not reached");
2008 }
2009
2010 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2011
2012 unsigned src_number = 0;
2013
2014 if (ir->coordinate != NULL) {
2015 instr->coord_components = ir->coordinate->type->vector_elements;
2016 instr->src[src_number].src =
2017 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2018 instr->src[src_number].src_type = nir_tex_src_coord;
2019 src_number++;
2020 }
2021
2022 if (ir->projector != NULL) {
2023 instr->src[src_number].src =
2024 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2025 instr->src[src_number].src_type = nir_tex_src_projector;
2026 src_number++;
2027 }
2028
2029 if (ir->shadow_comparator != NULL) {
2030 instr->src[src_number].src =
2031 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2032 instr->src[src_number].src_type = nir_tex_src_comparator;
2033 src_number++;
2034 }
2035
2036 if (ir->offset != NULL) {
2037 /* we don't support multiple offsets yet */
2038 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2039
2040 instr->src[src_number].src =
2041 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2042 instr->src[src_number].src_type = nir_tex_src_offset;
2043 src_number++;
2044 }
2045
2046 switch (ir->op) {
2047 case ir_txb:
2048 instr->src[src_number].src =
2049 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2050 instr->src[src_number].src_type = nir_tex_src_bias;
2051 src_number++;
2052 break;
2053
2054 case ir_txl:
2055 case ir_txf:
2056 case ir_txs:
2057 if (ir->lod_info.lod != NULL) {
2058 instr->src[src_number].src =
2059 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2060 instr->src[src_number].src_type = nir_tex_src_lod;
2061 src_number++;
2062 }
2063 break;
2064
2065 case ir_txd:
2066 instr->src[src_number].src =
2067 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2068 instr->src[src_number].src_type = nir_tex_src_ddx;
2069 src_number++;
2070 instr->src[src_number].src =
2071 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2072 instr->src[src_number].src_type = nir_tex_src_ddy;
2073 src_number++;
2074 break;
2075
2076 case ir_txf_ms:
2077 instr->src[src_number].src =
2078 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2079 instr->src[src_number].src_type = nir_tex_src_ms_index;
2080 src_number++;
2081 break;
2082
2083 case ir_tg4:
2084 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2085 break;
2086
2087 default:
2088 break;
2089 }
2090
2091 assert(src_number == num_srcs);
2092
2093 unsigned bit_size = glsl_get_bit_size(ir->type);
2094 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2095 }
2096
2097 void
2098 nir_visitor::visit(ir_constant *ir)
2099 {
2100 /*
2101 * We don't know if this variable is an array or struct that gets
2102 * dereferenced, so do the safe thing an make it a variable with a
2103 * constant initializer and return a dereference.
2104 */
2105
2106 nir_variable *var =
2107 nir_local_variable_create(this->impl, ir->type, "const_temp");
2108 var->data.read_only = true;
2109 var->constant_initializer = constant_copy(ir, var);
2110
2111 this->deref_head = nir_deref_var_create(this->shader, var);
2112 this->deref_tail = &this->deref_head->deref;
2113 }
2114
2115 void
2116 nir_visitor::visit(ir_dereference_variable *ir)
2117 {
2118 struct hash_entry *entry =
2119 _mesa_hash_table_search(this->var_table, ir->var);
2120 assert(entry);
2121 nir_variable *var = (nir_variable *) entry->data;
2122
2123 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2124 this->deref_head = deref;
2125 this->deref_tail = &deref->deref;
2126 }
2127
2128 void
2129 nir_visitor::visit(ir_dereference_record *ir)
2130 {
2131 ir->record->accept(this);
2132
2133 int field_index = this->deref_tail->type->field_index(ir->field);
2134 assert(field_index >= 0);
2135
2136 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2137 deref->deref.type = ir->type;
2138 this->deref_tail->child = &deref->deref;
2139 this->deref_tail = &deref->deref;
2140 }
2141
2142 void
2143 nir_visitor::visit(ir_dereference_array *ir)
2144 {
2145 nir_deref_array *deref = nir_deref_array_create(this->shader);
2146 deref->deref.type = ir->type;
2147
2148 ir_constant *const_index = ir->array_index->as_constant();
2149 if (const_index != NULL) {
2150 deref->deref_array_type = nir_deref_array_type_direct;
2151 deref->base_offset = const_index->value.u[0];
2152 } else {
2153 deref->deref_array_type = nir_deref_array_type_indirect;
2154 deref->indirect =
2155 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2156 }
2157
2158 ir->array->accept(this);
2159
2160 this->deref_tail->child = &deref->deref;
2161 ralloc_steal(this->deref_tail, deref);
2162 this->deref_tail = &deref->deref;
2163 }
2164
2165 void
2166 nir_visitor::visit(ir_barrier *)
2167 {
2168 nir_intrinsic_instr *instr =
2169 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2170 nir_builder_instr_insert(&b, &instr->instr);
2171 }