spirv: add ReadClockKHR support with device scope
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_builtin_builder.h"
38 #include "compiler/nir/nir_deref.h"
39 #include "main/errors.h"
40 #include "main/mtypes.h"
41 #include "main/shaderobj.h"
42 #include "util/u_math.h"
43
44 /*
45 * pass to lower GLSL IR to NIR
46 *
47 * This will lower variable dereferences to loads/stores of corresponding
48 * variables in NIR - the variables will be converted to registers in a later
49 * pass.
50 */
51
52 namespace {
53
54 class nir_visitor : public ir_visitor
55 {
56 public:
57 nir_visitor(gl_context *ctx, nir_shader *shader);
58 ~nir_visitor();
59
60 virtual void visit(ir_variable *);
61 virtual void visit(ir_function *);
62 virtual void visit(ir_function_signature *);
63 virtual void visit(ir_loop *);
64 virtual void visit(ir_if *);
65 virtual void visit(ir_discard *);
66 virtual void visit(ir_demote *);
67 virtual void visit(ir_loop_jump *);
68 virtual void visit(ir_return *);
69 virtual void visit(ir_call *);
70 virtual void visit(ir_assignment *);
71 virtual void visit(ir_emit_vertex *);
72 virtual void visit(ir_end_primitive *);
73 virtual void visit(ir_expression *);
74 virtual void visit(ir_swizzle *);
75 virtual void visit(ir_texture *);
76 virtual void visit(ir_constant *);
77 virtual void visit(ir_dereference_variable *);
78 virtual void visit(ir_dereference_record *);
79 virtual void visit(ir_dereference_array *);
80 virtual void visit(ir_barrier *);
81
82 void create_function(ir_function_signature *ir);
83
84 private:
85 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
86 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
87
88 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
89 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
90 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
91 nir_ssa_def *src2);
92 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
93 nir_ssa_def *src2, nir_ssa_def *src3);
94
95 bool supports_std430;
96
97 nir_shader *shader;
98 nir_function_impl *impl;
99 nir_builder b;
100 nir_ssa_def *result; /* result of the expression tree last visited */
101
102 nir_deref_instr *evaluate_deref(ir_instruction *ir);
103
104 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
105
106 /* most recent deref instruction created */
107 nir_deref_instr *deref;
108
109 /* whether the IR we're operating on is per-function or global */
110 bool is_global;
111
112 ir_function_signature *sig;
113
114 /* map of ir_variable -> nir_variable */
115 struct hash_table *var_table;
116
117 /* map of ir_function_signature -> nir_function_overload */
118 struct hash_table *overload_table;
119 };
120
121 /*
122 * This visitor runs before the main visitor, calling create_function() for
123 * each function so that the main visitor can resolve forward references in
124 * calls.
125 */
126
127 class nir_function_visitor : public ir_hierarchical_visitor
128 {
129 public:
130 nir_function_visitor(nir_visitor *v) : visitor(v)
131 {
132 }
133 virtual ir_visitor_status visit_enter(ir_function *);
134
135 private:
136 nir_visitor *visitor;
137 };
138
139 /* glsl_to_nir can only handle converting certain function paramaters
140 * to NIR. This visitor checks for parameters it can't currently handle.
141 */
142 class ir_function_param_visitor : public ir_hierarchical_visitor
143 {
144 public:
145 ir_function_param_visitor()
146 : unsupported(false)
147 {
148 }
149
150 virtual ir_visitor_status visit_enter(ir_function_signature *ir)
151 {
152
153 if (ir->is_intrinsic())
154 return visit_continue;
155
156 foreach_in_list(ir_variable, param, &ir->parameters) {
157 if (!param->type->is_vector() || !param->type->is_scalar()) {
158 unsupported = true;
159 return visit_stop;
160 }
161
162 if (param->data.mode == ir_var_function_inout) {
163 unsupported = true;
164 return visit_stop;
165 }
166 }
167
168 return visit_continue;
169 }
170
171 bool unsupported;
172 };
173
174 } /* end of anonymous namespace */
175
176
177 static bool
178 has_unsupported_function_param(exec_list *ir)
179 {
180 ir_function_param_visitor visitor;
181 visit_list_elements(&visitor, ir);
182 return visitor.unsupported;
183 }
184
185 nir_shader *
186 glsl_to_nir(struct gl_context *ctx,
187 const struct gl_shader_program *shader_prog,
188 gl_shader_stage stage,
189 const nir_shader_compiler_options *options)
190 {
191 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
192
193 const struct gl_shader_compiler_options *gl_options =
194 &ctx->Const.ShaderCompilerOptions[stage];
195
196 /* glsl_to_nir can only handle converting certain function paramaters
197 * to NIR. If we find something we can't handle then we get the GLSL IR
198 * opts to remove it before we continue on.
199 *
200 * TODO: add missing glsl ir to nir support and remove this loop.
201 */
202 while (has_unsupported_function_param(sh->ir)) {
203 do_common_optimization(sh->ir, true, true, gl_options,
204 ctx->Const.NativeIntegers);
205 }
206
207 nir_shader *shader = nir_shader_create(NULL, stage, options,
208 &sh->Program->info);
209
210 nir_visitor v1(ctx, shader);
211 nir_function_visitor v2(&v1);
212 v2.run(sh->ir);
213 visit_exec_list(sh->ir, &v1);
214
215 nir_validate_shader(shader, "after glsl to nir, before function inline");
216
217 /* We have to lower away local constant initializers right before we
218 * inline functions. That way they get properly initialized at the top
219 * of the function and not at the top of its caller.
220 */
221 nir_lower_variable_initializers(shader, (nir_variable_mode)~0);
222 nir_lower_returns(shader);
223 nir_inline_functions(shader);
224 nir_opt_deref(shader);
225
226 nir_validate_shader(shader, "after function inlining and return lowering");
227
228 /* Now that we have inlined everything remove all of the functions except
229 * main().
230 */
231 foreach_list_typed_safe(nir_function, function, node, &(shader)->functions){
232 if (strcmp("main", function->name) != 0) {
233 exec_node_remove(&function->node);
234 }
235 }
236
237 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
238 if (shader_prog->Label)
239 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
240
241 /* Check for transform feedback varyings specified via the API */
242 shader->info.has_transform_feedback_varyings =
243 shader_prog->TransformFeedback.NumVarying > 0;
244
245 /* Check for transform feedback varyings specified in the Shader */
246 if (shader_prog->last_vert_prog)
247 shader->info.has_transform_feedback_varyings |=
248 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
249
250 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
251 shader->info.fs.pixel_center_integer = sh->Program->info.fs.pixel_center_integer;
252 shader->info.fs.origin_upper_left = sh->Program->info.fs.origin_upper_left;
253 }
254
255 return shader;
256 }
257
258 nir_visitor::nir_visitor(gl_context *ctx, nir_shader *shader)
259 {
260 this->supports_std430 = ctx->Const.UseSTD430AsDefaultPacking;
261 this->shader = shader;
262 this->is_global = true;
263 this->var_table = _mesa_pointer_hash_table_create(NULL);
264 this->overload_table = _mesa_pointer_hash_table_create(NULL);
265 this->result = NULL;
266 this->impl = NULL;
267 this->deref = NULL;
268 this->sig = NULL;
269 memset(&this->b, 0, sizeof(this->b));
270 }
271
272 nir_visitor::~nir_visitor()
273 {
274 _mesa_hash_table_destroy(this->var_table, NULL);
275 _mesa_hash_table_destroy(this->overload_table, NULL);
276 }
277
278 nir_deref_instr *
279 nir_visitor::evaluate_deref(ir_instruction *ir)
280 {
281 ir->accept(this);
282 return this->deref;
283 }
284
285 nir_constant *
286 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
287 {
288 if (ir == NULL)
289 return NULL;
290
291 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
292
293 const unsigned rows = ir->type->vector_elements;
294 const unsigned cols = ir->type->matrix_columns;
295 unsigned i;
296
297 ret->num_elements = 0;
298 switch (ir->type->base_type) {
299 case GLSL_TYPE_UINT:
300 /* Only float base types can be matrices. */
301 assert(cols == 1);
302
303 for (unsigned r = 0; r < rows; r++)
304 ret->values[r].u32 = ir->value.u[r];
305
306 break;
307
308 case GLSL_TYPE_INT:
309 /* Only float base types can be matrices. */
310 assert(cols == 1);
311
312 for (unsigned r = 0; r < rows; r++)
313 ret->values[r].i32 = ir->value.i[r];
314
315 break;
316
317 case GLSL_TYPE_FLOAT:
318 case GLSL_TYPE_FLOAT16:
319 case GLSL_TYPE_DOUBLE:
320 if (cols > 1) {
321 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
322 ret->num_elements = cols;
323 for (unsigned c = 0; c < cols; c++) {
324 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
325 col_const->num_elements = 0;
326 switch (ir->type->base_type) {
327 case GLSL_TYPE_FLOAT:
328 for (unsigned r = 0; r < rows; r++)
329 col_const->values[r].f32 = ir->value.f[c * rows + r];
330 break;
331
332 case GLSL_TYPE_FLOAT16:
333 for (unsigned r = 0; r < rows; r++)
334 col_const->values[r].u16 = ir->value.f16[c * rows + r];
335 break;
336
337 case GLSL_TYPE_DOUBLE:
338 for (unsigned r = 0; r < rows; r++)
339 col_const->values[r].f64 = ir->value.d[c * rows + r];
340 break;
341
342 default:
343 unreachable("Cannot get here from the first level switch");
344 }
345 ret->elements[c] = col_const;
346 }
347 } else {
348 switch (ir->type->base_type) {
349 case GLSL_TYPE_FLOAT:
350 for (unsigned r = 0; r < rows; r++)
351 ret->values[r].f32 = ir->value.f[r];
352 break;
353
354 case GLSL_TYPE_FLOAT16:
355 for (unsigned r = 0; r < rows; r++)
356 ret->values[r].u16 = ir->value.f16[r];
357 break;
358
359 case GLSL_TYPE_DOUBLE:
360 for (unsigned r = 0; r < rows; r++)
361 ret->values[r].f64 = ir->value.d[r];
362 break;
363
364 default:
365 unreachable("Cannot get here from the first level switch");
366 }
367 }
368 break;
369
370 case GLSL_TYPE_UINT64:
371 /* Only float base types can be matrices. */
372 assert(cols == 1);
373
374 for (unsigned r = 0; r < rows; r++)
375 ret->values[r].u64 = ir->value.u64[r];
376 break;
377
378 case GLSL_TYPE_INT64:
379 /* Only float base types can be matrices. */
380 assert(cols == 1);
381
382 for (unsigned r = 0; r < rows; r++)
383 ret->values[r].i64 = ir->value.i64[r];
384 break;
385
386 case GLSL_TYPE_BOOL:
387 /* Only float base types can be matrices. */
388 assert(cols == 1);
389
390 for (unsigned r = 0; r < rows; r++)
391 ret->values[r].b = ir->value.b[r];
392
393 break;
394
395 case GLSL_TYPE_STRUCT:
396 case GLSL_TYPE_ARRAY:
397 ret->elements = ralloc_array(mem_ctx, nir_constant *,
398 ir->type->length);
399 ret->num_elements = ir->type->length;
400
401 for (i = 0; i < ir->type->length; i++)
402 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
403 break;
404
405 default:
406 unreachable("not reached");
407 }
408
409 return ret;
410 }
411
412 static const glsl_type *
413 wrap_type_in_array(const glsl_type *elem_type, const glsl_type *array_type)
414 {
415 if (!array_type->is_array())
416 return elem_type;
417
418 elem_type = wrap_type_in_array(elem_type, array_type->fields.array);
419
420 return glsl_type::get_array_instance(elem_type, array_type->length);
421 }
422
423 static unsigned
424 get_nir_how_declared(unsigned how_declared)
425 {
426 if (how_declared == ir_var_hidden)
427 return nir_var_hidden;
428
429 return nir_var_declared_normally;
430 }
431
432 void
433 nir_visitor::visit(ir_variable *ir)
434 {
435 /* TODO: In future we should switch to using the NIR lowering pass but for
436 * now just ignore these variables as GLSL IR should have lowered them.
437 * Anything remaining are just dead vars that weren't cleaned up.
438 */
439 if (ir->data.mode == ir_var_shader_shared)
440 return;
441
442 /* FINISHME: inout parameters */
443 assert(ir->data.mode != ir_var_function_inout);
444
445 if (ir->data.mode == ir_var_function_out)
446 return;
447
448 nir_variable *var = rzalloc(shader, nir_variable);
449 var->type = ir->type;
450 var->name = ralloc_strdup(var, ir->name);
451
452 var->data.always_active_io = ir->data.always_active_io;
453 var->data.read_only = ir->data.read_only;
454 var->data.centroid = ir->data.centroid;
455 var->data.sample = ir->data.sample;
456 var->data.patch = ir->data.patch;
457 var->data.how_declared = get_nir_how_declared(ir->data.how_declared);
458 var->data.invariant = ir->data.invariant;
459 var->data.location = ir->data.location;
460 var->data.stream = ir->data.stream;
461 if (ir->data.stream & (1u << 31))
462 var->data.stream |= NIR_STREAM_PACKED;
463
464 var->data.precision = ir->data.precision;
465 var->data.explicit_location = ir->data.explicit_location;
466 var->data.matrix_layout = ir->data.matrix_layout;
467 var->data.from_named_ifc_block = ir->data.from_named_ifc_block;
468 var->data.compact = false;
469
470 switch(ir->data.mode) {
471 case ir_var_auto:
472 case ir_var_temporary:
473 if (is_global)
474 var->data.mode = nir_var_shader_temp;
475 else
476 var->data.mode = nir_var_function_temp;
477 break;
478
479 case ir_var_function_in:
480 case ir_var_const_in:
481 var->data.mode = nir_var_function_temp;
482 break;
483
484 case ir_var_shader_in:
485 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
486 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
487 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
488 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
489 var->data.mode = nir_var_system_value;
490 } else {
491 var->data.mode = nir_var_shader_in;
492
493 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
494 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
495 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
496 var->data.compact = ir->type->without_array()->is_scalar();
497 }
498
499 if (shader->info.stage > MESA_SHADER_VERTEX &&
500 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
501 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
502 var->data.compact = ir->type->without_array()->is_scalar();
503 }
504 }
505 break;
506
507 case ir_var_shader_out:
508 var->data.mode = nir_var_shader_out;
509 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
510 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
511 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
512 var->data.compact = ir->type->without_array()->is_scalar();
513 }
514
515 if (shader->info.stage <= MESA_SHADER_GEOMETRY &&
516 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
517 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
518 var->data.compact = ir->type->without_array()->is_scalar();
519 }
520 break;
521
522 case ir_var_uniform:
523 if (ir->get_interface_type())
524 var->data.mode = nir_var_mem_ubo;
525 else
526 var->data.mode = nir_var_uniform;
527 break;
528
529 case ir_var_shader_storage:
530 var->data.mode = nir_var_mem_ssbo;
531 break;
532
533 case ir_var_system_value:
534 var->data.mode = nir_var_system_value;
535 break;
536
537 default:
538 unreachable("not reached");
539 }
540
541 unsigned mem_access = 0;
542 if (ir->data.memory_read_only)
543 mem_access |= ACCESS_NON_WRITEABLE;
544 if (ir->data.memory_write_only)
545 mem_access |= ACCESS_NON_READABLE;
546 if (ir->data.memory_coherent)
547 mem_access |= ACCESS_COHERENT;
548 if (ir->data.memory_volatile)
549 mem_access |= ACCESS_VOLATILE;
550 if (ir->data.memory_restrict)
551 mem_access |= ACCESS_RESTRICT;
552
553 var->interface_type = ir->get_interface_type();
554
555 /* For UBO and SSBO variables, we need explicit types */
556 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
557 const glsl_type *explicit_ifc_type =
558 ir->get_interface_type()->get_explicit_interface_type(supports_std430);
559
560 var->interface_type = explicit_ifc_type;
561
562 if (ir->type->without_array()->is_interface()) {
563 /* If the type contains the interface, wrap the explicit type in the
564 * right number of arrays.
565 */
566 var->type = wrap_type_in_array(explicit_ifc_type, ir->type);
567 } else {
568 /* Otherwise, this variable is one entry in the interface */
569 UNUSED bool found = false;
570 for (unsigned i = 0; i < explicit_ifc_type->length; i++) {
571 const glsl_struct_field *field =
572 &explicit_ifc_type->fields.structure[i];
573 if (strcmp(ir->name, field->name) != 0)
574 continue;
575
576 var->type = field->type;
577 if (field->memory_read_only)
578 mem_access |= ACCESS_NON_WRITEABLE;
579 if (field->memory_write_only)
580 mem_access |= ACCESS_NON_READABLE;
581 if (field->memory_coherent)
582 mem_access |= ACCESS_COHERENT;
583 if (field->memory_volatile)
584 mem_access |= ACCESS_VOLATILE;
585 if (field->memory_restrict)
586 mem_access |= ACCESS_RESTRICT;
587
588 found = true;
589 break;
590 }
591 assert(found);
592 }
593 }
594
595 var->data.interpolation = ir->data.interpolation;
596 var->data.location_frac = ir->data.location_frac;
597
598 switch (ir->data.depth_layout) {
599 case ir_depth_layout_none:
600 var->data.depth_layout = nir_depth_layout_none;
601 break;
602 case ir_depth_layout_any:
603 var->data.depth_layout = nir_depth_layout_any;
604 break;
605 case ir_depth_layout_greater:
606 var->data.depth_layout = nir_depth_layout_greater;
607 break;
608 case ir_depth_layout_less:
609 var->data.depth_layout = nir_depth_layout_less;
610 break;
611 case ir_depth_layout_unchanged:
612 var->data.depth_layout = nir_depth_layout_unchanged;
613 break;
614 default:
615 unreachable("not reached");
616 }
617
618 var->data.index = ir->data.index;
619 var->data.descriptor_set = 0;
620 var->data.binding = ir->data.binding;
621 var->data.explicit_binding = ir->data.explicit_binding;
622 var->data.bindless = ir->data.bindless;
623 var->data.offset = ir->data.offset;
624 var->data.access = (gl_access_qualifier)mem_access;
625
626 if (var->type->without_array()->is_image()) {
627 var->data.image.format = ir->data.image_format;
628 } else if (var->data.mode == nir_var_shader_out) {
629 var->data.xfb.buffer = ir->data.xfb_buffer;
630 var->data.xfb.stride = ir->data.xfb_stride;
631 }
632
633 var->data.fb_fetch_output = ir->data.fb_fetch_output;
634 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
635 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
636
637 var->num_state_slots = ir->get_num_state_slots();
638 if (var->num_state_slots > 0) {
639 var->state_slots = rzalloc_array(var, nir_state_slot,
640 var->num_state_slots);
641
642 ir_state_slot *state_slots = ir->get_state_slots();
643 for (unsigned i = 0; i < var->num_state_slots; i++) {
644 for (unsigned j = 0; j < 5; j++)
645 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
646 var->state_slots[i].swizzle = state_slots[i].swizzle;
647 }
648 } else {
649 var->state_slots = NULL;
650 }
651
652 var->constant_initializer = constant_copy(ir->constant_initializer, var);
653
654 if (var->data.mode == nir_var_function_temp)
655 nir_function_impl_add_variable(impl, var);
656 else
657 nir_shader_add_variable(shader, var);
658
659 _mesa_hash_table_insert(var_table, ir, var);
660 }
661
662 ir_visitor_status
663 nir_function_visitor::visit_enter(ir_function *ir)
664 {
665 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
666 visitor->create_function(sig);
667 }
668 return visit_continue_with_parent;
669 }
670
671 void
672 nir_visitor::create_function(ir_function_signature *ir)
673 {
674 if (ir->is_intrinsic())
675 return;
676
677 nir_function *func = nir_function_create(shader, ir->function_name());
678 if (strcmp(ir->function_name(), "main") == 0)
679 func->is_entrypoint = true;
680
681 func->num_params = ir->parameters.length() +
682 (ir->return_type != glsl_type::void_type);
683 func->params = ralloc_array(shader, nir_parameter, func->num_params);
684
685 unsigned np = 0;
686
687 if (ir->return_type != glsl_type::void_type) {
688 /* The return value is a variable deref (basically an out parameter) */
689 func->params[np].num_components = 1;
690 func->params[np].bit_size = 32;
691 np++;
692 }
693
694 foreach_in_list(ir_variable, param, &ir->parameters) {
695 /* FINISHME: pass arrays, structs, etc by reference? */
696 assert(param->type->is_vector() || param->type->is_scalar());
697
698 if (param->data.mode == ir_var_function_in) {
699 func->params[np].num_components = param->type->vector_elements;
700 func->params[np].bit_size = glsl_get_bit_size(param->type);
701 } else {
702 func->params[np].num_components = 1;
703 func->params[np].bit_size = 32;
704 }
705 np++;
706 }
707 assert(np == func->num_params);
708
709 _mesa_hash_table_insert(this->overload_table, ir, func);
710 }
711
712 void
713 nir_visitor::visit(ir_function *ir)
714 {
715 foreach_in_list(ir_function_signature, sig, &ir->signatures)
716 sig->accept(this);
717 }
718
719 void
720 nir_visitor::visit(ir_function_signature *ir)
721 {
722 if (ir->is_intrinsic())
723 return;
724
725 this->sig = ir;
726
727 struct hash_entry *entry =
728 _mesa_hash_table_search(this->overload_table, ir);
729
730 assert(entry);
731 nir_function *func = (nir_function *) entry->data;
732
733 if (ir->is_defined) {
734 nir_function_impl *impl = nir_function_impl_create(func);
735 this->impl = impl;
736
737 this->is_global = false;
738
739 nir_builder_init(&b, impl);
740 b.cursor = nir_after_cf_list(&impl->body);
741
742 unsigned i = (ir->return_type != glsl_type::void_type) ? 1 : 0;
743
744 foreach_in_list(ir_variable, param, &ir->parameters) {
745 nir_variable *var =
746 nir_local_variable_create(impl, param->type, param->name);
747
748 if (param->data.mode == ir_var_function_in) {
749 nir_store_var(&b, var, nir_load_param(&b, i), ~0);
750 }
751
752 _mesa_hash_table_insert(var_table, param, var);
753 i++;
754 }
755
756 visit_exec_list(&ir->body, this);
757
758 this->is_global = true;
759 } else {
760 func->impl = NULL;
761 }
762 }
763
764 void
765 nir_visitor::visit(ir_loop *ir)
766 {
767 nir_push_loop(&b);
768 visit_exec_list(&ir->body_instructions, this);
769 nir_pop_loop(&b, NULL);
770 }
771
772 void
773 nir_visitor::visit(ir_if *ir)
774 {
775 nir_push_if(&b, evaluate_rvalue(ir->condition));
776 visit_exec_list(&ir->then_instructions, this);
777 nir_push_else(&b, NULL);
778 visit_exec_list(&ir->else_instructions, this);
779 nir_pop_if(&b, NULL);
780 }
781
782 void
783 nir_visitor::visit(ir_discard *ir)
784 {
785 /*
786 * discards aren't treated as control flow, because before we lower them
787 * they can appear anywhere in the shader and the stuff after them may still
788 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
789 * discards will be immediately followed by a return.
790 */
791
792 nir_intrinsic_instr *discard;
793 if (ir->condition) {
794 discard = nir_intrinsic_instr_create(this->shader,
795 nir_intrinsic_discard_if);
796 discard->src[0] =
797 nir_src_for_ssa(evaluate_rvalue(ir->condition));
798 } else {
799 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
800 }
801
802 nir_builder_instr_insert(&b, &discard->instr);
803 }
804
805 void
806 nir_visitor::visit(ir_demote *ir)
807 {
808 nir_intrinsic_instr *demote =
809 nir_intrinsic_instr_create(this->shader, nir_intrinsic_demote);
810
811 nir_builder_instr_insert(&b, &demote->instr);
812 }
813
814 void
815 nir_visitor::visit(ir_emit_vertex *ir)
816 {
817 nir_intrinsic_instr *instr =
818 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
819 nir_intrinsic_set_stream_id(instr, ir->stream_id());
820 nir_builder_instr_insert(&b, &instr->instr);
821 }
822
823 void
824 nir_visitor::visit(ir_end_primitive *ir)
825 {
826 nir_intrinsic_instr *instr =
827 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
828 nir_intrinsic_set_stream_id(instr, ir->stream_id());
829 nir_builder_instr_insert(&b, &instr->instr);
830 }
831
832 void
833 nir_visitor::visit(ir_loop_jump *ir)
834 {
835 nir_jump_type type;
836 switch (ir->mode) {
837 case ir_loop_jump::jump_break:
838 type = nir_jump_break;
839 break;
840 case ir_loop_jump::jump_continue:
841 type = nir_jump_continue;
842 break;
843 default:
844 unreachable("not reached");
845 }
846
847 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
848 nir_builder_instr_insert(&b, &instr->instr);
849 }
850
851 void
852 nir_visitor::visit(ir_return *ir)
853 {
854 if (ir->value != NULL) {
855 nir_deref_instr *ret_deref =
856 nir_build_deref_cast(&b, nir_load_param(&b, 0),
857 nir_var_function_temp, ir->value->type, 0);
858
859 nir_ssa_def *val = evaluate_rvalue(ir->value);
860 nir_store_deref(&b, ret_deref, val, ~0);
861 }
862
863 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
864 nir_builder_instr_insert(&b, &instr->instr);
865 }
866
867 static void
868 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
869 {
870 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
871 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
872 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
873 }
874
875 /* Accumulate any qualifiers along the deref chain to get the actual
876 * load/store qualifier.
877 */
878
879 static enum gl_access_qualifier
880 deref_get_qualifier(nir_deref_instr *deref)
881 {
882 nir_deref_path path;
883 nir_deref_path_init(&path, deref, NULL);
884
885 unsigned qualifiers = path.path[0]->var->data.access;
886
887 const glsl_type *parent_type = path.path[0]->type;
888 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
889 nir_deref_instr *cur = *cur_ptr;
890
891 if (parent_type->is_interface()) {
892 const struct glsl_struct_field *field =
893 &parent_type->fields.structure[cur->strct.index];
894 if (field->memory_read_only)
895 qualifiers |= ACCESS_NON_WRITEABLE;
896 if (field->memory_write_only)
897 qualifiers |= ACCESS_NON_READABLE;
898 if (field->memory_coherent)
899 qualifiers |= ACCESS_COHERENT;
900 if (field->memory_volatile)
901 qualifiers |= ACCESS_VOLATILE;
902 if (field->memory_restrict)
903 qualifiers |= ACCESS_RESTRICT;
904 }
905
906 parent_type = cur->type;
907 }
908
909 nir_deref_path_finish(&path);
910
911 return (gl_access_qualifier) qualifiers;
912 }
913
914 void
915 nir_visitor::visit(ir_call *ir)
916 {
917 if (ir->callee->is_intrinsic()) {
918 nir_intrinsic_op op;
919
920 switch (ir->callee->intrinsic_id) {
921 case ir_intrinsic_generic_atomic_add:
922 op = ir->return_deref->type->is_integer_32_64()
923 ? nir_intrinsic_deref_atomic_add : nir_intrinsic_deref_atomic_fadd;
924 break;
925 case ir_intrinsic_generic_atomic_and:
926 op = nir_intrinsic_deref_atomic_and;
927 break;
928 case ir_intrinsic_generic_atomic_or:
929 op = nir_intrinsic_deref_atomic_or;
930 break;
931 case ir_intrinsic_generic_atomic_xor:
932 op = nir_intrinsic_deref_atomic_xor;
933 break;
934 case ir_intrinsic_generic_atomic_min:
935 assert(ir->return_deref);
936 if (ir->return_deref->type == glsl_type::int_type)
937 op = nir_intrinsic_deref_atomic_imin;
938 else if (ir->return_deref->type == glsl_type::uint_type)
939 op = nir_intrinsic_deref_atomic_umin;
940 else if (ir->return_deref->type == glsl_type::float_type)
941 op = nir_intrinsic_deref_atomic_fmin;
942 else
943 unreachable("Invalid type");
944 break;
945 case ir_intrinsic_generic_atomic_max:
946 assert(ir->return_deref);
947 if (ir->return_deref->type == glsl_type::int_type)
948 op = nir_intrinsic_deref_atomic_imax;
949 else if (ir->return_deref->type == glsl_type::uint_type)
950 op = nir_intrinsic_deref_atomic_umax;
951 else if (ir->return_deref->type == glsl_type::float_type)
952 op = nir_intrinsic_deref_atomic_fmax;
953 else
954 unreachable("Invalid type");
955 break;
956 case ir_intrinsic_generic_atomic_exchange:
957 op = nir_intrinsic_deref_atomic_exchange;
958 break;
959 case ir_intrinsic_generic_atomic_comp_swap:
960 op = ir->return_deref->type->is_integer_32_64()
961 ? nir_intrinsic_deref_atomic_comp_swap
962 : nir_intrinsic_deref_atomic_fcomp_swap;
963 break;
964 case ir_intrinsic_atomic_counter_read:
965 op = nir_intrinsic_atomic_counter_read_deref;
966 break;
967 case ir_intrinsic_atomic_counter_increment:
968 op = nir_intrinsic_atomic_counter_inc_deref;
969 break;
970 case ir_intrinsic_atomic_counter_predecrement:
971 op = nir_intrinsic_atomic_counter_pre_dec_deref;
972 break;
973 case ir_intrinsic_atomic_counter_add:
974 op = nir_intrinsic_atomic_counter_add_deref;
975 break;
976 case ir_intrinsic_atomic_counter_and:
977 op = nir_intrinsic_atomic_counter_and_deref;
978 break;
979 case ir_intrinsic_atomic_counter_or:
980 op = nir_intrinsic_atomic_counter_or_deref;
981 break;
982 case ir_intrinsic_atomic_counter_xor:
983 op = nir_intrinsic_atomic_counter_xor_deref;
984 break;
985 case ir_intrinsic_atomic_counter_min:
986 op = nir_intrinsic_atomic_counter_min_deref;
987 break;
988 case ir_intrinsic_atomic_counter_max:
989 op = nir_intrinsic_atomic_counter_max_deref;
990 break;
991 case ir_intrinsic_atomic_counter_exchange:
992 op = nir_intrinsic_atomic_counter_exchange_deref;
993 break;
994 case ir_intrinsic_atomic_counter_comp_swap:
995 op = nir_intrinsic_atomic_counter_comp_swap_deref;
996 break;
997 case ir_intrinsic_image_load:
998 op = nir_intrinsic_image_deref_load;
999 break;
1000 case ir_intrinsic_image_store:
1001 op = nir_intrinsic_image_deref_store;
1002 break;
1003 case ir_intrinsic_image_atomic_add:
1004 op = ir->return_deref->type->is_integer_32_64()
1005 ? nir_intrinsic_image_deref_atomic_add
1006 : nir_intrinsic_image_deref_atomic_fadd;
1007 break;
1008 case ir_intrinsic_image_atomic_min:
1009 if (ir->return_deref->type == glsl_type::int_type)
1010 op = nir_intrinsic_image_deref_atomic_imin;
1011 else if (ir->return_deref->type == glsl_type::uint_type)
1012 op = nir_intrinsic_image_deref_atomic_umin;
1013 else
1014 unreachable("Invalid type");
1015 break;
1016 case ir_intrinsic_image_atomic_max:
1017 if (ir->return_deref->type == glsl_type::int_type)
1018 op = nir_intrinsic_image_deref_atomic_imax;
1019 else if (ir->return_deref->type == glsl_type::uint_type)
1020 op = nir_intrinsic_image_deref_atomic_umax;
1021 else
1022 unreachable("Invalid type");
1023 break;
1024 case ir_intrinsic_image_atomic_and:
1025 op = nir_intrinsic_image_deref_atomic_and;
1026 break;
1027 case ir_intrinsic_image_atomic_or:
1028 op = nir_intrinsic_image_deref_atomic_or;
1029 break;
1030 case ir_intrinsic_image_atomic_xor:
1031 op = nir_intrinsic_image_deref_atomic_xor;
1032 break;
1033 case ir_intrinsic_image_atomic_exchange:
1034 op = nir_intrinsic_image_deref_atomic_exchange;
1035 break;
1036 case ir_intrinsic_image_atomic_comp_swap:
1037 op = nir_intrinsic_image_deref_atomic_comp_swap;
1038 break;
1039 case ir_intrinsic_image_atomic_inc_wrap:
1040 op = nir_intrinsic_image_deref_atomic_inc_wrap;
1041 break;
1042 case ir_intrinsic_image_atomic_dec_wrap:
1043 op = nir_intrinsic_image_deref_atomic_dec_wrap;
1044 break;
1045 case ir_intrinsic_memory_barrier:
1046 op = nir_intrinsic_memory_barrier;
1047 break;
1048 case ir_intrinsic_image_size:
1049 op = nir_intrinsic_image_deref_size;
1050 break;
1051 case ir_intrinsic_image_samples:
1052 op = nir_intrinsic_image_deref_samples;
1053 break;
1054 case ir_intrinsic_ssbo_store:
1055 case ir_intrinsic_ssbo_load:
1056 case ir_intrinsic_ssbo_atomic_add:
1057 case ir_intrinsic_ssbo_atomic_and:
1058 case ir_intrinsic_ssbo_atomic_or:
1059 case ir_intrinsic_ssbo_atomic_xor:
1060 case ir_intrinsic_ssbo_atomic_min:
1061 case ir_intrinsic_ssbo_atomic_max:
1062 case ir_intrinsic_ssbo_atomic_exchange:
1063 case ir_intrinsic_ssbo_atomic_comp_swap:
1064 /* SSBO store/loads should only have been lowered in GLSL IR for
1065 * non-nir drivers, NIR drivers make use of gl_nir_lower_buffers()
1066 * instead.
1067 */
1068 unreachable("Invalid operation nir doesn't want lowered ssbo "
1069 "store/loads");
1070 case ir_intrinsic_shader_clock:
1071 op = nir_intrinsic_shader_clock;
1072 break;
1073 case ir_intrinsic_begin_invocation_interlock:
1074 op = nir_intrinsic_begin_invocation_interlock;
1075 break;
1076 case ir_intrinsic_end_invocation_interlock:
1077 op = nir_intrinsic_end_invocation_interlock;
1078 break;
1079 case ir_intrinsic_group_memory_barrier:
1080 op = nir_intrinsic_group_memory_barrier;
1081 break;
1082 case ir_intrinsic_memory_barrier_atomic_counter:
1083 op = nir_intrinsic_memory_barrier_atomic_counter;
1084 break;
1085 case ir_intrinsic_memory_barrier_buffer:
1086 op = nir_intrinsic_memory_barrier_buffer;
1087 break;
1088 case ir_intrinsic_memory_barrier_image:
1089 op = nir_intrinsic_memory_barrier_image;
1090 break;
1091 case ir_intrinsic_memory_barrier_shared:
1092 op = nir_intrinsic_memory_barrier_shared;
1093 break;
1094 case ir_intrinsic_shared_load:
1095 op = nir_intrinsic_load_shared;
1096 break;
1097 case ir_intrinsic_shared_store:
1098 op = nir_intrinsic_store_shared;
1099 break;
1100 case ir_intrinsic_shared_atomic_add:
1101 op = ir->return_deref->type->is_integer_32_64()
1102 ? nir_intrinsic_shared_atomic_add
1103 : nir_intrinsic_shared_atomic_fadd;
1104 break;
1105 case ir_intrinsic_shared_atomic_and:
1106 op = nir_intrinsic_shared_atomic_and;
1107 break;
1108 case ir_intrinsic_shared_atomic_or:
1109 op = nir_intrinsic_shared_atomic_or;
1110 break;
1111 case ir_intrinsic_shared_atomic_xor:
1112 op = nir_intrinsic_shared_atomic_xor;
1113 break;
1114 case ir_intrinsic_shared_atomic_min:
1115 assert(ir->return_deref);
1116 if (ir->return_deref->type == glsl_type::int_type)
1117 op = nir_intrinsic_shared_atomic_imin;
1118 else if (ir->return_deref->type == glsl_type::uint_type)
1119 op = nir_intrinsic_shared_atomic_umin;
1120 else if (ir->return_deref->type == glsl_type::float_type)
1121 op = nir_intrinsic_shared_atomic_fmin;
1122 else
1123 unreachable("Invalid type");
1124 break;
1125 case ir_intrinsic_shared_atomic_max:
1126 assert(ir->return_deref);
1127 if (ir->return_deref->type == glsl_type::int_type)
1128 op = nir_intrinsic_shared_atomic_imax;
1129 else if (ir->return_deref->type == glsl_type::uint_type)
1130 op = nir_intrinsic_shared_atomic_umax;
1131 else if (ir->return_deref->type == glsl_type::float_type)
1132 op = nir_intrinsic_shared_atomic_fmax;
1133 else
1134 unreachable("Invalid type");
1135 break;
1136 case ir_intrinsic_shared_atomic_exchange:
1137 op = nir_intrinsic_shared_atomic_exchange;
1138 break;
1139 case ir_intrinsic_shared_atomic_comp_swap:
1140 op = ir->return_deref->type->is_integer_32_64()
1141 ? nir_intrinsic_shared_atomic_comp_swap
1142 : nir_intrinsic_shared_atomic_fcomp_swap;
1143 break;
1144 case ir_intrinsic_vote_any:
1145 op = nir_intrinsic_vote_any;
1146 break;
1147 case ir_intrinsic_vote_all:
1148 op = nir_intrinsic_vote_all;
1149 break;
1150 case ir_intrinsic_vote_eq:
1151 op = nir_intrinsic_vote_ieq;
1152 break;
1153 case ir_intrinsic_ballot:
1154 op = nir_intrinsic_ballot;
1155 break;
1156 case ir_intrinsic_read_invocation:
1157 op = nir_intrinsic_read_invocation;
1158 break;
1159 case ir_intrinsic_read_first_invocation:
1160 op = nir_intrinsic_read_first_invocation;
1161 break;
1162 case ir_intrinsic_helper_invocation:
1163 op = nir_intrinsic_is_helper_invocation;
1164 break;
1165 default:
1166 unreachable("not reached");
1167 }
1168
1169 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1170 nir_ssa_def *ret = &instr->dest.ssa;
1171
1172 switch (op) {
1173 case nir_intrinsic_deref_atomic_add:
1174 case nir_intrinsic_deref_atomic_imin:
1175 case nir_intrinsic_deref_atomic_umin:
1176 case nir_intrinsic_deref_atomic_imax:
1177 case nir_intrinsic_deref_atomic_umax:
1178 case nir_intrinsic_deref_atomic_and:
1179 case nir_intrinsic_deref_atomic_or:
1180 case nir_intrinsic_deref_atomic_xor:
1181 case nir_intrinsic_deref_atomic_exchange:
1182 case nir_intrinsic_deref_atomic_comp_swap:
1183 case nir_intrinsic_deref_atomic_fadd:
1184 case nir_intrinsic_deref_atomic_fmin:
1185 case nir_intrinsic_deref_atomic_fmax:
1186 case nir_intrinsic_deref_atomic_fcomp_swap: {
1187 int param_count = ir->actual_parameters.length();
1188 assert(param_count == 2 || param_count == 3);
1189
1190 /* Deref */
1191 exec_node *param = ir->actual_parameters.get_head();
1192 ir_rvalue *rvalue = (ir_rvalue *) param;
1193 ir_dereference *deref = rvalue->as_dereference();
1194 ir_swizzle *swizzle = NULL;
1195 if (!deref) {
1196 /* We may have a swizzle to pick off a single vec4 component */
1197 swizzle = rvalue->as_swizzle();
1198 assert(swizzle && swizzle->type->vector_elements == 1);
1199 deref = swizzle->val->as_dereference();
1200 assert(deref);
1201 }
1202 nir_deref_instr *nir_deref = evaluate_deref(deref);
1203 if (swizzle) {
1204 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1205 swizzle->mask.x);
1206 }
1207 instr->src[0] = nir_src_for_ssa(&nir_deref->dest.ssa);
1208
1209 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1210
1211 /* data1 parameter (this is always present) */
1212 param = param->get_next();
1213 ir_instruction *inst = (ir_instruction *) param;
1214 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1215
1216 /* data2 parameter (only with atomic_comp_swap) */
1217 if (param_count == 3) {
1218 assert(op == nir_intrinsic_deref_atomic_comp_swap ||
1219 op == nir_intrinsic_deref_atomic_fcomp_swap);
1220 param = param->get_next();
1221 inst = (ir_instruction *) param;
1222 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1223 }
1224
1225 /* Atomic result */
1226 assert(ir->return_deref);
1227 nir_ssa_dest_init(&instr->instr, &instr->dest,
1228 ir->return_deref->type->vector_elements, 32, NULL);
1229 nir_builder_instr_insert(&b, &instr->instr);
1230 break;
1231 }
1232 case nir_intrinsic_atomic_counter_read_deref:
1233 case nir_intrinsic_atomic_counter_inc_deref:
1234 case nir_intrinsic_atomic_counter_pre_dec_deref:
1235 case nir_intrinsic_atomic_counter_add_deref:
1236 case nir_intrinsic_atomic_counter_min_deref:
1237 case nir_intrinsic_atomic_counter_max_deref:
1238 case nir_intrinsic_atomic_counter_and_deref:
1239 case nir_intrinsic_atomic_counter_or_deref:
1240 case nir_intrinsic_atomic_counter_xor_deref:
1241 case nir_intrinsic_atomic_counter_exchange_deref:
1242 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1243 /* Set the counter variable dereference. */
1244 exec_node *param = ir->actual_parameters.get_head();
1245 ir_dereference *counter = (ir_dereference *)param;
1246
1247 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
1248 param = param->get_next();
1249
1250 /* Set the intrinsic destination. */
1251 if (ir->return_deref) {
1252 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1253 }
1254
1255 /* Set the intrinsic parameters. */
1256 if (!param->is_tail_sentinel()) {
1257 instr->src[1] =
1258 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1259 param = param->get_next();
1260 }
1261
1262 if (!param->is_tail_sentinel()) {
1263 instr->src[2] =
1264 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1265 param = param->get_next();
1266 }
1267
1268 nir_builder_instr_insert(&b, &instr->instr);
1269 break;
1270 }
1271 case nir_intrinsic_image_deref_load:
1272 case nir_intrinsic_image_deref_store:
1273 case nir_intrinsic_image_deref_atomic_add:
1274 case nir_intrinsic_image_deref_atomic_imin:
1275 case nir_intrinsic_image_deref_atomic_umin:
1276 case nir_intrinsic_image_deref_atomic_imax:
1277 case nir_intrinsic_image_deref_atomic_umax:
1278 case nir_intrinsic_image_deref_atomic_and:
1279 case nir_intrinsic_image_deref_atomic_or:
1280 case nir_intrinsic_image_deref_atomic_xor:
1281 case nir_intrinsic_image_deref_atomic_exchange:
1282 case nir_intrinsic_image_deref_atomic_comp_swap:
1283 case nir_intrinsic_image_deref_atomic_fadd:
1284 case nir_intrinsic_image_deref_samples:
1285 case nir_intrinsic_image_deref_size:
1286 case nir_intrinsic_image_deref_atomic_inc_wrap:
1287 case nir_intrinsic_image_deref_atomic_dec_wrap: {
1288 nir_ssa_undef_instr *instr_undef =
1289 nir_ssa_undef_instr_create(shader, 1, 32);
1290 nir_builder_instr_insert(&b, &instr_undef->instr);
1291
1292 /* Set the image variable dereference. */
1293 exec_node *param = ir->actual_parameters.get_head();
1294 ir_dereference *image = (ir_dereference *)param;
1295 nir_deref_instr *deref = evaluate_deref(image);
1296 const glsl_type *type = deref->type;
1297
1298 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1299
1300 instr->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1301 param = param->get_next();
1302
1303 /* Set the intrinsic destination. */
1304 if (ir->return_deref) {
1305 unsigned num_components = ir->return_deref->type->vector_elements;
1306 nir_ssa_dest_init(&instr->instr, &instr->dest,
1307 num_components, 32, NULL);
1308 }
1309
1310 if (op == nir_intrinsic_image_deref_size) {
1311 instr->num_components = instr->dest.ssa.num_components;
1312 } else if (op == nir_intrinsic_image_deref_load ||
1313 op == nir_intrinsic_image_deref_store) {
1314 instr->num_components = 4;
1315 }
1316
1317 if (op == nir_intrinsic_image_deref_size ||
1318 op == nir_intrinsic_image_deref_samples) {
1319 nir_builder_instr_insert(&b, &instr->instr);
1320 break;
1321 }
1322
1323 /* Set the address argument, extending the coordinate vector to four
1324 * components.
1325 */
1326 nir_ssa_def *src_addr =
1327 evaluate_rvalue((ir_dereference *)param);
1328 nir_ssa_def *srcs[4];
1329
1330 for (int i = 0; i < 4; i++) {
1331 if (i < type->coordinate_components())
1332 srcs[i] = nir_channel(&b, src_addr, i);
1333 else
1334 srcs[i] = &instr_undef->def;
1335 }
1336
1337 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1338 param = param->get_next();
1339
1340 /* Set the sample argument, which is undefined for single-sample
1341 * images.
1342 */
1343 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1344 instr->src[2] =
1345 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1346 param = param->get_next();
1347 } else {
1348 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
1349 }
1350
1351 /* Set the intrinsic parameters. */
1352 if (!param->is_tail_sentinel()) {
1353 instr->src[3] =
1354 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1355 param = param->get_next();
1356 } else if (op == nir_intrinsic_image_deref_load) {
1357 instr->src[3] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1358 }
1359
1360 if (!param->is_tail_sentinel()) {
1361 instr->src[4] =
1362 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1363 param = param->get_next();
1364 } else if (op == nir_intrinsic_image_deref_store) {
1365 instr->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1366 }
1367
1368 nir_builder_instr_insert(&b, &instr->instr);
1369 break;
1370 }
1371 case nir_intrinsic_memory_barrier:
1372 case nir_intrinsic_group_memory_barrier:
1373 case nir_intrinsic_memory_barrier_atomic_counter:
1374 case nir_intrinsic_memory_barrier_buffer:
1375 case nir_intrinsic_memory_barrier_image:
1376 case nir_intrinsic_memory_barrier_shared:
1377 nir_builder_instr_insert(&b, &instr->instr);
1378 break;
1379 case nir_intrinsic_shader_clock:
1380 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
1381 instr->num_components = 2;
1382 nir_intrinsic_set_memory_scope(instr, NIR_SCOPE_SUBGROUP);
1383 nir_builder_instr_insert(&b, &instr->instr);
1384 break;
1385 case nir_intrinsic_begin_invocation_interlock:
1386 nir_builder_instr_insert(&b, &instr->instr);
1387 break;
1388 case nir_intrinsic_end_invocation_interlock:
1389 nir_builder_instr_insert(&b, &instr->instr);
1390 break;
1391 case nir_intrinsic_store_ssbo: {
1392 exec_node *param = ir->actual_parameters.get_head();
1393 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1394
1395 param = param->get_next();
1396 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1397
1398 param = param->get_next();
1399 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1400
1401 param = param->get_next();
1402 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1403 assert(write_mask);
1404
1405 nir_ssa_def *nir_val = evaluate_rvalue(val);
1406 if (val->type->is_boolean())
1407 nir_val = nir_b2i32(&b, nir_val);
1408
1409 instr->src[0] = nir_src_for_ssa(nir_val);
1410 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1411 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1412 intrinsic_set_std430_align(instr, val->type);
1413 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1414 instr->num_components = val->type->vector_elements;
1415
1416 nir_builder_instr_insert(&b, &instr->instr);
1417 break;
1418 }
1419 case nir_intrinsic_load_shared: {
1420 exec_node *param = ir->actual_parameters.get_head();
1421 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1422
1423 nir_intrinsic_set_base(instr, 0);
1424 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1425
1426 const glsl_type *type = ir->return_deref->var->type;
1427 instr->num_components = type->vector_elements;
1428 intrinsic_set_std430_align(instr, type);
1429
1430 /* Setup destination register */
1431 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1432 nir_ssa_dest_init(&instr->instr, &instr->dest,
1433 type->vector_elements, bit_size, NULL);
1434
1435 nir_builder_instr_insert(&b, &instr->instr);
1436
1437 /* The value in shared memory is a 32-bit value */
1438 if (type->is_boolean())
1439 ret = nir_b2b1(&b, &instr->dest.ssa);
1440 break;
1441 }
1442 case nir_intrinsic_store_shared: {
1443 exec_node *param = ir->actual_parameters.get_head();
1444 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1445
1446 param = param->get_next();
1447 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1448
1449 param = param->get_next();
1450 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1451 assert(write_mask);
1452
1453 nir_intrinsic_set_base(instr, 0);
1454 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1455
1456 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1457
1458 nir_ssa_def *nir_val = evaluate_rvalue(val);
1459 /* The value in shared memory is a 32-bit value */
1460 if (val->type->is_boolean())
1461 nir_val = nir_b2b32(&b, nir_val);
1462
1463 instr->src[0] = nir_src_for_ssa(nir_val);
1464 instr->num_components = val->type->vector_elements;
1465 intrinsic_set_std430_align(instr, val->type);
1466
1467 nir_builder_instr_insert(&b, &instr->instr);
1468 break;
1469 }
1470 case nir_intrinsic_shared_atomic_add:
1471 case nir_intrinsic_shared_atomic_imin:
1472 case nir_intrinsic_shared_atomic_umin:
1473 case nir_intrinsic_shared_atomic_imax:
1474 case nir_intrinsic_shared_atomic_umax:
1475 case nir_intrinsic_shared_atomic_and:
1476 case nir_intrinsic_shared_atomic_or:
1477 case nir_intrinsic_shared_atomic_xor:
1478 case nir_intrinsic_shared_atomic_exchange:
1479 case nir_intrinsic_shared_atomic_comp_swap:
1480 case nir_intrinsic_shared_atomic_fadd:
1481 case nir_intrinsic_shared_atomic_fmin:
1482 case nir_intrinsic_shared_atomic_fmax:
1483 case nir_intrinsic_shared_atomic_fcomp_swap: {
1484 int param_count = ir->actual_parameters.length();
1485 assert(param_count == 2 || param_count == 3);
1486
1487 /* Offset */
1488 exec_node *param = ir->actual_parameters.get_head();
1489 ir_instruction *inst = (ir_instruction *) param;
1490 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1491
1492 /* data1 parameter (this is always present) */
1493 param = param->get_next();
1494 inst = (ir_instruction *) param;
1495 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1496
1497 /* data2 parameter (only with atomic_comp_swap) */
1498 if (param_count == 3) {
1499 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1500 op == nir_intrinsic_shared_atomic_fcomp_swap);
1501 param = param->get_next();
1502 inst = (ir_instruction *) param;
1503 instr->src[2] =
1504 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1505 }
1506
1507 /* Atomic result */
1508 assert(ir->return_deref);
1509 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1510 nir_ssa_dest_init(&instr->instr, &instr->dest,
1511 ir->return_deref->type->vector_elements,
1512 bit_size, NULL);
1513 nir_builder_instr_insert(&b, &instr->instr);
1514 break;
1515 }
1516 case nir_intrinsic_vote_any:
1517 case nir_intrinsic_vote_all:
1518 case nir_intrinsic_vote_ieq: {
1519 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1520 instr->num_components = 1;
1521
1522 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1523 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1524
1525 nir_builder_instr_insert(&b, &instr->instr);
1526 break;
1527 }
1528
1529 case nir_intrinsic_ballot: {
1530 nir_ssa_dest_init(&instr->instr, &instr->dest,
1531 ir->return_deref->type->vector_elements, 64, NULL);
1532 instr->num_components = ir->return_deref->type->vector_elements;
1533
1534 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1535 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1536
1537 nir_builder_instr_insert(&b, &instr->instr);
1538 break;
1539 }
1540 case nir_intrinsic_read_invocation: {
1541 nir_ssa_dest_init(&instr->instr, &instr->dest,
1542 ir->return_deref->type->vector_elements, 32, NULL);
1543 instr->num_components = ir->return_deref->type->vector_elements;
1544
1545 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1546 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1547
1548 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1549 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1550
1551 nir_builder_instr_insert(&b, &instr->instr);
1552 break;
1553 }
1554 case nir_intrinsic_read_first_invocation: {
1555 nir_ssa_dest_init(&instr->instr, &instr->dest,
1556 ir->return_deref->type->vector_elements, 32, NULL);
1557 instr->num_components = ir->return_deref->type->vector_elements;
1558
1559 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1560 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1561
1562 nir_builder_instr_insert(&b, &instr->instr);
1563 break;
1564 }
1565 case nir_intrinsic_is_helper_invocation: {
1566 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1567 instr->num_components = 1;
1568 nir_builder_instr_insert(&b, &instr->instr);
1569 break;
1570 }
1571 default:
1572 unreachable("not reached");
1573 }
1574
1575 if (ir->return_deref)
1576 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1577
1578 return;
1579 }
1580
1581 struct hash_entry *entry =
1582 _mesa_hash_table_search(this->overload_table, ir->callee);
1583 assert(entry);
1584 nir_function *callee = (nir_function *) entry->data;
1585
1586 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1587
1588 unsigned i = 0;
1589 nir_deref_instr *ret_deref = NULL;
1590 if (ir->return_deref) {
1591 nir_variable *ret_tmp =
1592 nir_local_variable_create(this->impl, ir->return_deref->type,
1593 "return_tmp");
1594 ret_deref = nir_build_deref_var(&b, ret_tmp);
1595 call->params[i++] = nir_src_for_ssa(&ret_deref->dest.ssa);
1596 }
1597
1598 foreach_two_lists(formal_node, &ir->callee->parameters,
1599 actual_node, &ir->actual_parameters) {
1600 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1601 ir_variable *sig_param = (ir_variable *) formal_node;
1602
1603 if (sig_param->data.mode == ir_var_function_out) {
1604 nir_deref_instr *out_deref = evaluate_deref(param_rvalue);
1605 call->params[i] = nir_src_for_ssa(&out_deref->dest.ssa);
1606 } else if (sig_param->data.mode == ir_var_function_in) {
1607 nir_ssa_def *val = evaluate_rvalue(param_rvalue);
1608 nir_src src = nir_src_for_ssa(val);
1609
1610 nir_src_copy(&call->params[i], &src, call);
1611 } else if (sig_param->data.mode == ir_var_function_inout) {
1612 unreachable("unimplemented: inout parameters");
1613 }
1614
1615 i++;
1616 }
1617
1618 nir_builder_instr_insert(&b, &call->instr);
1619
1620 if (ir->return_deref)
1621 nir_store_deref(&b, evaluate_deref(ir->return_deref), nir_load_deref(&b, ret_deref), ~0);
1622 }
1623
1624 void
1625 nir_visitor::visit(ir_assignment *ir)
1626 {
1627 unsigned num_components = ir->lhs->type->vector_elements;
1628
1629 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1630 ir->lhs->variable_referenced()->data.precise;
1631
1632 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1633 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1634 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1635 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1636 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1637 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1638 if (ir->condition) {
1639 nir_push_if(&b, evaluate_rvalue(ir->condition));
1640 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1641 rhs_qualifiers);
1642 nir_pop_if(&b, NULL);
1643 } else {
1644 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1645 rhs_qualifiers);
1646 }
1647 return;
1648 }
1649
1650 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1651
1652 ir->lhs->accept(this);
1653 nir_deref_instr *lhs_deref = this->deref;
1654 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1655
1656 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1657 /* GLSL IR will give us the input to the write-masked assignment in a
1658 * single packed vector. So, for example, if the writemask is xzw, then
1659 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1660 * from the load.
1661 */
1662 unsigned swiz[4];
1663 unsigned component = 0;
1664 for (unsigned i = 0; i < 4; i++) {
1665 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1666 }
1667 src = nir_swizzle(&b, src, swiz, num_components);
1668 }
1669
1670 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1671 if (ir->condition) {
1672 nir_push_if(&b, evaluate_rvalue(ir->condition));
1673 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1674 qualifiers);
1675 nir_pop_if(&b, NULL);
1676 } else {
1677 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1678 qualifiers);
1679 }
1680 }
1681
1682 /*
1683 * Given an instruction, returns a pointer to its destination or NULL if there
1684 * is no destination.
1685 *
1686 * Note that this only handles instructions we generate at this level.
1687 */
1688 static nir_dest *
1689 get_instr_dest(nir_instr *instr)
1690 {
1691 nir_alu_instr *alu_instr;
1692 nir_intrinsic_instr *intrinsic_instr;
1693 nir_tex_instr *tex_instr;
1694
1695 switch (instr->type) {
1696 case nir_instr_type_alu:
1697 alu_instr = nir_instr_as_alu(instr);
1698 return &alu_instr->dest.dest;
1699
1700 case nir_instr_type_intrinsic:
1701 intrinsic_instr = nir_instr_as_intrinsic(instr);
1702 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1703 return &intrinsic_instr->dest;
1704 else
1705 return NULL;
1706
1707 case nir_instr_type_tex:
1708 tex_instr = nir_instr_as_tex(instr);
1709 return &tex_instr->dest;
1710
1711 default:
1712 unreachable("not reached");
1713 }
1714
1715 return NULL;
1716 }
1717
1718 void
1719 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1720 unsigned bit_size)
1721 {
1722 nir_dest *dest = get_instr_dest(instr);
1723
1724 if (dest)
1725 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1726
1727 nir_builder_instr_insert(&b, instr);
1728
1729 if (dest) {
1730 assert(dest->is_ssa);
1731 this->result = &dest->ssa;
1732 }
1733 }
1734
1735 nir_ssa_def *
1736 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1737 {
1738 ir->accept(this);
1739 if (ir->as_dereference() || ir->as_constant()) {
1740 /*
1741 * A dereference is being used on the right hand side, which means we
1742 * must emit a variable load.
1743 */
1744
1745 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1746 this->result = nir_load_deref_with_access(&b, this->deref, access);
1747 }
1748
1749 return this->result;
1750 }
1751
1752 static bool
1753 type_is_float(glsl_base_type type)
1754 {
1755 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1756 type == GLSL_TYPE_FLOAT16;
1757 }
1758
1759 static bool
1760 type_is_signed(glsl_base_type type)
1761 {
1762 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1763 type == GLSL_TYPE_INT16;
1764 }
1765
1766 void
1767 nir_visitor::visit(ir_expression *ir)
1768 {
1769 /* Some special cases */
1770 switch (ir->operation) {
1771 case ir_unop_interpolate_at_centroid:
1772 case ir_binop_interpolate_at_offset:
1773 case ir_binop_interpolate_at_sample: {
1774 ir_dereference *deref = ir->operands[0]->as_dereference();
1775 ir_swizzle *swizzle = NULL;
1776 if (!deref) {
1777 /* the api does not allow a swizzle here, but the varying packing code
1778 * may have pushed one into here.
1779 */
1780 swizzle = ir->operands[0]->as_swizzle();
1781 assert(swizzle);
1782 deref = swizzle->val->as_dereference();
1783 assert(deref);
1784 }
1785
1786 deref->accept(this);
1787
1788 nir_intrinsic_op op;
1789 if (this->deref->mode == nir_var_shader_in) {
1790 switch (ir->operation) {
1791 case ir_unop_interpolate_at_centroid:
1792 op = nir_intrinsic_interp_deref_at_centroid;
1793 break;
1794 case ir_binop_interpolate_at_offset:
1795 op = nir_intrinsic_interp_deref_at_offset;
1796 break;
1797 case ir_binop_interpolate_at_sample:
1798 op = nir_intrinsic_interp_deref_at_sample;
1799 break;
1800 default:
1801 unreachable("Invalid interpolation intrinsic");
1802 }
1803 } else {
1804 /* This case can happen if the vertex shader does not write the
1805 * given varying. In this case, the linker will lower it to a
1806 * global variable. Since interpolating a variable makes no
1807 * sense, we'll just turn it into a load which will probably
1808 * eventually end up as an SSA definition.
1809 */
1810 assert(this->deref->mode == nir_var_shader_temp);
1811 op = nir_intrinsic_load_deref;
1812 }
1813
1814 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1815 intrin->num_components = deref->type->vector_elements;
1816 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1817
1818 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1819 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1820 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1821
1822 unsigned bit_size = glsl_get_bit_size(deref->type);
1823 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1824
1825 if (swizzle) {
1826 unsigned swiz[4] = {
1827 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1828 };
1829
1830 result = nir_swizzle(&b, result, swiz,
1831 swizzle->type->vector_elements);
1832 }
1833
1834 return;
1835 }
1836
1837 case ir_unop_ssbo_unsized_array_length: {
1838 nir_intrinsic_instr *intrin =
1839 nir_intrinsic_instr_create(b.shader,
1840 nir_intrinsic_deref_buffer_array_length);
1841
1842 ir_dereference *deref = ir->operands[0]->as_dereference();
1843 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->dest.ssa);
1844
1845 add_instr(&intrin->instr, 1, 32);
1846 return;
1847 }
1848
1849 case ir_binop_ubo_load:
1850 /* UBO loads should only have been lowered in GLSL IR for non-nir drivers,
1851 * NIR drivers make use of gl_nir_lower_buffers() instead.
1852 */
1853 unreachable("Invalid operation nir doesn't want lowered ubo loads");
1854 default:
1855 break;
1856 }
1857
1858 nir_ssa_def *srcs[4];
1859 for (unsigned i = 0; i < ir->num_operands; i++)
1860 srcs[i] = evaluate_rvalue(ir->operands[i]);
1861
1862 glsl_base_type types[4];
1863 for (unsigned i = 0; i < ir->num_operands; i++)
1864 types[i] = ir->operands[i]->type->base_type;
1865
1866 glsl_base_type out_type = ir->type->base_type;
1867
1868 switch (ir->operation) {
1869 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1870 case ir_unop_logic_not:
1871 result = nir_inot(&b, srcs[0]);
1872 break;
1873 case ir_unop_neg:
1874 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1875 : nir_ineg(&b, srcs[0]);
1876 break;
1877 case ir_unop_abs:
1878 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1879 : nir_iabs(&b, srcs[0]);
1880 break;
1881 case ir_unop_clz:
1882 result = nir_uclz(&b, srcs[0]);
1883 break;
1884 case ir_unop_saturate:
1885 assert(type_is_float(types[0]));
1886 result = nir_fsat(&b, srcs[0]);
1887 break;
1888 case ir_unop_sign:
1889 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1890 : nir_isign(&b, srcs[0]);
1891 break;
1892 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1893 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1894 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1895 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1896 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1897 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1898 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1899 case ir_unop_i2f:
1900 case ir_unop_u2f:
1901 case ir_unop_b2f:
1902 case ir_unop_f2i:
1903 case ir_unop_f2u:
1904 case ir_unop_f2b:
1905 case ir_unop_i2b:
1906 case ir_unop_b2i:
1907 case ir_unop_b2i64:
1908 case ir_unop_d2f:
1909 case ir_unop_f2d:
1910 case ir_unop_f162f:
1911 case ir_unop_f2f16:
1912 case ir_unop_f162b:
1913 case ir_unop_b2f16:
1914 case ir_unop_d2i:
1915 case ir_unop_d2u:
1916 case ir_unop_d2b:
1917 case ir_unop_i2d:
1918 case ir_unop_u2d:
1919 case ir_unop_i642i:
1920 case ir_unop_i642u:
1921 case ir_unop_i642f:
1922 case ir_unop_i642b:
1923 case ir_unop_i642d:
1924 case ir_unop_u642i:
1925 case ir_unop_u642u:
1926 case ir_unop_u642f:
1927 case ir_unop_u642d:
1928 case ir_unop_i2i64:
1929 case ir_unop_u2i64:
1930 case ir_unop_f2i64:
1931 case ir_unop_d2i64:
1932 case ir_unop_i2u64:
1933 case ir_unop_u2u64:
1934 case ir_unop_f2u64:
1935 case ir_unop_d2u64:
1936 case ir_unop_i2u:
1937 case ir_unop_u2i:
1938 case ir_unop_i642u64:
1939 case ir_unop_u642i64: {
1940 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1941 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1942 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1943 nir_rounding_mode_undef),
1944 srcs[0], NULL, NULL, NULL);
1945 /* b2i and b2f don't have fixed bit-size versions so the builder will
1946 * just assume 32 and we have to fix it up here.
1947 */
1948 result->bit_size = nir_alu_type_get_type_size(dst_type);
1949 break;
1950 }
1951
1952 case ir_unop_f2fmp: {
1953 result = nir_build_alu(&b, nir_op_f2fmp, srcs[0], NULL, NULL, NULL);
1954 break;
1955 }
1956
1957 case ir_unop_bitcast_i2f:
1958 case ir_unop_bitcast_f2i:
1959 case ir_unop_bitcast_u2f:
1960 case ir_unop_bitcast_f2u:
1961 case ir_unop_bitcast_i642d:
1962 case ir_unop_bitcast_d2i64:
1963 case ir_unop_bitcast_u642d:
1964 case ir_unop_bitcast_d2u64:
1965 case ir_unop_subroutine_to_int:
1966 /* no-op */
1967 result = nir_mov(&b, srcs[0]);
1968 break;
1969 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1970 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1971 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1972 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1973 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1974 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1975 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1976 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1977 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1978 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1979 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1980 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1981 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1982 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1983 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1984 case ir_unop_pack_snorm_2x16:
1985 result = nir_pack_snorm_2x16(&b, srcs[0]);
1986 break;
1987 case ir_unop_pack_snorm_4x8:
1988 result = nir_pack_snorm_4x8(&b, srcs[0]);
1989 break;
1990 case ir_unop_pack_unorm_2x16:
1991 result = nir_pack_unorm_2x16(&b, srcs[0]);
1992 break;
1993 case ir_unop_pack_unorm_4x8:
1994 result = nir_pack_unorm_4x8(&b, srcs[0]);
1995 break;
1996 case ir_unop_pack_half_2x16:
1997 result = nir_pack_half_2x16(&b, srcs[0]);
1998 break;
1999 case ir_unop_unpack_snorm_2x16:
2000 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2001 break;
2002 case ir_unop_unpack_snorm_4x8:
2003 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2004 break;
2005 case ir_unop_unpack_unorm_2x16:
2006 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2007 break;
2008 case ir_unop_unpack_unorm_4x8:
2009 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2010 break;
2011 case ir_unop_unpack_half_2x16:
2012 result = nir_unpack_half_2x16(&b, srcs[0]);
2013 break;
2014 case ir_unop_pack_sampler_2x32:
2015 case ir_unop_pack_image_2x32:
2016 case ir_unop_pack_double_2x32:
2017 case ir_unop_pack_int_2x32:
2018 case ir_unop_pack_uint_2x32:
2019 result = nir_pack_64_2x32(&b, srcs[0]);
2020 break;
2021 case ir_unop_unpack_sampler_2x32:
2022 case ir_unop_unpack_image_2x32:
2023 case ir_unop_unpack_double_2x32:
2024 case ir_unop_unpack_int_2x32:
2025 case ir_unop_unpack_uint_2x32:
2026 result = nir_unpack_64_2x32(&b, srcs[0]);
2027 break;
2028 case ir_unop_bitfield_reverse:
2029 result = nir_bitfield_reverse(&b, srcs[0]);
2030 break;
2031 case ir_unop_bit_count:
2032 result = nir_bit_count(&b, srcs[0]);
2033 break;
2034 case ir_unop_find_msb:
2035 switch (types[0]) {
2036 case GLSL_TYPE_UINT:
2037 result = nir_ufind_msb(&b, srcs[0]);
2038 break;
2039 case GLSL_TYPE_INT:
2040 result = nir_ifind_msb(&b, srcs[0]);
2041 break;
2042 default:
2043 unreachable("Invalid type for findMSB()");
2044 }
2045 break;
2046 case ir_unop_find_lsb:
2047 result = nir_find_lsb(&b, srcs[0]);
2048 break;
2049
2050 case ir_unop_get_buffer_size: {
2051 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2052 this->shader,
2053 nir_intrinsic_get_buffer_size);
2054 load->num_components = ir->type->vector_elements;
2055 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2056 unsigned bit_size = glsl_get_bit_size(ir->type);
2057 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2058 return;
2059 }
2060
2061 case ir_unop_atan:
2062 result = nir_atan(&b, srcs[0]);
2063 break;
2064
2065 case ir_binop_add:
2066 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2067 : nir_iadd(&b, srcs[0], srcs[1]);
2068 break;
2069 case ir_binop_add_sat:
2070 result = type_is_signed(out_type) ? nir_iadd_sat(&b, srcs[0], srcs[1])
2071 : nir_uadd_sat(&b, srcs[0], srcs[1]);
2072 break;
2073 case ir_binop_sub:
2074 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2075 : nir_isub(&b, srcs[0], srcs[1]);
2076 break;
2077 case ir_binop_sub_sat:
2078 result = type_is_signed(out_type) ? nir_isub_sat(&b, srcs[0], srcs[1])
2079 : nir_usub_sat(&b, srcs[0], srcs[1]);
2080 break;
2081 case ir_binop_abs_sub:
2082 /* out_type is always unsigned for ir_binop_abs_sub, so we have to key
2083 * on the type of the sources.
2084 */
2085 result = type_is_signed(types[0]) ? nir_uabs_isub(&b, srcs[0], srcs[1])
2086 : nir_uabs_usub(&b, srcs[0], srcs[1]);
2087 break;
2088 case ir_binop_avg:
2089 result = type_is_signed(out_type) ? nir_ihadd(&b, srcs[0], srcs[1])
2090 : nir_uhadd(&b, srcs[0], srcs[1]);
2091 break;
2092 case ir_binop_avg_round:
2093 result = type_is_signed(out_type) ? nir_irhadd(&b, srcs[0], srcs[1])
2094 : nir_urhadd(&b, srcs[0], srcs[1]);
2095 break;
2096 case ir_binop_mul_32x16:
2097 result = type_is_signed(out_type) ? nir_imul_32x16(&b, srcs[0], srcs[1])
2098 : nir_umul_32x16(&b, srcs[0], srcs[1]);
2099 break;
2100 case ir_binop_mul:
2101 if (type_is_float(out_type))
2102 result = nir_fmul(&b, srcs[0], srcs[1]);
2103 else if (out_type == GLSL_TYPE_INT64 &&
2104 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2105 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2106 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2107 else if (out_type == GLSL_TYPE_UINT64 &&
2108 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2109 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2110 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2111 else
2112 result = nir_imul(&b, srcs[0], srcs[1]);
2113 break;
2114 case ir_binop_div:
2115 if (type_is_float(out_type))
2116 result = nir_fdiv(&b, srcs[0], srcs[1]);
2117 else if (type_is_signed(out_type))
2118 result = nir_idiv(&b, srcs[0], srcs[1]);
2119 else
2120 result = nir_udiv(&b, srcs[0], srcs[1]);
2121 break;
2122 case ir_binop_mod:
2123 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2124 : nir_umod(&b, srcs[0], srcs[1]);
2125 break;
2126 case ir_binop_min:
2127 if (type_is_float(out_type))
2128 result = nir_fmin(&b, srcs[0], srcs[1]);
2129 else if (type_is_signed(out_type))
2130 result = nir_imin(&b, srcs[0], srcs[1]);
2131 else
2132 result = nir_umin(&b, srcs[0], srcs[1]);
2133 break;
2134 case ir_binop_max:
2135 if (type_is_float(out_type))
2136 result = nir_fmax(&b, srcs[0], srcs[1]);
2137 else if (type_is_signed(out_type))
2138 result = nir_imax(&b, srcs[0], srcs[1]);
2139 else
2140 result = nir_umax(&b, srcs[0], srcs[1]);
2141 break;
2142 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2143 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2144 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2145 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2146 case ir_binop_logic_and:
2147 result = nir_iand(&b, srcs[0], srcs[1]);
2148 break;
2149 case ir_binop_logic_or:
2150 result = nir_ior(&b, srcs[0], srcs[1]);
2151 break;
2152 case ir_binop_logic_xor:
2153 result = nir_ixor(&b, srcs[0], srcs[1]);
2154 break;
2155 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
2156 case ir_binop_rshift:
2157 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
2158 : nir_ushr(&b, srcs[0], srcs[1]);
2159 break;
2160 case ir_binop_imul_high:
2161 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2162 : nir_umul_high(&b, srcs[0], srcs[1]);
2163 break;
2164 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2165 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2166 case ir_binop_less:
2167 if (type_is_float(types[0]))
2168 result = nir_flt(&b, srcs[0], srcs[1]);
2169 else if (type_is_signed(types[0]))
2170 result = nir_ilt(&b, srcs[0], srcs[1]);
2171 else
2172 result = nir_ult(&b, srcs[0], srcs[1]);
2173 break;
2174 case ir_binop_gequal:
2175 if (type_is_float(types[0]))
2176 result = nir_fge(&b, srcs[0], srcs[1]);
2177 else if (type_is_signed(types[0]))
2178 result = nir_ige(&b, srcs[0], srcs[1]);
2179 else
2180 result = nir_uge(&b, srcs[0], srcs[1]);
2181 break;
2182 case ir_binop_equal:
2183 if (type_is_float(types[0]))
2184 result = nir_feq(&b, srcs[0], srcs[1]);
2185 else
2186 result = nir_ieq(&b, srcs[0], srcs[1]);
2187 break;
2188 case ir_binop_nequal:
2189 if (type_is_float(types[0]))
2190 result = nir_fne(&b, srcs[0], srcs[1]);
2191 else
2192 result = nir_ine(&b, srcs[0], srcs[1]);
2193 break;
2194 case ir_binop_all_equal:
2195 if (type_is_float(types[0])) {
2196 switch (ir->operands[0]->type->vector_elements) {
2197 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2198 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2199 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2200 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2201 default:
2202 unreachable("not reached");
2203 }
2204 } else {
2205 switch (ir->operands[0]->type->vector_elements) {
2206 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2207 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2208 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2209 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2210 default:
2211 unreachable("not reached");
2212 }
2213 }
2214 break;
2215 case ir_binop_any_nequal:
2216 if (type_is_float(types[0])) {
2217 switch (ir->operands[0]->type->vector_elements) {
2218 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
2219 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2220 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2221 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2222 default:
2223 unreachable("not reached");
2224 }
2225 } else {
2226 switch (ir->operands[0]->type->vector_elements) {
2227 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2228 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2229 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2230 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2231 default:
2232 unreachable("not reached");
2233 }
2234 }
2235 break;
2236 case ir_binop_dot:
2237 switch (ir->operands[0]->type->vector_elements) {
2238 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
2239 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
2240 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
2241 default:
2242 unreachable("not reached");
2243 }
2244 break;
2245 case ir_binop_vector_extract: {
2246 result = nir_channel(&b, srcs[0], 0);
2247 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
2248 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
2249 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
2250 swizzled, result);
2251 }
2252 break;
2253 }
2254
2255 case ir_binop_atan2:
2256 result = nir_atan2(&b, srcs[0], srcs[1]);
2257 break;
2258
2259 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2260 case ir_triop_fma:
2261 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2262 break;
2263 case ir_triop_lrp:
2264 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2265 break;
2266 case ir_triop_csel:
2267 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2268 break;
2269 case ir_triop_bitfield_extract:
2270 result = (out_type == GLSL_TYPE_INT) ?
2271 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
2272 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
2273 break;
2274 case ir_quadop_bitfield_insert:
2275 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
2276 break;
2277 case ir_quadop_vector:
2278 result = nir_vec(&b, srcs, ir->type->vector_elements);
2279 break;
2280
2281 default:
2282 unreachable("not reached");
2283 }
2284 }
2285
2286 void
2287 nir_visitor::visit(ir_swizzle *ir)
2288 {
2289 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2290 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2291 ir->type->vector_elements);
2292 }
2293
2294 void
2295 nir_visitor::visit(ir_texture *ir)
2296 {
2297 unsigned num_srcs;
2298 nir_texop op;
2299 switch (ir->op) {
2300 case ir_tex:
2301 op = nir_texop_tex;
2302 num_srcs = 1; /* coordinate */
2303 break;
2304
2305 case ir_txb:
2306 case ir_txl:
2307 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2308 num_srcs = 2; /* coordinate, bias/lod */
2309 break;
2310
2311 case ir_txd:
2312 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2313 num_srcs = 3;
2314 break;
2315
2316 case ir_txf:
2317 op = nir_texop_txf;
2318 if (ir->lod_info.lod != NULL)
2319 num_srcs = 2; /* coordinate, lod */
2320 else
2321 num_srcs = 1; /* coordinate */
2322 break;
2323
2324 case ir_txf_ms:
2325 op = nir_texop_txf_ms;
2326 num_srcs = 2; /* coordinate, sample_index */
2327 break;
2328
2329 case ir_txs:
2330 op = nir_texop_txs;
2331 if (ir->lod_info.lod != NULL)
2332 num_srcs = 1; /* lod */
2333 else
2334 num_srcs = 0;
2335 break;
2336
2337 case ir_lod:
2338 op = nir_texop_lod;
2339 num_srcs = 1; /* coordinate */
2340 break;
2341
2342 case ir_tg4:
2343 op = nir_texop_tg4;
2344 num_srcs = 1; /* coordinate */
2345 break;
2346
2347 case ir_query_levels:
2348 op = nir_texop_query_levels;
2349 num_srcs = 0;
2350 break;
2351
2352 case ir_texture_samples:
2353 op = nir_texop_texture_samples;
2354 num_srcs = 0;
2355 break;
2356
2357 case ir_samples_identical:
2358 op = nir_texop_samples_identical;
2359 num_srcs = 1; /* coordinate */
2360 break;
2361
2362 default:
2363 unreachable("not reached");
2364 }
2365
2366 if (ir->projector != NULL)
2367 num_srcs++;
2368 if (ir->shadow_comparator != NULL)
2369 num_srcs++;
2370 /* offsets are constants we store inside nir_tex_intrs.offsets */
2371 if (ir->offset != NULL && !ir->offset->type->is_array())
2372 num_srcs++;
2373
2374 /* Add one for the texture deref */
2375 num_srcs += 2;
2376
2377 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2378
2379 instr->op = op;
2380 instr->sampler_dim =
2381 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2382 instr->is_array = ir->sampler->type->sampler_array;
2383 instr->is_shadow = ir->sampler->type->sampler_shadow;
2384 if (instr->is_shadow)
2385 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2386 switch (ir->type->base_type) {
2387 case GLSL_TYPE_FLOAT:
2388 instr->dest_type = nir_type_float;
2389 break;
2390 case GLSL_TYPE_FLOAT16:
2391 instr->dest_type = nir_type_float16;
2392 break;
2393 case GLSL_TYPE_INT:
2394 instr->dest_type = nir_type_int;
2395 break;
2396 case GLSL_TYPE_BOOL:
2397 case GLSL_TYPE_UINT:
2398 instr->dest_type = nir_type_uint;
2399 break;
2400 default:
2401 unreachable("not reached");
2402 }
2403
2404 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2405
2406 /* check for bindless handles */
2407 if (sampler_deref->mode != nir_var_uniform ||
2408 nir_deref_instr_get_variable(sampler_deref)->data.bindless) {
2409 nir_ssa_def *load = nir_load_deref(&b, sampler_deref);
2410 instr->src[0].src = nir_src_for_ssa(load);
2411 instr->src[0].src_type = nir_tex_src_texture_handle;
2412 instr->src[1].src = nir_src_for_ssa(load);
2413 instr->src[1].src_type = nir_tex_src_sampler_handle;
2414 } else {
2415 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2416 instr->src[0].src_type = nir_tex_src_texture_deref;
2417 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2418 instr->src[1].src_type = nir_tex_src_sampler_deref;
2419 }
2420
2421 unsigned src_number = 2;
2422
2423 if (ir->coordinate != NULL) {
2424 instr->coord_components = ir->coordinate->type->vector_elements;
2425 instr->src[src_number].src =
2426 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2427 instr->src[src_number].src_type = nir_tex_src_coord;
2428 src_number++;
2429 }
2430
2431 if (ir->projector != NULL) {
2432 instr->src[src_number].src =
2433 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2434 instr->src[src_number].src_type = nir_tex_src_projector;
2435 src_number++;
2436 }
2437
2438 if (ir->shadow_comparator != NULL) {
2439 instr->src[src_number].src =
2440 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2441 instr->src[src_number].src_type = nir_tex_src_comparator;
2442 src_number++;
2443 }
2444
2445 if (ir->offset != NULL) {
2446 if (ir->offset->type->is_array()) {
2447 for (int i = 0; i < ir->offset->type->array_size(); i++) {
2448 const ir_constant *c =
2449 ir->offset->as_constant()->get_array_element(i);
2450
2451 for (unsigned j = 0; j < 2; ++j) {
2452 int val = c->get_int_component(j);
2453 assert(val <= 31 && val >= -32);
2454 instr->tg4_offsets[i][j] = val;
2455 }
2456 }
2457 } else {
2458 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2459
2460 instr->src[src_number].src =
2461 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2462 instr->src[src_number].src_type = nir_tex_src_offset;
2463 src_number++;
2464 }
2465 }
2466
2467 switch (ir->op) {
2468 case ir_txb:
2469 instr->src[src_number].src =
2470 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2471 instr->src[src_number].src_type = nir_tex_src_bias;
2472 src_number++;
2473 break;
2474
2475 case ir_txl:
2476 case ir_txf:
2477 case ir_txs:
2478 if (ir->lod_info.lod != NULL) {
2479 instr->src[src_number].src =
2480 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2481 instr->src[src_number].src_type = nir_tex_src_lod;
2482 src_number++;
2483 }
2484 break;
2485
2486 case ir_txd:
2487 instr->src[src_number].src =
2488 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2489 instr->src[src_number].src_type = nir_tex_src_ddx;
2490 src_number++;
2491 instr->src[src_number].src =
2492 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2493 instr->src[src_number].src_type = nir_tex_src_ddy;
2494 src_number++;
2495 break;
2496
2497 case ir_txf_ms:
2498 instr->src[src_number].src =
2499 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2500 instr->src[src_number].src_type = nir_tex_src_ms_index;
2501 src_number++;
2502 break;
2503
2504 case ir_tg4:
2505 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2506 break;
2507
2508 default:
2509 break;
2510 }
2511
2512 assert(src_number == num_srcs);
2513
2514 unsigned bit_size = glsl_get_bit_size(ir->type);
2515 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2516 }
2517
2518 void
2519 nir_visitor::visit(ir_constant *ir)
2520 {
2521 /*
2522 * We don't know if this variable is an array or struct that gets
2523 * dereferenced, so do the safe thing an make it a variable with a
2524 * constant initializer and return a dereference.
2525 */
2526
2527 nir_variable *var =
2528 nir_local_variable_create(this->impl, ir->type, "const_temp");
2529 var->data.read_only = true;
2530 var->constant_initializer = constant_copy(ir, var);
2531
2532 this->deref = nir_build_deref_var(&b, var);
2533 }
2534
2535 void
2536 nir_visitor::visit(ir_dereference_variable *ir)
2537 {
2538 if (ir->variable_referenced()->data.mode == ir_var_function_out) {
2539 unsigned i = (sig->return_type != glsl_type::void_type) ? 1 : 0;
2540
2541 foreach_in_list(ir_variable, param, &sig->parameters) {
2542 if (param == ir->variable_referenced()) {
2543 break;
2544 }
2545 i++;
2546 }
2547
2548 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2549 nir_var_function_temp, ir->type, 0);
2550 return;
2551 }
2552
2553 assert(ir->variable_referenced()->data.mode != ir_var_function_inout);
2554
2555 struct hash_entry *entry =
2556 _mesa_hash_table_search(this->var_table, ir->var);
2557 assert(entry);
2558 nir_variable *var = (nir_variable *) entry->data;
2559
2560 this->deref = nir_build_deref_var(&b, var);
2561 }
2562
2563 void
2564 nir_visitor::visit(ir_dereference_record *ir)
2565 {
2566 ir->record->accept(this);
2567
2568 int field_index = ir->field_idx;
2569 assert(field_index >= 0);
2570
2571 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2572 }
2573
2574 void
2575 nir_visitor::visit(ir_dereference_array *ir)
2576 {
2577 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2578
2579 ir->array->accept(this);
2580
2581 this->deref = nir_build_deref_array(&b, this->deref, index);
2582 }
2583
2584 void
2585 nir_visitor::visit(ir_barrier *)
2586 {
2587 if (shader->info.stage == MESA_SHADER_COMPUTE) {
2588 nir_intrinsic_instr *shared_barrier =
2589 nir_intrinsic_instr_create(this->shader,
2590 nir_intrinsic_memory_barrier_shared);
2591 nir_builder_instr_insert(&b, &shared_barrier->instr);
2592 } else if (shader->info.stage == MESA_SHADER_TESS_CTRL) {
2593 nir_intrinsic_instr *patch_barrier =
2594 nir_intrinsic_instr_create(this->shader,
2595 nir_intrinsic_memory_barrier_tcs_patch);
2596 nir_builder_instr_insert(&b, &patch_barrier->instr);
2597 }
2598
2599 nir_intrinsic_instr *instr =
2600 nir_intrinsic_instr_create(this->shader, nir_intrinsic_control_barrier);
2601 nir_builder_instr_insert(&b, &instr->instr);
2602 }
2603
2604 nir_shader *
2605 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2606 const nir_shader_compiler_options *options)
2607 {
2608 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2609 * matter because we're not optimizing anything here.
2610 */
2611 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2612 sh->Source = float64_source;
2613 sh->CompileStatus = COMPILE_FAILURE;
2614 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2615
2616 if (!sh->CompileStatus) {
2617 if (sh->InfoLog) {
2618 _mesa_problem(ctx,
2619 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2620 sh->InfoLog, float64_source);
2621 }
2622 return NULL;
2623 }
2624
2625 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2626
2627 nir_visitor v1(ctx, nir);
2628 nir_function_visitor v2(&v1);
2629 v2.run(sh->ir);
2630 visit_exec_list(sh->ir, &v1);
2631
2632 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2633 sh->Source = NULL;
2634 _mesa_delete_shader(ctx, sh);
2635
2636 nir_validate_shader(nir, "float64_funcs_to_nir");
2637
2638 NIR_PASS_V(nir, nir_lower_variable_initializers, nir_var_function_temp);
2639 NIR_PASS_V(nir, nir_lower_returns);
2640 NIR_PASS_V(nir, nir_inline_functions);
2641 NIR_PASS_V(nir, nir_opt_deref);
2642
2643 /* Do some optimizations to clean up the shader now. By optimizing the
2644 * functions in the library, we avoid having to re-do that work every
2645 * time we inline a copy of a function. Reducing basic blocks also helps
2646 * with compile times.
2647 */
2648 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
2649 NIR_PASS_V(nir, nir_copy_prop);
2650 NIR_PASS_V(nir, nir_opt_dce);
2651 NIR_PASS_V(nir, nir_opt_cse);
2652 NIR_PASS_V(nir, nir_opt_gcm, true);
2653 NIR_PASS_V(nir, nir_opt_peephole_select, 1, false, false);
2654 NIR_PASS_V(nir, nir_opt_dce);
2655
2656 return nir;
2657 }