nir: add bindless to nir data
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35
36 /*
37 * pass to lower GLSL IR to NIR
38 *
39 * This will lower variable dereferences to loads/stores of corresponding
40 * variables in NIR - the variables will be converted to registers in a later
41 * pass.
42 */
43
44 namespace {
45
46 class nir_visitor : public ir_visitor
47 {
48 public:
49 nir_visitor(nir_shader *shader);
50 ~nir_visitor();
51
52 virtual void visit(ir_variable *);
53 virtual void visit(ir_function *);
54 virtual void visit(ir_function_signature *);
55 virtual void visit(ir_loop *);
56 virtual void visit(ir_if *);
57 virtual void visit(ir_discard *);
58 virtual void visit(ir_loop_jump *);
59 virtual void visit(ir_return *);
60 virtual void visit(ir_call *);
61 virtual void visit(ir_assignment *);
62 virtual void visit(ir_emit_vertex *);
63 virtual void visit(ir_end_primitive *);
64 virtual void visit(ir_expression *);
65 virtual void visit(ir_swizzle *);
66 virtual void visit(ir_texture *);
67 virtual void visit(ir_constant *);
68 virtual void visit(ir_dereference_variable *);
69 virtual void visit(ir_dereference_record *);
70 virtual void visit(ir_dereference_array *);
71 virtual void visit(ir_barrier *);
72
73 void create_function(ir_function_signature *ir);
74
75 private:
76 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
77 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
78
79 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
82 nir_ssa_def *src2);
83 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
84 nir_ssa_def *src2, nir_ssa_def *src3);
85
86 bool supports_ints;
87
88 nir_shader *shader;
89 nir_function_impl *impl;
90 nir_builder b;
91 nir_ssa_def *result; /* result of the expression tree last visited */
92
93 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
94
95 /* the head of the dereference chain we're creating */
96 nir_deref_var *deref_head;
97 /* the tail of the dereference chain we're creating */
98 nir_deref *deref_tail;
99
100 nir_variable *var; /* variable created by ir_variable visitor */
101
102 /* whether the IR we're operating on is per-function or global */
103 bool is_global;
104
105 /* map of ir_variable -> nir_variable */
106 struct hash_table *var_table;
107
108 /* map of ir_function_signature -> nir_function_overload */
109 struct hash_table *overload_table;
110 };
111
112 /*
113 * This visitor runs before the main visitor, calling create_function() for
114 * each function so that the main visitor can resolve forward references in
115 * calls.
116 */
117
118 class nir_function_visitor : public ir_hierarchical_visitor
119 {
120 public:
121 nir_function_visitor(nir_visitor *v) : visitor(v)
122 {
123 }
124 virtual ir_visitor_status visit_enter(ir_function *);
125
126 private:
127 nir_visitor *visitor;
128 };
129
130 } /* end of anonymous namespace */
131
132 static void
133 nir_remap_attributes(nir_shader *shader,
134 const nir_shader_compiler_options *options)
135 {
136 if (options->vs_inputs_dual_locations) {
137 nir_foreach_variable(var, &shader->inputs) {
138 var->data.location +=
139 _mesa_bitcount_64(shader->info.vs.double_inputs &
140 BITFIELD64_MASK(var->data.location));
141 }
142 }
143
144 /* Once the remap is done, reset double_inputs_read, so later it will have
145 * which location/slots are doubles */
146 shader->info.vs.double_inputs = 0;
147 }
148
149 nir_shader *
150 glsl_to_nir(const struct gl_shader_program *shader_prog,
151 gl_shader_stage stage,
152 const nir_shader_compiler_options *options)
153 {
154 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
155
156 nir_shader *shader = nir_shader_create(NULL, stage, options,
157 &sh->Program->info);
158
159 nir_visitor v1(shader);
160 nir_function_visitor v2(&v1);
161 v2.run(sh->ir);
162 visit_exec_list(sh->ir, &v1);
163
164 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
165
166 /* Remap the locations to slots so those requiring two slots will occupy
167 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
168 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
169 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
170 if (shader->info.stage == MESA_SHADER_VERTEX)
171 nir_remap_attributes(shader, options);
172
173 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
174 if (shader_prog->Label)
175 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
176
177 /* Check for transform feedback varyings specified via the API */
178 shader->info.has_transform_feedback_varyings =
179 shader_prog->TransformFeedback.NumVarying > 0;
180
181 /* Check for transform feedback varyings specified in the Shader */
182 if (shader_prog->last_vert_prog)
183 shader->info.has_transform_feedback_varyings |=
184 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
185
186 return shader;
187 }
188
189 nir_visitor::nir_visitor(nir_shader *shader)
190 {
191 this->supports_ints = shader->options->native_integers;
192 this->shader = shader;
193 this->is_global = true;
194 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
195 _mesa_key_pointer_equal);
196 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
197 _mesa_key_pointer_equal);
198 this->result = NULL;
199 this->impl = NULL;
200 this->var = NULL;
201 this->deref_head = NULL;
202 this->deref_tail = NULL;
203 memset(&this->b, 0, sizeof(this->b));
204 }
205
206 nir_visitor::~nir_visitor()
207 {
208 _mesa_hash_table_destroy(this->var_table, NULL);
209 _mesa_hash_table_destroy(this->overload_table, NULL);
210 }
211
212 nir_deref_var *
213 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
214 {
215 ir->accept(this);
216 ralloc_steal(mem_ctx, this->deref_head);
217 return this->deref_head;
218 }
219
220 static nir_constant *
221 constant_copy(ir_constant *ir, void *mem_ctx)
222 {
223 if (ir == NULL)
224 return NULL;
225
226 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
227
228 const unsigned rows = ir->type->vector_elements;
229 const unsigned cols = ir->type->matrix_columns;
230 unsigned i;
231
232 ret->num_elements = 0;
233 switch (ir->type->base_type) {
234 case GLSL_TYPE_UINT:
235 /* Only float base types can be matrices. */
236 assert(cols == 1);
237
238 for (unsigned r = 0; r < rows; r++)
239 ret->values[0].u32[r] = ir->value.u[r];
240
241 break;
242
243 case GLSL_TYPE_INT:
244 /* Only float base types can be matrices. */
245 assert(cols == 1);
246
247 for (unsigned r = 0; r < rows; r++)
248 ret->values[0].i32[r] = ir->value.i[r];
249
250 break;
251
252 case GLSL_TYPE_FLOAT:
253 for (unsigned c = 0; c < cols; c++) {
254 for (unsigned r = 0; r < rows; r++)
255 ret->values[c].f32[r] = ir->value.f[c * rows + r];
256 }
257 break;
258
259 case GLSL_TYPE_DOUBLE:
260 for (unsigned c = 0; c < cols; c++) {
261 for (unsigned r = 0; r < rows; r++)
262 ret->values[c].f64[r] = ir->value.d[c * rows + r];
263 }
264 break;
265
266 case GLSL_TYPE_UINT64:
267 /* Only float base types can be matrices. */
268 assert(cols == 1);
269
270 for (unsigned r = 0; r < rows; r++)
271 ret->values[0].u64[r] = ir->value.u64[r];
272 break;
273
274 case GLSL_TYPE_INT64:
275 /* Only float base types can be matrices. */
276 assert(cols == 1);
277
278 for (unsigned r = 0; r < rows; r++)
279 ret->values[0].i64[r] = ir->value.i64[r];
280 break;
281
282 case GLSL_TYPE_BOOL:
283 /* Only float base types can be matrices. */
284 assert(cols == 1);
285
286 for (unsigned r = 0; r < rows; r++)
287 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
288
289 break;
290
291 case GLSL_TYPE_STRUCT:
292 case GLSL_TYPE_ARRAY:
293 ret->elements = ralloc_array(mem_ctx, nir_constant *,
294 ir->type->length);
295 ret->num_elements = ir->type->length;
296
297 for (i = 0; i < ir->type->length; i++)
298 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
299 break;
300
301 default:
302 unreachable("not reached");
303 }
304
305 return ret;
306 }
307
308 void
309 nir_visitor::visit(ir_variable *ir)
310 {
311 /* TODO: In future we should switch to using the NIR lowering pass but for
312 * now just ignore these variables as GLSL IR should have lowered them.
313 * Anything remaining are just dead vars that weren't cleaned up.
314 */
315 if (ir->data.mode == ir_var_shader_shared)
316 return;
317
318 nir_variable *var = rzalloc(shader, nir_variable);
319 var->type = ir->type;
320 var->name = ralloc_strdup(var, ir->name);
321
322 var->data.always_active_io = ir->data.always_active_io;
323 var->data.read_only = ir->data.read_only;
324 var->data.centroid = ir->data.centroid;
325 var->data.sample = ir->data.sample;
326 var->data.patch = ir->data.patch;
327 var->data.invariant = ir->data.invariant;
328 var->data.location = ir->data.location;
329 var->data.stream = ir->data.stream;
330 var->data.compact = false;
331
332 switch(ir->data.mode) {
333 case ir_var_auto:
334 case ir_var_temporary:
335 if (is_global)
336 var->data.mode = nir_var_global;
337 else
338 var->data.mode = nir_var_local;
339 break;
340
341 case ir_var_function_in:
342 case ir_var_function_out:
343 case ir_var_function_inout:
344 case ir_var_const_in:
345 var->data.mode = nir_var_local;
346 break;
347
348 case ir_var_shader_in:
349 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
350 ir->data.location == VARYING_SLOT_FACE) {
351 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
352 var->data.location = SYSTEM_VALUE_FRONT_FACE;
353 var->data.mode = nir_var_system_value;
354 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
355 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
356 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
357 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
358 var->data.mode = nir_var_system_value;
359 } else {
360 var->data.mode = nir_var_shader_in;
361
362 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
363 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
364 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
365 var->data.compact = ir->type->without_array()->is_scalar();
366 }
367 }
368
369 /* Mark all the locations that require two slots */
370 if (shader->info.stage == MESA_SHADER_VERTEX &&
371 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
372 for (uint i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
373 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
374 shader->info.vs.double_inputs |= bitfield;
375 }
376 }
377 break;
378
379 case ir_var_shader_out:
380 var->data.mode = nir_var_shader_out;
381 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
382 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
383 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
384 var->data.compact = ir->type->without_array()->is_scalar();
385 }
386 break;
387
388 case ir_var_uniform:
389 var->data.mode = nir_var_uniform;
390 break;
391
392 case ir_var_shader_storage:
393 var->data.mode = nir_var_shader_storage;
394 break;
395
396 case ir_var_system_value:
397 var->data.mode = nir_var_system_value;
398 break;
399
400 default:
401 unreachable("not reached");
402 }
403
404 var->data.interpolation = ir->data.interpolation;
405 var->data.origin_upper_left = ir->data.origin_upper_left;
406 var->data.pixel_center_integer = ir->data.pixel_center_integer;
407 var->data.location_frac = ir->data.location_frac;
408
409 if (var->data.pixel_center_integer) {
410 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
411 shader->info.fs.pixel_center_integer = true;
412 }
413
414 switch (ir->data.depth_layout) {
415 case ir_depth_layout_none:
416 var->data.depth_layout = nir_depth_layout_none;
417 break;
418 case ir_depth_layout_any:
419 var->data.depth_layout = nir_depth_layout_any;
420 break;
421 case ir_depth_layout_greater:
422 var->data.depth_layout = nir_depth_layout_greater;
423 break;
424 case ir_depth_layout_less:
425 var->data.depth_layout = nir_depth_layout_less;
426 break;
427 case ir_depth_layout_unchanged:
428 var->data.depth_layout = nir_depth_layout_unchanged;
429 break;
430 default:
431 unreachable("not reached");
432 }
433
434 var->data.index = ir->data.index;
435 var->data.descriptor_set = 0;
436 var->data.binding = ir->data.binding;
437 var->data.bindless = ir->data.bindless;
438 var->data.offset = ir->data.offset;
439 var->data.image.read_only = ir->data.memory_read_only;
440 var->data.image.write_only = ir->data.memory_write_only;
441 var->data.image.coherent = ir->data.memory_coherent;
442 var->data.image._volatile = ir->data.memory_volatile;
443 var->data.image.restrict_flag = ir->data.memory_restrict;
444 var->data.image.format = ir->data.image_format;
445 var->data.fb_fetch_output = ir->data.fb_fetch_output;
446
447 var->num_state_slots = ir->get_num_state_slots();
448 if (var->num_state_slots > 0) {
449 var->state_slots = rzalloc_array(var, nir_state_slot,
450 var->num_state_slots);
451
452 ir_state_slot *state_slots = ir->get_state_slots();
453 for (unsigned i = 0; i < var->num_state_slots; i++) {
454 for (unsigned j = 0; j < 5; j++)
455 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
456 var->state_slots[i].swizzle = state_slots[i].swizzle;
457 }
458 } else {
459 var->state_slots = NULL;
460 }
461
462 var->constant_initializer = constant_copy(ir->constant_initializer, var);
463
464 var->interface_type = ir->get_interface_type();
465
466 if (var->data.mode == nir_var_local)
467 nir_function_impl_add_variable(impl, var);
468 else
469 nir_shader_add_variable(shader, var);
470
471 _mesa_hash_table_insert(var_table, ir, var);
472 this->var = var;
473 }
474
475 ir_visitor_status
476 nir_function_visitor::visit_enter(ir_function *ir)
477 {
478 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
479 visitor->create_function(sig);
480 }
481 return visit_continue_with_parent;
482 }
483
484 void
485 nir_visitor::create_function(ir_function_signature *ir)
486 {
487 if (ir->is_intrinsic())
488 return;
489
490 nir_function *func = nir_function_create(shader, ir->function_name());
491
492 assert(ir->parameters.is_empty());
493 assert(ir->return_type == glsl_type::void_type);
494
495 _mesa_hash_table_insert(this->overload_table, ir, func);
496 }
497
498 void
499 nir_visitor::visit(ir_function *ir)
500 {
501 foreach_in_list(ir_function_signature, sig, &ir->signatures)
502 sig->accept(this);
503 }
504
505 void
506 nir_visitor::visit(ir_function_signature *ir)
507 {
508 if (ir->is_intrinsic())
509 return;
510
511 struct hash_entry *entry =
512 _mesa_hash_table_search(this->overload_table, ir);
513
514 assert(entry);
515 nir_function *func = (nir_function *) entry->data;
516
517 if (ir->is_defined) {
518 nir_function_impl *impl = nir_function_impl_create(func);
519 this->impl = impl;
520
521 assert(strcmp(func->name, "main") == 0);
522 assert(ir->parameters.is_empty());
523 assert(func->return_type == glsl_type::void_type);
524
525 this->is_global = false;
526
527 nir_builder_init(&b, impl);
528 b.cursor = nir_after_cf_list(&impl->body);
529 visit_exec_list(&ir->body, this);
530
531 this->is_global = true;
532 } else {
533 func->impl = NULL;
534 }
535 }
536
537 void
538 nir_visitor::visit(ir_loop *ir)
539 {
540 nir_push_loop(&b);
541 visit_exec_list(&ir->body_instructions, this);
542 nir_pop_loop(&b, NULL);
543 }
544
545 void
546 nir_visitor::visit(ir_if *ir)
547 {
548 nir_push_if(&b, evaluate_rvalue(ir->condition));
549 visit_exec_list(&ir->then_instructions, this);
550 nir_push_else(&b, NULL);
551 visit_exec_list(&ir->else_instructions, this);
552 nir_pop_if(&b, NULL);
553 }
554
555 void
556 nir_visitor::visit(ir_discard *ir)
557 {
558 /*
559 * discards aren't treated as control flow, because before we lower them
560 * they can appear anywhere in the shader and the stuff after them may still
561 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
562 * discards will be immediately followed by a return.
563 */
564
565 nir_intrinsic_instr *discard;
566 if (ir->condition) {
567 discard = nir_intrinsic_instr_create(this->shader,
568 nir_intrinsic_discard_if);
569 discard->src[0] =
570 nir_src_for_ssa(evaluate_rvalue(ir->condition));
571 } else {
572 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
573 }
574
575 nir_builder_instr_insert(&b, &discard->instr);
576 }
577
578 void
579 nir_visitor::visit(ir_emit_vertex *ir)
580 {
581 nir_intrinsic_instr *instr =
582 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
583 nir_intrinsic_set_stream_id(instr, ir->stream_id());
584 nir_builder_instr_insert(&b, &instr->instr);
585 }
586
587 void
588 nir_visitor::visit(ir_end_primitive *ir)
589 {
590 nir_intrinsic_instr *instr =
591 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
592 nir_intrinsic_set_stream_id(instr, ir->stream_id());
593 nir_builder_instr_insert(&b, &instr->instr);
594 }
595
596 void
597 nir_visitor::visit(ir_loop_jump *ir)
598 {
599 nir_jump_type type;
600 switch (ir->mode) {
601 case ir_loop_jump::jump_break:
602 type = nir_jump_break;
603 break;
604 case ir_loop_jump::jump_continue:
605 type = nir_jump_continue;
606 break;
607 default:
608 unreachable("not reached");
609 }
610
611 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
612 nir_builder_instr_insert(&b, &instr->instr);
613 }
614
615 void
616 nir_visitor::visit(ir_return *ir)
617 {
618 if (ir->value != NULL) {
619 nir_intrinsic_instr *copy =
620 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
621
622 copy->variables[0] = nir_deref_var_create(copy, this->impl->return_var);
623 copy->variables[1] = evaluate_deref(&copy->instr, ir->value);
624 }
625
626 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
627 nir_builder_instr_insert(&b, &instr->instr);
628 }
629
630 void
631 nir_visitor::visit(ir_call *ir)
632 {
633 if (ir->callee->is_intrinsic()) {
634 nir_intrinsic_op op;
635
636 switch (ir->callee->intrinsic_id) {
637 case ir_intrinsic_atomic_counter_read:
638 op = nir_intrinsic_atomic_counter_read_var;
639 break;
640 case ir_intrinsic_atomic_counter_increment:
641 op = nir_intrinsic_atomic_counter_inc_var;
642 break;
643 case ir_intrinsic_atomic_counter_predecrement:
644 op = nir_intrinsic_atomic_counter_dec_var;
645 break;
646 case ir_intrinsic_atomic_counter_add:
647 op = nir_intrinsic_atomic_counter_add_var;
648 break;
649 case ir_intrinsic_atomic_counter_and:
650 op = nir_intrinsic_atomic_counter_and_var;
651 break;
652 case ir_intrinsic_atomic_counter_or:
653 op = nir_intrinsic_atomic_counter_or_var;
654 break;
655 case ir_intrinsic_atomic_counter_xor:
656 op = nir_intrinsic_atomic_counter_xor_var;
657 break;
658 case ir_intrinsic_atomic_counter_min:
659 op = nir_intrinsic_atomic_counter_min_var;
660 break;
661 case ir_intrinsic_atomic_counter_max:
662 op = nir_intrinsic_atomic_counter_max_var;
663 break;
664 case ir_intrinsic_atomic_counter_exchange:
665 op = nir_intrinsic_atomic_counter_exchange_var;
666 break;
667 case ir_intrinsic_atomic_counter_comp_swap:
668 op = nir_intrinsic_atomic_counter_comp_swap_var;
669 break;
670 case ir_intrinsic_image_load:
671 op = nir_intrinsic_image_var_load;
672 break;
673 case ir_intrinsic_image_store:
674 op = nir_intrinsic_image_var_store;
675 break;
676 case ir_intrinsic_image_atomic_add:
677 op = nir_intrinsic_image_var_atomic_add;
678 break;
679 case ir_intrinsic_image_atomic_min:
680 op = nir_intrinsic_image_var_atomic_min;
681 break;
682 case ir_intrinsic_image_atomic_max:
683 op = nir_intrinsic_image_var_atomic_max;
684 break;
685 case ir_intrinsic_image_atomic_and:
686 op = nir_intrinsic_image_var_atomic_and;
687 break;
688 case ir_intrinsic_image_atomic_or:
689 op = nir_intrinsic_image_var_atomic_or;
690 break;
691 case ir_intrinsic_image_atomic_xor:
692 op = nir_intrinsic_image_var_atomic_xor;
693 break;
694 case ir_intrinsic_image_atomic_exchange:
695 op = nir_intrinsic_image_var_atomic_exchange;
696 break;
697 case ir_intrinsic_image_atomic_comp_swap:
698 op = nir_intrinsic_image_var_atomic_comp_swap;
699 break;
700 case ir_intrinsic_memory_barrier:
701 op = nir_intrinsic_memory_barrier;
702 break;
703 case ir_intrinsic_image_size:
704 op = nir_intrinsic_image_var_size;
705 break;
706 case ir_intrinsic_image_samples:
707 op = nir_intrinsic_image_var_samples;
708 break;
709 case ir_intrinsic_ssbo_store:
710 op = nir_intrinsic_store_ssbo;
711 break;
712 case ir_intrinsic_ssbo_load:
713 op = nir_intrinsic_load_ssbo;
714 break;
715 case ir_intrinsic_ssbo_atomic_add:
716 op = nir_intrinsic_ssbo_atomic_add;
717 break;
718 case ir_intrinsic_ssbo_atomic_and:
719 op = nir_intrinsic_ssbo_atomic_and;
720 break;
721 case ir_intrinsic_ssbo_atomic_or:
722 op = nir_intrinsic_ssbo_atomic_or;
723 break;
724 case ir_intrinsic_ssbo_atomic_xor:
725 op = nir_intrinsic_ssbo_atomic_xor;
726 break;
727 case ir_intrinsic_ssbo_atomic_min:
728 assert(ir->return_deref);
729 if (ir->return_deref->type == glsl_type::int_type)
730 op = nir_intrinsic_ssbo_atomic_imin;
731 else if (ir->return_deref->type == glsl_type::uint_type)
732 op = nir_intrinsic_ssbo_atomic_umin;
733 else
734 unreachable("Invalid type");
735 break;
736 case ir_intrinsic_ssbo_atomic_max:
737 assert(ir->return_deref);
738 if (ir->return_deref->type == glsl_type::int_type)
739 op = nir_intrinsic_ssbo_atomic_imax;
740 else if (ir->return_deref->type == glsl_type::uint_type)
741 op = nir_intrinsic_ssbo_atomic_umax;
742 else
743 unreachable("Invalid type");
744 break;
745 case ir_intrinsic_ssbo_atomic_exchange:
746 op = nir_intrinsic_ssbo_atomic_exchange;
747 break;
748 case ir_intrinsic_ssbo_atomic_comp_swap:
749 op = nir_intrinsic_ssbo_atomic_comp_swap;
750 break;
751 case ir_intrinsic_shader_clock:
752 op = nir_intrinsic_shader_clock;
753 break;
754 case ir_intrinsic_group_memory_barrier:
755 op = nir_intrinsic_group_memory_barrier;
756 break;
757 case ir_intrinsic_memory_barrier_atomic_counter:
758 op = nir_intrinsic_memory_barrier_atomic_counter;
759 break;
760 case ir_intrinsic_memory_barrier_buffer:
761 op = nir_intrinsic_memory_barrier_buffer;
762 break;
763 case ir_intrinsic_memory_barrier_image:
764 op = nir_intrinsic_memory_barrier_image;
765 break;
766 case ir_intrinsic_memory_barrier_shared:
767 op = nir_intrinsic_memory_barrier_shared;
768 break;
769 case ir_intrinsic_shared_load:
770 op = nir_intrinsic_load_shared;
771 break;
772 case ir_intrinsic_shared_store:
773 op = nir_intrinsic_store_shared;
774 break;
775 case ir_intrinsic_shared_atomic_add:
776 op = nir_intrinsic_shared_atomic_add;
777 break;
778 case ir_intrinsic_shared_atomic_and:
779 op = nir_intrinsic_shared_atomic_and;
780 break;
781 case ir_intrinsic_shared_atomic_or:
782 op = nir_intrinsic_shared_atomic_or;
783 break;
784 case ir_intrinsic_shared_atomic_xor:
785 op = nir_intrinsic_shared_atomic_xor;
786 break;
787 case ir_intrinsic_shared_atomic_min:
788 assert(ir->return_deref);
789 if (ir->return_deref->type == glsl_type::int_type)
790 op = nir_intrinsic_shared_atomic_imin;
791 else if (ir->return_deref->type == glsl_type::uint_type)
792 op = nir_intrinsic_shared_atomic_umin;
793 else
794 unreachable("Invalid type");
795 break;
796 case ir_intrinsic_shared_atomic_max:
797 assert(ir->return_deref);
798 if (ir->return_deref->type == glsl_type::int_type)
799 op = nir_intrinsic_shared_atomic_imax;
800 else if (ir->return_deref->type == glsl_type::uint_type)
801 op = nir_intrinsic_shared_atomic_umax;
802 else
803 unreachable("Invalid type");
804 break;
805 case ir_intrinsic_shared_atomic_exchange:
806 op = nir_intrinsic_shared_atomic_exchange;
807 break;
808 case ir_intrinsic_shared_atomic_comp_swap:
809 op = nir_intrinsic_shared_atomic_comp_swap;
810 break;
811 case ir_intrinsic_vote_any:
812 op = nir_intrinsic_vote_any;
813 break;
814 case ir_intrinsic_vote_all:
815 op = nir_intrinsic_vote_all;
816 break;
817 case ir_intrinsic_vote_eq:
818 op = nir_intrinsic_vote_ieq;
819 break;
820 case ir_intrinsic_ballot:
821 op = nir_intrinsic_ballot;
822 break;
823 case ir_intrinsic_read_invocation:
824 op = nir_intrinsic_read_invocation;
825 break;
826 case ir_intrinsic_read_first_invocation:
827 op = nir_intrinsic_read_first_invocation;
828 break;
829 default:
830 unreachable("not reached");
831 }
832
833 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
834 nir_dest *dest = &instr->dest;
835
836 switch (op) {
837 case nir_intrinsic_atomic_counter_read_var:
838 case nir_intrinsic_atomic_counter_inc_var:
839 case nir_intrinsic_atomic_counter_dec_var:
840 case nir_intrinsic_atomic_counter_add_var:
841 case nir_intrinsic_atomic_counter_min_var:
842 case nir_intrinsic_atomic_counter_max_var:
843 case nir_intrinsic_atomic_counter_and_var:
844 case nir_intrinsic_atomic_counter_or_var:
845 case nir_intrinsic_atomic_counter_xor_var:
846 case nir_intrinsic_atomic_counter_exchange_var:
847 case nir_intrinsic_atomic_counter_comp_swap_var: {
848 /* Set the counter variable dereference. */
849 exec_node *param = ir->actual_parameters.get_head();
850 ir_dereference *counter = (ir_dereference *)param;
851
852 instr->variables[0] = evaluate_deref(&instr->instr, counter);
853 param = param->get_next();
854
855 /* Set the intrinsic destination. */
856 if (ir->return_deref) {
857 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
858 }
859
860 /* Set the intrinsic parameters. */
861 if (!param->is_tail_sentinel()) {
862 instr->src[0] =
863 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
864 param = param->get_next();
865 }
866
867 if (!param->is_tail_sentinel()) {
868 instr->src[1] =
869 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
870 param = param->get_next();
871 }
872
873 nir_builder_instr_insert(&b, &instr->instr);
874 break;
875 }
876 case nir_intrinsic_image_var_load:
877 case nir_intrinsic_image_var_store:
878 case nir_intrinsic_image_var_atomic_add:
879 case nir_intrinsic_image_var_atomic_min:
880 case nir_intrinsic_image_var_atomic_max:
881 case nir_intrinsic_image_var_atomic_and:
882 case nir_intrinsic_image_var_atomic_or:
883 case nir_intrinsic_image_var_atomic_xor:
884 case nir_intrinsic_image_var_atomic_exchange:
885 case nir_intrinsic_image_var_atomic_comp_swap:
886 case nir_intrinsic_image_var_samples:
887 case nir_intrinsic_image_var_size: {
888 nir_ssa_undef_instr *instr_undef =
889 nir_ssa_undef_instr_create(shader, 1, 32);
890 nir_builder_instr_insert(&b, &instr_undef->instr);
891
892 /* Set the image variable dereference. */
893 exec_node *param = ir->actual_parameters.get_head();
894 ir_dereference *image = (ir_dereference *)param;
895 const glsl_type *type =
896 image->variable_referenced()->type->without_array();
897
898 instr->variables[0] = evaluate_deref(&instr->instr, image);
899 param = param->get_next();
900
901 /* Set the intrinsic destination. */
902 if (ir->return_deref) {
903 unsigned num_components = ir->return_deref->type->vector_elements;
904 if (instr->intrinsic == nir_intrinsic_image_var_size)
905 instr->num_components = num_components;
906 nir_ssa_dest_init(&instr->instr, &instr->dest,
907 num_components, 32, NULL);
908 }
909
910 if (op == nir_intrinsic_image_var_size ||
911 op == nir_intrinsic_image_var_samples) {
912 nir_builder_instr_insert(&b, &instr->instr);
913 break;
914 }
915
916 /* Set the address argument, extending the coordinate vector to four
917 * components.
918 */
919 nir_ssa_def *src_addr =
920 evaluate_rvalue((ir_dereference *)param);
921 nir_ssa_def *srcs[4];
922
923 for (int i = 0; i < 4; i++) {
924 if (i < type->coordinate_components())
925 srcs[i] = nir_channel(&b, src_addr, i);
926 else
927 srcs[i] = &instr_undef->def;
928 }
929
930 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
931 param = param->get_next();
932
933 /* Set the sample argument, which is undefined for single-sample
934 * images.
935 */
936 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
937 instr->src[1] =
938 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
939 param = param->get_next();
940 } else {
941 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
942 }
943
944 /* Set the intrinsic parameters. */
945 if (!param->is_tail_sentinel()) {
946 instr->src[2] =
947 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
948 param = param->get_next();
949 }
950
951 if (!param->is_tail_sentinel()) {
952 instr->src[3] =
953 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
954 param = param->get_next();
955 }
956 nir_builder_instr_insert(&b, &instr->instr);
957 break;
958 }
959 case nir_intrinsic_memory_barrier:
960 case nir_intrinsic_group_memory_barrier:
961 case nir_intrinsic_memory_barrier_atomic_counter:
962 case nir_intrinsic_memory_barrier_buffer:
963 case nir_intrinsic_memory_barrier_image:
964 case nir_intrinsic_memory_barrier_shared:
965 nir_builder_instr_insert(&b, &instr->instr);
966 break;
967 case nir_intrinsic_shader_clock:
968 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
969 instr->num_components = 2;
970 nir_builder_instr_insert(&b, &instr->instr);
971 break;
972 case nir_intrinsic_store_ssbo: {
973 exec_node *param = ir->actual_parameters.get_head();
974 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
975
976 param = param->get_next();
977 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
978
979 param = param->get_next();
980 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
981
982 param = param->get_next();
983 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
984 assert(write_mask);
985
986 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
987 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
988 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
989 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
990 instr->num_components = val->type->vector_elements;
991
992 nir_builder_instr_insert(&b, &instr->instr);
993 break;
994 }
995 case nir_intrinsic_load_ssbo: {
996 exec_node *param = ir->actual_parameters.get_head();
997 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
998
999 param = param->get_next();
1000 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1001
1002 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1003 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1004
1005 const glsl_type *type = ir->return_deref->var->type;
1006 instr->num_components = type->vector_elements;
1007
1008 /* Setup destination register */
1009 unsigned bit_size = glsl_get_bit_size(type);
1010 nir_ssa_dest_init(&instr->instr, &instr->dest,
1011 type->vector_elements, bit_size, NULL);
1012
1013 /* Insert the created nir instruction now since in the case of boolean
1014 * result we will need to emit another instruction after it
1015 */
1016 nir_builder_instr_insert(&b, &instr->instr);
1017
1018 /*
1019 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1020 * consider a true boolean to be ~0. Fix this up with a != 0
1021 * comparison.
1022 */
1023 if (type->is_boolean()) {
1024 nir_alu_instr *load_ssbo_compare =
1025 nir_alu_instr_create(shader, nir_op_ine);
1026 load_ssbo_compare->src[0].src.is_ssa = true;
1027 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1028 load_ssbo_compare->src[1].src =
1029 nir_src_for_ssa(nir_imm_int(&b, 0));
1030 for (unsigned i = 0; i < type->vector_elements; i++)
1031 load_ssbo_compare->src[1].swizzle[i] = 0;
1032 nir_ssa_dest_init(&load_ssbo_compare->instr,
1033 &load_ssbo_compare->dest.dest,
1034 type->vector_elements, bit_size, NULL);
1035 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1036 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1037 dest = &load_ssbo_compare->dest.dest;
1038 }
1039 break;
1040 }
1041 case nir_intrinsic_ssbo_atomic_add:
1042 case nir_intrinsic_ssbo_atomic_imin:
1043 case nir_intrinsic_ssbo_atomic_umin:
1044 case nir_intrinsic_ssbo_atomic_imax:
1045 case nir_intrinsic_ssbo_atomic_umax:
1046 case nir_intrinsic_ssbo_atomic_and:
1047 case nir_intrinsic_ssbo_atomic_or:
1048 case nir_intrinsic_ssbo_atomic_xor:
1049 case nir_intrinsic_ssbo_atomic_exchange:
1050 case nir_intrinsic_ssbo_atomic_comp_swap: {
1051 int param_count = ir->actual_parameters.length();
1052 assert(param_count == 3 || param_count == 4);
1053
1054 /* Block index */
1055 exec_node *param = ir->actual_parameters.get_head();
1056 ir_instruction *inst = (ir_instruction *) param;
1057 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1058
1059 /* Offset */
1060 param = param->get_next();
1061 inst = (ir_instruction *) param;
1062 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1063
1064 /* data1 parameter (this is always present) */
1065 param = param->get_next();
1066 inst = (ir_instruction *) param;
1067 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1068
1069 /* data2 parameter (only with atomic_comp_swap) */
1070 if (param_count == 4) {
1071 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1072 param = param->get_next();
1073 inst = (ir_instruction *) param;
1074 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1075 }
1076
1077 /* Atomic result */
1078 assert(ir->return_deref);
1079 nir_ssa_dest_init(&instr->instr, &instr->dest,
1080 ir->return_deref->type->vector_elements, 32, NULL);
1081 nir_builder_instr_insert(&b, &instr->instr);
1082 break;
1083 }
1084 case nir_intrinsic_load_shared: {
1085 exec_node *param = ir->actual_parameters.get_head();
1086 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1087
1088 nir_intrinsic_set_base(instr, 0);
1089 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1090
1091 const glsl_type *type = ir->return_deref->var->type;
1092 instr->num_components = type->vector_elements;
1093
1094 /* Setup destination register */
1095 unsigned bit_size = glsl_get_bit_size(type);
1096 nir_ssa_dest_init(&instr->instr, &instr->dest,
1097 type->vector_elements, bit_size, NULL);
1098
1099 nir_builder_instr_insert(&b, &instr->instr);
1100 break;
1101 }
1102 case nir_intrinsic_store_shared: {
1103 exec_node *param = ir->actual_parameters.get_head();
1104 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1105
1106 param = param->get_next();
1107 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1108
1109 param = param->get_next();
1110 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1111 assert(write_mask);
1112
1113 nir_intrinsic_set_base(instr, 0);
1114 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1115
1116 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1117
1118 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1119 instr->num_components = val->type->vector_elements;
1120
1121 nir_builder_instr_insert(&b, &instr->instr);
1122 break;
1123 }
1124 case nir_intrinsic_shared_atomic_add:
1125 case nir_intrinsic_shared_atomic_imin:
1126 case nir_intrinsic_shared_atomic_umin:
1127 case nir_intrinsic_shared_atomic_imax:
1128 case nir_intrinsic_shared_atomic_umax:
1129 case nir_intrinsic_shared_atomic_and:
1130 case nir_intrinsic_shared_atomic_or:
1131 case nir_intrinsic_shared_atomic_xor:
1132 case nir_intrinsic_shared_atomic_exchange:
1133 case nir_intrinsic_shared_atomic_comp_swap: {
1134 int param_count = ir->actual_parameters.length();
1135 assert(param_count == 2 || param_count == 3);
1136
1137 /* Offset */
1138 exec_node *param = ir->actual_parameters.get_head();
1139 ir_instruction *inst = (ir_instruction *) param;
1140 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1141
1142 /* data1 parameter (this is always present) */
1143 param = param->get_next();
1144 inst = (ir_instruction *) param;
1145 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1146
1147 /* data2 parameter (only with atomic_comp_swap) */
1148 if (param_count == 3) {
1149 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1150 param = param->get_next();
1151 inst = (ir_instruction *) param;
1152 instr->src[2] =
1153 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1154 }
1155
1156 /* Atomic result */
1157 assert(ir->return_deref);
1158 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1159 nir_ssa_dest_init(&instr->instr, &instr->dest,
1160 ir->return_deref->type->vector_elements,
1161 bit_size, NULL);
1162 nir_builder_instr_insert(&b, &instr->instr);
1163 break;
1164 }
1165 case nir_intrinsic_vote_any:
1166 case nir_intrinsic_vote_all:
1167 case nir_intrinsic_vote_ieq: {
1168 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1169 instr->num_components = 1;
1170
1171 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1172 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1173
1174 nir_builder_instr_insert(&b, &instr->instr);
1175 break;
1176 }
1177
1178 case nir_intrinsic_ballot: {
1179 nir_ssa_dest_init(&instr->instr, &instr->dest,
1180 ir->return_deref->type->vector_elements, 64, NULL);
1181 instr->num_components = ir->return_deref->type->vector_elements;
1182
1183 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1184 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1185
1186 nir_builder_instr_insert(&b, &instr->instr);
1187 break;
1188 }
1189 case nir_intrinsic_read_invocation: {
1190 nir_ssa_dest_init(&instr->instr, &instr->dest,
1191 ir->return_deref->type->vector_elements, 32, NULL);
1192 instr->num_components = ir->return_deref->type->vector_elements;
1193
1194 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1195 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1196
1197 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1198 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1199
1200 nir_builder_instr_insert(&b, &instr->instr);
1201 break;
1202 }
1203 case nir_intrinsic_read_first_invocation: {
1204 nir_ssa_dest_init(&instr->instr, &instr->dest,
1205 ir->return_deref->type->vector_elements, 32, NULL);
1206 instr->num_components = ir->return_deref->type->vector_elements;
1207
1208 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1209 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1210
1211 nir_builder_instr_insert(&b, &instr->instr);
1212 break;
1213 }
1214 default:
1215 unreachable("not reached");
1216 }
1217
1218 if (ir->return_deref) {
1219 nir_intrinsic_instr *store_instr =
1220 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1221 store_instr->num_components = ir->return_deref->type->vector_elements;
1222 nir_intrinsic_set_write_mask(store_instr,
1223 (1 << store_instr->num_components) - 1);
1224
1225 store_instr->variables[0] =
1226 evaluate_deref(&store_instr->instr, ir->return_deref);
1227 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1228
1229 nir_builder_instr_insert(&b, &store_instr->instr);
1230 }
1231
1232 return;
1233 }
1234
1235 struct hash_entry *entry =
1236 _mesa_hash_table_search(this->overload_table, ir->callee);
1237 assert(entry);
1238 nir_function *callee = (nir_function *) entry->data;
1239
1240 nir_call_instr *instr = nir_call_instr_create(this->shader, callee);
1241
1242 unsigned i = 0;
1243 foreach_in_list(ir_dereference, param, &ir->actual_parameters) {
1244 instr->params[i] = evaluate_deref(&instr->instr, param);
1245 i++;
1246 }
1247
1248 instr->return_deref = evaluate_deref(&instr->instr, ir->return_deref);
1249 nir_builder_instr_insert(&b, &instr->instr);
1250 }
1251
1252 void
1253 nir_visitor::visit(ir_assignment *ir)
1254 {
1255 unsigned num_components = ir->lhs->type->vector_elements;
1256
1257 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1258 ir->lhs->variable_referenced()->data.precise;
1259
1260 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1261 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1262 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1263 nir_intrinsic_instr *copy =
1264 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1265
1266 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1267 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1268
1269 if (ir->condition) {
1270 nir_push_if(&b, evaluate_rvalue(ir->condition));
1271 nir_builder_instr_insert(&b, &copy->instr);
1272 nir_pop_if(&b, NULL);
1273 } else {
1274 nir_builder_instr_insert(&b, &copy->instr);
1275 }
1276 return;
1277 }
1278
1279 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1280
1281 ir->lhs->accept(this);
1282 nir_deref_var *lhs_deref = this->deref_head;
1283 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1284
1285 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1286 /* GLSL IR will give us the input to the write-masked assignment in a
1287 * single packed vector. So, for example, if the writemask is xzw, then
1288 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1289 * from the load.
1290 */
1291 unsigned swiz[4];
1292 unsigned component = 0;
1293 for (unsigned i = 0; i < 4; i++) {
1294 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1295 }
1296 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1297 }
1298
1299 nir_intrinsic_instr *store =
1300 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1301 store->num_components = ir->lhs->type->vector_elements;
1302 nir_intrinsic_set_write_mask(store, ir->write_mask);
1303 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1304 store->src[0] = nir_src_for_ssa(src);
1305
1306 if (ir->condition) {
1307 nir_push_if(&b, evaluate_rvalue(ir->condition));
1308 nir_builder_instr_insert(&b, &store->instr);
1309 nir_pop_if(&b, NULL);
1310 } else {
1311 nir_builder_instr_insert(&b, &store->instr);
1312 }
1313 }
1314
1315 /*
1316 * Given an instruction, returns a pointer to its destination or NULL if there
1317 * is no destination.
1318 *
1319 * Note that this only handles instructions we generate at this level.
1320 */
1321 static nir_dest *
1322 get_instr_dest(nir_instr *instr)
1323 {
1324 nir_alu_instr *alu_instr;
1325 nir_intrinsic_instr *intrinsic_instr;
1326 nir_tex_instr *tex_instr;
1327
1328 switch (instr->type) {
1329 case nir_instr_type_alu:
1330 alu_instr = nir_instr_as_alu(instr);
1331 return &alu_instr->dest.dest;
1332
1333 case nir_instr_type_intrinsic:
1334 intrinsic_instr = nir_instr_as_intrinsic(instr);
1335 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1336 return &intrinsic_instr->dest;
1337 else
1338 return NULL;
1339
1340 case nir_instr_type_tex:
1341 tex_instr = nir_instr_as_tex(instr);
1342 return &tex_instr->dest;
1343
1344 default:
1345 unreachable("not reached");
1346 }
1347
1348 return NULL;
1349 }
1350
1351 void
1352 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1353 unsigned bit_size)
1354 {
1355 nir_dest *dest = get_instr_dest(instr);
1356
1357 if (dest)
1358 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1359
1360 nir_builder_instr_insert(&b, instr);
1361
1362 if (dest) {
1363 assert(dest->is_ssa);
1364 this->result = &dest->ssa;
1365 }
1366 }
1367
1368 nir_ssa_def *
1369 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1370 {
1371 ir->accept(this);
1372 if (ir->as_dereference() || ir->as_constant()) {
1373 /*
1374 * A dereference is being used on the right hand side, which means we
1375 * must emit a variable load.
1376 */
1377
1378 nir_intrinsic_instr *load_instr =
1379 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1380 load_instr->num_components = ir->type->vector_elements;
1381 load_instr->variables[0] = this->deref_head;
1382 ralloc_steal(load_instr, load_instr->variables[0]);
1383 unsigned bit_size = glsl_get_bit_size(ir->type);
1384 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1385 }
1386
1387 return this->result;
1388 }
1389
1390 static bool
1391 type_is_float(glsl_base_type type)
1392 {
1393 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1394 type == GLSL_TYPE_FLOAT16;
1395 }
1396
1397 static bool
1398 type_is_signed(glsl_base_type type)
1399 {
1400 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1401 type == GLSL_TYPE_INT16;
1402 }
1403
1404 void
1405 nir_visitor::visit(ir_expression *ir)
1406 {
1407 /* Some special cases */
1408 switch (ir->operation) {
1409 case ir_binop_ubo_load: {
1410 nir_intrinsic_instr *load =
1411 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1412 unsigned bit_size = glsl_get_bit_size(ir->type);
1413 load->num_components = ir->type->vector_elements;
1414 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1415 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1416 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1417
1418 /*
1419 * In UBO's, a true boolean value is any non-zero value, but we consider
1420 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1421 */
1422
1423 if (ir->type->is_boolean())
1424 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1425
1426 return;
1427 }
1428
1429 case ir_unop_interpolate_at_centroid:
1430 case ir_binop_interpolate_at_offset:
1431 case ir_binop_interpolate_at_sample: {
1432 ir_dereference *deref = ir->operands[0]->as_dereference();
1433 ir_swizzle *swizzle = NULL;
1434 if (!deref) {
1435 /* the api does not allow a swizzle here, but the varying packing code
1436 * may have pushed one into here.
1437 */
1438 swizzle = ir->operands[0]->as_swizzle();
1439 assert(swizzle);
1440 deref = swizzle->val->as_dereference();
1441 assert(deref);
1442 }
1443
1444 deref->accept(this);
1445
1446 nir_intrinsic_op op;
1447 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1448 switch (ir->operation) {
1449 case ir_unop_interpolate_at_centroid:
1450 op = nir_intrinsic_interp_var_at_centroid;
1451 break;
1452 case ir_binop_interpolate_at_offset:
1453 op = nir_intrinsic_interp_var_at_offset;
1454 break;
1455 case ir_binop_interpolate_at_sample:
1456 op = nir_intrinsic_interp_var_at_sample;
1457 break;
1458 default:
1459 unreachable("Invalid interpolation intrinsic");
1460 }
1461 } else {
1462 /* This case can happen if the vertex shader does not write the
1463 * given varying. In this case, the linker will lower it to a
1464 * global variable. Since interpolating a variable makes no
1465 * sense, we'll just turn it into a load which will probably
1466 * eventually end up as an SSA definition.
1467 */
1468 assert(this->deref_head->var->data.mode == nir_var_global);
1469 op = nir_intrinsic_load_var;
1470 }
1471
1472 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1473 intrin->num_components = deref->type->vector_elements;
1474 intrin->variables[0] = this->deref_head;
1475 ralloc_steal(intrin, intrin->variables[0]);
1476
1477 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1478 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1479 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1480
1481 unsigned bit_size = glsl_get_bit_size(deref->type);
1482 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1483
1484 if (swizzle) {
1485 unsigned swiz[4] = {
1486 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1487 };
1488
1489 result = nir_swizzle(&b, result, swiz,
1490 swizzle->type->vector_elements, false);
1491 }
1492
1493 return;
1494 }
1495
1496 default:
1497 break;
1498 }
1499
1500 nir_ssa_def *srcs[4];
1501 for (unsigned i = 0; i < ir->num_operands; i++)
1502 srcs[i] = evaluate_rvalue(ir->operands[i]);
1503
1504 glsl_base_type types[4];
1505 for (unsigned i = 0; i < ir->num_operands; i++)
1506 if (supports_ints)
1507 types[i] = ir->operands[i]->type->base_type;
1508 else
1509 types[i] = GLSL_TYPE_FLOAT;
1510
1511 glsl_base_type out_type;
1512 if (supports_ints)
1513 out_type = ir->type->base_type;
1514 else
1515 out_type = GLSL_TYPE_FLOAT;
1516
1517 switch (ir->operation) {
1518 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1519 case ir_unop_logic_not:
1520 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1521 break;
1522 case ir_unop_neg:
1523 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1524 : nir_ineg(&b, srcs[0]);
1525 break;
1526 case ir_unop_abs:
1527 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1528 : nir_iabs(&b, srcs[0]);
1529 break;
1530 case ir_unop_saturate:
1531 assert(type_is_float(types[0]));
1532 result = nir_fsat(&b, srcs[0]);
1533 break;
1534 case ir_unop_sign:
1535 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1536 : nir_isign(&b, srcs[0]);
1537 break;
1538 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1539 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1540 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1541 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1542 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1543 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1544 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1545 case ir_unop_i2f:
1546 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1547 break;
1548 case ir_unop_u2f:
1549 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1550 break;
1551 case ir_unop_b2f:
1552 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1553 break;
1554 case ir_unop_f2i:
1555 case ir_unop_f2u:
1556 case ir_unop_f2b:
1557 case ir_unop_i2b:
1558 case ir_unop_b2i:
1559 case ir_unop_b2i64:
1560 case ir_unop_d2f:
1561 case ir_unop_f2d:
1562 case ir_unop_d2i:
1563 case ir_unop_d2u:
1564 case ir_unop_d2b:
1565 case ir_unop_i2d:
1566 case ir_unop_u2d:
1567 case ir_unop_i642i:
1568 case ir_unop_i642u:
1569 case ir_unop_i642f:
1570 case ir_unop_i642b:
1571 case ir_unop_i642d:
1572 case ir_unop_u642i:
1573 case ir_unop_u642u:
1574 case ir_unop_u642f:
1575 case ir_unop_u642d:
1576 case ir_unop_i2i64:
1577 case ir_unop_u2i64:
1578 case ir_unop_f2i64:
1579 case ir_unop_d2i64:
1580 case ir_unop_i2u64:
1581 case ir_unop_u2u64:
1582 case ir_unop_f2u64:
1583 case ir_unop_d2u64:
1584 case ir_unop_i2u:
1585 case ir_unop_u2i:
1586 case ir_unop_i642u64:
1587 case ir_unop_u642i64: {
1588 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1589 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1590 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1591 nir_rounding_mode_undef),
1592 srcs[0], NULL, NULL, NULL);
1593 /* b2i and b2f don't have fixed bit-size versions so the builder will
1594 * just assume 32 and we have to fix it up here.
1595 */
1596 result->bit_size = nir_alu_type_get_type_size(dst_type);
1597 break;
1598 }
1599
1600 case ir_unop_bitcast_i2f:
1601 case ir_unop_bitcast_f2i:
1602 case ir_unop_bitcast_u2f:
1603 case ir_unop_bitcast_f2u:
1604 case ir_unop_bitcast_i642d:
1605 case ir_unop_bitcast_d2i64:
1606 case ir_unop_bitcast_u642d:
1607 case ir_unop_bitcast_d2u64:
1608 case ir_unop_subroutine_to_int:
1609 /* no-op */
1610 result = nir_imov(&b, srcs[0]);
1611 break;
1612 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1613 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1614 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1615 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1616 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1617 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1618 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1619 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1620 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1621 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1622 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1623 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1624 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1625 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1626 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1627 case ir_unop_pack_snorm_2x16:
1628 result = nir_pack_snorm_2x16(&b, srcs[0]);
1629 break;
1630 case ir_unop_pack_snorm_4x8:
1631 result = nir_pack_snorm_4x8(&b, srcs[0]);
1632 break;
1633 case ir_unop_pack_unorm_2x16:
1634 result = nir_pack_unorm_2x16(&b, srcs[0]);
1635 break;
1636 case ir_unop_pack_unorm_4x8:
1637 result = nir_pack_unorm_4x8(&b, srcs[0]);
1638 break;
1639 case ir_unop_pack_half_2x16:
1640 result = nir_pack_half_2x16(&b, srcs[0]);
1641 break;
1642 case ir_unop_unpack_snorm_2x16:
1643 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1644 break;
1645 case ir_unop_unpack_snorm_4x8:
1646 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1647 break;
1648 case ir_unop_unpack_unorm_2x16:
1649 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1650 break;
1651 case ir_unop_unpack_unorm_4x8:
1652 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1653 break;
1654 case ir_unop_unpack_half_2x16:
1655 result = nir_unpack_half_2x16(&b, srcs[0]);
1656 break;
1657 case ir_unop_pack_sampler_2x32:
1658 case ir_unop_pack_image_2x32:
1659 case ir_unop_pack_double_2x32:
1660 case ir_unop_pack_int_2x32:
1661 case ir_unop_pack_uint_2x32:
1662 result = nir_pack_64_2x32(&b, srcs[0]);
1663 break;
1664 case ir_unop_unpack_sampler_2x32:
1665 case ir_unop_unpack_image_2x32:
1666 case ir_unop_unpack_double_2x32:
1667 case ir_unop_unpack_int_2x32:
1668 case ir_unop_unpack_uint_2x32:
1669 result = nir_unpack_64_2x32(&b, srcs[0]);
1670 break;
1671 case ir_unop_bitfield_reverse:
1672 result = nir_bitfield_reverse(&b, srcs[0]);
1673 break;
1674 case ir_unop_bit_count:
1675 result = nir_bit_count(&b, srcs[0]);
1676 break;
1677 case ir_unop_find_msb:
1678 switch (types[0]) {
1679 case GLSL_TYPE_UINT:
1680 result = nir_ufind_msb(&b, srcs[0]);
1681 break;
1682 case GLSL_TYPE_INT:
1683 result = nir_ifind_msb(&b, srcs[0]);
1684 break;
1685 default:
1686 unreachable("Invalid type for findMSB()");
1687 }
1688 break;
1689 case ir_unop_find_lsb:
1690 result = nir_find_lsb(&b, srcs[0]);
1691 break;
1692
1693 case ir_unop_noise:
1694 switch (ir->type->vector_elements) {
1695 case 1:
1696 switch (ir->operands[0]->type->vector_elements) {
1697 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1698 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1699 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1700 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1701 default: unreachable("not reached");
1702 }
1703 break;
1704 case 2:
1705 switch (ir->operands[0]->type->vector_elements) {
1706 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1707 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1708 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1709 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1710 default: unreachable("not reached");
1711 }
1712 break;
1713 case 3:
1714 switch (ir->operands[0]->type->vector_elements) {
1715 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1716 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1717 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1718 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1719 default: unreachable("not reached");
1720 }
1721 break;
1722 case 4:
1723 switch (ir->operands[0]->type->vector_elements) {
1724 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1725 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1726 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1727 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1728 default: unreachable("not reached");
1729 }
1730 break;
1731 default:
1732 unreachable("not reached");
1733 }
1734 break;
1735 case ir_unop_get_buffer_size: {
1736 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1737 this->shader,
1738 nir_intrinsic_get_buffer_size);
1739 load->num_components = ir->type->vector_elements;
1740 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1741 unsigned bit_size = glsl_get_bit_size(ir->type);
1742 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1743 return;
1744 }
1745
1746 case ir_binop_add:
1747 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1748 : nir_iadd(&b, srcs[0], srcs[1]);
1749 break;
1750 case ir_binop_sub:
1751 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1752 : nir_isub(&b, srcs[0], srcs[1]);
1753 break;
1754 case ir_binop_mul:
1755 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1756 : nir_imul(&b, srcs[0], srcs[1]);
1757 break;
1758 case ir_binop_div:
1759 if (type_is_float(out_type))
1760 result = nir_fdiv(&b, srcs[0], srcs[1]);
1761 else if (type_is_signed(out_type))
1762 result = nir_idiv(&b, srcs[0], srcs[1]);
1763 else
1764 result = nir_udiv(&b, srcs[0], srcs[1]);
1765 break;
1766 case ir_binop_mod:
1767 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1768 : nir_umod(&b, srcs[0], srcs[1]);
1769 break;
1770 case ir_binop_min:
1771 if (type_is_float(out_type))
1772 result = nir_fmin(&b, srcs[0], srcs[1]);
1773 else if (type_is_signed(out_type))
1774 result = nir_imin(&b, srcs[0], srcs[1]);
1775 else
1776 result = nir_umin(&b, srcs[0], srcs[1]);
1777 break;
1778 case ir_binop_max:
1779 if (type_is_float(out_type))
1780 result = nir_fmax(&b, srcs[0], srcs[1]);
1781 else if (type_is_signed(out_type))
1782 result = nir_imax(&b, srcs[0], srcs[1]);
1783 else
1784 result = nir_umax(&b, srcs[0], srcs[1]);
1785 break;
1786 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1787 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1788 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1789 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1790 case ir_binop_logic_and:
1791 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1792 : nir_fand(&b, srcs[0], srcs[1]);
1793 break;
1794 case ir_binop_logic_or:
1795 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1796 : nir_for(&b, srcs[0], srcs[1]);
1797 break;
1798 case ir_binop_logic_xor:
1799 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1800 : nir_fxor(&b, srcs[0], srcs[1]);
1801 break;
1802 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1803 case ir_binop_rshift:
1804 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1805 : nir_ushr(&b, srcs[0], srcs[1]);
1806 break;
1807 case ir_binop_imul_high:
1808 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1809 : nir_umul_high(&b, srcs[0], srcs[1]);
1810 break;
1811 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1812 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1813 case ir_binop_less:
1814 if (supports_ints) {
1815 if (type_is_float(types[0]))
1816 result = nir_flt(&b, srcs[0], srcs[1]);
1817 else if (type_is_signed(types[0]))
1818 result = nir_ilt(&b, srcs[0], srcs[1]);
1819 else
1820 result = nir_ult(&b, srcs[0], srcs[1]);
1821 } else {
1822 result = nir_slt(&b, srcs[0], srcs[1]);
1823 }
1824 break;
1825 case ir_binop_gequal:
1826 if (supports_ints) {
1827 if (type_is_float(types[0]))
1828 result = nir_fge(&b, srcs[0], srcs[1]);
1829 else if (type_is_signed(types[0]))
1830 result = nir_ige(&b, srcs[0], srcs[1]);
1831 else
1832 result = nir_uge(&b, srcs[0], srcs[1]);
1833 } else {
1834 result = nir_slt(&b, srcs[0], srcs[1]);
1835 }
1836 break;
1837 case ir_binop_equal:
1838 if (supports_ints) {
1839 if (type_is_float(types[0]))
1840 result = nir_feq(&b, srcs[0], srcs[1]);
1841 else
1842 result = nir_ieq(&b, srcs[0], srcs[1]);
1843 } else {
1844 result = nir_seq(&b, srcs[0], srcs[1]);
1845 }
1846 break;
1847 case ir_binop_nequal:
1848 if (supports_ints) {
1849 if (type_is_float(types[0]))
1850 result = nir_fne(&b, srcs[0], srcs[1]);
1851 else
1852 result = nir_ine(&b, srcs[0], srcs[1]);
1853 } else {
1854 result = nir_sne(&b, srcs[0], srcs[1]);
1855 }
1856 break;
1857 case ir_binop_all_equal:
1858 if (supports_ints) {
1859 if (type_is_float(types[0])) {
1860 switch (ir->operands[0]->type->vector_elements) {
1861 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1862 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1863 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1864 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1865 default:
1866 unreachable("not reached");
1867 }
1868 } else {
1869 switch (ir->operands[0]->type->vector_elements) {
1870 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1871 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1872 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1873 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1874 default:
1875 unreachable("not reached");
1876 }
1877 }
1878 } else {
1879 switch (ir->operands[0]->type->vector_elements) {
1880 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1881 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1882 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1883 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1884 default:
1885 unreachable("not reached");
1886 }
1887 }
1888 break;
1889 case ir_binop_any_nequal:
1890 if (supports_ints) {
1891 if (type_is_float(types[0])) {
1892 switch (ir->operands[0]->type->vector_elements) {
1893 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1894 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1895 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1896 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1897 default:
1898 unreachable("not reached");
1899 }
1900 } else {
1901 switch (ir->operands[0]->type->vector_elements) {
1902 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1903 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1904 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1905 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1906 default:
1907 unreachable("not reached");
1908 }
1909 }
1910 } else {
1911 switch (ir->operands[0]->type->vector_elements) {
1912 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1913 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1914 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1915 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1916 default:
1917 unreachable("not reached");
1918 }
1919 }
1920 break;
1921 case ir_binop_dot:
1922 switch (ir->operands[0]->type->vector_elements) {
1923 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1924 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1925 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1926 default:
1927 unreachable("not reached");
1928 }
1929 break;
1930
1931 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1932 case ir_triop_fma:
1933 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1934 break;
1935 case ir_triop_lrp:
1936 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1937 break;
1938 case ir_triop_csel:
1939 if (supports_ints)
1940 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1941 else
1942 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1943 break;
1944 case ir_triop_bitfield_extract:
1945 result = (out_type == GLSL_TYPE_INT) ?
1946 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1947 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1948 break;
1949 case ir_quadop_bitfield_insert:
1950 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1951 break;
1952 case ir_quadop_vector:
1953 result = nir_vec(&b, srcs, ir->type->vector_elements);
1954 break;
1955
1956 default:
1957 unreachable("not reached");
1958 }
1959 }
1960
1961 void
1962 nir_visitor::visit(ir_swizzle *ir)
1963 {
1964 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1965 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1966 ir->type->vector_elements, !supports_ints);
1967 }
1968
1969 void
1970 nir_visitor::visit(ir_texture *ir)
1971 {
1972 unsigned num_srcs;
1973 nir_texop op;
1974 switch (ir->op) {
1975 case ir_tex:
1976 op = nir_texop_tex;
1977 num_srcs = 1; /* coordinate */
1978 break;
1979
1980 case ir_txb:
1981 case ir_txl:
1982 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1983 num_srcs = 2; /* coordinate, bias/lod */
1984 break;
1985
1986 case ir_txd:
1987 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1988 num_srcs = 3;
1989 break;
1990
1991 case ir_txf:
1992 op = nir_texop_txf;
1993 if (ir->lod_info.lod != NULL)
1994 num_srcs = 2; /* coordinate, lod */
1995 else
1996 num_srcs = 1; /* coordinate */
1997 break;
1998
1999 case ir_txf_ms:
2000 op = nir_texop_txf_ms;
2001 num_srcs = 2; /* coordinate, sample_index */
2002 break;
2003
2004 case ir_txs:
2005 op = nir_texop_txs;
2006 if (ir->lod_info.lod != NULL)
2007 num_srcs = 1; /* lod */
2008 else
2009 num_srcs = 0;
2010 break;
2011
2012 case ir_lod:
2013 op = nir_texop_lod;
2014 num_srcs = 1; /* coordinate */
2015 break;
2016
2017 case ir_tg4:
2018 op = nir_texop_tg4;
2019 num_srcs = 1; /* coordinate */
2020 break;
2021
2022 case ir_query_levels:
2023 op = nir_texop_query_levels;
2024 num_srcs = 0;
2025 break;
2026
2027 case ir_texture_samples:
2028 op = nir_texop_texture_samples;
2029 num_srcs = 0;
2030 break;
2031
2032 case ir_samples_identical:
2033 op = nir_texop_samples_identical;
2034 num_srcs = 1; /* coordinate */
2035 break;
2036
2037 default:
2038 unreachable("not reached");
2039 }
2040
2041 if (ir->projector != NULL)
2042 num_srcs++;
2043 if (ir->shadow_comparator != NULL)
2044 num_srcs++;
2045 if (ir->offset != NULL)
2046 num_srcs++;
2047
2048 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2049
2050 instr->op = op;
2051 instr->sampler_dim =
2052 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2053 instr->is_array = ir->sampler->type->sampler_array;
2054 instr->is_shadow = ir->sampler->type->sampler_shadow;
2055 if (instr->is_shadow)
2056 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2057 switch (ir->type->base_type) {
2058 case GLSL_TYPE_FLOAT:
2059 instr->dest_type = nir_type_float;
2060 break;
2061 case GLSL_TYPE_INT:
2062 instr->dest_type = nir_type_int;
2063 break;
2064 case GLSL_TYPE_BOOL:
2065 case GLSL_TYPE_UINT:
2066 instr->dest_type = nir_type_uint;
2067 break;
2068 default:
2069 unreachable("not reached");
2070 }
2071
2072 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2073
2074 unsigned src_number = 0;
2075
2076 if (ir->coordinate != NULL) {
2077 instr->coord_components = ir->coordinate->type->vector_elements;
2078 instr->src[src_number].src =
2079 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2080 instr->src[src_number].src_type = nir_tex_src_coord;
2081 src_number++;
2082 }
2083
2084 if (ir->projector != NULL) {
2085 instr->src[src_number].src =
2086 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2087 instr->src[src_number].src_type = nir_tex_src_projector;
2088 src_number++;
2089 }
2090
2091 if (ir->shadow_comparator != NULL) {
2092 instr->src[src_number].src =
2093 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2094 instr->src[src_number].src_type = nir_tex_src_comparator;
2095 src_number++;
2096 }
2097
2098 if (ir->offset != NULL) {
2099 /* we don't support multiple offsets yet */
2100 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2101
2102 instr->src[src_number].src =
2103 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2104 instr->src[src_number].src_type = nir_tex_src_offset;
2105 src_number++;
2106 }
2107
2108 switch (ir->op) {
2109 case ir_txb:
2110 instr->src[src_number].src =
2111 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2112 instr->src[src_number].src_type = nir_tex_src_bias;
2113 src_number++;
2114 break;
2115
2116 case ir_txl:
2117 case ir_txf:
2118 case ir_txs:
2119 if (ir->lod_info.lod != NULL) {
2120 instr->src[src_number].src =
2121 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2122 instr->src[src_number].src_type = nir_tex_src_lod;
2123 src_number++;
2124 }
2125 break;
2126
2127 case ir_txd:
2128 instr->src[src_number].src =
2129 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2130 instr->src[src_number].src_type = nir_tex_src_ddx;
2131 src_number++;
2132 instr->src[src_number].src =
2133 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2134 instr->src[src_number].src_type = nir_tex_src_ddy;
2135 src_number++;
2136 break;
2137
2138 case ir_txf_ms:
2139 instr->src[src_number].src =
2140 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2141 instr->src[src_number].src_type = nir_tex_src_ms_index;
2142 src_number++;
2143 break;
2144
2145 case ir_tg4:
2146 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2147 break;
2148
2149 default:
2150 break;
2151 }
2152
2153 assert(src_number == num_srcs);
2154
2155 unsigned bit_size = glsl_get_bit_size(ir->type);
2156 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2157 }
2158
2159 void
2160 nir_visitor::visit(ir_constant *ir)
2161 {
2162 /*
2163 * We don't know if this variable is an array or struct that gets
2164 * dereferenced, so do the safe thing an make it a variable with a
2165 * constant initializer and return a dereference.
2166 */
2167
2168 nir_variable *var =
2169 nir_local_variable_create(this->impl, ir->type, "const_temp");
2170 var->data.read_only = true;
2171 var->constant_initializer = constant_copy(ir, var);
2172
2173 this->deref_head = nir_deref_var_create(this->shader, var);
2174 this->deref_tail = &this->deref_head->deref;
2175 }
2176
2177 void
2178 nir_visitor::visit(ir_dereference_variable *ir)
2179 {
2180 struct hash_entry *entry =
2181 _mesa_hash_table_search(this->var_table, ir->var);
2182 assert(entry);
2183 nir_variable *var = (nir_variable *) entry->data;
2184
2185 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2186 this->deref_head = deref;
2187 this->deref_tail = &deref->deref;
2188 }
2189
2190 void
2191 nir_visitor::visit(ir_dereference_record *ir)
2192 {
2193 ir->record->accept(this);
2194
2195 int field_index = ir->field_idx;
2196 assert(field_index >= 0);
2197
2198 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2199 deref->deref.type = ir->type;
2200 this->deref_tail->child = &deref->deref;
2201 this->deref_tail = &deref->deref;
2202 }
2203
2204 void
2205 nir_visitor::visit(ir_dereference_array *ir)
2206 {
2207 nir_deref_array *deref = nir_deref_array_create(this->shader);
2208 deref->deref.type = ir->type;
2209
2210 ir_constant *const_index = ir->array_index->as_constant();
2211 if (const_index != NULL) {
2212 deref->deref_array_type = nir_deref_array_type_direct;
2213 deref->base_offset = const_index->value.u[0];
2214 } else {
2215 deref->deref_array_type = nir_deref_array_type_indirect;
2216 deref->indirect =
2217 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2218 }
2219
2220 ir->array->accept(this);
2221
2222 this->deref_tail->child = &deref->deref;
2223 ralloc_steal(this->deref_tail, deref);
2224 this->deref_tail = &deref->deref;
2225 }
2226
2227 void
2228 nir_visitor::visit(ir_barrier *)
2229 {
2230 nir_intrinsic_instr *instr =
2231 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2232 nir_builder_instr_insert(&b, &instr->instr);
2233 }