2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
29 #include "nir_control_flow_private.h"
33 nir_shader_create(void *mem_ctx
,
34 gl_shader_stage stage
,
35 const nir_shader_compiler_options
*options
)
37 nir_shader
*shader
= ralloc(mem_ctx
, nir_shader
);
39 exec_list_make_empty(&shader
->uniforms
);
40 exec_list_make_empty(&shader
->inputs
);
41 exec_list_make_empty(&shader
->outputs
);
43 shader
->options
= options
;
44 memset(&shader
->info
, 0, sizeof(shader
->info
));
46 exec_list_make_empty(&shader
->functions
);
47 exec_list_make_empty(&shader
->registers
);
48 exec_list_make_empty(&shader
->globals
);
49 exec_list_make_empty(&shader
->system_values
);
50 shader
->reg_alloc
= 0;
52 shader
->num_inputs
= 0;
53 shader
->num_outputs
= 0;
54 shader
->num_uniforms
= 0;
56 shader
->stage
= stage
;
62 reg_create(void *mem_ctx
, struct exec_list
*list
)
64 nir_register
*reg
= ralloc(mem_ctx
, nir_register
);
66 list_inithead(®
->uses
);
67 list_inithead(®
->defs
);
68 list_inithead(®
->if_uses
);
70 reg
->num_components
= 0;
71 reg
->num_array_elems
= 0;
72 reg
->is_packed
= false;
75 exec_list_push_tail(list
, ®
->node
);
81 nir_global_reg_create(nir_shader
*shader
)
83 nir_register
*reg
= reg_create(shader
, &shader
->registers
);
84 reg
->index
= shader
->reg_alloc
++;
85 reg
->is_global
= true;
91 nir_local_reg_create(nir_function_impl
*impl
)
93 nir_register
*reg
= reg_create(ralloc_parent(impl
), &impl
->registers
);
94 reg
->index
= impl
->reg_alloc
++;
95 reg
->is_global
= false;
101 nir_reg_remove(nir_register
*reg
)
103 exec_node_remove(®
->node
);
107 nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
)
109 switch (var
->data
.mode
) {
111 assert(!"invalid mode");
115 assert(!"nir_shader_add_variable cannot be used for local variables");
119 assert(!"nir_shader_add_variable cannot be used for function parameters");
123 exec_list_push_tail(&shader
->globals
, &var
->node
);
126 case nir_var_shader_in
:
127 exec_list_push_tail(&shader
->inputs
, &var
->node
);
130 case nir_var_shader_out
:
131 exec_list_push_tail(&shader
->outputs
, &var
->node
);
134 case nir_var_uniform
:
135 case nir_var_shader_storage
:
136 exec_list_push_tail(&shader
->uniforms
, &var
->node
);
139 case nir_var_system_value
:
140 exec_list_push_tail(&shader
->system_values
, &var
->node
);
146 nir_variable_create(nir_shader
*shader
, nir_variable_mode mode
,
147 const struct glsl_type
*type
, const char *name
)
149 nir_variable
*var
= rzalloc(shader
, nir_variable
);
150 var
->name
= ralloc_strdup(var
, name
);
152 var
->data
.mode
= mode
;
154 if ((mode
== nir_var_shader_in
&& shader
->stage
!= MESA_SHADER_VERTEX
) ||
155 (mode
== nir_var_shader_out
&& shader
->stage
!= MESA_SHADER_FRAGMENT
))
156 var
->data
.interpolation
= INTERP_QUALIFIER_SMOOTH
;
158 if (mode
== nir_var_shader_in
|| mode
== nir_var_uniform
)
159 var
->data
.read_only
= true;
161 nir_shader_add_variable(shader
, var
);
167 nir_local_variable_create(nir_function_impl
*impl
,
168 const struct glsl_type
*type
, const char *name
)
170 nir_variable
*var
= rzalloc(impl
->function
->shader
, nir_variable
);
171 var
->name
= ralloc_strdup(var
, name
);
173 var
->data
.mode
= nir_var_local
;
175 nir_function_impl_add_variable(impl
, var
);
181 nir_function_create(nir_shader
*shader
, const char *name
)
183 nir_function
*func
= ralloc(shader
, nir_function
);
185 exec_list_push_tail(&shader
->functions
, &func
->node
);
187 func
->name
= ralloc_strdup(func
, name
);
188 func
->shader
= shader
;
189 func
->num_params
= 0;
191 func
->return_type
= glsl_void_type();
197 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *mem_ctx
)
199 dest
->is_ssa
= src
->is_ssa
;
201 dest
->ssa
= src
->ssa
;
203 dest
->reg
.base_offset
= src
->reg
.base_offset
;
204 dest
->reg
.reg
= src
->reg
.reg
;
205 if (src
->reg
.indirect
) {
206 dest
->reg
.indirect
= ralloc(mem_ctx
, nir_src
);
207 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, mem_ctx
);
209 dest
->reg
.indirect
= NULL
;
214 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
)
216 /* Copying an SSA definition makes no sense whatsoever. */
217 assert(!src
->is_ssa
);
219 dest
->is_ssa
= false;
221 dest
->reg
.base_offset
= src
->reg
.base_offset
;
222 dest
->reg
.reg
= src
->reg
.reg
;
223 if (src
->reg
.indirect
) {
224 dest
->reg
.indirect
= ralloc(instr
, nir_src
);
225 nir_src_copy(dest
->reg
.indirect
, src
->reg
.indirect
, instr
);
227 dest
->reg
.indirect
= NULL
;
232 nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
233 nir_alu_instr
*instr
)
235 nir_src_copy(&dest
->src
, &src
->src
, &instr
->instr
);
236 dest
->abs
= src
->abs
;
237 dest
->negate
= src
->negate
;
238 for (unsigned i
= 0; i
< 4; i
++)
239 dest
->swizzle
[i
] = src
->swizzle
[i
];
243 nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
244 nir_alu_instr
*instr
)
246 nir_dest_copy(&dest
->dest
, &src
->dest
, &instr
->instr
);
247 dest
->write_mask
= src
->write_mask
;
248 dest
->saturate
= src
->saturate
;
253 cf_init(nir_cf_node
*node
, nir_cf_node_type type
)
255 exec_node_init(&node
->node
);
261 nir_function_impl_create_bare(nir_shader
*shader
)
263 nir_function_impl
*impl
= ralloc(shader
, nir_function_impl
);
265 impl
->function
= NULL
;
267 cf_init(&impl
->cf_node
, nir_cf_node_function
);
269 exec_list_make_empty(&impl
->body
);
270 exec_list_make_empty(&impl
->registers
);
271 exec_list_make_empty(&impl
->locals
);
272 impl
->num_params
= 0;
274 impl
->return_var
= NULL
;
277 impl
->valid_metadata
= nir_metadata_none
;
279 /* create start & end blocks */
280 nir_block
*start_block
= nir_block_create(shader
);
281 nir_block
*end_block
= nir_block_create(shader
);
282 start_block
->cf_node
.parent
= &impl
->cf_node
;
283 end_block
->cf_node
.parent
= &impl
->cf_node
;
284 impl
->end_block
= end_block
;
286 exec_list_push_tail(&impl
->body
, &start_block
->cf_node
.node
);
288 start_block
->successors
[0] = end_block
;
289 _mesa_set_add(end_block
->predecessors
, start_block
);
294 nir_function_impl_create(nir_function
*function
)
296 assert(function
->impl
== NULL
);
298 nir_function_impl
*impl
= nir_function_impl_create_bare(function
->shader
);
300 function
->impl
= impl
;
301 impl
->function
= function
;
307 nir_block_create(nir_shader
*shader
)
309 nir_block
*block
= ralloc(shader
, nir_block
);
311 cf_init(&block
->cf_node
, nir_cf_node_block
);
313 block
->successors
[0] = block
->successors
[1] = NULL
;
314 block
->predecessors
= _mesa_set_create(block
, _mesa_hash_pointer
,
315 _mesa_key_pointer_equal
);
316 block
->imm_dom
= NULL
;
317 /* XXX maybe it would be worth it to defer allocation? This
318 * way it doesn't get allocated for shader ref's that never run
319 * nir_calc_dominance? For example, state-tracker creates an
320 * initial IR, clones that, runs appropriate lowering pass, passes
321 * to driver which does common lowering/opt, and then stores ref
322 * which is later used to do state specific lowering and futher
323 * opt. Do any of the references not need dominance metadata?
325 block
->dom_frontier
= _mesa_set_create(block
, _mesa_hash_pointer
,
326 _mesa_key_pointer_equal
);
328 exec_list_make_empty(&block
->instr_list
);
334 src_init(nir_src
*src
)
338 src
->reg
.indirect
= NULL
;
339 src
->reg
.base_offset
= 0;
343 nir_if_create(nir_shader
*shader
)
345 nir_if
*if_stmt
= ralloc(shader
, nir_if
);
347 cf_init(&if_stmt
->cf_node
, nir_cf_node_if
);
348 src_init(&if_stmt
->condition
);
350 nir_block
*then
= nir_block_create(shader
);
351 exec_list_make_empty(&if_stmt
->then_list
);
352 exec_list_push_tail(&if_stmt
->then_list
, &then
->cf_node
.node
);
353 then
->cf_node
.parent
= &if_stmt
->cf_node
;
355 nir_block
*else_stmt
= nir_block_create(shader
);
356 exec_list_make_empty(&if_stmt
->else_list
);
357 exec_list_push_tail(&if_stmt
->else_list
, &else_stmt
->cf_node
.node
);
358 else_stmt
->cf_node
.parent
= &if_stmt
->cf_node
;
364 nir_loop_create(nir_shader
*shader
)
366 nir_loop
*loop
= ralloc(shader
, nir_loop
);
368 cf_init(&loop
->cf_node
, nir_cf_node_loop
);
370 nir_block
*body
= nir_block_create(shader
);
371 exec_list_make_empty(&loop
->body
);
372 exec_list_push_tail(&loop
->body
, &body
->cf_node
.node
);
373 body
->cf_node
.parent
= &loop
->cf_node
;
375 body
->successors
[0] = body
;
376 _mesa_set_add(body
->predecessors
, body
);
382 instr_init(nir_instr
*instr
, nir_instr_type type
)
386 exec_node_init(&instr
->node
);
390 dest_init(nir_dest
*dest
)
392 dest
->is_ssa
= false;
393 dest
->reg
.reg
= NULL
;
394 dest
->reg
.indirect
= NULL
;
395 dest
->reg
.base_offset
= 0;
399 alu_dest_init(nir_alu_dest
*dest
)
401 dest_init(&dest
->dest
);
402 dest
->saturate
= false;
403 dest
->write_mask
= 0xf;
407 alu_src_init(nir_alu_src
*src
)
410 src
->abs
= src
->negate
= false;
418 nir_alu_instr_create(nir_shader
*shader
, nir_op op
)
420 unsigned num_srcs
= nir_op_infos
[op
].num_inputs
;
421 nir_alu_instr
*instr
=
423 sizeof(nir_alu_instr
) + num_srcs
* sizeof(nir_alu_src
));
425 instr_init(&instr
->instr
, nir_instr_type_alu
);
427 alu_dest_init(&instr
->dest
);
428 for (unsigned i
= 0; i
< num_srcs
; i
++)
429 alu_src_init(&instr
->src
[i
]);
435 nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
)
437 nir_jump_instr
*instr
= ralloc(shader
, nir_jump_instr
);
438 instr_init(&instr
->instr
, nir_instr_type_jump
);
443 nir_load_const_instr
*
444 nir_load_const_instr_create(nir_shader
*shader
, unsigned num_components
)
446 nir_load_const_instr
*instr
= ralloc(shader
, nir_load_const_instr
);
447 instr_init(&instr
->instr
, nir_instr_type_load_const
);
449 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, NULL
);
454 nir_intrinsic_instr
*
455 nir_intrinsic_instr_create(nir_shader
*shader
, nir_intrinsic_op op
)
457 unsigned num_srcs
= nir_intrinsic_infos
[op
].num_srcs
;
458 nir_intrinsic_instr
*instr
=
460 sizeof(nir_intrinsic_instr
) + num_srcs
* sizeof(nir_src
));
462 instr_init(&instr
->instr
, nir_instr_type_intrinsic
);
463 instr
->intrinsic
= op
;
465 if (nir_intrinsic_infos
[op
].has_dest
)
466 dest_init(&instr
->dest
);
468 for (unsigned i
= 0; i
< num_srcs
; i
++)
469 src_init(&instr
->src
[i
]);
475 nir_call_instr_create(nir_shader
*shader
, nir_function
*callee
)
477 nir_call_instr
*instr
= ralloc(shader
, nir_call_instr
);
478 instr_init(&instr
->instr
, nir_instr_type_call
);
480 instr
->callee
= callee
;
481 instr
->num_params
= callee
->num_params
;
482 instr
->params
= ralloc_array(instr
, nir_deref_var
*, instr
->num_params
);
483 instr
->return_deref
= NULL
;
489 nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
)
491 nir_tex_instr
*instr
= rzalloc(shader
, nir_tex_instr
);
492 instr_init(&instr
->instr
, nir_instr_type_tex
);
494 dest_init(&instr
->dest
);
496 instr
->num_srcs
= num_srcs
;
497 instr
->src
= ralloc_array(instr
, nir_tex_src
, num_srcs
);
498 for (unsigned i
= 0; i
< num_srcs
; i
++)
499 src_init(&instr
->src
[i
].src
);
501 instr
->texture_index
= 0;
502 instr
->texture_array_size
= 0;
503 instr
->texture
= NULL
;
504 instr
->sampler_index
= 0;
505 instr
->sampler
= NULL
;
511 nir_phi_instr_create(nir_shader
*shader
)
513 nir_phi_instr
*instr
= ralloc(shader
, nir_phi_instr
);
514 instr_init(&instr
->instr
, nir_instr_type_phi
);
516 dest_init(&instr
->dest
);
517 exec_list_make_empty(&instr
->srcs
);
521 nir_parallel_copy_instr
*
522 nir_parallel_copy_instr_create(nir_shader
*shader
)
524 nir_parallel_copy_instr
*instr
= ralloc(shader
, nir_parallel_copy_instr
);
525 instr_init(&instr
->instr
, nir_instr_type_parallel_copy
);
527 exec_list_make_empty(&instr
->entries
);
532 nir_ssa_undef_instr
*
533 nir_ssa_undef_instr_create(nir_shader
*shader
, unsigned num_components
)
535 nir_ssa_undef_instr
*instr
= ralloc(shader
, nir_ssa_undef_instr
);
536 instr_init(&instr
->instr
, nir_instr_type_ssa_undef
);
538 nir_ssa_def_init(&instr
->instr
, &instr
->def
, num_components
, NULL
);
544 nir_deref_var_create(void *mem_ctx
, nir_variable
*var
)
546 nir_deref_var
*deref
= ralloc(mem_ctx
, nir_deref_var
);
547 deref
->deref
.deref_type
= nir_deref_type_var
;
548 deref
->deref
.child
= NULL
;
549 deref
->deref
.type
= var
->type
;
555 nir_deref_array_create(void *mem_ctx
)
557 nir_deref_array
*deref
= ralloc(mem_ctx
, nir_deref_array
);
558 deref
->deref
.deref_type
= nir_deref_type_array
;
559 deref
->deref
.child
= NULL
;
560 deref
->deref_array_type
= nir_deref_array_type_direct
;
561 src_init(&deref
->indirect
);
562 deref
->base_offset
= 0;
567 nir_deref_struct_create(void *mem_ctx
, unsigned field_index
)
569 nir_deref_struct
*deref
= ralloc(mem_ctx
, nir_deref_struct
);
570 deref
->deref
.deref_type
= nir_deref_type_struct
;
571 deref
->deref
.child
= NULL
;
572 deref
->index
= field_index
;
576 static nir_deref_var
*
577 copy_deref_var(void *mem_ctx
, nir_deref_var
*deref
)
579 nir_deref_var
*ret
= nir_deref_var_create(mem_ctx
, deref
->var
);
580 ret
->deref
.type
= deref
->deref
.type
;
581 if (deref
->deref
.child
)
582 ret
->deref
.child
= nir_copy_deref(ret
, deref
->deref
.child
);
586 static nir_deref_array
*
587 copy_deref_array(void *mem_ctx
, nir_deref_array
*deref
)
589 nir_deref_array
*ret
= nir_deref_array_create(mem_ctx
);
590 ret
->base_offset
= deref
->base_offset
;
591 ret
->deref_array_type
= deref
->deref_array_type
;
592 if (deref
->deref_array_type
== nir_deref_array_type_indirect
) {
593 nir_src_copy(&ret
->indirect
, &deref
->indirect
, mem_ctx
);
595 ret
->deref
.type
= deref
->deref
.type
;
596 if (deref
->deref
.child
)
597 ret
->deref
.child
= nir_copy_deref(ret
, deref
->deref
.child
);
601 static nir_deref_struct
*
602 copy_deref_struct(void *mem_ctx
, nir_deref_struct
*deref
)
604 nir_deref_struct
*ret
= nir_deref_struct_create(mem_ctx
, deref
->index
);
605 ret
->deref
.type
= deref
->deref
.type
;
606 if (deref
->deref
.child
)
607 ret
->deref
.child
= nir_copy_deref(ret
, deref
->deref
.child
);
612 nir_copy_deref(void *mem_ctx
, nir_deref
*deref
)
614 switch (deref
->deref_type
) {
615 case nir_deref_type_var
:
616 return ©_deref_var(mem_ctx
, nir_deref_as_var(deref
))->deref
;
617 case nir_deref_type_array
:
618 return ©_deref_array(mem_ctx
, nir_deref_as_array(deref
))->deref
;
619 case nir_deref_type_struct
:
620 return ©_deref_struct(mem_ctx
, nir_deref_as_struct(deref
))->deref
;
622 unreachable("Invalid dereference type");
628 /* Returns a load_const instruction that represents the constant
629 * initializer for the given deref chain. The caller is responsible for
630 * ensuring that there actually is a constant initializer.
632 nir_load_const_instr
*
633 nir_deref_get_const_initializer_load(nir_shader
*shader
, nir_deref_var
*deref
)
635 nir_constant
*constant
= deref
->var
->constant_initializer
;
638 const nir_deref
*tail
= &deref
->deref
;
639 unsigned matrix_offset
= 0;
640 while (tail
->child
) {
641 switch (tail
->child
->deref_type
) {
642 case nir_deref_type_array
: {
643 nir_deref_array
*arr
= nir_deref_as_array(tail
->child
);
644 assert(arr
->deref_array_type
== nir_deref_array_type_direct
);
645 if (glsl_type_is_matrix(tail
->type
)) {
646 assert(arr
->deref
.child
== NULL
);
647 matrix_offset
= arr
->base_offset
;
649 constant
= constant
->elements
[arr
->base_offset
];
654 case nir_deref_type_struct
: {
655 constant
= constant
->elements
[nir_deref_as_struct(tail
->child
)->index
];
660 unreachable("Invalid deref child type");
666 nir_load_const_instr
*load
=
667 nir_load_const_instr_create(shader
, glsl_get_vector_elements(tail
->type
));
669 matrix_offset
*= load
->def
.num_components
;
670 for (unsigned i
= 0; i
< load
->def
.num_components
; i
++) {
671 switch (glsl_get_base_type(tail
->type
)) {
672 case GLSL_TYPE_FLOAT
:
675 load
->value
.u
[i
] = constant
->value
.u
[matrix_offset
+ i
];
678 load
->value
.u
[i
] = constant
->value
.b
[matrix_offset
+ i
] ?
679 NIR_TRUE
: NIR_FALSE
;
682 unreachable("Invalid immediate type");
690 nir_cf_node_get_function(nir_cf_node
*node
)
692 while (node
->type
!= nir_cf_node_function
) {
696 return nir_cf_node_as_function(node
);
700 add_use_cb(nir_src
*src
, void *state
)
702 nir_instr
*instr
= state
;
704 src
->parent_instr
= instr
;
705 list_addtail(&src
->use_link
,
706 src
->is_ssa
? &src
->ssa
->uses
: &src
->reg
.reg
->uses
);
712 add_ssa_def_cb(nir_ssa_def
*def
, void *state
)
714 nir_instr
*instr
= state
;
716 if (instr
->block
&& def
->index
== UINT_MAX
) {
717 nir_function_impl
*impl
=
718 nir_cf_node_get_function(&instr
->block
->cf_node
);
720 def
->index
= impl
->ssa_alloc
++;
727 add_reg_def_cb(nir_dest
*dest
, void *state
)
729 nir_instr
*instr
= state
;
732 dest
->reg
.parent_instr
= instr
;
733 list_addtail(&dest
->reg
.def_link
, &dest
->reg
.reg
->defs
);
740 add_defs_uses(nir_instr
*instr
)
742 nir_foreach_src(instr
, add_use_cb
, instr
);
743 nir_foreach_dest(instr
, add_reg_def_cb
, instr
);
744 nir_foreach_ssa_def(instr
, add_ssa_def_cb
, instr
);
748 nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
)
750 switch (cursor
.option
) {
751 case nir_cursor_before_block
:
752 /* Only allow inserting jumps into empty blocks. */
753 if (instr
->type
== nir_instr_type_jump
)
754 assert(exec_list_is_empty(&cursor
.block
->instr_list
));
756 instr
->block
= cursor
.block
;
757 add_defs_uses(instr
);
758 exec_list_push_head(&cursor
.block
->instr_list
, &instr
->node
);
760 case nir_cursor_after_block
: {
761 /* Inserting instructions after a jump is illegal. */
762 nir_instr
*last
= nir_block_last_instr(cursor
.block
);
763 assert(last
== NULL
|| last
->type
!= nir_instr_type_jump
);
766 instr
->block
= cursor
.block
;
767 add_defs_uses(instr
);
768 exec_list_push_tail(&cursor
.block
->instr_list
, &instr
->node
);
771 case nir_cursor_before_instr
:
772 assert(instr
->type
!= nir_instr_type_jump
);
773 instr
->block
= cursor
.instr
->block
;
774 add_defs_uses(instr
);
775 exec_node_insert_node_before(&cursor
.instr
->node
, &instr
->node
);
777 case nir_cursor_after_instr
:
778 /* Inserting instructions after a jump is illegal. */
779 assert(cursor
.instr
->type
!= nir_instr_type_jump
);
781 /* Only allow inserting jumps at the end of the block. */
782 if (instr
->type
== nir_instr_type_jump
)
783 assert(cursor
.instr
== nir_block_last_instr(cursor
.instr
->block
));
785 instr
->block
= cursor
.instr
->block
;
786 add_defs_uses(instr
);
787 exec_node_insert_after(&cursor
.instr
->node
, &instr
->node
);
791 if (instr
->type
== nir_instr_type_jump
)
792 nir_handle_add_jump(instr
->block
);
796 src_is_valid(const nir_src
*src
)
798 return src
->is_ssa
? (src
->ssa
!= NULL
) : (src
->reg
.reg
!= NULL
);
802 remove_use_cb(nir_src
*src
, void *state
)
804 if (src_is_valid(src
))
805 list_del(&src
->use_link
);
811 remove_def_cb(nir_dest
*dest
, void *state
)
814 list_del(&dest
->reg
.def_link
);
820 remove_defs_uses(nir_instr
*instr
)
822 nir_foreach_dest(instr
, remove_def_cb
, instr
);
823 nir_foreach_src(instr
, remove_use_cb
, instr
);
826 void nir_instr_remove(nir_instr
*instr
)
828 remove_defs_uses(instr
);
829 exec_node_remove(&instr
->node
);
831 if (instr
->type
== nir_instr_type_jump
) {
832 nir_jump_instr
*jump_instr
= nir_instr_as_jump(instr
);
833 nir_handle_remove_jump(instr
->block
, jump_instr
->type
);
840 nir_index_local_regs(nir_function_impl
*impl
)
843 foreach_list_typed(nir_register
, reg
, node
, &impl
->registers
) {
844 reg
->index
= index
++;
846 impl
->reg_alloc
= index
;
850 nir_index_global_regs(nir_shader
*shader
)
853 foreach_list_typed(nir_register
, reg
, node
, &shader
->registers
) {
854 reg
->index
= index
++;
856 shader
->reg_alloc
= index
;
860 visit_alu_dest(nir_alu_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
862 return cb(&instr
->dest
.dest
, state
);
866 visit_intrinsic_dest(nir_intrinsic_instr
*instr
, nir_foreach_dest_cb cb
,
869 if (nir_intrinsic_infos
[instr
->intrinsic
].has_dest
)
870 return cb(&instr
->dest
, state
);
876 visit_texture_dest(nir_tex_instr
*instr
, nir_foreach_dest_cb cb
,
879 return cb(&instr
->dest
, state
);
883 visit_phi_dest(nir_phi_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
885 return cb(&instr
->dest
, state
);
889 visit_parallel_copy_dest(nir_parallel_copy_instr
*instr
,
890 nir_foreach_dest_cb cb
, void *state
)
892 nir_foreach_parallel_copy_entry(instr
, entry
) {
893 if (!cb(&entry
->dest
, state
))
901 nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
)
903 switch (instr
->type
) {
904 case nir_instr_type_alu
:
905 return visit_alu_dest(nir_instr_as_alu(instr
), cb
, state
);
906 case nir_instr_type_intrinsic
:
907 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr
), cb
, state
);
908 case nir_instr_type_tex
:
909 return visit_texture_dest(nir_instr_as_tex(instr
), cb
, state
);
910 case nir_instr_type_phi
:
911 return visit_phi_dest(nir_instr_as_phi(instr
), cb
, state
);
912 case nir_instr_type_parallel_copy
:
913 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr
),
916 case nir_instr_type_load_const
:
917 case nir_instr_type_ssa_undef
:
918 case nir_instr_type_call
:
919 case nir_instr_type_jump
:
923 unreachable("Invalid instruction type");
930 struct foreach_ssa_def_state
{
931 nir_foreach_ssa_def_cb cb
;
936 nir_ssa_def_visitor(nir_dest
*dest
, void *void_state
)
938 struct foreach_ssa_def_state
*state
= void_state
;
941 return state
->cb(&dest
->ssa
, state
->client_state
);
947 nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
, void *state
)
949 switch (instr
->type
) {
950 case nir_instr_type_alu
:
951 case nir_instr_type_tex
:
952 case nir_instr_type_intrinsic
:
953 case nir_instr_type_phi
:
954 case nir_instr_type_parallel_copy
: {
955 struct foreach_ssa_def_state foreach_state
= {cb
, state
};
956 return nir_foreach_dest(instr
, nir_ssa_def_visitor
, &foreach_state
);
959 case nir_instr_type_load_const
:
960 return cb(&nir_instr_as_load_const(instr
)->def
, state
);
961 case nir_instr_type_ssa_undef
:
962 return cb(&nir_instr_as_ssa_undef(instr
)->def
, state
);
963 case nir_instr_type_call
:
964 case nir_instr_type_jump
:
967 unreachable("Invalid instruction type");
972 visit_src(nir_src
*src
, nir_foreach_src_cb cb
, void *state
)
976 if (!src
->is_ssa
&& src
->reg
.indirect
)
977 return cb(src
->reg
.indirect
, state
);
982 visit_deref_array_src(nir_deref_array
*deref
, nir_foreach_src_cb cb
,
985 if (deref
->deref_array_type
== nir_deref_array_type_indirect
)
986 return visit_src(&deref
->indirect
, cb
, state
);
991 visit_deref_src(nir_deref_var
*deref
, nir_foreach_src_cb cb
, void *state
)
993 nir_deref
*cur
= &deref
->deref
;
994 while (cur
!= NULL
) {
995 if (cur
->deref_type
== nir_deref_type_array
) {
996 if (!visit_deref_array_src(nir_deref_as_array(cur
), cb
, state
))
1007 visit_alu_src(nir_alu_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1009 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1010 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1017 visit_tex_src(nir_tex_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1019 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
1020 if (!visit_src(&instr
->src
[i
].src
, cb
, state
))
1024 if (instr
->texture
!= NULL
) {
1025 if (!visit_deref_src(instr
->texture
, cb
, state
))
1029 if (instr
->sampler
!= NULL
) {
1030 if (!visit_deref_src(instr
->sampler
, cb
, state
))
1038 visit_intrinsic_src(nir_intrinsic_instr
*instr
, nir_foreach_src_cb cb
,
1041 unsigned num_srcs
= nir_intrinsic_infos
[instr
->intrinsic
].num_srcs
;
1042 for (unsigned i
= 0; i
< num_srcs
; i
++) {
1043 if (!visit_src(&instr
->src
[i
], cb
, state
))
1048 nir_intrinsic_infos
[instr
->intrinsic
].num_variables
;
1049 for (unsigned i
= 0; i
< num_vars
; i
++) {
1050 if (!visit_deref_src(instr
->variables
[i
], cb
, state
))
1058 visit_call_src(nir_call_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1064 visit_load_const_src(nir_load_const_instr
*instr
, nir_foreach_src_cb cb
,
1071 visit_phi_src(nir_phi_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1073 nir_foreach_phi_src(instr
, src
) {
1074 if (!visit_src(&src
->src
, cb
, state
))
1082 visit_parallel_copy_src(nir_parallel_copy_instr
*instr
,
1083 nir_foreach_src_cb cb
, void *state
)
1085 nir_foreach_parallel_copy_entry(instr
, entry
) {
1086 if (!visit_src(&entry
->src
, cb
, state
))
1095 nir_foreach_src_cb cb
;
1096 } visit_dest_indirect_state
;
1099 visit_dest_indirect(nir_dest
*dest
, void *_state
)
1101 visit_dest_indirect_state
*state
= (visit_dest_indirect_state
*) _state
;
1103 if (!dest
->is_ssa
&& dest
->reg
.indirect
)
1104 return state
->cb(dest
->reg
.indirect
, state
->state
);
1110 nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
)
1112 switch (instr
->type
) {
1113 case nir_instr_type_alu
:
1114 if (!visit_alu_src(nir_instr_as_alu(instr
), cb
, state
))
1117 case nir_instr_type_intrinsic
:
1118 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr
), cb
, state
))
1121 case nir_instr_type_tex
:
1122 if (!visit_tex_src(nir_instr_as_tex(instr
), cb
, state
))
1125 case nir_instr_type_call
:
1126 if (!visit_call_src(nir_instr_as_call(instr
), cb
, state
))
1129 case nir_instr_type_load_const
:
1130 if (!visit_load_const_src(nir_instr_as_load_const(instr
), cb
, state
))
1133 case nir_instr_type_phi
:
1134 if (!visit_phi_src(nir_instr_as_phi(instr
), cb
, state
))
1137 case nir_instr_type_parallel_copy
:
1138 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr
),
1142 case nir_instr_type_jump
:
1143 case nir_instr_type_ssa_undef
:
1147 unreachable("Invalid instruction type");
1151 visit_dest_indirect_state dest_state
;
1152 dest_state
.state
= state
;
1154 return nir_foreach_dest(instr
, visit_dest_indirect
, &dest_state
);
1158 nir_src_as_const_value(nir_src src
)
1163 if (src
.ssa
->parent_instr
->type
!= nir_instr_type_load_const
)
1166 nir_load_const_instr
*load
= nir_instr_as_load_const(src
.ssa
->parent_instr
);
1168 return &load
->value
;
1172 * Returns true if the source is known to be dynamically uniform. Otherwise it
1173 * returns false which means it may or may not be dynamically uniform but it
1174 * can't be determined.
1177 nir_src_is_dynamically_uniform(nir_src src
)
1182 /* Constants are trivially dynamically uniform */
1183 if (src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
)
1186 /* As are uniform variables */
1187 if (src
.ssa
->parent_instr
->type
== nir_instr_type_intrinsic
) {
1188 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(src
.ssa
->parent_instr
);
1190 if (intr
->intrinsic
== nir_intrinsic_load_uniform
)
1194 /* XXX: this could have many more tests, such as when a sampler function is
1195 * called with dynamically uniform arguments.
1201 src_remove_all_uses(nir_src
*src
)
1203 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1204 if (!src_is_valid(src
))
1207 list_del(&src
->use_link
);
1212 src_add_all_uses(nir_src
*src
, nir_instr
*parent_instr
, nir_if
*parent_if
)
1214 for (; src
; src
= src
->is_ssa
? NULL
: src
->reg
.indirect
) {
1215 if (!src_is_valid(src
))
1219 src
->parent_instr
= parent_instr
;
1221 list_addtail(&src
->use_link
, &src
->ssa
->uses
);
1223 list_addtail(&src
->use_link
, &src
->reg
.reg
->uses
);
1226 src
->parent_if
= parent_if
;
1228 list_addtail(&src
->use_link
, &src
->ssa
->if_uses
);
1230 list_addtail(&src
->use_link
, &src
->reg
.reg
->if_uses
);
1236 nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
)
1238 assert(!src_is_valid(src
) || src
->parent_instr
== instr
);
1240 src_remove_all_uses(src
);
1242 src_add_all_uses(src
, instr
, NULL
);
1246 nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
)
1248 assert(!src_is_valid(dest
) || dest
->parent_instr
== dest_instr
);
1250 src_remove_all_uses(dest
);
1251 src_remove_all_uses(src
);
1253 *src
= NIR_SRC_INIT
;
1254 src_add_all_uses(dest
, dest_instr
, NULL
);
1258 nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
)
1260 nir_src
*src
= &if_stmt
->condition
;
1261 assert(!src_is_valid(src
) || src
->parent_if
== if_stmt
);
1263 src_remove_all_uses(src
);
1265 src_add_all_uses(src
, NULL
, if_stmt
);
1269 nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
, nir_dest new_dest
)
1272 /* We can only overwrite an SSA destination if it has no uses. */
1273 assert(list_empty(&dest
->ssa
.uses
) && list_empty(&dest
->ssa
.if_uses
));
1275 list_del(&dest
->reg
.def_link
);
1276 if (dest
->reg
.indirect
)
1277 src_remove_all_uses(dest
->reg
.indirect
);
1280 /* We can't re-write with an SSA def */
1281 assert(!new_dest
.is_ssa
);
1283 nir_dest_copy(dest
, &new_dest
, instr
);
1285 dest
->reg
.parent_instr
= instr
;
1286 list_addtail(&dest
->reg
.def_link
, &new_dest
.reg
.reg
->defs
);
1288 if (dest
->reg
.indirect
)
1289 src_add_all_uses(dest
->reg
.indirect
, instr
, NULL
);
1293 nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
1294 unsigned num_components
, const char *name
)
1297 def
->parent_instr
= instr
;
1298 list_inithead(&def
->uses
);
1299 list_inithead(&def
->if_uses
);
1300 def
->num_components
= num_components
;
1303 nir_function_impl
*impl
=
1304 nir_cf_node_get_function(&instr
->block
->cf_node
);
1306 def
->index
= impl
->ssa_alloc
++;
1308 def
->index
= UINT_MAX
;
1313 nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
1314 unsigned num_components
, const char *name
)
1316 dest
->is_ssa
= true;
1317 nir_ssa_def_init(instr
, &dest
->ssa
, num_components
, name
);
1321 nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
)
1323 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1325 nir_foreach_use_safe(def
, use_src
)
1326 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1328 nir_foreach_if_use_safe(def
, use_src
)
1329 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1333 is_instr_between(nir_instr
*start
, nir_instr
*end
, nir_instr
*between
)
1335 assert(start
->block
== end
->block
);
1337 if (between
->block
!= start
->block
)
1340 /* Search backwards looking for "between" */
1341 while (start
!= end
) {
1345 end
= nir_instr_prev(end
);
1352 /* Replaces all uses of the given SSA def with the given source but only if
1353 * the use comes after the after_me instruction. This can be useful if you
1354 * are emitting code to fix up the result of some instruction: you can freely
1355 * use the result in that code and then call rewrite_uses_after and pass the
1356 * last fixup instruction as after_me and it will replace all of the uses you
1357 * want without touching the fixup code.
1359 * This function assumes that after_me is in the same block as
1360 * def->parent_instr and that after_me comes after def->parent_instr.
1363 nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
1364 nir_instr
*after_me
)
1366 assert(!new_src
.is_ssa
|| def
!= new_src
.ssa
);
1368 nir_foreach_use_safe(def
, use_src
) {
1369 assert(use_src
->parent_instr
!= def
->parent_instr
);
1370 /* Since def already dominates all of its uses, the only way a use can
1371 * not be dominated by after_me is if it is between def and after_me in
1372 * the instruction list.
1374 if (!is_instr_between(def
->parent_instr
, after_me
, use_src
->parent_instr
))
1375 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, new_src
);
1378 nir_foreach_if_use_safe(def
, use_src
)
1379 nir_if_rewrite_condition(use_src
->parent_if
, new_src
);
1382 static bool foreach_cf_node(nir_cf_node
*node
, nir_foreach_block_cb cb
,
1383 bool reverse
, void *state
);
1386 foreach_if(nir_if
*if_stmt
, nir_foreach_block_cb cb
, bool reverse
, void *state
)
1389 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
,
1390 &if_stmt
->else_list
) {
1391 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1395 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
,
1396 &if_stmt
->then_list
) {
1397 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1401 foreach_list_typed_safe(nir_cf_node
, node
, node
, &if_stmt
->then_list
) {
1402 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1406 foreach_list_typed_safe(nir_cf_node
, node
, node
, &if_stmt
->else_list
) {
1407 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1416 foreach_loop(nir_loop
*loop
, nir_foreach_block_cb cb
, bool reverse
, void *state
)
1419 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
, &loop
->body
) {
1420 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1424 foreach_list_typed_safe(nir_cf_node
, node
, node
, &loop
->body
) {
1425 if (!foreach_cf_node(node
, cb
, reverse
, state
))
1434 foreach_cf_node(nir_cf_node
*node
, nir_foreach_block_cb cb
,
1435 bool reverse
, void *state
)
1437 switch (node
->type
) {
1438 case nir_cf_node_block
:
1439 return cb(nir_cf_node_as_block(node
), state
);
1440 case nir_cf_node_if
:
1441 return foreach_if(nir_cf_node_as_if(node
), cb
, reverse
, state
);
1442 case nir_cf_node_loop
:
1443 return foreach_loop(nir_cf_node_as_loop(node
), cb
, reverse
, state
);
1447 unreachable("Invalid CFG node type");
1455 nir_foreach_block_in_cf_node(nir_cf_node
*node
, nir_foreach_block_cb cb
,
1458 return foreach_cf_node(node
, cb
, false, state
);
1462 nir_foreach_block(nir_function_impl
*impl
, nir_foreach_block_cb cb
, void *state
)
1464 foreach_list_typed_safe(nir_cf_node
, node
, node
, &impl
->body
) {
1465 if (!foreach_cf_node(node
, cb
, false, state
))
1469 return cb(impl
->end_block
, state
);
1473 nir_foreach_block_reverse(nir_function_impl
*impl
, nir_foreach_block_cb cb
,
1476 if (!cb(impl
->end_block
, state
))
1479 foreach_list_typed_reverse_safe(nir_cf_node
, node
, node
, &impl
->body
) {
1480 if (!foreach_cf_node(node
, cb
, true, state
))
1488 nir_block_get_following_if(nir_block
*block
)
1490 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1493 if (nir_cf_node_is_last(&block
->cf_node
))
1496 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1498 if (next_node
->type
!= nir_cf_node_if
)
1501 return nir_cf_node_as_if(next_node
);
1505 nir_block_get_following_loop(nir_block
*block
)
1507 if (exec_node_is_tail_sentinel(&block
->cf_node
.node
))
1510 if (nir_cf_node_is_last(&block
->cf_node
))
1513 nir_cf_node
*next_node
= nir_cf_node_next(&block
->cf_node
);
1515 if (next_node
->type
!= nir_cf_node_loop
)
1518 return nir_cf_node_as_loop(next_node
);
1521 index_block(nir_block
*block
, void *state
)
1523 unsigned *index
= state
;
1524 block
->index
= (*index
)++;
1529 nir_index_blocks(nir_function_impl
*impl
)
1533 if (impl
->valid_metadata
& nir_metadata_block_index
)
1536 nir_foreach_block(impl
, index_block
, &index
);
1538 impl
->num_blocks
= index
;
1542 index_ssa_def_cb(nir_ssa_def
*def
, void *state
)
1544 unsigned *index
= (unsigned *) state
;
1545 def
->index
= (*index
)++;
1551 index_ssa_block(nir_block
*block
, void *state
)
1553 nir_foreach_instr(block
, instr
)
1554 nir_foreach_ssa_def(instr
, index_ssa_def_cb
, state
);
1560 * The indices are applied top-to-bottom which has the very nice property
1561 * that, if A dominates B, then A->index <= B->index.
1564 nir_index_ssa_defs(nir_function_impl
*impl
)
1567 nir_foreach_block(impl
, index_ssa_block
, &index
);
1568 impl
->ssa_alloc
= index
;
1572 index_instrs_block(nir_block
*block
, void *state
)
1574 unsigned *index
= state
;
1575 nir_foreach_instr(block
, instr
)
1576 instr
->index
= (*index
)++;
1582 * The indices are applied top-to-bottom which has the very nice property
1583 * that, if A dominates B, then A->index <= B->index.
1586 nir_index_instrs(nir_function_impl
*impl
)
1589 nir_foreach_block(impl
, index_instrs_block
, &index
);
1594 nir_intrinsic_from_system_value(gl_system_value val
)
1597 case SYSTEM_VALUE_VERTEX_ID
:
1598 return nir_intrinsic_load_vertex_id
;
1599 case SYSTEM_VALUE_INSTANCE_ID
:
1600 return nir_intrinsic_load_instance_id
;
1601 case SYSTEM_VALUE_DRAW_ID
:
1602 return nir_intrinsic_load_draw_id
;
1603 case SYSTEM_VALUE_BASE_INSTANCE
:
1604 return nir_intrinsic_load_base_instance
;
1605 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
:
1606 return nir_intrinsic_load_vertex_id_zero_base
;
1607 case SYSTEM_VALUE_BASE_VERTEX
:
1608 return nir_intrinsic_load_base_vertex
;
1609 case SYSTEM_VALUE_INVOCATION_ID
:
1610 return nir_intrinsic_load_invocation_id
;
1611 case SYSTEM_VALUE_FRONT_FACE
:
1612 return nir_intrinsic_load_front_face
;
1613 case SYSTEM_VALUE_SAMPLE_ID
:
1614 return nir_intrinsic_load_sample_id
;
1615 case SYSTEM_VALUE_SAMPLE_POS
:
1616 return nir_intrinsic_load_sample_pos
;
1617 case SYSTEM_VALUE_SAMPLE_MASK_IN
:
1618 return nir_intrinsic_load_sample_mask_in
;
1619 case SYSTEM_VALUE_LOCAL_INVOCATION_ID
:
1620 return nir_intrinsic_load_local_invocation_id
;
1621 case SYSTEM_VALUE_WORK_GROUP_ID
:
1622 return nir_intrinsic_load_work_group_id
;
1623 case SYSTEM_VALUE_NUM_WORK_GROUPS
:
1624 return nir_intrinsic_load_num_work_groups
;
1625 case SYSTEM_VALUE_PRIMITIVE_ID
:
1626 return nir_intrinsic_load_primitive_id
;
1627 case SYSTEM_VALUE_TESS_COORD
:
1628 return nir_intrinsic_load_tess_coord
;
1629 case SYSTEM_VALUE_TESS_LEVEL_OUTER
:
1630 return nir_intrinsic_load_tess_level_outer
;
1631 case SYSTEM_VALUE_TESS_LEVEL_INNER
:
1632 return nir_intrinsic_load_tess_level_inner
;
1633 case SYSTEM_VALUE_VERTICES_IN
:
1634 return nir_intrinsic_load_patch_vertices_in
;
1635 case SYSTEM_VALUE_HELPER_INVOCATION
:
1636 return nir_intrinsic_load_helper_invocation
;
1638 unreachable("system value does not directly correspond to intrinsic");
1643 nir_system_value_from_intrinsic(nir_intrinsic_op intrin
)
1646 case nir_intrinsic_load_vertex_id
:
1647 return SYSTEM_VALUE_VERTEX_ID
;
1648 case nir_intrinsic_load_instance_id
:
1649 return SYSTEM_VALUE_INSTANCE_ID
;
1650 case nir_intrinsic_load_draw_id
:
1651 return SYSTEM_VALUE_DRAW_ID
;
1652 case nir_intrinsic_load_base_instance
:
1653 return SYSTEM_VALUE_BASE_INSTANCE
;
1654 case nir_intrinsic_load_vertex_id_zero_base
:
1655 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE
;
1656 case nir_intrinsic_load_base_vertex
:
1657 return SYSTEM_VALUE_BASE_VERTEX
;
1658 case nir_intrinsic_load_invocation_id
:
1659 return SYSTEM_VALUE_INVOCATION_ID
;
1660 case nir_intrinsic_load_front_face
:
1661 return SYSTEM_VALUE_FRONT_FACE
;
1662 case nir_intrinsic_load_sample_id
:
1663 return SYSTEM_VALUE_SAMPLE_ID
;
1664 case nir_intrinsic_load_sample_pos
:
1665 return SYSTEM_VALUE_SAMPLE_POS
;
1666 case nir_intrinsic_load_sample_mask_in
:
1667 return SYSTEM_VALUE_SAMPLE_MASK_IN
;
1668 case nir_intrinsic_load_local_invocation_id
:
1669 return SYSTEM_VALUE_LOCAL_INVOCATION_ID
;
1670 case nir_intrinsic_load_num_work_groups
:
1671 return SYSTEM_VALUE_NUM_WORK_GROUPS
;
1672 case nir_intrinsic_load_work_group_id
:
1673 return SYSTEM_VALUE_WORK_GROUP_ID
;
1674 case nir_intrinsic_load_primitive_id
:
1675 return SYSTEM_VALUE_PRIMITIVE_ID
;
1676 case nir_intrinsic_load_tess_coord
:
1677 return SYSTEM_VALUE_TESS_COORD
;
1678 case nir_intrinsic_load_tess_level_outer
:
1679 return SYSTEM_VALUE_TESS_LEVEL_OUTER
;
1680 case nir_intrinsic_load_tess_level_inner
:
1681 return SYSTEM_VALUE_TESS_LEVEL_INNER
;
1682 case nir_intrinsic_load_patch_vertices_in
:
1683 return SYSTEM_VALUE_VERTICES_IN
;
1684 case nir_intrinsic_load_helper_invocation
:
1685 return SYSTEM_VALUE_HELPER_INVOCATION
;
1687 unreachable("intrinsic doesn't produce a system value");