src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42
  43    shader->options = options;
  44    memset(&shader->info, 0, sizeof(shader->info));
  45
  46    exec_list_make_empty(&shader->functions);
  47    exec_list_make_empty(&shader->registers);
  48    exec_list_make_empty(&shader->globals);
  49    exec_list_make_empty(&shader->system_values);
  50    shader->reg_alloc = 0;
  51
  52    shader->num_inputs = 0;
  53    shader->num_outputs = 0;
  54    shader->num_uniforms = 0;
  55
  56    shader->stage = stage;
  57
  58    return shader;
  59 }
  60
  61 static nir_register *
  62 reg_create(void *mem_ctx, struct exec_list *list)
  63 {
  64    nir_register *reg = ralloc(mem_ctx, nir_register);
  65
  66    list_inithead(&reg->uses);
  67    list_inithead(&reg->defs);
  68    list_inithead(&reg->if_uses);
  69
  70    reg->num_components = 0;
  71    reg->num_array_elems = 0;
  72    reg->is_packed = false;
  73    reg->name = NULL;
  74
  75    exec_list_push_tail(list, &reg->node);
  76
  77    return reg;
  78 }
  79
  80 nir_register *
  81 nir_global_reg_create(nir_shader *shader)
  82 {
  83    nir_register *reg = reg_create(shader, &shader->registers);
  84    reg->index = shader->reg_alloc++;
  85    reg->is_global = true;
  86
  87    return reg;
  88 }
  89
  90 nir_register *
  91 nir_local_reg_create(nir_function_impl *impl)
  92 {
  93    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  94    reg->index = impl->reg_alloc++;
  95    reg->is_global = false;
  96
  97    return reg;
  98 }
  99
 100 void
 101 nir_reg_remove(nir_register *reg)
 102 {
 103    exec_node_remove(&reg->node);
 104 }
 105
 106 void
 107 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 108 {
 109    switch (var->data.mode) {
 110    case nir_var_all:
 111       assert(!"invalid mode");
 112       break;
 113
 114    case nir_var_local:
 115       assert(!"nir_shader_add_variable cannot be used for local variables");
 116       break;
 117
 118    case nir_var_global:
 119       exec_list_push_tail(&shader->globals, &var->node);
 120       break;
 121
 122    case nir_var_shader_in:
 123       exec_list_push_tail(&shader->inputs, &var->node);
 124       break;
 125
 126    case nir_var_shader_out:
 127       exec_list_push_tail(&shader->outputs, &var->node);
 128       break;
 129
 130    case nir_var_uniform:
 131    case nir_var_shader_storage:
 132       exec_list_push_tail(&shader->uniforms, &var->node);
 133       break;
 134
 135    case nir_var_system_value:
 136       exec_list_push_tail(&shader->system_values, &var->node);
 137       break;
 138    }
 139 }
 140
 141 nir_variable *
 142 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 143                     const struct glsl_type *type, const char *name)
 144 {
 145    nir_variable *var = rzalloc(shader, nir_variable);
 146    var->name = ralloc_strdup(var, name);
 147    var->type = type;
 148    var->data.mode = mode;
 149
 150    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 151        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 152       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 153
 154    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 155       var->data.read_only = true;
 156
 157    nir_shader_add_variable(shader, var);
 158
 159    return var;
 160 }
 161
 162 nir_variable *
 163 nir_local_variable_create(nir_function_impl *impl,
 164                           const struct glsl_type *type, const char *name)
 165 {
 166    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 167    var->name = ralloc_strdup(var, name);
 168    var->type = type;
 169    var->data.mode = nir_var_local;
 170
 171    nir_function_impl_add_variable(impl, var);
 172
 173    return var;
 174 }
 175
 176 nir_function *
 177 nir_function_create(nir_shader *shader, const char *name)
 178 {
 179    nir_function *func = ralloc(shader, nir_function);
 180
 181    exec_list_push_tail(&shader->functions, &func->node);
 182
 183    func->name = ralloc_strdup(func, name);
 184    func->shader = shader;
 185    func->num_params = 0;
 186    func->params = NULL;
 187    func->return_type = glsl_void_type();
 188    func->impl = NULL;
 189
 190    return func;
 191 }
 192
 193 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 194 {
 195    dest->is_ssa = src->is_ssa;
 196    if (src->is_ssa) {
 197       dest->ssa = src->ssa;
 198    } else {
 199       dest->reg.base_offset = src->reg.base_offset;
 200       dest->reg.reg = src->reg.reg;
 201       if (src->reg.indirect) {
 202          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 203          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 204       } else {
 205          dest->reg.indirect = NULL;
 206       }
 207    }
 208 }
 209
 210 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 211 {
 212    /* Copying an SSA definition makes no sense whatsoever. */
 213    assert(!src->is_ssa);
 214
 215    dest->is_ssa = false;
 216
 217    dest->reg.base_offset = src->reg.base_offset;
 218    dest->reg.reg = src->reg.reg;
 219    if (src->reg.indirect) {
 220       dest->reg.indirect = ralloc(instr, nir_src);
 221       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 222    } else {
 223       dest->reg.indirect = NULL;
 224    }
 225 }
 226
 227 void
 228 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 229                  nir_alu_instr *instr)
 230 {
 231    nir_src_copy(&dest->src, &src->src, &instr->instr);
 232    dest->abs = src->abs;
 233    dest->negate = src->negate;
 234    for (unsigned i = 0; i < 4; i++)
 235       dest->swizzle[i] = src->swizzle[i];
 236 }
 237
 238 void
 239 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 240                   nir_alu_instr *instr)
 241 {
 242    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 243    dest->write_mask = src->write_mask;
 244    dest->saturate = src->saturate;
 245 }
 246
 247
 248 static void
 249 cf_init(nir_cf_node *node, nir_cf_node_type type)
 250 {
 251    exec_node_init(&node->node);
 252    node->parent = NULL;
 253    node->type = type;
 254 }
 255
 256 nir_function_impl *
 257 nir_function_impl_create(nir_function *function)
 258 {
 259    assert(function->impl == NULL);
 260
 261    void *mem_ctx = ralloc_parent(function);
 262
 263    nir_function_impl *impl = ralloc(mem_ctx, nir_function_impl);
 264
 265    function->impl = impl;
 266    impl->function = function;
 267
 268    cf_init(&impl->cf_node, nir_cf_node_function);
 269
 270    exec_list_make_empty(&impl->body);
 271    exec_list_make_empty(&impl->registers);
 272    exec_list_make_empty(&impl->locals);
 273    impl->num_params = 0;
 274    impl->params = NULL;
 275    impl->return_var = NULL;
 276    impl->reg_alloc = 0;
 277    impl->ssa_alloc = 0;
 278    impl->valid_metadata = nir_metadata_none;
 279
 280    /* create start & end blocks */
 281    nir_block *start_block = nir_block_create(mem_ctx);
 282    nir_block *end_block = nir_block_create(mem_ctx);
 283    start_block->cf_node.parent = &impl->cf_node;
 284    end_block->cf_node.parent = &impl->cf_node;
 285    impl->end_block = end_block;
 286
 287    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 288
 289    start_block->successors[0] = end_block;
 290    _mesa_set_add(end_block->predecessors, start_block);
 291    return impl;
 292 }
 293
 294 nir_block *
 295 nir_block_create(nir_shader *shader)
 296 {
 297    nir_block *block = ralloc(shader, nir_block);
 298
 299    cf_init(&block->cf_node, nir_cf_node_block);
 300
 301    block->successors[0] = block->successors[1] = NULL;
 302    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 303                                           _mesa_key_pointer_equal);
 304    block->imm_dom = NULL;
 305    /* XXX maybe it would be worth it to defer allocation?  This
 306     * way it doesn't get allocated for shader ref's that never run
 307     * nir_calc_dominance?  For example, state-tracker creates an
 308     * initial IR, clones that, runs appropriate lowering pass, passes
 309     * to driver which does common lowering/opt, and then stores ref
 310     * which is later used to do state specific lowering and futher
 311     * opt.  Do any of the references not need dominance metadata?
 312     */
 313    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 314                                           _mesa_key_pointer_equal);
 315
 316    exec_list_make_empty(&block->instr_list);
 317
 318    return block;
 319 }
 320
 321 static inline void
 322 src_init(nir_src *src)
 323 {
 324    src->is_ssa = false;
 325    src->reg.reg = NULL;
 326    src->reg.indirect = NULL;
 327    src->reg.base_offset = 0;
 328 }
 329
 330 nir_if *
 331 nir_if_create(nir_shader *shader)
 332 {
 333    nir_if *if_stmt = ralloc(shader, nir_if);
 334
 335    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 336    src_init(&if_stmt->condition);
 337
 338    nir_block *then = nir_block_create(shader);
 339    exec_list_make_empty(&if_stmt->then_list);
 340    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 341    then->cf_node.parent = &if_stmt->cf_node;
 342
 343    nir_block *else_stmt = nir_block_create(shader);
 344    exec_list_make_empty(&if_stmt->else_list);
 345    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 346    else_stmt->cf_node.parent = &if_stmt->cf_node;
 347
 348    return if_stmt;
 349 }
 350
 351 nir_loop *
 352 nir_loop_create(nir_shader *shader)
 353 {
 354    nir_loop *loop = ralloc(shader, nir_loop);
 355
 356    cf_init(&loop->cf_node, nir_cf_node_loop);
 357
 358    nir_block *body = nir_block_create(shader);
 359    exec_list_make_empty(&loop->body);
 360    exec_list_push_tail(&loop->body, &body->cf_node.node);
 361    body->cf_node.parent = &loop->cf_node;
 362
 363    body->successors[0] = body;
 364    _mesa_set_add(body->predecessors, body);
 365
 366    return loop;
 367 }
 368
 369 static void
 370 instr_init(nir_instr *instr, nir_instr_type type)
 371 {
 372    instr->type = type;
 373    instr->block = NULL;
 374    exec_node_init(&instr->node);
 375 }
 376
 377 static void
 378 dest_init(nir_dest *dest)
 379 {
 380    dest->is_ssa = false;
 381    dest->reg.reg = NULL;
 382    dest->reg.indirect = NULL;
 383    dest->reg.base_offset = 0;
 384 }
 385
 386 static void
 387 alu_dest_init(nir_alu_dest *dest)
 388 {
 389    dest_init(&dest->dest);
 390    dest->saturate = false;
 391    dest->write_mask = 0xf;
 392 }
 393
 394 static void
 395 alu_src_init(nir_alu_src *src)
 396 {
 397    src_init(&src->src);
 398    src->abs = src->negate = false;
 399    src->swizzle[0] = 0;
 400    src->swizzle[1] = 1;
 401    src->swizzle[2] = 2;
 402    src->swizzle[3] = 3;
 403 }
 404
 405 nir_alu_instr *
 406 nir_alu_instr_create(nir_shader *shader, nir_op op)
 407 {
 408    unsigned num_srcs = nir_op_infos[op].num_inputs;
 409    nir_alu_instr *instr =
 410       ralloc_size(shader,
 411                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 412
 413    instr_init(&instr->instr, nir_instr_type_alu);
 414    instr->op = op;
 415    alu_dest_init(&instr->dest);
 416    for (unsigned i = 0; i < num_srcs; i++)
 417       alu_src_init(&instr->src[i]);
 418
 419    return instr;
 420 }
 421
 422 nir_jump_instr *
 423 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 424 {
 425    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 426    instr_init(&instr->instr, nir_instr_type_jump);
 427    instr->type = type;
 428    return instr;
 429 }
 430
 431 nir_load_const_instr *
 432 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 433 {
 434    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 435    instr_init(&instr->instr, nir_instr_type_load_const);
 436
 437    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 438
 439    return instr;
 440 }
 441
 442 nir_intrinsic_instr *
 443 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 444 {
 445    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 446    nir_intrinsic_instr *instr =
 447       ralloc_size(shader,
 448                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 449
 450    instr_init(&instr->instr, nir_instr_type_intrinsic);
 451    instr->intrinsic = op;
 452
 453    if (nir_intrinsic_infos[op].has_dest)
 454       dest_init(&instr->dest);
 455
 456    for (unsigned i = 0; i < num_srcs; i++)
 457       src_init(&instr->src[i]);
 458
 459    return instr;
 460 }
 461
 462 nir_call_instr *
 463 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 464 {
 465    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 466    instr_init(&instr->instr, nir_instr_type_call);
 467
 468    instr->callee = callee;
 469    instr->num_params = callee->num_params;
 470    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 471    instr->return_deref = NULL;
 472
 473    return instr;
 474 }
 475
 476 nir_tex_instr *
 477 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 478 {
 479    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 480    instr_init(&instr->instr, nir_instr_type_tex);
 481
 482    dest_init(&instr->dest);
 483
 484    instr->num_srcs = num_srcs;
 485    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 486    for (unsigned i = 0; i < num_srcs; i++)
 487       src_init(&instr->src[i].src);
 488
 489    instr->sampler_index = 0;
 490    instr->sampler_array_size = 0;
 491    instr->sampler = NULL;
 492
 493    return instr;
 494 }
 495
 496 nir_phi_instr *
 497 nir_phi_instr_create(nir_shader *shader)
 498 {
 499    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 500    instr_init(&instr->instr, nir_instr_type_phi);
 501
 502    dest_init(&instr->dest);
 503    exec_list_make_empty(&instr->srcs);
 504    return instr;
 505 }
 506
 507 nir_parallel_copy_instr *
 508 nir_parallel_copy_instr_create(nir_shader *shader)
 509 {
 510    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 511    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 512
 513    exec_list_make_empty(&instr->entries);
 514
 515    return instr;
 516 }
 517
 518 nir_ssa_undef_instr *
 519 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 520 {
 521    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 522    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 523
 524    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 525
 526    return instr;
 527 }
 528
 529 nir_deref_var *
 530 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 531 {
 532    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 533    deref->deref.deref_type = nir_deref_type_var;
 534    deref->deref.child = NULL;
 535    deref->deref.type = var->type;
 536    deref->var = var;
 537    return deref;
 538 }
 539
 540 nir_deref_array *
 541 nir_deref_array_create(void *mem_ctx)
 542 {
 543    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 544    deref->deref.deref_type = nir_deref_type_array;
 545    deref->deref.child = NULL;
 546    deref->deref_array_type = nir_deref_array_type_direct;
 547    src_init(&deref->indirect);
 548    deref->base_offset = 0;
 549    return deref;
 550 }
 551
 552 nir_deref_struct *
 553 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 554 {
 555    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 556    deref->deref.deref_type = nir_deref_type_struct;
 557    deref->deref.child = NULL;
 558    deref->index = field_index;
 559    return deref;
 560 }
 561
 562 static nir_deref_var *
 563 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 564 {
 565    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 566    ret->deref.type = deref->deref.type;
 567    if (deref->deref.child)
 568       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 569    return ret;
 570 }
 571
 572 static nir_deref_array *
 573 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 574 {
 575    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 576    ret->base_offset = deref->base_offset;
 577    ret->deref_array_type = deref->deref_array_type;
 578    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 579       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 580    }
 581    ret->deref.type = deref->deref.type;
 582    if (deref->deref.child)
 583       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 584    return ret;
 585 }
 586
 587 static nir_deref_struct *
 588 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 589 {
 590    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 591    ret->deref.type = deref->deref.type;
 592    if (deref->deref.child)
 593       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 594    return ret;
 595 }
 596
 597 nir_deref *
 598 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 599 {
 600    switch (deref->deref_type) {
 601    case nir_deref_type_var:
 602       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 603    case nir_deref_type_array:
 604       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 605    case nir_deref_type_struct:
 606       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 607    default:
 608       unreachable("Invalid dereference type");
 609    }
 610
 611    return NULL;
 612 }
 613
 614 /* Returns a load_const instruction that represents the constant
 615  * initializer for the given deref chain.  The caller is responsible for
 616  * ensuring that there actually is a constant initializer.
 617  */
 618 nir_load_const_instr *
 619 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 620 {
 621    nir_constant *constant = deref->var->constant_initializer;
 622    assert(constant);
 623
 624    const nir_deref *tail = &deref->deref;
 625    unsigned matrix_offset = 0;
 626    while (tail->child) {
 627       switch (tail->child->deref_type) {
 628       case nir_deref_type_array: {
 629          nir_deref_array *arr = nir_deref_as_array(tail->child);
 630          assert(arr->deref_array_type == nir_deref_array_type_direct);
 631          if (glsl_type_is_matrix(tail->type)) {
 632             assert(arr->deref.child == NULL);
 633             matrix_offset = arr->base_offset;
 634          } else {
 635             constant = constant->elements[arr->base_offset];
 636          }
 637          break;
 638       }
 639
 640       case nir_deref_type_struct: {
 641          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 642          break;
 643       }
 644
 645       default:
 646          unreachable("Invalid deref child type");
 647       }
 648
 649       tail = tail->child;
 650    }
 651
 652    nir_load_const_instr *load =
 653       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 654
 655    matrix_offset *= load->def.num_components;
 656    for (unsigned i = 0; i < load->def.num_components; i++) {
 657       switch (glsl_get_base_type(tail->type)) {
 658       case GLSL_TYPE_FLOAT:
 659       case GLSL_TYPE_INT:
 660       case GLSL_TYPE_UINT:
 661          load->value.u[i] = constant->value.u[matrix_offset + i];
 662          break;
 663       case GLSL_TYPE_BOOL:
 664          load->value.u[i] = constant->value.b[matrix_offset + i] ?
 665                              NIR_TRUE : NIR_FALSE;
 666          break;
 667       default:
 668          unreachable("Invalid immediate type");
 669       }
 670    }
 671
 672    return load;
 673 }
 674
 675 nir_function_impl *
 676 nir_cf_node_get_function(nir_cf_node *node)
 677 {
 678    while (node->type != nir_cf_node_function) {
 679       node = node->parent;
 680    }
 681
 682    return nir_cf_node_as_function(node);
 683 }
 684
 685 static bool
 686 add_use_cb(nir_src *src, void *state)
 687 {
 688    nir_instr *instr = state;
 689
 690    src->parent_instr = instr;
 691    list_addtail(&src->use_link,
 692                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 693
 694    return true;
 695 }
 696
 697 static bool
 698 add_ssa_def_cb(nir_ssa_def *def, void *state)
 699 {
 700    nir_instr *instr = state;
 701
 702    if (instr->block && def->index == UINT_MAX) {
 703       nir_function_impl *impl =
 704          nir_cf_node_get_function(&instr->block->cf_node);
 705
 706       def->index = impl->ssa_alloc++;
 707    }
 708
 709    return true;
 710 }
 711
 712 static bool
 713 add_reg_def_cb(nir_dest *dest, void *state)
 714 {
 715    nir_instr *instr = state;
 716
 717    if (!dest->is_ssa) {
 718       dest->reg.parent_instr = instr;
 719       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 720    }
 721
 722    return true;
 723 }
 724
 725 static void
 726 add_defs_uses(nir_instr *instr)
 727 {
 728    nir_foreach_src(instr, add_use_cb, instr);
 729    nir_foreach_dest(instr, add_reg_def_cb, instr);
 730    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 731 }
 732
 733 void
 734 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 735 {
 736    switch (cursor.option) {
 737    case nir_cursor_before_block:
 738       /* Only allow inserting jumps into empty blocks. */
 739       if (instr->type == nir_instr_type_jump)
 740          assert(exec_list_is_empty(&cursor.block->instr_list));
 741
 742       instr->block = cursor.block;
 743       add_defs_uses(instr);
 744       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 745       break;
 746    case nir_cursor_after_block: {
 747       /* Inserting instructions after a jump is illegal. */
 748       nir_instr *last = nir_block_last_instr(cursor.block);
 749       assert(last == NULL || last->type != nir_instr_type_jump);
 750       (void) last;
 751
 752       instr->block = cursor.block;
 753       add_defs_uses(instr);
 754       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 755       break;
 756    }
 757    case nir_cursor_before_instr:
 758       assert(instr->type != nir_instr_type_jump);
 759       instr->block = cursor.instr->block;
 760       add_defs_uses(instr);
 761       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 762       break;
 763    case nir_cursor_after_instr:
 764       /* Inserting instructions after a jump is illegal. */
 765       assert(cursor.instr->type != nir_instr_type_jump);
 766
 767       /* Only allow inserting jumps at the end of the block. */
 768       if (instr->type == nir_instr_type_jump)
 769          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 770
 771       instr->block = cursor.instr->block;
 772       add_defs_uses(instr);
 773       exec_node_insert_after(&cursor.instr->node, &instr->node);
 774       break;
 775    }
 776
 777    if (instr->type == nir_instr_type_jump)
 778       nir_handle_add_jump(instr->block);
 779 }
 780
 781 static bool
 782 src_is_valid(const nir_src *src)
 783 {
 784    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 785 }
 786
 787 static bool
 788 remove_use_cb(nir_src *src, void *state)
 789 {
 790    if (src_is_valid(src))
 791       list_del(&src->use_link);
 792
 793    return true;
 794 }
 795
 796 static bool
 797 remove_def_cb(nir_dest *dest, void *state)
 798 {
 799    if (!dest->is_ssa)
 800       list_del(&dest->reg.def_link);
 801
 802    return true;
 803 }
 804
 805 static void
 806 remove_defs_uses(nir_instr *instr)
 807 {
 808    nir_foreach_dest(instr, remove_def_cb, instr);
 809    nir_foreach_src(instr, remove_use_cb, instr);
 810 }
 811
 812 void nir_instr_remove(nir_instr *instr)
 813 {
 814    remove_defs_uses(instr);
 815    exec_node_remove(&instr->node);
 816
 817    if (instr->type == nir_instr_type_jump) {
 818       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 819       nir_handle_remove_jump(instr->block, jump_instr->type);
 820    }
 821 }
 822
 823 /*@}*/
 824
 825 void
 826 nir_index_local_regs(nir_function_impl *impl)
 827 {
 828    unsigned index = 0;
 829    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 830       reg->index = index++;
 831    }
 832    impl->reg_alloc = index;
 833 }
 834
 835 void
 836 nir_index_global_regs(nir_shader *shader)
 837 {
 838    unsigned index = 0;
 839    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 840       reg->index = index++;
 841    }
 842    shader->reg_alloc = index;
 843 }
 844
 845 static bool
 846 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 847 {
 848    return cb(&instr->dest.dest, state);
 849 }
 850
 851 static bool
 852 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 853                      void *state)
 854 {
 855    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 856       return cb(&instr->dest, state);
 857
 858    return true;
 859 }
 860
 861 static bool
 862 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 863                    void *state)
 864 {
 865    return cb(&instr->dest, state);
 866 }
 867
 868 static bool
 869 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 870 {
 871    return cb(&instr->dest, state);
 872 }
 873
 874 static bool
 875 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 876                          nir_foreach_dest_cb cb, void *state)
 877 {
 878    nir_foreach_parallel_copy_entry(instr, entry) {
 879       if (!cb(&entry->dest, state))
 880          return false;
 881    }
 882
 883    return true;
 884 }
 885
 886 bool
 887 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 888 {
 889    switch (instr->type) {
 890    case nir_instr_type_alu:
 891       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 892    case nir_instr_type_intrinsic:
 893       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 894    case nir_instr_type_tex:
 895       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 896    case nir_instr_type_phi:
 897       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
 898    case nir_instr_type_parallel_copy:
 899       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
 900                                       cb, state);
 901
 902    case nir_instr_type_load_const:
 903    case nir_instr_type_ssa_undef:
 904    case nir_instr_type_call:
 905    case nir_instr_type_jump:
 906       break;
 907
 908    default:
 909       unreachable("Invalid instruction type");
 910       break;
 911    }
 912
 913    return true;
 914 }
 915
 916 struct foreach_ssa_def_state {
 917    nir_foreach_ssa_def_cb cb;
 918    void *client_state;
 919 };
 920
 921 static inline bool
 922 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
 923 {
 924    struct foreach_ssa_def_state *state = void_state;
 925
 926    if (dest->is_ssa)
 927       return state->cb(&dest->ssa, state->client_state);
 928    else
 929       return true;
 930 }
 931
 932 bool
 933 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
 934 {
 935    switch (instr->type) {
 936    case nir_instr_type_alu:
 937    case nir_instr_type_tex:
 938    case nir_instr_type_intrinsic:
 939    case nir_instr_type_phi:
 940    case nir_instr_type_parallel_copy: {
 941       struct foreach_ssa_def_state foreach_state = {cb, state};
 942       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
 943    }
 944
 945    case nir_instr_type_load_const:
 946       return cb(&nir_instr_as_load_const(instr)->def, state);
 947    case nir_instr_type_ssa_undef:
 948       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
 949    case nir_instr_type_call:
 950    case nir_instr_type_jump:
 951       return true;
 952    default:
 953       unreachable("Invalid instruction type");
 954    }
 955 }
 956
 957 static bool
 958 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
 959 {
 960    if (!cb(src, state))
 961       return false;
 962    if (!src->is_ssa && src->reg.indirect)
 963       return cb(src->reg.indirect, state);
 964    return true;
 965 }
 966
 967 static bool
 968 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
 969                       void *state)
 970 {
 971    if (deref->deref_array_type == nir_deref_array_type_indirect)
 972       return visit_src(&deref->indirect, cb, state);
 973    return true;
 974 }
 975
 976 static bool
 977 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
 978 {
 979    nir_deref *cur = &deref->deref;
 980    while (cur != NULL) {
 981       if (cur->deref_type == nir_deref_type_array) {
 982          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
 983             return false;
 984       }
 985
 986       cur = cur->child;
 987    }
 988
 989    return true;
 990 }
 991
 992 static bool
 993 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
 994 {
 995    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
 996       if (!visit_src(&instr->src[i].src, cb, state))
 997          return false;
 998
 999    return true;
1000 }
1001
1002 static bool
1003 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1004 {
1005    for (unsigned i = 0; i < instr->num_srcs; i++) {
1006       if (!visit_src(&instr->src[i].src, cb, state))
1007          return false;
1008    }
1009
1010    if (instr->sampler != NULL) {
1011       if (!visit_deref_src(instr->sampler, cb, state))
1012          return false;
1013    }
1014
1015    return true;
1016 }
1017
1018 static bool
1019 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1020                     void *state)
1021 {
1022    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1023    for (unsigned i = 0; i < num_srcs; i++) {
1024       if (!visit_src(&instr->src[i], cb, state))
1025          return false;
1026    }
1027
1028    unsigned num_vars =
1029       nir_intrinsic_infos[instr->intrinsic].num_variables;
1030    for (unsigned i = 0; i < num_vars; i++) {
1031       if (!visit_deref_src(instr->variables[i], cb, state))
1032          return false;
1033    }
1034
1035    return true;
1036 }
1037
1038 static bool
1039 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1040 {
1041    return true;
1042 }
1043
1044 static bool
1045 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1046                      void *state)
1047 {
1048    return true;
1049 }
1050
1051 static bool
1052 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1053 {
1054    nir_foreach_phi_src(instr, src) {
1055       if (!visit_src(&src->src, cb, state))
1056          return false;
1057    }
1058
1059    return true;
1060 }
1061
1062 static bool
1063 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1064                         nir_foreach_src_cb cb, void *state)
1065 {
1066    nir_foreach_parallel_copy_entry(instr, entry) {
1067       if (!visit_src(&entry->src, cb, state))
1068          return false;
1069    }
1070
1071    return true;
1072 }
1073
1074 typedef struct {
1075    void *state;
1076    nir_foreach_src_cb cb;
1077 } visit_dest_indirect_state;
1078
1079 static bool
1080 visit_dest_indirect(nir_dest *dest, void *_state)
1081 {
1082    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1083
1084    if (!dest->is_ssa && dest->reg.indirect)
1085       return state->cb(dest->reg.indirect, state->state);
1086
1087    return true;
1088 }
1089
1090 bool
1091 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1092 {
1093    switch (instr->type) {
1094    case nir_instr_type_alu:
1095       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1096          return false;
1097       break;
1098    case nir_instr_type_intrinsic:
1099       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1100          return false;
1101       break;
1102    case nir_instr_type_tex:
1103       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1104          return false;
1105       break;
1106    case nir_instr_type_call:
1107       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1108          return false;
1109       break;
1110    case nir_instr_type_load_const:
1111       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1112          return false;
1113       break;
1114    case nir_instr_type_phi:
1115       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1116          return false;
1117       break;
1118    case nir_instr_type_parallel_copy:
1119       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1120                                    cb, state))
1121          return false;
1122       break;
1123    case nir_instr_type_jump:
1124    case nir_instr_type_ssa_undef:
1125       return true;
1126
1127    default:
1128       unreachable("Invalid instruction type");
1129       break;
1130    }
1131
1132    visit_dest_indirect_state dest_state;
1133    dest_state.state = state;
1134    dest_state.cb = cb;
1135    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1136 }
1137
1138 nir_const_value *
1139 nir_src_as_const_value(nir_src src)
1140 {
1141    if (!src.is_ssa)
1142       return NULL;
1143
1144    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1145       return NULL;
1146
1147    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1148
1149    return &load->value;
1150 }
1151
1152 /**
1153  * Returns true if the source is known to be dynamically uniform. Otherwise it
1154  * returns false which means it may or may not be dynamically uniform but it
1155  * can't be determined.
1156  */
1157 bool
1158 nir_src_is_dynamically_uniform(nir_src src)
1159 {
1160    if (!src.is_ssa)
1161       return false;
1162
1163    /* Constants are trivially dynamically uniform */
1164    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1165       return true;
1166
1167    /* As are uniform variables */
1168    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1169       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1170
1171       if (intr->intrinsic == nir_intrinsic_load_uniform)
1172          return true;
1173    }
1174
1175    /* XXX: this could have many more tests, such as when a sampler function is
1176     * called with dynamically uniform arguments.
1177     */
1178    return false;
1179 }
1180
1181 static void
1182 src_remove_all_uses(nir_src *src)
1183 {
1184    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1185       if (!src_is_valid(src))
1186          continue;
1187
1188       list_del(&src->use_link);
1189    }
1190 }
1191
1192 static void
1193 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1194 {
1195    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1196       if (!src_is_valid(src))
1197          continue;
1198
1199       if (parent_instr) {
1200          src->parent_instr = parent_instr;
1201          if (src->is_ssa)
1202             list_addtail(&src->use_link, &src->ssa->uses);
1203          else
1204             list_addtail(&src->use_link, &src->reg.reg->uses);
1205       } else {
1206          assert(parent_if);
1207          src->parent_if = parent_if;
1208          if (src->is_ssa)
1209             list_addtail(&src->use_link, &src->ssa->if_uses);
1210          else
1211             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1212       }
1213    }
1214 }
1215
1216 void
1217 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1218 {
1219    assert(!src_is_valid(src) || src->parent_instr == instr);
1220
1221    src_remove_all_uses(src);
1222    *src = new_src;
1223    src_add_all_uses(src, instr, NULL);
1224 }
1225
1226 void
1227 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1228 {
1229    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1230
1231    src_remove_all_uses(dest);
1232    src_remove_all_uses(src);
1233    *dest = *src;
1234    *src = NIR_SRC_INIT;
1235    src_add_all_uses(dest, dest_instr, NULL);
1236 }
1237
1238 void
1239 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1240 {
1241    nir_src *src = &if_stmt->condition;
1242    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1243
1244    src_remove_all_uses(src);
1245    *src = new_src;
1246    src_add_all_uses(src, NULL, if_stmt);
1247 }
1248
1249 void
1250 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1251 {
1252    if (dest->is_ssa) {
1253       /* We can only overwrite an SSA destination if it has no uses. */
1254       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1255    } else {
1256       list_del(&dest->reg.def_link);
1257       if (dest->reg.indirect)
1258          src_remove_all_uses(dest->reg.indirect);
1259    }
1260
1261    /* We can't re-write with an SSA def */
1262    assert(!new_dest.is_ssa);
1263
1264    nir_dest_copy(dest, &new_dest, instr);
1265
1266    dest->reg.parent_instr = instr;
1267    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1268
1269    if (dest->reg.indirect)
1270       src_add_all_uses(dest->reg.indirect, instr, NULL);
1271 }
1272
1273 void
1274 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1275                  unsigned num_components, const char *name)
1276 {
1277    def->name = name;
1278    def->parent_instr = instr;
1279    list_inithead(&def->uses);
1280    list_inithead(&def->if_uses);
1281    def->num_components = num_components;
1282
1283    if (instr->block) {
1284       nir_function_impl *impl =
1285          nir_cf_node_get_function(&instr->block->cf_node);
1286
1287       def->index = impl->ssa_alloc++;
1288    } else {
1289       def->index = UINT_MAX;
1290    }
1291 }
1292
1293 void
1294 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1295                  unsigned num_components, const char *name)
1296 {
1297    dest->is_ssa = true;
1298    nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1299 }
1300
1301 void
1302 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1303 {
1304    assert(!new_src.is_ssa || def != new_src.ssa);
1305
1306    nir_foreach_use_safe(def, use_src)
1307       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1308
1309    nir_foreach_if_use_safe(def, use_src)
1310       nir_if_rewrite_condition(use_src->parent_if, new_src);
1311 }
1312
1313 static bool
1314 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1315 {
1316    assert(start->block == end->block);
1317
1318    if (between->block != start->block)
1319       return false;
1320
1321    /* Search backwards looking for "between" */
1322    while (start != end) {
1323       if (between == end)
1324          return true;
1325
1326       end = nir_instr_prev(end);
1327       assert(end);
1328    }
1329
1330    return false;
1331 }
1332
1333 /* Replaces all uses of the given SSA def with the given source but only if
1334  * the use comes after the after_me instruction.  This can be useful if you
1335  * are emitting code to fix up the result of some instruction: you can freely
1336  * use the result in that code and then call rewrite_uses_after and pass the
1337  * last fixup instruction as after_me and it will replace all of the uses you
1338  * want without touching the fixup code.
1339  *
1340  * This function assumes that after_me is in the same block as
1341  * def->parent_instr and that after_me comes after def->parent_instr.
1342  */
1343 void
1344 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1345                                nir_instr *after_me)
1346 {
1347    assert(!new_src.is_ssa || def != new_src.ssa);
1348
1349    nir_foreach_use_safe(def, use_src) {
1350       assert(use_src->parent_instr != def->parent_instr);
1351       /* Since def already dominates all of its uses, the only way a use can
1352        * not be dominated by after_me is if it is between def and after_me in
1353        * the instruction list.
1354        */
1355       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1356          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1357    }
1358
1359    nir_foreach_if_use_safe(def, use_src)
1360       nir_if_rewrite_condition(use_src->parent_if, new_src);
1361 }
1362
1363 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1364                             bool reverse, void *state);
1365
1366 static inline bool
1367 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1368 {
1369    if (reverse) {
1370       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1371                                       &if_stmt->else_list) {
1372          if (!foreach_cf_node(node, cb, reverse, state))
1373             return false;
1374       }
1375
1376       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1377                                       &if_stmt->then_list) {
1378          if (!foreach_cf_node(node, cb, reverse, state))
1379             return false;
1380       }
1381    } else {
1382       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1383          if (!foreach_cf_node(node, cb, reverse, state))
1384             return false;
1385       }
1386
1387       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1388          if (!foreach_cf_node(node, cb, reverse, state))
1389             return false;
1390       }
1391    }
1392
1393    return true;
1394 }
1395
1396 static inline bool
1397 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1398 {
1399    if (reverse) {
1400       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1401          if (!foreach_cf_node(node, cb, reverse, state))
1402             return false;
1403       }
1404    } else {
1405       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1406          if (!foreach_cf_node(node, cb, reverse, state))
1407             return false;
1408       }
1409    }
1410
1411    return true;
1412 }
1413
1414 static bool
1415 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1416                 bool reverse, void *state)
1417 {
1418    switch (node->type) {
1419    case nir_cf_node_block:
1420       return cb(nir_cf_node_as_block(node), state);
1421    case nir_cf_node_if:
1422       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1423    case nir_cf_node_loop:
1424       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1425       break;
1426
1427    default:
1428       unreachable("Invalid CFG node type");
1429       break;
1430    }
1431
1432    return false;
1433 }
1434
1435 bool
1436 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1437                              void *state)
1438 {
1439    return foreach_cf_node(node, cb, false, state);
1440 }
1441
1442 bool
1443 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1444 {
1445    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1446       if (!foreach_cf_node(node, cb, false, state))
1447          return false;
1448    }
1449
1450    return cb(impl->end_block, state);
1451 }
1452
1453 bool
1454 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1455                           void *state)
1456 {
1457    if (!cb(impl->end_block, state))
1458       return false;
1459
1460    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1461       if (!foreach_cf_node(node, cb, true, state))
1462          return false;
1463    }
1464
1465    return true;
1466 }
1467
1468 nir_if *
1469 nir_block_get_following_if(nir_block *block)
1470 {
1471    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1472       return NULL;
1473
1474    if (nir_cf_node_is_last(&block->cf_node))
1475       return NULL;
1476
1477    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1478
1479    if (next_node->type != nir_cf_node_if)
1480       return NULL;
1481
1482    return nir_cf_node_as_if(next_node);
1483 }
1484
1485 nir_loop *
1486 nir_block_get_following_loop(nir_block *block)
1487 {
1488    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1489       return NULL;
1490
1491    if (nir_cf_node_is_last(&block->cf_node))
1492       return NULL;
1493
1494    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1495
1496    if (next_node->type != nir_cf_node_loop)
1497       return NULL;
1498
1499    return nir_cf_node_as_loop(next_node);
1500 }
1501 static bool
1502 index_block(nir_block *block, void *state)
1503 {
1504    unsigned *index = state;
1505    block->index = (*index)++;
1506    return true;
1507 }
1508
1509 void
1510 nir_index_blocks(nir_function_impl *impl)
1511 {
1512    unsigned index = 0;
1513
1514    if (impl->valid_metadata & nir_metadata_block_index)
1515       return;
1516
1517    nir_foreach_block(impl, index_block, &index);
1518
1519    impl->num_blocks = index;
1520 }
1521
1522 static bool
1523 index_ssa_def_cb(nir_ssa_def *def, void *state)
1524 {
1525    unsigned *index = (unsigned *) state;
1526    def->index = (*index)++;
1527
1528    return true;
1529 }
1530
1531 static bool
1532 index_ssa_block(nir_block *block, void *state)
1533 {
1534    nir_foreach_instr(block, instr)
1535       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1536
1537    return true;
1538 }
1539
1540 /**
1541  * The indices are applied top-to-bottom which has the very nice property
1542  * that, if A dominates B, then A->index <= B->index.
1543  */
1544 void
1545 nir_index_ssa_defs(nir_function_impl *impl)
1546 {
1547    unsigned index = 0;
1548    nir_foreach_block(impl, index_ssa_block, &index);
1549    impl->ssa_alloc = index;
1550 }
1551
1552 static bool
1553 index_instrs_block(nir_block *block, void *state)
1554 {
1555    unsigned *index = state;
1556    nir_foreach_instr(block, instr)
1557       instr->index = (*index)++;
1558
1559    return true;
1560 }
1561
1562 /**
1563  * The indices are applied top-to-bottom which has the very nice property
1564  * that, if A dominates B, then A->index <= B->index.
1565  */
1566 unsigned
1567 nir_index_instrs(nir_function_impl *impl)
1568 {
1569    unsigned index = 0;
1570    nir_foreach_block(impl, index_instrs_block, &index);
1571    return index;
1572 }
1573
1574 nir_intrinsic_op
1575 nir_intrinsic_from_system_value(gl_system_value val)
1576 {
1577    switch (val) {
1578    case SYSTEM_VALUE_VERTEX_ID:
1579       return nir_intrinsic_load_vertex_id;
1580    case SYSTEM_VALUE_INSTANCE_ID:
1581       return nir_intrinsic_load_instance_id;
1582    case SYSTEM_VALUE_DRAW_ID:
1583       return nir_intrinsic_load_draw_id;
1584    case SYSTEM_VALUE_BASE_INSTANCE:
1585       return nir_intrinsic_load_base_instance;
1586    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1587       return nir_intrinsic_load_vertex_id_zero_base;
1588    case SYSTEM_VALUE_BASE_VERTEX:
1589       return nir_intrinsic_load_base_vertex;
1590    case SYSTEM_VALUE_INVOCATION_ID:
1591       return nir_intrinsic_load_invocation_id;
1592    case SYSTEM_VALUE_FRONT_FACE:
1593       return nir_intrinsic_load_front_face;
1594    case SYSTEM_VALUE_SAMPLE_ID:
1595       return nir_intrinsic_load_sample_id;
1596    case SYSTEM_VALUE_SAMPLE_POS:
1597       return nir_intrinsic_load_sample_pos;
1598    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1599       return nir_intrinsic_load_sample_mask_in;
1600    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1601       return nir_intrinsic_load_local_invocation_id;
1602    case SYSTEM_VALUE_WORK_GROUP_ID:
1603       return nir_intrinsic_load_work_group_id;
1604    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1605       return nir_intrinsic_load_num_work_groups;
1606    case SYSTEM_VALUE_PRIMITIVE_ID:
1607       return nir_intrinsic_load_primitive_id;
1608    case SYSTEM_VALUE_TESS_COORD:
1609       return nir_intrinsic_load_tess_coord;
1610    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1611       return nir_intrinsic_load_tess_level_outer;
1612    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1613       return nir_intrinsic_load_tess_level_inner;
1614    case SYSTEM_VALUE_VERTICES_IN:
1615       return nir_intrinsic_load_patch_vertices_in;
1616    case SYSTEM_VALUE_HELPER_INVOCATION:
1617       return nir_intrinsic_load_helper_invocation;
1618    default:
1619       unreachable("system value does not directly correspond to intrinsic");
1620    }
1621 }
1622
1623 gl_system_value
1624 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1625 {
1626    switch (intrin) {
1627    case nir_intrinsic_load_vertex_id:
1628       return SYSTEM_VALUE_VERTEX_ID;
1629    case nir_intrinsic_load_instance_id:
1630       return SYSTEM_VALUE_INSTANCE_ID;
1631    case nir_intrinsic_load_draw_id:
1632       return SYSTEM_VALUE_DRAW_ID;
1633    case nir_intrinsic_load_base_instance:
1634       return SYSTEM_VALUE_BASE_INSTANCE;
1635    case nir_intrinsic_load_vertex_id_zero_base:
1636       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1637    case nir_intrinsic_load_base_vertex:
1638       return SYSTEM_VALUE_BASE_VERTEX;
1639    case nir_intrinsic_load_invocation_id:
1640       return SYSTEM_VALUE_INVOCATION_ID;
1641    case nir_intrinsic_load_front_face:
1642       return SYSTEM_VALUE_FRONT_FACE;
1643    case nir_intrinsic_load_sample_id:
1644       return SYSTEM_VALUE_SAMPLE_ID;
1645    case nir_intrinsic_load_sample_pos:
1646       return SYSTEM_VALUE_SAMPLE_POS;
1647    case nir_intrinsic_load_sample_mask_in:
1648       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1649    case nir_intrinsic_load_local_invocation_id:
1650       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1651    case nir_intrinsic_load_num_work_groups:
1652       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1653    case nir_intrinsic_load_work_group_id:
1654       return SYSTEM_VALUE_WORK_GROUP_ID;
1655    case nir_intrinsic_load_primitive_id:
1656       return SYSTEM_VALUE_PRIMITIVE_ID;
1657    case nir_intrinsic_load_tess_coord:
1658       return SYSTEM_VALUE_TESS_COORD;
1659    case nir_intrinsic_load_tess_level_outer:
1660       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1661    case nir_intrinsic_load_tess_level_inner:
1662       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1663    case nir_intrinsic_load_patch_vertices_in:
1664       return SYSTEM_VALUE_VERTICES_IN;
1665    case nir_intrinsic_load_helper_invocation:
1666       return SYSTEM_VALUE_HELPER_INVOCATION;
1667    default:
1668       unreachable("intrinsic doesn't produce a system value");
1669    }
1670 }