c9edcadaaef278290009b037648a0d88483b470d
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #include <stdio.h>
45
46 #ifndef NDEBUG
47 #include "util/debug.h"
48 #endif /* NDEBUG */
49
50 #include "nir_opcodes.h"
51
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
54 #endif
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define NIR_FALSE 0u
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t;
66
67 static inline bool
68 nir_num_components_valid(unsigned num_components)
69 {
70 return (num_components >= 1 &&
71 num_components <= 4) ||
72 num_components == 8 ||
73 num_components == 16;
74 }
75
76 /** Defines a cast function
77 *
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
80 *
81 * Note that you have to be a bit careful as the generated cast function
82 * destroys constness.
83 */
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
88 { \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
91 }
92
93 struct nir_function;
94 struct nir_shader;
95 struct nir_instr;
96 struct nir_builder;
97
98
99 /**
100 * Description of built-in state associated with a uniform
101 *
102 * \sa nir_variable::state_slots
103 */
104 typedef struct {
105 gl_state_index16 tokens[STATE_LENGTH];
106 uint16_t swizzle;
107 } nir_state_slot;
108
109 typedef enum {
110 nir_var_shader_in = (1 << 0),
111 nir_var_shader_out = (1 << 1),
112 nir_var_shader_temp = (1 << 2),
113 nir_var_function_temp = (1 << 3),
114 nir_var_uniform = (1 << 4),
115 nir_var_mem_ubo = (1 << 5),
116 nir_var_system_value = (1 << 6),
117 nir_var_mem_ssbo = (1 << 7),
118 nir_var_mem_shared = (1 << 8),
119 nir_var_mem_global = (1 << 9),
120 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes = 11,
122 nir_var_all = (1 << nir_num_variable_modes) - 1,
123 } nir_variable_mode;
124
125 /**
126 * Rounding modes.
127 */
128 typedef enum {
129 nir_rounding_mode_undef = 0,
130 nir_rounding_mode_rtne = 1, /* round to nearest even */
131 nir_rounding_mode_ru = 2, /* round up */
132 nir_rounding_mode_rd = 3, /* round down */
133 nir_rounding_mode_rtz = 4, /* round towards zero */
134 } nir_rounding_mode;
135
136 typedef union {
137 bool b;
138 float f32;
139 double f64;
140 int8_t i8;
141 uint8_t u8;
142 int16_t i16;
143 uint16_t u16;
144 int32_t i32;
145 uint32_t u32;
146 int64_t i64;
147 uint64_t u64;
148 } nir_const_value;
149
150 #define nir_const_value_to_array(arr, c, components, m) \
151 { \
152 for (unsigned i = 0; i < components; ++i) \
153 arr[i] = c[i].m; \
154 } while (false)
155
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
158 {
159 nir_const_value v;
160 memset(&v, 0, sizeof(v));
161
162 switch (bit_size) {
163 case 1: v.b = x; break;
164 case 8: v.u8 = x; break;
165 case 16: v.u16 = x; break;
166 case 32: v.u32 = x; break;
167 case 64: v.u64 = x; break;
168 default:
169 unreachable("Invalid bit size");
170 }
171
172 return v;
173 }
174
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i, unsigned bit_size)
177 {
178 nir_const_value v;
179 memset(&v, 0, sizeof(v));
180
181 assert(bit_size <= 64);
182 if (bit_size < 64) {
183 assert(i >= (-(1ll << (bit_size - 1))));
184 assert(i < (1ll << (bit_size - 1)));
185 }
186
187 return nir_const_value_for_raw_uint(i, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
192 {
193 nir_const_value v;
194 memset(&v, 0, sizeof(v));
195
196 assert(bit_size <= 64);
197 if (bit_size < 64)
198 assert(u < (1ull << bit_size));
199
200 return nir_const_value_for_raw_uint(u, bit_size);
201 }
202
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b, unsigned bit_size)
205 {
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b, bit_size);
208 }
209
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
212
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
215 {
216 switch (bit_size) {
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value.b;
219 case 8: return value.i8;
220 case 16: return value.i16;
221 case 32: return value.i32;
222 case 64: return value.i64;
223 default:
224 unreachable("Invalid bit size");
225 }
226 }
227
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
230 {
231 switch (bit_size) {
232 case 1: return value.b;
233 case 8: return value.u8;
234 case 16: return value.u16;
235 case 32: return value.u32;
236 case 64: return value.u64;
237 default:
238 unreachable("Invalid bit size");
239 }
240 }
241
242 static inline bool
243 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
244 {
245 int64_t i = nir_const_value_as_int(value, bit_size);
246
247 /* Booleans of any size use 0/-1 convention */
248 assert(i == 0 || i == -1);
249
250 return i;
251 }
252
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
255
256 typedef struct nir_constant {
257 /**
258 * Value of the constant.
259 *
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
263 */
264 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
265
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
268 */
269 unsigned num_elements;
270
271 /* Array elements / Structure Fields */
272 struct nir_constant **elements;
273 } nir_constant;
274
275 /**
276 * \brief Layout qualifiers for gl_FragDepth.
277 *
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
280 */
281 typedef enum {
282 nir_depth_layout_none, /**< No depth layout is specified. */
283 nir_depth_layout_any,
284 nir_depth_layout_greater,
285 nir_depth_layout_less,
286 nir_depth_layout_unchanged
287 } nir_depth_layout;
288
289 /**
290 * Enum keeping track of how a variable was declared.
291 */
292 typedef enum {
293 /**
294 * Normal declaration.
295 */
296 nir_var_declared_normally = 0,
297
298 /**
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
301 */
302 nir_var_hidden,
303 } nir_var_declaration_type;
304
305 /**
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
308 */
309
310 typedef struct nir_variable {
311 struct exec_node node;
312
313 /**
314 * Declared type of the variable
315 */
316 const struct glsl_type *type;
317
318 /**
319 * Declared name of the variable
320 */
321 char *name;
322
323 struct nir_variable_data {
324 /**
325 * Storage class of the variable.
326 *
327 * \sa nir_variable_mode
328 */
329 nir_variable_mode mode:11;
330
331 /**
332 * Is the variable read-only?
333 *
334 * This is set for variables declared as \c const, shader inputs,
335 * and uniforms.
336 */
337 unsigned read_only:1;
338 unsigned centroid:1;
339 unsigned sample:1;
340 unsigned patch:1;
341 unsigned invariant:1;
342
343 /**
344 * Precision qualifier.
345 *
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
348 *
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
353 */
354 unsigned precision:2;
355
356 /**
357 * Can this variable be coalesced with another?
358 *
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
364 */
365 unsigned cannot_coalesce:1;
366
367 /**
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
371 *
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
374 */
375 unsigned always_active_io:1;
376
377 /**
378 * Interpolation mode for shader inputs / outputs
379 *
380 * \sa glsl_interp_mode
381 */
382 unsigned interpolation:3;
383
384 /**
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
390 */
391 unsigned location_frac:2;
392
393 /**
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
397 */
398 unsigned compact:1;
399
400 /**
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
404 */
405 unsigned fb_fetch_output:1;
406
407 /**
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
410 */
411 unsigned bindless:1;
412
413 /**
414 * Was an explicit binding set in the shader?
415 */
416 unsigned explicit_binding:1;
417
418 /**
419 * Was the location explicitly set in the shader?
420 *
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
423 * no effect).
424 */
425 unsigned explicit_location:1;
426
427 /**
428 * Was a transfer feedback buffer set in the shader?
429 */
430 unsigned explicit_xfb_buffer:1;
431
432 /**
433 * Was a transfer feedback stride set in the shader?
434 */
435 unsigned explicit_xfb_stride:1;
436
437 /**
438 * Was an explicit offset set in the shader?
439 */
440 unsigned explicit_offset:1;
441
442 /**
443 * Non-zero if this variable was created by lowering a named interface
444 * block.
445 */
446 unsigned from_named_ifc_block:1;
447
448 /**
449 * How the variable was declared. See nir_var_declaration_type.
450 *
451 * This is used to detect variables generated by the compiler, so should
452 * not be visible via the API.
453 */
454 unsigned how_declared:2;
455
456 /**
457 * \brief Layout qualifier for gl_FragDepth.
458 *
459 * This is not equal to \c ir_depth_layout_none if and only if this
460 * variable is \c gl_FragDepth and a layout qualifier is specified.
461 */
462 nir_depth_layout depth_layout:3;
463
464 /**
465 * Vertex stream output identifier.
466 *
467 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
468 * indicate the stream of the i-th component.
469 */
470 unsigned stream:9;
471
472 /**
473 * Access flags for memory variables (SSBO/global), image uniforms, and
474 * bindless images in uniforms/inputs/outputs.
475 */
476 enum gl_access_qualifier access:8;
477
478 /**
479 * Descriptor set binding for sampler or UBO.
480 */
481 unsigned descriptor_set:5;
482
483 /**
484 * output index for dual source blending.
485 */
486 unsigned index;
487
488 /**
489 * Initial binding point for a sampler or UBO.
490 *
491 * For array types, this represents the binding point for the first element.
492 */
493 unsigned binding;
494
495 /**
496 * Storage location of the base of this variable
497 *
498 * The precise meaning of this field depends on the nature of the variable.
499 *
500 * - Vertex shader input: one of the values from \c gl_vert_attrib.
501 * - Vertex shader output: one of the values from \c gl_varying_slot.
502 * - Geometry shader input: one of the values from \c gl_varying_slot.
503 * - Geometry shader output: one of the values from \c gl_varying_slot.
504 * - Fragment shader input: one of the values from \c gl_varying_slot.
505 * - Fragment shader output: one of the values from \c gl_frag_result.
506 * - Uniforms: Per-stage uniform slot number for default uniform block.
507 * - Uniforms: Index within the uniform block definition for UBO members.
508 * - Non-UBO Uniforms: uniform slot number.
509 * - Other: This field is not currently used.
510 *
511 * If the variable is a uniform, shader input, or shader output, and the
512 * slot has not been assigned, the value will be -1.
513 */
514 int location;
515
516 /**
517 * The actual location of the variable in the IR. Only valid for inputs,
518 * outputs, and uniforms (including samplers and images).
519 */
520 unsigned driver_location;
521
522 /**
523 * Location an atomic counter or transform feedback is stored at.
524 */
525 unsigned offset;
526
527 union {
528 struct {
529 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
530 enum pipe_format format;
531 } image;
532
533 struct {
534 /**
535 * Transform feedback buffer.
536 */
537 uint16_t buffer:2;
538
539 /**
540 * Transform feedback stride.
541 */
542 uint16_t stride;
543 } xfb;
544 };
545 } data;
546
547 /**
548 * Identifier for this variable generated by nir_index_vars() that is unique
549 * among other variables in the same exec_list.
550 */
551 unsigned index;
552
553 /* Number of nir_variable_data members */
554 uint16_t num_members;
555
556 /**
557 * Built-in state that backs this uniform
558 *
559 * Once set at variable creation, \c state_slots must remain invariant.
560 * This is because, ideally, this array would be shared by all clones of
561 * this variable in the IR tree. In other words, we'd really like for it
562 * to be a fly-weight.
563 *
564 * If the variable is not a uniform, \c num_state_slots will be zero and
565 * \c state_slots will be \c NULL.
566 */
567 /*@{*/
568 uint16_t num_state_slots; /**< Number of state slots used */
569 nir_state_slot *state_slots; /**< State descriptors. */
570 /*@}*/
571
572 /**
573 * Constant expression assigned in the initializer of the variable
574 *
575 * This field should only be used temporarily by creators of NIR shaders
576 * and then lower_constant_initializers can be used to get rid of them.
577 * Most of the rest of NIR ignores this field or asserts that it's NULL.
578 */
579 nir_constant *constant_initializer;
580
581 /**
582 * For variables that are in an interface block or are an instance of an
583 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
584 *
585 * \sa ir_variable::location
586 */
587 const struct glsl_type *interface_type;
588
589 /**
590 * Description of per-member data for per-member struct variables
591 *
592 * This is used for variables which are actually an amalgamation of
593 * multiple entities such as a struct of built-in values or a struct of
594 * inputs each with their own layout specifier. This is only allowed on
595 * variables with a struct or array of array of struct type.
596 */
597 struct nir_variable_data *members;
598 } nir_variable;
599
600 #define nir_foreach_variable(var, var_list) \
601 foreach_list_typed(nir_variable, var, node, var_list)
602
603 #define nir_foreach_variable_safe(var, var_list) \
604 foreach_list_typed_safe(nir_variable, var, node, var_list)
605
606 static inline bool
607 nir_variable_is_global(const nir_variable *var)
608 {
609 return var->data.mode != nir_var_function_temp;
610 }
611
612 typedef struct nir_register {
613 struct exec_node node;
614
615 unsigned num_components; /** < number of vector components */
616 unsigned num_array_elems; /** < size of array (0 for no array) */
617
618 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
619 uint8_t bit_size;
620
621 /** generic register index. */
622 unsigned index;
623
624 /** only for debug purposes, can be NULL */
625 const char *name;
626
627 /** set of nir_srcs where this register is used (read from) */
628 struct list_head uses;
629
630 /** set of nir_dests where this register is defined (written to) */
631 struct list_head defs;
632
633 /** set of nir_ifs where this register is used as a condition */
634 struct list_head if_uses;
635 } nir_register;
636
637 #define nir_foreach_register(reg, reg_list) \
638 foreach_list_typed(nir_register, reg, node, reg_list)
639 #define nir_foreach_register_safe(reg, reg_list) \
640 foreach_list_typed_safe(nir_register, reg, node, reg_list)
641
642 typedef enum PACKED {
643 nir_instr_type_alu,
644 nir_instr_type_deref,
645 nir_instr_type_call,
646 nir_instr_type_tex,
647 nir_instr_type_intrinsic,
648 nir_instr_type_load_const,
649 nir_instr_type_jump,
650 nir_instr_type_ssa_undef,
651 nir_instr_type_phi,
652 nir_instr_type_parallel_copy,
653 } nir_instr_type;
654
655 typedef struct nir_instr {
656 struct exec_node node;
657 struct nir_block *block;
658 nir_instr_type type;
659
660 /* A temporary for optimization and analysis passes to use for storing
661 * flags. For instance, DCE uses this to store the "dead/live" info.
662 */
663 uint8_t pass_flags;
664
665 /** generic instruction index. */
666 unsigned index;
667 } nir_instr;
668
669 static inline nir_instr *
670 nir_instr_next(nir_instr *instr)
671 {
672 struct exec_node *next = exec_node_get_next(&instr->node);
673 if (exec_node_is_tail_sentinel(next))
674 return NULL;
675 else
676 return exec_node_data(nir_instr, next, node);
677 }
678
679 static inline nir_instr *
680 nir_instr_prev(nir_instr *instr)
681 {
682 struct exec_node *prev = exec_node_get_prev(&instr->node);
683 if (exec_node_is_head_sentinel(prev))
684 return NULL;
685 else
686 return exec_node_data(nir_instr, prev, node);
687 }
688
689 static inline bool
690 nir_instr_is_first(const nir_instr *instr)
691 {
692 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
693 }
694
695 static inline bool
696 nir_instr_is_last(const nir_instr *instr)
697 {
698 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
699 }
700
701 typedef struct nir_ssa_def {
702 /** for debugging only, can be NULL */
703 const char* name;
704
705 /** generic SSA definition index. */
706 unsigned index;
707
708 /** Index into the live_in and live_out bitfields */
709 unsigned live_index;
710
711 /** Instruction which produces this SSA value. */
712 nir_instr *parent_instr;
713
714 /** set of nir_instrs where this register is used (read from) */
715 struct list_head uses;
716
717 /** set of nir_ifs where this register is used as a condition */
718 struct list_head if_uses;
719
720 uint8_t num_components;
721
722 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
723 uint8_t bit_size;
724 } nir_ssa_def;
725
726 struct nir_src;
727
728 typedef struct {
729 nir_register *reg;
730 struct nir_src *indirect; /** < NULL for no indirect offset */
731 unsigned base_offset;
732
733 /* TODO use-def chain goes here */
734 } nir_reg_src;
735
736 typedef struct {
737 nir_instr *parent_instr;
738 struct list_head def_link;
739
740 nir_register *reg;
741 struct nir_src *indirect; /** < NULL for no indirect offset */
742 unsigned base_offset;
743
744 /* TODO def-use chain goes here */
745 } nir_reg_dest;
746
747 struct nir_if;
748
749 typedef struct nir_src {
750 union {
751 /** Instruction that consumes this value as a source. */
752 nir_instr *parent_instr;
753 struct nir_if *parent_if;
754 };
755
756 struct list_head use_link;
757
758 union {
759 nir_reg_src reg;
760 nir_ssa_def *ssa;
761 };
762
763 bool is_ssa;
764 } nir_src;
765
766 static inline nir_src
767 nir_src_init(void)
768 {
769 nir_src src = { { NULL } };
770 return src;
771 }
772
773 #define NIR_SRC_INIT nir_src_init()
774
775 #define nir_foreach_use(src, reg_or_ssa_def) \
776 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
777
778 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
779 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
780
781 #define nir_foreach_if_use(src, reg_or_ssa_def) \
782 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
783
784 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
785 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
786
787 typedef struct {
788 union {
789 nir_reg_dest reg;
790 nir_ssa_def ssa;
791 };
792
793 bool is_ssa;
794 } nir_dest;
795
796 static inline nir_dest
797 nir_dest_init(void)
798 {
799 nir_dest dest = { { { NULL } } };
800 return dest;
801 }
802
803 #define NIR_DEST_INIT nir_dest_init()
804
805 #define nir_foreach_def(dest, reg) \
806 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
807
808 #define nir_foreach_def_safe(dest, reg) \
809 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
810
811 static inline nir_src
812 nir_src_for_ssa(nir_ssa_def *def)
813 {
814 nir_src src = NIR_SRC_INIT;
815
816 src.is_ssa = true;
817 src.ssa = def;
818
819 return src;
820 }
821
822 static inline nir_src
823 nir_src_for_reg(nir_register *reg)
824 {
825 nir_src src = NIR_SRC_INIT;
826
827 src.is_ssa = false;
828 src.reg.reg = reg;
829 src.reg.indirect = NULL;
830 src.reg.base_offset = 0;
831
832 return src;
833 }
834
835 static inline nir_dest
836 nir_dest_for_reg(nir_register *reg)
837 {
838 nir_dest dest = NIR_DEST_INIT;
839
840 dest.reg.reg = reg;
841
842 return dest;
843 }
844
845 static inline unsigned
846 nir_src_bit_size(nir_src src)
847 {
848 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
849 }
850
851 static inline unsigned
852 nir_src_num_components(nir_src src)
853 {
854 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
855 }
856
857 static inline bool
858 nir_src_is_const(nir_src src)
859 {
860 return src.is_ssa &&
861 src.ssa->parent_instr->type == nir_instr_type_load_const;
862 }
863
864 static inline unsigned
865 nir_dest_bit_size(nir_dest dest)
866 {
867 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
868 }
869
870 static inline unsigned
871 nir_dest_num_components(nir_dest dest)
872 {
873 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
874 }
875
876 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
877 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
878
879 typedef struct {
880 nir_src src;
881
882 /**
883 * \name input modifiers
884 */
885 /*@{*/
886 /**
887 * For inputs interpreted as floating point, flips the sign bit. For
888 * inputs interpreted as integers, performs the two's complement negation.
889 */
890 bool negate;
891
892 /**
893 * Clears the sign bit for floating point values, and computes the integer
894 * absolute value for integers. Note that the negate modifier acts after
895 * the absolute value modifier, therefore if both are set then all inputs
896 * will become negative.
897 */
898 bool abs;
899 /*@}*/
900
901 /**
902 * For each input component, says which component of the register it is
903 * chosen from. Note that which elements of the swizzle are used and which
904 * are ignored are based on the write mask for most opcodes - for example,
905 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
906 * a swizzle of {2, x, 1, 0} where x means "don't care."
907 */
908 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
909 } nir_alu_src;
910
911 typedef struct {
912 nir_dest dest;
913
914 /**
915 * \name saturate output modifier
916 *
917 * Only valid for opcodes that output floating-point numbers. Clamps the
918 * output to between 0.0 and 1.0 inclusive.
919 */
920
921 bool saturate;
922
923 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
924 } nir_alu_dest;
925
926 /** NIR sized and unsized types
927 *
928 * The values in this enum are carefully chosen so that the sized type is
929 * just the unsized type OR the number of bits.
930 */
931 typedef enum {
932 nir_type_invalid = 0, /* Not a valid type */
933 nir_type_int = 2,
934 nir_type_uint = 4,
935 nir_type_bool = 6,
936 nir_type_float = 128,
937 nir_type_bool1 = 1 | nir_type_bool,
938 nir_type_bool8 = 8 | nir_type_bool,
939 nir_type_bool16 = 16 | nir_type_bool,
940 nir_type_bool32 = 32 | nir_type_bool,
941 nir_type_int1 = 1 | nir_type_int,
942 nir_type_int8 = 8 | nir_type_int,
943 nir_type_int16 = 16 | nir_type_int,
944 nir_type_int32 = 32 | nir_type_int,
945 nir_type_int64 = 64 | nir_type_int,
946 nir_type_uint1 = 1 | nir_type_uint,
947 nir_type_uint8 = 8 | nir_type_uint,
948 nir_type_uint16 = 16 | nir_type_uint,
949 nir_type_uint32 = 32 | nir_type_uint,
950 nir_type_uint64 = 64 | nir_type_uint,
951 nir_type_float16 = 16 | nir_type_float,
952 nir_type_float32 = 32 | nir_type_float,
953 nir_type_float64 = 64 | nir_type_float,
954 } nir_alu_type;
955
956 #define NIR_ALU_TYPE_SIZE_MASK 0x79
957 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
958
959 static inline unsigned
960 nir_alu_type_get_type_size(nir_alu_type type)
961 {
962 return type & NIR_ALU_TYPE_SIZE_MASK;
963 }
964
965 static inline unsigned
966 nir_alu_type_get_base_type(nir_alu_type type)
967 {
968 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
969 }
970
971 static inline nir_alu_type
972 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
973 {
974 switch (base_type) {
975 case GLSL_TYPE_BOOL:
976 return nir_type_bool1;
977 break;
978 case GLSL_TYPE_UINT:
979 return nir_type_uint32;
980 break;
981 case GLSL_TYPE_INT:
982 return nir_type_int32;
983 break;
984 case GLSL_TYPE_UINT16:
985 return nir_type_uint16;
986 break;
987 case GLSL_TYPE_INT16:
988 return nir_type_int16;
989 break;
990 case GLSL_TYPE_UINT8:
991 return nir_type_uint8;
992 case GLSL_TYPE_INT8:
993 return nir_type_int8;
994 case GLSL_TYPE_UINT64:
995 return nir_type_uint64;
996 break;
997 case GLSL_TYPE_INT64:
998 return nir_type_int64;
999 break;
1000 case GLSL_TYPE_FLOAT:
1001 return nir_type_float32;
1002 break;
1003 case GLSL_TYPE_FLOAT16:
1004 return nir_type_float16;
1005 break;
1006 case GLSL_TYPE_DOUBLE:
1007 return nir_type_float64;
1008 break;
1009
1010 case GLSL_TYPE_SAMPLER:
1011 case GLSL_TYPE_IMAGE:
1012 case GLSL_TYPE_ATOMIC_UINT:
1013 case GLSL_TYPE_STRUCT:
1014 case GLSL_TYPE_INTERFACE:
1015 case GLSL_TYPE_ARRAY:
1016 case GLSL_TYPE_VOID:
1017 case GLSL_TYPE_SUBROUTINE:
1018 case GLSL_TYPE_FUNCTION:
1019 case GLSL_TYPE_ERROR:
1020 return nir_type_invalid;
1021 }
1022
1023 unreachable("unknown type");
1024 }
1025
1026 static inline nir_alu_type
1027 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1028 {
1029 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1030 }
1031
1032 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1033 nir_rounding_mode rnd);
1034
1035 static inline nir_op
1036 nir_op_vec(unsigned components)
1037 {
1038 switch (components) {
1039 case 1: return nir_op_mov;
1040 case 2: return nir_op_vec2;
1041 case 3: return nir_op_vec3;
1042 case 4: return nir_op_vec4;
1043 case 8: return nir_op_vec8;
1044 case 16: return nir_op_vec16;
1045 default: unreachable("bad component count");
1046 }
1047 }
1048
1049 static inline bool
1050 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1051 {
1052 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1053 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1054 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1055 }
1056
1057 static inline bool
1058 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1059 {
1060 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1061 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1062 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1063 }
1064
1065 static inline bool
1066 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1067 {
1068 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1069 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1070 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1071 }
1072
1073 static inline bool
1074 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1075 {
1076 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1077 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1078 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1079 }
1080
1081 static inline bool
1082 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1083 {
1084 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1085 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1086 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1087 }
1088
1089 static inline bool
1090 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1091 {
1092 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1093 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1094 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1095 }
1096
1097 static inline bool
1098 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1099 {
1100 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1101 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1102 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1103 }
1104
1105 static inline nir_rounding_mode
1106 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1107 nir_alu_type type)
1108 {
1109 if (nir_alu_type_get_base_type(type) != nir_type_float)
1110 return nir_rounding_mode_undef;
1111
1112 unsigned bit_size = nir_alu_type_get_type_size(type);
1113
1114 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1115 return nir_rounding_mode_rtz;
1116 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1117 return nir_rounding_mode_rtne;
1118 return nir_rounding_mode_undef;
1119 }
1120
1121 static inline bool
1122 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1123 {
1124 bool result =
1125 nir_has_any_rounding_mode_rtne(execution_mode) ||
1126 nir_has_any_rounding_mode_rtz(execution_mode);
1127 return result;
1128 }
1129
1130 typedef enum {
1131 /**
1132 * Operation where the first two sources are commutative.
1133 *
1134 * For 2-source operations, this just mathematical commutativity. Some
1135 * 3-source operations, like ffma, are only commutative in the first two
1136 * sources.
1137 */
1138 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1139 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1140 } nir_op_algebraic_property;
1141
1142 typedef struct {
1143 const char *name;
1144
1145 unsigned num_inputs;
1146
1147 /**
1148 * The number of components in the output
1149 *
1150 * If non-zero, this is the size of the output and input sizes are
1151 * explicitly given; swizzle and writemask are still in effect, but if
1152 * the output component is masked out, then the input component may
1153 * still be in use.
1154 *
1155 * If zero, the opcode acts in the standard, per-component manner; the
1156 * operation is performed on each component (except the ones that are
1157 * masked out) with the input being taken from the input swizzle for
1158 * that component.
1159 *
1160 * The size of some of the inputs may be given (i.e. non-zero) even
1161 * though output_size is zero; in that case, the inputs with a zero
1162 * size act per-component, while the inputs with non-zero size don't.
1163 */
1164 unsigned output_size;
1165
1166 /**
1167 * The type of vector that the instruction outputs. Note that the
1168 * staurate modifier is only allowed on outputs with the float type.
1169 */
1170
1171 nir_alu_type output_type;
1172
1173 /**
1174 * The number of components in each input
1175 */
1176 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1177
1178 /**
1179 * The type of vector that each input takes. Note that negate and
1180 * absolute value are only allowed on inputs with int or float type and
1181 * behave differently on the two.
1182 */
1183 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1184
1185 nir_op_algebraic_property algebraic_properties;
1186
1187 /* Whether this represents a numeric conversion opcode */
1188 bool is_conversion;
1189 } nir_op_info;
1190
1191 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1192
1193 typedef struct nir_alu_instr {
1194 nir_instr instr;
1195 nir_op op;
1196
1197 /** Indicates that this ALU instruction generates an exact value
1198 *
1199 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1200 * really equivalent to either. This indicates that the value generated by
1201 * this operation is high-precision and any code transformations that touch
1202 * it must ensure that the resulting value is bit-for-bit identical to the
1203 * original.
1204 */
1205 bool exact:1;
1206
1207 /**
1208 * Indicates that this instruction do not cause wrapping to occur, in the
1209 * form of overflow or underflow.
1210 */
1211 bool no_signed_wrap:1;
1212 bool no_unsigned_wrap:1;
1213
1214 nir_alu_dest dest;
1215 nir_alu_src src[];
1216 } nir_alu_instr;
1217
1218 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1219 nir_alu_instr *instr);
1220 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1221 nir_alu_instr *instr);
1222
1223 /* is this source channel used? */
1224 static inline bool
1225 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1226 unsigned channel)
1227 {
1228 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1229 return channel < nir_op_infos[instr->op].input_sizes[src];
1230
1231 return (instr->dest.write_mask >> channel) & 1;
1232 }
1233
1234 static inline nir_component_mask_t
1235 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1236 {
1237 nir_component_mask_t read_mask = 0;
1238 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1239 if (!nir_alu_instr_channel_used(instr, src, c))
1240 continue;
1241
1242 read_mask |= (1 << instr->src[src].swizzle[c]);
1243 }
1244 return read_mask;
1245 }
1246
1247 /**
1248 * Get the number of channels used for a source
1249 */
1250 static inline unsigned
1251 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1252 {
1253 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1254 return nir_op_infos[instr->op].input_sizes[src];
1255
1256 return nir_dest_num_components(instr->dest.dest);
1257 }
1258
1259 static inline bool
1260 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1261 {
1262 switch (instr->op) {
1263 case nir_op_flt:
1264 case nir_op_fge:
1265 case nir_op_feq:
1266 case nir_op_fne:
1267 case nir_op_ilt:
1268 case nir_op_ult:
1269 case nir_op_ige:
1270 case nir_op_uge:
1271 case nir_op_ieq:
1272 case nir_op_ine:
1273 case nir_op_i2b1:
1274 case nir_op_f2b1:
1275 case nir_op_inot:
1276 return true;
1277 default:
1278 return false;
1279 }
1280 }
1281
1282 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1283 nir_alu_type full_type);
1284
1285 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1286 unsigned src1, unsigned src2);
1287
1288 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1289 const nir_alu_instr *alu2,
1290 unsigned src1, unsigned src2);
1291
1292 typedef enum {
1293 nir_deref_type_var,
1294 nir_deref_type_array,
1295 nir_deref_type_array_wildcard,
1296 nir_deref_type_ptr_as_array,
1297 nir_deref_type_struct,
1298 nir_deref_type_cast,
1299 } nir_deref_type;
1300
1301 typedef struct {
1302 nir_instr instr;
1303
1304 /** The type of this deref instruction */
1305 nir_deref_type deref_type;
1306
1307 /** The mode of the underlying variable */
1308 nir_variable_mode mode;
1309
1310 /** The dereferenced type of the resulting pointer value */
1311 const struct glsl_type *type;
1312
1313 union {
1314 /** Variable being dereferenced if deref_type is a deref_var */
1315 nir_variable *var;
1316
1317 /** Parent deref if deref_type is not deref_var */
1318 nir_src parent;
1319 };
1320
1321 /** Additional deref parameters */
1322 union {
1323 struct {
1324 nir_src index;
1325 } arr;
1326
1327 struct {
1328 unsigned index;
1329 } strct;
1330
1331 struct {
1332 unsigned ptr_stride;
1333 } cast;
1334 };
1335
1336 /** Destination to store the resulting "pointer" */
1337 nir_dest dest;
1338 } nir_deref_instr;
1339
1340 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1341
1342 static inline nir_deref_instr *
1343 nir_deref_instr_parent(const nir_deref_instr *instr)
1344 {
1345 if (instr->deref_type == nir_deref_type_var)
1346 return NULL;
1347 else
1348 return nir_src_as_deref(instr->parent);
1349 }
1350
1351 static inline nir_variable *
1352 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1353 {
1354 while (instr->deref_type != nir_deref_type_var) {
1355 if (instr->deref_type == nir_deref_type_cast)
1356 return NULL;
1357
1358 instr = nir_deref_instr_parent(instr);
1359 }
1360
1361 return instr->var;
1362 }
1363
1364 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1365 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1366 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1367
1368 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1369
1370 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1371
1372 typedef struct {
1373 nir_instr instr;
1374
1375 struct nir_function *callee;
1376
1377 unsigned num_params;
1378 nir_src params[];
1379 } nir_call_instr;
1380
1381 #include "nir_intrinsics.h"
1382
1383 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1384
1385 /** Represents an intrinsic
1386 *
1387 * An intrinsic is an instruction type for handling things that are
1388 * more-or-less regular operations but don't just consume and produce SSA
1389 * values like ALU operations do. Intrinsics are not for things that have
1390 * special semantic meaning such as phi nodes and parallel copies.
1391 * Examples of intrinsics include variable load/store operations, system
1392 * value loads, and the like. Even though texturing more-or-less falls
1393 * under this category, texturing is its own instruction type because
1394 * trying to represent texturing with intrinsics would lead to a
1395 * combinatorial explosion of intrinsic opcodes.
1396 *
1397 * By having a single instruction type for handling a lot of different
1398 * cases, optimization passes can look for intrinsics and, for the most
1399 * part, completely ignore them. Each intrinsic type also has a few
1400 * possible flags that govern whether or not they can be reordered or
1401 * eliminated. That way passes like dead code elimination can still work
1402 * on intrisics without understanding the meaning of each.
1403 *
1404 * Each intrinsic has some number of constant indices, some number of
1405 * variables, and some number of sources. What these sources, variables,
1406 * and indices mean depends on the intrinsic and is documented with the
1407 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1408 * instructions are the only types of instruction that can operate on
1409 * variables.
1410 */
1411 typedef struct {
1412 nir_instr instr;
1413
1414 nir_intrinsic_op intrinsic;
1415
1416 nir_dest dest;
1417
1418 /** number of components if this is a vectorized intrinsic
1419 *
1420 * Similarly to ALU operations, some intrinsics are vectorized.
1421 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1422 * For vectorized intrinsics, the num_components field specifies the
1423 * number of destination components and the number of source components
1424 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1425 */
1426 uint8_t num_components;
1427
1428 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1429
1430 nir_src src[];
1431 } nir_intrinsic_instr;
1432
1433 static inline nir_variable *
1434 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1435 {
1436 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1437 }
1438
1439 typedef enum {
1440 /* Memory ordering. */
1441 NIR_MEMORY_ACQUIRE = 1 << 0,
1442 NIR_MEMORY_RELEASE = 1 << 1,
1443
1444 /* Memory visibility operations. */
1445 NIR_MEMORY_MAKE_AVAILABLE = 1 << 3,
1446 NIR_MEMORY_MAKE_VISIBLE = 1 << 4,
1447 } nir_memory_semantics;
1448
1449 typedef enum {
1450 NIR_SCOPE_DEVICE,
1451 NIR_SCOPE_QUEUE_FAMILY,
1452 NIR_SCOPE_WORKGROUP,
1453 NIR_SCOPE_SUBGROUP,
1454 NIR_SCOPE_INVOCATION,
1455 } nir_scope;
1456
1457 /**
1458 * \name NIR intrinsics semantic flags
1459 *
1460 * information about what the compiler can do with the intrinsics.
1461 *
1462 * \sa nir_intrinsic_info::flags
1463 */
1464 typedef enum {
1465 /**
1466 * whether the intrinsic can be safely eliminated if none of its output
1467 * value is not being used.
1468 */
1469 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1470
1471 /**
1472 * Whether the intrinsic can be reordered with respect to any other
1473 * intrinsic, i.e. whether the only reordering dependencies of the
1474 * intrinsic are due to the register reads/writes.
1475 */
1476 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1477 } nir_intrinsic_semantic_flag;
1478
1479 /**
1480 * \name NIR intrinsics const-index flag
1481 *
1482 * Indicates the usage of a const_index slot.
1483 *
1484 * \sa nir_intrinsic_info::index_map
1485 */
1486 typedef enum {
1487 /**
1488 * Generally instructions that take a offset src argument, can encode
1489 * a constant 'base' value which is added to the offset.
1490 */
1491 NIR_INTRINSIC_BASE = 1,
1492
1493 /**
1494 * For store instructions, a writemask for the store.
1495 */
1496 NIR_INTRINSIC_WRMASK,
1497
1498 /**
1499 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1500 */
1501 NIR_INTRINSIC_STREAM_ID,
1502
1503 /**
1504 * The clip-plane id for load_user_clip_plane intrinsic.
1505 */
1506 NIR_INTRINSIC_UCP_ID,
1507
1508 /**
1509 * The amount of data, starting from BASE, that this instruction may
1510 * access. This is used to provide bounds if the offset is not constant.
1511 */
1512 NIR_INTRINSIC_RANGE,
1513
1514 /**
1515 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1516 */
1517 NIR_INTRINSIC_DESC_SET,
1518
1519 /**
1520 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1521 */
1522 NIR_INTRINSIC_BINDING,
1523
1524 /**
1525 * Component offset.
1526 */
1527 NIR_INTRINSIC_COMPONENT,
1528
1529 /**
1530 * Interpolation mode (only meaningful for FS inputs).
1531 */
1532 NIR_INTRINSIC_INTERP_MODE,
1533
1534 /**
1535 * A binary nir_op to use when performing a reduction or scan operation
1536 */
1537 NIR_INTRINSIC_REDUCTION_OP,
1538
1539 /**
1540 * Cluster size for reduction operations
1541 */
1542 NIR_INTRINSIC_CLUSTER_SIZE,
1543
1544 /**
1545 * Parameter index for a load_param intrinsic
1546 */
1547 NIR_INTRINSIC_PARAM_IDX,
1548
1549 /**
1550 * Image dimensionality for image intrinsics
1551 *
1552 * One of GLSL_SAMPLER_DIM_*
1553 */
1554 NIR_INTRINSIC_IMAGE_DIM,
1555
1556 /**
1557 * Non-zero if we are accessing an array image
1558 */
1559 NIR_INTRINSIC_IMAGE_ARRAY,
1560
1561 /**
1562 * Image format for image intrinsics
1563 */
1564 NIR_INTRINSIC_FORMAT,
1565
1566 /**
1567 * Access qualifiers for image and memory access intrinsics
1568 */
1569 NIR_INTRINSIC_ACCESS,
1570
1571 /**
1572 * Alignment for offsets and addresses
1573 *
1574 * These two parameters, specify an alignment in terms of a multiplier and
1575 * an offset. The offset or address parameter X of the intrinsic is
1576 * guaranteed to satisfy the following:
1577 *
1578 * (X - align_offset) % align_mul == 0
1579 */
1580 NIR_INTRINSIC_ALIGN_MUL,
1581 NIR_INTRINSIC_ALIGN_OFFSET,
1582
1583 /**
1584 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1585 */
1586 NIR_INTRINSIC_DESC_TYPE,
1587
1588 /**
1589 * The nir_alu_type of a uniform/input/output
1590 */
1591 NIR_INTRINSIC_TYPE,
1592
1593 /**
1594 * The swizzle mask for the instructions
1595 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1596 */
1597 NIR_INTRINSIC_SWIZZLE_MASK,
1598
1599 /* Separate source/dest access flags for copies */
1600 NIR_INTRINSIC_SRC_ACCESS,
1601 NIR_INTRINSIC_DST_ACCESS,
1602
1603 /* Driver location for nir_load_patch_location_ir3 */
1604 NIR_INTRINSIC_DRIVER_LOCATION,
1605
1606 /**
1607 * Mask of nir_memory_semantics, includes ordering and visibility.
1608 */
1609 NIR_INTRINSIC_MEMORY_SEMANTICS,
1610
1611 /**
1612 * Mask of nir_variable_modes affected by the memory operation.
1613 */
1614 NIR_INTRINSIC_MEMORY_MODES,
1615
1616 /**
1617 * Value of nir_scope.
1618 */
1619 NIR_INTRINSIC_MEMORY_SCOPE,
1620
1621 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1622
1623 } nir_intrinsic_index_flag;
1624
1625 #define NIR_INTRINSIC_MAX_INPUTS 5
1626
1627 typedef struct {
1628 const char *name;
1629
1630 unsigned num_srcs; /** < number of register/SSA inputs */
1631
1632 /** number of components of each input register
1633 *
1634 * If this value is 0, the number of components is given by the
1635 * num_components field of nir_intrinsic_instr. If this value is -1, the
1636 * intrinsic consumes however many components are provided and it is not
1637 * validated at all.
1638 */
1639 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1640
1641 bool has_dest;
1642
1643 /** number of components of the output register
1644 *
1645 * If this value is 0, the number of components is given by the
1646 * num_components field of nir_intrinsic_instr.
1647 */
1648 unsigned dest_components;
1649
1650 /** bitfield of legal bit sizes */
1651 unsigned dest_bit_sizes;
1652
1653 /** the number of constant indices used by the intrinsic */
1654 unsigned num_indices;
1655
1656 /** indicates the usage of intr->const_index[n] */
1657 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1658
1659 /** semantic flags for calls to this intrinsic */
1660 nir_intrinsic_semantic_flag flags;
1661 } nir_intrinsic_info;
1662
1663 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1664
1665 static inline unsigned
1666 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1667 {
1668 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1669 assert(srcn < info->num_srcs);
1670 if (info->src_components[srcn] > 0)
1671 return info->src_components[srcn];
1672 else if (info->src_components[srcn] == 0)
1673 return intr->num_components;
1674 else
1675 return nir_src_num_components(intr->src[srcn]);
1676 }
1677
1678 static inline unsigned
1679 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1680 {
1681 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1682 if (!info->has_dest)
1683 return 0;
1684 else if (info->dest_components)
1685 return info->dest_components;
1686 else
1687 return intr->num_components;
1688 }
1689
1690 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1691 static inline type \
1692 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1693 { \
1694 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1695 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1696 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1697 } \
1698 static inline void \
1699 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1700 { \
1701 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1702 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1703 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1704 }
1705
1706 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1707 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1708 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1709 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1710 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1711 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1712 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1713 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1714 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1715 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1716 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1717 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1718 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1719 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1720 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1721 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1722 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1723 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1724 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1725 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1726 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1727 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1728 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1729 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1730 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1731 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1732 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1733
1734 static inline void
1735 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1736 unsigned align_mul, unsigned align_offset)
1737 {
1738 assert(util_is_power_of_two_nonzero(align_mul));
1739 assert(align_offset < align_mul);
1740 nir_intrinsic_set_align_mul(intrin, align_mul);
1741 nir_intrinsic_set_align_offset(intrin, align_offset);
1742 }
1743
1744 /** Returns a simple alignment for a load/store intrinsic offset
1745 *
1746 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1747 * and ALIGN_OFFSET parameters, this helper takes both into account and
1748 * provides a single simple alignment parameter. The offset X is guaranteed
1749 * to satisfy X % align == 0.
1750 */
1751 static inline unsigned
1752 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1753 {
1754 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1755 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1756 assert(align_offset < align_mul);
1757 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1758 }
1759
1760 /* Converts a image_deref_* intrinsic into a image_* one */
1761 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1762 nir_ssa_def *handle, bool bindless);
1763
1764 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1765 static inline bool
1766 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1767 {
1768 if (instr->intrinsic == nir_intrinsic_load_deref ||
1769 instr->intrinsic == nir_intrinsic_load_ssbo ||
1770 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1771 instr->intrinsic == nir_intrinsic_image_deref_load ||
1772 instr->intrinsic == nir_intrinsic_image_load) {
1773 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1774 } else {
1775 const nir_intrinsic_info *info =
1776 &nir_intrinsic_infos[instr->intrinsic];
1777 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1778 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1779 }
1780 }
1781
1782 /**
1783 * \group texture information
1784 *
1785 * This gives semantic information about textures which is useful to the
1786 * frontend, the backend, and lowering passes, but not the optimizer.
1787 */
1788
1789 typedef enum {
1790 nir_tex_src_coord,
1791 nir_tex_src_projector,
1792 nir_tex_src_comparator, /* shadow comparator */
1793 nir_tex_src_offset,
1794 nir_tex_src_bias,
1795 nir_tex_src_lod,
1796 nir_tex_src_min_lod,
1797 nir_tex_src_ms_index, /* MSAA sample index */
1798 nir_tex_src_ms_mcs, /* MSAA compression value */
1799 nir_tex_src_ddx,
1800 nir_tex_src_ddy,
1801 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1802 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1803 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1804 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1805 nir_tex_src_texture_handle, /* < bindless texture handle */
1806 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1807 nir_tex_src_plane, /* < selects plane for planar textures */
1808 nir_num_tex_src_types
1809 } nir_tex_src_type;
1810
1811 typedef struct {
1812 nir_src src;
1813 nir_tex_src_type src_type;
1814 } nir_tex_src;
1815
1816 typedef enum {
1817 nir_texop_tex, /**< Regular texture look-up */
1818 nir_texop_txb, /**< Texture look-up with LOD bias */
1819 nir_texop_txl, /**< Texture look-up with explicit LOD */
1820 nir_texop_txd, /**< Texture look-up with partial derivatives */
1821 nir_texop_txf, /**< Texel fetch with explicit LOD */
1822 nir_texop_txf_ms, /**< Multisample texture fetch */
1823 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1824 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1825 nir_texop_txs, /**< Texture size */
1826 nir_texop_lod, /**< Texture lod query */
1827 nir_texop_tg4, /**< Texture gather */
1828 nir_texop_query_levels, /**< Texture levels query */
1829 nir_texop_texture_samples, /**< Texture samples query */
1830 nir_texop_samples_identical, /**< Query whether all samples are definitely
1831 * identical.
1832 */
1833 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1834 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1835 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1836 } nir_texop;
1837
1838 typedef struct {
1839 nir_instr instr;
1840
1841 enum glsl_sampler_dim sampler_dim;
1842 nir_alu_type dest_type;
1843
1844 nir_texop op;
1845 nir_dest dest;
1846 nir_tex_src *src;
1847 unsigned num_srcs, coord_components;
1848 bool is_array, is_shadow;
1849
1850 /**
1851 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1852 * components or the new-style shadow that outputs 1 component.
1853 */
1854 bool is_new_style_shadow;
1855
1856 /* gather component selector */
1857 unsigned component : 2;
1858
1859 /* gather offsets */
1860 int8_t tg4_offsets[4][2];
1861
1862 /* True if the texture index or handle is not dynamically uniform */
1863 bool texture_non_uniform;
1864
1865 /* True if the sampler index or handle is not dynamically uniform */
1866 bool sampler_non_uniform;
1867
1868 /** The texture index
1869 *
1870 * If this texture instruction has a nir_tex_src_texture_offset source,
1871 * then the texture index is given by texture_index + texture_offset.
1872 */
1873 unsigned texture_index;
1874
1875 /** The size of the texture array or 0 if it's not an array */
1876 unsigned texture_array_size;
1877
1878 /** The sampler index
1879 *
1880 * The following operations do not require a sampler and, as such, this
1881 * field should be ignored:
1882 * - nir_texop_txf
1883 * - nir_texop_txf_ms
1884 * - nir_texop_txs
1885 * - nir_texop_lod
1886 * - nir_texop_query_levels
1887 * - nir_texop_texture_samples
1888 * - nir_texop_samples_identical
1889 *
1890 * If this texture instruction has a nir_tex_src_sampler_offset source,
1891 * then the sampler index is given by sampler_index + sampler_offset.
1892 */
1893 unsigned sampler_index;
1894 } nir_tex_instr;
1895
1896 static inline unsigned
1897 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1898 {
1899 switch (instr->op) {
1900 case nir_texop_txs: {
1901 unsigned ret;
1902 switch (instr->sampler_dim) {
1903 case GLSL_SAMPLER_DIM_1D:
1904 case GLSL_SAMPLER_DIM_BUF:
1905 ret = 1;
1906 break;
1907 case GLSL_SAMPLER_DIM_2D:
1908 case GLSL_SAMPLER_DIM_CUBE:
1909 case GLSL_SAMPLER_DIM_MS:
1910 case GLSL_SAMPLER_DIM_RECT:
1911 case GLSL_SAMPLER_DIM_EXTERNAL:
1912 case GLSL_SAMPLER_DIM_SUBPASS:
1913 ret = 2;
1914 break;
1915 case GLSL_SAMPLER_DIM_3D:
1916 ret = 3;
1917 break;
1918 default:
1919 unreachable("not reached");
1920 }
1921 if (instr->is_array)
1922 ret++;
1923 return ret;
1924 }
1925
1926 case nir_texop_lod:
1927 return 2;
1928
1929 case nir_texop_texture_samples:
1930 case nir_texop_query_levels:
1931 case nir_texop_samples_identical:
1932 case nir_texop_fragment_mask_fetch:
1933 return 1;
1934
1935 default:
1936 if (instr->is_shadow && instr->is_new_style_shadow)
1937 return 1;
1938
1939 return 4;
1940 }
1941 }
1942
1943 /* Returns true if this texture operation queries something about the texture
1944 * rather than actually sampling it.
1945 */
1946 static inline bool
1947 nir_tex_instr_is_query(const nir_tex_instr *instr)
1948 {
1949 switch (instr->op) {
1950 case nir_texop_txs:
1951 case nir_texop_lod:
1952 case nir_texop_texture_samples:
1953 case nir_texop_query_levels:
1954 case nir_texop_txf_ms_mcs:
1955 return true;
1956 case nir_texop_tex:
1957 case nir_texop_txb:
1958 case nir_texop_txl:
1959 case nir_texop_txd:
1960 case nir_texop_txf:
1961 case nir_texop_txf_ms:
1962 case nir_texop_txf_ms_fb:
1963 case nir_texop_tg4:
1964 return false;
1965 default:
1966 unreachable("Invalid texture opcode");
1967 }
1968 }
1969
1970 static inline bool
1971 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1972 {
1973 switch (instr->op) {
1974 case nir_texop_tex:
1975 case nir_texop_txb:
1976 case nir_texop_lod:
1977 return true;
1978 default:
1979 return false;
1980 }
1981 }
1982
1983 static inline nir_alu_type
1984 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1985 {
1986 switch (instr->src[src].src_type) {
1987 case nir_tex_src_coord:
1988 switch (instr->op) {
1989 case nir_texop_txf:
1990 case nir_texop_txf_ms:
1991 case nir_texop_txf_ms_fb:
1992 case nir_texop_txf_ms_mcs:
1993 case nir_texop_samples_identical:
1994 return nir_type_int;
1995
1996 default:
1997 return nir_type_float;
1998 }
1999
2000 case nir_tex_src_lod:
2001 switch (instr->op) {
2002 case nir_texop_txs:
2003 case nir_texop_txf:
2004 return nir_type_int;
2005
2006 default:
2007 return nir_type_float;
2008 }
2009
2010 case nir_tex_src_projector:
2011 case nir_tex_src_comparator:
2012 case nir_tex_src_bias:
2013 case nir_tex_src_min_lod:
2014 case nir_tex_src_ddx:
2015 case nir_tex_src_ddy:
2016 return nir_type_float;
2017
2018 case nir_tex_src_offset:
2019 case nir_tex_src_ms_index:
2020 case nir_tex_src_plane:
2021 return nir_type_int;
2022
2023 case nir_tex_src_ms_mcs:
2024 case nir_tex_src_texture_deref:
2025 case nir_tex_src_sampler_deref:
2026 case nir_tex_src_texture_offset:
2027 case nir_tex_src_sampler_offset:
2028 case nir_tex_src_texture_handle:
2029 case nir_tex_src_sampler_handle:
2030 return nir_type_uint;
2031
2032 case nir_num_tex_src_types:
2033 unreachable("nir_num_tex_src_types is not a valid source type");
2034 }
2035
2036 unreachable("Invalid texture source type");
2037 }
2038
2039 static inline unsigned
2040 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2041 {
2042 if (instr->src[src].src_type == nir_tex_src_coord)
2043 return instr->coord_components;
2044
2045 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2046 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2047 return 4;
2048
2049 if (instr->src[src].src_type == nir_tex_src_ddx ||
2050 instr->src[src].src_type == nir_tex_src_ddy) {
2051 if (instr->is_array)
2052 return instr->coord_components - 1;
2053 else
2054 return instr->coord_components;
2055 }
2056
2057 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2058 * the offset, since a cube maps to a single face.
2059 */
2060 if (instr->src[src].src_type == nir_tex_src_offset) {
2061 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2062 return 2;
2063 else if (instr->is_array)
2064 return instr->coord_components - 1;
2065 else
2066 return instr->coord_components;
2067 }
2068
2069 return 1;
2070 }
2071
2072 static inline int
2073 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2074 {
2075 for (unsigned i = 0; i < instr->num_srcs; i++)
2076 if (instr->src[i].src_type == type)
2077 return (int) i;
2078
2079 return -1;
2080 }
2081
2082 void nir_tex_instr_add_src(nir_tex_instr *tex,
2083 nir_tex_src_type src_type,
2084 nir_src src);
2085
2086 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2087
2088 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2089
2090 typedef struct {
2091 nir_instr instr;
2092
2093 nir_ssa_def def;
2094
2095 nir_const_value value[];
2096 } nir_load_const_instr;
2097
2098 typedef enum {
2099 nir_jump_return,
2100 nir_jump_break,
2101 nir_jump_continue,
2102 } nir_jump_type;
2103
2104 typedef struct {
2105 nir_instr instr;
2106 nir_jump_type type;
2107 } nir_jump_instr;
2108
2109 /* creates a new SSA variable in an undefined state */
2110
2111 typedef struct {
2112 nir_instr instr;
2113 nir_ssa_def def;
2114 } nir_ssa_undef_instr;
2115
2116 typedef struct {
2117 struct exec_node node;
2118
2119 /* The predecessor block corresponding to this source */
2120 struct nir_block *pred;
2121
2122 nir_src src;
2123 } nir_phi_src;
2124
2125 #define nir_foreach_phi_src(phi_src, phi) \
2126 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2127 #define nir_foreach_phi_src_safe(phi_src, phi) \
2128 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2129
2130 typedef struct {
2131 nir_instr instr;
2132
2133 struct exec_list srcs; /** < list of nir_phi_src */
2134
2135 nir_dest dest;
2136 } nir_phi_instr;
2137
2138 typedef struct {
2139 struct exec_node node;
2140 nir_src src;
2141 nir_dest dest;
2142 } nir_parallel_copy_entry;
2143
2144 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2145 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2146
2147 typedef struct {
2148 nir_instr instr;
2149
2150 /* A list of nir_parallel_copy_entrys. The sources of all of the
2151 * entries are copied to the corresponding destinations "in parallel".
2152 * In other words, if we have two entries: a -> b and b -> a, the values
2153 * get swapped.
2154 */
2155 struct exec_list entries;
2156 } nir_parallel_copy_instr;
2157
2158 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2159 type, nir_instr_type_alu)
2160 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2161 type, nir_instr_type_deref)
2162 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2163 type, nir_instr_type_call)
2164 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2165 type, nir_instr_type_jump)
2166 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2167 type, nir_instr_type_tex)
2168 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2169 type, nir_instr_type_intrinsic)
2170 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2171 type, nir_instr_type_load_const)
2172 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2173 type, nir_instr_type_ssa_undef)
2174 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2175 type, nir_instr_type_phi)
2176 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2177 nir_parallel_copy_instr, instr,
2178 type, nir_instr_type_parallel_copy)
2179
2180
2181 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2182 static inline type \
2183 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2184 { \
2185 assert(nir_src_is_const(src)); \
2186 nir_load_const_instr *load = \
2187 nir_instr_as_load_const(src.ssa->parent_instr); \
2188 assert(comp < load->def.num_components); \
2189 return nir_const_value_as_##suffix(load->value[comp], \
2190 load->def.bit_size); \
2191 } \
2192 \
2193 static inline type \
2194 nir_src_as_##suffix(nir_src src) \
2195 { \
2196 assert(nir_src_num_components(src) == 1); \
2197 return nir_src_comp_as_##suffix(src, 0); \
2198 }
2199
2200 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2201 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2202 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2203 NIR_DEFINE_SRC_AS_CONST(double, float)
2204
2205 #undef NIR_DEFINE_SRC_AS_CONST
2206
2207
2208 typedef struct {
2209 nir_ssa_def *def;
2210 unsigned comp;
2211 } nir_ssa_scalar;
2212
2213 static inline bool
2214 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2215 {
2216 return s.def->parent_instr->type == nir_instr_type_load_const;
2217 }
2218
2219 static inline nir_const_value
2220 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2221 {
2222 assert(s.comp < s.def->num_components);
2223 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2224 return load->value[s.comp];
2225 }
2226
2227 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2228 static inline type \
2229 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2230 { \
2231 return nir_const_value_as_##suffix( \
2232 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2233 }
2234
2235 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2236 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2237 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2238 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2239
2240 #undef NIR_DEFINE_SCALAR_AS_CONST
2241
2242 static inline bool
2243 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2244 {
2245 return s.def->parent_instr->type == nir_instr_type_alu;
2246 }
2247
2248 static inline nir_op
2249 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2250 {
2251 return nir_instr_as_alu(s.def->parent_instr)->op;
2252 }
2253
2254 static inline nir_ssa_scalar
2255 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2256 {
2257 nir_ssa_scalar out = { NULL, 0 };
2258
2259 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2260 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2261
2262 /* Our component must be written */
2263 assert(s.comp < s.def->num_components);
2264 assert(alu->dest.write_mask & (1u << s.comp));
2265
2266 assert(alu->src[alu_src_idx].src.is_ssa);
2267 out.def = alu->src[alu_src_idx].src.ssa;
2268
2269 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2270 /* The ALU src is unsized so the source component follows the
2271 * destination component.
2272 */
2273 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2274 } else {
2275 /* This is a sized source so all source components work together to
2276 * produce all the destination components. Since we need to return a
2277 * scalar, this only works if the source is a scalar.
2278 */
2279 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2280 out.comp = alu->src[alu_src_idx].swizzle[0];
2281 }
2282 assert(out.comp < out.def->num_components);
2283
2284 return out;
2285 }
2286
2287
2288 /*
2289 * Control flow
2290 *
2291 * Control flow consists of a tree of control flow nodes, which include
2292 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2293 * instructions that always run start-to-finish. Each basic block also keeps
2294 * track of its successors (blocks which may run immediately after the current
2295 * block) and predecessors (blocks which could have run immediately before the
2296 * current block). Each function also has a start block and an end block which
2297 * all return statements point to (which is always empty). Together, all the
2298 * blocks with their predecessors and successors make up the control flow
2299 * graph (CFG) of the function. There are helpers that modify the tree of
2300 * control flow nodes while modifying the CFG appropriately; these should be
2301 * used instead of modifying the tree directly.
2302 */
2303
2304 typedef enum {
2305 nir_cf_node_block,
2306 nir_cf_node_if,
2307 nir_cf_node_loop,
2308 nir_cf_node_function
2309 } nir_cf_node_type;
2310
2311 typedef struct nir_cf_node {
2312 struct exec_node node;
2313 nir_cf_node_type type;
2314 struct nir_cf_node *parent;
2315 } nir_cf_node;
2316
2317 typedef struct nir_block {
2318 nir_cf_node cf_node;
2319
2320 struct exec_list instr_list; /** < list of nir_instr */
2321
2322 /** generic block index; generated by nir_index_blocks */
2323 unsigned index;
2324
2325 /*
2326 * Each block can only have up to 2 successors, so we put them in a simple
2327 * array - no need for anything more complicated.
2328 */
2329 struct nir_block *successors[2];
2330
2331 /* Set of nir_block predecessors in the CFG */
2332 struct set *predecessors;
2333
2334 /*
2335 * this node's immediate dominator in the dominance tree - set to NULL for
2336 * the start block.
2337 */
2338 struct nir_block *imm_dom;
2339
2340 /* This node's children in the dominance tree */
2341 unsigned num_dom_children;
2342 struct nir_block **dom_children;
2343
2344 /* Set of nir_blocks on the dominance frontier of this block */
2345 struct set *dom_frontier;
2346
2347 /*
2348 * These two indices have the property that dom_{pre,post}_index for each
2349 * child of this block in the dominance tree will always be between
2350 * dom_pre_index and dom_post_index for this block, which makes testing if
2351 * a given block is dominated by another block an O(1) operation.
2352 */
2353 unsigned dom_pre_index, dom_post_index;
2354
2355 /* live in and out for this block; used for liveness analysis */
2356 BITSET_WORD *live_in;
2357 BITSET_WORD *live_out;
2358 } nir_block;
2359
2360 static inline nir_instr *
2361 nir_block_first_instr(nir_block *block)
2362 {
2363 struct exec_node *head = exec_list_get_head(&block->instr_list);
2364 return exec_node_data(nir_instr, head, node);
2365 }
2366
2367 static inline nir_instr *
2368 nir_block_last_instr(nir_block *block)
2369 {
2370 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2371 return exec_node_data(nir_instr, tail, node);
2372 }
2373
2374 static inline bool
2375 nir_block_ends_in_jump(nir_block *block)
2376 {
2377 return !exec_list_is_empty(&block->instr_list) &&
2378 nir_block_last_instr(block)->type == nir_instr_type_jump;
2379 }
2380
2381 #define nir_foreach_instr(instr, block) \
2382 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2383 #define nir_foreach_instr_reverse(instr, block) \
2384 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2385 #define nir_foreach_instr_safe(instr, block) \
2386 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2387 #define nir_foreach_instr_reverse_safe(instr, block) \
2388 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2389
2390 typedef enum {
2391 nir_selection_control_none = 0x0,
2392 nir_selection_control_flatten = 0x1,
2393 nir_selection_control_dont_flatten = 0x2,
2394 } nir_selection_control;
2395
2396 typedef struct nir_if {
2397 nir_cf_node cf_node;
2398 nir_src condition;
2399 nir_selection_control control;
2400
2401 struct exec_list then_list; /** < list of nir_cf_node */
2402 struct exec_list else_list; /** < list of nir_cf_node */
2403 } nir_if;
2404
2405 typedef struct {
2406 nir_if *nif;
2407
2408 /** Instruction that generates nif::condition. */
2409 nir_instr *conditional_instr;
2410
2411 /** Block within ::nif that has the break instruction. */
2412 nir_block *break_block;
2413
2414 /** Last block for the then- or else-path that does not contain the break. */
2415 nir_block *continue_from_block;
2416
2417 /** True when ::break_block is in the else-path of ::nif. */
2418 bool continue_from_then;
2419 bool induction_rhs;
2420
2421 /* This is true if the terminators exact trip count is unknown. For
2422 * example:
2423 *
2424 * for (int i = 0; i < imin(x, 4); i++)
2425 * ...
2426 *
2427 * Here loop analysis would have set a max_trip_count of 4 however we dont
2428 * know for sure that this is the exact trip count.
2429 */
2430 bool exact_trip_count_unknown;
2431
2432 struct list_head loop_terminator_link;
2433 } nir_loop_terminator;
2434
2435 typedef struct {
2436 /* Estimated cost (in number of instructions) of the loop */
2437 unsigned instr_cost;
2438
2439 /* Guessed trip count based on array indexing */
2440 unsigned guessed_trip_count;
2441
2442 /* Maximum number of times the loop is run (if known) */
2443 unsigned max_trip_count;
2444
2445 /* Do we know the exact number of times the loop will be run */
2446 bool exact_trip_count_known;
2447
2448 /* Unroll the loop regardless of its size */
2449 bool force_unroll;
2450
2451 /* Does the loop contain complex loop terminators, continues or other
2452 * complex behaviours? If this is true we can't rely on
2453 * loop_terminator_list to be complete or accurate.
2454 */
2455 bool complex_loop;
2456
2457 nir_loop_terminator *limiting_terminator;
2458
2459 /* A list of loop_terminators terminating this loop. */
2460 struct list_head loop_terminator_list;
2461 } nir_loop_info;
2462
2463 typedef enum {
2464 nir_loop_control_none = 0x0,
2465 nir_loop_control_unroll = 0x1,
2466 nir_loop_control_dont_unroll = 0x2,
2467 } nir_loop_control;
2468
2469 typedef struct {
2470 nir_cf_node cf_node;
2471
2472 struct exec_list body; /** < list of nir_cf_node */
2473
2474 nir_loop_info *info;
2475 nir_loop_control control;
2476 bool partially_unrolled;
2477 } nir_loop;
2478
2479 /**
2480 * Various bits of metadata that can may be created or required by
2481 * optimization and analysis passes
2482 */
2483 typedef enum {
2484 nir_metadata_none = 0x0,
2485 nir_metadata_block_index = 0x1,
2486 nir_metadata_dominance = 0x2,
2487 nir_metadata_live_ssa_defs = 0x4,
2488 nir_metadata_not_properly_reset = 0x8,
2489 nir_metadata_loop_analysis = 0x10,
2490 } nir_metadata;
2491
2492 typedef struct {
2493 nir_cf_node cf_node;
2494
2495 /** pointer to the function of which this is an implementation */
2496 struct nir_function *function;
2497
2498 struct exec_list body; /** < list of nir_cf_node */
2499
2500 nir_block *end_block;
2501
2502 /** list for all local variables in the function */
2503 struct exec_list locals;
2504
2505 /** list of local registers in the function */
2506 struct exec_list registers;
2507
2508 /** next available local register index */
2509 unsigned reg_alloc;
2510
2511 /** next available SSA value index */
2512 unsigned ssa_alloc;
2513
2514 /* total number of basic blocks, only valid when block_index_dirty = false */
2515 unsigned num_blocks;
2516
2517 nir_metadata valid_metadata;
2518 } nir_function_impl;
2519
2520 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2521 nir_start_block(nir_function_impl *impl)
2522 {
2523 return (nir_block *) impl->body.head_sentinel.next;
2524 }
2525
2526 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2527 nir_impl_last_block(nir_function_impl *impl)
2528 {
2529 return (nir_block *) impl->body.tail_sentinel.prev;
2530 }
2531
2532 static inline nir_cf_node *
2533 nir_cf_node_next(nir_cf_node *node)
2534 {
2535 struct exec_node *next = exec_node_get_next(&node->node);
2536 if (exec_node_is_tail_sentinel(next))
2537 return NULL;
2538 else
2539 return exec_node_data(nir_cf_node, next, node);
2540 }
2541
2542 static inline nir_cf_node *
2543 nir_cf_node_prev(nir_cf_node *node)
2544 {
2545 struct exec_node *prev = exec_node_get_prev(&node->node);
2546 if (exec_node_is_head_sentinel(prev))
2547 return NULL;
2548 else
2549 return exec_node_data(nir_cf_node, prev, node);
2550 }
2551
2552 static inline bool
2553 nir_cf_node_is_first(const nir_cf_node *node)
2554 {
2555 return exec_node_is_head_sentinel(node->node.prev);
2556 }
2557
2558 static inline bool
2559 nir_cf_node_is_last(const nir_cf_node *node)
2560 {
2561 return exec_node_is_tail_sentinel(node->node.next);
2562 }
2563
2564 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2565 type, nir_cf_node_block)
2566 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2567 type, nir_cf_node_if)
2568 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2569 type, nir_cf_node_loop)
2570 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2571 nir_function_impl, cf_node, type, nir_cf_node_function)
2572
2573 static inline nir_block *
2574 nir_if_first_then_block(nir_if *if_stmt)
2575 {
2576 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2577 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2578 }
2579
2580 static inline nir_block *
2581 nir_if_last_then_block(nir_if *if_stmt)
2582 {
2583 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2584 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2585 }
2586
2587 static inline nir_block *
2588 nir_if_first_else_block(nir_if *if_stmt)
2589 {
2590 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2591 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2592 }
2593
2594 static inline nir_block *
2595 nir_if_last_else_block(nir_if *if_stmt)
2596 {
2597 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2598 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2599 }
2600
2601 static inline nir_block *
2602 nir_loop_first_block(nir_loop *loop)
2603 {
2604 struct exec_node *head = exec_list_get_head(&loop->body);
2605 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2606 }
2607
2608 static inline nir_block *
2609 nir_loop_last_block(nir_loop *loop)
2610 {
2611 struct exec_node *tail = exec_list_get_tail(&loop->body);
2612 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2613 }
2614
2615 /**
2616 * Return true if this list of cf_nodes contains a single empty block.
2617 */
2618 static inline bool
2619 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2620 {
2621 if (exec_list_is_singular(cf_list)) {
2622 struct exec_node *head = exec_list_get_head(cf_list);
2623 nir_block *block =
2624 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2625 return exec_list_is_empty(&block->instr_list);
2626 }
2627 return false;
2628 }
2629
2630 typedef struct {
2631 uint8_t num_components;
2632 uint8_t bit_size;
2633 } nir_parameter;
2634
2635 typedef struct nir_function {
2636 struct exec_node node;
2637
2638 const char *name;
2639 struct nir_shader *shader;
2640
2641 unsigned num_params;
2642 nir_parameter *params;
2643
2644 /** The implementation of this function.
2645 *
2646 * If the function is only declared and not implemented, this is NULL.
2647 */
2648 nir_function_impl *impl;
2649
2650 bool is_entrypoint;
2651 } nir_function;
2652
2653 typedef enum {
2654 nir_lower_imul64 = (1 << 0),
2655 nir_lower_isign64 = (1 << 1),
2656 /** Lower all int64 modulus and division opcodes */
2657 nir_lower_divmod64 = (1 << 2),
2658 /** Lower all 64-bit umul_high and imul_high opcodes */
2659 nir_lower_imul_high64 = (1 << 3),
2660 nir_lower_mov64 = (1 << 4),
2661 nir_lower_icmp64 = (1 << 5),
2662 nir_lower_iadd64 = (1 << 6),
2663 nir_lower_iabs64 = (1 << 7),
2664 nir_lower_ineg64 = (1 << 8),
2665 nir_lower_logic64 = (1 << 9),
2666 nir_lower_minmax64 = (1 << 10),
2667 nir_lower_shift64 = (1 << 11),
2668 nir_lower_imul_2x32_64 = (1 << 12),
2669 nir_lower_extract64 = (1 << 13),
2670 nir_lower_ufind_msb64 = (1 << 14),
2671 } nir_lower_int64_options;
2672
2673 typedef enum {
2674 nir_lower_drcp = (1 << 0),
2675 nir_lower_dsqrt = (1 << 1),
2676 nir_lower_drsq = (1 << 2),
2677 nir_lower_dtrunc = (1 << 3),
2678 nir_lower_dfloor = (1 << 4),
2679 nir_lower_dceil = (1 << 5),
2680 nir_lower_dfract = (1 << 6),
2681 nir_lower_dround_even = (1 << 7),
2682 nir_lower_dmod = (1 << 8),
2683 nir_lower_dsub = (1 << 9),
2684 nir_lower_ddiv = (1 << 10),
2685 nir_lower_fp64_full_software = (1 << 11),
2686 } nir_lower_doubles_options;
2687
2688 typedef enum {
2689 nir_divergence_single_prim_per_subgroup = (1 << 0),
2690 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2691 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2692 nir_divergence_view_index_uniform = (1 << 3),
2693 } nir_divergence_options;
2694
2695 typedef struct nir_shader_compiler_options {
2696 bool lower_fdiv;
2697 bool lower_ffma;
2698 bool fuse_ffma;
2699 bool lower_flrp16;
2700 bool lower_flrp32;
2701 /** Lowers flrp when it does not support doubles */
2702 bool lower_flrp64;
2703 bool lower_fpow;
2704 bool lower_fsat;
2705 bool lower_fsqrt;
2706 bool lower_sincos;
2707 bool lower_fmod;
2708 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2709 bool lower_bitfield_extract;
2710 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2711 bool lower_bitfield_extract_to_shifts;
2712 /** Lowers bitfield_insert to bfi/bfm */
2713 bool lower_bitfield_insert;
2714 /** Lowers bitfield_insert to compares, and shifts. */
2715 bool lower_bitfield_insert_to_shifts;
2716 /** Lowers bitfield_insert to bfm/bitfield_select. */
2717 bool lower_bitfield_insert_to_bitfield_select;
2718 /** Lowers bitfield_reverse to shifts. */
2719 bool lower_bitfield_reverse;
2720 /** Lowers bit_count to shifts. */
2721 bool lower_bit_count;
2722 /** Lowers ifind_msb to compare and ufind_msb */
2723 bool lower_ifind_msb;
2724 /** Lowers find_lsb to ufind_msb and logic ops */
2725 bool lower_find_lsb;
2726 bool lower_uadd_carry;
2727 bool lower_usub_borrow;
2728 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2729 bool lower_mul_high;
2730 /** lowers fneg and ineg to fsub and isub. */
2731 bool lower_negate;
2732 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2733 bool lower_sub;
2734
2735 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2736 bool lower_scmp;
2737
2738 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2739 bool lower_vector_cmp;
2740
2741 /** enables rules to lower idiv by power-of-two: */
2742 bool lower_idiv;
2743
2744 /** enable rules to avoid bit ops */
2745 bool lower_bitops;
2746
2747 /** enables rules to lower isign to imin+imax */
2748 bool lower_isign;
2749
2750 /** enables rules to lower fsign to fsub and flt */
2751 bool lower_fsign;
2752
2753 /* lower fdph to fdot4 */
2754 bool lower_fdph;
2755
2756 /** lower fdot to fmul and fsum/fadd. */
2757 bool lower_fdot;
2758
2759 /* Does the native fdot instruction replicate its result for four
2760 * components? If so, then opt_algebraic_late will turn all fdotN
2761 * instructions into fdot_replicatedN instructions.
2762 */
2763 bool fdot_replicates;
2764
2765 /** lowers ffloor to fsub+ffract: */
2766 bool lower_ffloor;
2767
2768 /** lowers ffract to fsub+ffloor: */
2769 bool lower_ffract;
2770
2771 /** lowers fceil to fneg+ffloor+fneg: */
2772 bool lower_fceil;
2773
2774 bool lower_ftrunc;
2775
2776 bool lower_ldexp;
2777
2778 bool lower_pack_half_2x16;
2779 bool lower_pack_half_2x16_split;
2780 bool lower_pack_unorm_2x16;
2781 bool lower_pack_snorm_2x16;
2782 bool lower_pack_unorm_4x8;
2783 bool lower_pack_snorm_4x8;
2784 bool lower_unpack_half_2x16;
2785 bool lower_unpack_half_2x16_split;
2786 bool lower_unpack_unorm_2x16;
2787 bool lower_unpack_snorm_2x16;
2788 bool lower_unpack_unorm_4x8;
2789 bool lower_unpack_snorm_4x8;
2790
2791 bool lower_extract_byte;
2792 bool lower_extract_word;
2793
2794 bool lower_all_io_to_temps;
2795 bool lower_all_io_to_elements;
2796
2797 /* Indicates that the driver only has zero-based vertex id */
2798 bool vertex_id_zero_based;
2799
2800 /**
2801 * If enabled, gl_BaseVertex will be lowered as:
2802 * is_indexed_draw (~0/0) & firstvertex
2803 */
2804 bool lower_base_vertex;
2805
2806 /**
2807 * If enabled, gl_HelperInvocation will be lowered as:
2808 *
2809 * !((1 << sample_id) & sample_mask_in))
2810 *
2811 * This depends on some possibly hw implementation details, which may
2812 * not be true for all hw. In particular that the FS is only executed
2813 * for covered samples or for helper invocations. So, do not blindly
2814 * enable this option.
2815 *
2816 * Note: See also issue #22 in ARB_shader_image_load_store
2817 */
2818 bool lower_helper_invocation;
2819
2820 /**
2821 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2822 *
2823 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2824 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2825 */
2826 bool optimize_sample_mask_in;
2827
2828 bool lower_cs_local_index_from_id;
2829 bool lower_cs_local_id_from_index;
2830
2831 bool lower_device_index_to_zero;
2832
2833 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2834 bool lower_wpos_pntc;
2835
2836 /**
2837 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
2838 * lowered to simple arithmetic.
2839 *
2840 * If this flag is set, the lowering will be applied to all bit-sizes of
2841 * these instructions.
2842 *
2843 * \sa ::lower_hadd64
2844 */
2845 bool lower_hadd;
2846
2847 /**
2848 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
2849 * should be lowered to simple arithmetic.
2850 *
2851 * If this flag is set, the lowering will be applied to only 64-bit
2852 * versions of these instructions.
2853 *
2854 * \sa ::lower_hadd
2855 */
2856 bool lower_hadd64;
2857
2858 /**
2859 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
2860 * arithmetic.
2861 *
2862 * If this flag is set, the lowering will be applied to all bit-sizes of
2863 * these instructions.
2864 *
2865 * \sa ::lower_usub_sat64
2866 */
2867 bool lower_add_sat;
2868
2869 /**
2870 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
2871 * arithmetic.
2872 *
2873 * \sa ::lower_add_sat
2874 */
2875 bool lower_usub_sat64;
2876
2877 /**
2878 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2879 * for IO purposes and would prefer loads/stores be vectorized.
2880 */
2881 bool vectorize_io;
2882 bool lower_to_scalar;
2883
2884 /**
2885 * Should the linker unify inputs_read/outputs_written between adjacent
2886 * shader stages which are linked into a single program?
2887 */
2888 bool unify_interfaces;
2889
2890 /**
2891 * Should nir_lower_io() create load_interpolated_input intrinsics?
2892 *
2893 * If not, it generates regular load_input intrinsics and interpolation
2894 * information must be inferred from the list of input nir_variables.
2895 */
2896 bool use_interpolated_input_intrinsics;
2897
2898 /* Lowers when 32x32->64 bit multiplication is not supported */
2899 bool lower_mul_2x32_64;
2900
2901 /* Lowers when rotate instruction is not supported */
2902 bool lower_rotate;
2903
2904 /**
2905 * Backend supports imul24, and would like to use it (when possible)
2906 * for address/offset calculation. If true, driver should call
2907 * nir_lower_amul(). (If not set, amul will automatically be lowered
2908 * to imul.)
2909 */
2910 bool has_imul24;
2911
2912 /**
2913 * Is this the Intel vec4 backend?
2914 *
2915 * Used to inhibit algebraic optimizations that are known to be harmful on
2916 * the Intel vec4 backend. This is generally applicable to any
2917 * optimization that might cause more immediate values to be used in
2918 * 3-source (e.g., ffma and flrp) instructions.
2919 */
2920 bool intel_vec4;
2921
2922 unsigned max_unroll_iterations;
2923
2924 nir_lower_int64_options lower_int64_options;
2925 nir_lower_doubles_options lower_doubles_options;
2926 } nir_shader_compiler_options;
2927
2928 typedef struct nir_shader {
2929 /** list of uniforms (nir_variable) */
2930 struct exec_list uniforms;
2931
2932 /** list of inputs (nir_variable) */
2933 struct exec_list inputs;
2934
2935 /** list of outputs (nir_variable) */
2936 struct exec_list outputs;
2937
2938 /** list of shared compute variables (nir_variable) */
2939 struct exec_list shared;
2940
2941 /** Set of driver-specific options for the shader.
2942 *
2943 * The memory for the options is expected to be kept in a single static
2944 * copy by the driver.
2945 */
2946 const struct nir_shader_compiler_options *options;
2947
2948 /** Various bits of compile-time information about a given shader */
2949 struct shader_info info;
2950
2951 /** list of global variables in the shader (nir_variable) */
2952 struct exec_list globals;
2953
2954 /** list of system value variables in the shader (nir_variable) */
2955 struct exec_list system_values;
2956
2957 struct exec_list functions; /** < list of nir_function */
2958
2959 /**
2960 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2961 * access plus one
2962 */
2963 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2964
2965 /** Size in bytes of required scratch space */
2966 unsigned scratch_size;
2967
2968 /** Constant data associated with this shader.
2969 *
2970 * Constant data is loaded through load_constant intrinsics. See also
2971 * nir_opt_large_constants.
2972 */
2973 void *constant_data;
2974 unsigned constant_data_size;
2975 } nir_shader;
2976
2977 #define nir_foreach_function(func, shader) \
2978 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2979
2980 static inline nir_function_impl *
2981 nir_shader_get_entrypoint(nir_shader *shader)
2982 {
2983 nir_function *func = NULL;
2984
2985 nir_foreach_function(function, shader) {
2986 assert(func == NULL);
2987 if (function->is_entrypoint) {
2988 func = function;
2989 #ifndef NDEBUG
2990 break;
2991 #endif
2992 }
2993 }
2994
2995 if (!func)
2996 return NULL;
2997
2998 assert(func->num_params == 0);
2999 assert(func->impl);
3000 return func->impl;
3001 }
3002
3003 nir_shader *nir_shader_create(void *mem_ctx,
3004 gl_shader_stage stage,
3005 const nir_shader_compiler_options *options,
3006 shader_info *si);
3007
3008 nir_register *nir_local_reg_create(nir_function_impl *impl);
3009
3010 void nir_reg_remove(nir_register *reg);
3011
3012 /** Adds a variable to the appropriate list in nir_shader */
3013 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3014
3015 static inline void
3016 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3017 {
3018 assert(var->data.mode == nir_var_function_temp);
3019 exec_list_push_tail(&impl->locals, &var->node);
3020 }
3021
3022 /** creates a variable, sets a few defaults, and adds it to the list */
3023 nir_variable *nir_variable_create(nir_shader *shader,
3024 nir_variable_mode mode,
3025 const struct glsl_type *type,
3026 const char *name);
3027 /** creates a local variable and adds it to the list */
3028 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3029 const struct glsl_type *type,
3030 const char *name);
3031
3032 /** creates a function and adds it to the shader's list of functions */
3033 nir_function *nir_function_create(nir_shader *shader, const char *name);
3034
3035 nir_function_impl *nir_function_impl_create(nir_function *func);
3036 /** creates a function_impl that isn't tied to any particular function */
3037 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3038
3039 nir_block *nir_block_create(nir_shader *shader);
3040 nir_if *nir_if_create(nir_shader *shader);
3041 nir_loop *nir_loop_create(nir_shader *shader);
3042
3043 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3044
3045 /** requests that the given pieces of metadata be generated */
3046 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3047 /** dirties all but the preserved metadata */
3048 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3049
3050 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3051 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3052
3053 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3054 nir_deref_type deref_type);
3055
3056 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3057
3058 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3059 unsigned num_components,
3060 unsigned bit_size);
3061
3062 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3063 nir_intrinsic_op op);
3064
3065 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3066 nir_function *callee);
3067
3068 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3069
3070 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3071
3072 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3073
3074 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3075 unsigned num_components,
3076 unsigned bit_size);
3077
3078 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3079
3080 /**
3081 * NIR Cursors and Instruction Insertion API
3082 * @{
3083 *
3084 * A tiny struct representing a point to insert/extract instructions or
3085 * control flow nodes. Helps reduce the combinatorial explosion of possible
3086 * points to insert/extract.
3087 *
3088 * \sa nir_control_flow.h
3089 */
3090 typedef enum {
3091 nir_cursor_before_block,
3092 nir_cursor_after_block,
3093 nir_cursor_before_instr,
3094 nir_cursor_after_instr,
3095 } nir_cursor_option;
3096
3097 typedef struct {
3098 nir_cursor_option option;
3099 union {
3100 nir_block *block;
3101 nir_instr *instr;
3102 };
3103 } nir_cursor;
3104
3105 static inline nir_block *
3106 nir_cursor_current_block(nir_cursor cursor)
3107 {
3108 if (cursor.option == nir_cursor_before_instr ||
3109 cursor.option == nir_cursor_after_instr) {
3110 return cursor.instr->block;
3111 } else {
3112 return cursor.block;
3113 }
3114 }
3115
3116 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3117
3118 static inline nir_cursor
3119 nir_before_block(nir_block *block)
3120 {
3121 nir_cursor cursor;
3122 cursor.option = nir_cursor_before_block;
3123 cursor.block = block;
3124 return cursor;
3125 }
3126
3127 static inline nir_cursor
3128 nir_after_block(nir_block *block)
3129 {
3130 nir_cursor cursor;
3131 cursor.option = nir_cursor_after_block;
3132 cursor.block = block;
3133 return cursor;
3134 }
3135
3136 static inline nir_cursor
3137 nir_before_instr(nir_instr *instr)
3138 {
3139 nir_cursor cursor;
3140 cursor.option = nir_cursor_before_instr;
3141 cursor.instr = instr;
3142 return cursor;
3143 }
3144
3145 static inline nir_cursor
3146 nir_after_instr(nir_instr *instr)
3147 {
3148 nir_cursor cursor;
3149 cursor.option = nir_cursor_after_instr;
3150 cursor.instr = instr;
3151 return cursor;
3152 }
3153
3154 static inline nir_cursor
3155 nir_after_block_before_jump(nir_block *block)
3156 {
3157 nir_instr *last_instr = nir_block_last_instr(block);
3158 if (last_instr && last_instr->type == nir_instr_type_jump) {
3159 return nir_before_instr(last_instr);
3160 } else {
3161 return nir_after_block(block);
3162 }
3163 }
3164
3165 static inline nir_cursor
3166 nir_before_src(nir_src *src, bool is_if_condition)
3167 {
3168 if (is_if_condition) {
3169 nir_block *prev_block =
3170 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3171 assert(!nir_block_ends_in_jump(prev_block));
3172 return nir_after_block(prev_block);
3173 } else if (src->parent_instr->type == nir_instr_type_phi) {
3174 #ifndef NDEBUG
3175 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3176 bool found = false;
3177 nir_foreach_phi_src(phi_src, cond_phi) {
3178 if (phi_src->src.ssa == src->ssa) {
3179 found = true;
3180 break;
3181 }
3182 }
3183 assert(found);
3184 #endif
3185 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3186 * to have a more specific name.
3187 */
3188 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3189 return nir_after_block_before_jump(phi_src->pred);
3190 } else {
3191 return nir_before_instr(src->parent_instr);
3192 }
3193 }
3194
3195 static inline nir_cursor
3196 nir_before_cf_node(nir_cf_node *node)
3197 {
3198 if (node->type == nir_cf_node_block)
3199 return nir_before_block(nir_cf_node_as_block(node));
3200
3201 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3202 }
3203
3204 static inline nir_cursor
3205 nir_after_cf_node(nir_cf_node *node)
3206 {
3207 if (node->type == nir_cf_node_block)
3208 return nir_after_block(nir_cf_node_as_block(node));
3209
3210 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3211 }
3212
3213 static inline nir_cursor
3214 nir_after_phis(nir_block *block)
3215 {
3216 nir_foreach_instr(instr, block) {
3217 if (instr->type != nir_instr_type_phi)
3218 return nir_before_instr(instr);
3219 }
3220 return nir_after_block(block);
3221 }
3222
3223 static inline nir_cursor
3224 nir_after_cf_node_and_phis(nir_cf_node *node)
3225 {
3226 if (node->type == nir_cf_node_block)
3227 return nir_after_block(nir_cf_node_as_block(node));
3228
3229 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3230
3231 return nir_after_phis(block);
3232 }
3233
3234 static inline nir_cursor
3235 nir_before_cf_list(struct exec_list *cf_list)
3236 {
3237 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3238 exec_list_get_head(cf_list), node);
3239 return nir_before_cf_node(first_node);
3240 }
3241
3242 static inline nir_cursor
3243 nir_after_cf_list(struct exec_list *cf_list)
3244 {
3245 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3246 exec_list_get_tail(cf_list), node);
3247 return nir_after_cf_node(last_node);
3248 }
3249
3250 /**
3251 * Insert a NIR instruction at the given cursor.
3252 *
3253 * Note: This does not update the cursor.
3254 */
3255 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3256
3257 static inline void
3258 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3259 {
3260 nir_instr_insert(nir_before_instr(instr), before);
3261 }
3262
3263 static inline void
3264 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3265 {
3266 nir_instr_insert(nir_after_instr(instr), after);
3267 }
3268
3269 static inline void
3270 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3271 {
3272 nir_instr_insert(nir_before_block(block), before);
3273 }
3274
3275 static inline void
3276 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3277 {
3278 nir_instr_insert(nir_after_block(block), after);
3279 }
3280
3281 static inline void
3282 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3283 {
3284 nir_instr_insert(nir_before_cf_node(node), before);
3285 }
3286
3287 static inline void
3288 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3289 {
3290 nir_instr_insert(nir_after_cf_node(node), after);
3291 }
3292
3293 static inline void
3294 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3295 {
3296 nir_instr_insert(nir_before_cf_list(list), before);
3297 }
3298
3299 static inline void
3300 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3301 {
3302 nir_instr_insert(nir_after_cf_list(list), after);
3303 }
3304
3305 void nir_instr_remove_v(nir_instr *instr);
3306
3307 static inline nir_cursor
3308 nir_instr_remove(nir_instr *instr)
3309 {
3310 nir_cursor cursor;
3311 nir_instr *prev = nir_instr_prev(instr);
3312 if (prev) {
3313 cursor = nir_after_instr(prev);
3314 } else {
3315 cursor = nir_before_block(instr->block);
3316 }
3317 nir_instr_remove_v(instr);
3318 return cursor;
3319 }
3320
3321 /** @} */
3322
3323 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3324
3325 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3326 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3327 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3328 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3329 void *state);
3330 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3331 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3332
3333 nir_const_value *nir_src_as_const_value(nir_src src);
3334
3335 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3336 static inline c_type * \
3337 nir_src_as_ ## name (nir_src src) \
3338 { \
3339 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3340 ? cast_macro(src.ssa->parent_instr) : NULL; \
3341 }
3342
3343 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3344 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3345 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3346 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3347
3348 bool nir_src_is_dynamically_uniform(nir_src src);
3349 bool nir_srcs_equal(nir_src src1, nir_src src2);
3350 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3351 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3352 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3353 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3354 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3355 nir_dest new_dest);
3356
3357 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3358 unsigned num_components, unsigned bit_size,
3359 const char *name);
3360 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3361 unsigned num_components, unsigned bit_size,
3362 const char *name);
3363 static inline void
3364 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3365 const struct glsl_type *type,
3366 const char *name)
3367 {
3368 assert(glsl_type_is_vector_or_scalar(type));
3369 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3370 glsl_get_bit_size(type), name);
3371 }
3372 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3373 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3374 nir_instr *after_me);
3375
3376 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3377
3378 /*
3379 * finds the next basic block in source-code order, returns NULL if there is
3380 * none
3381 */
3382
3383 nir_block *nir_block_cf_tree_next(nir_block *block);
3384
3385 /* Performs the opposite of nir_block_cf_tree_next() */
3386
3387 nir_block *nir_block_cf_tree_prev(nir_block *block);
3388
3389 /* Gets the first block in a CF node in source-code order */
3390
3391 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3392
3393 /* Gets the last block in a CF node in source-code order */
3394
3395 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3396
3397 /* Gets the next block after a CF node in source-code order */
3398
3399 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3400
3401 /* Macros for loops that visit blocks in source-code order */
3402
3403 #define nir_foreach_block(block, impl) \
3404 for (nir_block *block = nir_start_block(impl); block != NULL; \
3405 block = nir_block_cf_tree_next(block))
3406
3407 #define nir_foreach_block_safe(block, impl) \
3408 for (nir_block *block = nir_start_block(impl), \
3409 *next = nir_block_cf_tree_next(block); \
3410 block != NULL; \
3411 block = next, next = nir_block_cf_tree_next(block))
3412
3413 #define nir_foreach_block_reverse(block, impl) \
3414 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3415 block = nir_block_cf_tree_prev(block))
3416
3417 #define nir_foreach_block_reverse_safe(block, impl) \
3418 for (nir_block *block = nir_impl_last_block(impl), \
3419 *prev = nir_block_cf_tree_prev(block); \
3420 block != NULL; \
3421 block = prev, prev = nir_block_cf_tree_prev(block))
3422
3423 #define nir_foreach_block_in_cf_node(block, node) \
3424 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3425 block != nir_cf_node_cf_tree_next(node); \
3426 block = nir_block_cf_tree_next(block))
3427
3428 /* If the following CF node is an if, this function returns that if.
3429 * Otherwise, it returns NULL.
3430 */
3431 nir_if *nir_block_get_following_if(nir_block *block);
3432
3433 nir_loop *nir_block_get_following_loop(nir_block *block);
3434
3435 void nir_index_local_regs(nir_function_impl *impl);
3436 void nir_index_ssa_defs(nir_function_impl *impl);
3437 unsigned nir_index_instrs(nir_function_impl *impl);
3438
3439 void nir_index_blocks(nir_function_impl *impl);
3440
3441 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3442
3443 void nir_print_shader(nir_shader *shader, FILE *fp);
3444 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3445 void nir_print_instr(const nir_instr *instr, FILE *fp);
3446 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3447
3448 /** Shallow clone of a single ALU instruction. */
3449 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3450
3451 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3452 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3453 const nir_function_impl *fi);
3454 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3455 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3456
3457 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3458
3459 void nir_shader_serialize_deserialize(nir_shader *s);
3460
3461 #ifndef NDEBUG
3462 void nir_validate_shader(nir_shader *shader, const char *when);
3463 void nir_metadata_set_validation_flag(nir_shader *shader);
3464 void nir_metadata_check_validation_flag(nir_shader *shader);
3465
3466 static inline bool
3467 should_skip_nir(const char *name)
3468 {
3469 static const char *list = NULL;
3470 if (!list) {
3471 /* Comma separated list of names to skip. */
3472 list = getenv("NIR_SKIP");
3473 if (!list)
3474 list = "";
3475 }
3476
3477 if (!list[0])
3478 return false;
3479
3480 return comma_separated_list_contains(list, name);
3481 }
3482
3483 static inline bool
3484 should_clone_nir(void)
3485 {
3486 static int should_clone = -1;
3487 if (should_clone < 0)
3488 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3489
3490 return should_clone;
3491 }
3492
3493 static inline bool
3494 should_serialize_deserialize_nir(void)
3495 {
3496 static int test_serialize = -1;
3497 if (test_serialize < 0)
3498 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3499
3500 return test_serialize;
3501 }
3502
3503 static inline bool
3504 should_print_nir(void)
3505 {
3506 static int should_print = -1;
3507 if (should_print < 0)
3508 should_print = env_var_as_boolean("NIR_PRINT", false);
3509
3510 return should_print;
3511 }
3512 #else
3513 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3514 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3515 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3516 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3517 static inline bool should_clone_nir(void) { return false; }
3518 static inline bool should_serialize_deserialize_nir(void) { return false; }
3519 static inline bool should_print_nir(void) { return false; }
3520 #endif /* NDEBUG */
3521
3522 #define _PASS(pass, nir, do_pass) do { \
3523 if (should_skip_nir(#pass)) { \
3524 printf("skipping %s\n", #pass); \
3525 break; \
3526 } \
3527 do_pass \
3528 nir_validate_shader(nir, "after " #pass); \
3529 if (should_clone_nir()) { \
3530 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3531 nir_shader_replace(nir, clone); \
3532 } \
3533 if (should_serialize_deserialize_nir()) { \
3534 nir_shader_serialize_deserialize(nir); \
3535 } \
3536 } while (0)
3537
3538 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3539 nir_metadata_set_validation_flag(nir); \
3540 if (should_print_nir()) \
3541 printf("%s\n", #pass); \
3542 if (pass(nir, ##__VA_ARGS__)) { \
3543 progress = true; \
3544 if (should_print_nir()) \
3545 nir_print_shader(nir, stdout); \
3546 nir_metadata_check_validation_flag(nir); \
3547 } \
3548 )
3549
3550 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3551 if (should_print_nir()) \
3552 printf("%s\n", #pass); \
3553 pass(nir, ##__VA_ARGS__); \
3554 if (should_print_nir()) \
3555 nir_print_shader(nir, stdout); \
3556 )
3557
3558 #define NIR_SKIP(name) should_skip_nir(#name)
3559
3560 /** An instruction filtering callback
3561 *
3562 * Returns true if the instruction should be processed and false otherwise.
3563 */
3564 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3565
3566 /** A simple instruction lowering callback
3567 *
3568 * Many instruction lowering passes can be written as a simple function which
3569 * takes an instruction as its input and returns a sequence of instructions
3570 * that implement the consumed instruction. This function type represents
3571 * such a lowering function. When called, a function with this prototype
3572 * should either return NULL indicating that no lowering needs to be done or
3573 * emit a sequence of instructions using the provided builder (whose cursor
3574 * will already be placed after the instruction to be lowered) and return the
3575 * resulting nir_ssa_def.
3576 */
3577 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3578 nir_instr *, void *);
3579
3580 /**
3581 * Special return value for nir_lower_instr_cb when some progress occurred
3582 * (like changing an input to the instr) that didn't result in a replacement
3583 * SSA def being generated.
3584 */
3585 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3586
3587 /** Iterate over all the instructions in a nir_function_impl and lower them
3588 * using the provided callbacks
3589 *
3590 * This function implements the guts of a standard lowering pass for you. It
3591 * iterates over all of the instructions in a nir_function_impl and calls the
3592 * filter callback on each one. If the filter callback returns true, it then
3593 * calls the lowering call back on the instruction. (Splitting it this way
3594 * allows us to avoid some save/restore work for instructions we know won't be
3595 * lowered.) If the instruction is dead after the lowering is complete, it
3596 * will be removed. If new instructions are added, the lowering callback will
3597 * also be called on them in case multiple lowerings are required.
3598 *
3599 * The metadata for the nir_function_impl will also be updated. If any blocks
3600 * are added (they cannot be removed), dominance and block indices will be
3601 * invalidated.
3602 */
3603 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3604 nir_instr_filter_cb filter,
3605 nir_lower_instr_cb lower,
3606 void *cb_data);
3607 bool nir_shader_lower_instructions(nir_shader *shader,
3608 nir_instr_filter_cb filter,
3609 nir_lower_instr_cb lower,
3610 void *cb_data);
3611
3612 void nir_calc_dominance_impl(nir_function_impl *impl);
3613 void nir_calc_dominance(nir_shader *shader);
3614
3615 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3616 bool nir_block_dominates(nir_block *parent, nir_block *child);
3617 bool nir_block_is_unreachable(nir_block *block);
3618
3619 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3620 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3621
3622 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3623 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3624
3625 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3626 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3627
3628 int nir_gs_count_vertices(const nir_shader *shader);
3629
3630 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3631 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3632 bool nir_split_var_copies(nir_shader *shader);
3633 bool nir_split_per_member_structs(nir_shader *shader);
3634 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3635
3636 bool nir_lower_returns_impl(nir_function_impl *impl);
3637 bool nir_lower_returns(nir_shader *shader);
3638
3639 void nir_inline_function_impl(struct nir_builder *b,
3640 const nir_function_impl *impl,
3641 nir_ssa_def **params);
3642 bool nir_inline_functions(nir_shader *shader);
3643
3644 bool nir_propagate_invariant(nir_shader *shader);
3645
3646 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3647 void nir_lower_deref_copy_instr(struct nir_builder *b,
3648 nir_intrinsic_instr *copy);
3649 bool nir_lower_var_copies(nir_shader *shader);
3650
3651 void nir_fixup_deref_modes(nir_shader *shader);
3652
3653 bool nir_lower_global_vars_to_local(nir_shader *shader);
3654
3655 typedef enum {
3656 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3657 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3658 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3659 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3660 } nir_lower_array_deref_of_vec_options;
3661
3662 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3663 nir_lower_array_deref_of_vec_options options);
3664
3665 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3666
3667 bool nir_lower_locals_to_regs(nir_shader *shader);
3668
3669 void nir_lower_io_to_temporaries(nir_shader *shader,
3670 nir_function_impl *entrypoint,
3671 bool outputs, bool inputs);
3672
3673 bool nir_lower_vars_to_scratch(nir_shader *shader,
3674 nir_variable_mode modes,
3675 int size_threshold,
3676 glsl_type_size_align_func size_align);
3677
3678 void nir_lower_clip_halfz(nir_shader *shader);
3679
3680 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3681
3682 void nir_gather_ssa_types(nir_function_impl *impl,
3683 BITSET_WORD *float_types,
3684 BITSET_WORD *int_types);
3685
3686 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3687 int (*type_size)(const struct glsl_type *, bool));
3688
3689 /* Some helpers to do very simple linking */
3690 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3691 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3692 uint64_t *used_by_other_stage,
3693 uint64_t *used_by_other_stage_patches);
3694 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3695 bool default_to_smooth_interp);
3696 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3697 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3698
3699 bool nir_lower_amul(nir_shader *shader,
3700 int (*type_size)(const struct glsl_type *, bool));
3701
3702 void nir_assign_io_var_locations(struct exec_list *var_list,
3703 unsigned *size,
3704 gl_shader_stage stage);
3705
3706 typedef enum {
3707 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3708 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3709 * modes.
3710 */
3711 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3712
3713 /* If set, this forces all non-flat fragment shader inputs to be
3714 * interpolated as if with the "sample" qualifier. This requires
3715 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3716 */
3717 nir_lower_io_force_sample_interpolation = (1 << 1),
3718 } nir_lower_io_options;
3719 bool nir_lower_io(nir_shader *shader,
3720 nir_variable_mode modes,
3721 int (*type_size)(const struct glsl_type *, bool),
3722 nir_lower_io_options);
3723
3724 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3725
3726 bool
3727 nir_lower_vars_to_explicit_types(nir_shader *shader,
3728 nir_variable_mode modes,
3729 glsl_type_size_align_func type_info);
3730
3731 typedef enum {
3732 /**
3733 * An address format which is a simple 32-bit global GPU address.
3734 */
3735 nir_address_format_32bit_global,
3736
3737 /**
3738 * An address format which is a simple 64-bit global GPU address.
3739 */
3740 nir_address_format_64bit_global,
3741
3742 /**
3743 * An address format which is a bounds-checked 64-bit global GPU address.
3744 *
3745 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3746 * address stored with the low bits in .x and high bits in .y, .z is a
3747 * size, and .w is an offset. When the final I/O operation is lowered, .w
3748 * is checked against .z and the operation is predicated on the result.
3749 */
3750 nir_address_format_64bit_bounded_global,
3751
3752 /**
3753 * An address format which is comprised of a vec2 where the first
3754 * component is a buffer index and the second is an offset.
3755 */
3756 nir_address_format_32bit_index_offset,
3757
3758 /**
3759 * An address format which is a simple 32-bit offset.
3760 */
3761 nir_address_format_32bit_offset,
3762
3763 /**
3764 * An address format representing a purely logical addressing model. In
3765 * this model, all deref chains must be complete from the dereference
3766 * operation to the variable. Cast derefs are not allowed. These
3767 * addresses will be 32-bit scalars but the format is immaterial because
3768 * you can always chase the chain.
3769 */
3770 nir_address_format_logical,
3771 } nir_address_format;
3772
3773 static inline unsigned
3774 nir_address_format_bit_size(nir_address_format addr_format)
3775 {
3776 switch (addr_format) {
3777 case nir_address_format_32bit_global: return 32;
3778 case nir_address_format_64bit_global: return 64;
3779 case nir_address_format_64bit_bounded_global: return 32;
3780 case nir_address_format_32bit_index_offset: return 32;
3781 case nir_address_format_32bit_offset: return 32;
3782 case nir_address_format_logical: return 32;
3783 }
3784 unreachable("Invalid address format");
3785 }
3786
3787 static inline unsigned
3788 nir_address_format_num_components(nir_address_format addr_format)
3789 {
3790 switch (addr_format) {
3791 case nir_address_format_32bit_global: return 1;
3792 case nir_address_format_64bit_global: return 1;
3793 case nir_address_format_64bit_bounded_global: return 4;
3794 case nir_address_format_32bit_index_offset: return 2;
3795 case nir_address_format_32bit_offset: return 1;
3796 case nir_address_format_logical: return 1;
3797 }
3798 unreachable("Invalid address format");
3799 }
3800
3801 static inline const struct glsl_type *
3802 nir_address_format_to_glsl_type(nir_address_format addr_format)
3803 {
3804 unsigned bit_size = nir_address_format_bit_size(addr_format);
3805 assert(bit_size == 32 || bit_size == 64);
3806 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3807 nir_address_format_num_components(addr_format));
3808 }
3809
3810 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3811
3812 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3813 nir_address_format addr_format);
3814
3815 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3816 nir_address_format addr_format);
3817
3818 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3819 nir_deref_instr *deref,
3820 nir_ssa_def *base_addr,
3821 nir_address_format addr_format);
3822 void nir_lower_explicit_io_instr(struct nir_builder *b,
3823 nir_intrinsic_instr *io_instr,
3824 nir_ssa_def *addr,
3825 nir_address_format addr_format);
3826
3827 bool nir_lower_explicit_io(nir_shader *shader,
3828 nir_variable_mode modes,
3829 nir_address_format);
3830
3831 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3832 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3833
3834 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3835
3836 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3837 bool nir_lower_regs_to_ssa(nir_shader *shader);
3838 bool nir_lower_vars_to_ssa(nir_shader *shader);
3839
3840 bool nir_remove_dead_derefs(nir_shader *shader);
3841 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3842 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3843 bool nir_lower_constant_initializers(nir_shader *shader,
3844 nir_variable_mode modes);
3845
3846 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3847 bool nir_lower_vec_to_movs(nir_shader *shader);
3848 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3849 bool alpha_to_one,
3850 const gl_state_index16 *alpha_ref_state_tokens);
3851 bool nir_lower_alu(nir_shader *shader);
3852
3853 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3854 bool always_precise, bool have_ffma);
3855
3856 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3857 bool nir_lower_bool_to_float(nir_shader *shader);
3858 bool nir_lower_bool_to_int32(nir_shader *shader);
3859 bool nir_lower_int_to_float(nir_shader *shader);
3860 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3861 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3862 bool nir_lower_phis_to_scalar(nir_shader *shader);
3863 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3864 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3865 bool outputs_only);
3866 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3867 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3868 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3869
3870 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3871 void nir_lower_viewport_transform(nir_shader *shader);
3872 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3873
3874 typedef struct nir_lower_subgroups_options {
3875 uint8_t subgroup_size;
3876 uint8_t ballot_bit_size;
3877 bool lower_to_scalar:1;
3878 bool lower_vote_trivial:1;
3879 bool lower_vote_eq_to_ballot:1;
3880 bool lower_subgroup_masks:1;
3881 bool lower_shuffle:1;
3882 bool lower_shuffle_to_32bit:1;
3883 bool lower_quad:1;
3884 bool lower_quad_broadcast_dynamic:1;
3885 } nir_lower_subgroups_options;
3886
3887 bool nir_lower_subgroups(nir_shader *shader,
3888 const nir_lower_subgroups_options *options);
3889
3890 bool nir_lower_system_values(nir_shader *shader);
3891
3892 enum PACKED nir_lower_tex_packing {
3893 nir_lower_tex_packing_none = 0,
3894 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3895 * or unsigned ints based on the sampler type
3896 */
3897 nir_lower_tex_packing_16,
3898 /* The sampler returns 1 32-bit word of 4x8 unorm */
3899 nir_lower_tex_packing_8,
3900 };
3901
3902 typedef struct nir_lower_tex_options {
3903 /**
3904 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3905 * sampler types a texture projector is lowered.
3906 */
3907 unsigned lower_txp;
3908
3909 /**
3910 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3911 */
3912 bool lower_txf_offset;
3913
3914 /**
3915 * If true, lower away nir_tex_src_offset for all rect textures.
3916 */
3917 bool lower_rect_offset;
3918
3919 /**
3920 * If true, lower rect textures to 2D, using txs to fetch the
3921 * texture dimensions and dividing the texture coords by the
3922 * texture dims to normalize.
3923 */
3924 bool lower_rect;
3925
3926 /**
3927 * If true, convert yuv to rgb.
3928 */
3929 unsigned lower_y_uv_external;
3930 unsigned lower_y_u_v_external;
3931 unsigned lower_yx_xuxv_external;
3932 unsigned lower_xy_uxvx_external;
3933 unsigned lower_ayuv_external;
3934 unsigned lower_xyuv_external;
3935
3936 /**
3937 * To emulate certain texture wrap modes, this can be used
3938 * to saturate the specified tex coord to [0.0, 1.0]. The
3939 * bits are according to sampler #, ie. if, for example:
3940 *
3941 * (conf->saturate_s & (1 << n))
3942 *
3943 * is true, then the s coord for sampler n is saturated.
3944 *
3945 * Note that clamping must happen *after* projector lowering
3946 * so any projected texture sample instruction with a clamped
3947 * coordinate gets automatically lowered, regardless of the
3948 * 'lower_txp' setting.
3949 */
3950 unsigned saturate_s;
3951 unsigned saturate_t;
3952 unsigned saturate_r;
3953
3954 /* Bitmask of textures that need swizzling.
3955 *
3956 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3957 * swizzles[texture_index] is applied to the result of the texturing
3958 * operation.
3959 */
3960 unsigned swizzle_result;
3961
3962 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3963 * while 4 and 5 represent 0 and 1 respectively.
3964 */
3965 uint8_t swizzles[32][4];
3966
3967 /* Can be used to scale sampled values in range required by the format. */
3968 float scale_factors[32];
3969
3970 /**
3971 * Bitmap of textures that need srgb to linear conversion. If
3972 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3973 * of the texture are lowered to linear.
3974 */
3975 unsigned lower_srgb;
3976
3977 /**
3978 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3979 * LODs to nir_texop_txl.
3980 */
3981 bool lower_tex_without_implicit_lod;
3982
3983 /**
3984 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3985 */
3986 bool lower_txd_cube_map;
3987
3988 /**
3989 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3990 */
3991 bool lower_txd_3d;
3992
3993 /**
3994 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3995 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3996 * with lower_txd_cube_map.
3997 */
3998 bool lower_txd_shadow;
3999
4000 /**
4001 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4002 * Implies lower_txd_cube_map and lower_txd_shadow.
4003 */
4004 bool lower_txd;
4005
4006 /**
4007 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4008 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4009 */
4010 bool lower_txb_shadow_clamp;
4011
4012 /**
4013 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4014 * with nir_texop_txl. This includes cube maps.
4015 */
4016 bool lower_txd_shadow_clamp;
4017
4018 /**
4019 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4020 * with nir_texop_txl. This includes cube maps.
4021 */
4022 bool lower_txd_offset_clamp;
4023
4024 /**
4025 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4026 * sampler is bindless.
4027 */
4028 bool lower_txd_clamp_bindless_sampler;
4029
4030 /**
4031 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4032 * sampler index is not statically determinable to be less than 16.
4033 */
4034 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4035
4036 /**
4037 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4038 * 0-lod followed by a nir_ishr.
4039 */
4040 bool lower_txs_lod;
4041
4042 /**
4043 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4044 * mixed-up tg4 locations.
4045 */
4046 bool lower_tg4_broadcom_swizzle;
4047
4048 /**
4049 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4050 */
4051 bool lower_tg4_offsets;
4052
4053 enum nir_lower_tex_packing lower_tex_packing[32];
4054 } nir_lower_tex_options;
4055
4056 bool nir_lower_tex(nir_shader *shader,
4057 const nir_lower_tex_options *options);
4058
4059 enum nir_lower_non_uniform_access_type {
4060 nir_lower_non_uniform_ubo_access = (1 << 0),
4061 nir_lower_non_uniform_ssbo_access = (1 << 1),
4062 nir_lower_non_uniform_texture_access = (1 << 2),
4063 nir_lower_non_uniform_image_access = (1 << 3),
4064 };
4065
4066 bool nir_lower_non_uniform_access(nir_shader *shader,
4067 enum nir_lower_non_uniform_access_type);
4068
4069 enum nir_lower_idiv_path {
4070 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4071 * the two but it is not exact in some cases (for example, 1091317713u /
4072 * 1034u gives 5209173 instead of 1055432) */
4073 nir_lower_idiv_fast,
4074 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4075 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4076 * the nv50 path and many of them are integer multiplications, so it is
4077 * probably slower. It should always return the correct result, though. */
4078 nir_lower_idiv_precise,
4079 };
4080
4081 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4082
4083 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4084
4085 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4086 bool use_vars,
4087 bool use_clipdist_array,
4088 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4089 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4090 bool use_clipdist_array,
4091 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4092 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4093 bool use_clipdist_array);
4094 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4095
4096 void nir_lower_point_size_mov(nir_shader *shader,
4097 const gl_state_index16 *pointsize_state_tokens);
4098
4099 bool nir_lower_frexp(nir_shader *nir);
4100
4101 void nir_lower_two_sided_color(nir_shader *shader);
4102
4103 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4104
4105 bool nir_lower_flatshade(nir_shader *shader);
4106
4107 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4108 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4109 const gl_state_index16 *uniform_state_tokens);
4110
4111 typedef struct nir_lower_wpos_ytransform_options {
4112 gl_state_index16 state_tokens[STATE_LENGTH];
4113 bool fs_coord_origin_upper_left :1;
4114 bool fs_coord_origin_lower_left :1;
4115 bool fs_coord_pixel_center_integer :1;
4116 bool fs_coord_pixel_center_half_integer :1;
4117 } nir_lower_wpos_ytransform_options;
4118
4119 bool nir_lower_wpos_ytransform(nir_shader *shader,
4120 const nir_lower_wpos_ytransform_options *options);
4121 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4122
4123 bool nir_lower_fb_read(nir_shader *shader);
4124
4125 typedef struct nir_lower_drawpixels_options {
4126 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4127 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4128 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4129 unsigned drawpix_sampler;
4130 unsigned pixelmap_sampler;
4131 bool pixel_maps :1;
4132 bool scale_and_bias :1;
4133 } nir_lower_drawpixels_options;
4134
4135 void nir_lower_drawpixels(nir_shader *shader,
4136 const nir_lower_drawpixels_options *options);
4137
4138 typedef struct nir_lower_bitmap_options {
4139 unsigned sampler;
4140 bool swizzle_xxxx;
4141 } nir_lower_bitmap_options;
4142
4143 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4144
4145 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4146
4147 typedef enum {
4148 nir_lower_int_source_mods = 1 << 0,
4149 nir_lower_float_source_mods = 1 << 1,
4150 nir_lower_triop_abs = 1 << 2,
4151 nir_lower_all_source_mods = (1 << 3) - 1
4152 } nir_lower_to_source_mods_flags;
4153
4154
4155 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4156
4157 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4158
4159 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4160
4161 bool nir_lower_bit_size(nir_shader *shader,
4162 nir_lower_bit_size_callback callback,
4163 void *callback_data);
4164
4165 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4166 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4167
4168 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4169 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4170 nir_lower_doubles_options options);
4171 bool nir_lower_pack(nir_shader *shader);
4172
4173 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4174
4175 typedef enum {
4176 nir_lower_interpolation_at_sample = (1 << 1),
4177 nir_lower_interpolation_at_offset = (1 << 2),
4178 nir_lower_interpolation_centroid = (1 << 3),
4179 nir_lower_interpolation_pixel = (1 << 4),
4180 nir_lower_interpolation_sample = (1 << 5),
4181 } nir_lower_interpolation_options;
4182
4183 bool nir_lower_interpolation(nir_shader *shader,
4184 nir_lower_interpolation_options options);
4185
4186 bool nir_normalize_cubemap_coords(nir_shader *shader);
4187
4188 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4189
4190 void nir_loop_analyze_impl(nir_function_impl *impl,
4191 nir_variable_mode indirect_mask);
4192
4193 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4194
4195 bool nir_repair_ssa_impl(nir_function_impl *impl);
4196 bool nir_repair_ssa(nir_shader *shader);
4197
4198 void nir_convert_loop_to_lcssa(nir_loop *loop);
4199 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4200 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4201
4202 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4203 * registers. If false, convert all values (even those not involved in a phi
4204 * node) to registers.
4205 */
4206 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4207
4208 bool nir_lower_phis_to_regs_block(nir_block *block);
4209 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4210 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4211
4212 bool nir_lower_samplers(nir_shader *shader);
4213
4214 /* This is here for unit tests. */
4215 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4216
4217 bool nir_opt_comparison_pre(nir_shader *shader);
4218
4219 bool nir_opt_access(nir_shader *shader);
4220 bool nir_opt_algebraic(nir_shader *shader);
4221 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4222 bool nir_opt_algebraic_late(nir_shader *shader);
4223 bool nir_opt_constant_folding(nir_shader *shader);
4224
4225 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4226
4227 bool nir_copy_prop(nir_shader *shader);
4228
4229 bool nir_opt_copy_prop_vars(nir_shader *shader);
4230
4231 bool nir_opt_cse(nir_shader *shader);
4232
4233 bool nir_opt_dce(nir_shader *shader);
4234
4235 bool nir_opt_dead_cf(nir_shader *shader);
4236
4237 bool nir_opt_dead_write_vars(nir_shader *shader);
4238
4239 bool nir_opt_deref_impl(nir_function_impl *impl);
4240 bool nir_opt_deref(nir_shader *shader);
4241
4242 bool nir_opt_find_array_copies(nir_shader *shader);
4243
4244 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4245
4246 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4247
4248 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4249
4250 bool nir_opt_intrinsics(nir_shader *shader);
4251
4252 bool nir_opt_large_constants(nir_shader *shader,
4253 glsl_type_size_align_func size_align,
4254 unsigned threshold);
4255
4256 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4257
4258 typedef enum {
4259 nir_move_const_undef = (1 << 0),
4260 nir_move_load_ubo = (1 << 1),
4261 nir_move_load_input = (1 << 2),
4262 nir_move_comparisons = (1 << 3),
4263 nir_move_copies = (1 << 4),
4264 } nir_move_options;
4265
4266 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4267
4268 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4269
4270 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4271
4272 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4273 bool indirect_load_ok, bool expensive_alu_ok);
4274
4275 bool nir_opt_rematerialize_compares(nir_shader *shader);
4276
4277 bool nir_opt_remove_phis(nir_shader *shader);
4278 bool nir_opt_remove_phis_block(nir_block *block);
4279
4280 bool nir_opt_shrink_load(nir_shader *shader);
4281
4282 bool nir_opt_trivial_continues(nir_shader *shader);
4283
4284 bool nir_opt_undef(nir_shader *shader);
4285
4286 bool nir_opt_vectorize(nir_shader *shader);
4287
4288 bool nir_opt_conditional_discard(nir_shader *shader);
4289
4290 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4291 unsigned num_components, unsigned high_offset,
4292 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4293
4294 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4295 nir_should_vectorize_mem_func callback);
4296
4297 void nir_schedule(nir_shader *shader, int threshold);
4298
4299 void nir_strip(nir_shader *shader);
4300
4301 void nir_sweep(nir_shader *shader);
4302
4303 void nir_remap_dual_slot_attributes(nir_shader *shader,
4304 uint64_t *dual_slot_inputs);
4305 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4306
4307 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4308 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4309
4310 static inline bool
4311 nir_variable_is_in_ubo(const nir_variable *var)
4312 {
4313 return (var->data.mode == nir_var_mem_ubo &&
4314 var->interface_type != NULL);
4315 }
4316
4317 static inline bool
4318 nir_variable_is_in_ssbo(const nir_variable *var)
4319 {
4320 return (var->data.mode == nir_var_mem_ssbo &&
4321 var->interface_type != NULL);
4322 }
4323
4324 static inline bool
4325 nir_variable_is_in_block(const nir_variable *var)
4326 {
4327 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4328 }
4329
4330 #ifdef __cplusplus
4331 } /* extern "C" */
4332 #endif
4333
4334 #endif /* NIR_H */