nir: Add scoped_memory_barrier intrinsic
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
43 #include <stdio.h>
44
45 #ifndef NDEBUG
46 #include "util/debug.h"
47 #endif /* NDEBUG */
48
49 #include "nir_opcodes.h"
50
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
53 #endif
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 #define NIR_FALSE 0u
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 4
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 typedef uint8_t nir_component_mask_t;
64
65 /** Defines a cast function
66 *
67 * This macro defines a cast function from in_type to out_type where
68 * out_type is some structure type that contains a field of type out_type.
69 *
70 * Note that you have to be a bit careful as the generated cast function
71 * destroys constness.
72 */
73 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
74 type_field, type_value) \
75 static inline out_type * \
76 name(const in_type *parent) \
77 { \
78 assert(parent && parent->type_field == type_value); \
79 return exec_node_data(out_type, parent, field); \
80 }
81
82 struct nir_function;
83 struct nir_shader;
84 struct nir_instr;
85 struct nir_builder;
86
87
88 /**
89 * Description of built-in state associated with a uniform
90 *
91 * \sa nir_variable::state_slots
92 */
93 typedef struct {
94 gl_state_index16 tokens[STATE_LENGTH];
95 int swizzle;
96 } nir_state_slot;
97
98 typedef enum {
99 nir_var_shader_in = (1 << 0),
100 nir_var_shader_out = (1 << 1),
101 nir_var_shader_temp = (1 << 2),
102 nir_var_function_temp = (1 << 3),
103 nir_var_uniform = (1 << 4),
104 nir_var_mem_ubo = (1 << 5),
105 nir_var_system_value = (1 << 6),
106 nir_var_mem_ssbo = (1 << 7),
107 nir_var_mem_shared = (1 << 8),
108 nir_var_mem_global = (1 << 9),
109 nir_var_all = ~0,
110 } nir_variable_mode;
111
112 /**
113 * Rounding modes.
114 */
115 typedef enum {
116 nir_rounding_mode_undef = 0,
117 nir_rounding_mode_rtne = 1, /* round to nearest even */
118 nir_rounding_mode_ru = 2, /* round up */
119 nir_rounding_mode_rd = 3, /* round down */
120 nir_rounding_mode_rtz = 4, /* round towards zero */
121 } nir_rounding_mode;
122
123 typedef union {
124 bool b;
125 float f32;
126 double f64;
127 int8_t i8;
128 uint8_t u8;
129 int16_t i16;
130 uint16_t u16;
131 int32_t i32;
132 uint32_t u32;
133 int64_t i64;
134 uint64_t u64;
135 } nir_const_value;
136
137 #define nir_const_value_to_array(arr, c, components, m) \
138 { \
139 for (unsigned i = 0; i < components; ++i) \
140 arr[i] = c[i].m; \
141 } while (false)
142
143 static inline nir_const_value
144 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
145 {
146 nir_const_value v;
147 memset(&v, 0, sizeof(v));
148
149 switch (bit_size) {
150 case 1: v.b = x; break;
151 case 8: v.u8 = x; break;
152 case 16: v.u16 = x; break;
153 case 32: v.u32 = x; break;
154 case 64: v.u64 = x; break;
155 default:
156 unreachable("Invalid bit size");
157 }
158
159 return v;
160 }
161
162 static inline nir_const_value
163 nir_const_value_for_int(int64_t i, unsigned bit_size)
164 {
165 nir_const_value v;
166 memset(&v, 0, sizeof(v));
167
168 assert(bit_size <= 64);
169 if (bit_size < 64) {
170 assert(i >= (-(1ll << (bit_size - 1))));
171 assert(i < (1ll << (bit_size - 1)));
172 }
173
174 return nir_const_value_for_raw_uint(i, bit_size);
175 }
176
177 static inline nir_const_value
178 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
179 {
180 nir_const_value v;
181 memset(&v, 0, sizeof(v));
182
183 assert(bit_size <= 64);
184 if (bit_size < 64)
185 assert(u < (1ull << bit_size));
186
187 return nir_const_value_for_raw_uint(u, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_bool(bool b, unsigned bit_size)
192 {
193 /* Booleans use a 0/-1 convention */
194 return nir_const_value_for_int(-(int)b, bit_size);
195 }
196
197 /* This one isn't inline because it requires half-float conversion */
198 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
199
200 static inline int64_t
201 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
202 {
203 switch (bit_size) {
204 /* int1_t uses 0/-1 convention */
205 case 1: return -(int)value.b;
206 case 8: return value.i8;
207 case 16: return value.i16;
208 case 32: return value.i32;
209 case 64: return value.i64;
210 default:
211 unreachable("Invalid bit size");
212 }
213 }
214
215 static inline uint64_t
216 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
217 {
218 switch (bit_size) {
219 case 1: return value.b;
220 case 8: return value.u8;
221 case 16: return value.u16;
222 case 32: return value.u32;
223 case 64: return value.u64;
224 default:
225 unreachable("Invalid bit size");
226 }
227 }
228
229 static inline bool
230 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
231 {
232 int64_t i = nir_const_value_as_int(value, bit_size);
233
234 /* Booleans of any size use 0/-1 convention */
235 assert(i == 0 || i == -1);
236
237 return i;
238 }
239
240 /* This one isn't inline because it requires half-float conversion */
241 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
242
243 typedef struct nir_constant {
244 /**
245 * Value of the constant.
246 *
247 * The field used to back the values supplied by the constant is determined
248 * by the type associated with the \c nir_variable. Constants may be
249 * scalars, vectors, or matrices.
250 */
251 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
252
253 /* we could get this from the var->type but makes clone *much* easier to
254 * not have to care about the type.
255 */
256 unsigned num_elements;
257
258 /* Array elements / Structure Fields */
259 struct nir_constant **elements;
260 } nir_constant;
261
262 /**
263 * \brief Layout qualifiers for gl_FragDepth.
264 *
265 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
266 * with a layout qualifier.
267 */
268 typedef enum {
269 nir_depth_layout_none, /**< No depth layout is specified. */
270 nir_depth_layout_any,
271 nir_depth_layout_greater,
272 nir_depth_layout_less,
273 nir_depth_layout_unchanged
274 } nir_depth_layout;
275
276 /**
277 * Enum keeping track of how a variable was declared.
278 */
279 typedef enum {
280 /**
281 * Normal declaration.
282 */
283 nir_var_declared_normally = 0,
284
285 /**
286 * Variable is implicitly generated by the compiler and should not be
287 * visible via the API.
288 */
289 nir_var_hidden,
290 } nir_var_declaration_type;
291
292 /**
293 * Either a uniform, global variable, shader input, or shader output. Based on
294 * ir_variable - it should be easy to translate between the two.
295 */
296
297 typedef struct nir_variable {
298 struct exec_node node;
299
300 /**
301 * Declared type of the variable
302 */
303 const struct glsl_type *type;
304
305 /**
306 * Declared name of the variable
307 */
308 char *name;
309
310 struct nir_variable_data {
311 /**
312 * Storage class of the variable.
313 *
314 * \sa nir_variable_mode
315 */
316 nir_variable_mode mode;
317
318 /**
319 * Is the variable read-only?
320 *
321 * This is set for variables declared as \c const, shader inputs,
322 * and uniforms.
323 */
324 unsigned read_only:1;
325 unsigned centroid:1;
326 unsigned sample:1;
327 unsigned patch:1;
328 unsigned invariant:1;
329
330 /**
331 * Can this variable be coalesced with another?
332 *
333 * This is set by nir_lower_io_to_temporaries to say that any
334 * copies involving this variable should stay put. Propagating it can
335 * duplicate the resulting load/store, which is not wanted, and may
336 * result in a load/store of the variable with an indirect offset which
337 * the backend may not be able to handle.
338 */
339 unsigned cannot_coalesce:1;
340
341 /**
342 * When separate shader programs are enabled, only input/outputs between
343 * the stages of a multi-stage separate program can be safely removed
344 * from the shader interface. Other input/outputs must remains active.
345 *
346 * This is also used to make sure xfb varyings that are unused by the
347 * fragment shader are not removed.
348 */
349 unsigned always_active_io:1;
350
351 /**
352 * Interpolation mode for shader inputs / outputs
353 *
354 * \sa glsl_interp_mode
355 */
356 unsigned interpolation:2;
357
358 /**
359 * If non-zero, then this variable may be packed along with other variables
360 * into a single varying slot, so this offset should be applied when
361 * accessing components. For example, an offset of 1 means that the x
362 * component of this variable is actually stored in component y of the
363 * location specified by \c location.
364 */
365 unsigned location_frac:2;
366
367 /**
368 * If true, this variable represents an array of scalars that should
369 * be tightly packed. In other words, consecutive array elements
370 * should be stored one component apart, rather than one slot apart.
371 */
372 unsigned compact:1;
373
374 /**
375 * Whether this is a fragment shader output implicitly initialized with
376 * the previous contents of the specified render target at the
377 * framebuffer location corresponding to this shader invocation.
378 */
379 unsigned fb_fetch_output:1;
380
381 /**
382 * Non-zero if this variable is considered bindless as defined by
383 * ARB_bindless_texture.
384 */
385 unsigned bindless:1;
386
387 /**
388 * Was an explicit binding set in the shader?
389 */
390 unsigned explicit_binding:1;
391
392 /**
393 * Was a transfer feedback buffer set in the shader?
394 */
395 unsigned explicit_xfb_buffer:1;
396
397 /**
398 * Was a transfer feedback stride set in the shader?
399 */
400 unsigned explicit_xfb_stride:1;
401
402 /**
403 * Was an explicit offset set in the shader?
404 */
405 unsigned explicit_offset:1;
406
407 /**
408 * How the variable was declared. See nir_var_declaration_type.
409 *
410 * This is used to detect variables generated by the compiler, so should
411 * not be visible via the API.
412 */
413 unsigned how_declared:2;
414
415 /**
416 * \brief Layout qualifier for gl_FragDepth.
417 *
418 * This is not equal to \c ir_depth_layout_none if and only if this
419 * variable is \c gl_FragDepth and a layout qualifier is specified.
420 */
421 nir_depth_layout depth_layout;
422
423 /**
424 * Storage location of the base of this variable
425 *
426 * The precise meaning of this field depends on the nature of the variable.
427 *
428 * - Vertex shader input: one of the values from \c gl_vert_attrib.
429 * - Vertex shader output: one of the values from \c gl_varying_slot.
430 * - Geometry shader input: one of the values from \c gl_varying_slot.
431 * - Geometry shader output: one of the values from \c gl_varying_slot.
432 * - Fragment shader input: one of the values from \c gl_varying_slot.
433 * - Fragment shader output: one of the values from \c gl_frag_result.
434 * - Uniforms: Per-stage uniform slot number for default uniform block.
435 * - Uniforms: Index within the uniform block definition for UBO members.
436 * - Non-UBO Uniforms: uniform slot number.
437 * - Other: This field is not currently used.
438 *
439 * If the variable is a uniform, shader input, or shader output, and the
440 * slot has not been assigned, the value will be -1.
441 */
442 int location;
443
444 /**
445 * The actual location of the variable in the IR. Only valid for inputs
446 * and outputs.
447 */
448 unsigned int driver_location;
449
450 /**
451 * Vertex stream output identifier.
452 *
453 * For packed outputs, bit 31 is set and bits [2*i+1,2*i] indicate the
454 * stream of the i-th component.
455 */
456 unsigned stream;
457
458 /**
459 * output index for dual source blending.
460 */
461 int index;
462
463 /**
464 * Descriptor set binding for sampler or UBO.
465 */
466 int descriptor_set;
467
468 /**
469 * Initial binding point for a sampler or UBO.
470 *
471 * For array types, this represents the binding point for the first element.
472 */
473 int binding;
474
475 /**
476 * Location an atomic counter or transform feedback is stored at.
477 */
478 unsigned offset;
479
480 /**
481 * Transform feedback buffer.
482 */
483 unsigned xfb_buffer;
484
485 /**
486 * Transform feedback stride.
487 */
488 unsigned xfb_stride;
489
490 /**
491 * ARB_shader_image_load_store qualifiers.
492 */
493 struct {
494 enum gl_access_qualifier access;
495
496 /** Image internal format if specified explicitly, otherwise GL_NONE. */
497 GLenum format;
498 } image;
499 } data;
500
501 /* Number of nir_variable_data members */
502 unsigned num_members;
503
504 /**
505 * Built-in state that backs this uniform
506 *
507 * Once set at variable creation, \c state_slots must remain invariant.
508 * This is because, ideally, this array would be shared by all clones of
509 * this variable in the IR tree. In other words, we'd really like for it
510 * to be a fly-weight.
511 *
512 * If the variable is not a uniform, \c num_state_slots will be zero and
513 * \c state_slots will be \c NULL.
514 */
515 /*@{*/
516 unsigned num_state_slots; /**< Number of state slots used */
517 nir_state_slot *state_slots; /**< State descriptors. */
518 /*@}*/
519
520 /**
521 * Constant expression assigned in the initializer of the variable
522 *
523 * This field should only be used temporarily by creators of NIR shaders
524 * and then lower_constant_initializers can be used to get rid of them.
525 * Most of the rest of NIR ignores this field or asserts that it's NULL.
526 */
527 nir_constant *constant_initializer;
528
529 /**
530 * For variables that are in an interface block or are an instance of an
531 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
532 *
533 * \sa ir_variable::location
534 */
535 const struct glsl_type *interface_type;
536
537 /**
538 * Description of per-member data for per-member struct variables
539 *
540 * This is used for variables which are actually an amalgamation of
541 * multiple entities such as a struct of built-in values or a struct of
542 * inputs each with their own layout specifier. This is only allowed on
543 * variables with a struct or array of array of struct type.
544 */
545 struct nir_variable_data *members;
546 } nir_variable;
547
548 #define nir_foreach_variable(var, var_list) \
549 foreach_list_typed(nir_variable, var, node, var_list)
550
551 #define nir_foreach_variable_safe(var, var_list) \
552 foreach_list_typed_safe(nir_variable, var, node, var_list)
553
554 static inline bool
555 nir_variable_is_global(const nir_variable *var)
556 {
557 return var->data.mode != nir_var_function_temp;
558 }
559
560 typedef struct nir_register {
561 struct exec_node node;
562
563 unsigned num_components; /** < number of vector components */
564 unsigned num_array_elems; /** < size of array (0 for no array) */
565
566 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
567 uint8_t bit_size;
568
569 /** generic register index. */
570 unsigned index;
571
572 /** only for debug purposes, can be NULL */
573 const char *name;
574
575 /** set of nir_srcs where this register is used (read from) */
576 struct list_head uses;
577
578 /** set of nir_dests where this register is defined (written to) */
579 struct list_head defs;
580
581 /** set of nir_ifs where this register is used as a condition */
582 struct list_head if_uses;
583 } nir_register;
584
585 #define nir_foreach_register(reg, reg_list) \
586 foreach_list_typed(nir_register, reg, node, reg_list)
587 #define nir_foreach_register_safe(reg, reg_list) \
588 foreach_list_typed_safe(nir_register, reg, node, reg_list)
589
590 typedef enum PACKED {
591 nir_instr_type_alu,
592 nir_instr_type_deref,
593 nir_instr_type_call,
594 nir_instr_type_tex,
595 nir_instr_type_intrinsic,
596 nir_instr_type_load_const,
597 nir_instr_type_jump,
598 nir_instr_type_ssa_undef,
599 nir_instr_type_phi,
600 nir_instr_type_parallel_copy,
601 } nir_instr_type;
602
603 typedef struct nir_instr {
604 struct exec_node node;
605 struct nir_block *block;
606 nir_instr_type type;
607
608 /* A temporary for optimization and analysis passes to use for storing
609 * flags. For instance, DCE uses this to store the "dead/live" info.
610 */
611 uint8_t pass_flags;
612
613 /** generic instruction index. */
614 unsigned index;
615 } nir_instr;
616
617 static inline nir_instr *
618 nir_instr_next(nir_instr *instr)
619 {
620 struct exec_node *next = exec_node_get_next(&instr->node);
621 if (exec_node_is_tail_sentinel(next))
622 return NULL;
623 else
624 return exec_node_data(nir_instr, next, node);
625 }
626
627 static inline nir_instr *
628 nir_instr_prev(nir_instr *instr)
629 {
630 struct exec_node *prev = exec_node_get_prev(&instr->node);
631 if (exec_node_is_head_sentinel(prev))
632 return NULL;
633 else
634 return exec_node_data(nir_instr, prev, node);
635 }
636
637 static inline bool
638 nir_instr_is_first(const nir_instr *instr)
639 {
640 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
641 }
642
643 static inline bool
644 nir_instr_is_last(const nir_instr *instr)
645 {
646 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
647 }
648
649 typedef struct nir_ssa_def {
650 /** for debugging only, can be NULL */
651 const char* name;
652
653 /** generic SSA definition index. */
654 unsigned index;
655
656 /** Index into the live_in and live_out bitfields */
657 unsigned live_index;
658
659 /** Instruction which produces this SSA value. */
660 nir_instr *parent_instr;
661
662 /** set of nir_instrs where this register is used (read from) */
663 struct list_head uses;
664
665 /** set of nir_ifs where this register is used as a condition */
666 struct list_head if_uses;
667
668 uint8_t num_components;
669
670 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
671 uint8_t bit_size;
672 } nir_ssa_def;
673
674 struct nir_src;
675
676 typedef struct {
677 nir_register *reg;
678 struct nir_src *indirect; /** < NULL for no indirect offset */
679 unsigned base_offset;
680
681 /* TODO use-def chain goes here */
682 } nir_reg_src;
683
684 typedef struct {
685 nir_instr *parent_instr;
686 struct list_head def_link;
687
688 nir_register *reg;
689 struct nir_src *indirect; /** < NULL for no indirect offset */
690 unsigned base_offset;
691
692 /* TODO def-use chain goes here */
693 } nir_reg_dest;
694
695 struct nir_if;
696
697 typedef struct nir_src {
698 union {
699 /** Instruction that consumes this value as a source. */
700 nir_instr *parent_instr;
701 struct nir_if *parent_if;
702 };
703
704 struct list_head use_link;
705
706 union {
707 nir_reg_src reg;
708 nir_ssa_def *ssa;
709 };
710
711 bool is_ssa;
712 } nir_src;
713
714 static inline nir_src
715 nir_src_init(void)
716 {
717 nir_src src = { { NULL } };
718 return src;
719 }
720
721 #define NIR_SRC_INIT nir_src_init()
722
723 #define nir_foreach_use(src, reg_or_ssa_def) \
724 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
725
726 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
727 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
728
729 #define nir_foreach_if_use(src, reg_or_ssa_def) \
730 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
731
732 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
733 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
734
735 typedef struct {
736 union {
737 nir_reg_dest reg;
738 nir_ssa_def ssa;
739 };
740
741 bool is_ssa;
742 } nir_dest;
743
744 static inline nir_dest
745 nir_dest_init(void)
746 {
747 nir_dest dest = { { { NULL } } };
748 return dest;
749 }
750
751 #define NIR_DEST_INIT nir_dest_init()
752
753 #define nir_foreach_def(dest, reg) \
754 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
755
756 #define nir_foreach_def_safe(dest, reg) \
757 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
758
759 static inline nir_src
760 nir_src_for_ssa(nir_ssa_def *def)
761 {
762 nir_src src = NIR_SRC_INIT;
763
764 src.is_ssa = true;
765 src.ssa = def;
766
767 return src;
768 }
769
770 static inline nir_src
771 nir_src_for_reg(nir_register *reg)
772 {
773 nir_src src = NIR_SRC_INIT;
774
775 src.is_ssa = false;
776 src.reg.reg = reg;
777 src.reg.indirect = NULL;
778 src.reg.base_offset = 0;
779
780 return src;
781 }
782
783 static inline nir_dest
784 nir_dest_for_reg(nir_register *reg)
785 {
786 nir_dest dest = NIR_DEST_INIT;
787
788 dest.reg.reg = reg;
789
790 return dest;
791 }
792
793 static inline unsigned
794 nir_src_bit_size(nir_src src)
795 {
796 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
797 }
798
799 static inline unsigned
800 nir_src_num_components(nir_src src)
801 {
802 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
803 }
804
805 static inline bool
806 nir_src_is_const(nir_src src)
807 {
808 return src.is_ssa &&
809 src.ssa->parent_instr->type == nir_instr_type_load_const;
810 }
811
812 static inline unsigned
813 nir_dest_bit_size(nir_dest dest)
814 {
815 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
816 }
817
818 static inline unsigned
819 nir_dest_num_components(nir_dest dest)
820 {
821 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
822 }
823
824 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
825 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
826
827 typedef struct {
828 nir_src src;
829
830 /**
831 * \name input modifiers
832 */
833 /*@{*/
834 /**
835 * For inputs interpreted as floating point, flips the sign bit. For
836 * inputs interpreted as integers, performs the two's complement negation.
837 */
838 bool negate;
839
840 /**
841 * Clears the sign bit for floating point values, and computes the integer
842 * absolute value for integers. Note that the negate modifier acts after
843 * the absolute value modifier, therefore if both are set then all inputs
844 * will become negative.
845 */
846 bool abs;
847 /*@}*/
848
849 /**
850 * For each input component, says which component of the register it is
851 * chosen from. Note that which elements of the swizzle are used and which
852 * are ignored are based on the write mask for most opcodes - for example,
853 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
854 * a swizzle of {2, x, 1, 0} where x means "don't care."
855 */
856 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
857 } nir_alu_src;
858
859 typedef struct {
860 nir_dest dest;
861
862 /**
863 * \name saturate output modifier
864 *
865 * Only valid for opcodes that output floating-point numbers. Clamps the
866 * output to between 0.0 and 1.0 inclusive.
867 */
868
869 bool saturate;
870
871 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
872 } nir_alu_dest;
873
874 /** NIR sized and unsized types
875 *
876 * The values in this enum are carefully chosen so that the sized type is
877 * just the unsized type OR the number of bits.
878 */
879 typedef enum {
880 nir_type_invalid = 0, /* Not a valid type */
881 nir_type_int = 2,
882 nir_type_uint = 4,
883 nir_type_bool = 6,
884 nir_type_float = 128,
885 nir_type_bool1 = 1 | nir_type_bool,
886 nir_type_bool32 = 32 | nir_type_bool,
887 nir_type_int1 = 1 | nir_type_int,
888 nir_type_int8 = 8 | nir_type_int,
889 nir_type_int16 = 16 | nir_type_int,
890 nir_type_int32 = 32 | nir_type_int,
891 nir_type_int64 = 64 | nir_type_int,
892 nir_type_uint1 = 1 | nir_type_uint,
893 nir_type_uint8 = 8 | nir_type_uint,
894 nir_type_uint16 = 16 | nir_type_uint,
895 nir_type_uint32 = 32 | nir_type_uint,
896 nir_type_uint64 = 64 | nir_type_uint,
897 nir_type_float16 = 16 | nir_type_float,
898 nir_type_float32 = 32 | nir_type_float,
899 nir_type_float64 = 64 | nir_type_float,
900 } nir_alu_type;
901
902 #define NIR_ALU_TYPE_SIZE_MASK 0x79
903 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
904
905 static inline unsigned
906 nir_alu_type_get_type_size(nir_alu_type type)
907 {
908 return type & NIR_ALU_TYPE_SIZE_MASK;
909 }
910
911 static inline unsigned
912 nir_alu_type_get_base_type(nir_alu_type type)
913 {
914 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
915 }
916
917 static inline nir_alu_type
918 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
919 {
920 switch (base_type) {
921 case GLSL_TYPE_BOOL:
922 return nir_type_bool1;
923 break;
924 case GLSL_TYPE_UINT:
925 return nir_type_uint32;
926 break;
927 case GLSL_TYPE_INT:
928 return nir_type_int32;
929 break;
930 case GLSL_TYPE_UINT16:
931 return nir_type_uint16;
932 break;
933 case GLSL_TYPE_INT16:
934 return nir_type_int16;
935 break;
936 case GLSL_TYPE_UINT8:
937 return nir_type_uint8;
938 case GLSL_TYPE_INT8:
939 return nir_type_int8;
940 case GLSL_TYPE_UINT64:
941 return nir_type_uint64;
942 break;
943 case GLSL_TYPE_INT64:
944 return nir_type_int64;
945 break;
946 case GLSL_TYPE_FLOAT:
947 return nir_type_float32;
948 break;
949 case GLSL_TYPE_FLOAT16:
950 return nir_type_float16;
951 break;
952 case GLSL_TYPE_DOUBLE:
953 return nir_type_float64;
954 break;
955
956 case GLSL_TYPE_SAMPLER:
957 case GLSL_TYPE_IMAGE:
958 case GLSL_TYPE_ATOMIC_UINT:
959 case GLSL_TYPE_STRUCT:
960 case GLSL_TYPE_INTERFACE:
961 case GLSL_TYPE_ARRAY:
962 case GLSL_TYPE_VOID:
963 case GLSL_TYPE_SUBROUTINE:
964 case GLSL_TYPE_FUNCTION:
965 case GLSL_TYPE_ERROR:
966 return nir_type_invalid;
967 }
968
969 unreachable("unknown type");
970 }
971
972 static inline nir_alu_type
973 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
974 {
975 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
976 }
977
978 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
979 nir_rounding_mode rnd);
980
981 static inline nir_op
982 nir_op_vec(unsigned components)
983 {
984 switch (components) {
985 case 1: return nir_op_mov;
986 case 2: return nir_op_vec2;
987 case 3: return nir_op_vec3;
988 case 4: return nir_op_vec4;
989 default: unreachable("bad component count");
990 }
991 }
992
993 static inline bool
994 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
995 {
996 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
997 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
998 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
999 }
1000
1001 static inline bool
1002 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1003 {
1004 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1005 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1006 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1007 }
1008
1009 static inline bool
1010 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1011 {
1012 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1013 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1014 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1015 }
1016
1017 static inline bool
1018 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1019 {
1020 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1021 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1022 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1023 }
1024
1025 static inline bool
1026 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1027 {
1028 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1029 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1030 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1031 }
1032
1033 static inline bool
1034 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1035 {
1036 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1037 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1038 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1039 }
1040
1041 static inline bool
1042 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1043 {
1044 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1045 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1046 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1047 }
1048
1049 static inline nir_rounding_mode
1050 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1051 nir_alu_type type)
1052 {
1053 if (nir_alu_type_get_base_type(type) != nir_type_float)
1054 return nir_rounding_mode_undef;
1055
1056 unsigned bit_size = nir_alu_type_get_type_size(type);
1057
1058 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1059 return nir_rounding_mode_rtz;
1060 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1061 return nir_rounding_mode_rtne;
1062 return nir_rounding_mode_undef;
1063 }
1064
1065 static inline bool
1066 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1067 {
1068 bool result =
1069 nir_has_any_rounding_mode_rtne(execution_mode) ||
1070 nir_has_any_rounding_mode_rtz(execution_mode);
1071 return result;
1072 }
1073
1074 typedef enum {
1075 /**
1076 * Operation where the first two sources are commutative.
1077 *
1078 * For 2-source operations, this just mathematical commutativity. Some
1079 * 3-source operations, like ffma, are only commutative in the first two
1080 * sources.
1081 */
1082 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1083 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1084 } nir_op_algebraic_property;
1085
1086 typedef struct {
1087 const char *name;
1088
1089 unsigned num_inputs;
1090
1091 /**
1092 * The number of components in the output
1093 *
1094 * If non-zero, this is the size of the output and input sizes are
1095 * explicitly given; swizzle and writemask are still in effect, but if
1096 * the output component is masked out, then the input component may
1097 * still be in use.
1098 *
1099 * If zero, the opcode acts in the standard, per-component manner; the
1100 * operation is performed on each component (except the ones that are
1101 * masked out) with the input being taken from the input swizzle for
1102 * that component.
1103 *
1104 * The size of some of the inputs may be given (i.e. non-zero) even
1105 * though output_size is zero; in that case, the inputs with a zero
1106 * size act per-component, while the inputs with non-zero size don't.
1107 */
1108 unsigned output_size;
1109
1110 /**
1111 * The type of vector that the instruction outputs. Note that the
1112 * staurate modifier is only allowed on outputs with the float type.
1113 */
1114
1115 nir_alu_type output_type;
1116
1117 /**
1118 * The number of components in each input
1119 */
1120 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1121
1122 /**
1123 * The type of vector that each input takes. Note that negate and
1124 * absolute value are only allowed on inputs with int or float type and
1125 * behave differently on the two.
1126 */
1127 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1128
1129 nir_op_algebraic_property algebraic_properties;
1130
1131 /* Whether this represents a numeric conversion opcode */
1132 bool is_conversion;
1133 } nir_op_info;
1134
1135 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1136
1137 typedef struct nir_alu_instr {
1138 nir_instr instr;
1139 nir_op op;
1140
1141 /** Indicates that this ALU instruction generates an exact value
1142 *
1143 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1144 * really equivalent to either. This indicates that the value generated by
1145 * this operation is high-precision and any code transformations that touch
1146 * it must ensure that the resulting value is bit-for-bit identical to the
1147 * original.
1148 */
1149 bool exact:1;
1150
1151 /**
1152 * Indicates that this instruction do not cause wrapping to occur, in the
1153 * form of overflow or underflow.
1154 */
1155 bool no_signed_wrap:1;
1156 bool no_unsigned_wrap:1;
1157
1158 nir_alu_dest dest;
1159 nir_alu_src src[];
1160 } nir_alu_instr;
1161
1162 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1163 nir_alu_instr *instr);
1164 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1165 nir_alu_instr *instr);
1166
1167 /* is this source channel used? */
1168 static inline bool
1169 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1170 unsigned channel)
1171 {
1172 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1173 return channel < nir_op_infos[instr->op].input_sizes[src];
1174
1175 return (instr->dest.write_mask >> channel) & 1;
1176 }
1177
1178 static inline nir_component_mask_t
1179 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1180 {
1181 nir_component_mask_t read_mask = 0;
1182 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1183 if (!nir_alu_instr_channel_used(instr, src, c))
1184 continue;
1185
1186 read_mask |= (1 << instr->src[src].swizzle[c]);
1187 }
1188 return read_mask;
1189 }
1190
1191 /**
1192 * Get the number of channels used for a source
1193 */
1194 static inline unsigned
1195 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1196 {
1197 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1198 return nir_op_infos[instr->op].input_sizes[src];
1199
1200 return nir_dest_num_components(instr->dest.dest);
1201 }
1202
1203 static inline bool
1204 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1205 {
1206 switch (instr->op) {
1207 case nir_op_flt:
1208 case nir_op_fge:
1209 case nir_op_feq:
1210 case nir_op_fne:
1211 case nir_op_ilt:
1212 case nir_op_ult:
1213 case nir_op_ige:
1214 case nir_op_uge:
1215 case nir_op_ieq:
1216 case nir_op_ine:
1217 case nir_op_i2b1:
1218 case nir_op_f2b1:
1219 case nir_op_inot:
1220 return true;
1221 default:
1222 return false;
1223 }
1224 }
1225
1226 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1227 nir_alu_type full_type);
1228
1229 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1230 unsigned src1, unsigned src2);
1231
1232 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1233 const nir_alu_instr *alu2,
1234 unsigned src1, unsigned src2);
1235
1236 typedef enum {
1237 nir_deref_type_var,
1238 nir_deref_type_array,
1239 nir_deref_type_array_wildcard,
1240 nir_deref_type_ptr_as_array,
1241 nir_deref_type_struct,
1242 nir_deref_type_cast,
1243 } nir_deref_type;
1244
1245 typedef struct {
1246 nir_instr instr;
1247
1248 /** The type of this deref instruction */
1249 nir_deref_type deref_type;
1250
1251 /** The mode of the underlying variable */
1252 nir_variable_mode mode;
1253
1254 /** The dereferenced type of the resulting pointer value */
1255 const struct glsl_type *type;
1256
1257 union {
1258 /** Variable being dereferenced if deref_type is a deref_var */
1259 nir_variable *var;
1260
1261 /** Parent deref if deref_type is not deref_var */
1262 nir_src parent;
1263 };
1264
1265 /** Additional deref parameters */
1266 union {
1267 struct {
1268 nir_src index;
1269 } arr;
1270
1271 struct {
1272 unsigned index;
1273 } strct;
1274
1275 struct {
1276 unsigned ptr_stride;
1277 } cast;
1278 };
1279
1280 /** Destination to store the resulting "pointer" */
1281 nir_dest dest;
1282 } nir_deref_instr;
1283
1284 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1285
1286 static inline nir_deref_instr *
1287 nir_deref_instr_parent(const nir_deref_instr *instr)
1288 {
1289 if (instr->deref_type == nir_deref_type_var)
1290 return NULL;
1291 else
1292 return nir_src_as_deref(instr->parent);
1293 }
1294
1295 static inline nir_variable *
1296 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1297 {
1298 while (instr->deref_type != nir_deref_type_var) {
1299 if (instr->deref_type == nir_deref_type_cast)
1300 return NULL;
1301
1302 instr = nir_deref_instr_parent(instr);
1303 }
1304
1305 return instr->var;
1306 }
1307
1308 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1309 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1310 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1311
1312 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1313
1314 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1315
1316 typedef struct {
1317 nir_instr instr;
1318
1319 struct nir_function *callee;
1320
1321 unsigned num_params;
1322 nir_src params[];
1323 } nir_call_instr;
1324
1325 #include "nir_intrinsics.h"
1326
1327 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1328
1329 /** Represents an intrinsic
1330 *
1331 * An intrinsic is an instruction type for handling things that are
1332 * more-or-less regular operations but don't just consume and produce SSA
1333 * values like ALU operations do. Intrinsics are not for things that have
1334 * special semantic meaning such as phi nodes and parallel copies.
1335 * Examples of intrinsics include variable load/store operations, system
1336 * value loads, and the like. Even though texturing more-or-less falls
1337 * under this category, texturing is its own instruction type because
1338 * trying to represent texturing with intrinsics would lead to a
1339 * combinatorial explosion of intrinsic opcodes.
1340 *
1341 * By having a single instruction type for handling a lot of different
1342 * cases, optimization passes can look for intrinsics and, for the most
1343 * part, completely ignore them. Each intrinsic type also has a few
1344 * possible flags that govern whether or not they can be reordered or
1345 * eliminated. That way passes like dead code elimination can still work
1346 * on intrisics without understanding the meaning of each.
1347 *
1348 * Each intrinsic has some number of constant indices, some number of
1349 * variables, and some number of sources. What these sources, variables,
1350 * and indices mean depends on the intrinsic and is documented with the
1351 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1352 * instructions are the only types of instruction that can operate on
1353 * variables.
1354 */
1355 typedef struct {
1356 nir_instr instr;
1357
1358 nir_intrinsic_op intrinsic;
1359
1360 nir_dest dest;
1361
1362 /** number of components if this is a vectorized intrinsic
1363 *
1364 * Similarly to ALU operations, some intrinsics are vectorized.
1365 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1366 * For vectorized intrinsics, the num_components field specifies the
1367 * number of destination components and the number of source components
1368 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1369 */
1370 uint8_t num_components;
1371
1372 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1373
1374 nir_src src[];
1375 } nir_intrinsic_instr;
1376
1377 static inline nir_variable *
1378 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1379 {
1380 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1381 }
1382
1383 typedef enum {
1384 /* Memory ordering. */
1385 NIR_MEMORY_ACQUIRE = 1 << 0,
1386 NIR_MEMORY_RELEASE = 1 << 1,
1387
1388 /* Memory visibility operations. */
1389 NIR_MEMORY_MAKE_AVAILABLE = 1 << 3,
1390 NIR_MEMORY_MAKE_VISIBLE = 1 << 4,
1391 } nir_memory_semantics;
1392
1393 typedef enum {
1394 NIR_SCOPE_DEVICE,
1395 NIR_SCOPE_QUEUE_FAMILY,
1396 NIR_SCOPE_WORKGROUP,
1397 NIR_SCOPE_SUBGROUP,
1398 NIR_SCOPE_INVOCATION,
1399 } nir_scope;
1400
1401 /**
1402 * \name NIR intrinsics semantic flags
1403 *
1404 * information about what the compiler can do with the intrinsics.
1405 *
1406 * \sa nir_intrinsic_info::flags
1407 */
1408 typedef enum {
1409 /**
1410 * whether the intrinsic can be safely eliminated if none of its output
1411 * value is not being used.
1412 */
1413 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1414
1415 /**
1416 * Whether the intrinsic can be reordered with respect to any other
1417 * intrinsic, i.e. whether the only reordering dependencies of the
1418 * intrinsic are due to the register reads/writes.
1419 */
1420 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1421 } nir_intrinsic_semantic_flag;
1422
1423 /**
1424 * \name NIR intrinsics const-index flag
1425 *
1426 * Indicates the usage of a const_index slot.
1427 *
1428 * \sa nir_intrinsic_info::index_map
1429 */
1430 typedef enum {
1431 /**
1432 * Generally instructions that take a offset src argument, can encode
1433 * a constant 'base' value which is added to the offset.
1434 */
1435 NIR_INTRINSIC_BASE = 1,
1436
1437 /**
1438 * For store instructions, a writemask for the store.
1439 */
1440 NIR_INTRINSIC_WRMASK,
1441
1442 /**
1443 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1444 */
1445 NIR_INTRINSIC_STREAM_ID,
1446
1447 /**
1448 * The clip-plane id for load_user_clip_plane intrinsic.
1449 */
1450 NIR_INTRINSIC_UCP_ID,
1451
1452 /**
1453 * The amount of data, starting from BASE, that this instruction may
1454 * access. This is used to provide bounds if the offset is not constant.
1455 */
1456 NIR_INTRINSIC_RANGE,
1457
1458 /**
1459 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1460 */
1461 NIR_INTRINSIC_DESC_SET,
1462
1463 /**
1464 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1465 */
1466 NIR_INTRINSIC_BINDING,
1467
1468 /**
1469 * Component offset.
1470 */
1471 NIR_INTRINSIC_COMPONENT,
1472
1473 /**
1474 * Interpolation mode (only meaningful for FS inputs).
1475 */
1476 NIR_INTRINSIC_INTERP_MODE,
1477
1478 /**
1479 * A binary nir_op to use when performing a reduction or scan operation
1480 */
1481 NIR_INTRINSIC_REDUCTION_OP,
1482
1483 /**
1484 * Cluster size for reduction operations
1485 */
1486 NIR_INTRINSIC_CLUSTER_SIZE,
1487
1488 /**
1489 * Parameter index for a load_param intrinsic
1490 */
1491 NIR_INTRINSIC_PARAM_IDX,
1492
1493 /**
1494 * Image dimensionality for image intrinsics
1495 *
1496 * One of GLSL_SAMPLER_DIM_*
1497 */
1498 NIR_INTRINSIC_IMAGE_DIM,
1499
1500 /**
1501 * Non-zero if we are accessing an array image
1502 */
1503 NIR_INTRINSIC_IMAGE_ARRAY,
1504
1505 /**
1506 * Image format for image intrinsics
1507 */
1508 NIR_INTRINSIC_FORMAT,
1509
1510 /**
1511 * Access qualifiers for image and memory access intrinsics
1512 */
1513 NIR_INTRINSIC_ACCESS,
1514
1515 /**
1516 * Alignment for offsets and addresses
1517 *
1518 * These two parameters, specify an alignment in terms of a multiplier and
1519 * an offset. The offset or address parameter X of the intrinsic is
1520 * guaranteed to satisfy the following:
1521 *
1522 * (X - align_offset) % align_mul == 0
1523 */
1524 NIR_INTRINSIC_ALIGN_MUL,
1525 NIR_INTRINSIC_ALIGN_OFFSET,
1526
1527 /**
1528 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1529 */
1530 NIR_INTRINSIC_DESC_TYPE,
1531
1532 /**
1533 * The nir_alu_type of a uniform/input/output
1534 */
1535 NIR_INTRINSIC_TYPE,
1536
1537 /**
1538 * The swizzle mask for the instructions
1539 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1540 */
1541 NIR_INTRINSIC_SWIZZLE_MASK,
1542
1543 /* Separate source/dest access flags for copies */
1544 NIR_INTRINSIC_SRC_ACCESS,
1545 NIR_INTRINSIC_DST_ACCESS,
1546
1547 /* Driver location for nir_load_patch_location_ir3 */
1548 NIR_INTRINSIC_DRIVER_LOCATION,
1549
1550 /**
1551 * Mask of nir_memory_semantics, includes ordering and visibility.
1552 */
1553 NIR_INTRINSIC_MEMORY_SEMANTICS,
1554
1555 /**
1556 * Mask of nir_variable_modes affected by the memory operation.
1557 */
1558 NIR_INTRINSIC_MEMORY_MODES,
1559
1560 /**
1561 * Value of nir_scope.
1562 */
1563 NIR_INTRINSIC_MEMORY_SCOPE,
1564
1565 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1566
1567 } nir_intrinsic_index_flag;
1568
1569 #define NIR_INTRINSIC_MAX_INPUTS 5
1570
1571 typedef struct {
1572 const char *name;
1573
1574 unsigned num_srcs; /** < number of register/SSA inputs */
1575
1576 /** number of components of each input register
1577 *
1578 * If this value is 0, the number of components is given by the
1579 * num_components field of nir_intrinsic_instr. If this value is -1, the
1580 * intrinsic consumes however many components are provided and it is not
1581 * validated at all.
1582 */
1583 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1584
1585 bool has_dest;
1586
1587 /** number of components of the output register
1588 *
1589 * If this value is 0, the number of components is given by the
1590 * num_components field of nir_intrinsic_instr.
1591 */
1592 unsigned dest_components;
1593
1594 /** bitfield of legal bit sizes */
1595 unsigned dest_bit_sizes;
1596
1597 /** the number of constant indices used by the intrinsic */
1598 unsigned num_indices;
1599
1600 /** indicates the usage of intr->const_index[n] */
1601 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1602
1603 /** semantic flags for calls to this intrinsic */
1604 nir_intrinsic_semantic_flag flags;
1605 } nir_intrinsic_info;
1606
1607 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1608
1609 static inline unsigned
1610 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1611 {
1612 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1613 assert(srcn < info->num_srcs);
1614 if (info->src_components[srcn] > 0)
1615 return info->src_components[srcn];
1616 else if (info->src_components[srcn] == 0)
1617 return intr->num_components;
1618 else
1619 return nir_src_num_components(intr->src[srcn]);
1620 }
1621
1622 static inline unsigned
1623 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1624 {
1625 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1626 if (!info->has_dest)
1627 return 0;
1628 else if (info->dest_components)
1629 return info->dest_components;
1630 else
1631 return intr->num_components;
1632 }
1633
1634 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1635 static inline type \
1636 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1637 { \
1638 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1639 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1640 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1641 } \
1642 static inline void \
1643 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1644 { \
1645 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1646 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1647 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1648 }
1649
1650 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1651 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1652 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1653 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1654 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1655 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1656 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1657 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1658 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1659 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1660 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1661 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1662 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1663 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1664 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1665 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1666 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1667 INTRINSIC_IDX_ACCESSORS(format, FORMAT, unsigned)
1668 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1669 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1670 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1671 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1672 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1673 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1674 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1675 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1676 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1677
1678 static inline void
1679 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1680 unsigned align_mul, unsigned align_offset)
1681 {
1682 assert(util_is_power_of_two_nonzero(align_mul));
1683 assert(align_offset < align_mul);
1684 nir_intrinsic_set_align_mul(intrin, align_mul);
1685 nir_intrinsic_set_align_offset(intrin, align_offset);
1686 }
1687
1688 /** Returns a simple alignment for a load/store intrinsic offset
1689 *
1690 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1691 * and ALIGN_OFFSET parameters, this helper takes both into account and
1692 * provides a single simple alignment parameter. The offset X is guaranteed
1693 * to satisfy X % align == 0.
1694 */
1695 static inline unsigned
1696 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1697 {
1698 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1699 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1700 assert(align_offset < align_mul);
1701 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1702 }
1703
1704 /* Converts a image_deref_* intrinsic into a image_* one */
1705 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1706 nir_ssa_def *handle, bool bindless);
1707
1708 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1709 static inline bool
1710 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1711 {
1712 if (instr->intrinsic == nir_intrinsic_load_deref ||
1713 instr->intrinsic == nir_intrinsic_load_ssbo ||
1714 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1715 instr->intrinsic == nir_intrinsic_image_deref_load ||
1716 instr->intrinsic == nir_intrinsic_image_load) {
1717 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1718 } else {
1719 const nir_intrinsic_info *info =
1720 &nir_intrinsic_infos[instr->intrinsic];
1721 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1722 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1723 }
1724 }
1725
1726 /**
1727 * \group texture information
1728 *
1729 * This gives semantic information about textures which is useful to the
1730 * frontend, the backend, and lowering passes, but not the optimizer.
1731 */
1732
1733 typedef enum {
1734 nir_tex_src_coord,
1735 nir_tex_src_projector,
1736 nir_tex_src_comparator, /* shadow comparator */
1737 nir_tex_src_offset,
1738 nir_tex_src_bias,
1739 nir_tex_src_lod,
1740 nir_tex_src_min_lod,
1741 nir_tex_src_ms_index, /* MSAA sample index */
1742 nir_tex_src_ms_mcs, /* MSAA compression value */
1743 nir_tex_src_ddx,
1744 nir_tex_src_ddy,
1745 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1746 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1747 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1748 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1749 nir_tex_src_texture_handle, /* < bindless texture handle */
1750 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1751 nir_tex_src_plane, /* < selects plane for planar textures */
1752 nir_num_tex_src_types
1753 } nir_tex_src_type;
1754
1755 typedef struct {
1756 nir_src src;
1757 nir_tex_src_type src_type;
1758 } nir_tex_src;
1759
1760 typedef enum {
1761 nir_texop_tex, /**< Regular texture look-up */
1762 nir_texop_txb, /**< Texture look-up with LOD bias */
1763 nir_texop_txl, /**< Texture look-up with explicit LOD */
1764 nir_texop_txd, /**< Texture look-up with partial derivatives */
1765 nir_texop_txf, /**< Texel fetch with explicit LOD */
1766 nir_texop_txf_ms, /**< Multisample texture fetch */
1767 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1768 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1769 nir_texop_txs, /**< Texture size */
1770 nir_texop_lod, /**< Texture lod query */
1771 nir_texop_tg4, /**< Texture gather */
1772 nir_texop_query_levels, /**< Texture levels query */
1773 nir_texop_texture_samples, /**< Texture samples query */
1774 nir_texop_samples_identical, /**< Query whether all samples are definitely
1775 * identical.
1776 */
1777 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1778 } nir_texop;
1779
1780 typedef struct {
1781 nir_instr instr;
1782
1783 enum glsl_sampler_dim sampler_dim;
1784 nir_alu_type dest_type;
1785
1786 nir_texop op;
1787 nir_dest dest;
1788 nir_tex_src *src;
1789 unsigned num_srcs, coord_components;
1790 bool is_array, is_shadow;
1791
1792 /**
1793 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1794 * components or the new-style shadow that outputs 1 component.
1795 */
1796 bool is_new_style_shadow;
1797
1798 /* gather component selector */
1799 unsigned component : 2;
1800
1801 /* gather offsets */
1802 int8_t tg4_offsets[4][2];
1803
1804 /* True if the texture index or handle is not dynamically uniform */
1805 bool texture_non_uniform;
1806
1807 /* True if the sampler index or handle is not dynamically uniform */
1808 bool sampler_non_uniform;
1809
1810 /** The texture index
1811 *
1812 * If this texture instruction has a nir_tex_src_texture_offset source,
1813 * then the texture index is given by texture_index + texture_offset.
1814 */
1815 unsigned texture_index;
1816
1817 /** The size of the texture array or 0 if it's not an array */
1818 unsigned texture_array_size;
1819
1820 /** The sampler index
1821 *
1822 * The following operations do not require a sampler and, as such, this
1823 * field should be ignored:
1824 * - nir_texop_txf
1825 * - nir_texop_txf_ms
1826 * - nir_texop_txs
1827 * - nir_texop_lod
1828 * - nir_texop_query_levels
1829 * - nir_texop_texture_samples
1830 * - nir_texop_samples_identical
1831 *
1832 * If this texture instruction has a nir_tex_src_sampler_offset source,
1833 * then the sampler index is given by sampler_index + sampler_offset.
1834 */
1835 unsigned sampler_index;
1836 } nir_tex_instr;
1837
1838 static inline unsigned
1839 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1840 {
1841 switch (instr->op) {
1842 case nir_texop_txs: {
1843 unsigned ret;
1844 switch (instr->sampler_dim) {
1845 case GLSL_SAMPLER_DIM_1D:
1846 case GLSL_SAMPLER_DIM_BUF:
1847 ret = 1;
1848 break;
1849 case GLSL_SAMPLER_DIM_2D:
1850 case GLSL_SAMPLER_DIM_CUBE:
1851 case GLSL_SAMPLER_DIM_MS:
1852 case GLSL_SAMPLER_DIM_RECT:
1853 case GLSL_SAMPLER_DIM_EXTERNAL:
1854 case GLSL_SAMPLER_DIM_SUBPASS:
1855 ret = 2;
1856 break;
1857 case GLSL_SAMPLER_DIM_3D:
1858 ret = 3;
1859 break;
1860 default:
1861 unreachable("not reached");
1862 }
1863 if (instr->is_array)
1864 ret++;
1865 return ret;
1866 }
1867
1868 case nir_texop_lod:
1869 return 2;
1870
1871 case nir_texop_texture_samples:
1872 case nir_texop_query_levels:
1873 case nir_texop_samples_identical:
1874 return 1;
1875
1876 default:
1877 if (instr->is_shadow && instr->is_new_style_shadow)
1878 return 1;
1879
1880 return 4;
1881 }
1882 }
1883
1884 /* Returns true if this texture operation queries something about the texture
1885 * rather than actually sampling it.
1886 */
1887 static inline bool
1888 nir_tex_instr_is_query(const nir_tex_instr *instr)
1889 {
1890 switch (instr->op) {
1891 case nir_texop_txs:
1892 case nir_texop_lod:
1893 case nir_texop_texture_samples:
1894 case nir_texop_query_levels:
1895 case nir_texop_txf_ms_mcs:
1896 return true;
1897 case nir_texop_tex:
1898 case nir_texop_txb:
1899 case nir_texop_txl:
1900 case nir_texop_txd:
1901 case nir_texop_txf:
1902 case nir_texop_txf_ms:
1903 case nir_texop_txf_ms_fb:
1904 case nir_texop_tg4:
1905 return false;
1906 default:
1907 unreachable("Invalid texture opcode");
1908 }
1909 }
1910
1911 static inline bool
1912 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1913 {
1914 switch (instr->op) {
1915 case nir_texop_tex:
1916 case nir_texop_txb:
1917 case nir_texop_lod:
1918 return true;
1919 default:
1920 return false;
1921 }
1922 }
1923
1924 static inline nir_alu_type
1925 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1926 {
1927 switch (instr->src[src].src_type) {
1928 case nir_tex_src_coord:
1929 switch (instr->op) {
1930 case nir_texop_txf:
1931 case nir_texop_txf_ms:
1932 case nir_texop_txf_ms_fb:
1933 case nir_texop_txf_ms_mcs:
1934 case nir_texop_samples_identical:
1935 return nir_type_int;
1936
1937 default:
1938 return nir_type_float;
1939 }
1940
1941 case nir_tex_src_lod:
1942 switch (instr->op) {
1943 case nir_texop_txs:
1944 case nir_texop_txf:
1945 return nir_type_int;
1946
1947 default:
1948 return nir_type_float;
1949 }
1950
1951 case nir_tex_src_projector:
1952 case nir_tex_src_comparator:
1953 case nir_tex_src_bias:
1954 case nir_tex_src_min_lod:
1955 case nir_tex_src_ddx:
1956 case nir_tex_src_ddy:
1957 return nir_type_float;
1958
1959 case nir_tex_src_offset:
1960 case nir_tex_src_ms_index:
1961 case nir_tex_src_plane:
1962 return nir_type_int;
1963
1964 case nir_tex_src_ms_mcs:
1965 case nir_tex_src_texture_deref:
1966 case nir_tex_src_sampler_deref:
1967 case nir_tex_src_texture_offset:
1968 case nir_tex_src_sampler_offset:
1969 case nir_tex_src_texture_handle:
1970 case nir_tex_src_sampler_handle:
1971 return nir_type_uint;
1972
1973 case nir_num_tex_src_types:
1974 unreachable("nir_num_tex_src_types is not a valid source type");
1975 }
1976
1977 unreachable("Invalid texture source type");
1978 }
1979
1980 static inline unsigned
1981 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
1982 {
1983 if (instr->src[src].src_type == nir_tex_src_coord)
1984 return instr->coord_components;
1985
1986 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
1987 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
1988 return 4;
1989
1990 if (instr->src[src].src_type == nir_tex_src_ddx ||
1991 instr->src[src].src_type == nir_tex_src_ddy) {
1992 if (instr->is_array)
1993 return instr->coord_components - 1;
1994 else
1995 return instr->coord_components;
1996 }
1997
1998 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
1999 * the offset, since a cube maps to a single face.
2000 */
2001 if (instr->src[src].src_type == nir_tex_src_offset) {
2002 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2003 return 2;
2004 else if (instr->is_array)
2005 return instr->coord_components - 1;
2006 else
2007 return instr->coord_components;
2008 }
2009
2010 return 1;
2011 }
2012
2013 static inline int
2014 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2015 {
2016 for (unsigned i = 0; i < instr->num_srcs; i++)
2017 if (instr->src[i].src_type == type)
2018 return (int) i;
2019
2020 return -1;
2021 }
2022
2023 void nir_tex_instr_add_src(nir_tex_instr *tex,
2024 nir_tex_src_type src_type,
2025 nir_src src);
2026
2027 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2028
2029 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2030
2031 typedef struct {
2032 nir_instr instr;
2033
2034 nir_ssa_def def;
2035
2036 nir_const_value value[];
2037 } nir_load_const_instr;
2038
2039 typedef enum {
2040 nir_jump_return,
2041 nir_jump_break,
2042 nir_jump_continue,
2043 } nir_jump_type;
2044
2045 typedef struct {
2046 nir_instr instr;
2047 nir_jump_type type;
2048 } nir_jump_instr;
2049
2050 /* creates a new SSA variable in an undefined state */
2051
2052 typedef struct {
2053 nir_instr instr;
2054 nir_ssa_def def;
2055 } nir_ssa_undef_instr;
2056
2057 typedef struct {
2058 struct exec_node node;
2059
2060 /* The predecessor block corresponding to this source */
2061 struct nir_block *pred;
2062
2063 nir_src src;
2064 } nir_phi_src;
2065
2066 #define nir_foreach_phi_src(phi_src, phi) \
2067 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2068 #define nir_foreach_phi_src_safe(phi_src, phi) \
2069 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2070
2071 typedef struct {
2072 nir_instr instr;
2073
2074 struct exec_list srcs; /** < list of nir_phi_src */
2075
2076 nir_dest dest;
2077 } nir_phi_instr;
2078
2079 typedef struct {
2080 struct exec_node node;
2081 nir_src src;
2082 nir_dest dest;
2083 } nir_parallel_copy_entry;
2084
2085 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2086 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2087
2088 typedef struct {
2089 nir_instr instr;
2090
2091 /* A list of nir_parallel_copy_entrys. The sources of all of the
2092 * entries are copied to the corresponding destinations "in parallel".
2093 * In other words, if we have two entries: a -> b and b -> a, the values
2094 * get swapped.
2095 */
2096 struct exec_list entries;
2097 } nir_parallel_copy_instr;
2098
2099 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2100 type, nir_instr_type_alu)
2101 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2102 type, nir_instr_type_deref)
2103 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2104 type, nir_instr_type_call)
2105 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2106 type, nir_instr_type_jump)
2107 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2108 type, nir_instr_type_tex)
2109 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2110 type, nir_instr_type_intrinsic)
2111 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2112 type, nir_instr_type_load_const)
2113 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2114 type, nir_instr_type_ssa_undef)
2115 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2116 type, nir_instr_type_phi)
2117 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2118 nir_parallel_copy_instr, instr,
2119 type, nir_instr_type_parallel_copy)
2120
2121
2122 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2123 static inline type \
2124 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2125 { \
2126 assert(nir_src_is_const(src)); \
2127 nir_load_const_instr *load = \
2128 nir_instr_as_load_const(src.ssa->parent_instr); \
2129 assert(comp < load->def.num_components); \
2130 return nir_const_value_as_##suffix(load->value[comp], \
2131 load->def.bit_size); \
2132 } \
2133 \
2134 static inline type \
2135 nir_src_as_##suffix(nir_src src) \
2136 { \
2137 assert(nir_src_num_components(src) == 1); \
2138 return nir_src_comp_as_##suffix(src, 0); \
2139 }
2140
2141 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2142 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2143 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2144 NIR_DEFINE_SRC_AS_CONST(double, float)
2145
2146 #undef NIR_DEFINE_SRC_AS_CONST
2147
2148
2149 typedef struct {
2150 nir_ssa_def *def;
2151 unsigned comp;
2152 } nir_ssa_scalar;
2153
2154 static inline bool
2155 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2156 {
2157 return s.def->parent_instr->type == nir_instr_type_load_const;
2158 }
2159
2160 static inline nir_const_value
2161 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2162 {
2163 assert(s.comp < s.def->num_components);
2164 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2165 return load->value[s.comp];
2166 }
2167
2168 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2169 static inline type \
2170 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2171 { \
2172 return nir_const_value_as_##suffix( \
2173 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2174 }
2175
2176 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2177 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2178 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2179 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2180
2181 #undef NIR_DEFINE_SCALAR_AS_CONST
2182
2183 static inline bool
2184 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2185 {
2186 return s.def->parent_instr->type == nir_instr_type_alu;
2187 }
2188
2189 static inline nir_op
2190 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2191 {
2192 return nir_instr_as_alu(s.def->parent_instr)->op;
2193 }
2194
2195 static inline nir_ssa_scalar
2196 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2197 {
2198 nir_ssa_scalar out = { NULL, 0 };
2199
2200 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2201 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2202
2203 /* Our component must be written */
2204 assert(s.comp < s.def->num_components);
2205 assert(alu->dest.write_mask & (1u << s.comp));
2206
2207 assert(alu->src[alu_src_idx].src.is_ssa);
2208 out.def = alu->src[alu_src_idx].src.ssa;
2209
2210 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2211 /* The ALU src is unsized so the source component follows the
2212 * destination component.
2213 */
2214 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2215 } else {
2216 /* This is a sized source so all source components work together to
2217 * produce all the destination components. Since we need to return a
2218 * scalar, this only works if the source is a scalar.
2219 */
2220 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2221 out.comp = alu->src[alu_src_idx].swizzle[0];
2222 }
2223 assert(out.comp < out.def->num_components);
2224
2225 return out;
2226 }
2227
2228
2229 /*
2230 * Control flow
2231 *
2232 * Control flow consists of a tree of control flow nodes, which include
2233 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2234 * instructions that always run start-to-finish. Each basic block also keeps
2235 * track of its successors (blocks which may run immediately after the current
2236 * block) and predecessors (blocks which could have run immediately before the
2237 * current block). Each function also has a start block and an end block which
2238 * all return statements point to (which is always empty). Together, all the
2239 * blocks with their predecessors and successors make up the control flow
2240 * graph (CFG) of the function. There are helpers that modify the tree of
2241 * control flow nodes while modifying the CFG appropriately; these should be
2242 * used instead of modifying the tree directly.
2243 */
2244
2245 typedef enum {
2246 nir_cf_node_block,
2247 nir_cf_node_if,
2248 nir_cf_node_loop,
2249 nir_cf_node_function
2250 } nir_cf_node_type;
2251
2252 typedef struct nir_cf_node {
2253 struct exec_node node;
2254 nir_cf_node_type type;
2255 struct nir_cf_node *parent;
2256 } nir_cf_node;
2257
2258 typedef struct nir_block {
2259 nir_cf_node cf_node;
2260
2261 struct exec_list instr_list; /** < list of nir_instr */
2262
2263 /** generic block index; generated by nir_index_blocks */
2264 unsigned index;
2265
2266 /*
2267 * Each block can only have up to 2 successors, so we put them in a simple
2268 * array - no need for anything more complicated.
2269 */
2270 struct nir_block *successors[2];
2271
2272 /* Set of nir_block predecessors in the CFG */
2273 struct set *predecessors;
2274
2275 /*
2276 * this node's immediate dominator in the dominance tree - set to NULL for
2277 * the start block.
2278 */
2279 struct nir_block *imm_dom;
2280
2281 /* This node's children in the dominance tree */
2282 unsigned num_dom_children;
2283 struct nir_block **dom_children;
2284
2285 /* Set of nir_blocks on the dominance frontier of this block */
2286 struct set *dom_frontier;
2287
2288 /*
2289 * These two indices have the property that dom_{pre,post}_index for each
2290 * child of this block in the dominance tree will always be between
2291 * dom_pre_index and dom_post_index for this block, which makes testing if
2292 * a given block is dominated by another block an O(1) operation.
2293 */
2294 unsigned dom_pre_index, dom_post_index;
2295
2296 /* live in and out for this block; used for liveness analysis */
2297 BITSET_WORD *live_in;
2298 BITSET_WORD *live_out;
2299 } nir_block;
2300
2301 static inline nir_instr *
2302 nir_block_first_instr(nir_block *block)
2303 {
2304 struct exec_node *head = exec_list_get_head(&block->instr_list);
2305 return exec_node_data(nir_instr, head, node);
2306 }
2307
2308 static inline nir_instr *
2309 nir_block_last_instr(nir_block *block)
2310 {
2311 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2312 return exec_node_data(nir_instr, tail, node);
2313 }
2314
2315 static inline bool
2316 nir_block_ends_in_jump(nir_block *block)
2317 {
2318 return !exec_list_is_empty(&block->instr_list) &&
2319 nir_block_last_instr(block)->type == nir_instr_type_jump;
2320 }
2321
2322 #define nir_foreach_instr(instr, block) \
2323 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2324 #define nir_foreach_instr_reverse(instr, block) \
2325 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2326 #define nir_foreach_instr_safe(instr, block) \
2327 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2328 #define nir_foreach_instr_reverse_safe(instr, block) \
2329 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2330
2331 typedef enum {
2332 nir_selection_control_none = 0x0,
2333 nir_selection_control_flatten = 0x1,
2334 nir_selection_control_dont_flatten = 0x2,
2335 } nir_selection_control;
2336
2337 typedef struct nir_if {
2338 nir_cf_node cf_node;
2339 nir_src condition;
2340 nir_selection_control control;
2341
2342 struct exec_list then_list; /** < list of nir_cf_node */
2343 struct exec_list else_list; /** < list of nir_cf_node */
2344 } nir_if;
2345
2346 typedef struct {
2347 nir_if *nif;
2348
2349 /** Instruction that generates nif::condition. */
2350 nir_instr *conditional_instr;
2351
2352 /** Block within ::nif that has the break instruction. */
2353 nir_block *break_block;
2354
2355 /** Last block for the then- or else-path that does not contain the break. */
2356 nir_block *continue_from_block;
2357
2358 /** True when ::break_block is in the else-path of ::nif. */
2359 bool continue_from_then;
2360 bool induction_rhs;
2361
2362 /* This is true if the terminators exact trip count is unknown. For
2363 * example:
2364 *
2365 * for (int i = 0; i < imin(x, 4); i++)
2366 * ...
2367 *
2368 * Here loop analysis would have set a max_trip_count of 4 however we dont
2369 * know for sure that this is the exact trip count.
2370 */
2371 bool exact_trip_count_unknown;
2372
2373 struct list_head loop_terminator_link;
2374 } nir_loop_terminator;
2375
2376 typedef struct {
2377 /* Estimated cost (in number of instructions) of the loop */
2378 unsigned instr_cost;
2379
2380 /* Guessed trip count based on array indexing */
2381 unsigned guessed_trip_count;
2382
2383 /* Maximum number of times the loop is run (if known) */
2384 unsigned max_trip_count;
2385
2386 /* Do we know the exact number of times the loop will be run */
2387 bool exact_trip_count_known;
2388
2389 /* Unroll the loop regardless of its size */
2390 bool force_unroll;
2391
2392 /* Does the loop contain complex loop terminators, continues or other
2393 * complex behaviours? If this is true we can't rely on
2394 * loop_terminator_list to be complete or accurate.
2395 */
2396 bool complex_loop;
2397
2398 nir_loop_terminator *limiting_terminator;
2399
2400 /* A list of loop_terminators terminating this loop. */
2401 struct list_head loop_terminator_list;
2402 } nir_loop_info;
2403
2404 typedef enum {
2405 nir_loop_control_none = 0x0,
2406 nir_loop_control_unroll = 0x1,
2407 nir_loop_control_dont_unroll = 0x2,
2408 } nir_loop_control;
2409
2410 typedef struct {
2411 nir_cf_node cf_node;
2412
2413 struct exec_list body; /** < list of nir_cf_node */
2414
2415 nir_loop_info *info;
2416 nir_loop_control control;
2417 bool partially_unrolled;
2418 } nir_loop;
2419
2420 /**
2421 * Various bits of metadata that can may be created or required by
2422 * optimization and analysis passes
2423 */
2424 typedef enum {
2425 nir_metadata_none = 0x0,
2426 nir_metadata_block_index = 0x1,
2427 nir_metadata_dominance = 0x2,
2428 nir_metadata_live_ssa_defs = 0x4,
2429 nir_metadata_not_properly_reset = 0x8,
2430 nir_metadata_loop_analysis = 0x10,
2431 } nir_metadata;
2432
2433 typedef struct {
2434 nir_cf_node cf_node;
2435
2436 /** pointer to the function of which this is an implementation */
2437 struct nir_function *function;
2438
2439 struct exec_list body; /** < list of nir_cf_node */
2440
2441 nir_block *end_block;
2442
2443 /** list for all local variables in the function */
2444 struct exec_list locals;
2445
2446 /** list of local registers in the function */
2447 struct exec_list registers;
2448
2449 /** next available local register index */
2450 unsigned reg_alloc;
2451
2452 /** next available SSA value index */
2453 unsigned ssa_alloc;
2454
2455 /* total number of basic blocks, only valid when block_index_dirty = false */
2456 unsigned num_blocks;
2457
2458 nir_metadata valid_metadata;
2459 } nir_function_impl;
2460
2461 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2462 nir_start_block(nir_function_impl *impl)
2463 {
2464 return (nir_block *) impl->body.head_sentinel.next;
2465 }
2466
2467 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2468 nir_impl_last_block(nir_function_impl *impl)
2469 {
2470 return (nir_block *) impl->body.tail_sentinel.prev;
2471 }
2472
2473 static inline nir_cf_node *
2474 nir_cf_node_next(nir_cf_node *node)
2475 {
2476 struct exec_node *next = exec_node_get_next(&node->node);
2477 if (exec_node_is_tail_sentinel(next))
2478 return NULL;
2479 else
2480 return exec_node_data(nir_cf_node, next, node);
2481 }
2482
2483 static inline nir_cf_node *
2484 nir_cf_node_prev(nir_cf_node *node)
2485 {
2486 struct exec_node *prev = exec_node_get_prev(&node->node);
2487 if (exec_node_is_head_sentinel(prev))
2488 return NULL;
2489 else
2490 return exec_node_data(nir_cf_node, prev, node);
2491 }
2492
2493 static inline bool
2494 nir_cf_node_is_first(const nir_cf_node *node)
2495 {
2496 return exec_node_is_head_sentinel(node->node.prev);
2497 }
2498
2499 static inline bool
2500 nir_cf_node_is_last(const nir_cf_node *node)
2501 {
2502 return exec_node_is_tail_sentinel(node->node.next);
2503 }
2504
2505 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2506 type, nir_cf_node_block)
2507 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2508 type, nir_cf_node_if)
2509 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2510 type, nir_cf_node_loop)
2511 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2512 nir_function_impl, cf_node, type, nir_cf_node_function)
2513
2514 static inline nir_block *
2515 nir_if_first_then_block(nir_if *if_stmt)
2516 {
2517 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2518 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2519 }
2520
2521 static inline nir_block *
2522 nir_if_last_then_block(nir_if *if_stmt)
2523 {
2524 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2525 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2526 }
2527
2528 static inline nir_block *
2529 nir_if_first_else_block(nir_if *if_stmt)
2530 {
2531 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2532 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2533 }
2534
2535 static inline nir_block *
2536 nir_if_last_else_block(nir_if *if_stmt)
2537 {
2538 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2539 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2540 }
2541
2542 static inline nir_block *
2543 nir_loop_first_block(nir_loop *loop)
2544 {
2545 struct exec_node *head = exec_list_get_head(&loop->body);
2546 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2547 }
2548
2549 static inline nir_block *
2550 nir_loop_last_block(nir_loop *loop)
2551 {
2552 struct exec_node *tail = exec_list_get_tail(&loop->body);
2553 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2554 }
2555
2556 /**
2557 * Return true if this list of cf_nodes contains a single empty block.
2558 */
2559 static inline bool
2560 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2561 {
2562 if (exec_list_is_singular(cf_list)) {
2563 struct exec_node *head = exec_list_get_head(cf_list);
2564 nir_block *block =
2565 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2566 return exec_list_is_empty(&block->instr_list);
2567 }
2568 return false;
2569 }
2570
2571 typedef struct {
2572 uint8_t num_components;
2573 uint8_t bit_size;
2574 } nir_parameter;
2575
2576 typedef struct nir_function {
2577 struct exec_node node;
2578
2579 const char *name;
2580 struct nir_shader *shader;
2581
2582 unsigned num_params;
2583 nir_parameter *params;
2584
2585 /** The implementation of this function.
2586 *
2587 * If the function is only declared and not implemented, this is NULL.
2588 */
2589 nir_function_impl *impl;
2590
2591 bool is_entrypoint;
2592 } nir_function;
2593
2594 typedef enum {
2595 nir_lower_imul64 = (1 << 0),
2596 nir_lower_isign64 = (1 << 1),
2597 /** Lower all int64 modulus and division opcodes */
2598 nir_lower_divmod64 = (1 << 2),
2599 /** Lower all 64-bit umul_high and imul_high opcodes */
2600 nir_lower_imul_high64 = (1 << 3),
2601 nir_lower_mov64 = (1 << 4),
2602 nir_lower_icmp64 = (1 << 5),
2603 nir_lower_iadd64 = (1 << 6),
2604 nir_lower_iabs64 = (1 << 7),
2605 nir_lower_ineg64 = (1 << 8),
2606 nir_lower_logic64 = (1 << 9),
2607 nir_lower_minmax64 = (1 << 10),
2608 nir_lower_shift64 = (1 << 11),
2609 nir_lower_imul_2x32_64 = (1 << 12),
2610 nir_lower_extract64 = (1 << 13),
2611 } nir_lower_int64_options;
2612
2613 typedef enum {
2614 nir_lower_drcp = (1 << 0),
2615 nir_lower_dsqrt = (1 << 1),
2616 nir_lower_drsq = (1 << 2),
2617 nir_lower_dtrunc = (1 << 3),
2618 nir_lower_dfloor = (1 << 4),
2619 nir_lower_dceil = (1 << 5),
2620 nir_lower_dfract = (1 << 6),
2621 nir_lower_dround_even = (1 << 7),
2622 nir_lower_dmod = (1 << 8),
2623 nir_lower_dsub = (1 << 9),
2624 nir_lower_ddiv = (1 << 10),
2625 nir_lower_fp64_full_software = (1 << 11),
2626 } nir_lower_doubles_options;
2627
2628 typedef enum {
2629 nir_divergence_single_prim_per_subgroup = (1 << 0),
2630 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2631 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2632 nir_divergence_view_index_uniform = (1 << 3),
2633 } nir_divergence_options;
2634
2635 typedef struct nir_shader_compiler_options {
2636 bool lower_fdiv;
2637 bool lower_ffma;
2638 bool fuse_ffma;
2639 bool lower_flrp16;
2640 bool lower_flrp32;
2641 /** Lowers flrp when it does not support doubles */
2642 bool lower_flrp64;
2643 bool lower_fpow;
2644 bool lower_fsat;
2645 bool lower_fsqrt;
2646 bool lower_sincos;
2647 bool lower_fmod;
2648 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2649 bool lower_bitfield_extract;
2650 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2651 bool lower_bitfield_extract_to_shifts;
2652 /** Lowers bitfield_insert to bfi/bfm */
2653 bool lower_bitfield_insert;
2654 /** Lowers bitfield_insert to compares, and shifts. */
2655 bool lower_bitfield_insert_to_shifts;
2656 /** Lowers bitfield_insert to bfm/bitfield_select. */
2657 bool lower_bitfield_insert_to_bitfield_select;
2658 /** Lowers bitfield_reverse to shifts. */
2659 bool lower_bitfield_reverse;
2660 /** Lowers bit_count to shifts. */
2661 bool lower_bit_count;
2662 /** Lowers ifind_msb to compare and ufind_msb */
2663 bool lower_ifind_msb;
2664 /** Lowers find_lsb to ufind_msb and logic ops */
2665 bool lower_find_lsb;
2666 bool lower_uadd_carry;
2667 bool lower_usub_borrow;
2668 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2669 bool lower_mul_high;
2670 /** lowers fneg and ineg to fsub and isub. */
2671 bool lower_negate;
2672 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2673 bool lower_sub;
2674
2675 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2676 bool lower_scmp;
2677
2678 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2679 bool lower_vector_cmp;
2680
2681 /** enables rules to lower idiv by power-of-two: */
2682 bool lower_idiv;
2683
2684 /** enable rules to avoid bit ops */
2685 bool lower_bitops;
2686
2687 /** enables rules to lower isign to imin+imax */
2688 bool lower_isign;
2689
2690 /** enables rules to lower fsign to fsub and flt */
2691 bool lower_fsign;
2692
2693 /* lower fdph to fdot4 */
2694 bool lower_fdph;
2695
2696 /** lower fdot to fmul and fsum/fadd. */
2697 bool lower_fdot;
2698
2699 /* Does the native fdot instruction replicate its result for four
2700 * components? If so, then opt_algebraic_late will turn all fdotN
2701 * instructions into fdot_replicatedN instructions.
2702 */
2703 bool fdot_replicates;
2704
2705 /** lowers ffloor to fsub+ffract: */
2706 bool lower_ffloor;
2707
2708 /** lowers ffract to fsub+ffloor: */
2709 bool lower_ffract;
2710
2711 /** lowers fceil to fneg+ffloor+fneg: */
2712 bool lower_fceil;
2713
2714 bool lower_ftrunc;
2715
2716 bool lower_ldexp;
2717
2718 bool lower_pack_half_2x16;
2719 bool lower_pack_unorm_2x16;
2720 bool lower_pack_snorm_2x16;
2721 bool lower_pack_unorm_4x8;
2722 bool lower_pack_snorm_4x8;
2723 bool lower_unpack_half_2x16;
2724 bool lower_unpack_unorm_2x16;
2725 bool lower_unpack_snorm_2x16;
2726 bool lower_unpack_unorm_4x8;
2727 bool lower_unpack_snorm_4x8;
2728
2729 bool lower_extract_byte;
2730 bool lower_extract_word;
2731
2732 bool lower_all_io_to_temps;
2733 bool lower_all_io_to_elements;
2734
2735 /* Indicates that the driver only has zero-based vertex id */
2736 bool vertex_id_zero_based;
2737
2738 /**
2739 * If enabled, gl_BaseVertex will be lowered as:
2740 * is_indexed_draw (~0/0) & firstvertex
2741 */
2742 bool lower_base_vertex;
2743
2744 /**
2745 * If enabled, gl_HelperInvocation will be lowered as:
2746 *
2747 * !((1 << sample_id) & sample_mask_in))
2748 *
2749 * This depends on some possibly hw implementation details, which may
2750 * not be true for all hw. In particular that the FS is only executed
2751 * for covered samples or for helper invocations. So, do not blindly
2752 * enable this option.
2753 *
2754 * Note: See also issue #22 in ARB_shader_image_load_store
2755 */
2756 bool lower_helper_invocation;
2757
2758 /**
2759 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2760 *
2761 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2762 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2763 */
2764 bool optimize_sample_mask_in;
2765
2766 bool lower_cs_local_index_from_id;
2767 bool lower_cs_local_id_from_index;
2768
2769 bool lower_device_index_to_zero;
2770
2771 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2772 bool lower_wpos_pntc;
2773
2774 bool lower_hadd;
2775 bool lower_add_sat;
2776
2777 /**
2778 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2779 * for IO purposes and would prefer loads/stores be vectorized.
2780 */
2781 bool vectorize_io;
2782 bool lower_to_scalar;
2783
2784 /**
2785 * Should nir_lower_io() create load_interpolated_input intrinsics?
2786 *
2787 * If not, it generates regular load_input intrinsics and interpolation
2788 * information must be inferred from the list of input nir_variables.
2789 */
2790 bool use_interpolated_input_intrinsics;
2791
2792 /* Lowers when 32x32->64 bit multiplication is not supported */
2793 bool lower_mul_2x32_64;
2794
2795 /* Lowers when rotate instruction is not supported */
2796 bool lower_rotate;
2797
2798 /**
2799 * Backend supports imul24, and would like to use it (when possible)
2800 * for address/offset calculation. If true, driver should call
2801 * nir_lower_amul(). (If not set, amul will automatically be lowered
2802 * to imul.)
2803 */
2804 bool has_imul24;
2805
2806 /**
2807 * Is this the Intel vec4 backend?
2808 *
2809 * Used to inhibit algebraic optimizations that are known to be harmful on
2810 * the Intel vec4 backend. This is generally applicable to any
2811 * optimization that might cause more immediate values to be used in
2812 * 3-source (e.g., ffma and flrp) instructions.
2813 */
2814 bool intel_vec4;
2815
2816 unsigned max_unroll_iterations;
2817
2818 nir_lower_int64_options lower_int64_options;
2819 nir_lower_doubles_options lower_doubles_options;
2820 } nir_shader_compiler_options;
2821
2822 typedef struct nir_shader {
2823 /** list of uniforms (nir_variable) */
2824 struct exec_list uniforms;
2825
2826 /** list of inputs (nir_variable) */
2827 struct exec_list inputs;
2828
2829 /** list of outputs (nir_variable) */
2830 struct exec_list outputs;
2831
2832 /** list of shared compute variables (nir_variable) */
2833 struct exec_list shared;
2834
2835 /** Set of driver-specific options for the shader.
2836 *
2837 * The memory for the options is expected to be kept in a single static
2838 * copy by the driver.
2839 */
2840 const struct nir_shader_compiler_options *options;
2841
2842 /** Various bits of compile-time information about a given shader */
2843 struct shader_info info;
2844
2845 /** list of global variables in the shader (nir_variable) */
2846 struct exec_list globals;
2847
2848 /** list of system value variables in the shader (nir_variable) */
2849 struct exec_list system_values;
2850
2851 struct exec_list functions; /** < list of nir_function */
2852
2853 /**
2854 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2855 * access plus one
2856 */
2857 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2858
2859 /** Size in bytes of required scratch space */
2860 unsigned scratch_size;
2861
2862 /** Constant data associated with this shader.
2863 *
2864 * Constant data is loaded through load_constant intrinsics. See also
2865 * nir_opt_large_constants.
2866 */
2867 void *constant_data;
2868 unsigned constant_data_size;
2869 } nir_shader;
2870
2871 #define nir_foreach_function(func, shader) \
2872 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2873
2874 static inline nir_function_impl *
2875 nir_shader_get_entrypoint(nir_shader *shader)
2876 {
2877 nir_function *func = NULL;
2878
2879 nir_foreach_function(function, shader) {
2880 assert(func == NULL);
2881 if (function->is_entrypoint) {
2882 func = function;
2883 #ifndef NDEBUG
2884 break;
2885 #endif
2886 }
2887 }
2888
2889 if (!func)
2890 return NULL;
2891
2892 assert(func->num_params == 0);
2893 assert(func->impl);
2894 return func->impl;
2895 }
2896
2897 nir_shader *nir_shader_create(void *mem_ctx,
2898 gl_shader_stage stage,
2899 const nir_shader_compiler_options *options,
2900 shader_info *si);
2901
2902 nir_register *nir_local_reg_create(nir_function_impl *impl);
2903
2904 void nir_reg_remove(nir_register *reg);
2905
2906 /** Adds a variable to the appropriate list in nir_shader */
2907 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
2908
2909 static inline void
2910 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
2911 {
2912 assert(var->data.mode == nir_var_function_temp);
2913 exec_list_push_tail(&impl->locals, &var->node);
2914 }
2915
2916 /** creates a variable, sets a few defaults, and adds it to the list */
2917 nir_variable *nir_variable_create(nir_shader *shader,
2918 nir_variable_mode mode,
2919 const struct glsl_type *type,
2920 const char *name);
2921 /** creates a local variable and adds it to the list */
2922 nir_variable *nir_local_variable_create(nir_function_impl *impl,
2923 const struct glsl_type *type,
2924 const char *name);
2925
2926 /** creates a function and adds it to the shader's list of functions */
2927 nir_function *nir_function_create(nir_shader *shader, const char *name);
2928
2929 nir_function_impl *nir_function_impl_create(nir_function *func);
2930 /** creates a function_impl that isn't tied to any particular function */
2931 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
2932
2933 nir_block *nir_block_create(nir_shader *shader);
2934 nir_if *nir_if_create(nir_shader *shader);
2935 nir_loop *nir_loop_create(nir_shader *shader);
2936
2937 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
2938
2939 /** requests that the given pieces of metadata be generated */
2940 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
2941 /** dirties all but the preserved metadata */
2942 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
2943
2944 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
2945 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
2946
2947 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
2948 nir_deref_type deref_type);
2949
2950 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
2951
2952 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
2953 unsigned num_components,
2954 unsigned bit_size);
2955
2956 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
2957 nir_intrinsic_op op);
2958
2959 nir_call_instr *nir_call_instr_create(nir_shader *shader,
2960 nir_function *callee);
2961
2962 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
2963
2964 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
2965
2966 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
2967
2968 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
2969 unsigned num_components,
2970 unsigned bit_size);
2971
2972 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
2973
2974 /**
2975 * NIR Cursors and Instruction Insertion API
2976 * @{
2977 *
2978 * A tiny struct representing a point to insert/extract instructions or
2979 * control flow nodes. Helps reduce the combinatorial explosion of possible
2980 * points to insert/extract.
2981 *
2982 * \sa nir_control_flow.h
2983 */
2984 typedef enum {
2985 nir_cursor_before_block,
2986 nir_cursor_after_block,
2987 nir_cursor_before_instr,
2988 nir_cursor_after_instr,
2989 } nir_cursor_option;
2990
2991 typedef struct {
2992 nir_cursor_option option;
2993 union {
2994 nir_block *block;
2995 nir_instr *instr;
2996 };
2997 } nir_cursor;
2998
2999 static inline nir_block *
3000 nir_cursor_current_block(nir_cursor cursor)
3001 {
3002 if (cursor.option == nir_cursor_before_instr ||
3003 cursor.option == nir_cursor_after_instr) {
3004 return cursor.instr->block;
3005 } else {
3006 return cursor.block;
3007 }
3008 }
3009
3010 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3011
3012 static inline nir_cursor
3013 nir_before_block(nir_block *block)
3014 {
3015 nir_cursor cursor;
3016 cursor.option = nir_cursor_before_block;
3017 cursor.block = block;
3018 return cursor;
3019 }
3020
3021 static inline nir_cursor
3022 nir_after_block(nir_block *block)
3023 {
3024 nir_cursor cursor;
3025 cursor.option = nir_cursor_after_block;
3026 cursor.block = block;
3027 return cursor;
3028 }
3029
3030 static inline nir_cursor
3031 nir_before_instr(nir_instr *instr)
3032 {
3033 nir_cursor cursor;
3034 cursor.option = nir_cursor_before_instr;
3035 cursor.instr = instr;
3036 return cursor;
3037 }
3038
3039 static inline nir_cursor
3040 nir_after_instr(nir_instr *instr)
3041 {
3042 nir_cursor cursor;
3043 cursor.option = nir_cursor_after_instr;
3044 cursor.instr = instr;
3045 return cursor;
3046 }
3047
3048 static inline nir_cursor
3049 nir_after_block_before_jump(nir_block *block)
3050 {
3051 nir_instr *last_instr = nir_block_last_instr(block);
3052 if (last_instr && last_instr->type == nir_instr_type_jump) {
3053 return nir_before_instr(last_instr);
3054 } else {
3055 return nir_after_block(block);
3056 }
3057 }
3058
3059 static inline nir_cursor
3060 nir_before_src(nir_src *src, bool is_if_condition)
3061 {
3062 if (is_if_condition) {
3063 nir_block *prev_block =
3064 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3065 assert(!nir_block_ends_in_jump(prev_block));
3066 return nir_after_block(prev_block);
3067 } else if (src->parent_instr->type == nir_instr_type_phi) {
3068 #ifndef NDEBUG
3069 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3070 bool found = false;
3071 nir_foreach_phi_src(phi_src, cond_phi) {
3072 if (phi_src->src.ssa == src->ssa) {
3073 found = true;
3074 break;
3075 }
3076 }
3077 assert(found);
3078 #endif
3079 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3080 * to have a more specific name.
3081 */
3082 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3083 return nir_after_block_before_jump(phi_src->pred);
3084 } else {
3085 return nir_before_instr(src->parent_instr);
3086 }
3087 }
3088
3089 static inline nir_cursor
3090 nir_before_cf_node(nir_cf_node *node)
3091 {
3092 if (node->type == nir_cf_node_block)
3093 return nir_before_block(nir_cf_node_as_block(node));
3094
3095 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3096 }
3097
3098 static inline nir_cursor
3099 nir_after_cf_node(nir_cf_node *node)
3100 {
3101 if (node->type == nir_cf_node_block)
3102 return nir_after_block(nir_cf_node_as_block(node));
3103
3104 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3105 }
3106
3107 static inline nir_cursor
3108 nir_after_phis(nir_block *block)
3109 {
3110 nir_foreach_instr(instr, block) {
3111 if (instr->type != nir_instr_type_phi)
3112 return nir_before_instr(instr);
3113 }
3114 return nir_after_block(block);
3115 }
3116
3117 static inline nir_cursor
3118 nir_after_cf_node_and_phis(nir_cf_node *node)
3119 {
3120 if (node->type == nir_cf_node_block)
3121 return nir_after_block(nir_cf_node_as_block(node));
3122
3123 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3124
3125 return nir_after_phis(block);
3126 }
3127
3128 static inline nir_cursor
3129 nir_before_cf_list(struct exec_list *cf_list)
3130 {
3131 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3132 exec_list_get_head(cf_list), node);
3133 return nir_before_cf_node(first_node);
3134 }
3135
3136 static inline nir_cursor
3137 nir_after_cf_list(struct exec_list *cf_list)
3138 {
3139 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3140 exec_list_get_tail(cf_list), node);
3141 return nir_after_cf_node(last_node);
3142 }
3143
3144 /**
3145 * Insert a NIR instruction at the given cursor.
3146 *
3147 * Note: This does not update the cursor.
3148 */
3149 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3150
3151 static inline void
3152 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3153 {
3154 nir_instr_insert(nir_before_instr(instr), before);
3155 }
3156
3157 static inline void
3158 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3159 {
3160 nir_instr_insert(nir_after_instr(instr), after);
3161 }
3162
3163 static inline void
3164 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3165 {
3166 nir_instr_insert(nir_before_block(block), before);
3167 }
3168
3169 static inline void
3170 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3171 {
3172 nir_instr_insert(nir_after_block(block), after);
3173 }
3174
3175 static inline void
3176 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3177 {
3178 nir_instr_insert(nir_before_cf_node(node), before);
3179 }
3180
3181 static inline void
3182 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3183 {
3184 nir_instr_insert(nir_after_cf_node(node), after);
3185 }
3186
3187 static inline void
3188 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3189 {
3190 nir_instr_insert(nir_before_cf_list(list), before);
3191 }
3192
3193 static inline void
3194 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3195 {
3196 nir_instr_insert(nir_after_cf_list(list), after);
3197 }
3198
3199 void nir_instr_remove_v(nir_instr *instr);
3200
3201 static inline nir_cursor
3202 nir_instr_remove(nir_instr *instr)
3203 {
3204 nir_cursor cursor;
3205 nir_instr *prev = nir_instr_prev(instr);
3206 if (prev) {
3207 cursor = nir_after_instr(prev);
3208 } else {
3209 cursor = nir_before_block(instr->block);
3210 }
3211 nir_instr_remove_v(instr);
3212 return cursor;
3213 }
3214
3215 /** @} */
3216
3217 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3218
3219 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3220 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3221 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3222 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3223 void *state);
3224 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3225 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3226
3227 nir_const_value *nir_src_as_const_value(nir_src src);
3228
3229 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3230 static inline c_type * \
3231 nir_src_as_ ## name (nir_src src) \
3232 { \
3233 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3234 ? cast_macro(src.ssa->parent_instr) : NULL; \
3235 }
3236
3237 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3238 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3239 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3240 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3241
3242 bool nir_src_is_dynamically_uniform(nir_src src);
3243 bool nir_srcs_equal(nir_src src1, nir_src src2);
3244 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3245 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3246 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3247 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3248 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3249 nir_dest new_dest);
3250
3251 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3252 unsigned num_components, unsigned bit_size,
3253 const char *name);
3254 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3255 unsigned num_components, unsigned bit_size,
3256 const char *name);
3257 static inline void
3258 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3259 const struct glsl_type *type,
3260 const char *name)
3261 {
3262 assert(glsl_type_is_vector_or_scalar(type));
3263 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3264 glsl_get_bit_size(type), name);
3265 }
3266 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3267 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3268 nir_instr *after_me);
3269
3270 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3271
3272 /*
3273 * finds the next basic block in source-code order, returns NULL if there is
3274 * none
3275 */
3276
3277 nir_block *nir_block_cf_tree_next(nir_block *block);
3278
3279 /* Performs the opposite of nir_block_cf_tree_next() */
3280
3281 nir_block *nir_block_cf_tree_prev(nir_block *block);
3282
3283 /* Gets the first block in a CF node in source-code order */
3284
3285 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3286
3287 /* Gets the last block in a CF node in source-code order */
3288
3289 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3290
3291 /* Gets the next block after a CF node in source-code order */
3292
3293 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3294
3295 /* Macros for loops that visit blocks in source-code order */
3296
3297 #define nir_foreach_block(block, impl) \
3298 for (nir_block *block = nir_start_block(impl); block != NULL; \
3299 block = nir_block_cf_tree_next(block))
3300
3301 #define nir_foreach_block_safe(block, impl) \
3302 for (nir_block *block = nir_start_block(impl), \
3303 *next = nir_block_cf_tree_next(block); \
3304 block != NULL; \
3305 block = next, next = nir_block_cf_tree_next(block))
3306
3307 #define nir_foreach_block_reverse(block, impl) \
3308 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3309 block = nir_block_cf_tree_prev(block))
3310
3311 #define nir_foreach_block_reverse_safe(block, impl) \
3312 for (nir_block *block = nir_impl_last_block(impl), \
3313 *prev = nir_block_cf_tree_prev(block); \
3314 block != NULL; \
3315 block = prev, prev = nir_block_cf_tree_prev(block))
3316
3317 #define nir_foreach_block_in_cf_node(block, node) \
3318 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3319 block != nir_cf_node_cf_tree_next(node); \
3320 block = nir_block_cf_tree_next(block))
3321
3322 /* If the following CF node is an if, this function returns that if.
3323 * Otherwise, it returns NULL.
3324 */
3325 nir_if *nir_block_get_following_if(nir_block *block);
3326
3327 nir_loop *nir_block_get_following_loop(nir_block *block);
3328
3329 void nir_index_local_regs(nir_function_impl *impl);
3330 void nir_index_ssa_defs(nir_function_impl *impl);
3331 unsigned nir_index_instrs(nir_function_impl *impl);
3332
3333 void nir_index_blocks(nir_function_impl *impl);
3334
3335 void nir_print_shader(nir_shader *shader, FILE *fp);
3336 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3337 void nir_print_instr(const nir_instr *instr, FILE *fp);
3338 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3339
3340 /** Shallow clone of a single ALU instruction. */
3341 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3342
3343 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3344 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3345 const nir_function_impl *fi);
3346 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3347 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3348
3349 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3350
3351 void nir_shader_serialize_deserialize(nir_shader *s);
3352
3353 #ifndef NDEBUG
3354 void nir_validate_shader(nir_shader *shader, const char *when);
3355 void nir_metadata_set_validation_flag(nir_shader *shader);
3356 void nir_metadata_check_validation_flag(nir_shader *shader);
3357
3358 static inline bool
3359 should_skip_nir(const char *name)
3360 {
3361 static const char *list = NULL;
3362 if (!list) {
3363 /* Comma separated list of names to skip. */
3364 list = getenv("NIR_SKIP");
3365 if (!list)
3366 list = "";
3367 }
3368
3369 if (!list[0])
3370 return false;
3371
3372 return comma_separated_list_contains(list, name);
3373 }
3374
3375 static inline bool
3376 should_clone_nir(void)
3377 {
3378 static int should_clone = -1;
3379 if (should_clone < 0)
3380 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3381
3382 return should_clone;
3383 }
3384
3385 static inline bool
3386 should_serialize_deserialize_nir(void)
3387 {
3388 static int test_serialize = -1;
3389 if (test_serialize < 0)
3390 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3391
3392 return test_serialize;
3393 }
3394
3395 static inline bool
3396 should_print_nir(void)
3397 {
3398 static int should_print = -1;
3399 if (should_print < 0)
3400 should_print = env_var_as_boolean("NIR_PRINT", false);
3401
3402 return should_print;
3403 }
3404 #else
3405 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3406 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3407 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3408 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3409 static inline bool should_clone_nir(void) { return false; }
3410 static inline bool should_serialize_deserialize_nir(void) { return false; }
3411 static inline bool should_print_nir(void) { return false; }
3412 #endif /* NDEBUG */
3413
3414 #define _PASS(pass, nir, do_pass) do { \
3415 if (should_skip_nir(#pass)) { \
3416 printf("skipping %s\n", #pass); \
3417 break; \
3418 } \
3419 do_pass \
3420 nir_validate_shader(nir, "after " #pass); \
3421 if (should_clone_nir()) { \
3422 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3423 nir_shader_replace(nir, clone); \
3424 } \
3425 if (should_serialize_deserialize_nir()) { \
3426 nir_shader_serialize_deserialize(nir); \
3427 } \
3428 } while (0)
3429
3430 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3431 nir_metadata_set_validation_flag(nir); \
3432 if (should_print_nir()) \
3433 printf("%s\n", #pass); \
3434 if (pass(nir, ##__VA_ARGS__)) { \
3435 progress = true; \
3436 if (should_print_nir()) \
3437 nir_print_shader(nir, stdout); \
3438 nir_metadata_check_validation_flag(nir); \
3439 } \
3440 )
3441
3442 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3443 if (should_print_nir()) \
3444 printf("%s\n", #pass); \
3445 pass(nir, ##__VA_ARGS__); \
3446 if (should_print_nir()) \
3447 nir_print_shader(nir, stdout); \
3448 )
3449
3450 #define NIR_SKIP(name) should_skip_nir(#name)
3451
3452 /** An instruction filtering callback
3453 *
3454 * Returns true if the instruction should be processed and false otherwise.
3455 */
3456 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3457
3458 /** A simple instruction lowering callback
3459 *
3460 * Many instruction lowering passes can be written as a simple function which
3461 * takes an instruction as its input and returns a sequence of instructions
3462 * that implement the consumed instruction. This function type represents
3463 * such a lowering function. When called, a function with this prototype
3464 * should either return NULL indicating that no lowering needs to be done or
3465 * emit a sequence of instructions using the provided builder (whose cursor
3466 * will already be placed after the instruction to be lowered) and return the
3467 * resulting nir_ssa_def.
3468 */
3469 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3470 nir_instr *, void *);
3471
3472 /**
3473 * Special return value for nir_lower_instr_cb when some progress occurred
3474 * (like changing an input to the instr) that didn't result in a replacement
3475 * SSA def being generated.
3476 */
3477 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3478
3479 /** Iterate over all the instructions in a nir_function_impl and lower them
3480 * using the provided callbacks
3481 *
3482 * This function implements the guts of a standard lowering pass for you. It
3483 * iterates over all of the instructions in a nir_function_impl and calls the
3484 * filter callback on each one. If the filter callback returns true, it then
3485 * calls the lowering call back on the instruction. (Splitting it this way
3486 * allows us to avoid some save/restore work for instructions we know won't be
3487 * lowered.) If the instruction is dead after the lowering is complete, it
3488 * will be removed. If new instructions are added, the lowering callback will
3489 * also be called on them in case multiple lowerings are required.
3490 *
3491 * The metadata for the nir_function_impl will also be updated. If any blocks
3492 * are added (they cannot be removed), dominance and block indices will be
3493 * invalidated.
3494 */
3495 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3496 nir_instr_filter_cb filter,
3497 nir_lower_instr_cb lower,
3498 void *cb_data);
3499 bool nir_shader_lower_instructions(nir_shader *shader,
3500 nir_instr_filter_cb filter,
3501 nir_lower_instr_cb lower,
3502 void *cb_data);
3503
3504 void nir_calc_dominance_impl(nir_function_impl *impl);
3505 void nir_calc_dominance(nir_shader *shader);
3506
3507 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3508 bool nir_block_dominates(nir_block *parent, nir_block *child);
3509 bool nir_block_is_unreachable(nir_block *block);
3510
3511 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3512 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3513
3514 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3515 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3516
3517 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3518 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3519
3520 int nir_gs_count_vertices(const nir_shader *shader);
3521
3522 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3523 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3524 bool nir_split_var_copies(nir_shader *shader);
3525 bool nir_split_per_member_structs(nir_shader *shader);
3526 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3527
3528 bool nir_lower_returns_impl(nir_function_impl *impl);
3529 bool nir_lower_returns(nir_shader *shader);
3530
3531 void nir_inline_function_impl(struct nir_builder *b,
3532 const nir_function_impl *impl,
3533 nir_ssa_def **params);
3534 bool nir_inline_functions(nir_shader *shader);
3535
3536 bool nir_propagate_invariant(nir_shader *shader);
3537
3538 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3539 void nir_lower_deref_copy_instr(struct nir_builder *b,
3540 nir_intrinsic_instr *copy);
3541 bool nir_lower_var_copies(nir_shader *shader);
3542
3543 void nir_fixup_deref_modes(nir_shader *shader);
3544
3545 bool nir_lower_global_vars_to_local(nir_shader *shader);
3546
3547 typedef enum {
3548 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3549 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3550 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3551 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3552 } nir_lower_array_deref_of_vec_options;
3553
3554 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3555 nir_lower_array_deref_of_vec_options options);
3556
3557 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3558
3559 bool nir_lower_locals_to_regs(nir_shader *shader);
3560
3561 void nir_lower_io_to_temporaries(nir_shader *shader,
3562 nir_function_impl *entrypoint,
3563 bool outputs, bool inputs);
3564
3565 bool nir_lower_vars_to_scratch(nir_shader *shader,
3566 nir_variable_mode modes,
3567 int size_threshold,
3568 glsl_type_size_align_func size_align);
3569
3570 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3571
3572 void nir_gather_ssa_types(nir_function_impl *impl,
3573 BITSET_WORD *float_types,
3574 BITSET_WORD *int_types);
3575
3576 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3577 int (*type_size)(const struct glsl_type *, bool));
3578
3579 /* Some helpers to do very simple linking */
3580 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3581 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3582 uint64_t *used_by_other_stage,
3583 uint64_t *used_by_other_stage_patches);
3584 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3585 bool default_to_smooth_interp);
3586 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3587 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3588
3589 bool nir_lower_amul(nir_shader *shader,
3590 int (*type_size)(const struct glsl_type *, bool));
3591
3592 void nir_assign_io_var_locations(struct exec_list *var_list,
3593 unsigned *size,
3594 gl_shader_stage stage);
3595
3596 typedef enum {
3597 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3598 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3599 * modes.
3600 */
3601 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3602
3603 /* If set, this forces all non-flat fragment shader inputs to be
3604 * interpolated as if with the "sample" qualifier. This requires
3605 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3606 */
3607 nir_lower_io_force_sample_interpolation = (1 << 1),
3608 } nir_lower_io_options;
3609 bool nir_lower_io(nir_shader *shader,
3610 nir_variable_mode modes,
3611 int (*type_size)(const struct glsl_type *, bool),
3612 nir_lower_io_options);
3613
3614 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3615
3616 bool
3617 nir_lower_vars_to_explicit_types(nir_shader *shader,
3618 nir_variable_mode modes,
3619 glsl_type_size_align_func type_info);
3620
3621 typedef enum {
3622 /**
3623 * An address format which is a simple 32-bit global GPU address.
3624 */
3625 nir_address_format_32bit_global,
3626
3627 /**
3628 * An address format which is a simple 64-bit global GPU address.
3629 */
3630 nir_address_format_64bit_global,
3631
3632 /**
3633 * An address format which is a bounds-checked 64-bit global GPU address.
3634 *
3635 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3636 * address stored with the low bits in .x and high bits in .y, .z is a
3637 * size, and .w is an offset. When the final I/O operation is lowered, .w
3638 * is checked against .z and the operation is predicated on the result.
3639 */
3640 nir_address_format_64bit_bounded_global,
3641
3642 /**
3643 * An address format which is comprised of a vec2 where the first
3644 * component is a buffer index and the second is an offset.
3645 */
3646 nir_address_format_32bit_index_offset,
3647
3648 /**
3649 * An address format which is a simple 32-bit offset.
3650 */
3651 nir_address_format_32bit_offset,
3652
3653 /**
3654 * An address format representing a purely logical addressing model. In
3655 * this model, all deref chains must be complete from the dereference
3656 * operation to the variable. Cast derefs are not allowed. These
3657 * addresses will be 32-bit scalars but the format is immaterial because
3658 * you can always chase the chain.
3659 */
3660 nir_address_format_logical,
3661 } nir_address_format;
3662
3663 static inline unsigned
3664 nir_address_format_bit_size(nir_address_format addr_format)
3665 {
3666 switch (addr_format) {
3667 case nir_address_format_32bit_global: return 32;
3668 case nir_address_format_64bit_global: return 64;
3669 case nir_address_format_64bit_bounded_global: return 32;
3670 case nir_address_format_32bit_index_offset: return 32;
3671 case nir_address_format_32bit_offset: return 32;
3672 case nir_address_format_logical: return 32;
3673 }
3674 unreachable("Invalid address format");
3675 }
3676
3677 static inline unsigned
3678 nir_address_format_num_components(nir_address_format addr_format)
3679 {
3680 switch (addr_format) {
3681 case nir_address_format_32bit_global: return 1;
3682 case nir_address_format_64bit_global: return 1;
3683 case nir_address_format_64bit_bounded_global: return 4;
3684 case nir_address_format_32bit_index_offset: return 2;
3685 case nir_address_format_32bit_offset: return 1;
3686 case nir_address_format_logical: return 1;
3687 }
3688 unreachable("Invalid address format");
3689 }
3690
3691 static inline const struct glsl_type *
3692 nir_address_format_to_glsl_type(nir_address_format addr_format)
3693 {
3694 unsigned bit_size = nir_address_format_bit_size(addr_format);
3695 assert(bit_size == 32 || bit_size == 64);
3696 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3697 nir_address_format_num_components(addr_format));
3698 }
3699
3700 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3701
3702 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3703 nir_address_format addr_format);
3704
3705 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3706 nir_address_format addr_format);
3707
3708 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3709 nir_deref_instr *deref,
3710 nir_ssa_def *base_addr,
3711 nir_address_format addr_format);
3712 void nir_lower_explicit_io_instr(struct nir_builder *b,
3713 nir_intrinsic_instr *io_instr,
3714 nir_ssa_def *addr,
3715 nir_address_format addr_format);
3716
3717 bool nir_lower_explicit_io(nir_shader *shader,
3718 nir_variable_mode modes,
3719 nir_address_format);
3720
3721 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3722 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3723
3724 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3725
3726 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3727 bool nir_lower_regs_to_ssa(nir_shader *shader);
3728 bool nir_lower_vars_to_ssa(nir_shader *shader);
3729
3730 bool nir_remove_dead_derefs(nir_shader *shader);
3731 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3732 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3733 bool nir_lower_constant_initializers(nir_shader *shader,
3734 nir_variable_mode modes);
3735
3736 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3737 bool nir_lower_vec_to_movs(nir_shader *shader);
3738 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3739 bool alpha_to_one,
3740 const gl_state_index16 *alpha_ref_state_tokens);
3741 bool nir_lower_alu(nir_shader *shader);
3742
3743 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3744 bool always_precise, bool have_ffma);
3745
3746 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3747 bool nir_lower_bool_to_float(nir_shader *shader);
3748 bool nir_lower_bool_to_int32(nir_shader *shader);
3749 bool nir_lower_int_to_float(nir_shader *shader);
3750 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3751 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3752 bool nir_lower_phis_to_scalar(nir_shader *shader);
3753 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3754 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3755 bool outputs_only);
3756 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3757 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3758 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3759
3760 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3761 void nir_lower_viewport_transform(nir_shader *shader);
3762 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3763
3764 typedef struct nir_lower_subgroups_options {
3765 uint8_t subgroup_size;
3766 uint8_t ballot_bit_size;
3767 bool lower_to_scalar:1;
3768 bool lower_vote_trivial:1;
3769 bool lower_vote_eq_to_ballot:1;
3770 bool lower_subgroup_masks:1;
3771 bool lower_shuffle:1;
3772 bool lower_shuffle_to_32bit:1;
3773 bool lower_quad:1;
3774 } nir_lower_subgroups_options;
3775
3776 bool nir_lower_subgroups(nir_shader *shader,
3777 const nir_lower_subgroups_options *options);
3778
3779 bool nir_lower_system_values(nir_shader *shader);
3780
3781 enum PACKED nir_lower_tex_packing {
3782 nir_lower_tex_packing_none = 0,
3783 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3784 * or unsigned ints based on the sampler type
3785 */
3786 nir_lower_tex_packing_16,
3787 /* The sampler returns 1 32-bit word of 4x8 unorm */
3788 nir_lower_tex_packing_8,
3789 };
3790
3791 typedef struct nir_lower_tex_options {
3792 /**
3793 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3794 * sampler types a texture projector is lowered.
3795 */
3796 unsigned lower_txp;
3797
3798 /**
3799 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3800 */
3801 bool lower_txf_offset;
3802
3803 /**
3804 * If true, lower away nir_tex_src_offset for all rect textures.
3805 */
3806 bool lower_rect_offset;
3807
3808 /**
3809 * If true, lower rect textures to 2D, using txs to fetch the
3810 * texture dimensions and dividing the texture coords by the
3811 * texture dims to normalize.
3812 */
3813 bool lower_rect;
3814
3815 /**
3816 * If true, convert yuv to rgb.
3817 */
3818 unsigned lower_y_uv_external;
3819 unsigned lower_y_u_v_external;
3820 unsigned lower_yx_xuxv_external;
3821 unsigned lower_xy_uxvx_external;
3822 unsigned lower_ayuv_external;
3823 unsigned lower_xyuv_external;
3824
3825 /**
3826 * To emulate certain texture wrap modes, this can be used
3827 * to saturate the specified tex coord to [0.0, 1.0]. The
3828 * bits are according to sampler #, ie. if, for example:
3829 *
3830 * (conf->saturate_s & (1 << n))
3831 *
3832 * is true, then the s coord for sampler n is saturated.
3833 *
3834 * Note that clamping must happen *after* projector lowering
3835 * so any projected texture sample instruction with a clamped
3836 * coordinate gets automatically lowered, regardless of the
3837 * 'lower_txp' setting.
3838 */
3839 unsigned saturate_s;
3840 unsigned saturate_t;
3841 unsigned saturate_r;
3842
3843 /* Bitmask of textures that need swizzling.
3844 *
3845 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3846 * swizzles[texture_index] is applied to the result of the texturing
3847 * operation.
3848 */
3849 unsigned swizzle_result;
3850
3851 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3852 * while 4 and 5 represent 0 and 1 respectively.
3853 */
3854 uint8_t swizzles[32][4];
3855
3856 /* Can be used to scale sampled values in range required by the format. */
3857 float scale_factors[32];
3858
3859 /**
3860 * Bitmap of textures that need srgb to linear conversion. If
3861 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3862 * of the texture are lowered to linear.
3863 */
3864 unsigned lower_srgb;
3865
3866 /**
3867 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3868 * LODs to nir_texop_txl.
3869 */
3870 bool lower_tex_without_implicit_lod;
3871
3872 /**
3873 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3874 */
3875 bool lower_txd_cube_map;
3876
3877 /**
3878 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3879 */
3880 bool lower_txd_3d;
3881
3882 /**
3883 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3884 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3885 * with lower_txd_cube_map.
3886 */
3887 bool lower_txd_shadow;
3888
3889 /**
3890 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
3891 * Implies lower_txd_cube_map and lower_txd_shadow.
3892 */
3893 bool lower_txd;
3894
3895 /**
3896 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
3897 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
3898 */
3899 bool lower_txb_shadow_clamp;
3900
3901 /**
3902 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
3903 * with nir_texop_txl. This includes cube maps.
3904 */
3905 bool lower_txd_shadow_clamp;
3906
3907 /**
3908 * If true, lower nir_texop_txd on when it uses both offset and min_lod
3909 * with nir_texop_txl. This includes cube maps.
3910 */
3911 bool lower_txd_offset_clamp;
3912
3913 /**
3914 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3915 * sampler is bindless.
3916 */
3917 bool lower_txd_clamp_bindless_sampler;
3918
3919 /**
3920 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3921 * sampler index is not statically determinable to be less than 16.
3922 */
3923 bool lower_txd_clamp_if_sampler_index_not_lt_16;
3924
3925 /**
3926 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
3927 * 0-lod followed by a nir_ishr.
3928 */
3929 bool lower_txs_lod;
3930
3931 /**
3932 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
3933 * mixed-up tg4 locations.
3934 */
3935 bool lower_tg4_broadcom_swizzle;
3936
3937 /**
3938 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
3939 */
3940 bool lower_tg4_offsets;
3941
3942 enum nir_lower_tex_packing lower_tex_packing[32];
3943 } nir_lower_tex_options;
3944
3945 bool nir_lower_tex(nir_shader *shader,
3946 const nir_lower_tex_options *options);
3947
3948 enum nir_lower_non_uniform_access_type {
3949 nir_lower_non_uniform_ubo_access = (1 << 0),
3950 nir_lower_non_uniform_ssbo_access = (1 << 1),
3951 nir_lower_non_uniform_texture_access = (1 << 2),
3952 nir_lower_non_uniform_image_access = (1 << 3),
3953 };
3954
3955 bool nir_lower_non_uniform_access(nir_shader *shader,
3956 enum nir_lower_non_uniform_access_type);
3957
3958 enum nir_lower_idiv_path {
3959 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
3960 * the two but it is not exact in some cases (for example, 1091317713u /
3961 * 1034u gives 5209173 instead of 1055432) */
3962 nir_lower_idiv_fast,
3963 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
3964 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
3965 * the nv50 path and many of them are integer multiplications, so it is
3966 * probably slower. It should always return the correct result, though. */
3967 nir_lower_idiv_precise,
3968 };
3969
3970 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
3971
3972 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
3973
3974 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
3975 bool use_vars,
3976 bool use_clipdist_array,
3977 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3978 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
3979 bool use_clipdist_array,
3980 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3981 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
3982 bool use_clipdist_array);
3983 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
3984
3985 void nir_lower_point_size_mov(nir_shader *shader,
3986 const gl_state_index16 *pointsize_state_tokens);
3987
3988 bool nir_lower_frexp(nir_shader *nir);
3989
3990 void nir_lower_two_sided_color(nir_shader *shader);
3991
3992 bool nir_lower_clamp_color_outputs(nir_shader *shader);
3993
3994 bool nir_lower_flatshade(nir_shader *shader);
3995
3996 void nir_lower_passthrough_edgeflags(nir_shader *shader);
3997 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
3998 const gl_state_index16 *uniform_state_tokens);
3999
4000 typedef struct nir_lower_wpos_ytransform_options {
4001 gl_state_index16 state_tokens[STATE_LENGTH];
4002 bool fs_coord_origin_upper_left :1;
4003 bool fs_coord_origin_lower_left :1;
4004 bool fs_coord_pixel_center_integer :1;
4005 bool fs_coord_pixel_center_half_integer :1;
4006 } nir_lower_wpos_ytransform_options;
4007
4008 bool nir_lower_wpos_ytransform(nir_shader *shader,
4009 const nir_lower_wpos_ytransform_options *options);
4010 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4011
4012 bool nir_lower_fb_read(nir_shader *shader);
4013
4014 typedef struct nir_lower_drawpixels_options {
4015 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4016 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4017 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4018 unsigned drawpix_sampler;
4019 unsigned pixelmap_sampler;
4020 bool pixel_maps :1;
4021 bool scale_and_bias :1;
4022 } nir_lower_drawpixels_options;
4023
4024 void nir_lower_drawpixels(nir_shader *shader,
4025 const nir_lower_drawpixels_options *options);
4026
4027 typedef struct nir_lower_bitmap_options {
4028 unsigned sampler;
4029 bool swizzle_xxxx;
4030 } nir_lower_bitmap_options;
4031
4032 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4033
4034 bool nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned ssbo_offset);
4035
4036 typedef enum {
4037 nir_lower_int_source_mods = 1 << 0,
4038 nir_lower_float_source_mods = 1 << 1,
4039 nir_lower_triop_abs = 1 << 2,
4040 nir_lower_all_source_mods = (1 << 3) - 1
4041 } nir_lower_to_source_mods_flags;
4042
4043
4044 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4045
4046 bool nir_lower_gs_intrinsics(nir_shader *shader);
4047
4048 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4049
4050 bool nir_lower_bit_size(nir_shader *shader,
4051 nir_lower_bit_size_callback callback,
4052 void *callback_data);
4053
4054 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4055 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4056
4057 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4058 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4059 nir_lower_doubles_options options);
4060 bool nir_lower_pack(nir_shader *shader);
4061
4062 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4063
4064 typedef enum {
4065 nir_lower_interpolation_at_sample = (1 << 1),
4066 nir_lower_interpolation_at_offset = (1 << 2),
4067 nir_lower_interpolation_centroid = (1 << 3),
4068 nir_lower_interpolation_pixel = (1 << 4),
4069 nir_lower_interpolation_sample = (1 << 5),
4070 } nir_lower_interpolation_options;
4071
4072 bool nir_lower_interpolation(nir_shader *shader,
4073 nir_lower_interpolation_options options);
4074
4075 bool nir_normalize_cubemap_coords(nir_shader *shader);
4076
4077 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4078
4079 void nir_loop_analyze_impl(nir_function_impl *impl,
4080 nir_variable_mode indirect_mask);
4081
4082 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4083
4084 bool nir_repair_ssa_impl(nir_function_impl *impl);
4085 bool nir_repair_ssa(nir_shader *shader);
4086
4087 void nir_convert_loop_to_lcssa(nir_loop *loop);
4088 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4089 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4090
4091 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4092 * registers. If false, convert all values (even those not involved in a phi
4093 * node) to registers.
4094 */
4095 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4096
4097 bool nir_lower_phis_to_regs_block(nir_block *block);
4098 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4099 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4100
4101 bool nir_lower_samplers(nir_shader *shader);
4102
4103 /* This is here for unit tests. */
4104 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4105
4106 bool nir_opt_comparison_pre(nir_shader *shader);
4107
4108 bool nir_opt_access(nir_shader *shader);
4109 bool nir_opt_algebraic(nir_shader *shader);
4110 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4111 bool nir_opt_algebraic_late(nir_shader *shader);
4112 bool nir_opt_constant_folding(nir_shader *shader);
4113
4114 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4115
4116 bool nir_copy_prop(nir_shader *shader);
4117
4118 bool nir_opt_copy_prop_vars(nir_shader *shader);
4119
4120 bool nir_opt_cse(nir_shader *shader);
4121
4122 bool nir_opt_dce(nir_shader *shader);
4123
4124 bool nir_opt_dead_cf(nir_shader *shader);
4125
4126 bool nir_opt_dead_write_vars(nir_shader *shader);
4127
4128 bool nir_opt_deref_impl(nir_function_impl *impl);
4129 bool nir_opt_deref(nir_shader *shader);
4130
4131 bool nir_opt_find_array_copies(nir_shader *shader);
4132
4133 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4134
4135 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4136
4137 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4138
4139 bool nir_opt_intrinsics(nir_shader *shader);
4140
4141 bool nir_opt_large_constants(nir_shader *shader,
4142 glsl_type_size_align_func size_align,
4143 unsigned threshold);
4144
4145 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4146
4147 typedef enum {
4148 nir_move_const_undef = (1 << 0),
4149 nir_move_load_ubo = (1 << 1),
4150 nir_move_load_input = (1 << 2),
4151 nir_move_comparisons = (1 << 3),
4152 } nir_move_options;
4153
4154 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4155
4156 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4157
4158 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4159
4160 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4161 bool indirect_load_ok, bool expensive_alu_ok);
4162
4163 bool nir_opt_rematerialize_compares(nir_shader *shader);
4164
4165 bool nir_opt_remove_phis(nir_shader *shader);
4166 bool nir_opt_remove_phis_block(nir_block *block);
4167
4168 bool nir_opt_shrink_load(nir_shader *shader);
4169
4170 bool nir_opt_trivial_continues(nir_shader *shader);
4171
4172 bool nir_opt_undef(nir_shader *shader);
4173
4174 bool nir_opt_vectorize(nir_shader *shader);
4175
4176 bool nir_opt_conditional_discard(nir_shader *shader);
4177
4178 void nir_strip(nir_shader *shader);
4179
4180 void nir_sweep(nir_shader *shader);
4181
4182 void nir_remap_dual_slot_attributes(nir_shader *shader,
4183 uint64_t *dual_slot_inputs);
4184 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4185
4186 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4187 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4188
4189 static inline bool
4190 nir_variable_is_in_ubo(const nir_variable *var)
4191 {
4192 return (var->data.mode == nir_var_mem_ubo &&
4193 var->interface_type != NULL);
4194 }
4195
4196 static inline bool
4197 nir_variable_is_in_ssbo(const nir_variable *var)
4198 {
4199 return (var->data.mode == nir_var_mem_ssbo &&
4200 var->interface_type != NULL);
4201 }
4202
4203 static inline bool
4204 nir_variable_is_in_block(const nir_variable *var)
4205 {
4206 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4207 }
4208
4209 #ifdef __cplusplus
4210 } /* extern "C" */
4211 #endif
4212
4213 #endif /* NIR_H */