2 * Copyright © 2014 Connor Abbott
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Connor Abbott (cwabbott0@gmail.com)
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
46 #include "util/debug.h"
49 #include "nir_opcodes.h"
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 4
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 #define NIR_STREAM_PACKED (1 << 8)
64 typedef uint8_t nir_component_mask_t
;
66 /** Defines a cast function
68 * This macro defines a cast function from in_type to out_type where
69 * out_type is some structure type that contains a field of type out_type.
71 * Note that you have to be a bit careful as the generated cast function
74 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
75 type_field, type_value) \
76 static inline out_type * \
77 name(const in_type *parent) \
79 assert(parent && parent->type_field == type_value); \
80 return exec_node_data(out_type, parent, field); \
90 * Description of built-in state associated with a uniform
92 * \sa nir_variable::state_slots
95 gl_state_index16 tokens
[STATE_LENGTH
];
100 nir_var_shader_in
= (1 << 0),
101 nir_var_shader_out
= (1 << 1),
102 nir_var_shader_temp
= (1 << 2),
103 nir_var_function_temp
= (1 << 3),
104 nir_var_uniform
= (1 << 4),
105 nir_var_mem_ubo
= (1 << 5),
106 nir_var_system_value
= (1 << 6),
107 nir_var_mem_ssbo
= (1 << 7),
108 nir_var_mem_shared
= (1 << 8),
109 nir_var_mem_global
= (1 << 9),
110 nir_var_mem_push_const
= (1 << 10), /* not actually used for variables */
111 nir_num_variable_modes
= 11,
112 nir_var_all
= (1 << nir_num_variable_modes
) - 1,
119 nir_rounding_mode_undef
= 0,
120 nir_rounding_mode_rtne
= 1, /* round to nearest even */
121 nir_rounding_mode_ru
= 2, /* round up */
122 nir_rounding_mode_rd
= 3, /* round down */
123 nir_rounding_mode_rtz
= 4, /* round towards zero */
140 #define nir_const_value_to_array(arr, c, components, m) \
142 for (unsigned i = 0; i < components; ++i) \
146 static inline nir_const_value
147 nir_const_value_for_raw_uint(uint64_t x
, unsigned bit_size
)
150 memset(&v
, 0, sizeof(v
));
153 case 1: v
.b
= x
; break;
154 case 8: v
.u8
= x
; break;
155 case 16: v
.u16
= x
; break;
156 case 32: v
.u32
= x
; break;
157 case 64: v
.u64
= x
; break;
159 unreachable("Invalid bit size");
165 static inline nir_const_value
166 nir_const_value_for_int(int64_t i
, unsigned bit_size
)
169 memset(&v
, 0, sizeof(v
));
171 assert(bit_size
<= 64);
173 assert(i
>= (-(1ll << (bit_size
- 1))));
174 assert(i
< (1ll << (bit_size
- 1)));
177 return nir_const_value_for_raw_uint(i
, bit_size
);
180 static inline nir_const_value
181 nir_const_value_for_uint(uint64_t u
, unsigned bit_size
)
184 memset(&v
, 0, sizeof(v
));
186 assert(bit_size
<= 64);
188 assert(u
< (1ull << bit_size
));
190 return nir_const_value_for_raw_uint(u
, bit_size
);
193 static inline nir_const_value
194 nir_const_value_for_bool(bool b
, unsigned bit_size
)
196 /* Booleans use a 0/-1 convention */
197 return nir_const_value_for_int(-(int)b
, bit_size
);
200 /* This one isn't inline because it requires half-float conversion */
201 nir_const_value
nir_const_value_for_float(double b
, unsigned bit_size
);
203 static inline int64_t
204 nir_const_value_as_int(nir_const_value value
, unsigned bit_size
)
207 /* int1_t uses 0/-1 convention */
208 case 1: return -(int)value
.b
;
209 case 8: return value
.i8
;
210 case 16: return value
.i16
;
211 case 32: return value
.i32
;
212 case 64: return value
.i64
;
214 unreachable("Invalid bit size");
218 static inline uint64_t
219 nir_const_value_as_uint(nir_const_value value
, unsigned bit_size
)
222 case 1: return value
.b
;
223 case 8: return value
.u8
;
224 case 16: return value
.u16
;
225 case 32: return value
.u32
;
226 case 64: return value
.u64
;
228 unreachable("Invalid bit size");
233 nir_const_value_as_bool(nir_const_value value
, unsigned bit_size
)
235 int64_t i
= nir_const_value_as_int(value
, bit_size
);
237 /* Booleans of any size use 0/-1 convention */
238 assert(i
== 0 || i
== -1);
243 /* This one isn't inline because it requires half-float conversion */
244 double nir_const_value_as_float(nir_const_value value
, unsigned bit_size
);
246 typedef struct nir_constant
{
248 * Value of the constant.
250 * The field used to back the values supplied by the constant is determined
251 * by the type associated with the \c nir_variable. Constants may be
252 * scalars, vectors, or matrices.
254 nir_const_value values
[NIR_MAX_VEC_COMPONENTS
];
256 /* we could get this from the var->type but makes clone *much* easier to
257 * not have to care about the type.
259 unsigned num_elements
;
261 /* Array elements / Structure Fields */
262 struct nir_constant
**elements
;
266 * \brief Layout qualifiers for gl_FragDepth.
268 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
269 * with a layout qualifier.
272 nir_depth_layout_none
, /**< No depth layout is specified. */
273 nir_depth_layout_any
,
274 nir_depth_layout_greater
,
275 nir_depth_layout_less
,
276 nir_depth_layout_unchanged
280 * Enum keeping track of how a variable was declared.
284 * Normal declaration.
286 nir_var_declared_normally
= 0,
289 * Variable is implicitly generated by the compiler and should not be
290 * visible via the API.
293 } nir_var_declaration_type
;
296 * Either a uniform, global variable, shader input, or shader output. Based on
297 * ir_variable - it should be easy to translate between the two.
300 typedef struct nir_variable
{
301 struct exec_node node
;
304 * Declared type of the variable
306 const struct glsl_type
*type
;
309 * Declared name of the variable
313 struct nir_variable_data
{
315 * Storage class of the variable.
317 * \sa nir_variable_mode
319 nir_variable_mode mode
:11;
322 * Is the variable read-only?
324 * This is set for variables declared as \c const, shader inputs,
327 unsigned read_only
:1;
331 unsigned invariant
:1;
334 * Precision qualifier.
336 * In desktop GLSL we do not care about precision qualifiers at all, in
337 * fact, the spec says that precision qualifiers are ignored.
339 * To make things easy, we make it so that this field is always
340 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
341 * have the same precision value and the checks we add in the compiler
342 * for this field will never break a desktop shader compile.
344 unsigned precision
:2;
347 * Can this variable be coalesced with another?
349 * This is set by nir_lower_io_to_temporaries to say that any
350 * copies involving this variable should stay put. Propagating it can
351 * duplicate the resulting load/store, which is not wanted, and may
352 * result in a load/store of the variable with an indirect offset which
353 * the backend may not be able to handle.
355 unsigned cannot_coalesce
:1;
358 * When separate shader programs are enabled, only input/outputs between
359 * the stages of a multi-stage separate program can be safely removed
360 * from the shader interface. Other input/outputs must remains active.
362 * This is also used to make sure xfb varyings that are unused by the
363 * fragment shader are not removed.
365 unsigned always_active_io
:1;
368 * Interpolation mode for shader inputs / outputs
370 * \sa glsl_interp_mode
372 unsigned interpolation
:2;
375 * If non-zero, then this variable may be packed along with other variables
376 * into a single varying slot, so this offset should be applied when
377 * accessing components. For example, an offset of 1 means that the x
378 * component of this variable is actually stored in component y of the
379 * location specified by \c location.
381 unsigned location_frac
:2;
384 * If true, this variable represents an array of scalars that should
385 * be tightly packed. In other words, consecutive array elements
386 * should be stored one component apart, rather than one slot apart.
391 * Whether this is a fragment shader output implicitly initialized with
392 * the previous contents of the specified render target at the
393 * framebuffer location corresponding to this shader invocation.
395 unsigned fb_fetch_output
:1;
398 * Non-zero if this variable is considered bindless as defined by
399 * ARB_bindless_texture.
404 * Was an explicit binding set in the shader?
406 unsigned explicit_binding
:1;
409 * Was the location explicitly set in the shader?
411 * If the location is explicitly set in the shader, it \b cannot be changed
412 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
415 unsigned explicit_location
:1;
418 * Was a transfer feedback buffer set in the shader?
420 unsigned explicit_xfb_buffer
:1;
423 * Was a transfer feedback stride set in the shader?
425 unsigned explicit_xfb_stride
:1;
428 * Was an explicit offset set in the shader?
430 unsigned explicit_offset
:1;
433 * Non-zero if this variable was created by lowering a named interface
436 unsigned from_named_ifc_block
:1;
439 * How the variable was declared. See nir_var_declaration_type.
441 * This is used to detect variables generated by the compiler, so should
442 * not be visible via the API.
444 unsigned how_declared
:2;
447 * \brief Layout qualifier for gl_FragDepth.
449 * This is not equal to \c ir_depth_layout_none if and only if this
450 * variable is \c gl_FragDepth and a layout qualifier is specified.
452 nir_depth_layout depth_layout
:3;
455 * Vertex stream output identifier.
457 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
458 * indicate the stream of the i-th component.
463 * Access flags for memory variables (SSBO/global), image uniforms, and
464 * bindless images in uniforms/inputs/outputs.
466 enum gl_access_qualifier access
:8;
469 * Descriptor set binding for sampler or UBO.
471 unsigned descriptor_set
:5;
474 * output index for dual source blending.
479 * Initial binding point for a sampler or UBO.
481 * For array types, this represents the binding point for the first element.
486 * Storage location of the base of this variable
488 * The precise meaning of this field depends on the nature of the variable.
490 * - Vertex shader input: one of the values from \c gl_vert_attrib.
491 * - Vertex shader output: one of the values from \c gl_varying_slot.
492 * - Geometry shader input: one of the values from \c gl_varying_slot.
493 * - Geometry shader output: one of the values from \c gl_varying_slot.
494 * - Fragment shader input: one of the values from \c gl_varying_slot.
495 * - Fragment shader output: one of the values from \c gl_frag_result.
496 * - Uniforms: Per-stage uniform slot number for default uniform block.
497 * - Uniforms: Index within the uniform block definition for UBO members.
498 * - Non-UBO Uniforms: uniform slot number.
499 * - Other: This field is not currently used.
501 * If the variable is a uniform, shader input, or shader output, and the
502 * slot has not been assigned, the value will be -1.
507 * The actual location of the variable in the IR. Only valid for inputs,
508 * outputs, and uniforms (including samplers and images).
510 unsigned driver_location
;
513 * Location an atomic counter or transform feedback is stored at.
519 /** Image internal format if specified explicitly, otherwise GL_NONE. */
520 uint16_t format
; /* GLenum */
525 * Transform feedback buffer.
530 * Transform feedback stride.
538 * Identifier for this variable generated by nir_index_vars() that is unique
539 * among other variables in the same exec_list.
543 /* Number of nir_variable_data members */
544 uint16_t num_members
;
547 * Built-in state that backs this uniform
549 * Once set at variable creation, \c state_slots must remain invariant.
550 * This is because, ideally, this array would be shared by all clones of
551 * this variable in the IR tree. In other words, we'd really like for it
552 * to be a fly-weight.
554 * If the variable is not a uniform, \c num_state_slots will be zero and
555 * \c state_slots will be \c NULL.
558 uint16_t num_state_slots
; /**< Number of state slots used */
559 nir_state_slot
*state_slots
; /**< State descriptors. */
563 * Constant expression assigned in the initializer of the variable
565 * This field should only be used temporarily by creators of NIR shaders
566 * and then lower_constant_initializers can be used to get rid of them.
567 * Most of the rest of NIR ignores this field or asserts that it's NULL.
569 nir_constant
*constant_initializer
;
572 * For variables that are in an interface block or are an instance of an
573 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
575 * \sa ir_variable::location
577 const struct glsl_type
*interface_type
;
580 * Description of per-member data for per-member struct variables
582 * This is used for variables which are actually an amalgamation of
583 * multiple entities such as a struct of built-in values or a struct of
584 * inputs each with their own layout specifier. This is only allowed on
585 * variables with a struct or array of array of struct type.
587 struct nir_variable_data
*members
;
590 #define nir_foreach_variable(var, var_list) \
591 foreach_list_typed(nir_variable, var, node, var_list)
593 #define nir_foreach_variable_safe(var, var_list) \
594 foreach_list_typed_safe(nir_variable, var, node, var_list)
597 nir_variable_is_global(const nir_variable
*var
)
599 return var
->data
.mode
!= nir_var_function_temp
;
602 typedef struct nir_register
{
603 struct exec_node node
;
605 unsigned num_components
; /** < number of vector components */
606 unsigned num_array_elems
; /** < size of array (0 for no array) */
608 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
611 /** generic register index. */
614 /** only for debug purposes, can be NULL */
617 /** set of nir_srcs where this register is used (read from) */
618 struct list_head uses
;
620 /** set of nir_dests where this register is defined (written to) */
621 struct list_head defs
;
623 /** set of nir_ifs where this register is used as a condition */
624 struct list_head if_uses
;
627 #define nir_foreach_register(reg, reg_list) \
628 foreach_list_typed(nir_register, reg, node, reg_list)
629 #define nir_foreach_register_safe(reg, reg_list) \
630 foreach_list_typed_safe(nir_register, reg, node, reg_list)
632 typedef enum PACKED
{
634 nir_instr_type_deref
,
637 nir_instr_type_intrinsic
,
638 nir_instr_type_load_const
,
640 nir_instr_type_ssa_undef
,
642 nir_instr_type_parallel_copy
,
645 typedef struct nir_instr
{
646 struct exec_node node
;
647 struct nir_block
*block
;
650 /* A temporary for optimization and analysis passes to use for storing
651 * flags. For instance, DCE uses this to store the "dead/live" info.
655 /** generic instruction index. */
659 static inline nir_instr
*
660 nir_instr_next(nir_instr
*instr
)
662 struct exec_node
*next
= exec_node_get_next(&instr
->node
);
663 if (exec_node_is_tail_sentinel(next
))
666 return exec_node_data(nir_instr
, next
, node
);
669 static inline nir_instr
*
670 nir_instr_prev(nir_instr
*instr
)
672 struct exec_node
*prev
= exec_node_get_prev(&instr
->node
);
673 if (exec_node_is_head_sentinel(prev
))
676 return exec_node_data(nir_instr
, prev
, node
);
680 nir_instr_is_first(const nir_instr
*instr
)
682 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr
->node
));
686 nir_instr_is_last(const nir_instr
*instr
)
688 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr
->node
));
691 typedef struct nir_ssa_def
{
692 /** for debugging only, can be NULL */
695 /** generic SSA definition index. */
698 /** Index into the live_in and live_out bitfields */
701 /** Instruction which produces this SSA value. */
702 nir_instr
*parent_instr
;
704 /** set of nir_instrs where this register is used (read from) */
705 struct list_head uses
;
707 /** set of nir_ifs where this register is used as a condition */
708 struct list_head if_uses
;
710 uint8_t num_components
;
712 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
720 struct nir_src
*indirect
; /** < NULL for no indirect offset */
721 unsigned base_offset
;
723 /* TODO use-def chain goes here */
727 nir_instr
*parent_instr
;
728 struct list_head def_link
;
731 struct nir_src
*indirect
; /** < NULL for no indirect offset */
732 unsigned base_offset
;
734 /* TODO def-use chain goes here */
739 typedef struct nir_src
{
741 /** Instruction that consumes this value as a source. */
742 nir_instr
*parent_instr
;
743 struct nir_if
*parent_if
;
746 struct list_head use_link
;
756 static inline nir_src
759 nir_src src
= { { NULL
} };
763 #define NIR_SRC_INIT nir_src_init()
765 #define nir_foreach_use(src, reg_or_ssa_def) \
766 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
768 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
769 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
771 #define nir_foreach_if_use(src, reg_or_ssa_def) \
772 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
774 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
775 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
786 static inline nir_dest
789 nir_dest dest
= { { { NULL
} } };
793 #define NIR_DEST_INIT nir_dest_init()
795 #define nir_foreach_def(dest, reg) \
796 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
798 #define nir_foreach_def_safe(dest, reg) \
799 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
801 static inline nir_src
802 nir_src_for_ssa(nir_ssa_def
*def
)
804 nir_src src
= NIR_SRC_INIT
;
812 static inline nir_src
813 nir_src_for_reg(nir_register
*reg
)
815 nir_src src
= NIR_SRC_INIT
;
819 src
.reg
.indirect
= NULL
;
820 src
.reg
.base_offset
= 0;
825 static inline nir_dest
826 nir_dest_for_reg(nir_register
*reg
)
828 nir_dest dest
= NIR_DEST_INIT
;
835 static inline unsigned
836 nir_src_bit_size(nir_src src
)
838 return src
.is_ssa
? src
.ssa
->bit_size
: src
.reg
.reg
->bit_size
;
841 static inline unsigned
842 nir_src_num_components(nir_src src
)
844 return src
.is_ssa
? src
.ssa
->num_components
: src
.reg
.reg
->num_components
;
848 nir_src_is_const(nir_src src
)
851 src
.ssa
->parent_instr
->type
== nir_instr_type_load_const
;
854 static inline unsigned
855 nir_dest_bit_size(nir_dest dest
)
857 return dest
.is_ssa
? dest
.ssa
.bit_size
: dest
.reg
.reg
->bit_size
;
860 static inline unsigned
861 nir_dest_num_components(nir_dest dest
)
863 return dest
.is_ssa
? dest
.ssa
.num_components
: dest
.reg
.reg
->num_components
;
866 void nir_src_copy(nir_src
*dest
, const nir_src
*src
, void *instr_or_if
);
867 void nir_dest_copy(nir_dest
*dest
, const nir_dest
*src
, nir_instr
*instr
);
873 * \name input modifiers
877 * For inputs interpreted as floating point, flips the sign bit. For
878 * inputs interpreted as integers, performs the two's complement negation.
883 * Clears the sign bit for floating point values, and computes the integer
884 * absolute value for integers. Note that the negate modifier acts after
885 * the absolute value modifier, therefore if both are set then all inputs
886 * will become negative.
892 * For each input component, says which component of the register it is
893 * chosen from. Note that which elements of the swizzle are used and which
894 * are ignored are based on the write mask for most opcodes - for example,
895 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
896 * a swizzle of {2, x, 1, 0} where x means "don't care."
898 uint8_t swizzle
[NIR_MAX_VEC_COMPONENTS
];
905 * \name saturate output modifier
907 * Only valid for opcodes that output floating-point numbers. Clamps the
908 * output to between 0.0 and 1.0 inclusive.
913 unsigned write_mask
: NIR_MAX_VEC_COMPONENTS
; /* ignored if dest.is_ssa is true */
916 /** NIR sized and unsized types
918 * The values in this enum are carefully chosen so that the sized type is
919 * just the unsized type OR the number of bits.
922 nir_type_invalid
= 0, /* Not a valid type */
926 nir_type_float
= 128,
927 nir_type_bool1
= 1 | nir_type_bool
,
928 nir_type_bool8
= 8 | nir_type_bool
,
929 nir_type_bool16
= 16 | nir_type_bool
,
930 nir_type_bool32
= 32 | nir_type_bool
,
931 nir_type_int1
= 1 | nir_type_int
,
932 nir_type_int8
= 8 | nir_type_int
,
933 nir_type_int16
= 16 | nir_type_int
,
934 nir_type_int32
= 32 | nir_type_int
,
935 nir_type_int64
= 64 | nir_type_int
,
936 nir_type_uint1
= 1 | nir_type_uint
,
937 nir_type_uint8
= 8 | nir_type_uint
,
938 nir_type_uint16
= 16 | nir_type_uint
,
939 nir_type_uint32
= 32 | nir_type_uint
,
940 nir_type_uint64
= 64 | nir_type_uint
,
941 nir_type_float16
= 16 | nir_type_float
,
942 nir_type_float32
= 32 | nir_type_float
,
943 nir_type_float64
= 64 | nir_type_float
,
946 #define NIR_ALU_TYPE_SIZE_MASK 0x79
947 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
949 static inline unsigned
950 nir_alu_type_get_type_size(nir_alu_type type
)
952 return type
& NIR_ALU_TYPE_SIZE_MASK
;
955 static inline unsigned
956 nir_alu_type_get_base_type(nir_alu_type type
)
958 return type
& NIR_ALU_TYPE_BASE_TYPE_MASK
;
961 static inline nir_alu_type
962 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type
)
966 return nir_type_bool1
;
969 return nir_type_uint32
;
972 return nir_type_int32
;
974 case GLSL_TYPE_UINT16
:
975 return nir_type_uint16
;
977 case GLSL_TYPE_INT16
:
978 return nir_type_int16
;
980 case GLSL_TYPE_UINT8
:
981 return nir_type_uint8
;
983 return nir_type_int8
;
984 case GLSL_TYPE_UINT64
:
985 return nir_type_uint64
;
987 case GLSL_TYPE_INT64
:
988 return nir_type_int64
;
990 case GLSL_TYPE_FLOAT
:
991 return nir_type_float32
;
993 case GLSL_TYPE_FLOAT16
:
994 return nir_type_float16
;
996 case GLSL_TYPE_DOUBLE
:
997 return nir_type_float64
;
1000 case GLSL_TYPE_SAMPLER
:
1001 case GLSL_TYPE_IMAGE
:
1002 case GLSL_TYPE_ATOMIC_UINT
:
1003 case GLSL_TYPE_STRUCT
:
1004 case GLSL_TYPE_INTERFACE
:
1005 case GLSL_TYPE_ARRAY
:
1006 case GLSL_TYPE_VOID
:
1007 case GLSL_TYPE_SUBROUTINE
:
1008 case GLSL_TYPE_FUNCTION
:
1009 case GLSL_TYPE_ERROR
:
1010 return nir_type_invalid
;
1013 unreachable("unknown type");
1016 static inline nir_alu_type
1017 nir_get_nir_type_for_glsl_type(const struct glsl_type
*type
)
1019 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type
));
1022 nir_op
nir_type_conversion_op(nir_alu_type src
, nir_alu_type dst
,
1023 nir_rounding_mode rnd
);
1025 static inline nir_op
1026 nir_op_vec(unsigned components
)
1028 switch (components
) {
1029 case 1: return nir_op_mov
;
1030 case 2: return nir_op_vec2
;
1031 case 3: return nir_op_vec3
;
1032 case 4: return nir_op_vec4
;
1033 default: unreachable("bad component count");
1038 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode
, unsigned bit_size
)
1040 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16
) ||
1041 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32
) ||
1042 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64
);
1046 nir_is_denorm_flush_to_zero(unsigned execution_mode
, unsigned bit_size
)
1048 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16
) ||
1049 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32
) ||
1050 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64
);
1054 nir_is_denorm_preserve(unsigned execution_mode
, unsigned bit_size
)
1056 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP16
) ||
1057 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP32
) ||
1058 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_DENORM_PRESERVE_FP64
);
1062 nir_is_rounding_mode_rtne(unsigned execution_mode
, unsigned bit_size
)
1064 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1065 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1066 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1070 nir_is_rounding_mode_rtz(unsigned execution_mode
, unsigned bit_size
)
1072 return (16 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1073 (32 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1074 (64 == bit_size
&& execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1078 nir_has_any_rounding_mode_rtz(unsigned execution_mode
)
1080 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16
) ||
1081 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32
) ||
1082 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64
);
1086 nir_has_any_rounding_mode_rtne(unsigned execution_mode
)
1088 return (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16
) ||
1089 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32
) ||
1090 (execution_mode
& FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64
);
1093 static inline nir_rounding_mode
1094 nir_get_rounding_mode_from_float_controls(unsigned execution_mode
,
1097 if (nir_alu_type_get_base_type(type
) != nir_type_float
)
1098 return nir_rounding_mode_undef
;
1100 unsigned bit_size
= nir_alu_type_get_type_size(type
);
1102 if (nir_is_rounding_mode_rtz(execution_mode
, bit_size
))
1103 return nir_rounding_mode_rtz
;
1104 if (nir_is_rounding_mode_rtne(execution_mode
, bit_size
))
1105 return nir_rounding_mode_rtne
;
1106 return nir_rounding_mode_undef
;
1110 nir_has_any_rounding_mode_enabled(unsigned execution_mode
)
1113 nir_has_any_rounding_mode_rtne(execution_mode
) ||
1114 nir_has_any_rounding_mode_rtz(execution_mode
);
1120 * Operation where the first two sources are commutative.
1122 * For 2-source operations, this just mathematical commutativity. Some
1123 * 3-source operations, like ffma, are only commutative in the first two
1126 NIR_OP_IS_2SRC_COMMUTATIVE
= (1 << 0),
1127 NIR_OP_IS_ASSOCIATIVE
= (1 << 1),
1128 } nir_op_algebraic_property
;
1133 unsigned num_inputs
;
1136 * The number of components in the output
1138 * If non-zero, this is the size of the output and input sizes are
1139 * explicitly given; swizzle and writemask are still in effect, but if
1140 * the output component is masked out, then the input component may
1143 * If zero, the opcode acts in the standard, per-component manner; the
1144 * operation is performed on each component (except the ones that are
1145 * masked out) with the input being taken from the input swizzle for
1148 * The size of some of the inputs may be given (i.e. non-zero) even
1149 * though output_size is zero; in that case, the inputs with a zero
1150 * size act per-component, while the inputs with non-zero size don't.
1152 unsigned output_size
;
1155 * The type of vector that the instruction outputs. Note that the
1156 * staurate modifier is only allowed on outputs with the float type.
1159 nir_alu_type output_type
;
1162 * The number of components in each input
1164 unsigned input_sizes
[NIR_MAX_VEC_COMPONENTS
];
1167 * The type of vector that each input takes. Note that negate and
1168 * absolute value are only allowed on inputs with int or float type and
1169 * behave differently on the two.
1171 nir_alu_type input_types
[NIR_MAX_VEC_COMPONENTS
];
1173 nir_op_algebraic_property algebraic_properties
;
1175 /* Whether this represents a numeric conversion opcode */
1179 extern const nir_op_info nir_op_infos
[nir_num_opcodes
];
1181 typedef struct nir_alu_instr
{
1185 /** Indicates that this ALU instruction generates an exact value
1187 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1188 * really equivalent to either. This indicates that the value generated by
1189 * this operation is high-precision and any code transformations that touch
1190 * it must ensure that the resulting value is bit-for-bit identical to the
1196 * Indicates that this instruction do not cause wrapping to occur, in the
1197 * form of overflow or underflow.
1199 bool no_signed_wrap
:1;
1200 bool no_unsigned_wrap
:1;
1206 void nir_alu_src_copy(nir_alu_src
*dest
, const nir_alu_src
*src
,
1207 nir_alu_instr
*instr
);
1208 void nir_alu_dest_copy(nir_alu_dest
*dest
, const nir_alu_dest
*src
,
1209 nir_alu_instr
*instr
);
1211 /* is this source channel used? */
1213 nir_alu_instr_channel_used(const nir_alu_instr
*instr
, unsigned src
,
1216 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1217 return channel
< nir_op_infos
[instr
->op
].input_sizes
[src
];
1219 return (instr
->dest
.write_mask
>> channel
) & 1;
1222 static inline nir_component_mask_t
1223 nir_alu_instr_src_read_mask(const nir_alu_instr
*instr
, unsigned src
)
1225 nir_component_mask_t read_mask
= 0;
1226 for (unsigned c
= 0; c
< NIR_MAX_VEC_COMPONENTS
; c
++) {
1227 if (!nir_alu_instr_channel_used(instr
, src
, c
))
1230 read_mask
|= (1 << instr
->src
[src
].swizzle
[c
]);
1236 * Get the number of channels used for a source
1238 static inline unsigned
1239 nir_ssa_alu_instr_src_components(const nir_alu_instr
*instr
, unsigned src
)
1241 if (nir_op_infos
[instr
->op
].input_sizes
[src
] > 0)
1242 return nir_op_infos
[instr
->op
].input_sizes
[src
];
1244 return nir_dest_num_components(instr
->dest
.dest
);
1248 nir_alu_instr_is_comparison(const nir_alu_instr
*instr
)
1250 switch (instr
->op
) {
1270 bool nir_const_value_negative_equal(nir_const_value c1
, nir_const_value c2
,
1271 nir_alu_type full_type
);
1273 bool nir_alu_srcs_equal(const nir_alu_instr
*alu1
, const nir_alu_instr
*alu2
,
1274 unsigned src1
, unsigned src2
);
1276 bool nir_alu_srcs_negative_equal(const nir_alu_instr
*alu1
,
1277 const nir_alu_instr
*alu2
,
1278 unsigned src1
, unsigned src2
);
1282 nir_deref_type_array
,
1283 nir_deref_type_array_wildcard
,
1284 nir_deref_type_ptr_as_array
,
1285 nir_deref_type_struct
,
1286 nir_deref_type_cast
,
1292 /** The type of this deref instruction */
1293 nir_deref_type deref_type
;
1295 /** The mode of the underlying variable */
1296 nir_variable_mode mode
;
1298 /** The dereferenced type of the resulting pointer value */
1299 const struct glsl_type
*type
;
1302 /** Variable being dereferenced if deref_type is a deref_var */
1305 /** Parent deref if deref_type is not deref_var */
1309 /** Additional deref parameters */
1320 unsigned ptr_stride
;
1324 /** Destination to store the resulting "pointer" */
1328 static inline nir_deref_instr
*nir_src_as_deref(nir_src src
);
1330 static inline nir_deref_instr
*
1331 nir_deref_instr_parent(const nir_deref_instr
*instr
)
1333 if (instr
->deref_type
== nir_deref_type_var
)
1336 return nir_src_as_deref(instr
->parent
);
1339 static inline nir_variable
*
1340 nir_deref_instr_get_variable(const nir_deref_instr
*instr
)
1342 while (instr
->deref_type
!= nir_deref_type_var
) {
1343 if (instr
->deref_type
== nir_deref_type_cast
)
1346 instr
= nir_deref_instr_parent(instr
);
1352 bool nir_deref_instr_has_indirect(nir_deref_instr
*instr
);
1353 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr
*instr
);
1354 bool nir_deref_instr_has_complex_use(nir_deref_instr
*instr
);
1356 bool nir_deref_instr_remove_if_unused(nir_deref_instr
*instr
);
1358 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr
*instr
);
1363 struct nir_function
*callee
;
1365 unsigned num_params
;
1369 #include "nir_intrinsics.h"
1371 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1373 /** Represents an intrinsic
1375 * An intrinsic is an instruction type for handling things that are
1376 * more-or-less regular operations but don't just consume and produce SSA
1377 * values like ALU operations do. Intrinsics are not for things that have
1378 * special semantic meaning such as phi nodes and parallel copies.
1379 * Examples of intrinsics include variable load/store operations, system
1380 * value loads, and the like. Even though texturing more-or-less falls
1381 * under this category, texturing is its own instruction type because
1382 * trying to represent texturing with intrinsics would lead to a
1383 * combinatorial explosion of intrinsic opcodes.
1385 * By having a single instruction type for handling a lot of different
1386 * cases, optimization passes can look for intrinsics and, for the most
1387 * part, completely ignore them. Each intrinsic type also has a few
1388 * possible flags that govern whether or not they can be reordered or
1389 * eliminated. That way passes like dead code elimination can still work
1390 * on intrisics without understanding the meaning of each.
1392 * Each intrinsic has some number of constant indices, some number of
1393 * variables, and some number of sources. What these sources, variables,
1394 * and indices mean depends on the intrinsic and is documented with the
1395 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1396 * instructions are the only types of instruction that can operate on
1402 nir_intrinsic_op intrinsic
;
1406 /** number of components if this is a vectorized intrinsic
1408 * Similarly to ALU operations, some intrinsics are vectorized.
1409 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1410 * For vectorized intrinsics, the num_components field specifies the
1411 * number of destination components and the number of source components
1412 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1414 uint8_t num_components
;
1416 int const_index
[NIR_INTRINSIC_MAX_CONST_INDEX
];
1419 } nir_intrinsic_instr
;
1421 static inline nir_variable
*
1422 nir_intrinsic_get_var(nir_intrinsic_instr
*intrin
, unsigned i
)
1424 return nir_deref_instr_get_variable(nir_src_as_deref(intrin
->src
[i
]));
1428 /* Memory ordering. */
1429 NIR_MEMORY_ACQUIRE
= 1 << 0,
1430 NIR_MEMORY_RELEASE
= 1 << 1,
1432 /* Memory visibility operations. */
1433 NIR_MEMORY_MAKE_AVAILABLE
= 1 << 3,
1434 NIR_MEMORY_MAKE_VISIBLE
= 1 << 4,
1435 } nir_memory_semantics
;
1439 NIR_SCOPE_QUEUE_FAMILY
,
1440 NIR_SCOPE_WORKGROUP
,
1442 NIR_SCOPE_INVOCATION
,
1446 * \name NIR intrinsics semantic flags
1448 * information about what the compiler can do with the intrinsics.
1450 * \sa nir_intrinsic_info::flags
1454 * whether the intrinsic can be safely eliminated if none of its output
1455 * value is not being used.
1457 NIR_INTRINSIC_CAN_ELIMINATE
= (1 << 0),
1460 * Whether the intrinsic can be reordered with respect to any other
1461 * intrinsic, i.e. whether the only reordering dependencies of the
1462 * intrinsic are due to the register reads/writes.
1464 NIR_INTRINSIC_CAN_REORDER
= (1 << 1),
1465 } nir_intrinsic_semantic_flag
;
1468 * \name NIR intrinsics const-index flag
1470 * Indicates the usage of a const_index slot.
1472 * \sa nir_intrinsic_info::index_map
1476 * Generally instructions that take a offset src argument, can encode
1477 * a constant 'base' value which is added to the offset.
1479 NIR_INTRINSIC_BASE
= 1,
1482 * For store instructions, a writemask for the store.
1484 NIR_INTRINSIC_WRMASK
,
1487 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1489 NIR_INTRINSIC_STREAM_ID
,
1492 * The clip-plane id for load_user_clip_plane intrinsic.
1494 NIR_INTRINSIC_UCP_ID
,
1497 * The amount of data, starting from BASE, that this instruction may
1498 * access. This is used to provide bounds if the offset is not constant.
1500 NIR_INTRINSIC_RANGE
,
1503 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1505 NIR_INTRINSIC_DESC_SET
,
1508 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1510 NIR_INTRINSIC_BINDING
,
1515 NIR_INTRINSIC_COMPONENT
,
1518 * Interpolation mode (only meaningful for FS inputs).
1520 NIR_INTRINSIC_INTERP_MODE
,
1523 * A binary nir_op to use when performing a reduction or scan operation
1525 NIR_INTRINSIC_REDUCTION_OP
,
1528 * Cluster size for reduction operations
1530 NIR_INTRINSIC_CLUSTER_SIZE
,
1533 * Parameter index for a load_param intrinsic
1535 NIR_INTRINSIC_PARAM_IDX
,
1538 * Image dimensionality for image intrinsics
1540 * One of GLSL_SAMPLER_DIM_*
1542 NIR_INTRINSIC_IMAGE_DIM
,
1545 * Non-zero if we are accessing an array image
1547 NIR_INTRINSIC_IMAGE_ARRAY
,
1550 * Image format for image intrinsics
1552 NIR_INTRINSIC_FORMAT
,
1555 * Access qualifiers for image and memory access intrinsics
1557 NIR_INTRINSIC_ACCESS
,
1560 * Alignment for offsets and addresses
1562 * These two parameters, specify an alignment in terms of a multiplier and
1563 * an offset. The offset or address parameter X of the intrinsic is
1564 * guaranteed to satisfy the following:
1566 * (X - align_offset) % align_mul == 0
1568 NIR_INTRINSIC_ALIGN_MUL
,
1569 NIR_INTRINSIC_ALIGN_OFFSET
,
1572 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1574 NIR_INTRINSIC_DESC_TYPE
,
1577 * The nir_alu_type of a uniform/input/output
1582 * The swizzle mask for the instructions
1583 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1585 NIR_INTRINSIC_SWIZZLE_MASK
,
1587 /* Separate source/dest access flags for copies */
1588 NIR_INTRINSIC_SRC_ACCESS
,
1589 NIR_INTRINSIC_DST_ACCESS
,
1591 /* Driver location for nir_load_patch_location_ir3 */
1592 NIR_INTRINSIC_DRIVER_LOCATION
,
1595 * Mask of nir_memory_semantics, includes ordering and visibility.
1597 NIR_INTRINSIC_MEMORY_SEMANTICS
,
1600 * Mask of nir_variable_modes affected by the memory operation.
1602 NIR_INTRINSIC_MEMORY_MODES
,
1605 * Value of nir_scope.
1607 NIR_INTRINSIC_MEMORY_SCOPE
,
1609 NIR_INTRINSIC_NUM_INDEX_FLAGS
,
1611 } nir_intrinsic_index_flag
;
1613 #define NIR_INTRINSIC_MAX_INPUTS 5
1618 unsigned num_srcs
; /** < number of register/SSA inputs */
1620 /** number of components of each input register
1622 * If this value is 0, the number of components is given by the
1623 * num_components field of nir_intrinsic_instr. If this value is -1, the
1624 * intrinsic consumes however many components are provided and it is not
1627 int src_components
[NIR_INTRINSIC_MAX_INPUTS
];
1631 /** number of components of the output register
1633 * If this value is 0, the number of components is given by the
1634 * num_components field of nir_intrinsic_instr.
1636 unsigned dest_components
;
1638 /** bitfield of legal bit sizes */
1639 unsigned dest_bit_sizes
;
1641 /** the number of constant indices used by the intrinsic */
1642 unsigned num_indices
;
1644 /** indicates the usage of intr->const_index[n] */
1645 unsigned index_map
[NIR_INTRINSIC_NUM_INDEX_FLAGS
];
1647 /** semantic flags for calls to this intrinsic */
1648 nir_intrinsic_semantic_flag flags
;
1649 } nir_intrinsic_info
;
1651 extern const nir_intrinsic_info nir_intrinsic_infos
[nir_num_intrinsics
];
1653 static inline unsigned
1654 nir_intrinsic_src_components(nir_intrinsic_instr
*intr
, unsigned srcn
)
1656 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1657 assert(srcn
< info
->num_srcs
);
1658 if (info
->src_components
[srcn
] > 0)
1659 return info
->src_components
[srcn
];
1660 else if (info
->src_components
[srcn
] == 0)
1661 return intr
->num_components
;
1663 return nir_src_num_components(intr
->src
[srcn
]);
1666 static inline unsigned
1667 nir_intrinsic_dest_components(nir_intrinsic_instr
*intr
)
1669 const nir_intrinsic_info
*info
= &nir_intrinsic_infos
[intr
->intrinsic
];
1670 if (!info
->has_dest
)
1672 else if (info
->dest_components
)
1673 return info
->dest_components
;
1675 return intr
->num_components
;
1678 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1679 static inline type \
1680 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1682 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1683 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1684 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1686 static inline void \
1687 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1689 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1690 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1691 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1694 INTRINSIC_IDX_ACCESSORS(write_mask
, WRMASK
, unsigned)
1695 INTRINSIC_IDX_ACCESSORS(base
, BASE
, int)
1696 INTRINSIC_IDX_ACCESSORS(stream_id
, STREAM_ID
, unsigned)
1697 INTRINSIC_IDX_ACCESSORS(ucp_id
, UCP_ID
, unsigned)
1698 INTRINSIC_IDX_ACCESSORS(range
, RANGE
, unsigned)
1699 INTRINSIC_IDX_ACCESSORS(desc_set
, DESC_SET
, unsigned)
1700 INTRINSIC_IDX_ACCESSORS(binding
, BINDING
, unsigned)
1701 INTRINSIC_IDX_ACCESSORS(component
, COMPONENT
, unsigned)
1702 INTRINSIC_IDX_ACCESSORS(interp_mode
, INTERP_MODE
, unsigned)
1703 INTRINSIC_IDX_ACCESSORS(reduction_op
, REDUCTION_OP
, unsigned)
1704 INTRINSIC_IDX_ACCESSORS(cluster_size
, CLUSTER_SIZE
, unsigned)
1705 INTRINSIC_IDX_ACCESSORS(param_idx
, PARAM_IDX
, unsigned)
1706 INTRINSIC_IDX_ACCESSORS(image_dim
, IMAGE_DIM
, enum glsl_sampler_dim
)
1707 INTRINSIC_IDX_ACCESSORS(image_array
, IMAGE_ARRAY
, bool)
1708 INTRINSIC_IDX_ACCESSORS(access
, ACCESS
, enum gl_access_qualifier
)
1709 INTRINSIC_IDX_ACCESSORS(src_access
, SRC_ACCESS
, enum gl_access_qualifier
)
1710 INTRINSIC_IDX_ACCESSORS(dst_access
, DST_ACCESS
, enum gl_access_qualifier
)
1711 INTRINSIC_IDX_ACCESSORS(format
, FORMAT
, unsigned)
1712 INTRINSIC_IDX_ACCESSORS(align_mul
, ALIGN_MUL
, unsigned)
1713 INTRINSIC_IDX_ACCESSORS(align_offset
, ALIGN_OFFSET
, unsigned)
1714 INTRINSIC_IDX_ACCESSORS(desc_type
, DESC_TYPE
, unsigned)
1715 INTRINSIC_IDX_ACCESSORS(type
, TYPE
, nir_alu_type
)
1716 INTRINSIC_IDX_ACCESSORS(swizzle_mask
, SWIZZLE_MASK
, unsigned)
1717 INTRINSIC_IDX_ACCESSORS(driver_location
, DRIVER_LOCATION
, unsigned)
1718 INTRINSIC_IDX_ACCESSORS(memory_semantics
, MEMORY_SEMANTICS
, nir_memory_semantics
)
1719 INTRINSIC_IDX_ACCESSORS(memory_modes
, MEMORY_MODES
, nir_variable_mode
)
1720 INTRINSIC_IDX_ACCESSORS(memory_scope
, MEMORY_SCOPE
, nir_scope
)
1723 nir_intrinsic_set_align(nir_intrinsic_instr
*intrin
,
1724 unsigned align_mul
, unsigned align_offset
)
1726 assert(util_is_power_of_two_nonzero(align_mul
));
1727 assert(align_offset
< align_mul
);
1728 nir_intrinsic_set_align_mul(intrin
, align_mul
);
1729 nir_intrinsic_set_align_offset(intrin
, align_offset
);
1732 /** Returns a simple alignment for a load/store intrinsic offset
1734 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1735 * and ALIGN_OFFSET parameters, this helper takes both into account and
1736 * provides a single simple alignment parameter. The offset X is guaranteed
1737 * to satisfy X % align == 0.
1739 static inline unsigned
1740 nir_intrinsic_align(const nir_intrinsic_instr
*intrin
)
1742 const unsigned align_mul
= nir_intrinsic_align_mul(intrin
);
1743 const unsigned align_offset
= nir_intrinsic_align_offset(intrin
);
1744 assert(align_offset
< align_mul
);
1745 return align_offset
? 1 << (ffs(align_offset
) - 1) : align_mul
;
1748 /* Converts a image_deref_* intrinsic into a image_* one */
1749 void nir_rewrite_image_intrinsic(nir_intrinsic_instr
*instr
,
1750 nir_ssa_def
*handle
, bool bindless
);
1752 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1754 nir_intrinsic_can_reorder(nir_intrinsic_instr
*instr
)
1756 if (instr
->intrinsic
== nir_intrinsic_load_deref
||
1757 instr
->intrinsic
== nir_intrinsic_load_ssbo
||
1758 instr
->intrinsic
== nir_intrinsic_bindless_image_load
||
1759 instr
->intrinsic
== nir_intrinsic_image_deref_load
||
1760 instr
->intrinsic
== nir_intrinsic_image_load
) {
1761 return nir_intrinsic_access(instr
) & ACCESS_CAN_REORDER
;
1763 const nir_intrinsic_info
*info
=
1764 &nir_intrinsic_infos
[instr
->intrinsic
];
1765 return (info
->flags
& NIR_INTRINSIC_CAN_ELIMINATE
) &&
1766 (info
->flags
& NIR_INTRINSIC_CAN_REORDER
);
1771 * \group texture information
1773 * This gives semantic information about textures which is useful to the
1774 * frontend, the backend, and lowering passes, but not the optimizer.
1779 nir_tex_src_projector
,
1780 nir_tex_src_comparator
, /* shadow comparator */
1784 nir_tex_src_min_lod
,
1785 nir_tex_src_ms_index
, /* MSAA sample index */
1786 nir_tex_src_ms_mcs
, /* MSAA compression value */
1789 nir_tex_src_texture_deref
, /* < deref pointing to the texture */
1790 nir_tex_src_sampler_deref
, /* < deref pointing to the sampler */
1791 nir_tex_src_texture_offset
, /* < dynamically uniform indirect offset */
1792 nir_tex_src_sampler_offset
, /* < dynamically uniform indirect offset */
1793 nir_tex_src_texture_handle
, /* < bindless texture handle */
1794 nir_tex_src_sampler_handle
, /* < bindless sampler handle */
1795 nir_tex_src_plane
, /* < selects plane for planar textures */
1796 nir_num_tex_src_types
1801 nir_tex_src_type src_type
;
1805 nir_texop_tex
, /**< Regular texture look-up */
1806 nir_texop_txb
, /**< Texture look-up with LOD bias */
1807 nir_texop_txl
, /**< Texture look-up with explicit LOD */
1808 nir_texop_txd
, /**< Texture look-up with partial derivatives */
1809 nir_texop_txf
, /**< Texel fetch with explicit LOD */
1810 nir_texop_txf_ms
, /**< Multisample texture fetch */
1811 nir_texop_txf_ms_fb
, /**< Multisample texture fetch from framebuffer */
1812 nir_texop_txf_ms_mcs
, /**< Multisample compression value fetch */
1813 nir_texop_txs
, /**< Texture size */
1814 nir_texop_lod
, /**< Texture lod query */
1815 nir_texop_tg4
, /**< Texture gather */
1816 nir_texop_query_levels
, /**< Texture levels query */
1817 nir_texop_texture_samples
, /**< Texture samples query */
1818 nir_texop_samples_identical
, /**< Query whether all samples are definitely
1821 nir_texop_tex_prefetch
, /**< Regular texture look-up, eligible for pre-dispatch */
1827 enum glsl_sampler_dim sampler_dim
;
1828 nir_alu_type dest_type
;
1833 unsigned num_srcs
, coord_components
;
1834 bool is_array
, is_shadow
;
1837 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1838 * components or the new-style shadow that outputs 1 component.
1840 bool is_new_style_shadow
;
1842 /* gather component selector */
1843 unsigned component
: 2;
1845 /* gather offsets */
1846 int8_t tg4_offsets
[4][2];
1848 /* True if the texture index or handle is not dynamically uniform */
1849 bool texture_non_uniform
;
1851 /* True if the sampler index or handle is not dynamically uniform */
1852 bool sampler_non_uniform
;
1854 /** The texture index
1856 * If this texture instruction has a nir_tex_src_texture_offset source,
1857 * then the texture index is given by texture_index + texture_offset.
1859 unsigned texture_index
;
1861 /** The size of the texture array or 0 if it's not an array */
1862 unsigned texture_array_size
;
1864 /** The sampler index
1866 * The following operations do not require a sampler and, as such, this
1867 * field should be ignored:
1869 * - nir_texop_txf_ms
1872 * - nir_texop_query_levels
1873 * - nir_texop_texture_samples
1874 * - nir_texop_samples_identical
1876 * If this texture instruction has a nir_tex_src_sampler_offset source,
1877 * then the sampler index is given by sampler_index + sampler_offset.
1879 unsigned sampler_index
;
1882 static inline unsigned
1883 nir_tex_instr_dest_size(const nir_tex_instr
*instr
)
1885 switch (instr
->op
) {
1886 case nir_texop_txs
: {
1888 switch (instr
->sampler_dim
) {
1889 case GLSL_SAMPLER_DIM_1D
:
1890 case GLSL_SAMPLER_DIM_BUF
:
1893 case GLSL_SAMPLER_DIM_2D
:
1894 case GLSL_SAMPLER_DIM_CUBE
:
1895 case GLSL_SAMPLER_DIM_MS
:
1896 case GLSL_SAMPLER_DIM_RECT
:
1897 case GLSL_SAMPLER_DIM_EXTERNAL
:
1898 case GLSL_SAMPLER_DIM_SUBPASS
:
1901 case GLSL_SAMPLER_DIM_3D
:
1905 unreachable("not reached");
1907 if (instr
->is_array
)
1915 case nir_texop_texture_samples
:
1916 case nir_texop_query_levels
:
1917 case nir_texop_samples_identical
:
1921 if (instr
->is_shadow
&& instr
->is_new_style_shadow
)
1928 /* Returns true if this texture operation queries something about the texture
1929 * rather than actually sampling it.
1932 nir_tex_instr_is_query(const nir_tex_instr
*instr
)
1934 switch (instr
->op
) {
1937 case nir_texop_texture_samples
:
1938 case nir_texop_query_levels
:
1939 case nir_texop_txf_ms_mcs
:
1946 case nir_texop_txf_ms
:
1947 case nir_texop_txf_ms_fb
:
1951 unreachable("Invalid texture opcode");
1956 nir_tex_instr_has_implicit_derivative(const nir_tex_instr
*instr
)
1958 switch (instr
->op
) {
1968 static inline nir_alu_type
1969 nir_tex_instr_src_type(const nir_tex_instr
*instr
, unsigned src
)
1971 switch (instr
->src
[src
].src_type
) {
1972 case nir_tex_src_coord
:
1973 switch (instr
->op
) {
1975 case nir_texop_txf_ms
:
1976 case nir_texop_txf_ms_fb
:
1977 case nir_texop_txf_ms_mcs
:
1978 case nir_texop_samples_identical
:
1979 return nir_type_int
;
1982 return nir_type_float
;
1985 case nir_tex_src_lod
:
1986 switch (instr
->op
) {
1989 return nir_type_int
;
1992 return nir_type_float
;
1995 case nir_tex_src_projector
:
1996 case nir_tex_src_comparator
:
1997 case nir_tex_src_bias
:
1998 case nir_tex_src_min_lod
:
1999 case nir_tex_src_ddx
:
2000 case nir_tex_src_ddy
:
2001 return nir_type_float
;
2003 case nir_tex_src_offset
:
2004 case nir_tex_src_ms_index
:
2005 case nir_tex_src_plane
:
2006 return nir_type_int
;
2008 case nir_tex_src_ms_mcs
:
2009 case nir_tex_src_texture_deref
:
2010 case nir_tex_src_sampler_deref
:
2011 case nir_tex_src_texture_offset
:
2012 case nir_tex_src_sampler_offset
:
2013 case nir_tex_src_texture_handle
:
2014 case nir_tex_src_sampler_handle
:
2015 return nir_type_uint
;
2017 case nir_num_tex_src_types
:
2018 unreachable("nir_num_tex_src_types is not a valid source type");
2021 unreachable("Invalid texture source type");
2024 static inline unsigned
2025 nir_tex_instr_src_size(const nir_tex_instr
*instr
, unsigned src
)
2027 if (instr
->src
[src
].src_type
== nir_tex_src_coord
)
2028 return instr
->coord_components
;
2030 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2031 if (instr
->src
[src
].src_type
== nir_tex_src_ms_mcs
)
2034 if (instr
->src
[src
].src_type
== nir_tex_src_ddx
||
2035 instr
->src
[src
].src_type
== nir_tex_src_ddy
) {
2036 if (instr
->is_array
)
2037 return instr
->coord_components
- 1;
2039 return instr
->coord_components
;
2042 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2043 * the offset, since a cube maps to a single face.
2045 if (instr
->src
[src
].src_type
== nir_tex_src_offset
) {
2046 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
)
2048 else if (instr
->is_array
)
2049 return instr
->coord_components
- 1;
2051 return instr
->coord_components
;
2058 nir_tex_instr_src_index(const nir_tex_instr
*instr
, nir_tex_src_type type
)
2060 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++)
2061 if (instr
->src
[i
].src_type
== type
)
2067 void nir_tex_instr_add_src(nir_tex_instr
*tex
,
2068 nir_tex_src_type src_type
,
2071 void nir_tex_instr_remove_src(nir_tex_instr
*tex
, unsigned src_idx
);
2073 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr
*tex
);
2080 nir_const_value value
[];
2081 } nir_load_const_instr
;
2094 /* creates a new SSA variable in an undefined state */
2099 } nir_ssa_undef_instr
;
2102 struct exec_node node
;
2104 /* The predecessor block corresponding to this source */
2105 struct nir_block
*pred
;
2110 #define nir_foreach_phi_src(phi_src, phi) \
2111 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2112 #define nir_foreach_phi_src_safe(phi_src, phi) \
2113 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2118 struct exec_list srcs
; /** < list of nir_phi_src */
2124 struct exec_node node
;
2127 } nir_parallel_copy_entry
;
2129 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2130 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2135 /* A list of nir_parallel_copy_entrys. The sources of all of the
2136 * entries are copied to the corresponding destinations "in parallel".
2137 * In other words, if we have two entries: a -> b and b -> a, the values
2140 struct exec_list entries
;
2141 } nir_parallel_copy_instr
;
2143 NIR_DEFINE_CAST(nir_instr_as_alu
, nir_instr
, nir_alu_instr
, instr
,
2144 type
, nir_instr_type_alu
)
2145 NIR_DEFINE_CAST(nir_instr_as_deref
, nir_instr
, nir_deref_instr
, instr
,
2146 type
, nir_instr_type_deref
)
2147 NIR_DEFINE_CAST(nir_instr_as_call
, nir_instr
, nir_call_instr
, instr
,
2148 type
, nir_instr_type_call
)
2149 NIR_DEFINE_CAST(nir_instr_as_jump
, nir_instr
, nir_jump_instr
, instr
,
2150 type
, nir_instr_type_jump
)
2151 NIR_DEFINE_CAST(nir_instr_as_tex
, nir_instr
, nir_tex_instr
, instr
,
2152 type
, nir_instr_type_tex
)
2153 NIR_DEFINE_CAST(nir_instr_as_intrinsic
, nir_instr
, nir_intrinsic_instr
, instr
,
2154 type
, nir_instr_type_intrinsic
)
2155 NIR_DEFINE_CAST(nir_instr_as_load_const
, nir_instr
, nir_load_const_instr
, instr
,
2156 type
, nir_instr_type_load_const
)
2157 NIR_DEFINE_CAST(nir_instr_as_ssa_undef
, nir_instr
, nir_ssa_undef_instr
, instr
,
2158 type
, nir_instr_type_ssa_undef
)
2159 NIR_DEFINE_CAST(nir_instr_as_phi
, nir_instr
, nir_phi_instr
, instr
,
2160 type
, nir_instr_type_phi
)
2161 NIR_DEFINE_CAST(nir_instr_as_parallel_copy
, nir_instr
,
2162 nir_parallel_copy_instr
, instr
,
2163 type
, nir_instr_type_parallel_copy
)
2166 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2167 static inline type \
2168 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2170 assert(nir_src_is_const(src)); \
2171 nir_load_const_instr *load = \
2172 nir_instr_as_load_const(src.ssa->parent_instr); \
2173 assert(comp < load->def.num_components); \
2174 return nir_const_value_as_##suffix(load->value[comp], \
2175 load->def.bit_size); \
2178 static inline type \
2179 nir_src_as_##suffix(nir_src src) \
2181 assert(nir_src_num_components(src) == 1); \
2182 return nir_src_comp_as_##suffix(src, 0); \
2185 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2186 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint
)
2187 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2188 NIR_DEFINE_SRC_AS_CONST(double, float)
2190 #undef NIR_DEFINE_SRC_AS_CONST
2199 nir_ssa_scalar_is_const(nir_ssa_scalar s
)
2201 return s
.def
->parent_instr
->type
== nir_instr_type_load_const
;
2204 static inline nir_const_value
2205 nir_ssa_scalar_as_const_value(nir_ssa_scalar s
)
2207 assert(s
.comp
< s
.def
->num_components
);
2208 nir_load_const_instr
*load
= nir_instr_as_load_const(s
.def
->parent_instr
);
2209 return load
->value
[s
.comp
];
2212 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2213 static inline type \
2214 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2216 return nir_const_value_as_##suffix( \
2217 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2220 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2221 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint
)
2222 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2223 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2225 #undef NIR_DEFINE_SCALAR_AS_CONST
2228 nir_ssa_scalar_is_alu(nir_ssa_scalar s
)
2230 return s
.def
->parent_instr
->type
== nir_instr_type_alu
;
2233 static inline nir_op
2234 nir_ssa_scalar_alu_op(nir_ssa_scalar s
)
2236 return nir_instr_as_alu(s
.def
->parent_instr
)->op
;
2239 static inline nir_ssa_scalar
2240 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s
, unsigned alu_src_idx
)
2242 nir_ssa_scalar out
= { NULL
, 0 };
2244 nir_alu_instr
*alu
= nir_instr_as_alu(s
.def
->parent_instr
);
2245 assert(alu_src_idx
< nir_op_infos
[alu
->op
].num_inputs
);
2247 /* Our component must be written */
2248 assert(s
.comp
< s
.def
->num_components
);
2249 assert(alu
->dest
.write_mask
& (1u << s
.comp
));
2251 assert(alu
->src
[alu_src_idx
].src
.is_ssa
);
2252 out
.def
= alu
->src
[alu_src_idx
].src
.ssa
;
2254 if (nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 0) {
2255 /* The ALU src is unsized so the source component follows the
2256 * destination component.
2258 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[s
.comp
];
2260 /* This is a sized source so all source components work together to
2261 * produce all the destination components. Since we need to return a
2262 * scalar, this only works if the source is a scalar.
2264 assert(nir_op_infos
[alu
->op
].input_sizes
[alu_src_idx
] == 1);
2265 out
.comp
= alu
->src
[alu_src_idx
].swizzle
[0];
2267 assert(out
.comp
< out
.def
->num_components
);
2276 * Control flow consists of a tree of control flow nodes, which include
2277 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2278 * instructions that always run start-to-finish. Each basic block also keeps
2279 * track of its successors (blocks which may run immediately after the current
2280 * block) and predecessors (blocks which could have run immediately before the
2281 * current block). Each function also has a start block and an end block which
2282 * all return statements point to (which is always empty). Together, all the
2283 * blocks with their predecessors and successors make up the control flow
2284 * graph (CFG) of the function. There are helpers that modify the tree of
2285 * control flow nodes while modifying the CFG appropriately; these should be
2286 * used instead of modifying the tree directly.
2293 nir_cf_node_function
2296 typedef struct nir_cf_node
{
2297 struct exec_node node
;
2298 nir_cf_node_type type
;
2299 struct nir_cf_node
*parent
;
2302 typedef struct nir_block
{
2303 nir_cf_node cf_node
;
2305 struct exec_list instr_list
; /** < list of nir_instr */
2307 /** generic block index; generated by nir_index_blocks */
2311 * Each block can only have up to 2 successors, so we put them in a simple
2312 * array - no need for anything more complicated.
2314 struct nir_block
*successors
[2];
2316 /* Set of nir_block predecessors in the CFG */
2317 struct set
*predecessors
;
2320 * this node's immediate dominator in the dominance tree - set to NULL for
2323 struct nir_block
*imm_dom
;
2325 /* This node's children in the dominance tree */
2326 unsigned num_dom_children
;
2327 struct nir_block
**dom_children
;
2329 /* Set of nir_blocks on the dominance frontier of this block */
2330 struct set
*dom_frontier
;
2333 * These two indices have the property that dom_{pre,post}_index for each
2334 * child of this block in the dominance tree will always be between
2335 * dom_pre_index and dom_post_index for this block, which makes testing if
2336 * a given block is dominated by another block an O(1) operation.
2338 unsigned dom_pre_index
, dom_post_index
;
2340 /* live in and out for this block; used for liveness analysis */
2341 BITSET_WORD
*live_in
;
2342 BITSET_WORD
*live_out
;
2345 static inline nir_instr
*
2346 nir_block_first_instr(nir_block
*block
)
2348 struct exec_node
*head
= exec_list_get_head(&block
->instr_list
);
2349 return exec_node_data(nir_instr
, head
, node
);
2352 static inline nir_instr
*
2353 nir_block_last_instr(nir_block
*block
)
2355 struct exec_node
*tail
= exec_list_get_tail(&block
->instr_list
);
2356 return exec_node_data(nir_instr
, tail
, node
);
2360 nir_block_ends_in_jump(nir_block
*block
)
2362 return !exec_list_is_empty(&block
->instr_list
) &&
2363 nir_block_last_instr(block
)->type
== nir_instr_type_jump
;
2366 #define nir_foreach_instr(instr, block) \
2367 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2368 #define nir_foreach_instr_reverse(instr, block) \
2369 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2370 #define nir_foreach_instr_safe(instr, block) \
2371 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2372 #define nir_foreach_instr_reverse_safe(instr, block) \
2373 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2376 nir_selection_control_none
= 0x0,
2377 nir_selection_control_flatten
= 0x1,
2378 nir_selection_control_dont_flatten
= 0x2,
2379 } nir_selection_control
;
2381 typedef struct nir_if
{
2382 nir_cf_node cf_node
;
2384 nir_selection_control control
;
2386 struct exec_list then_list
; /** < list of nir_cf_node */
2387 struct exec_list else_list
; /** < list of nir_cf_node */
2393 /** Instruction that generates nif::condition. */
2394 nir_instr
*conditional_instr
;
2396 /** Block within ::nif that has the break instruction. */
2397 nir_block
*break_block
;
2399 /** Last block for the then- or else-path that does not contain the break. */
2400 nir_block
*continue_from_block
;
2402 /** True when ::break_block is in the else-path of ::nif. */
2403 bool continue_from_then
;
2406 /* This is true if the terminators exact trip count is unknown. For
2409 * for (int i = 0; i < imin(x, 4); i++)
2412 * Here loop analysis would have set a max_trip_count of 4 however we dont
2413 * know for sure that this is the exact trip count.
2415 bool exact_trip_count_unknown
;
2417 struct list_head loop_terminator_link
;
2418 } nir_loop_terminator
;
2421 /* Estimated cost (in number of instructions) of the loop */
2422 unsigned instr_cost
;
2424 /* Guessed trip count based on array indexing */
2425 unsigned guessed_trip_count
;
2427 /* Maximum number of times the loop is run (if known) */
2428 unsigned max_trip_count
;
2430 /* Do we know the exact number of times the loop will be run */
2431 bool exact_trip_count_known
;
2433 /* Unroll the loop regardless of its size */
2436 /* Does the loop contain complex loop terminators, continues or other
2437 * complex behaviours? If this is true we can't rely on
2438 * loop_terminator_list to be complete or accurate.
2442 nir_loop_terminator
*limiting_terminator
;
2444 /* A list of loop_terminators terminating this loop. */
2445 struct list_head loop_terminator_list
;
2449 nir_loop_control_none
= 0x0,
2450 nir_loop_control_unroll
= 0x1,
2451 nir_loop_control_dont_unroll
= 0x2,
2455 nir_cf_node cf_node
;
2457 struct exec_list body
; /** < list of nir_cf_node */
2459 nir_loop_info
*info
;
2460 nir_loop_control control
;
2461 bool partially_unrolled
;
2465 * Various bits of metadata that can may be created or required by
2466 * optimization and analysis passes
2469 nir_metadata_none
= 0x0,
2470 nir_metadata_block_index
= 0x1,
2471 nir_metadata_dominance
= 0x2,
2472 nir_metadata_live_ssa_defs
= 0x4,
2473 nir_metadata_not_properly_reset
= 0x8,
2474 nir_metadata_loop_analysis
= 0x10,
2478 nir_cf_node cf_node
;
2480 /** pointer to the function of which this is an implementation */
2481 struct nir_function
*function
;
2483 struct exec_list body
; /** < list of nir_cf_node */
2485 nir_block
*end_block
;
2487 /** list for all local variables in the function */
2488 struct exec_list locals
;
2490 /** list of local registers in the function */
2491 struct exec_list registers
;
2493 /** next available local register index */
2496 /** next available SSA value index */
2499 /* total number of basic blocks, only valid when block_index_dirty = false */
2500 unsigned num_blocks
;
2502 nir_metadata valid_metadata
;
2503 } nir_function_impl
;
2505 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2506 nir_start_block(nir_function_impl
*impl
)
2508 return (nir_block
*) impl
->body
.head_sentinel
.next
;
2511 ATTRIBUTE_RETURNS_NONNULL
static inline nir_block
*
2512 nir_impl_last_block(nir_function_impl
*impl
)
2514 return (nir_block
*) impl
->body
.tail_sentinel
.prev
;
2517 static inline nir_cf_node
*
2518 nir_cf_node_next(nir_cf_node
*node
)
2520 struct exec_node
*next
= exec_node_get_next(&node
->node
);
2521 if (exec_node_is_tail_sentinel(next
))
2524 return exec_node_data(nir_cf_node
, next
, node
);
2527 static inline nir_cf_node
*
2528 nir_cf_node_prev(nir_cf_node
*node
)
2530 struct exec_node
*prev
= exec_node_get_prev(&node
->node
);
2531 if (exec_node_is_head_sentinel(prev
))
2534 return exec_node_data(nir_cf_node
, prev
, node
);
2538 nir_cf_node_is_first(const nir_cf_node
*node
)
2540 return exec_node_is_head_sentinel(node
->node
.prev
);
2544 nir_cf_node_is_last(const nir_cf_node
*node
)
2546 return exec_node_is_tail_sentinel(node
->node
.next
);
2549 NIR_DEFINE_CAST(nir_cf_node_as_block
, nir_cf_node
, nir_block
, cf_node
,
2550 type
, nir_cf_node_block
)
2551 NIR_DEFINE_CAST(nir_cf_node_as_if
, nir_cf_node
, nir_if
, cf_node
,
2552 type
, nir_cf_node_if
)
2553 NIR_DEFINE_CAST(nir_cf_node_as_loop
, nir_cf_node
, nir_loop
, cf_node
,
2554 type
, nir_cf_node_loop
)
2555 NIR_DEFINE_CAST(nir_cf_node_as_function
, nir_cf_node
,
2556 nir_function_impl
, cf_node
, type
, nir_cf_node_function
)
2558 static inline nir_block
*
2559 nir_if_first_then_block(nir_if
*if_stmt
)
2561 struct exec_node
*head
= exec_list_get_head(&if_stmt
->then_list
);
2562 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2565 static inline nir_block
*
2566 nir_if_last_then_block(nir_if
*if_stmt
)
2568 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->then_list
);
2569 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2572 static inline nir_block
*
2573 nir_if_first_else_block(nir_if
*if_stmt
)
2575 struct exec_node
*head
= exec_list_get_head(&if_stmt
->else_list
);
2576 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2579 static inline nir_block
*
2580 nir_if_last_else_block(nir_if
*if_stmt
)
2582 struct exec_node
*tail
= exec_list_get_tail(&if_stmt
->else_list
);
2583 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2586 static inline nir_block
*
2587 nir_loop_first_block(nir_loop
*loop
)
2589 struct exec_node
*head
= exec_list_get_head(&loop
->body
);
2590 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2593 static inline nir_block
*
2594 nir_loop_last_block(nir_loop
*loop
)
2596 struct exec_node
*tail
= exec_list_get_tail(&loop
->body
);
2597 return nir_cf_node_as_block(exec_node_data(nir_cf_node
, tail
, node
));
2601 * Return true if this list of cf_nodes contains a single empty block.
2604 nir_cf_list_is_empty_block(struct exec_list
*cf_list
)
2606 if (exec_list_is_singular(cf_list
)) {
2607 struct exec_node
*head
= exec_list_get_head(cf_list
);
2609 nir_cf_node_as_block(exec_node_data(nir_cf_node
, head
, node
));
2610 return exec_list_is_empty(&block
->instr_list
);
2616 uint8_t num_components
;
2620 typedef struct nir_function
{
2621 struct exec_node node
;
2624 struct nir_shader
*shader
;
2626 unsigned num_params
;
2627 nir_parameter
*params
;
2629 /** The implementation of this function.
2631 * If the function is only declared and not implemented, this is NULL.
2633 nir_function_impl
*impl
;
2639 nir_lower_imul64
= (1 << 0),
2640 nir_lower_isign64
= (1 << 1),
2641 /** Lower all int64 modulus and division opcodes */
2642 nir_lower_divmod64
= (1 << 2),
2643 /** Lower all 64-bit umul_high and imul_high opcodes */
2644 nir_lower_imul_high64
= (1 << 3),
2645 nir_lower_mov64
= (1 << 4),
2646 nir_lower_icmp64
= (1 << 5),
2647 nir_lower_iadd64
= (1 << 6),
2648 nir_lower_iabs64
= (1 << 7),
2649 nir_lower_ineg64
= (1 << 8),
2650 nir_lower_logic64
= (1 << 9),
2651 nir_lower_minmax64
= (1 << 10),
2652 nir_lower_shift64
= (1 << 11),
2653 nir_lower_imul_2x32_64
= (1 << 12),
2654 nir_lower_extract64
= (1 << 13),
2655 nir_lower_ufind_msb64
= (1 << 14),
2656 } nir_lower_int64_options
;
2659 nir_lower_drcp
= (1 << 0),
2660 nir_lower_dsqrt
= (1 << 1),
2661 nir_lower_drsq
= (1 << 2),
2662 nir_lower_dtrunc
= (1 << 3),
2663 nir_lower_dfloor
= (1 << 4),
2664 nir_lower_dceil
= (1 << 5),
2665 nir_lower_dfract
= (1 << 6),
2666 nir_lower_dround_even
= (1 << 7),
2667 nir_lower_dmod
= (1 << 8),
2668 nir_lower_dsub
= (1 << 9),
2669 nir_lower_ddiv
= (1 << 10),
2670 nir_lower_fp64_full_software
= (1 << 11),
2671 } nir_lower_doubles_options
;
2674 nir_divergence_single_prim_per_subgroup
= (1 << 0),
2675 nir_divergence_single_patch_per_tcs_subgroup
= (1 << 1),
2676 nir_divergence_single_patch_per_tes_subgroup
= (1 << 2),
2677 nir_divergence_view_index_uniform
= (1 << 3),
2678 } nir_divergence_options
;
2680 typedef struct nir_shader_compiler_options
{
2686 /** Lowers flrp when it does not support doubles */
2693 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2694 bool lower_bitfield_extract
;
2695 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2696 bool lower_bitfield_extract_to_shifts
;
2697 /** Lowers bitfield_insert to bfi/bfm */
2698 bool lower_bitfield_insert
;
2699 /** Lowers bitfield_insert to compares, and shifts. */
2700 bool lower_bitfield_insert_to_shifts
;
2701 /** Lowers bitfield_insert to bfm/bitfield_select. */
2702 bool lower_bitfield_insert_to_bitfield_select
;
2703 /** Lowers bitfield_reverse to shifts. */
2704 bool lower_bitfield_reverse
;
2705 /** Lowers bit_count to shifts. */
2706 bool lower_bit_count
;
2707 /** Lowers ifind_msb to compare and ufind_msb */
2708 bool lower_ifind_msb
;
2709 /** Lowers find_lsb to ufind_msb and logic ops */
2710 bool lower_find_lsb
;
2711 bool lower_uadd_carry
;
2712 bool lower_usub_borrow
;
2713 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2714 bool lower_mul_high
;
2715 /** lowers fneg and ineg to fsub and isub. */
2717 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2720 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2723 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2724 bool lower_vector_cmp
;
2726 /** enables rules to lower idiv by power-of-two: */
2729 /** enable rules to avoid bit ops */
2732 /** enables rules to lower isign to imin+imax */
2735 /** enables rules to lower fsign to fsub and flt */
2738 /* lower fdph to fdot4 */
2741 /** lower fdot to fmul and fsum/fadd. */
2744 /* Does the native fdot instruction replicate its result for four
2745 * components? If so, then opt_algebraic_late will turn all fdotN
2746 * instructions into fdot_replicatedN instructions.
2748 bool fdot_replicates
;
2750 /** lowers ffloor to fsub+ffract: */
2753 /** lowers ffract to fsub+ffloor: */
2756 /** lowers fceil to fneg+ffloor+fneg: */
2763 bool lower_pack_half_2x16
;
2764 bool lower_pack_unorm_2x16
;
2765 bool lower_pack_snorm_2x16
;
2766 bool lower_pack_unorm_4x8
;
2767 bool lower_pack_snorm_4x8
;
2768 bool lower_unpack_half_2x16
;
2769 bool lower_unpack_unorm_2x16
;
2770 bool lower_unpack_snorm_2x16
;
2771 bool lower_unpack_unorm_4x8
;
2772 bool lower_unpack_snorm_4x8
;
2774 bool lower_extract_byte
;
2775 bool lower_extract_word
;
2777 bool lower_all_io_to_temps
;
2778 bool lower_all_io_to_elements
;
2780 /* Indicates that the driver only has zero-based vertex id */
2781 bool vertex_id_zero_based
;
2784 * If enabled, gl_BaseVertex will be lowered as:
2785 * is_indexed_draw (~0/0) & firstvertex
2787 bool lower_base_vertex
;
2790 * If enabled, gl_HelperInvocation will be lowered as:
2792 * !((1 << sample_id) & sample_mask_in))
2794 * This depends on some possibly hw implementation details, which may
2795 * not be true for all hw. In particular that the FS is only executed
2796 * for covered samples or for helper invocations. So, do not blindly
2797 * enable this option.
2799 * Note: See also issue #22 in ARB_shader_image_load_store
2801 bool lower_helper_invocation
;
2804 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2806 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2807 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2809 bool optimize_sample_mask_in
;
2811 bool lower_cs_local_index_from_id
;
2812 bool lower_cs_local_id_from_index
;
2814 bool lower_device_index_to_zero
;
2816 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2817 bool lower_wpos_pntc
;
2823 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2824 * for IO purposes and would prefer loads/stores be vectorized.
2827 bool lower_to_scalar
;
2830 * Should nir_lower_io() create load_interpolated_input intrinsics?
2832 * If not, it generates regular load_input intrinsics and interpolation
2833 * information must be inferred from the list of input nir_variables.
2835 bool use_interpolated_input_intrinsics
;
2837 /* Lowers when 32x32->64 bit multiplication is not supported */
2838 bool lower_mul_2x32_64
;
2840 /* Lowers when rotate instruction is not supported */
2844 * Backend supports imul24, and would like to use it (when possible)
2845 * for address/offset calculation. If true, driver should call
2846 * nir_lower_amul(). (If not set, amul will automatically be lowered
2852 * Is this the Intel vec4 backend?
2854 * Used to inhibit algebraic optimizations that are known to be harmful on
2855 * the Intel vec4 backend. This is generally applicable to any
2856 * optimization that might cause more immediate values to be used in
2857 * 3-source (e.g., ffma and flrp) instructions.
2861 unsigned max_unroll_iterations
;
2863 nir_lower_int64_options lower_int64_options
;
2864 nir_lower_doubles_options lower_doubles_options
;
2865 } nir_shader_compiler_options
;
2867 typedef struct nir_shader
{
2868 /** list of uniforms (nir_variable) */
2869 struct exec_list uniforms
;
2871 /** list of inputs (nir_variable) */
2872 struct exec_list inputs
;
2874 /** list of outputs (nir_variable) */
2875 struct exec_list outputs
;
2877 /** list of shared compute variables (nir_variable) */
2878 struct exec_list shared
;
2880 /** Set of driver-specific options for the shader.
2882 * The memory for the options is expected to be kept in a single static
2883 * copy by the driver.
2885 const struct nir_shader_compiler_options
*options
;
2887 /** Various bits of compile-time information about a given shader */
2888 struct shader_info info
;
2890 /** list of global variables in the shader (nir_variable) */
2891 struct exec_list globals
;
2893 /** list of system value variables in the shader (nir_variable) */
2894 struct exec_list system_values
;
2896 struct exec_list functions
; /** < list of nir_function */
2899 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2902 unsigned num_inputs
, num_uniforms
, num_outputs
, num_shared
;
2904 /** Size in bytes of required scratch space */
2905 unsigned scratch_size
;
2907 /** Constant data associated with this shader.
2909 * Constant data is loaded through load_constant intrinsics. See also
2910 * nir_opt_large_constants.
2912 void *constant_data
;
2913 unsigned constant_data_size
;
2916 #define nir_foreach_function(func, shader) \
2917 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2919 static inline nir_function_impl
*
2920 nir_shader_get_entrypoint(nir_shader
*shader
)
2922 nir_function
*func
= NULL
;
2924 nir_foreach_function(function
, shader
) {
2925 assert(func
== NULL
);
2926 if (function
->is_entrypoint
) {
2937 assert(func
->num_params
== 0);
2942 nir_shader
*nir_shader_create(void *mem_ctx
,
2943 gl_shader_stage stage
,
2944 const nir_shader_compiler_options
*options
,
2947 nir_register
*nir_local_reg_create(nir_function_impl
*impl
);
2949 void nir_reg_remove(nir_register
*reg
);
2951 /** Adds a variable to the appropriate list in nir_shader */
2952 void nir_shader_add_variable(nir_shader
*shader
, nir_variable
*var
);
2955 nir_function_impl_add_variable(nir_function_impl
*impl
, nir_variable
*var
)
2957 assert(var
->data
.mode
== nir_var_function_temp
);
2958 exec_list_push_tail(&impl
->locals
, &var
->node
);
2961 /** creates a variable, sets a few defaults, and adds it to the list */
2962 nir_variable
*nir_variable_create(nir_shader
*shader
,
2963 nir_variable_mode mode
,
2964 const struct glsl_type
*type
,
2966 /** creates a local variable and adds it to the list */
2967 nir_variable
*nir_local_variable_create(nir_function_impl
*impl
,
2968 const struct glsl_type
*type
,
2971 /** creates a function and adds it to the shader's list of functions */
2972 nir_function
*nir_function_create(nir_shader
*shader
, const char *name
);
2974 nir_function_impl
*nir_function_impl_create(nir_function
*func
);
2975 /** creates a function_impl that isn't tied to any particular function */
2976 nir_function_impl
*nir_function_impl_create_bare(nir_shader
*shader
);
2978 nir_block
*nir_block_create(nir_shader
*shader
);
2979 nir_if
*nir_if_create(nir_shader
*shader
);
2980 nir_loop
*nir_loop_create(nir_shader
*shader
);
2982 nir_function_impl
*nir_cf_node_get_function(nir_cf_node
*node
);
2984 /** requests that the given pieces of metadata be generated */
2985 void nir_metadata_require(nir_function_impl
*impl
, nir_metadata required
, ...);
2986 /** dirties all but the preserved metadata */
2987 void nir_metadata_preserve(nir_function_impl
*impl
, nir_metadata preserved
);
2989 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
2990 nir_alu_instr
*nir_alu_instr_create(nir_shader
*shader
, nir_op op
);
2992 nir_deref_instr
*nir_deref_instr_create(nir_shader
*shader
,
2993 nir_deref_type deref_type
);
2995 nir_jump_instr
*nir_jump_instr_create(nir_shader
*shader
, nir_jump_type type
);
2997 nir_load_const_instr
*nir_load_const_instr_create(nir_shader
*shader
,
2998 unsigned num_components
,
3001 nir_intrinsic_instr
*nir_intrinsic_instr_create(nir_shader
*shader
,
3002 nir_intrinsic_op op
);
3004 nir_call_instr
*nir_call_instr_create(nir_shader
*shader
,
3005 nir_function
*callee
);
3007 nir_tex_instr
*nir_tex_instr_create(nir_shader
*shader
, unsigned num_srcs
);
3009 nir_phi_instr
*nir_phi_instr_create(nir_shader
*shader
);
3011 nir_parallel_copy_instr
*nir_parallel_copy_instr_create(nir_shader
*shader
);
3013 nir_ssa_undef_instr
*nir_ssa_undef_instr_create(nir_shader
*shader
,
3014 unsigned num_components
,
3017 nir_const_value
nir_alu_binop_identity(nir_op binop
, unsigned bit_size
);
3020 * NIR Cursors and Instruction Insertion API
3023 * A tiny struct representing a point to insert/extract instructions or
3024 * control flow nodes. Helps reduce the combinatorial explosion of possible
3025 * points to insert/extract.
3027 * \sa nir_control_flow.h
3030 nir_cursor_before_block
,
3031 nir_cursor_after_block
,
3032 nir_cursor_before_instr
,
3033 nir_cursor_after_instr
,
3034 } nir_cursor_option
;
3037 nir_cursor_option option
;
3044 static inline nir_block
*
3045 nir_cursor_current_block(nir_cursor cursor
)
3047 if (cursor
.option
== nir_cursor_before_instr
||
3048 cursor
.option
== nir_cursor_after_instr
) {
3049 return cursor
.instr
->block
;
3051 return cursor
.block
;
3055 bool nir_cursors_equal(nir_cursor a
, nir_cursor b
);
3057 static inline nir_cursor
3058 nir_before_block(nir_block
*block
)
3061 cursor
.option
= nir_cursor_before_block
;
3062 cursor
.block
= block
;
3066 static inline nir_cursor
3067 nir_after_block(nir_block
*block
)
3070 cursor
.option
= nir_cursor_after_block
;
3071 cursor
.block
= block
;
3075 static inline nir_cursor
3076 nir_before_instr(nir_instr
*instr
)
3079 cursor
.option
= nir_cursor_before_instr
;
3080 cursor
.instr
= instr
;
3084 static inline nir_cursor
3085 nir_after_instr(nir_instr
*instr
)
3088 cursor
.option
= nir_cursor_after_instr
;
3089 cursor
.instr
= instr
;
3093 static inline nir_cursor
3094 nir_after_block_before_jump(nir_block
*block
)
3096 nir_instr
*last_instr
= nir_block_last_instr(block
);
3097 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
) {
3098 return nir_before_instr(last_instr
);
3100 return nir_after_block(block
);
3104 static inline nir_cursor
3105 nir_before_src(nir_src
*src
, bool is_if_condition
)
3107 if (is_if_condition
) {
3108 nir_block
*prev_block
=
3109 nir_cf_node_as_block(nir_cf_node_prev(&src
->parent_if
->cf_node
));
3110 assert(!nir_block_ends_in_jump(prev_block
));
3111 return nir_after_block(prev_block
);
3112 } else if (src
->parent_instr
->type
== nir_instr_type_phi
) {
3114 nir_phi_instr
*cond_phi
= nir_instr_as_phi(src
->parent_instr
);
3116 nir_foreach_phi_src(phi_src
, cond_phi
) {
3117 if (phi_src
->src
.ssa
== src
->ssa
) {
3124 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3125 * to have a more specific name.
3127 nir_phi_src
*phi_src
= LIST_ENTRY(nir_phi_src
, src
, src
);
3128 return nir_after_block_before_jump(phi_src
->pred
);
3130 return nir_before_instr(src
->parent_instr
);
3134 static inline nir_cursor
3135 nir_before_cf_node(nir_cf_node
*node
)
3137 if (node
->type
== nir_cf_node_block
)
3138 return nir_before_block(nir_cf_node_as_block(node
));
3140 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node
)));
3143 static inline nir_cursor
3144 nir_after_cf_node(nir_cf_node
*node
)
3146 if (node
->type
== nir_cf_node_block
)
3147 return nir_after_block(nir_cf_node_as_block(node
));
3149 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node
)));
3152 static inline nir_cursor
3153 nir_after_phis(nir_block
*block
)
3155 nir_foreach_instr(instr
, block
) {
3156 if (instr
->type
!= nir_instr_type_phi
)
3157 return nir_before_instr(instr
);
3159 return nir_after_block(block
);
3162 static inline nir_cursor
3163 nir_after_cf_node_and_phis(nir_cf_node
*node
)
3165 if (node
->type
== nir_cf_node_block
)
3166 return nir_after_block(nir_cf_node_as_block(node
));
3168 nir_block
*block
= nir_cf_node_as_block(nir_cf_node_next(node
));
3170 return nir_after_phis(block
);
3173 static inline nir_cursor
3174 nir_before_cf_list(struct exec_list
*cf_list
)
3176 nir_cf_node
*first_node
= exec_node_data(nir_cf_node
,
3177 exec_list_get_head(cf_list
), node
);
3178 return nir_before_cf_node(first_node
);
3181 static inline nir_cursor
3182 nir_after_cf_list(struct exec_list
*cf_list
)
3184 nir_cf_node
*last_node
= exec_node_data(nir_cf_node
,
3185 exec_list_get_tail(cf_list
), node
);
3186 return nir_after_cf_node(last_node
);
3190 * Insert a NIR instruction at the given cursor.
3192 * Note: This does not update the cursor.
3194 void nir_instr_insert(nir_cursor cursor
, nir_instr
*instr
);
3197 nir_instr_insert_before(nir_instr
*instr
, nir_instr
*before
)
3199 nir_instr_insert(nir_before_instr(instr
), before
);
3203 nir_instr_insert_after(nir_instr
*instr
, nir_instr
*after
)
3205 nir_instr_insert(nir_after_instr(instr
), after
);
3209 nir_instr_insert_before_block(nir_block
*block
, nir_instr
*before
)
3211 nir_instr_insert(nir_before_block(block
), before
);
3215 nir_instr_insert_after_block(nir_block
*block
, nir_instr
*after
)
3217 nir_instr_insert(nir_after_block(block
), after
);
3221 nir_instr_insert_before_cf(nir_cf_node
*node
, nir_instr
*before
)
3223 nir_instr_insert(nir_before_cf_node(node
), before
);
3227 nir_instr_insert_after_cf(nir_cf_node
*node
, nir_instr
*after
)
3229 nir_instr_insert(nir_after_cf_node(node
), after
);
3233 nir_instr_insert_before_cf_list(struct exec_list
*list
, nir_instr
*before
)
3235 nir_instr_insert(nir_before_cf_list(list
), before
);
3239 nir_instr_insert_after_cf_list(struct exec_list
*list
, nir_instr
*after
)
3241 nir_instr_insert(nir_after_cf_list(list
), after
);
3244 void nir_instr_remove_v(nir_instr
*instr
);
3246 static inline nir_cursor
3247 nir_instr_remove(nir_instr
*instr
)
3250 nir_instr
*prev
= nir_instr_prev(instr
);
3252 cursor
= nir_after_instr(prev
);
3254 cursor
= nir_before_block(instr
->block
);
3256 nir_instr_remove_v(instr
);
3262 nir_ssa_def
*nir_instr_ssa_def(nir_instr
*instr
);
3264 typedef bool (*nir_foreach_ssa_def_cb
)(nir_ssa_def
*def
, void *state
);
3265 typedef bool (*nir_foreach_dest_cb
)(nir_dest
*dest
, void *state
);
3266 typedef bool (*nir_foreach_src_cb
)(nir_src
*src
, void *state
);
3267 bool nir_foreach_ssa_def(nir_instr
*instr
, nir_foreach_ssa_def_cb cb
,
3269 bool nir_foreach_dest(nir_instr
*instr
, nir_foreach_dest_cb cb
, void *state
);
3270 bool nir_foreach_src(nir_instr
*instr
, nir_foreach_src_cb cb
, void *state
);
3272 nir_const_value
*nir_src_as_const_value(nir_src src
);
3274 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3275 static inline c_type * \
3276 nir_src_as_ ## name (nir_src src) \
3278 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3279 ? cast_macro(src.ssa->parent_instr) : NULL; \
3282 NIR_SRC_AS_(alu_instr
, nir_alu_instr
, nir_instr_type_alu
, nir_instr_as_alu
)
3283 NIR_SRC_AS_(intrinsic
, nir_intrinsic_instr
,
3284 nir_instr_type_intrinsic
, nir_instr_as_intrinsic
)
3285 NIR_SRC_AS_(deref
, nir_deref_instr
, nir_instr_type_deref
, nir_instr_as_deref
)
3287 bool nir_src_is_dynamically_uniform(nir_src src
);
3288 bool nir_srcs_equal(nir_src src1
, nir_src src2
);
3289 bool nir_instrs_equal(const nir_instr
*instr1
, const nir_instr
*instr2
);
3290 void nir_instr_rewrite_src(nir_instr
*instr
, nir_src
*src
, nir_src new_src
);
3291 void nir_instr_move_src(nir_instr
*dest_instr
, nir_src
*dest
, nir_src
*src
);
3292 void nir_if_rewrite_condition(nir_if
*if_stmt
, nir_src new_src
);
3293 void nir_instr_rewrite_dest(nir_instr
*instr
, nir_dest
*dest
,
3296 void nir_ssa_dest_init(nir_instr
*instr
, nir_dest
*dest
,
3297 unsigned num_components
, unsigned bit_size
,
3299 void nir_ssa_def_init(nir_instr
*instr
, nir_ssa_def
*def
,
3300 unsigned num_components
, unsigned bit_size
,
3303 nir_ssa_dest_init_for_type(nir_instr
*instr
, nir_dest
*dest
,
3304 const struct glsl_type
*type
,
3307 assert(glsl_type_is_vector_or_scalar(type
));
3308 nir_ssa_dest_init(instr
, dest
, glsl_get_components(type
),
3309 glsl_get_bit_size(type
), name
);
3311 void nir_ssa_def_rewrite_uses(nir_ssa_def
*def
, nir_src new_src
);
3312 void nir_ssa_def_rewrite_uses_after(nir_ssa_def
*def
, nir_src new_src
,
3313 nir_instr
*after_me
);
3315 nir_component_mask_t
nir_ssa_def_components_read(const nir_ssa_def
*def
);
3318 * finds the next basic block in source-code order, returns NULL if there is
3322 nir_block
*nir_block_cf_tree_next(nir_block
*block
);
3324 /* Performs the opposite of nir_block_cf_tree_next() */
3326 nir_block
*nir_block_cf_tree_prev(nir_block
*block
);
3328 /* Gets the first block in a CF node in source-code order */
3330 nir_block
*nir_cf_node_cf_tree_first(nir_cf_node
*node
);
3332 /* Gets the last block in a CF node in source-code order */
3334 nir_block
*nir_cf_node_cf_tree_last(nir_cf_node
*node
);
3336 /* Gets the next block after a CF node in source-code order */
3338 nir_block
*nir_cf_node_cf_tree_next(nir_cf_node
*node
);
3340 /* Macros for loops that visit blocks in source-code order */
3342 #define nir_foreach_block(block, impl) \
3343 for (nir_block *block = nir_start_block(impl); block != NULL; \
3344 block = nir_block_cf_tree_next(block))
3346 #define nir_foreach_block_safe(block, impl) \
3347 for (nir_block *block = nir_start_block(impl), \
3348 *next = nir_block_cf_tree_next(block); \
3350 block = next, next = nir_block_cf_tree_next(block))
3352 #define nir_foreach_block_reverse(block, impl) \
3353 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3354 block = nir_block_cf_tree_prev(block))
3356 #define nir_foreach_block_reverse_safe(block, impl) \
3357 for (nir_block *block = nir_impl_last_block(impl), \
3358 *prev = nir_block_cf_tree_prev(block); \
3360 block = prev, prev = nir_block_cf_tree_prev(block))
3362 #define nir_foreach_block_in_cf_node(block, node) \
3363 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3364 block != nir_cf_node_cf_tree_next(node); \
3365 block = nir_block_cf_tree_next(block))
3367 /* If the following CF node is an if, this function returns that if.
3368 * Otherwise, it returns NULL.
3370 nir_if
*nir_block_get_following_if(nir_block
*block
);
3372 nir_loop
*nir_block_get_following_loop(nir_block
*block
);
3374 void nir_index_local_regs(nir_function_impl
*impl
);
3375 void nir_index_ssa_defs(nir_function_impl
*impl
);
3376 unsigned nir_index_instrs(nir_function_impl
*impl
);
3378 void nir_index_blocks(nir_function_impl
*impl
);
3380 void nir_index_vars(nir_shader
*shader
, nir_function_impl
*impl
, nir_variable_mode modes
);
3382 void nir_print_shader(nir_shader
*shader
, FILE *fp
);
3383 void nir_print_shader_annotated(nir_shader
*shader
, FILE *fp
, struct hash_table
*errors
);
3384 void nir_print_instr(const nir_instr
*instr
, FILE *fp
);
3385 void nir_print_deref(const nir_deref_instr
*deref
, FILE *fp
);
3387 /** Shallow clone of a single ALU instruction. */
3388 nir_alu_instr
*nir_alu_instr_clone(nir_shader
*s
, const nir_alu_instr
*orig
);
3390 nir_shader
*nir_shader_clone(void *mem_ctx
, const nir_shader
*s
);
3391 nir_function_impl
*nir_function_impl_clone(nir_shader
*shader
,
3392 const nir_function_impl
*fi
);
3393 nir_constant
*nir_constant_clone(const nir_constant
*c
, nir_variable
*var
);
3394 nir_variable
*nir_variable_clone(const nir_variable
*c
, nir_shader
*shader
);
3396 void nir_shader_replace(nir_shader
*dest
, nir_shader
*src
);
3398 void nir_shader_serialize_deserialize(nir_shader
*s
);
3401 void nir_validate_shader(nir_shader
*shader
, const char *when
);
3402 void nir_metadata_set_validation_flag(nir_shader
*shader
);
3403 void nir_metadata_check_validation_flag(nir_shader
*shader
);
3406 should_skip_nir(const char *name
)
3408 static const char *list
= NULL
;
3410 /* Comma separated list of names to skip. */
3411 list
= getenv("NIR_SKIP");
3419 return comma_separated_list_contains(list
, name
);
3423 should_clone_nir(void)
3425 static int should_clone
= -1;
3426 if (should_clone
< 0)
3427 should_clone
= env_var_as_boolean("NIR_TEST_CLONE", false);
3429 return should_clone
;
3433 should_serialize_deserialize_nir(void)
3435 static int test_serialize
= -1;
3436 if (test_serialize
< 0)
3437 test_serialize
= env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3439 return test_serialize
;
3443 should_print_nir(void)
3445 static int should_print
= -1;
3446 if (should_print
< 0)
3447 should_print
= env_var_as_boolean("NIR_PRINT", false);
3449 return should_print
;
3452 static inline void nir_validate_shader(nir_shader
*shader
, const char *when
) { (void) shader
; (void)when
; }
3453 static inline void nir_metadata_set_validation_flag(nir_shader
*shader
) { (void) shader
; }
3454 static inline void nir_metadata_check_validation_flag(nir_shader
*shader
) { (void) shader
; }
3455 static inline bool should_skip_nir(UNUSED
const char *pass_name
) { return false; }
3456 static inline bool should_clone_nir(void) { return false; }
3457 static inline bool should_serialize_deserialize_nir(void) { return false; }
3458 static inline bool should_print_nir(void) { return false; }
3461 #define _PASS(pass, nir, do_pass) do { \
3462 if (should_skip_nir(#pass)) { \
3463 printf("skipping %s\n", #pass); \
3467 nir_validate_shader(nir, "after " #pass); \
3468 if (should_clone_nir()) { \
3469 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3470 nir_shader_replace(nir, clone); \
3472 if (should_serialize_deserialize_nir()) { \
3473 nir_shader_serialize_deserialize(nir); \
3477 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3478 nir_metadata_set_validation_flag(nir); \
3479 if (should_print_nir()) \
3480 printf("%s\n", #pass); \
3481 if (pass(nir, ##__VA_ARGS__)) { \
3483 if (should_print_nir()) \
3484 nir_print_shader(nir, stdout); \
3485 nir_metadata_check_validation_flag(nir); \
3489 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3490 if (should_print_nir()) \
3491 printf("%s\n", #pass); \
3492 pass(nir, ##__VA_ARGS__); \
3493 if (should_print_nir()) \
3494 nir_print_shader(nir, stdout); \
3497 #define NIR_SKIP(name) should_skip_nir(#name)
3499 /** An instruction filtering callback
3501 * Returns true if the instruction should be processed and false otherwise.
3503 typedef bool (*nir_instr_filter_cb
)(const nir_instr
*, const void *);
3505 /** A simple instruction lowering callback
3507 * Many instruction lowering passes can be written as a simple function which
3508 * takes an instruction as its input and returns a sequence of instructions
3509 * that implement the consumed instruction. This function type represents
3510 * such a lowering function. When called, a function with this prototype
3511 * should either return NULL indicating that no lowering needs to be done or
3512 * emit a sequence of instructions using the provided builder (whose cursor
3513 * will already be placed after the instruction to be lowered) and return the
3514 * resulting nir_ssa_def.
3516 typedef nir_ssa_def
*(*nir_lower_instr_cb
)(struct nir_builder
*,
3517 nir_instr
*, void *);
3520 * Special return value for nir_lower_instr_cb when some progress occurred
3521 * (like changing an input to the instr) that didn't result in a replacement
3522 * SSA def being generated.
3524 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3526 /** Iterate over all the instructions in a nir_function_impl and lower them
3527 * using the provided callbacks
3529 * This function implements the guts of a standard lowering pass for you. It
3530 * iterates over all of the instructions in a nir_function_impl and calls the
3531 * filter callback on each one. If the filter callback returns true, it then
3532 * calls the lowering call back on the instruction. (Splitting it this way
3533 * allows us to avoid some save/restore work for instructions we know won't be
3534 * lowered.) If the instruction is dead after the lowering is complete, it
3535 * will be removed. If new instructions are added, the lowering callback will
3536 * also be called on them in case multiple lowerings are required.
3538 * The metadata for the nir_function_impl will also be updated. If any blocks
3539 * are added (they cannot be removed), dominance and block indices will be
3542 bool nir_function_impl_lower_instructions(nir_function_impl
*impl
,
3543 nir_instr_filter_cb filter
,
3544 nir_lower_instr_cb lower
,
3546 bool nir_shader_lower_instructions(nir_shader
*shader
,
3547 nir_instr_filter_cb filter
,
3548 nir_lower_instr_cb lower
,
3551 void nir_calc_dominance_impl(nir_function_impl
*impl
);
3552 void nir_calc_dominance(nir_shader
*shader
);
3554 nir_block
*nir_dominance_lca(nir_block
*b1
, nir_block
*b2
);
3555 bool nir_block_dominates(nir_block
*parent
, nir_block
*child
);
3556 bool nir_block_is_unreachable(nir_block
*block
);
3558 void nir_dump_dom_tree_impl(nir_function_impl
*impl
, FILE *fp
);
3559 void nir_dump_dom_tree(nir_shader
*shader
, FILE *fp
);
3561 void nir_dump_dom_frontier_impl(nir_function_impl
*impl
, FILE *fp
);
3562 void nir_dump_dom_frontier(nir_shader
*shader
, FILE *fp
);
3564 void nir_dump_cfg_impl(nir_function_impl
*impl
, FILE *fp
);
3565 void nir_dump_cfg(nir_shader
*shader
, FILE *fp
);
3567 int nir_gs_count_vertices(const nir_shader
*shader
);
3569 bool nir_shrink_vec_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
3570 bool nir_split_array_vars(nir_shader
*shader
, nir_variable_mode modes
);
3571 bool nir_split_var_copies(nir_shader
*shader
);
3572 bool nir_split_per_member_structs(nir_shader
*shader
);
3573 bool nir_split_struct_vars(nir_shader
*shader
, nir_variable_mode modes
);
3575 bool nir_lower_returns_impl(nir_function_impl
*impl
);
3576 bool nir_lower_returns(nir_shader
*shader
);
3578 void nir_inline_function_impl(struct nir_builder
*b
,
3579 const nir_function_impl
*impl
,
3580 nir_ssa_def
**params
);
3581 bool nir_inline_functions(nir_shader
*shader
);
3583 bool nir_propagate_invariant(nir_shader
*shader
);
3585 void nir_lower_var_copy_instr(nir_intrinsic_instr
*copy
, nir_shader
*shader
);
3586 void nir_lower_deref_copy_instr(struct nir_builder
*b
,
3587 nir_intrinsic_instr
*copy
);
3588 bool nir_lower_var_copies(nir_shader
*shader
);
3590 void nir_fixup_deref_modes(nir_shader
*shader
);
3592 bool nir_lower_global_vars_to_local(nir_shader
*shader
);
3595 nir_lower_direct_array_deref_of_vec_load
= (1 << 0),
3596 nir_lower_indirect_array_deref_of_vec_load
= (1 << 1),
3597 nir_lower_direct_array_deref_of_vec_store
= (1 << 2),
3598 nir_lower_indirect_array_deref_of_vec_store
= (1 << 3),
3599 } nir_lower_array_deref_of_vec_options
;
3601 bool nir_lower_array_deref_of_vec(nir_shader
*shader
, nir_variable_mode modes
,
3602 nir_lower_array_deref_of_vec_options options
);
3604 bool nir_lower_indirect_derefs(nir_shader
*shader
, nir_variable_mode modes
);
3606 bool nir_lower_locals_to_regs(nir_shader
*shader
);
3608 void nir_lower_io_to_temporaries(nir_shader
*shader
,
3609 nir_function_impl
*entrypoint
,
3610 bool outputs
, bool inputs
);
3612 bool nir_lower_vars_to_scratch(nir_shader
*shader
,
3613 nir_variable_mode modes
,
3615 glsl_type_size_align_func size_align
);
3617 void nir_shader_gather_info(nir_shader
*shader
, nir_function_impl
*entrypoint
);
3619 void nir_gather_ssa_types(nir_function_impl
*impl
,
3620 BITSET_WORD
*float_types
,
3621 BITSET_WORD
*int_types
);
3623 void nir_assign_var_locations(struct exec_list
*var_list
, unsigned *size
,
3624 int (*type_size
)(const struct glsl_type
*, bool));
3626 /* Some helpers to do very simple linking */
3627 bool nir_remove_unused_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3628 bool nir_remove_unused_io_vars(nir_shader
*shader
, struct exec_list
*var_list
,
3629 uint64_t *used_by_other_stage
,
3630 uint64_t *used_by_other_stage_patches
);
3631 void nir_compact_varyings(nir_shader
*producer
, nir_shader
*consumer
,
3632 bool default_to_smooth_interp
);
3633 void nir_link_xfb_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3634 bool nir_link_opt_varyings(nir_shader
*producer
, nir_shader
*consumer
);
3636 bool nir_lower_amul(nir_shader
*shader
,
3637 int (*type_size
)(const struct glsl_type
*, bool));
3639 void nir_assign_io_var_locations(struct exec_list
*var_list
,
3641 gl_shader_stage stage
);
3644 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3645 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3648 nir_lower_io_lower_64bit_to_32
= (1 << 0),
3650 /* If set, this forces all non-flat fragment shader inputs to be
3651 * interpolated as if with the "sample" qualifier. This requires
3652 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3654 nir_lower_io_force_sample_interpolation
= (1 << 1),
3655 } nir_lower_io_options
;
3656 bool nir_lower_io(nir_shader
*shader
,
3657 nir_variable_mode modes
,
3658 int (*type_size
)(const struct glsl_type
*, bool),
3659 nir_lower_io_options
);
3661 bool nir_io_add_const_offset_to_base(nir_shader
*nir
, nir_variable_mode mode
);
3664 nir_lower_vars_to_explicit_types(nir_shader
*shader
,
3665 nir_variable_mode modes
,
3666 glsl_type_size_align_func type_info
);
3670 * An address format which is a simple 32-bit global GPU address.
3672 nir_address_format_32bit_global
,
3675 * An address format which is a simple 64-bit global GPU address.
3677 nir_address_format_64bit_global
,
3680 * An address format which is a bounds-checked 64-bit global GPU address.
3682 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3683 * address stored with the low bits in .x and high bits in .y, .z is a
3684 * size, and .w is an offset. When the final I/O operation is lowered, .w
3685 * is checked against .z and the operation is predicated on the result.
3687 nir_address_format_64bit_bounded_global
,
3690 * An address format which is comprised of a vec2 where the first
3691 * component is a buffer index and the second is an offset.
3693 nir_address_format_32bit_index_offset
,
3696 * An address format which is a simple 32-bit offset.
3698 nir_address_format_32bit_offset
,
3701 * An address format representing a purely logical addressing model. In
3702 * this model, all deref chains must be complete from the dereference
3703 * operation to the variable. Cast derefs are not allowed. These
3704 * addresses will be 32-bit scalars but the format is immaterial because
3705 * you can always chase the chain.
3707 nir_address_format_logical
,
3708 } nir_address_format
;
3710 static inline unsigned
3711 nir_address_format_bit_size(nir_address_format addr_format
)
3713 switch (addr_format
) {
3714 case nir_address_format_32bit_global
: return 32;
3715 case nir_address_format_64bit_global
: return 64;
3716 case nir_address_format_64bit_bounded_global
: return 32;
3717 case nir_address_format_32bit_index_offset
: return 32;
3718 case nir_address_format_32bit_offset
: return 32;
3719 case nir_address_format_logical
: return 32;
3721 unreachable("Invalid address format");
3724 static inline unsigned
3725 nir_address_format_num_components(nir_address_format addr_format
)
3727 switch (addr_format
) {
3728 case nir_address_format_32bit_global
: return 1;
3729 case nir_address_format_64bit_global
: return 1;
3730 case nir_address_format_64bit_bounded_global
: return 4;
3731 case nir_address_format_32bit_index_offset
: return 2;
3732 case nir_address_format_32bit_offset
: return 1;
3733 case nir_address_format_logical
: return 1;
3735 unreachable("Invalid address format");
3738 static inline const struct glsl_type
*
3739 nir_address_format_to_glsl_type(nir_address_format addr_format
)
3741 unsigned bit_size
= nir_address_format_bit_size(addr_format
);
3742 assert(bit_size
== 32 || bit_size
== 64);
3743 return glsl_vector_type(bit_size
== 32 ? GLSL_TYPE_UINT
: GLSL_TYPE_UINT64
,
3744 nir_address_format_num_components(addr_format
));
3747 const nir_const_value
*nir_address_format_null_value(nir_address_format addr_format
);
3749 nir_ssa_def
*nir_build_addr_ieq(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
3750 nir_address_format addr_format
);
3752 nir_ssa_def
*nir_build_addr_isub(struct nir_builder
*b
, nir_ssa_def
*addr0
, nir_ssa_def
*addr1
,
3753 nir_address_format addr_format
);
3755 nir_ssa_def
* nir_explicit_io_address_from_deref(struct nir_builder
*b
,
3756 nir_deref_instr
*deref
,
3757 nir_ssa_def
*base_addr
,
3758 nir_address_format addr_format
);
3759 void nir_lower_explicit_io_instr(struct nir_builder
*b
,
3760 nir_intrinsic_instr
*io_instr
,
3762 nir_address_format addr_format
);
3764 bool nir_lower_explicit_io(nir_shader
*shader
,
3765 nir_variable_mode modes
,
3766 nir_address_format
);
3768 nir_src
*nir_get_io_offset_src(nir_intrinsic_instr
*instr
);
3769 nir_src
*nir_get_io_vertex_index_src(nir_intrinsic_instr
*instr
);
3771 bool nir_is_per_vertex_io(const nir_variable
*var
, gl_shader_stage stage
);
3773 bool nir_lower_regs_to_ssa_impl(nir_function_impl
*impl
);
3774 bool nir_lower_regs_to_ssa(nir_shader
*shader
);
3775 bool nir_lower_vars_to_ssa(nir_shader
*shader
);
3777 bool nir_remove_dead_derefs(nir_shader
*shader
);
3778 bool nir_remove_dead_derefs_impl(nir_function_impl
*impl
);
3779 bool nir_remove_dead_variables(nir_shader
*shader
, nir_variable_mode modes
);
3780 bool nir_lower_constant_initializers(nir_shader
*shader
,
3781 nir_variable_mode modes
);
3783 bool nir_move_vec_src_uses_to_dest(nir_shader
*shader
);
3784 bool nir_lower_vec_to_movs(nir_shader
*shader
);
3785 void nir_lower_alpha_test(nir_shader
*shader
, enum compare_func func
,
3787 const gl_state_index16
*alpha_ref_state_tokens
);
3788 bool nir_lower_alu(nir_shader
*shader
);
3790 bool nir_lower_flrp(nir_shader
*shader
, unsigned lowering_mask
,
3791 bool always_precise
, bool have_ffma
);
3793 bool nir_lower_alu_to_scalar(nir_shader
*shader
, nir_instr_filter_cb cb
, const void *data
);
3794 bool nir_lower_bool_to_float(nir_shader
*shader
);
3795 bool nir_lower_bool_to_int32(nir_shader
*shader
);
3796 bool nir_lower_int_to_float(nir_shader
*shader
);
3797 bool nir_lower_load_const_to_scalar(nir_shader
*shader
);
3798 bool nir_lower_read_invocation_to_scalar(nir_shader
*shader
);
3799 bool nir_lower_phis_to_scalar(nir_shader
*shader
);
3800 void nir_lower_io_arrays_to_elements(nir_shader
*producer
, nir_shader
*consumer
);
3801 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader
*shader
,
3803 void nir_lower_io_to_scalar(nir_shader
*shader
, nir_variable_mode mask
);
3804 void nir_lower_io_to_scalar_early(nir_shader
*shader
, nir_variable_mode mask
);
3805 bool nir_lower_io_to_vector(nir_shader
*shader
, nir_variable_mode mask
);
3807 void nir_lower_fragcoord_wtrans(nir_shader
*shader
);
3808 void nir_lower_viewport_transform(nir_shader
*shader
);
3809 bool nir_lower_uniforms_to_ubo(nir_shader
*shader
, int multiplier
);
3811 typedef struct nir_lower_subgroups_options
{
3812 uint8_t subgroup_size
;
3813 uint8_t ballot_bit_size
;
3814 bool lower_to_scalar
:1;
3815 bool lower_vote_trivial
:1;
3816 bool lower_vote_eq_to_ballot
:1;
3817 bool lower_subgroup_masks
:1;
3818 bool lower_shuffle
:1;
3819 bool lower_shuffle_to_32bit
:1;
3821 } nir_lower_subgroups_options
;
3823 bool nir_lower_subgroups(nir_shader
*shader
,
3824 const nir_lower_subgroups_options
*options
);
3826 bool nir_lower_system_values(nir_shader
*shader
);
3828 enum PACKED nir_lower_tex_packing
{
3829 nir_lower_tex_packing_none
= 0,
3830 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3831 * or unsigned ints based on the sampler type
3833 nir_lower_tex_packing_16
,
3834 /* The sampler returns 1 32-bit word of 4x8 unorm */
3835 nir_lower_tex_packing_8
,
3838 typedef struct nir_lower_tex_options
{
3840 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3841 * sampler types a texture projector is lowered.
3846 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3848 bool lower_txf_offset
;
3851 * If true, lower away nir_tex_src_offset for all rect textures.
3853 bool lower_rect_offset
;
3856 * If true, lower rect textures to 2D, using txs to fetch the
3857 * texture dimensions and dividing the texture coords by the
3858 * texture dims to normalize.
3863 * If true, convert yuv to rgb.
3865 unsigned lower_y_uv_external
;
3866 unsigned lower_y_u_v_external
;
3867 unsigned lower_yx_xuxv_external
;
3868 unsigned lower_xy_uxvx_external
;
3869 unsigned lower_ayuv_external
;
3870 unsigned lower_xyuv_external
;
3873 * To emulate certain texture wrap modes, this can be used
3874 * to saturate the specified tex coord to [0.0, 1.0]. The
3875 * bits are according to sampler #, ie. if, for example:
3877 * (conf->saturate_s & (1 << n))
3879 * is true, then the s coord for sampler n is saturated.
3881 * Note that clamping must happen *after* projector lowering
3882 * so any projected texture sample instruction with a clamped
3883 * coordinate gets automatically lowered, regardless of the
3884 * 'lower_txp' setting.
3886 unsigned saturate_s
;
3887 unsigned saturate_t
;
3888 unsigned saturate_r
;
3890 /* Bitmask of textures that need swizzling.
3892 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3893 * swizzles[texture_index] is applied to the result of the texturing
3896 unsigned swizzle_result
;
3898 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3899 * while 4 and 5 represent 0 and 1 respectively.
3901 uint8_t swizzles
[32][4];
3903 /* Can be used to scale sampled values in range required by the format. */
3904 float scale_factors
[32];
3907 * Bitmap of textures that need srgb to linear conversion. If
3908 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3909 * of the texture are lowered to linear.
3911 unsigned lower_srgb
;
3914 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3915 * LODs to nir_texop_txl.
3917 bool lower_tex_without_implicit_lod
;
3920 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3922 bool lower_txd_cube_map
;
3925 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3930 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3931 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3932 * with lower_txd_cube_map.
3934 bool lower_txd_shadow
;
3937 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
3938 * Implies lower_txd_cube_map and lower_txd_shadow.
3943 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
3944 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
3946 bool lower_txb_shadow_clamp
;
3949 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
3950 * with nir_texop_txl. This includes cube maps.
3952 bool lower_txd_shadow_clamp
;
3955 * If true, lower nir_texop_txd on when it uses both offset and min_lod
3956 * with nir_texop_txl. This includes cube maps.
3958 bool lower_txd_offset_clamp
;
3961 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3962 * sampler is bindless.
3964 bool lower_txd_clamp_bindless_sampler
;
3967 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3968 * sampler index is not statically determinable to be less than 16.
3970 bool lower_txd_clamp_if_sampler_index_not_lt_16
;
3973 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
3974 * 0-lod followed by a nir_ishr.
3979 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
3980 * mixed-up tg4 locations.
3982 bool lower_tg4_broadcom_swizzle
;
3985 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
3987 bool lower_tg4_offsets
;
3989 enum nir_lower_tex_packing lower_tex_packing
[32];
3990 } nir_lower_tex_options
;
3992 bool nir_lower_tex(nir_shader
*shader
,
3993 const nir_lower_tex_options
*options
);
3995 enum nir_lower_non_uniform_access_type
{
3996 nir_lower_non_uniform_ubo_access
= (1 << 0),
3997 nir_lower_non_uniform_ssbo_access
= (1 << 1),
3998 nir_lower_non_uniform_texture_access
= (1 << 2),
3999 nir_lower_non_uniform_image_access
= (1 << 3),
4002 bool nir_lower_non_uniform_access(nir_shader
*shader
,
4003 enum nir_lower_non_uniform_access_type
);
4005 enum nir_lower_idiv_path
{
4006 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4007 * the two but it is not exact in some cases (for example, 1091317713u /
4008 * 1034u gives 5209173 instead of 1055432) */
4009 nir_lower_idiv_fast
,
4010 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4011 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4012 * the nv50 path and many of them are integer multiplications, so it is
4013 * probably slower. It should always return the correct result, though. */
4014 nir_lower_idiv_precise
,
4017 bool nir_lower_idiv(nir_shader
*shader
, enum nir_lower_idiv_path path
);
4019 bool nir_lower_input_attachments(nir_shader
*shader
, bool use_fragcoord_sysval
);
4021 bool nir_lower_clip_vs(nir_shader
*shader
, unsigned ucp_enables
,
4023 bool use_clipdist_array
,
4024 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4025 bool nir_lower_clip_gs(nir_shader
*shader
, unsigned ucp_enables
,
4026 bool use_clipdist_array
,
4027 const gl_state_index16 clipplane_state_tokens
[][STATE_LENGTH
]);
4028 bool nir_lower_clip_fs(nir_shader
*shader
, unsigned ucp_enables
,
4029 bool use_clipdist_array
);
4030 bool nir_lower_clip_cull_distance_arrays(nir_shader
*nir
);
4032 void nir_lower_point_size_mov(nir_shader
*shader
,
4033 const gl_state_index16
*pointsize_state_tokens
);
4035 bool nir_lower_frexp(nir_shader
*nir
);
4037 void nir_lower_two_sided_color(nir_shader
*shader
);
4039 bool nir_lower_clamp_color_outputs(nir_shader
*shader
);
4041 bool nir_lower_flatshade(nir_shader
*shader
);
4043 void nir_lower_passthrough_edgeflags(nir_shader
*shader
);
4044 bool nir_lower_patch_vertices(nir_shader
*nir
, unsigned static_count
,
4045 const gl_state_index16
*uniform_state_tokens
);
4047 typedef struct nir_lower_wpos_ytransform_options
{
4048 gl_state_index16 state_tokens
[STATE_LENGTH
];
4049 bool fs_coord_origin_upper_left
:1;
4050 bool fs_coord_origin_lower_left
:1;
4051 bool fs_coord_pixel_center_integer
:1;
4052 bool fs_coord_pixel_center_half_integer
:1;
4053 } nir_lower_wpos_ytransform_options
;
4055 bool nir_lower_wpos_ytransform(nir_shader
*shader
,
4056 const nir_lower_wpos_ytransform_options
*options
);
4057 bool nir_lower_wpos_center(nir_shader
*shader
, const bool for_sample_shading
);
4059 bool nir_lower_fb_read(nir_shader
*shader
);
4061 typedef struct nir_lower_drawpixels_options
{
4062 gl_state_index16 texcoord_state_tokens
[STATE_LENGTH
];
4063 gl_state_index16 scale_state_tokens
[STATE_LENGTH
];
4064 gl_state_index16 bias_state_tokens
[STATE_LENGTH
];
4065 unsigned drawpix_sampler
;
4066 unsigned pixelmap_sampler
;
4068 bool scale_and_bias
:1;
4069 } nir_lower_drawpixels_options
;
4071 void nir_lower_drawpixels(nir_shader
*shader
,
4072 const nir_lower_drawpixels_options
*options
);
4074 typedef struct nir_lower_bitmap_options
{
4077 } nir_lower_bitmap_options
;
4079 void nir_lower_bitmap(nir_shader
*shader
, const nir_lower_bitmap_options
*options
);
4081 bool nir_lower_atomics_to_ssbo(nir_shader
*shader
, unsigned ssbo_offset
);
4084 nir_lower_int_source_mods
= 1 << 0,
4085 nir_lower_float_source_mods
= 1 << 1,
4086 nir_lower_triop_abs
= 1 << 2,
4087 nir_lower_all_source_mods
= (1 << 3) - 1
4088 } nir_lower_to_source_mods_flags
;
4091 bool nir_lower_to_source_mods(nir_shader
*shader
, nir_lower_to_source_mods_flags options
);
4093 bool nir_lower_gs_intrinsics(nir_shader
*shader
);
4095 typedef unsigned (*nir_lower_bit_size_callback
)(const nir_alu_instr
*, void *);
4097 bool nir_lower_bit_size(nir_shader
*shader
,
4098 nir_lower_bit_size_callback callback
,
4099 void *callback_data
);
4101 nir_lower_int64_options
nir_lower_int64_op_to_options_mask(nir_op opcode
);
4102 bool nir_lower_int64(nir_shader
*shader
, nir_lower_int64_options options
);
4104 nir_lower_doubles_options
nir_lower_doubles_op_to_options_mask(nir_op opcode
);
4105 bool nir_lower_doubles(nir_shader
*shader
, const nir_shader
*softfp64
,
4106 nir_lower_doubles_options options
);
4107 bool nir_lower_pack(nir_shader
*shader
);
4109 bool nir_lower_point_size(nir_shader
*shader
, float min
, float max
);
4112 nir_lower_interpolation_at_sample
= (1 << 1),
4113 nir_lower_interpolation_at_offset
= (1 << 2),
4114 nir_lower_interpolation_centroid
= (1 << 3),
4115 nir_lower_interpolation_pixel
= (1 << 4),
4116 nir_lower_interpolation_sample
= (1 << 5),
4117 } nir_lower_interpolation_options
;
4119 bool nir_lower_interpolation(nir_shader
*shader
,
4120 nir_lower_interpolation_options options
);
4122 bool nir_normalize_cubemap_coords(nir_shader
*shader
);
4124 void nir_live_ssa_defs_impl(nir_function_impl
*impl
);
4126 void nir_loop_analyze_impl(nir_function_impl
*impl
,
4127 nir_variable_mode indirect_mask
);
4129 bool nir_ssa_defs_interfere(nir_ssa_def
*a
, nir_ssa_def
*b
);
4131 bool nir_repair_ssa_impl(nir_function_impl
*impl
);
4132 bool nir_repair_ssa(nir_shader
*shader
);
4134 void nir_convert_loop_to_lcssa(nir_loop
*loop
);
4135 bool nir_convert_to_lcssa(nir_shader
*shader
, bool skip_invariants
, bool skip_bool_invariants
);
4136 bool* nir_divergence_analysis(nir_shader
*shader
, nir_divergence_options options
);
4138 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4139 * registers. If false, convert all values (even those not involved in a phi
4140 * node) to registers.
4142 bool nir_convert_from_ssa(nir_shader
*shader
, bool phi_webs_only
);
4144 bool nir_lower_phis_to_regs_block(nir_block
*block
);
4145 bool nir_lower_ssa_defs_to_regs_block(nir_block
*block
);
4146 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl
*impl
);
4148 bool nir_lower_samplers(nir_shader
*shader
);
4150 /* This is here for unit tests. */
4151 bool nir_opt_comparison_pre_impl(nir_function_impl
*impl
);
4153 bool nir_opt_comparison_pre(nir_shader
*shader
);
4155 bool nir_opt_access(nir_shader
*shader
);
4156 bool nir_opt_algebraic(nir_shader
*shader
);
4157 bool nir_opt_algebraic_before_ffma(nir_shader
*shader
);
4158 bool nir_opt_algebraic_late(nir_shader
*shader
);
4159 bool nir_opt_constant_folding(nir_shader
*shader
);
4161 bool nir_opt_combine_stores(nir_shader
*shader
, nir_variable_mode modes
);
4163 bool nir_copy_prop(nir_shader
*shader
);
4165 bool nir_opt_copy_prop_vars(nir_shader
*shader
);
4167 bool nir_opt_cse(nir_shader
*shader
);
4169 bool nir_opt_dce(nir_shader
*shader
);
4171 bool nir_opt_dead_cf(nir_shader
*shader
);
4173 bool nir_opt_dead_write_vars(nir_shader
*shader
);
4175 bool nir_opt_deref_impl(nir_function_impl
*impl
);
4176 bool nir_opt_deref(nir_shader
*shader
);
4178 bool nir_opt_find_array_copies(nir_shader
*shader
);
4180 bool nir_opt_gcm(nir_shader
*shader
, bool value_number
);
4182 bool nir_opt_idiv_const(nir_shader
*shader
, unsigned min_bit_size
);
4184 bool nir_opt_if(nir_shader
*shader
, bool aggressive_last_continue
);
4186 bool nir_opt_intrinsics(nir_shader
*shader
);
4188 bool nir_opt_large_constants(nir_shader
*shader
,
4189 glsl_type_size_align_func size_align
,
4190 unsigned threshold
);
4192 bool nir_opt_loop_unroll(nir_shader
*shader
, nir_variable_mode indirect_mask
);
4195 nir_move_const_undef
= (1 << 0),
4196 nir_move_load_ubo
= (1 << 1),
4197 nir_move_load_input
= (1 << 2),
4198 nir_move_comparisons
= (1 << 3),
4201 bool nir_can_move_instr(nir_instr
*instr
, nir_move_options options
);
4203 bool nir_opt_sink(nir_shader
*shader
, nir_move_options options
);
4205 bool nir_opt_move(nir_shader
*shader
, nir_move_options options
);
4207 bool nir_opt_peephole_select(nir_shader
*shader
, unsigned limit
,
4208 bool indirect_load_ok
, bool expensive_alu_ok
);
4210 bool nir_opt_rematerialize_compares(nir_shader
*shader
);
4212 bool nir_opt_remove_phis(nir_shader
*shader
);
4213 bool nir_opt_remove_phis_block(nir_block
*block
);
4215 bool nir_opt_shrink_load(nir_shader
*shader
);
4217 bool nir_opt_trivial_continues(nir_shader
*shader
);
4219 bool nir_opt_undef(nir_shader
*shader
);
4221 bool nir_opt_vectorize(nir_shader
*shader
);
4223 bool nir_opt_conditional_discard(nir_shader
*shader
);
4225 typedef bool (*nir_should_vectorize_mem_func
)(unsigned align
, unsigned bit_size
,
4226 unsigned num_components
, unsigned high_offset
,
4227 nir_intrinsic_instr
*low
, nir_intrinsic_instr
*high
);
4229 bool nir_opt_load_store_vectorize(nir_shader
*shader
, nir_variable_mode modes
,
4230 nir_should_vectorize_mem_func callback
);
4232 void nir_schedule(nir_shader
*shader
, int threshold
);
4234 void nir_strip(nir_shader
*shader
);
4236 void nir_sweep(nir_shader
*shader
);
4238 void nir_remap_dual_slot_attributes(nir_shader
*shader
,
4239 uint64_t *dual_slot_inputs
);
4240 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs
, uint64_t dual_slot
);
4242 nir_intrinsic_op
nir_intrinsic_from_system_value(gl_system_value val
);
4243 gl_system_value
nir_system_value_from_intrinsic(nir_intrinsic_op intrin
);
4246 nir_variable_is_in_ubo(const nir_variable
*var
)
4248 return (var
->data
.mode
== nir_var_mem_ubo
&&
4249 var
->interface_type
!= NULL
);
4253 nir_variable_is_in_ssbo(const nir_variable
*var
)
4255 return (var
->data
.mode
== nir_var_mem_ssbo
&&
4256 var
->interface_type
!= NULL
);
4260 nir_variable_is_in_block(const nir_variable
*var
)
4262 return nir_variable_is_in_ubo(var
) || nir_variable_is_in_ssbo(var
);