nir: Add per_view attribute to nir_variable
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "util/format/u_format.h"
41 #include "compiler/nir_types.h"
42 #include "compiler/shader_enums.h"
43 #include "compiler/shader_info.h"
44 #include <stdio.h>
45
46 #ifndef NDEBUG
47 #include "util/debug.h"
48 #endif /* NDEBUG */
49
50 #include "nir_opcodes.h"
51
52 #if defined(_WIN32) && !defined(snprintf)
53 #define snprintf _snprintf
54 #endif
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define NIR_FALSE 0u
61 #define NIR_TRUE (~0u)
62 #define NIR_MAX_VEC_COMPONENTS 16
63 #define NIR_MAX_MATRIX_COLUMNS 4
64 #define NIR_STREAM_PACKED (1 << 8)
65 typedef uint16_t nir_component_mask_t;
66
67 static inline bool
68 nir_num_components_valid(unsigned num_components)
69 {
70 return (num_components >= 1 &&
71 num_components <= 4) ||
72 num_components == 8 ||
73 num_components == 16;
74 }
75
76 /** Defines a cast function
77 *
78 * This macro defines a cast function from in_type to out_type where
79 * out_type is some structure type that contains a field of type out_type.
80 *
81 * Note that you have to be a bit careful as the generated cast function
82 * destroys constness.
83 */
84 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
85 type_field, type_value) \
86 static inline out_type * \
87 name(const in_type *parent) \
88 { \
89 assert(parent && parent->type_field == type_value); \
90 return exec_node_data(out_type, parent, field); \
91 }
92
93 struct nir_function;
94 struct nir_shader;
95 struct nir_instr;
96 struct nir_builder;
97
98
99 /**
100 * Description of built-in state associated with a uniform
101 *
102 * \sa nir_variable::state_slots
103 */
104 typedef struct {
105 gl_state_index16 tokens[STATE_LENGTH];
106 uint16_t swizzle;
107 } nir_state_slot;
108
109 typedef enum {
110 nir_var_shader_in = (1 << 0),
111 nir_var_shader_out = (1 << 1),
112 nir_var_shader_temp = (1 << 2),
113 nir_var_function_temp = (1 << 3),
114 nir_var_uniform = (1 << 4),
115 nir_var_mem_ubo = (1 << 5),
116 nir_var_system_value = (1 << 6),
117 nir_var_mem_ssbo = (1 << 7),
118 nir_var_mem_shared = (1 << 8),
119 nir_var_mem_global = (1 << 9),
120 nir_var_mem_push_const = (1 << 10), /* not actually used for variables */
121 nir_num_variable_modes = 11,
122 nir_var_all = (1 << nir_num_variable_modes) - 1,
123 } nir_variable_mode;
124
125 /**
126 * Rounding modes.
127 */
128 typedef enum {
129 nir_rounding_mode_undef = 0,
130 nir_rounding_mode_rtne = 1, /* round to nearest even */
131 nir_rounding_mode_ru = 2, /* round up */
132 nir_rounding_mode_rd = 3, /* round down */
133 nir_rounding_mode_rtz = 4, /* round towards zero */
134 } nir_rounding_mode;
135
136 typedef union {
137 bool b;
138 float f32;
139 double f64;
140 int8_t i8;
141 uint8_t u8;
142 int16_t i16;
143 uint16_t u16;
144 int32_t i32;
145 uint32_t u32;
146 int64_t i64;
147 uint64_t u64;
148 } nir_const_value;
149
150 #define nir_const_value_to_array(arr, c, components, m) \
151 { \
152 for (unsigned i = 0; i < components; ++i) \
153 arr[i] = c[i].m; \
154 } while (false)
155
156 static inline nir_const_value
157 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
158 {
159 nir_const_value v;
160 memset(&v, 0, sizeof(v));
161
162 switch (bit_size) {
163 case 1: v.b = x; break;
164 case 8: v.u8 = x; break;
165 case 16: v.u16 = x; break;
166 case 32: v.u32 = x; break;
167 case 64: v.u64 = x; break;
168 default:
169 unreachable("Invalid bit size");
170 }
171
172 return v;
173 }
174
175 static inline nir_const_value
176 nir_const_value_for_int(int64_t i, unsigned bit_size)
177 {
178 nir_const_value v;
179 memset(&v, 0, sizeof(v));
180
181 assert(bit_size <= 64);
182 if (bit_size < 64) {
183 assert(i >= (-(1ll << (bit_size - 1))));
184 assert(i < (1ll << (bit_size - 1)));
185 }
186
187 return nir_const_value_for_raw_uint(i, bit_size);
188 }
189
190 static inline nir_const_value
191 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
192 {
193 nir_const_value v;
194 memset(&v, 0, sizeof(v));
195
196 assert(bit_size <= 64);
197 if (bit_size < 64)
198 assert(u < (1ull << bit_size));
199
200 return nir_const_value_for_raw_uint(u, bit_size);
201 }
202
203 static inline nir_const_value
204 nir_const_value_for_bool(bool b, unsigned bit_size)
205 {
206 /* Booleans use a 0/-1 convention */
207 return nir_const_value_for_int(-(int)b, bit_size);
208 }
209
210 /* This one isn't inline because it requires half-float conversion */
211 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
212
213 static inline int64_t
214 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
215 {
216 switch (bit_size) {
217 /* int1_t uses 0/-1 convention */
218 case 1: return -(int)value.b;
219 case 8: return value.i8;
220 case 16: return value.i16;
221 case 32: return value.i32;
222 case 64: return value.i64;
223 default:
224 unreachable("Invalid bit size");
225 }
226 }
227
228 static inline uint64_t
229 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
230 {
231 switch (bit_size) {
232 case 1: return value.b;
233 case 8: return value.u8;
234 case 16: return value.u16;
235 case 32: return value.u32;
236 case 64: return value.u64;
237 default:
238 unreachable("Invalid bit size");
239 }
240 }
241
242 static inline bool
243 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
244 {
245 int64_t i = nir_const_value_as_int(value, bit_size);
246
247 /* Booleans of any size use 0/-1 convention */
248 assert(i == 0 || i == -1);
249
250 return i;
251 }
252
253 /* This one isn't inline because it requires half-float conversion */
254 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
255
256 typedef struct nir_constant {
257 /**
258 * Value of the constant.
259 *
260 * The field used to back the values supplied by the constant is determined
261 * by the type associated with the \c nir_variable. Constants may be
262 * scalars, vectors, or matrices.
263 */
264 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
265
266 /* we could get this from the var->type but makes clone *much* easier to
267 * not have to care about the type.
268 */
269 unsigned num_elements;
270
271 /* Array elements / Structure Fields */
272 struct nir_constant **elements;
273 } nir_constant;
274
275 /**
276 * \brief Layout qualifiers for gl_FragDepth.
277 *
278 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
279 * with a layout qualifier.
280 */
281 typedef enum {
282 nir_depth_layout_none, /**< No depth layout is specified. */
283 nir_depth_layout_any,
284 nir_depth_layout_greater,
285 nir_depth_layout_less,
286 nir_depth_layout_unchanged
287 } nir_depth_layout;
288
289 /**
290 * Enum keeping track of how a variable was declared.
291 */
292 typedef enum {
293 /**
294 * Normal declaration.
295 */
296 nir_var_declared_normally = 0,
297
298 /**
299 * Variable is implicitly generated by the compiler and should not be
300 * visible via the API.
301 */
302 nir_var_hidden,
303 } nir_var_declaration_type;
304
305 /**
306 * Either a uniform, global variable, shader input, or shader output. Based on
307 * ir_variable - it should be easy to translate between the two.
308 */
309
310 typedef struct nir_variable {
311 struct exec_node node;
312
313 /**
314 * Declared type of the variable
315 */
316 const struct glsl_type *type;
317
318 /**
319 * Declared name of the variable
320 */
321 char *name;
322
323 struct nir_variable_data {
324 /**
325 * Storage class of the variable.
326 *
327 * \sa nir_variable_mode
328 */
329 nir_variable_mode mode:11;
330
331 /**
332 * Is the variable read-only?
333 *
334 * This is set for variables declared as \c const, shader inputs,
335 * and uniforms.
336 */
337 unsigned read_only:1;
338 unsigned centroid:1;
339 unsigned sample:1;
340 unsigned patch:1;
341 unsigned invariant:1;
342
343 /**
344 * Precision qualifier.
345 *
346 * In desktop GLSL we do not care about precision qualifiers at all, in
347 * fact, the spec says that precision qualifiers are ignored.
348 *
349 * To make things easy, we make it so that this field is always
350 * GLSL_PRECISION_NONE on desktop shaders. This way all the variables
351 * have the same precision value and the checks we add in the compiler
352 * for this field will never break a desktop shader compile.
353 */
354 unsigned precision:2;
355
356 /**
357 * Can this variable be coalesced with another?
358 *
359 * This is set by nir_lower_io_to_temporaries to say that any
360 * copies involving this variable should stay put. Propagating it can
361 * duplicate the resulting load/store, which is not wanted, and may
362 * result in a load/store of the variable with an indirect offset which
363 * the backend may not be able to handle.
364 */
365 unsigned cannot_coalesce:1;
366
367 /**
368 * When separate shader programs are enabled, only input/outputs between
369 * the stages of a multi-stage separate program can be safely removed
370 * from the shader interface. Other input/outputs must remains active.
371 *
372 * This is also used to make sure xfb varyings that are unused by the
373 * fragment shader are not removed.
374 */
375 unsigned always_active_io:1;
376
377 /**
378 * Interpolation mode for shader inputs / outputs
379 *
380 * \sa glsl_interp_mode
381 */
382 unsigned interpolation:3;
383
384 /**
385 * If non-zero, then this variable may be packed along with other variables
386 * into a single varying slot, so this offset should be applied when
387 * accessing components. For example, an offset of 1 means that the x
388 * component of this variable is actually stored in component y of the
389 * location specified by \c location.
390 */
391 unsigned location_frac:2;
392
393 /**
394 * If true, this variable represents an array of scalars that should
395 * be tightly packed. In other words, consecutive array elements
396 * should be stored one component apart, rather than one slot apart.
397 */
398 unsigned compact:1;
399
400 /**
401 * Whether this is a fragment shader output implicitly initialized with
402 * the previous contents of the specified render target at the
403 * framebuffer location corresponding to this shader invocation.
404 */
405 unsigned fb_fetch_output:1;
406
407 /**
408 * Non-zero if this variable is considered bindless as defined by
409 * ARB_bindless_texture.
410 */
411 unsigned bindless:1;
412
413 /**
414 * Was an explicit binding set in the shader?
415 */
416 unsigned explicit_binding:1;
417
418 /**
419 * Was the location explicitly set in the shader?
420 *
421 * If the location is explicitly set in the shader, it \b cannot be changed
422 * by the linker or by the API (e.g., calls to \c glBindAttribLocation have
423 * no effect).
424 */
425 unsigned explicit_location:1;
426
427 /**
428 * Was a transfer feedback buffer set in the shader?
429 */
430 unsigned explicit_xfb_buffer:1;
431
432 /**
433 * Was a transfer feedback stride set in the shader?
434 */
435 unsigned explicit_xfb_stride:1;
436
437 /**
438 * Was an explicit offset set in the shader?
439 */
440 unsigned explicit_offset:1;
441
442 /**
443 * Non-zero if this variable was created by lowering a named interface
444 * block.
445 */
446 unsigned from_named_ifc_block:1;
447
448 /**
449 * How the variable was declared. See nir_var_declaration_type.
450 *
451 * This is used to detect variables generated by the compiler, so should
452 * not be visible via the API.
453 */
454 unsigned how_declared:2;
455
456 /**
457 * Is this variable per-view? If so, we know it must be an array with
458 * size corresponding to the number of views.
459 */
460 unsigned per_view:1;
461
462 /**
463 * \brief Layout qualifier for gl_FragDepth.
464 *
465 * This is not equal to \c ir_depth_layout_none if and only if this
466 * variable is \c gl_FragDepth and a layout qualifier is specified.
467 */
468 nir_depth_layout depth_layout:3;
469
470 /**
471 * Vertex stream output identifier.
472 *
473 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
474 * indicate the stream of the i-th component.
475 */
476 unsigned stream:9;
477
478 /**
479 * Access flags for memory variables (SSBO/global), image uniforms, and
480 * bindless images in uniforms/inputs/outputs.
481 */
482 enum gl_access_qualifier access:8;
483
484 /**
485 * Descriptor set binding for sampler or UBO.
486 */
487 unsigned descriptor_set:5;
488
489 /**
490 * output index for dual source blending.
491 */
492 unsigned index;
493
494 /**
495 * Initial binding point for a sampler or UBO.
496 *
497 * For array types, this represents the binding point for the first element.
498 */
499 unsigned binding;
500
501 /**
502 * Storage location of the base of this variable
503 *
504 * The precise meaning of this field depends on the nature of the variable.
505 *
506 * - Vertex shader input: one of the values from \c gl_vert_attrib.
507 * - Vertex shader output: one of the values from \c gl_varying_slot.
508 * - Geometry shader input: one of the values from \c gl_varying_slot.
509 * - Geometry shader output: one of the values from \c gl_varying_slot.
510 * - Fragment shader input: one of the values from \c gl_varying_slot.
511 * - Fragment shader output: one of the values from \c gl_frag_result.
512 * - Uniforms: Per-stage uniform slot number for default uniform block.
513 * - Uniforms: Index within the uniform block definition for UBO members.
514 * - Non-UBO Uniforms: uniform slot number.
515 * - Other: This field is not currently used.
516 *
517 * If the variable is a uniform, shader input, or shader output, and the
518 * slot has not been assigned, the value will be -1.
519 */
520 int location;
521
522 /**
523 * The actual location of the variable in the IR. Only valid for inputs,
524 * outputs, and uniforms (including samplers and images).
525 */
526 unsigned driver_location;
527
528 /**
529 * Location an atomic counter or transform feedback is stored at.
530 */
531 unsigned offset;
532
533 union {
534 struct {
535 /** Image internal format if specified explicitly, otherwise PIPE_FORMAT_NONE. */
536 enum pipe_format format;
537 } image;
538
539 struct {
540 /**
541 * Transform feedback buffer.
542 */
543 uint16_t buffer:2;
544
545 /**
546 * Transform feedback stride.
547 */
548 uint16_t stride;
549 } xfb;
550 };
551 } data;
552
553 /**
554 * Identifier for this variable generated by nir_index_vars() that is unique
555 * among other variables in the same exec_list.
556 */
557 unsigned index;
558
559 /* Number of nir_variable_data members */
560 uint16_t num_members;
561
562 /**
563 * Built-in state that backs this uniform
564 *
565 * Once set at variable creation, \c state_slots must remain invariant.
566 * This is because, ideally, this array would be shared by all clones of
567 * this variable in the IR tree. In other words, we'd really like for it
568 * to be a fly-weight.
569 *
570 * If the variable is not a uniform, \c num_state_slots will be zero and
571 * \c state_slots will be \c NULL.
572 */
573 /*@{*/
574 uint16_t num_state_slots; /**< Number of state slots used */
575 nir_state_slot *state_slots; /**< State descriptors. */
576 /*@}*/
577
578 /**
579 * Constant expression assigned in the initializer of the variable
580 *
581 * This field should only be used temporarily by creators of NIR shaders
582 * and then lower_constant_initializers can be used to get rid of them.
583 * Most of the rest of NIR ignores this field or asserts that it's NULL.
584 */
585 nir_constant *constant_initializer;
586
587 /**
588 * Global variable assigned in the initializer of the variable
589 * This field should only be used temporarily by creators of NIR shaders
590 * and then lower_constant_initializers can be used to get rid of them.
591 * Most of the rest of NIR ignores this field or asserts that it's NULL.
592 */
593 struct nir_variable *pointer_initializer;
594
595 /**
596 * For variables that are in an interface block or are an instance of an
597 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
598 *
599 * \sa ir_variable::location
600 */
601 const struct glsl_type *interface_type;
602
603 /**
604 * Description of per-member data for per-member struct variables
605 *
606 * This is used for variables which are actually an amalgamation of
607 * multiple entities such as a struct of built-in values or a struct of
608 * inputs each with their own layout specifier. This is only allowed on
609 * variables with a struct or array of array of struct type.
610 */
611 struct nir_variable_data *members;
612 } nir_variable;
613
614 #define nir_foreach_variable(var, var_list) \
615 foreach_list_typed(nir_variable, var, node, var_list)
616
617 #define nir_foreach_variable_safe(var, var_list) \
618 foreach_list_typed_safe(nir_variable, var, node, var_list)
619
620 static inline bool
621 nir_variable_is_global(const nir_variable *var)
622 {
623 return var->data.mode != nir_var_function_temp;
624 }
625
626 typedef struct nir_register {
627 struct exec_node node;
628
629 unsigned num_components; /** < number of vector components */
630 unsigned num_array_elems; /** < size of array (0 for no array) */
631
632 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
633 uint8_t bit_size;
634
635 /** generic register index. */
636 unsigned index;
637
638 /** only for debug purposes, can be NULL */
639 const char *name;
640
641 /** set of nir_srcs where this register is used (read from) */
642 struct list_head uses;
643
644 /** set of nir_dests where this register is defined (written to) */
645 struct list_head defs;
646
647 /** set of nir_ifs where this register is used as a condition */
648 struct list_head if_uses;
649 } nir_register;
650
651 #define nir_foreach_register(reg, reg_list) \
652 foreach_list_typed(nir_register, reg, node, reg_list)
653 #define nir_foreach_register_safe(reg, reg_list) \
654 foreach_list_typed_safe(nir_register, reg, node, reg_list)
655
656 typedef enum PACKED {
657 nir_instr_type_alu,
658 nir_instr_type_deref,
659 nir_instr_type_call,
660 nir_instr_type_tex,
661 nir_instr_type_intrinsic,
662 nir_instr_type_load_const,
663 nir_instr_type_jump,
664 nir_instr_type_ssa_undef,
665 nir_instr_type_phi,
666 nir_instr_type_parallel_copy,
667 } nir_instr_type;
668
669 typedef struct nir_instr {
670 struct exec_node node;
671 struct nir_block *block;
672 nir_instr_type type;
673
674 /* A temporary for optimization and analysis passes to use for storing
675 * flags. For instance, DCE uses this to store the "dead/live" info.
676 */
677 uint8_t pass_flags;
678
679 /** generic instruction index. */
680 unsigned index;
681 } nir_instr;
682
683 static inline nir_instr *
684 nir_instr_next(nir_instr *instr)
685 {
686 struct exec_node *next = exec_node_get_next(&instr->node);
687 if (exec_node_is_tail_sentinel(next))
688 return NULL;
689 else
690 return exec_node_data(nir_instr, next, node);
691 }
692
693 static inline nir_instr *
694 nir_instr_prev(nir_instr *instr)
695 {
696 struct exec_node *prev = exec_node_get_prev(&instr->node);
697 if (exec_node_is_head_sentinel(prev))
698 return NULL;
699 else
700 return exec_node_data(nir_instr, prev, node);
701 }
702
703 static inline bool
704 nir_instr_is_first(const nir_instr *instr)
705 {
706 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
707 }
708
709 static inline bool
710 nir_instr_is_last(const nir_instr *instr)
711 {
712 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
713 }
714
715 typedef struct nir_ssa_def {
716 /** for debugging only, can be NULL */
717 const char* name;
718
719 /** generic SSA definition index. */
720 unsigned index;
721
722 /** Index into the live_in and live_out bitfields */
723 unsigned live_index;
724
725 /** Instruction which produces this SSA value. */
726 nir_instr *parent_instr;
727
728 /** set of nir_instrs where this register is used (read from) */
729 struct list_head uses;
730
731 /** set of nir_ifs where this register is used as a condition */
732 struct list_head if_uses;
733
734 uint8_t num_components;
735
736 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
737 uint8_t bit_size;
738 } nir_ssa_def;
739
740 struct nir_src;
741
742 typedef struct {
743 nir_register *reg;
744 struct nir_src *indirect; /** < NULL for no indirect offset */
745 unsigned base_offset;
746
747 /* TODO use-def chain goes here */
748 } nir_reg_src;
749
750 typedef struct {
751 nir_instr *parent_instr;
752 struct list_head def_link;
753
754 nir_register *reg;
755 struct nir_src *indirect; /** < NULL for no indirect offset */
756 unsigned base_offset;
757
758 /* TODO def-use chain goes here */
759 } nir_reg_dest;
760
761 struct nir_if;
762
763 typedef struct nir_src {
764 union {
765 /** Instruction that consumes this value as a source. */
766 nir_instr *parent_instr;
767 struct nir_if *parent_if;
768 };
769
770 struct list_head use_link;
771
772 union {
773 nir_reg_src reg;
774 nir_ssa_def *ssa;
775 };
776
777 bool is_ssa;
778 } nir_src;
779
780 static inline nir_src
781 nir_src_init(void)
782 {
783 nir_src src = { { NULL } };
784 return src;
785 }
786
787 #define NIR_SRC_INIT nir_src_init()
788
789 #define nir_foreach_use(src, reg_or_ssa_def) \
790 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
791
792 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
793 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
794
795 #define nir_foreach_if_use(src, reg_or_ssa_def) \
796 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
797
798 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
799 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
800
801 typedef struct {
802 union {
803 nir_reg_dest reg;
804 nir_ssa_def ssa;
805 };
806
807 bool is_ssa;
808 } nir_dest;
809
810 static inline nir_dest
811 nir_dest_init(void)
812 {
813 nir_dest dest = { { { NULL } } };
814 return dest;
815 }
816
817 #define NIR_DEST_INIT nir_dest_init()
818
819 #define nir_foreach_def(dest, reg) \
820 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
821
822 #define nir_foreach_def_safe(dest, reg) \
823 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
824
825 static inline nir_src
826 nir_src_for_ssa(nir_ssa_def *def)
827 {
828 nir_src src = NIR_SRC_INIT;
829
830 src.is_ssa = true;
831 src.ssa = def;
832
833 return src;
834 }
835
836 static inline nir_src
837 nir_src_for_reg(nir_register *reg)
838 {
839 nir_src src = NIR_SRC_INIT;
840
841 src.is_ssa = false;
842 src.reg.reg = reg;
843 src.reg.indirect = NULL;
844 src.reg.base_offset = 0;
845
846 return src;
847 }
848
849 static inline nir_dest
850 nir_dest_for_reg(nir_register *reg)
851 {
852 nir_dest dest = NIR_DEST_INIT;
853
854 dest.reg.reg = reg;
855
856 return dest;
857 }
858
859 static inline unsigned
860 nir_src_bit_size(nir_src src)
861 {
862 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
863 }
864
865 static inline unsigned
866 nir_src_num_components(nir_src src)
867 {
868 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
869 }
870
871 static inline bool
872 nir_src_is_const(nir_src src)
873 {
874 return src.is_ssa &&
875 src.ssa->parent_instr->type == nir_instr_type_load_const;
876 }
877
878 static inline unsigned
879 nir_dest_bit_size(nir_dest dest)
880 {
881 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
882 }
883
884 static inline unsigned
885 nir_dest_num_components(nir_dest dest)
886 {
887 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
888 }
889
890 /* Are all components the same, ie. .xxxx */
891 static inline bool
892 nir_is_same_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
893 {
894 for (unsigned i = 1; i < nr_comp; i++)
895 if (swiz[i] != swiz[0])
896 return false;
897 return true;
898 }
899
900 /* Are all components sequential, ie. .yzw */
901 static inline bool
902 nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
903 {
904 for (unsigned i = 1; i < nr_comp; i++)
905 if (swiz[i] != (swiz[0] + i))
906 return false;
907 return true;
908 }
909
910 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
911 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
912
913 typedef struct {
914 nir_src src;
915
916 /**
917 * \name input modifiers
918 */
919 /*@{*/
920 /**
921 * For inputs interpreted as floating point, flips the sign bit. For
922 * inputs interpreted as integers, performs the two's complement negation.
923 */
924 bool negate;
925
926 /**
927 * Clears the sign bit for floating point values, and computes the integer
928 * absolute value for integers. Note that the negate modifier acts after
929 * the absolute value modifier, therefore if both are set then all inputs
930 * will become negative.
931 */
932 bool abs;
933 /*@}*/
934
935 /**
936 * For each input component, says which component of the register it is
937 * chosen from. Note that which elements of the swizzle are used and which
938 * are ignored are based on the write mask for most opcodes - for example,
939 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
940 * a swizzle of {2, x, 1, 0} where x means "don't care."
941 */
942 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
943 } nir_alu_src;
944
945 typedef struct {
946 nir_dest dest;
947
948 /**
949 * \name saturate output modifier
950 *
951 * Only valid for opcodes that output floating-point numbers. Clamps the
952 * output to between 0.0 and 1.0 inclusive.
953 */
954
955 bool saturate;
956
957 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
958 } nir_alu_dest;
959
960 /** NIR sized and unsized types
961 *
962 * The values in this enum are carefully chosen so that the sized type is
963 * just the unsized type OR the number of bits.
964 */
965 typedef enum {
966 nir_type_invalid = 0, /* Not a valid type */
967 nir_type_int = 2,
968 nir_type_uint = 4,
969 nir_type_bool = 6,
970 nir_type_float = 128,
971 nir_type_bool1 = 1 | nir_type_bool,
972 nir_type_bool8 = 8 | nir_type_bool,
973 nir_type_bool16 = 16 | nir_type_bool,
974 nir_type_bool32 = 32 | nir_type_bool,
975 nir_type_int1 = 1 | nir_type_int,
976 nir_type_int8 = 8 | nir_type_int,
977 nir_type_int16 = 16 | nir_type_int,
978 nir_type_int32 = 32 | nir_type_int,
979 nir_type_int64 = 64 | nir_type_int,
980 nir_type_uint1 = 1 | nir_type_uint,
981 nir_type_uint8 = 8 | nir_type_uint,
982 nir_type_uint16 = 16 | nir_type_uint,
983 nir_type_uint32 = 32 | nir_type_uint,
984 nir_type_uint64 = 64 | nir_type_uint,
985 nir_type_float16 = 16 | nir_type_float,
986 nir_type_float32 = 32 | nir_type_float,
987 nir_type_float64 = 64 | nir_type_float,
988 } nir_alu_type;
989
990 #define NIR_ALU_TYPE_SIZE_MASK 0x79
991 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
992
993 static inline unsigned
994 nir_alu_type_get_type_size(nir_alu_type type)
995 {
996 return type & NIR_ALU_TYPE_SIZE_MASK;
997 }
998
999 static inline unsigned
1000 nir_alu_type_get_base_type(nir_alu_type type)
1001 {
1002 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
1003 }
1004
1005 static inline nir_alu_type
1006 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
1007 {
1008 switch (base_type) {
1009 case GLSL_TYPE_BOOL:
1010 return nir_type_bool1;
1011 break;
1012 case GLSL_TYPE_UINT:
1013 return nir_type_uint32;
1014 break;
1015 case GLSL_TYPE_INT:
1016 return nir_type_int32;
1017 break;
1018 case GLSL_TYPE_UINT16:
1019 return nir_type_uint16;
1020 break;
1021 case GLSL_TYPE_INT16:
1022 return nir_type_int16;
1023 break;
1024 case GLSL_TYPE_UINT8:
1025 return nir_type_uint8;
1026 case GLSL_TYPE_INT8:
1027 return nir_type_int8;
1028 case GLSL_TYPE_UINT64:
1029 return nir_type_uint64;
1030 break;
1031 case GLSL_TYPE_INT64:
1032 return nir_type_int64;
1033 break;
1034 case GLSL_TYPE_FLOAT:
1035 return nir_type_float32;
1036 break;
1037 case GLSL_TYPE_FLOAT16:
1038 return nir_type_float16;
1039 break;
1040 case GLSL_TYPE_DOUBLE:
1041 return nir_type_float64;
1042 break;
1043
1044 case GLSL_TYPE_SAMPLER:
1045 case GLSL_TYPE_IMAGE:
1046 case GLSL_TYPE_ATOMIC_UINT:
1047 case GLSL_TYPE_STRUCT:
1048 case GLSL_TYPE_INTERFACE:
1049 case GLSL_TYPE_ARRAY:
1050 case GLSL_TYPE_VOID:
1051 case GLSL_TYPE_SUBROUTINE:
1052 case GLSL_TYPE_FUNCTION:
1053 case GLSL_TYPE_ERROR:
1054 return nir_type_invalid;
1055 }
1056
1057 unreachable("unknown type");
1058 }
1059
1060 static inline nir_alu_type
1061 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
1062 {
1063 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
1064 }
1065
1066 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
1067 nir_rounding_mode rnd);
1068
1069 static inline nir_op
1070 nir_op_vec(unsigned components)
1071 {
1072 switch (components) {
1073 case 1: return nir_op_mov;
1074 case 2: return nir_op_vec2;
1075 case 3: return nir_op_vec3;
1076 case 4: return nir_op_vec4;
1077 case 8: return nir_op_vec8;
1078 case 16: return nir_op_vec16;
1079 default: unreachable("bad component count");
1080 }
1081 }
1082
1083 static inline bool
1084 nir_op_is_vec(nir_op op)
1085 {
1086 switch (op) {
1087 case nir_op_mov:
1088 case nir_op_vec2:
1089 case nir_op_vec3:
1090 case nir_op_vec4:
1091 case nir_op_vec8:
1092 case nir_op_vec16:
1093 return true;
1094 default:
1095 return false;
1096 }
1097 }
1098
1099 static inline bool
1100 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1101 {
1102 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1103 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1104 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1105 }
1106
1107 static inline bool
1108 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1109 {
1110 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1111 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1112 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1113 }
1114
1115 static inline bool
1116 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1117 {
1118 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1119 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1120 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1121 }
1122
1123 static inline bool
1124 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1125 {
1126 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1127 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1128 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1129 }
1130
1131 static inline bool
1132 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1133 {
1134 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1135 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1136 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1137 }
1138
1139 static inline bool
1140 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1141 {
1142 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1143 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1144 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1145 }
1146
1147 static inline bool
1148 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1149 {
1150 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1151 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1152 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1153 }
1154
1155 static inline nir_rounding_mode
1156 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1157 nir_alu_type type)
1158 {
1159 if (nir_alu_type_get_base_type(type) != nir_type_float)
1160 return nir_rounding_mode_undef;
1161
1162 unsigned bit_size = nir_alu_type_get_type_size(type);
1163
1164 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1165 return nir_rounding_mode_rtz;
1166 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1167 return nir_rounding_mode_rtne;
1168 return nir_rounding_mode_undef;
1169 }
1170
1171 static inline bool
1172 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1173 {
1174 bool result =
1175 nir_has_any_rounding_mode_rtne(execution_mode) ||
1176 nir_has_any_rounding_mode_rtz(execution_mode);
1177 return result;
1178 }
1179
1180 typedef enum {
1181 /**
1182 * Operation where the first two sources are commutative.
1183 *
1184 * For 2-source operations, this just mathematical commutativity. Some
1185 * 3-source operations, like ffma, are only commutative in the first two
1186 * sources.
1187 */
1188 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1189 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1190 } nir_op_algebraic_property;
1191
1192 typedef struct {
1193 const char *name;
1194
1195 unsigned num_inputs;
1196
1197 /**
1198 * The number of components in the output
1199 *
1200 * If non-zero, this is the size of the output and input sizes are
1201 * explicitly given; swizzle and writemask are still in effect, but if
1202 * the output component is masked out, then the input component may
1203 * still be in use.
1204 *
1205 * If zero, the opcode acts in the standard, per-component manner; the
1206 * operation is performed on each component (except the ones that are
1207 * masked out) with the input being taken from the input swizzle for
1208 * that component.
1209 *
1210 * The size of some of the inputs may be given (i.e. non-zero) even
1211 * though output_size is zero; in that case, the inputs with a zero
1212 * size act per-component, while the inputs with non-zero size don't.
1213 */
1214 unsigned output_size;
1215
1216 /**
1217 * The type of vector that the instruction outputs. Note that the
1218 * staurate modifier is only allowed on outputs with the float type.
1219 */
1220
1221 nir_alu_type output_type;
1222
1223 /**
1224 * The number of components in each input
1225 */
1226 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1227
1228 /**
1229 * The type of vector that each input takes. Note that negate and
1230 * absolute value are only allowed on inputs with int or float type and
1231 * behave differently on the two.
1232 */
1233 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1234
1235 nir_op_algebraic_property algebraic_properties;
1236
1237 /* Whether this represents a numeric conversion opcode */
1238 bool is_conversion;
1239 } nir_op_info;
1240
1241 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1242
1243 typedef struct nir_alu_instr {
1244 nir_instr instr;
1245 nir_op op;
1246
1247 /** Indicates that this ALU instruction generates an exact value
1248 *
1249 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1250 * really equivalent to either. This indicates that the value generated by
1251 * this operation is high-precision and any code transformations that touch
1252 * it must ensure that the resulting value is bit-for-bit identical to the
1253 * original.
1254 */
1255 bool exact:1;
1256
1257 /**
1258 * Indicates that this instruction do not cause wrapping to occur, in the
1259 * form of overflow or underflow.
1260 */
1261 bool no_signed_wrap:1;
1262 bool no_unsigned_wrap:1;
1263
1264 nir_alu_dest dest;
1265 nir_alu_src src[];
1266 } nir_alu_instr;
1267
1268 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1269 nir_alu_instr *instr);
1270 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1271 nir_alu_instr *instr);
1272
1273 /* is this source channel used? */
1274 static inline bool
1275 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1276 unsigned channel)
1277 {
1278 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1279 return channel < nir_op_infos[instr->op].input_sizes[src];
1280
1281 return (instr->dest.write_mask >> channel) & 1;
1282 }
1283
1284 static inline nir_component_mask_t
1285 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1286 {
1287 nir_component_mask_t read_mask = 0;
1288 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1289 if (!nir_alu_instr_channel_used(instr, src, c))
1290 continue;
1291
1292 read_mask |= (1 << instr->src[src].swizzle[c]);
1293 }
1294 return read_mask;
1295 }
1296
1297 /**
1298 * Get the number of channels used for a source
1299 */
1300 static inline unsigned
1301 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1302 {
1303 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1304 return nir_op_infos[instr->op].input_sizes[src];
1305
1306 return nir_dest_num_components(instr->dest.dest);
1307 }
1308
1309 static inline bool
1310 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1311 {
1312 switch (instr->op) {
1313 case nir_op_flt:
1314 case nir_op_fge:
1315 case nir_op_feq:
1316 case nir_op_fne:
1317 case nir_op_ilt:
1318 case nir_op_ult:
1319 case nir_op_ige:
1320 case nir_op_uge:
1321 case nir_op_ieq:
1322 case nir_op_ine:
1323 case nir_op_i2b1:
1324 case nir_op_f2b1:
1325 case nir_op_inot:
1326 return true;
1327 default:
1328 return false;
1329 }
1330 }
1331
1332 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1333 nir_alu_type full_type);
1334
1335 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1336 unsigned src1, unsigned src2);
1337
1338 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1339 const nir_alu_instr *alu2,
1340 unsigned src1, unsigned src2);
1341
1342 typedef enum {
1343 nir_deref_type_var,
1344 nir_deref_type_array,
1345 nir_deref_type_array_wildcard,
1346 nir_deref_type_ptr_as_array,
1347 nir_deref_type_struct,
1348 nir_deref_type_cast,
1349 } nir_deref_type;
1350
1351 typedef struct {
1352 nir_instr instr;
1353
1354 /** The type of this deref instruction */
1355 nir_deref_type deref_type;
1356
1357 /** The mode of the underlying variable */
1358 nir_variable_mode mode;
1359
1360 /** The dereferenced type of the resulting pointer value */
1361 const struct glsl_type *type;
1362
1363 union {
1364 /** Variable being dereferenced if deref_type is a deref_var */
1365 nir_variable *var;
1366
1367 /** Parent deref if deref_type is not deref_var */
1368 nir_src parent;
1369 };
1370
1371 /** Additional deref parameters */
1372 union {
1373 struct {
1374 nir_src index;
1375 } arr;
1376
1377 struct {
1378 unsigned index;
1379 } strct;
1380
1381 struct {
1382 unsigned ptr_stride;
1383 } cast;
1384 };
1385
1386 /** Destination to store the resulting "pointer" */
1387 nir_dest dest;
1388 } nir_deref_instr;
1389
1390 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1391
1392 static inline nir_deref_instr *
1393 nir_deref_instr_parent(const nir_deref_instr *instr)
1394 {
1395 if (instr->deref_type == nir_deref_type_var)
1396 return NULL;
1397 else
1398 return nir_src_as_deref(instr->parent);
1399 }
1400
1401 static inline nir_variable *
1402 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1403 {
1404 while (instr->deref_type != nir_deref_type_var) {
1405 if (instr->deref_type == nir_deref_type_cast)
1406 return NULL;
1407
1408 instr = nir_deref_instr_parent(instr);
1409 }
1410
1411 return instr->var;
1412 }
1413
1414 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1415 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1416 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1417
1418 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1419
1420 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1421
1422 typedef struct {
1423 nir_instr instr;
1424
1425 struct nir_function *callee;
1426
1427 unsigned num_params;
1428 nir_src params[];
1429 } nir_call_instr;
1430
1431 #include "nir_intrinsics.h"
1432
1433 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1434
1435 /** Represents an intrinsic
1436 *
1437 * An intrinsic is an instruction type for handling things that are
1438 * more-or-less regular operations but don't just consume and produce SSA
1439 * values like ALU operations do. Intrinsics are not for things that have
1440 * special semantic meaning such as phi nodes and parallel copies.
1441 * Examples of intrinsics include variable load/store operations, system
1442 * value loads, and the like. Even though texturing more-or-less falls
1443 * under this category, texturing is its own instruction type because
1444 * trying to represent texturing with intrinsics would lead to a
1445 * combinatorial explosion of intrinsic opcodes.
1446 *
1447 * By having a single instruction type for handling a lot of different
1448 * cases, optimization passes can look for intrinsics and, for the most
1449 * part, completely ignore them. Each intrinsic type also has a few
1450 * possible flags that govern whether or not they can be reordered or
1451 * eliminated. That way passes like dead code elimination can still work
1452 * on intrisics without understanding the meaning of each.
1453 *
1454 * Each intrinsic has some number of constant indices, some number of
1455 * variables, and some number of sources. What these sources, variables,
1456 * and indices mean depends on the intrinsic and is documented with the
1457 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1458 * instructions are the only types of instruction that can operate on
1459 * variables.
1460 */
1461 typedef struct {
1462 nir_instr instr;
1463
1464 nir_intrinsic_op intrinsic;
1465
1466 nir_dest dest;
1467
1468 /** number of components if this is a vectorized intrinsic
1469 *
1470 * Similarly to ALU operations, some intrinsics are vectorized.
1471 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1472 * For vectorized intrinsics, the num_components field specifies the
1473 * number of destination components and the number of source components
1474 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1475 */
1476 uint8_t num_components;
1477
1478 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1479
1480 nir_src src[];
1481 } nir_intrinsic_instr;
1482
1483 static inline nir_variable *
1484 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1485 {
1486 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1487 }
1488
1489 typedef enum {
1490 /* Memory ordering. */
1491 NIR_MEMORY_ACQUIRE = 1 << 0,
1492 NIR_MEMORY_RELEASE = 1 << 1,
1493 NIR_MEMORY_ACQ_REL = NIR_MEMORY_ACQUIRE | NIR_MEMORY_RELEASE,
1494
1495 /* Memory visibility operations. */
1496 NIR_MEMORY_MAKE_AVAILABLE = 1 << 2,
1497 NIR_MEMORY_MAKE_VISIBLE = 1 << 3,
1498 } nir_memory_semantics;
1499
1500 typedef enum {
1501 NIR_SCOPE_INVOCATION,
1502 NIR_SCOPE_SUBGROUP,
1503 NIR_SCOPE_WORKGROUP,
1504 NIR_SCOPE_QUEUE_FAMILY,
1505 NIR_SCOPE_DEVICE,
1506 } nir_scope;
1507
1508 /**
1509 * \name NIR intrinsics semantic flags
1510 *
1511 * information about what the compiler can do with the intrinsics.
1512 *
1513 * \sa nir_intrinsic_info::flags
1514 */
1515 typedef enum {
1516 /**
1517 * whether the intrinsic can be safely eliminated if none of its output
1518 * value is not being used.
1519 */
1520 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1521
1522 /**
1523 * Whether the intrinsic can be reordered with respect to any other
1524 * intrinsic, i.e. whether the only reordering dependencies of the
1525 * intrinsic are due to the register reads/writes.
1526 */
1527 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1528 } nir_intrinsic_semantic_flag;
1529
1530 /**
1531 * \name NIR intrinsics const-index flag
1532 *
1533 * Indicates the usage of a const_index slot.
1534 *
1535 * \sa nir_intrinsic_info::index_map
1536 */
1537 typedef enum {
1538 /**
1539 * Generally instructions that take a offset src argument, can encode
1540 * a constant 'base' value which is added to the offset.
1541 */
1542 NIR_INTRINSIC_BASE = 1,
1543
1544 /**
1545 * For store instructions, a writemask for the store.
1546 */
1547 NIR_INTRINSIC_WRMASK,
1548
1549 /**
1550 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1551 */
1552 NIR_INTRINSIC_STREAM_ID,
1553
1554 /**
1555 * The clip-plane id for load_user_clip_plane intrinsic.
1556 */
1557 NIR_INTRINSIC_UCP_ID,
1558
1559 /**
1560 * The amount of data, starting from BASE, that this instruction may
1561 * access. This is used to provide bounds if the offset is not constant.
1562 */
1563 NIR_INTRINSIC_RANGE,
1564
1565 /**
1566 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1567 */
1568 NIR_INTRINSIC_DESC_SET,
1569
1570 /**
1571 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1572 */
1573 NIR_INTRINSIC_BINDING,
1574
1575 /**
1576 * Component offset.
1577 */
1578 NIR_INTRINSIC_COMPONENT,
1579
1580 /**
1581 * Interpolation mode (only meaningful for FS inputs).
1582 */
1583 NIR_INTRINSIC_INTERP_MODE,
1584
1585 /**
1586 * A binary nir_op to use when performing a reduction or scan operation
1587 */
1588 NIR_INTRINSIC_REDUCTION_OP,
1589
1590 /**
1591 * Cluster size for reduction operations
1592 */
1593 NIR_INTRINSIC_CLUSTER_SIZE,
1594
1595 /**
1596 * Parameter index for a load_param intrinsic
1597 */
1598 NIR_INTRINSIC_PARAM_IDX,
1599
1600 /**
1601 * Image dimensionality for image intrinsics
1602 *
1603 * One of GLSL_SAMPLER_DIM_*
1604 */
1605 NIR_INTRINSIC_IMAGE_DIM,
1606
1607 /**
1608 * Non-zero if we are accessing an array image
1609 */
1610 NIR_INTRINSIC_IMAGE_ARRAY,
1611
1612 /**
1613 * Image format for image intrinsics
1614 */
1615 NIR_INTRINSIC_FORMAT,
1616
1617 /**
1618 * Access qualifiers for image and memory access intrinsics
1619 */
1620 NIR_INTRINSIC_ACCESS,
1621
1622 /**
1623 * Alignment for offsets and addresses
1624 *
1625 * These two parameters, specify an alignment in terms of a multiplier and
1626 * an offset. The offset or address parameter X of the intrinsic is
1627 * guaranteed to satisfy the following:
1628 *
1629 * (X - align_offset) % align_mul == 0
1630 */
1631 NIR_INTRINSIC_ALIGN_MUL,
1632 NIR_INTRINSIC_ALIGN_OFFSET,
1633
1634 /**
1635 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1636 */
1637 NIR_INTRINSIC_DESC_TYPE,
1638
1639 /**
1640 * The nir_alu_type of a uniform/input/output
1641 */
1642 NIR_INTRINSIC_TYPE,
1643
1644 /**
1645 * The swizzle mask for the instructions
1646 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1647 */
1648 NIR_INTRINSIC_SWIZZLE_MASK,
1649
1650 /* Separate source/dest access flags for copies */
1651 NIR_INTRINSIC_SRC_ACCESS,
1652 NIR_INTRINSIC_DST_ACCESS,
1653
1654 /* Driver location for nir_load_patch_location_ir3 */
1655 NIR_INTRINSIC_DRIVER_LOCATION,
1656
1657 /**
1658 * Mask of nir_memory_semantics, includes ordering and visibility.
1659 */
1660 NIR_INTRINSIC_MEMORY_SEMANTICS,
1661
1662 /**
1663 * Mask of nir_variable_modes affected by the memory operation.
1664 */
1665 NIR_INTRINSIC_MEMORY_MODES,
1666
1667 /**
1668 * Value of nir_scope.
1669 */
1670 NIR_INTRINSIC_MEMORY_SCOPE,
1671
1672 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1673
1674 } nir_intrinsic_index_flag;
1675
1676 #define NIR_INTRINSIC_MAX_INPUTS 5
1677
1678 typedef struct {
1679 const char *name;
1680
1681 unsigned num_srcs; /** < number of register/SSA inputs */
1682
1683 /** number of components of each input register
1684 *
1685 * If this value is 0, the number of components is given by the
1686 * num_components field of nir_intrinsic_instr. If this value is -1, the
1687 * intrinsic consumes however many components are provided and it is not
1688 * validated at all.
1689 */
1690 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1691
1692 bool has_dest;
1693
1694 /** number of components of the output register
1695 *
1696 * If this value is 0, the number of components is given by the
1697 * num_components field of nir_intrinsic_instr.
1698 */
1699 unsigned dest_components;
1700
1701 /** bitfield of legal bit sizes */
1702 unsigned dest_bit_sizes;
1703
1704 /** the number of constant indices used by the intrinsic */
1705 unsigned num_indices;
1706
1707 /** indicates the usage of intr->const_index[n] */
1708 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1709
1710 /** semantic flags for calls to this intrinsic */
1711 nir_intrinsic_semantic_flag flags;
1712 } nir_intrinsic_info;
1713
1714 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1715
1716 static inline unsigned
1717 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1718 {
1719 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1720 assert(srcn < info->num_srcs);
1721 if (info->src_components[srcn] > 0)
1722 return info->src_components[srcn];
1723 else if (info->src_components[srcn] == 0)
1724 return intr->num_components;
1725 else
1726 return nir_src_num_components(intr->src[srcn]);
1727 }
1728
1729 static inline unsigned
1730 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1731 {
1732 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1733 if (!info->has_dest)
1734 return 0;
1735 else if (info->dest_components)
1736 return info->dest_components;
1737 else
1738 return intr->num_components;
1739 }
1740
1741 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1742 static inline type \
1743 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1744 { \
1745 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1746 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1747 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1748 } \
1749 static inline void \
1750 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1751 { \
1752 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1753 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1754 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1755 }
1756
1757 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1758 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1759 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1760 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1761 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1762 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1763 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1764 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1765 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1766 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1767 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1768 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1769 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1770 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1771 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1772 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1773 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1774 INTRINSIC_IDX_ACCESSORS(format, FORMAT, enum pipe_format)
1775 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1776 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1777 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1778 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1779 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1780 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1781 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1782 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1783 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1784
1785 static inline void
1786 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1787 unsigned align_mul, unsigned align_offset)
1788 {
1789 assert(util_is_power_of_two_nonzero(align_mul));
1790 assert(align_offset < align_mul);
1791 nir_intrinsic_set_align_mul(intrin, align_mul);
1792 nir_intrinsic_set_align_offset(intrin, align_offset);
1793 }
1794
1795 /** Returns a simple alignment for a load/store intrinsic offset
1796 *
1797 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1798 * and ALIGN_OFFSET parameters, this helper takes both into account and
1799 * provides a single simple alignment parameter. The offset X is guaranteed
1800 * to satisfy X % align == 0.
1801 */
1802 static inline unsigned
1803 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1804 {
1805 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1806 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1807 assert(align_offset < align_mul);
1808 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1809 }
1810
1811 unsigned
1812 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr);
1813
1814 /* Converts a image_deref_* intrinsic into a image_* one */
1815 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1816 nir_ssa_def *handle, bool bindless);
1817
1818 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1819 static inline bool
1820 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1821 {
1822 if (instr->intrinsic == nir_intrinsic_load_deref ||
1823 instr->intrinsic == nir_intrinsic_load_ssbo ||
1824 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1825 instr->intrinsic == nir_intrinsic_image_deref_load ||
1826 instr->intrinsic == nir_intrinsic_image_load) {
1827 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1828 } else {
1829 const nir_intrinsic_info *info =
1830 &nir_intrinsic_infos[instr->intrinsic];
1831 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1832 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1833 }
1834 }
1835
1836 /**
1837 * \group texture information
1838 *
1839 * This gives semantic information about textures which is useful to the
1840 * frontend, the backend, and lowering passes, but not the optimizer.
1841 */
1842
1843 typedef enum {
1844 nir_tex_src_coord,
1845 nir_tex_src_projector,
1846 nir_tex_src_comparator, /* shadow comparator */
1847 nir_tex_src_offset,
1848 nir_tex_src_bias,
1849 nir_tex_src_lod,
1850 nir_tex_src_min_lod,
1851 nir_tex_src_ms_index, /* MSAA sample index */
1852 nir_tex_src_ms_mcs, /* MSAA compression value */
1853 nir_tex_src_ddx,
1854 nir_tex_src_ddy,
1855 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1856 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1857 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1858 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1859 nir_tex_src_texture_handle, /* < bindless texture handle */
1860 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1861 nir_tex_src_plane, /* < selects plane for planar textures */
1862 nir_num_tex_src_types
1863 } nir_tex_src_type;
1864
1865 typedef struct {
1866 nir_src src;
1867 nir_tex_src_type src_type;
1868 } nir_tex_src;
1869
1870 typedef enum {
1871 nir_texop_tex, /**< Regular texture look-up */
1872 nir_texop_txb, /**< Texture look-up with LOD bias */
1873 nir_texop_txl, /**< Texture look-up with explicit LOD */
1874 nir_texop_txd, /**< Texture look-up with partial derivatives */
1875 nir_texop_txf, /**< Texel fetch with explicit LOD */
1876 nir_texop_txf_ms, /**< Multisample texture fetch */
1877 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1878 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1879 nir_texop_txs, /**< Texture size */
1880 nir_texop_lod, /**< Texture lod query */
1881 nir_texop_tg4, /**< Texture gather */
1882 nir_texop_query_levels, /**< Texture levels query */
1883 nir_texop_texture_samples, /**< Texture samples query */
1884 nir_texop_samples_identical, /**< Query whether all samples are definitely
1885 * identical.
1886 */
1887 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1888 nir_texop_fragment_fetch, /**< Multisample fragment color texture fetch */
1889 nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
1890 } nir_texop;
1891
1892 typedef struct {
1893 nir_instr instr;
1894
1895 enum glsl_sampler_dim sampler_dim;
1896 nir_alu_type dest_type;
1897
1898 nir_texop op;
1899 nir_dest dest;
1900 nir_tex_src *src;
1901 unsigned num_srcs, coord_components;
1902 bool is_array, is_shadow;
1903
1904 /**
1905 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1906 * components or the new-style shadow that outputs 1 component.
1907 */
1908 bool is_new_style_shadow;
1909
1910 /* gather component selector */
1911 unsigned component : 2;
1912
1913 /* gather offsets */
1914 int8_t tg4_offsets[4][2];
1915
1916 /* True if the texture index or handle is not dynamically uniform */
1917 bool texture_non_uniform;
1918
1919 /* True if the sampler index or handle is not dynamically uniform */
1920 bool sampler_non_uniform;
1921
1922 /** The texture index
1923 *
1924 * If this texture instruction has a nir_tex_src_texture_offset source,
1925 * then the texture index is given by texture_index + texture_offset.
1926 */
1927 unsigned texture_index;
1928
1929 /** The sampler index
1930 *
1931 * The following operations do not require a sampler and, as such, this
1932 * field should be ignored:
1933 * - nir_texop_txf
1934 * - nir_texop_txf_ms
1935 * - nir_texop_txs
1936 * - nir_texop_lod
1937 * - nir_texop_query_levels
1938 * - nir_texop_texture_samples
1939 * - nir_texop_samples_identical
1940 *
1941 * If this texture instruction has a nir_tex_src_sampler_offset source,
1942 * then the sampler index is given by sampler_index + sampler_offset.
1943 */
1944 unsigned sampler_index;
1945 } nir_tex_instr;
1946
1947 static inline unsigned
1948 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1949 {
1950 switch (instr->op) {
1951 case nir_texop_txs: {
1952 unsigned ret;
1953 switch (instr->sampler_dim) {
1954 case GLSL_SAMPLER_DIM_1D:
1955 case GLSL_SAMPLER_DIM_BUF:
1956 ret = 1;
1957 break;
1958 case GLSL_SAMPLER_DIM_2D:
1959 case GLSL_SAMPLER_DIM_CUBE:
1960 case GLSL_SAMPLER_DIM_MS:
1961 case GLSL_SAMPLER_DIM_RECT:
1962 case GLSL_SAMPLER_DIM_EXTERNAL:
1963 case GLSL_SAMPLER_DIM_SUBPASS:
1964 ret = 2;
1965 break;
1966 case GLSL_SAMPLER_DIM_3D:
1967 ret = 3;
1968 break;
1969 default:
1970 unreachable("not reached");
1971 }
1972 if (instr->is_array)
1973 ret++;
1974 return ret;
1975 }
1976
1977 case nir_texop_lod:
1978 return 2;
1979
1980 case nir_texop_texture_samples:
1981 case nir_texop_query_levels:
1982 case nir_texop_samples_identical:
1983 case nir_texop_fragment_mask_fetch:
1984 return 1;
1985
1986 default:
1987 if (instr->is_shadow && instr->is_new_style_shadow)
1988 return 1;
1989
1990 return 4;
1991 }
1992 }
1993
1994 /* Returns true if this texture operation queries something about the texture
1995 * rather than actually sampling it.
1996 */
1997 static inline bool
1998 nir_tex_instr_is_query(const nir_tex_instr *instr)
1999 {
2000 switch (instr->op) {
2001 case nir_texop_txs:
2002 case nir_texop_lod:
2003 case nir_texop_texture_samples:
2004 case nir_texop_query_levels:
2005 case nir_texop_txf_ms_mcs:
2006 return true;
2007 case nir_texop_tex:
2008 case nir_texop_txb:
2009 case nir_texop_txl:
2010 case nir_texop_txd:
2011 case nir_texop_txf:
2012 case nir_texop_txf_ms:
2013 case nir_texop_txf_ms_fb:
2014 case nir_texop_tg4:
2015 return false;
2016 default:
2017 unreachable("Invalid texture opcode");
2018 }
2019 }
2020
2021 static inline bool
2022 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
2023 {
2024 switch (instr->op) {
2025 case nir_texop_tex:
2026 case nir_texop_txb:
2027 case nir_texop_lod:
2028 return true;
2029 default:
2030 return false;
2031 }
2032 }
2033
2034 static inline nir_alu_type
2035 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
2036 {
2037 switch (instr->src[src].src_type) {
2038 case nir_tex_src_coord:
2039 switch (instr->op) {
2040 case nir_texop_txf:
2041 case nir_texop_txf_ms:
2042 case nir_texop_txf_ms_fb:
2043 case nir_texop_txf_ms_mcs:
2044 case nir_texop_samples_identical:
2045 return nir_type_int;
2046
2047 default:
2048 return nir_type_float;
2049 }
2050
2051 case nir_tex_src_lod:
2052 switch (instr->op) {
2053 case nir_texop_txs:
2054 case nir_texop_txf:
2055 return nir_type_int;
2056
2057 default:
2058 return nir_type_float;
2059 }
2060
2061 case nir_tex_src_projector:
2062 case nir_tex_src_comparator:
2063 case nir_tex_src_bias:
2064 case nir_tex_src_min_lod:
2065 case nir_tex_src_ddx:
2066 case nir_tex_src_ddy:
2067 return nir_type_float;
2068
2069 case nir_tex_src_offset:
2070 case nir_tex_src_ms_index:
2071 case nir_tex_src_plane:
2072 return nir_type_int;
2073
2074 case nir_tex_src_ms_mcs:
2075 case nir_tex_src_texture_deref:
2076 case nir_tex_src_sampler_deref:
2077 case nir_tex_src_texture_offset:
2078 case nir_tex_src_sampler_offset:
2079 case nir_tex_src_texture_handle:
2080 case nir_tex_src_sampler_handle:
2081 return nir_type_uint;
2082
2083 case nir_num_tex_src_types:
2084 unreachable("nir_num_tex_src_types is not a valid source type");
2085 }
2086
2087 unreachable("Invalid texture source type");
2088 }
2089
2090 static inline unsigned
2091 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
2092 {
2093 if (instr->src[src].src_type == nir_tex_src_coord)
2094 return instr->coord_components;
2095
2096 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
2097 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
2098 return 4;
2099
2100 if (instr->src[src].src_type == nir_tex_src_ddx ||
2101 instr->src[src].src_type == nir_tex_src_ddy) {
2102 if (instr->is_array)
2103 return instr->coord_components - 1;
2104 else
2105 return instr->coord_components;
2106 }
2107
2108 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2109 * the offset, since a cube maps to a single face.
2110 */
2111 if (instr->src[src].src_type == nir_tex_src_offset) {
2112 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2113 return 2;
2114 else if (instr->is_array)
2115 return instr->coord_components - 1;
2116 else
2117 return instr->coord_components;
2118 }
2119
2120 return 1;
2121 }
2122
2123 static inline int
2124 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2125 {
2126 for (unsigned i = 0; i < instr->num_srcs; i++)
2127 if (instr->src[i].src_type == type)
2128 return (int) i;
2129
2130 return -1;
2131 }
2132
2133 void nir_tex_instr_add_src(nir_tex_instr *tex,
2134 nir_tex_src_type src_type,
2135 nir_src src);
2136
2137 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2138
2139 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2140
2141 typedef struct {
2142 nir_instr instr;
2143
2144 nir_ssa_def def;
2145
2146 nir_const_value value[];
2147 } nir_load_const_instr;
2148
2149 typedef enum {
2150 nir_jump_return,
2151 nir_jump_break,
2152 nir_jump_continue,
2153 } nir_jump_type;
2154
2155 typedef struct {
2156 nir_instr instr;
2157 nir_jump_type type;
2158 } nir_jump_instr;
2159
2160 /* creates a new SSA variable in an undefined state */
2161
2162 typedef struct {
2163 nir_instr instr;
2164 nir_ssa_def def;
2165 } nir_ssa_undef_instr;
2166
2167 typedef struct {
2168 struct exec_node node;
2169
2170 /* The predecessor block corresponding to this source */
2171 struct nir_block *pred;
2172
2173 nir_src src;
2174 } nir_phi_src;
2175
2176 #define nir_foreach_phi_src(phi_src, phi) \
2177 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2178 #define nir_foreach_phi_src_safe(phi_src, phi) \
2179 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2180
2181 typedef struct {
2182 nir_instr instr;
2183
2184 struct exec_list srcs; /** < list of nir_phi_src */
2185
2186 nir_dest dest;
2187 } nir_phi_instr;
2188
2189 typedef struct {
2190 struct exec_node node;
2191 nir_src src;
2192 nir_dest dest;
2193 } nir_parallel_copy_entry;
2194
2195 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2196 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2197
2198 typedef struct {
2199 nir_instr instr;
2200
2201 /* A list of nir_parallel_copy_entrys. The sources of all of the
2202 * entries are copied to the corresponding destinations "in parallel".
2203 * In other words, if we have two entries: a -> b and b -> a, the values
2204 * get swapped.
2205 */
2206 struct exec_list entries;
2207 } nir_parallel_copy_instr;
2208
2209 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2210 type, nir_instr_type_alu)
2211 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2212 type, nir_instr_type_deref)
2213 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2214 type, nir_instr_type_call)
2215 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2216 type, nir_instr_type_jump)
2217 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2218 type, nir_instr_type_tex)
2219 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2220 type, nir_instr_type_intrinsic)
2221 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2222 type, nir_instr_type_load_const)
2223 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2224 type, nir_instr_type_ssa_undef)
2225 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2226 type, nir_instr_type_phi)
2227 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2228 nir_parallel_copy_instr, instr,
2229 type, nir_instr_type_parallel_copy)
2230
2231
2232 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2233 static inline type \
2234 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2235 { \
2236 assert(nir_src_is_const(src)); \
2237 nir_load_const_instr *load = \
2238 nir_instr_as_load_const(src.ssa->parent_instr); \
2239 assert(comp < load->def.num_components); \
2240 return nir_const_value_as_##suffix(load->value[comp], \
2241 load->def.bit_size); \
2242 } \
2243 \
2244 static inline type \
2245 nir_src_as_##suffix(nir_src src) \
2246 { \
2247 assert(nir_src_num_components(src) == 1); \
2248 return nir_src_comp_as_##suffix(src, 0); \
2249 }
2250
2251 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2252 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2253 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2254 NIR_DEFINE_SRC_AS_CONST(double, float)
2255
2256 #undef NIR_DEFINE_SRC_AS_CONST
2257
2258
2259 typedef struct {
2260 nir_ssa_def *def;
2261 unsigned comp;
2262 } nir_ssa_scalar;
2263
2264 static inline bool
2265 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2266 {
2267 return s.def->parent_instr->type == nir_instr_type_load_const;
2268 }
2269
2270 static inline nir_const_value
2271 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2272 {
2273 assert(s.comp < s.def->num_components);
2274 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2275 return load->value[s.comp];
2276 }
2277
2278 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2279 static inline type \
2280 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2281 { \
2282 return nir_const_value_as_##suffix( \
2283 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2284 }
2285
2286 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2287 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2288 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2289 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2290
2291 #undef NIR_DEFINE_SCALAR_AS_CONST
2292
2293 static inline bool
2294 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2295 {
2296 return s.def->parent_instr->type == nir_instr_type_alu;
2297 }
2298
2299 static inline nir_op
2300 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2301 {
2302 return nir_instr_as_alu(s.def->parent_instr)->op;
2303 }
2304
2305 static inline nir_ssa_scalar
2306 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2307 {
2308 nir_ssa_scalar out = { NULL, 0 };
2309
2310 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2311 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2312
2313 /* Our component must be written */
2314 assert(s.comp < s.def->num_components);
2315 assert(alu->dest.write_mask & (1u << s.comp));
2316
2317 assert(alu->src[alu_src_idx].src.is_ssa);
2318 out.def = alu->src[alu_src_idx].src.ssa;
2319
2320 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2321 /* The ALU src is unsized so the source component follows the
2322 * destination component.
2323 */
2324 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2325 } else {
2326 /* This is a sized source so all source components work together to
2327 * produce all the destination components. Since we need to return a
2328 * scalar, this only works if the source is a scalar.
2329 */
2330 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2331 out.comp = alu->src[alu_src_idx].swizzle[0];
2332 }
2333 assert(out.comp < out.def->num_components);
2334
2335 return out;
2336 }
2337
2338
2339 /*
2340 * Control flow
2341 *
2342 * Control flow consists of a tree of control flow nodes, which include
2343 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2344 * instructions that always run start-to-finish. Each basic block also keeps
2345 * track of its successors (blocks which may run immediately after the current
2346 * block) and predecessors (blocks which could have run immediately before the
2347 * current block). Each function also has a start block and an end block which
2348 * all return statements point to (which is always empty). Together, all the
2349 * blocks with their predecessors and successors make up the control flow
2350 * graph (CFG) of the function. There are helpers that modify the tree of
2351 * control flow nodes while modifying the CFG appropriately; these should be
2352 * used instead of modifying the tree directly.
2353 */
2354
2355 typedef enum {
2356 nir_cf_node_block,
2357 nir_cf_node_if,
2358 nir_cf_node_loop,
2359 nir_cf_node_function
2360 } nir_cf_node_type;
2361
2362 typedef struct nir_cf_node {
2363 struct exec_node node;
2364 nir_cf_node_type type;
2365 struct nir_cf_node *parent;
2366 } nir_cf_node;
2367
2368 typedef struct nir_block {
2369 nir_cf_node cf_node;
2370
2371 struct exec_list instr_list; /** < list of nir_instr */
2372
2373 /** generic block index; generated by nir_index_blocks */
2374 unsigned index;
2375
2376 /*
2377 * Each block can only have up to 2 successors, so we put them in a simple
2378 * array - no need for anything more complicated.
2379 */
2380 struct nir_block *successors[2];
2381
2382 /* Set of nir_block predecessors in the CFG */
2383 struct set *predecessors;
2384
2385 /*
2386 * this node's immediate dominator in the dominance tree - set to NULL for
2387 * the start block.
2388 */
2389 struct nir_block *imm_dom;
2390
2391 /* This node's children in the dominance tree */
2392 unsigned num_dom_children;
2393 struct nir_block **dom_children;
2394
2395 /* Set of nir_blocks on the dominance frontier of this block */
2396 struct set *dom_frontier;
2397
2398 /*
2399 * These two indices have the property that dom_{pre,post}_index for each
2400 * child of this block in the dominance tree will always be between
2401 * dom_pre_index and dom_post_index for this block, which makes testing if
2402 * a given block is dominated by another block an O(1) operation.
2403 */
2404 unsigned dom_pre_index, dom_post_index;
2405
2406 /* live in and out for this block; used for liveness analysis */
2407 BITSET_WORD *live_in;
2408 BITSET_WORD *live_out;
2409 } nir_block;
2410
2411 static inline nir_instr *
2412 nir_block_first_instr(nir_block *block)
2413 {
2414 struct exec_node *head = exec_list_get_head(&block->instr_list);
2415 return exec_node_data(nir_instr, head, node);
2416 }
2417
2418 static inline nir_instr *
2419 nir_block_last_instr(nir_block *block)
2420 {
2421 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2422 return exec_node_data(nir_instr, tail, node);
2423 }
2424
2425 static inline bool
2426 nir_block_ends_in_jump(nir_block *block)
2427 {
2428 return !exec_list_is_empty(&block->instr_list) &&
2429 nir_block_last_instr(block)->type == nir_instr_type_jump;
2430 }
2431
2432 #define nir_foreach_instr(instr, block) \
2433 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2434 #define nir_foreach_instr_reverse(instr, block) \
2435 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2436 #define nir_foreach_instr_safe(instr, block) \
2437 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2438 #define nir_foreach_instr_reverse_safe(instr, block) \
2439 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2440
2441 typedef enum {
2442 nir_selection_control_none = 0x0,
2443 nir_selection_control_flatten = 0x1,
2444 nir_selection_control_dont_flatten = 0x2,
2445 } nir_selection_control;
2446
2447 typedef struct nir_if {
2448 nir_cf_node cf_node;
2449 nir_src condition;
2450 nir_selection_control control;
2451
2452 struct exec_list then_list; /** < list of nir_cf_node */
2453 struct exec_list else_list; /** < list of nir_cf_node */
2454 } nir_if;
2455
2456 typedef struct {
2457 nir_if *nif;
2458
2459 /** Instruction that generates nif::condition. */
2460 nir_instr *conditional_instr;
2461
2462 /** Block within ::nif that has the break instruction. */
2463 nir_block *break_block;
2464
2465 /** Last block for the then- or else-path that does not contain the break. */
2466 nir_block *continue_from_block;
2467
2468 /** True when ::break_block is in the else-path of ::nif. */
2469 bool continue_from_then;
2470 bool induction_rhs;
2471
2472 /* This is true if the terminators exact trip count is unknown. For
2473 * example:
2474 *
2475 * for (int i = 0; i < imin(x, 4); i++)
2476 * ...
2477 *
2478 * Here loop analysis would have set a max_trip_count of 4 however we dont
2479 * know for sure that this is the exact trip count.
2480 */
2481 bool exact_trip_count_unknown;
2482
2483 struct list_head loop_terminator_link;
2484 } nir_loop_terminator;
2485
2486 typedef struct {
2487 /* Estimated cost (in number of instructions) of the loop */
2488 unsigned instr_cost;
2489
2490 /* Guessed trip count based on array indexing */
2491 unsigned guessed_trip_count;
2492
2493 /* Maximum number of times the loop is run (if known) */
2494 unsigned max_trip_count;
2495
2496 /* Do we know the exact number of times the loop will be run */
2497 bool exact_trip_count_known;
2498
2499 /* Unroll the loop regardless of its size */
2500 bool force_unroll;
2501
2502 /* Does the loop contain complex loop terminators, continues or other
2503 * complex behaviours? If this is true we can't rely on
2504 * loop_terminator_list to be complete or accurate.
2505 */
2506 bool complex_loop;
2507
2508 nir_loop_terminator *limiting_terminator;
2509
2510 /* A list of loop_terminators terminating this loop. */
2511 struct list_head loop_terminator_list;
2512 } nir_loop_info;
2513
2514 typedef enum {
2515 nir_loop_control_none = 0x0,
2516 nir_loop_control_unroll = 0x1,
2517 nir_loop_control_dont_unroll = 0x2,
2518 } nir_loop_control;
2519
2520 typedef struct {
2521 nir_cf_node cf_node;
2522
2523 struct exec_list body; /** < list of nir_cf_node */
2524
2525 nir_loop_info *info;
2526 nir_loop_control control;
2527 bool partially_unrolled;
2528 } nir_loop;
2529
2530 /**
2531 * Various bits of metadata that can may be created or required by
2532 * optimization and analysis passes
2533 */
2534 typedef enum {
2535 nir_metadata_none = 0x0,
2536 nir_metadata_block_index = 0x1,
2537 nir_metadata_dominance = 0x2,
2538 nir_metadata_live_ssa_defs = 0x4,
2539 nir_metadata_not_properly_reset = 0x8,
2540 nir_metadata_loop_analysis = 0x10,
2541 } nir_metadata;
2542
2543 typedef struct {
2544 nir_cf_node cf_node;
2545
2546 /** pointer to the function of which this is an implementation */
2547 struct nir_function *function;
2548
2549 struct exec_list body; /** < list of nir_cf_node */
2550
2551 nir_block *end_block;
2552
2553 /** list for all local variables in the function */
2554 struct exec_list locals;
2555
2556 /** list of local registers in the function */
2557 struct exec_list registers;
2558
2559 /** next available local register index */
2560 unsigned reg_alloc;
2561
2562 /** next available SSA value index */
2563 unsigned ssa_alloc;
2564
2565 /* total number of basic blocks, only valid when block_index_dirty = false */
2566 unsigned num_blocks;
2567
2568 nir_metadata valid_metadata;
2569 } nir_function_impl;
2570
2571 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2572 nir_start_block(nir_function_impl *impl)
2573 {
2574 return (nir_block *) impl->body.head_sentinel.next;
2575 }
2576
2577 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2578 nir_impl_last_block(nir_function_impl *impl)
2579 {
2580 return (nir_block *) impl->body.tail_sentinel.prev;
2581 }
2582
2583 static inline nir_cf_node *
2584 nir_cf_node_next(nir_cf_node *node)
2585 {
2586 struct exec_node *next = exec_node_get_next(&node->node);
2587 if (exec_node_is_tail_sentinel(next))
2588 return NULL;
2589 else
2590 return exec_node_data(nir_cf_node, next, node);
2591 }
2592
2593 static inline nir_cf_node *
2594 nir_cf_node_prev(nir_cf_node *node)
2595 {
2596 struct exec_node *prev = exec_node_get_prev(&node->node);
2597 if (exec_node_is_head_sentinel(prev))
2598 return NULL;
2599 else
2600 return exec_node_data(nir_cf_node, prev, node);
2601 }
2602
2603 static inline bool
2604 nir_cf_node_is_first(const nir_cf_node *node)
2605 {
2606 return exec_node_is_head_sentinel(node->node.prev);
2607 }
2608
2609 static inline bool
2610 nir_cf_node_is_last(const nir_cf_node *node)
2611 {
2612 return exec_node_is_tail_sentinel(node->node.next);
2613 }
2614
2615 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2616 type, nir_cf_node_block)
2617 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2618 type, nir_cf_node_if)
2619 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2620 type, nir_cf_node_loop)
2621 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2622 nir_function_impl, cf_node, type, nir_cf_node_function)
2623
2624 static inline nir_block *
2625 nir_if_first_then_block(nir_if *if_stmt)
2626 {
2627 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2628 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2629 }
2630
2631 static inline nir_block *
2632 nir_if_last_then_block(nir_if *if_stmt)
2633 {
2634 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2635 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2636 }
2637
2638 static inline nir_block *
2639 nir_if_first_else_block(nir_if *if_stmt)
2640 {
2641 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2642 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2643 }
2644
2645 static inline nir_block *
2646 nir_if_last_else_block(nir_if *if_stmt)
2647 {
2648 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2649 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2650 }
2651
2652 static inline nir_block *
2653 nir_loop_first_block(nir_loop *loop)
2654 {
2655 struct exec_node *head = exec_list_get_head(&loop->body);
2656 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2657 }
2658
2659 static inline nir_block *
2660 nir_loop_last_block(nir_loop *loop)
2661 {
2662 struct exec_node *tail = exec_list_get_tail(&loop->body);
2663 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2664 }
2665
2666 /**
2667 * Return true if this list of cf_nodes contains a single empty block.
2668 */
2669 static inline bool
2670 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2671 {
2672 if (exec_list_is_singular(cf_list)) {
2673 struct exec_node *head = exec_list_get_head(cf_list);
2674 nir_block *block =
2675 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2676 return exec_list_is_empty(&block->instr_list);
2677 }
2678 return false;
2679 }
2680
2681 typedef struct {
2682 uint8_t num_components;
2683 uint8_t bit_size;
2684 } nir_parameter;
2685
2686 typedef struct nir_function {
2687 struct exec_node node;
2688
2689 const char *name;
2690 struct nir_shader *shader;
2691
2692 unsigned num_params;
2693 nir_parameter *params;
2694
2695 /** The implementation of this function.
2696 *
2697 * If the function is only declared and not implemented, this is NULL.
2698 */
2699 nir_function_impl *impl;
2700
2701 bool is_entrypoint;
2702 } nir_function;
2703
2704 typedef enum {
2705 nir_lower_imul64 = (1 << 0),
2706 nir_lower_isign64 = (1 << 1),
2707 /** Lower all int64 modulus and division opcodes */
2708 nir_lower_divmod64 = (1 << 2),
2709 /** Lower all 64-bit umul_high and imul_high opcodes */
2710 nir_lower_imul_high64 = (1 << 3),
2711 nir_lower_mov64 = (1 << 4),
2712 nir_lower_icmp64 = (1 << 5),
2713 nir_lower_iadd64 = (1 << 6),
2714 nir_lower_iabs64 = (1 << 7),
2715 nir_lower_ineg64 = (1 << 8),
2716 nir_lower_logic64 = (1 << 9),
2717 nir_lower_minmax64 = (1 << 10),
2718 nir_lower_shift64 = (1 << 11),
2719 nir_lower_imul_2x32_64 = (1 << 12),
2720 nir_lower_extract64 = (1 << 13),
2721 nir_lower_ufind_msb64 = (1 << 14),
2722 } nir_lower_int64_options;
2723
2724 typedef enum {
2725 nir_lower_drcp = (1 << 0),
2726 nir_lower_dsqrt = (1 << 1),
2727 nir_lower_drsq = (1 << 2),
2728 nir_lower_dtrunc = (1 << 3),
2729 nir_lower_dfloor = (1 << 4),
2730 nir_lower_dceil = (1 << 5),
2731 nir_lower_dfract = (1 << 6),
2732 nir_lower_dround_even = (1 << 7),
2733 nir_lower_dmod = (1 << 8),
2734 nir_lower_dsub = (1 << 9),
2735 nir_lower_ddiv = (1 << 10),
2736 nir_lower_fp64_full_software = (1 << 11),
2737 } nir_lower_doubles_options;
2738
2739 typedef enum {
2740 nir_divergence_single_prim_per_subgroup = (1 << 0),
2741 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2742 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2743 nir_divergence_view_index_uniform = (1 << 3),
2744 } nir_divergence_options;
2745
2746 typedef struct nir_shader_compiler_options {
2747 bool lower_fdiv;
2748 bool lower_ffma;
2749 bool fuse_ffma;
2750 bool lower_flrp16;
2751 bool lower_flrp32;
2752 /** Lowers flrp when it does not support doubles */
2753 bool lower_flrp64;
2754 bool lower_fpow;
2755 bool lower_fsat;
2756 bool lower_fsqrt;
2757 bool lower_sincos;
2758 bool lower_fmod;
2759 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2760 bool lower_bitfield_extract;
2761 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2762 bool lower_bitfield_extract_to_shifts;
2763 /** Lowers bitfield_insert to bfi/bfm */
2764 bool lower_bitfield_insert;
2765 /** Lowers bitfield_insert to compares, and shifts. */
2766 bool lower_bitfield_insert_to_shifts;
2767 /** Lowers bitfield_insert to bfm/bitfield_select. */
2768 bool lower_bitfield_insert_to_bitfield_select;
2769 /** Lowers bitfield_reverse to shifts. */
2770 bool lower_bitfield_reverse;
2771 /** Lowers bit_count to shifts. */
2772 bool lower_bit_count;
2773 /** Lowers ifind_msb to compare and ufind_msb */
2774 bool lower_ifind_msb;
2775 /** Lowers find_lsb to ufind_msb and logic ops */
2776 bool lower_find_lsb;
2777 bool lower_uadd_carry;
2778 bool lower_usub_borrow;
2779 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2780 bool lower_mul_high;
2781 /** lowers fneg and ineg to fsub and isub. */
2782 bool lower_negate;
2783 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2784 bool lower_sub;
2785
2786 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2787 bool lower_scmp;
2788
2789 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2790 bool lower_vector_cmp;
2791
2792 /** enables rules to lower idiv by power-of-two: */
2793 bool lower_idiv;
2794
2795 /** enable rules to avoid bit ops */
2796 bool lower_bitops;
2797
2798 /** enables rules to lower isign to imin+imax */
2799 bool lower_isign;
2800
2801 /** enables rules to lower fsign to fsub and flt */
2802 bool lower_fsign;
2803
2804 /* lower fdph to fdot4 */
2805 bool lower_fdph;
2806
2807 /** lower fdot to fmul and fsum/fadd. */
2808 bool lower_fdot;
2809
2810 /* Does the native fdot instruction replicate its result for four
2811 * components? If so, then opt_algebraic_late will turn all fdotN
2812 * instructions into fdot_replicatedN instructions.
2813 */
2814 bool fdot_replicates;
2815
2816 /** lowers ffloor to fsub+ffract: */
2817 bool lower_ffloor;
2818
2819 /** lowers ffract to fsub+ffloor: */
2820 bool lower_ffract;
2821
2822 /** lowers fceil to fneg+ffloor+fneg: */
2823 bool lower_fceil;
2824
2825 bool lower_ftrunc;
2826
2827 bool lower_ldexp;
2828
2829 bool lower_pack_half_2x16;
2830 bool lower_pack_half_2x16_split;
2831 bool lower_pack_unorm_2x16;
2832 bool lower_pack_snorm_2x16;
2833 bool lower_pack_unorm_4x8;
2834 bool lower_pack_snorm_4x8;
2835 bool lower_unpack_half_2x16;
2836 bool lower_unpack_half_2x16_split;
2837 bool lower_unpack_unorm_2x16;
2838 bool lower_unpack_snorm_2x16;
2839 bool lower_unpack_unorm_4x8;
2840 bool lower_unpack_snorm_4x8;
2841
2842 bool lower_extract_byte;
2843 bool lower_extract_word;
2844
2845 bool lower_all_io_to_temps;
2846 bool lower_all_io_to_elements;
2847
2848 /* Indicates that the driver only has zero-based vertex id */
2849 bool vertex_id_zero_based;
2850
2851 /**
2852 * If enabled, gl_BaseVertex will be lowered as:
2853 * is_indexed_draw (~0/0) & firstvertex
2854 */
2855 bool lower_base_vertex;
2856
2857 /**
2858 * If enabled, gl_HelperInvocation will be lowered as:
2859 *
2860 * !((1 << sample_id) & sample_mask_in))
2861 *
2862 * This depends on some possibly hw implementation details, which may
2863 * not be true for all hw. In particular that the FS is only executed
2864 * for covered samples or for helper invocations. So, do not blindly
2865 * enable this option.
2866 *
2867 * Note: See also issue #22 in ARB_shader_image_load_store
2868 */
2869 bool lower_helper_invocation;
2870
2871 /**
2872 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2873 *
2874 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2875 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2876 */
2877 bool optimize_sample_mask_in;
2878
2879 bool lower_cs_local_index_from_id;
2880 bool lower_cs_local_id_from_index;
2881
2882 bool lower_device_index_to_zero;
2883
2884 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2885 bool lower_wpos_pntc;
2886
2887 /**
2888 * Set if nir_op_[iu]hadd and nir_op_[iu]rhadd instructions should be
2889 * lowered to simple arithmetic.
2890 *
2891 * If this flag is set, the lowering will be applied to all bit-sizes of
2892 * these instructions.
2893 *
2894 * \sa ::lower_hadd64
2895 */
2896 bool lower_hadd;
2897
2898 /**
2899 * Set if only 64-bit nir_op_[iu]hadd and nir_op_[iu]rhadd instructions
2900 * should be lowered to simple arithmetic.
2901 *
2902 * If this flag is set, the lowering will be applied to only 64-bit
2903 * versions of these instructions.
2904 *
2905 * \sa ::lower_hadd
2906 */
2907 bool lower_hadd64;
2908
2909 /**
2910 * Set if nir_op_add_sat and nir_op_usub_sat should be lowered to simple
2911 * arithmetic.
2912 *
2913 * If this flag is set, the lowering will be applied to all bit-sizes of
2914 * these instructions.
2915 *
2916 * \sa ::lower_usub_sat64
2917 */
2918 bool lower_add_sat;
2919
2920 /**
2921 * Set if only 64-bit nir_op_usub_sat should be lowered to simple
2922 * arithmetic.
2923 *
2924 * \sa ::lower_add_sat
2925 */
2926 bool lower_usub_sat64;
2927
2928 /**
2929 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2930 * for IO purposes and would prefer loads/stores be vectorized.
2931 */
2932 bool vectorize_io;
2933 bool lower_to_scalar;
2934
2935 /**
2936 * Should the linker unify inputs_read/outputs_written between adjacent
2937 * shader stages which are linked into a single program?
2938 */
2939 bool unify_interfaces;
2940
2941 /**
2942 * Should nir_lower_io() create load_interpolated_input intrinsics?
2943 *
2944 * If not, it generates regular load_input intrinsics and interpolation
2945 * information must be inferred from the list of input nir_variables.
2946 */
2947 bool use_interpolated_input_intrinsics;
2948
2949 /* Lowers when 32x32->64 bit multiplication is not supported */
2950 bool lower_mul_2x32_64;
2951
2952 /* Lowers when rotate instruction is not supported */
2953 bool lower_rotate;
2954
2955 /**
2956 * Backend supports imul24, and would like to use it (when possible)
2957 * for address/offset calculation. If true, driver should call
2958 * nir_lower_amul(). (If not set, amul will automatically be lowered
2959 * to imul.)
2960 */
2961 bool has_imul24;
2962
2963 /* Whether to generate only scoped_memory_barrier intrinsics instead of the
2964 * set of memory barrier intrinsics based on GLSL.
2965 */
2966 bool use_scoped_memory_barrier;
2967
2968 /**
2969 * Is this the Intel vec4 backend?
2970 *
2971 * Used to inhibit algebraic optimizations that are known to be harmful on
2972 * the Intel vec4 backend. This is generally applicable to any
2973 * optimization that might cause more immediate values to be used in
2974 * 3-source (e.g., ffma and flrp) instructions.
2975 */
2976 bool intel_vec4;
2977
2978 unsigned max_unroll_iterations;
2979
2980 nir_lower_int64_options lower_int64_options;
2981 nir_lower_doubles_options lower_doubles_options;
2982 } nir_shader_compiler_options;
2983
2984 typedef struct nir_shader {
2985 /** list of uniforms (nir_variable) */
2986 struct exec_list uniforms;
2987
2988 /** list of inputs (nir_variable) */
2989 struct exec_list inputs;
2990
2991 /** list of outputs (nir_variable) */
2992 struct exec_list outputs;
2993
2994 /** list of shared compute variables (nir_variable) */
2995 struct exec_list shared;
2996
2997 /** Set of driver-specific options for the shader.
2998 *
2999 * The memory for the options is expected to be kept in a single static
3000 * copy by the driver.
3001 */
3002 const struct nir_shader_compiler_options *options;
3003
3004 /** Various bits of compile-time information about a given shader */
3005 struct shader_info info;
3006
3007 /** list of global variables in the shader (nir_variable) */
3008 struct exec_list globals;
3009
3010 /** list of system value variables in the shader (nir_variable) */
3011 struct exec_list system_values;
3012
3013 struct exec_list functions; /** < list of nir_function */
3014
3015 /**
3016 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
3017 * access plus one
3018 */
3019 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
3020
3021 /** Size in bytes of required scratch space */
3022 unsigned scratch_size;
3023
3024 /** Constant data associated with this shader.
3025 *
3026 * Constant data is loaded through load_constant intrinsics. See also
3027 * nir_opt_large_constants.
3028 */
3029 void *constant_data;
3030 unsigned constant_data_size;
3031 } nir_shader;
3032
3033 #define nir_foreach_function(func, shader) \
3034 foreach_list_typed(nir_function, func, node, &(shader)->functions)
3035
3036 static inline nir_function_impl *
3037 nir_shader_get_entrypoint(nir_shader *shader)
3038 {
3039 nir_function *func = NULL;
3040
3041 nir_foreach_function(function, shader) {
3042 assert(func == NULL);
3043 if (function->is_entrypoint) {
3044 func = function;
3045 #ifndef NDEBUG
3046 break;
3047 #endif
3048 }
3049 }
3050
3051 if (!func)
3052 return NULL;
3053
3054 assert(func->num_params == 0);
3055 assert(func->impl);
3056 return func->impl;
3057 }
3058
3059 nir_shader *nir_shader_create(void *mem_ctx,
3060 gl_shader_stage stage,
3061 const nir_shader_compiler_options *options,
3062 shader_info *si);
3063
3064 nir_register *nir_local_reg_create(nir_function_impl *impl);
3065
3066 void nir_reg_remove(nir_register *reg);
3067
3068 /** Adds a variable to the appropriate list in nir_shader */
3069 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
3070
3071 static inline void
3072 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
3073 {
3074 assert(var->data.mode == nir_var_function_temp);
3075 exec_list_push_tail(&impl->locals, &var->node);
3076 }
3077
3078 /** creates a variable, sets a few defaults, and adds it to the list */
3079 nir_variable *nir_variable_create(nir_shader *shader,
3080 nir_variable_mode mode,
3081 const struct glsl_type *type,
3082 const char *name);
3083 /** creates a local variable and adds it to the list */
3084 nir_variable *nir_local_variable_create(nir_function_impl *impl,
3085 const struct glsl_type *type,
3086 const char *name);
3087
3088 /** creates a function and adds it to the shader's list of functions */
3089 nir_function *nir_function_create(nir_shader *shader, const char *name);
3090
3091 nir_function_impl *nir_function_impl_create(nir_function *func);
3092 /** creates a function_impl that isn't tied to any particular function */
3093 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
3094
3095 nir_block *nir_block_create(nir_shader *shader);
3096 nir_if *nir_if_create(nir_shader *shader);
3097 nir_loop *nir_loop_create(nir_shader *shader);
3098
3099 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
3100
3101 /** requests that the given pieces of metadata be generated */
3102 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
3103 /** dirties all but the preserved metadata */
3104 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
3105
3106 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
3107 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
3108
3109 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
3110 nir_deref_type deref_type);
3111
3112 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
3113
3114 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
3115 unsigned num_components,
3116 unsigned bit_size);
3117
3118 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
3119 nir_intrinsic_op op);
3120
3121 nir_call_instr *nir_call_instr_create(nir_shader *shader,
3122 nir_function *callee);
3123
3124 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
3125
3126 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
3127
3128 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
3129
3130 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
3131 unsigned num_components,
3132 unsigned bit_size);
3133
3134 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
3135
3136 /**
3137 * NIR Cursors and Instruction Insertion API
3138 * @{
3139 *
3140 * A tiny struct representing a point to insert/extract instructions or
3141 * control flow nodes. Helps reduce the combinatorial explosion of possible
3142 * points to insert/extract.
3143 *
3144 * \sa nir_control_flow.h
3145 */
3146 typedef enum {
3147 nir_cursor_before_block,
3148 nir_cursor_after_block,
3149 nir_cursor_before_instr,
3150 nir_cursor_after_instr,
3151 } nir_cursor_option;
3152
3153 typedef struct {
3154 nir_cursor_option option;
3155 union {
3156 nir_block *block;
3157 nir_instr *instr;
3158 };
3159 } nir_cursor;
3160
3161 static inline nir_block *
3162 nir_cursor_current_block(nir_cursor cursor)
3163 {
3164 if (cursor.option == nir_cursor_before_instr ||
3165 cursor.option == nir_cursor_after_instr) {
3166 return cursor.instr->block;
3167 } else {
3168 return cursor.block;
3169 }
3170 }
3171
3172 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3173
3174 static inline nir_cursor
3175 nir_before_block(nir_block *block)
3176 {
3177 nir_cursor cursor;
3178 cursor.option = nir_cursor_before_block;
3179 cursor.block = block;
3180 return cursor;
3181 }
3182
3183 static inline nir_cursor
3184 nir_after_block(nir_block *block)
3185 {
3186 nir_cursor cursor;
3187 cursor.option = nir_cursor_after_block;
3188 cursor.block = block;
3189 return cursor;
3190 }
3191
3192 static inline nir_cursor
3193 nir_before_instr(nir_instr *instr)
3194 {
3195 nir_cursor cursor;
3196 cursor.option = nir_cursor_before_instr;
3197 cursor.instr = instr;
3198 return cursor;
3199 }
3200
3201 static inline nir_cursor
3202 nir_after_instr(nir_instr *instr)
3203 {
3204 nir_cursor cursor;
3205 cursor.option = nir_cursor_after_instr;
3206 cursor.instr = instr;
3207 return cursor;
3208 }
3209
3210 static inline nir_cursor
3211 nir_after_block_before_jump(nir_block *block)
3212 {
3213 nir_instr *last_instr = nir_block_last_instr(block);
3214 if (last_instr && last_instr->type == nir_instr_type_jump) {
3215 return nir_before_instr(last_instr);
3216 } else {
3217 return nir_after_block(block);
3218 }
3219 }
3220
3221 static inline nir_cursor
3222 nir_before_src(nir_src *src, bool is_if_condition)
3223 {
3224 if (is_if_condition) {
3225 nir_block *prev_block =
3226 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3227 assert(!nir_block_ends_in_jump(prev_block));
3228 return nir_after_block(prev_block);
3229 } else if (src->parent_instr->type == nir_instr_type_phi) {
3230 #ifndef NDEBUG
3231 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3232 bool found = false;
3233 nir_foreach_phi_src(phi_src, cond_phi) {
3234 if (phi_src->src.ssa == src->ssa) {
3235 found = true;
3236 break;
3237 }
3238 }
3239 assert(found);
3240 #endif
3241 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3242 * to have a more specific name.
3243 */
3244 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3245 return nir_after_block_before_jump(phi_src->pred);
3246 } else {
3247 return nir_before_instr(src->parent_instr);
3248 }
3249 }
3250
3251 static inline nir_cursor
3252 nir_before_cf_node(nir_cf_node *node)
3253 {
3254 if (node->type == nir_cf_node_block)
3255 return nir_before_block(nir_cf_node_as_block(node));
3256
3257 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3258 }
3259
3260 static inline nir_cursor
3261 nir_after_cf_node(nir_cf_node *node)
3262 {
3263 if (node->type == nir_cf_node_block)
3264 return nir_after_block(nir_cf_node_as_block(node));
3265
3266 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3267 }
3268
3269 static inline nir_cursor
3270 nir_after_phis(nir_block *block)
3271 {
3272 nir_foreach_instr(instr, block) {
3273 if (instr->type != nir_instr_type_phi)
3274 return nir_before_instr(instr);
3275 }
3276 return nir_after_block(block);
3277 }
3278
3279 static inline nir_cursor
3280 nir_after_cf_node_and_phis(nir_cf_node *node)
3281 {
3282 if (node->type == nir_cf_node_block)
3283 return nir_after_block(nir_cf_node_as_block(node));
3284
3285 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3286
3287 return nir_after_phis(block);
3288 }
3289
3290 static inline nir_cursor
3291 nir_before_cf_list(struct exec_list *cf_list)
3292 {
3293 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3294 exec_list_get_head(cf_list), node);
3295 return nir_before_cf_node(first_node);
3296 }
3297
3298 static inline nir_cursor
3299 nir_after_cf_list(struct exec_list *cf_list)
3300 {
3301 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3302 exec_list_get_tail(cf_list), node);
3303 return nir_after_cf_node(last_node);
3304 }
3305
3306 /**
3307 * Insert a NIR instruction at the given cursor.
3308 *
3309 * Note: This does not update the cursor.
3310 */
3311 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3312
3313 static inline void
3314 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3315 {
3316 nir_instr_insert(nir_before_instr(instr), before);
3317 }
3318
3319 static inline void
3320 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3321 {
3322 nir_instr_insert(nir_after_instr(instr), after);
3323 }
3324
3325 static inline void
3326 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3327 {
3328 nir_instr_insert(nir_before_block(block), before);
3329 }
3330
3331 static inline void
3332 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3333 {
3334 nir_instr_insert(nir_after_block(block), after);
3335 }
3336
3337 static inline void
3338 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3339 {
3340 nir_instr_insert(nir_before_cf_node(node), before);
3341 }
3342
3343 static inline void
3344 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3345 {
3346 nir_instr_insert(nir_after_cf_node(node), after);
3347 }
3348
3349 static inline void
3350 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3351 {
3352 nir_instr_insert(nir_before_cf_list(list), before);
3353 }
3354
3355 static inline void
3356 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3357 {
3358 nir_instr_insert(nir_after_cf_list(list), after);
3359 }
3360
3361 void nir_instr_remove_v(nir_instr *instr);
3362
3363 static inline nir_cursor
3364 nir_instr_remove(nir_instr *instr)
3365 {
3366 nir_cursor cursor;
3367 nir_instr *prev = nir_instr_prev(instr);
3368 if (prev) {
3369 cursor = nir_after_instr(prev);
3370 } else {
3371 cursor = nir_before_block(instr->block);
3372 }
3373 nir_instr_remove_v(instr);
3374 return cursor;
3375 }
3376
3377 /** @} */
3378
3379 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3380
3381 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3382 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3383 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3384 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3385 void *state);
3386 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3387 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3388
3389 nir_const_value *nir_src_as_const_value(nir_src src);
3390
3391 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3392 static inline c_type * \
3393 nir_src_as_ ## name (nir_src src) \
3394 { \
3395 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3396 ? cast_macro(src.ssa->parent_instr) : NULL; \
3397 }
3398
3399 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3400 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3401 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3402 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3403
3404 bool nir_src_is_dynamically_uniform(nir_src src);
3405 bool nir_srcs_equal(nir_src src1, nir_src src2);
3406 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3407 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3408 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3409 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3410 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3411 nir_dest new_dest);
3412
3413 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3414 unsigned num_components, unsigned bit_size,
3415 const char *name);
3416 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3417 unsigned num_components, unsigned bit_size,
3418 const char *name);
3419 static inline void
3420 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3421 const struct glsl_type *type,
3422 const char *name)
3423 {
3424 assert(glsl_type_is_vector_or_scalar(type));
3425 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3426 glsl_get_bit_size(type), name);
3427 }
3428 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3429 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3430 nir_instr *after_me);
3431
3432 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3433
3434 /*
3435 * finds the next basic block in source-code order, returns NULL if there is
3436 * none
3437 */
3438
3439 nir_block *nir_block_cf_tree_next(nir_block *block);
3440
3441 /* Performs the opposite of nir_block_cf_tree_next() */
3442
3443 nir_block *nir_block_cf_tree_prev(nir_block *block);
3444
3445 /* Gets the first block in a CF node in source-code order */
3446
3447 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3448
3449 /* Gets the last block in a CF node in source-code order */
3450
3451 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3452
3453 /* Gets the next block after a CF node in source-code order */
3454
3455 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3456
3457 /* Macros for loops that visit blocks in source-code order */
3458
3459 #define nir_foreach_block(block, impl) \
3460 for (nir_block *block = nir_start_block(impl); block != NULL; \
3461 block = nir_block_cf_tree_next(block))
3462
3463 #define nir_foreach_block_safe(block, impl) \
3464 for (nir_block *block = nir_start_block(impl), \
3465 *next = nir_block_cf_tree_next(block); \
3466 block != NULL; \
3467 block = next, next = nir_block_cf_tree_next(block))
3468
3469 #define nir_foreach_block_reverse(block, impl) \
3470 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3471 block = nir_block_cf_tree_prev(block))
3472
3473 #define nir_foreach_block_reverse_safe(block, impl) \
3474 for (nir_block *block = nir_impl_last_block(impl), \
3475 *prev = nir_block_cf_tree_prev(block); \
3476 block != NULL; \
3477 block = prev, prev = nir_block_cf_tree_prev(block))
3478
3479 #define nir_foreach_block_in_cf_node(block, node) \
3480 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3481 block != nir_cf_node_cf_tree_next(node); \
3482 block = nir_block_cf_tree_next(block))
3483
3484 /* If the following CF node is an if, this function returns that if.
3485 * Otherwise, it returns NULL.
3486 */
3487 nir_if *nir_block_get_following_if(nir_block *block);
3488
3489 nir_loop *nir_block_get_following_loop(nir_block *block);
3490
3491 void nir_index_local_regs(nir_function_impl *impl);
3492 void nir_index_ssa_defs(nir_function_impl *impl);
3493 unsigned nir_index_instrs(nir_function_impl *impl);
3494
3495 void nir_index_blocks(nir_function_impl *impl);
3496
3497 void nir_index_vars(nir_shader *shader, nir_function_impl *impl, nir_variable_mode modes);
3498
3499 void nir_print_shader(nir_shader *shader, FILE *fp);
3500 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3501 void nir_print_instr(const nir_instr *instr, FILE *fp);
3502 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3503
3504 /** Shallow clone of a single ALU instruction. */
3505 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3506
3507 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3508 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3509 const nir_function_impl *fi);
3510 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3511 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3512
3513 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3514
3515 void nir_shader_serialize_deserialize(nir_shader *s);
3516
3517 #ifndef NDEBUG
3518 void nir_validate_shader(nir_shader *shader, const char *when);
3519 void nir_metadata_set_validation_flag(nir_shader *shader);
3520 void nir_metadata_check_validation_flag(nir_shader *shader);
3521
3522 static inline bool
3523 should_skip_nir(const char *name)
3524 {
3525 static const char *list = NULL;
3526 if (!list) {
3527 /* Comma separated list of names to skip. */
3528 list = getenv("NIR_SKIP");
3529 if (!list)
3530 list = "";
3531 }
3532
3533 if (!list[0])
3534 return false;
3535
3536 return comma_separated_list_contains(list, name);
3537 }
3538
3539 static inline bool
3540 should_clone_nir(void)
3541 {
3542 static int should_clone = -1;
3543 if (should_clone < 0)
3544 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3545
3546 return should_clone;
3547 }
3548
3549 static inline bool
3550 should_serialize_deserialize_nir(void)
3551 {
3552 static int test_serialize = -1;
3553 if (test_serialize < 0)
3554 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3555
3556 return test_serialize;
3557 }
3558
3559 static inline bool
3560 should_print_nir(void)
3561 {
3562 static int should_print = -1;
3563 if (should_print < 0)
3564 should_print = env_var_as_boolean("NIR_PRINT", false);
3565
3566 return should_print;
3567 }
3568 #else
3569 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3570 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3571 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3572 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3573 static inline bool should_clone_nir(void) { return false; }
3574 static inline bool should_serialize_deserialize_nir(void) { return false; }
3575 static inline bool should_print_nir(void) { return false; }
3576 #endif /* NDEBUG */
3577
3578 #define _PASS(pass, nir, do_pass) do { \
3579 if (should_skip_nir(#pass)) { \
3580 printf("skipping %s\n", #pass); \
3581 break; \
3582 } \
3583 do_pass \
3584 nir_validate_shader(nir, "after " #pass); \
3585 if (should_clone_nir()) { \
3586 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3587 nir_shader_replace(nir, clone); \
3588 } \
3589 if (should_serialize_deserialize_nir()) { \
3590 nir_shader_serialize_deserialize(nir); \
3591 } \
3592 } while (0)
3593
3594 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3595 nir_metadata_set_validation_flag(nir); \
3596 if (should_print_nir()) \
3597 printf("%s\n", #pass); \
3598 if (pass(nir, ##__VA_ARGS__)) { \
3599 progress = true; \
3600 if (should_print_nir()) \
3601 nir_print_shader(nir, stdout); \
3602 nir_metadata_check_validation_flag(nir); \
3603 } \
3604 )
3605
3606 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3607 if (should_print_nir()) \
3608 printf("%s\n", #pass); \
3609 pass(nir, ##__VA_ARGS__); \
3610 if (should_print_nir()) \
3611 nir_print_shader(nir, stdout); \
3612 )
3613
3614 #define NIR_SKIP(name) should_skip_nir(#name)
3615
3616 /** An instruction filtering callback
3617 *
3618 * Returns true if the instruction should be processed and false otherwise.
3619 */
3620 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3621
3622 /** A simple instruction lowering callback
3623 *
3624 * Many instruction lowering passes can be written as a simple function which
3625 * takes an instruction as its input and returns a sequence of instructions
3626 * that implement the consumed instruction. This function type represents
3627 * such a lowering function. When called, a function with this prototype
3628 * should either return NULL indicating that no lowering needs to be done or
3629 * emit a sequence of instructions using the provided builder (whose cursor
3630 * will already be placed after the instruction to be lowered) and return the
3631 * resulting nir_ssa_def.
3632 */
3633 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3634 nir_instr *, void *);
3635
3636 /**
3637 * Special return value for nir_lower_instr_cb when some progress occurred
3638 * (like changing an input to the instr) that didn't result in a replacement
3639 * SSA def being generated.
3640 */
3641 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3642
3643 /** Iterate over all the instructions in a nir_function_impl and lower them
3644 * using the provided callbacks
3645 *
3646 * This function implements the guts of a standard lowering pass for you. It
3647 * iterates over all of the instructions in a nir_function_impl and calls the
3648 * filter callback on each one. If the filter callback returns true, it then
3649 * calls the lowering call back on the instruction. (Splitting it this way
3650 * allows us to avoid some save/restore work for instructions we know won't be
3651 * lowered.) If the instruction is dead after the lowering is complete, it
3652 * will be removed. If new instructions are added, the lowering callback will
3653 * also be called on them in case multiple lowerings are required.
3654 *
3655 * The metadata for the nir_function_impl will also be updated. If any blocks
3656 * are added (they cannot be removed), dominance and block indices will be
3657 * invalidated.
3658 */
3659 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3660 nir_instr_filter_cb filter,
3661 nir_lower_instr_cb lower,
3662 void *cb_data);
3663 bool nir_shader_lower_instructions(nir_shader *shader,
3664 nir_instr_filter_cb filter,
3665 nir_lower_instr_cb lower,
3666 void *cb_data);
3667
3668 void nir_calc_dominance_impl(nir_function_impl *impl);
3669 void nir_calc_dominance(nir_shader *shader);
3670
3671 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3672 bool nir_block_dominates(nir_block *parent, nir_block *child);
3673 bool nir_block_is_unreachable(nir_block *block);
3674
3675 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3676 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3677
3678 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3679 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3680
3681 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3682 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3683
3684 int nir_gs_count_vertices(const nir_shader *shader);
3685
3686 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3687 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3688 bool nir_split_var_copies(nir_shader *shader);
3689 bool nir_split_per_member_structs(nir_shader *shader);
3690 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3691
3692 bool nir_lower_returns_impl(nir_function_impl *impl);
3693 bool nir_lower_returns(nir_shader *shader);
3694
3695 void nir_inline_function_impl(struct nir_builder *b,
3696 const nir_function_impl *impl,
3697 nir_ssa_def **params);
3698 bool nir_inline_functions(nir_shader *shader);
3699
3700 bool nir_propagate_invariant(nir_shader *shader);
3701
3702 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3703 void nir_lower_deref_copy_instr(struct nir_builder *b,
3704 nir_intrinsic_instr *copy);
3705 bool nir_lower_var_copies(nir_shader *shader);
3706
3707 void nir_fixup_deref_modes(nir_shader *shader);
3708
3709 bool nir_lower_global_vars_to_local(nir_shader *shader);
3710
3711 typedef enum {
3712 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3713 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3714 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3715 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3716 } nir_lower_array_deref_of_vec_options;
3717
3718 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3719 nir_lower_array_deref_of_vec_options options);
3720
3721 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3722
3723 bool nir_lower_locals_to_regs(nir_shader *shader);
3724
3725 void nir_lower_io_to_temporaries(nir_shader *shader,
3726 nir_function_impl *entrypoint,
3727 bool outputs, bool inputs);
3728
3729 bool nir_lower_vars_to_scratch(nir_shader *shader,
3730 nir_variable_mode modes,
3731 int size_threshold,
3732 glsl_type_size_align_func size_align);
3733
3734 void nir_lower_clip_halfz(nir_shader *shader);
3735
3736 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3737
3738 void nir_gather_ssa_types(nir_function_impl *impl,
3739 BITSET_WORD *float_types,
3740 BITSET_WORD *int_types);
3741
3742 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3743 int (*type_size)(const struct glsl_type *, bool));
3744
3745 /* Some helpers to do very simple linking */
3746 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3747 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3748 uint64_t *used_by_other_stage,
3749 uint64_t *used_by_other_stage_patches);
3750 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3751 bool default_to_smooth_interp);
3752 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3753 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3754
3755 bool nir_lower_amul(nir_shader *shader,
3756 int (*type_size)(const struct glsl_type *, bool));
3757
3758 void nir_assign_io_var_locations(struct exec_list *var_list,
3759 unsigned *size,
3760 gl_shader_stage stage);
3761
3762 typedef enum {
3763 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3764 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3765 * modes.
3766 */
3767 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3768
3769 /* If set, this forces all non-flat fragment shader inputs to be
3770 * interpolated as if with the "sample" qualifier. This requires
3771 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3772 */
3773 nir_lower_io_force_sample_interpolation = (1 << 1),
3774 } nir_lower_io_options;
3775 bool nir_lower_io(nir_shader *shader,
3776 nir_variable_mode modes,
3777 int (*type_size)(const struct glsl_type *, bool),
3778 nir_lower_io_options);
3779
3780 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3781
3782 bool
3783 nir_lower_vars_to_explicit_types(nir_shader *shader,
3784 nir_variable_mode modes,
3785 glsl_type_size_align_func type_info);
3786
3787 typedef enum {
3788 /**
3789 * An address format which is a simple 32-bit global GPU address.
3790 */
3791 nir_address_format_32bit_global,
3792
3793 /**
3794 * An address format which is a simple 64-bit global GPU address.
3795 */
3796 nir_address_format_64bit_global,
3797
3798 /**
3799 * An address format which is a bounds-checked 64-bit global GPU address.
3800 *
3801 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3802 * address stored with the low bits in .x and high bits in .y, .z is a
3803 * size, and .w is an offset. When the final I/O operation is lowered, .w
3804 * is checked against .z and the operation is predicated on the result.
3805 */
3806 nir_address_format_64bit_bounded_global,
3807
3808 /**
3809 * An address format which is comprised of a vec2 where the first
3810 * component is a buffer index and the second is an offset.
3811 */
3812 nir_address_format_32bit_index_offset,
3813
3814 /**
3815 * An address format which is a simple 32-bit offset.
3816 */
3817 nir_address_format_32bit_offset,
3818
3819 /**
3820 * An address format representing a purely logical addressing model. In
3821 * this model, all deref chains must be complete from the dereference
3822 * operation to the variable. Cast derefs are not allowed. These
3823 * addresses will be 32-bit scalars but the format is immaterial because
3824 * you can always chase the chain.
3825 */
3826 nir_address_format_logical,
3827 } nir_address_format;
3828
3829 static inline unsigned
3830 nir_address_format_bit_size(nir_address_format addr_format)
3831 {
3832 switch (addr_format) {
3833 case nir_address_format_32bit_global: return 32;
3834 case nir_address_format_64bit_global: return 64;
3835 case nir_address_format_64bit_bounded_global: return 32;
3836 case nir_address_format_32bit_index_offset: return 32;
3837 case nir_address_format_32bit_offset: return 32;
3838 case nir_address_format_logical: return 32;
3839 }
3840 unreachable("Invalid address format");
3841 }
3842
3843 static inline unsigned
3844 nir_address_format_num_components(nir_address_format addr_format)
3845 {
3846 switch (addr_format) {
3847 case nir_address_format_32bit_global: return 1;
3848 case nir_address_format_64bit_global: return 1;
3849 case nir_address_format_64bit_bounded_global: return 4;
3850 case nir_address_format_32bit_index_offset: return 2;
3851 case nir_address_format_32bit_offset: return 1;
3852 case nir_address_format_logical: return 1;
3853 }
3854 unreachable("Invalid address format");
3855 }
3856
3857 static inline const struct glsl_type *
3858 nir_address_format_to_glsl_type(nir_address_format addr_format)
3859 {
3860 unsigned bit_size = nir_address_format_bit_size(addr_format);
3861 assert(bit_size == 32 || bit_size == 64);
3862 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3863 nir_address_format_num_components(addr_format));
3864 }
3865
3866 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3867
3868 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3869 nir_address_format addr_format);
3870
3871 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3872 nir_address_format addr_format);
3873
3874 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3875 nir_deref_instr *deref,
3876 nir_ssa_def *base_addr,
3877 nir_address_format addr_format);
3878 void nir_lower_explicit_io_instr(struct nir_builder *b,
3879 nir_intrinsic_instr *io_instr,
3880 nir_ssa_def *addr,
3881 nir_address_format addr_format);
3882
3883 bool nir_lower_explicit_io(nir_shader *shader,
3884 nir_variable_mode modes,
3885 nir_address_format);
3886
3887 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3888 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3889
3890 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3891
3892 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3893 bool nir_lower_regs_to_ssa(nir_shader *shader);
3894 bool nir_lower_vars_to_ssa(nir_shader *shader);
3895
3896 bool nir_remove_dead_derefs(nir_shader *shader);
3897 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3898 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3899 bool nir_lower_variable_initializers(nir_shader *shader,
3900 nir_variable_mode modes);
3901
3902 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3903 bool nir_lower_vec_to_movs(nir_shader *shader);
3904 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3905 bool alpha_to_one,
3906 const gl_state_index16 *alpha_ref_state_tokens);
3907 bool nir_lower_alu(nir_shader *shader);
3908
3909 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3910 bool always_precise, bool have_ffma);
3911
3912 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3913 bool nir_lower_bool_to_bitsize(nir_shader *shader);
3914 bool nir_lower_bool_to_float(nir_shader *shader);
3915 bool nir_lower_bool_to_int32(nir_shader *shader);
3916 bool nir_lower_int_to_float(nir_shader *shader);
3917 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3918 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3919 bool nir_lower_phis_to_scalar(nir_shader *shader);
3920 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3921 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3922 bool outputs_only);
3923 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3924 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3925 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3926
3927 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3928 void nir_lower_viewport_transform(nir_shader *shader);
3929 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3930
3931 typedef struct nir_lower_subgroups_options {
3932 uint8_t subgroup_size;
3933 uint8_t ballot_bit_size;
3934 bool lower_to_scalar:1;
3935 bool lower_vote_trivial:1;
3936 bool lower_vote_eq_to_ballot:1;
3937 bool lower_subgroup_masks:1;
3938 bool lower_shuffle:1;
3939 bool lower_shuffle_to_32bit:1;
3940 bool lower_quad:1;
3941 bool lower_quad_broadcast_dynamic:1;
3942 bool lower_quad_broadcast_dynamic_to_const:1;
3943 } nir_lower_subgroups_options;
3944
3945 bool nir_lower_subgroups(nir_shader *shader,
3946 const nir_lower_subgroups_options *options);
3947
3948 bool nir_lower_system_values(nir_shader *shader);
3949
3950 enum PACKED nir_lower_tex_packing {
3951 nir_lower_tex_packing_none = 0,
3952 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3953 * or unsigned ints based on the sampler type
3954 */
3955 nir_lower_tex_packing_16,
3956 /* The sampler returns 1 32-bit word of 4x8 unorm */
3957 nir_lower_tex_packing_8,
3958 };
3959
3960 typedef struct nir_lower_tex_options {
3961 /**
3962 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3963 * sampler types a texture projector is lowered.
3964 */
3965 unsigned lower_txp;
3966
3967 /**
3968 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3969 */
3970 bool lower_txf_offset;
3971
3972 /**
3973 * If true, lower away nir_tex_src_offset for all rect textures.
3974 */
3975 bool lower_rect_offset;
3976
3977 /**
3978 * If true, lower rect textures to 2D, using txs to fetch the
3979 * texture dimensions and dividing the texture coords by the
3980 * texture dims to normalize.
3981 */
3982 bool lower_rect;
3983
3984 /**
3985 * If true, convert yuv to rgb.
3986 */
3987 unsigned lower_y_uv_external;
3988 unsigned lower_y_u_v_external;
3989 unsigned lower_yx_xuxv_external;
3990 unsigned lower_xy_uxvx_external;
3991 unsigned lower_ayuv_external;
3992 unsigned lower_xyuv_external;
3993
3994 /**
3995 * To emulate certain texture wrap modes, this can be used
3996 * to saturate the specified tex coord to [0.0, 1.0]. The
3997 * bits are according to sampler #, ie. if, for example:
3998 *
3999 * (conf->saturate_s & (1 << n))
4000 *
4001 * is true, then the s coord for sampler n is saturated.
4002 *
4003 * Note that clamping must happen *after* projector lowering
4004 * so any projected texture sample instruction with a clamped
4005 * coordinate gets automatically lowered, regardless of the
4006 * 'lower_txp' setting.
4007 */
4008 unsigned saturate_s;
4009 unsigned saturate_t;
4010 unsigned saturate_r;
4011
4012 /* Bitmask of textures that need swizzling.
4013 *
4014 * If (swizzle_result & (1 << texture_index)), then the swizzle in
4015 * swizzles[texture_index] is applied to the result of the texturing
4016 * operation.
4017 */
4018 unsigned swizzle_result;
4019
4020 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
4021 * while 4 and 5 represent 0 and 1 respectively.
4022 */
4023 uint8_t swizzles[32][4];
4024
4025 /* Can be used to scale sampled values in range required by the format. */
4026 float scale_factors[32];
4027
4028 /**
4029 * Bitmap of textures that need srgb to linear conversion. If
4030 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
4031 * of the texture are lowered to linear.
4032 */
4033 unsigned lower_srgb;
4034
4035 /**
4036 * If true, lower nir_texop_tex on shaders that doesn't support implicit
4037 * LODs to nir_texop_txl.
4038 */
4039 bool lower_tex_without_implicit_lod;
4040
4041 /**
4042 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
4043 */
4044 bool lower_txd_cube_map;
4045
4046 /**
4047 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
4048 */
4049 bool lower_txd_3d;
4050
4051 /**
4052 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
4053 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
4054 * with lower_txd_cube_map.
4055 */
4056 bool lower_txd_shadow;
4057
4058 /**
4059 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
4060 * Implies lower_txd_cube_map and lower_txd_shadow.
4061 */
4062 bool lower_txd;
4063
4064 /**
4065 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
4066 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
4067 */
4068 bool lower_txb_shadow_clamp;
4069
4070 /**
4071 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
4072 * with nir_texop_txl. This includes cube maps.
4073 */
4074 bool lower_txd_shadow_clamp;
4075
4076 /**
4077 * If true, lower nir_texop_txd on when it uses both offset and min_lod
4078 * with nir_texop_txl. This includes cube maps.
4079 */
4080 bool lower_txd_offset_clamp;
4081
4082 /**
4083 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4084 * sampler is bindless.
4085 */
4086 bool lower_txd_clamp_bindless_sampler;
4087
4088 /**
4089 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
4090 * sampler index is not statically determinable to be less than 16.
4091 */
4092 bool lower_txd_clamp_if_sampler_index_not_lt_16;
4093
4094 /**
4095 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
4096 * 0-lod followed by a nir_ishr.
4097 */
4098 bool lower_txs_lod;
4099
4100 /**
4101 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
4102 * mixed-up tg4 locations.
4103 */
4104 bool lower_tg4_broadcom_swizzle;
4105
4106 /**
4107 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
4108 */
4109 bool lower_tg4_offsets;
4110
4111 enum nir_lower_tex_packing lower_tex_packing[32];
4112 } nir_lower_tex_options;
4113
4114 bool nir_lower_tex(nir_shader *shader,
4115 const nir_lower_tex_options *options);
4116
4117 enum nir_lower_non_uniform_access_type {
4118 nir_lower_non_uniform_ubo_access = (1 << 0),
4119 nir_lower_non_uniform_ssbo_access = (1 << 1),
4120 nir_lower_non_uniform_texture_access = (1 << 2),
4121 nir_lower_non_uniform_image_access = (1 << 3),
4122 };
4123
4124 bool nir_lower_non_uniform_access(nir_shader *shader,
4125 enum nir_lower_non_uniform_access_type);
4126
4127 enum nir_lower_idiv_path {
4128 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
4129 * the two but it is not exact in some cases (for example, 1091317713u /
4130 * 1034u gives 5209173 instead of 1055432) */
4131 nir_lower_idiv_fast,
4132 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
4133 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
4134 * the nv50 path and many of them are integer multiplications, so it is
4135 * probably slower. It should always return the correct result, though. */
4136 nir_lower_idiv_precise,
4137 };
4138
4139 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
4140
4141 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
4142
4143 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
4144 bool use_vars,
4145 bool use_clipdist_array,
4146 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4147 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
4148 bool use_clipdist_array,
4149 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
4150 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
4151 bool use_clipdist_array);
4152 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
4153
4154 void nir_lower_point_size_mov(nir_shader *shader,
4155 const gl_state_index16 *pointsize_state_tokens);
4156
4157 bool nir_lower_frexp(nir_shader *nir);
4158
4159 void nir_lower_two_sided_color(nir_shader *shader);
4160
4161 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4162
4163 bool nir_lower_flatshade(nir_shader *shader);
4164
4165 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4166 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4167 const gl_state_index16 *uniform_state_tokens);
4168
4169 typedef struct nir_lower_wpos_ytransform_options {
4170 gl_state_index16 state_tokens[STATE_LENGTH];
4171 bool fs_coord_origin_upper_left :1;
4172 bool fs_coord_origin_lower_left :1;
4173 bool fs_coord_pixel_center_integer :1;
4174 bool fs_coord_pixel_center_half_integer :1;
4175 } nir_lower_wpos_ytransform_options;
4176
4177 bool nir_lower_wpos_ytransform(nir_shader *shader,
4178 const nir_lower_wpos_ytransform_options *options);
4179 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4180
4181 bool nir_lower_fb_read(nir_shader *shader);
4182
4183 typedef struct nir_lower_drawpixels_options {
4184 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4185 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4186 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4187 unsigned drawpix_sampler;
4188 unsigned pixelmap_sampler;
4189 bool pixel_maps :1;
4190 bool scale_and_bias :1;
4191 } nir_lower_drawpixels_options;
4192
4193 void nir_lower_drawpixels(nir_shader *shader,
4194 const nir_lower_drawpixels_options *options);
4195
4196 typedef struct nir_lower_bitmap_options {
4197 unsigned sampler;
4198 bool swizzle_xxxx;
4199 } nir_lower_bitmap_options;
4200
4201 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4202
4203 bool nir_lower_atomics_to_ssbo(nir_shader *shader);
4204
4205 typedef enum {
4206 nir_lower_int_source_mods = 1 << 0,
4207 nir_lower_float_source_mods = 1 << 1,
4208 nir_lower_triop_abs = 1 << 2,
4209 nir_lower_all_source_mods = (1 << 3) - 1
4210 } nir_lower_to_source_mods_flags;
4211
4212
4213 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4214
4215 bool nir_lower_gs_intrinsics(nir_shader *shader, bool per_stream);
4216
4217 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4218
4219 bool nir_lower_bit_size(nir_shader *shader,
4220 nir_lower_bit_size_callback callback,
4221 void *callback_data);
4222
4223 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4224 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4225
4226 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4227 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4228 nir_lower_doubles_options options);
4229 bool nir_lower_pack(nir_shader *shader);
4230
4231 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4232
4233 typedef enum {
4234 nir_lower_interpolation_at_sample = (1 << 1),
4235 nir_lower_interpolation_at_offset = (1 << 2),
4236 nir_lower_interpolation_centroid = (1 << 3),
4237 nir_lower_interpolation_pixel = (1 << 4),
4238 nir_lower_interpolation_sample = (1 << 5),
4239 } nir_lower_interpolation_options;
4240
4241 bool nir_lower_interpolation(nir_shader *shader,
4242 nir_lower_interpolation_options options);
4243
4244 bool nir_lower_discard_to_demote(nir_shader *shader);
4245
4246 bool nir_normalize_cubemap_coords(nir_shader *shader);
4247
4248 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4249
4250 void nir_loop_analyze_impl(nir_function_impl *impl,
4251 nir_variable_mode indirect_mask);
4252
4253 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4254
4255 bool nir_repair_ssa_impl(nir_function_impl *impl);
4256 bool nir_repair_ssa(nir_shader *shader);
4257
4258 void nir_convert_loop_to_lcssa(nir_loop *loop);
4259 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4260 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4261
4262 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4263 * registers. If false, convert all values (even those not involved in a phi
4264 * node) to registers.
4265 */
4266 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4267
4268 bool nir_lower_phis_to_regs_block(nir_block *block);
4269 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4270 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4271
4272 bool nir_lower_samplers(nir_shader *shader);
4273 bool nir_lower_ssbo(nir_shader *shader);
4274
4275 /* This is here for unit tests. */
4276 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4277
4278 bool nir_opt_comparison_pre(nir_shader *shader);
4279
4280 bool nir_opt_access(nir_shader *shader);
4281 bool nir_opt_algebraic(nir_shader *shader);
4282 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4283 bool nir_opt_algebraic_late(nir_shader *shader);
4284 bool nir_opt_algebraic_distribute_src_mods(nir_shader *shader);
4285 bool nir_opt_constant_folding(nir_shader *shader);
4286
4287 /* Try to combine a and b into a. Return true if combination was possible,
4288 * which will result in b being removed by the pass. Return false if
4289 * combination wasn't possible.
4290 */
4291 typedef bool (*nir_combine_memory_barrier_cb)(
4292 nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *data);
4293
4294 bool nir_opt_combine_memory_barriers(nir_shader *shader,
4295 nir_combine_memory_barrier_cb combine_cb,
4296 void *data);
4297
4298 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4299
4300 bool nir_copy_prop(nir_shader *shader);
4301
4302 bool nir_opt_copy_prop_vars(nir_shader *shader);
4303
4304 bool nir_opt_cse(nir_shader *shader);
4305
4306 bool nir_opt_dce(nir_shader *shader);
4307
4308 bool nir_opt_dead_cf(nir_shader *shader);
4309
4310 bool nir_opt_dead_write_vars(nir_shader *shader);
4311
4312 bool nir_opt_deref_impl(nir_function_impl *impl);
4313 bool nir_opt_deref(nir_shader *shader);
4314
4315 bool nir_opt_find_array_copies(nir_shader *shader);
4316
4317 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4318
4319 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4320
4321 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4322
4323 bool nir_opt_intrinsics(nir_shader *shader);
4324
4325 bool nir_opt_large_constants(nir_shader *shader,
4326 glsl_type_size_align_func size_align,
4327 unsigned threshold);
4328
4329 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4330
4331 typedef enum {
4332 nir_move_const_undef = (1 << 0),
4333 nir_move_load_ubo = (1 << 1),
4334 nir_move_load_input = (1 << 2),
4335 nir_move_comparisons = (1 << 3),
4336 nir_move_copies = (1 << 4),
4337 } nir_move_options;
4338
4339 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4340
4341 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4342
4343 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4344
4345 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4346 bool indirect_load_ok, bool expensive_alu_ok);
4347
4348 bool nir_opt_rematerialize_compares(nir_shader *shader);
4349
4350 bool nir_opt_remove_phis(nir_shader *shader);
4351 bool nir_opt_remove_phis_block(nir_block *block);
4352
4353 bool nir_opt_shrink_load(nir_shader *shader);
4354
4355 bool nir_opt_trivial_continues(nir_shader *shader);
4356
4357 bool nir_opt_undef(nir_shader *shader);
4358
4359 bool nir_opt_vectorize(nir_shader *shader);
4360
4361 bool nir_opt_conditional_discard(nir_shader *shader);
4362
4363 typedef bool (*nir_should_vectorize_mem_func)(unsigned align, unsigned bit_size,
4364 unsigned num_components, unsigned high_offset,
4365 nir_intrinsic_instr *low, nir_intrinsic_instr *high);
4366
4367 bool nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
4368 nir_should_vectorize_mem_func callback);
4369
4370 void nir_schedule(nir_shader *shader, int threshold);
4371
4372 void nir_strip(nir_shader *shader);
4373
4374 void nir_sweep(nir_shader *shader);
4375
4376 void nir_remap_dual_slot_attributes(nir_shader *shader,
4377 uint64_t *dual_slot_inputs);
4378 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4379
4380 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4381 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4382
4383 static inline bool
4384 nir_variable_is_in_ubo(const nir_variable *var)
4385 {
4386 return (var->data.mode == nir_var_mem_ubo &&
4387 var->interface_type != NULL);
4388 }
4389
4390 static inline bool
4391 nir_variable_is_in_ssbo(const nir_variable *var)
4392 {
4393 return (var->data.mode == nir_var_mem_ssbo &&
4394 var->interface_type != NULL);
4395 }
4396
4397 static inline bool
4398 nir_variable_is_in_block(const nir_variable *var)
4399 {
4400 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4401 }
4402
4403 #ifdef __cplusplus
4404 } /* extern "C" */
4405 #endif
4406
4407 #endif /* NIR_H */