nir: move data.image.access to data.access
[mesa.git] / src / compiler / nir / nir.h
1 /*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #ifndef NIR_H
29 #define NIR_H
30
31 #include "util/hash_table.h"
32 #include "compiler/glsl/list.h"
33 #include "GL/gl.h" /* GLenum */
34 #include "util/list.h"
35 #include "util/ralloc.h"
36 #include "util/set.h"
37 #include "util/bitscan.h"
38 #include "util/bitset.h"
39 #include "util/macros.h"
40 #include "compiler/nir_types.h"
41 #include "compiler/shader_enums.h"
42 #include "compiler/shader_info.h"
43 #include <stdio.h>
44
45 #ifndef NDEBUG
46 #include "util/debug.h"
47 #endif /* NDEBUG */
48
49 #include "nir_opcodes.h"
50
51 #if defined(_WIN32) && !defined(snprintf)
52 #define snprintf _snprintf
53 #endif
54
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58
59 #define NIR_FALSE 0u
60 #define NIR_TRUE (~0u)
61 #define NIR_MAX_VEC_COMPONENTS 4
62 #define NIR_MAX_MATRIX_COLUMNS 4
63 #define NIR_STREAM_PACKED (1 << 8)
64 typedef uint8_t nir_component_mask_t;
65 typedef unsigned short GLenum16;
66
67 /** Defines a cast function
68 *
69 * This macro defines a cast function from in_type to out_type where
70 * out_type is some structure type that contains a field of type out_type.
71 *
72 * Note that you have to be a bit careful as the generated cast function
73 * destroys constness.
74 */
75 #define NIR_DEFINE_CAST(name, in_type, out_type, field, \
76 type_field, type_value) \
77 static inline out_type * \
78 name(const in_type *parent) \
79 { \
80 assert(parent && parent->type_field == type_value); \
81 return exec_node_data(out_type, parent, field); \
82 }
83
84 struct nir_function;
85 struct nir_shader;
86 struct nir_instr;
87 struct nir_builder;
88
89
90 /**
91 * Description of built-in state associated with a uniform
92 *
93 * \sa nir_variable::state_slots
94 */
95 typedef struct {
96 gl_state_index16 tokens[STATE_LENGTH];
97 uint16_t swizzle;
98 } nir_state_slot;
99
100 typedef enum {
101 nir_var_shader_in = (1 << 0),
102 nir_var_shader_out = (1 << 1),
103 nir_var_shader_temp = (1 << 2),
104 nir_var_function_temp = (1 << 3),
105 nir_var_uniform = (1 << 4),
106 nir_var_mem_ubo = (1 << 5),
107 nir_var_system_value = (1 << 6),
108 nir_var_mem_ssbo = (1 << 7),
109 nir_var_mem_shared = (1 << 8),
110 nir_var_mem_global = (1 << 9),
111 nir_var_all = (1 << 10) - 1,
112 } nir_variable_mode;
113
114 /**
115 * Rounding modes.
116 */
117 typedef enum {
118 nir_rounding_mode_undef = 0,
119 nir_rounding_mode_rtne = 1, /* round to nearest even */
120 nir_rounding_mode_ru = 2, /* round up */
121 nir_rounding_mode_rd = 3, /* round down */
122 nir_rounding_mode_rtz = 4, /* round towards zero */
123 } nir_rounding_mode;
124
125 typedef union {
126 bool b;
127 float f32;
128 double f64;
129 int8_t i8;
130 uint8_t u8;
131 int16_t i16;
132 uint16_t u16;
133 int32_t i32;
134 uint32_t u32;
135 int64_t i64;
136 uint64_t u64;
137 } nir_const_value;
138
139 #define nir_const_value_to_array(arr, c, components, m) \
140 { \
141 for (unsigned i = 0; i < components; ++i) \
142 arr[i] = c[i].m; \
143 } while (false)
144
145 static inline nir_const_value
146 nir_const_value_for_raw_uint(uint64_t x, unsigned bit_size)
147 {
148 nir_const_value v;
149 memset(&v, 0, sizeof(v));
150
151 switch (bit_size) {
152 case 1: v.b = x; break;
153 case 8: v.u8 = x; break;
154 case 16: v.u16 = x; break;
155 case 32: v.u32 = x; break;
156 case 64: v.u64 = x; break;
157 default:
158 unreachable("Invalid bit size");
159 }
160
161 return v;
162 }
163
164 static inline nir_const_value
165 nir_const_value_for_int(int64_t i, unsigned bit_size)
166 {
167 nir_const_value v;
168 memset(&v, 0, sizeof(v));
169
170 assert(bit_size <= 64);
171 if (bit_size < 64) {
172 assert(i >= (-(1ll << (bit_size - 1))));
173 assert(i < (1ll << (bit_size - 1)));
174 }
175
176 return nir_const_value_for_raw_uint(i, bit_size);
177 }
178
179 static inline nir_const_value
180 nir_const_value_for_uint(uint64_t u, unsigned bit_size)
181 {
182 nir_const_value v;
183 memset(&v, 0, sizeof(v));
184
185 assert(bit_size <= 64);
186 if (bit_size < 64)
187 assert(u < (1ull << bit_size));
188
189 return nir_const_value_for_raw_uint(u, bit_size);
190 }
191
192 static inline nir_const_value
193 nir_const_value_for_bool(bool b, unsigned bit_size)
194 {
195 /* Booleans use a 0/-1 convention */
196 return nir_const_value_for_int(-(int)b, bit_size);
197 }
198
199 /* This one isn't inline because it requires half-float conversion */
200 nir_const_value nir_const_value_for_float(double b, unsigned bit_size);
201
202 static inline int64_t
203 nir_const_value_as_int(nir_const_value value, unsigned bit_size)
204 {
205 switch (bit_size) {
206 /* int1_t uses 0/-1 convention */
207 case 1: return -(int)value.b;
208 case 8: return value.i8;
209 case 16: return value.i16;
210 case 32: return value.i32;
211 case 64: return value.i64;
212 default:
213 unreachable("Invalid bit size");
214 }
215 }
216
217 static inline uint64_t
218 nir_const_value_as_uint(nir_const_value value, unsigned bit_size)
219 {
220 switch (bit_size) {
221 case 1: return value.b;
222 case 8: return value.u8;
223 case 16: return value.u16;
224 case 32: return value.u32;
225 case 64: return value.u64;
226 default:
227 unreachable("Invalid bit size");
228 }
229 }
230
231 static inline bool
232 nir_const_value_as_bool(nir_const_value value, unsigned bit_size)
233 {
234 int64_t i = nir_const_value_as_int(value, bit_size);
235
236 /* Booleans of any size use 0/-1 convention */
237 assert(i == 0 || i == -1);
238
239 return i;
240 }
241
242 /* This one isn't inline because it requires half-float conversion */
243 double nir_const_value_as_float(nir_const_value value, unsigned bit_size);
244
245 typedef struct nir_constant {
246 /**
247 * Value of the constant.
248 *
249 * The field used to back the values supplied by the constant is determined
250 * by the type associated with the \c nir_variable. Constants may be
251 * scalars, vectors, or matrices.
252 */
253 nir_const_value values[NIR_MAX_VEC_COMPONENTS];
254
255 /* we could get this from the var->type but makes clone *much* easier to
256 * not have to care about the type.
257 */
258 unsigned num_elements;
259
260 /* Array elements / Structure Fields */
261 struct nir_constant **elements;
262 } nir_constant;
263
264 /**
265 * \brief Layout qualifiers for gl_FragDepth.
266 *
267 * The AMD/ARB_conservative_depth extensions allow gl_FragDepth to be redeclared
268 * with a layout qualifier.
269 */
270 typedef enum {
271 nir_depth_layout_none, /**< No depth layout is specified. */
272 nir_depth_layout_any,
273 nir_depth_layout_greater,
274 nir_depth_layout_less,
275 nir_depth_layout_unchanged
276 } nir_depth_layout;
277
278 /**
279 * Enum keeping track of how a variable was declared.
280 */
281 typedef enum {
282 /**
283 * Normal declaration.
284 */
285 nir_var_declared_normally = 0,
286
287 /**
288 * Variable is implicitly generated by the compiler and should not be
289 * visible via the API.
290 */
291 nir_var_hidden,
292 } nir_var_declaration_type;
293
294 /**
295 * Either a uniform, global variable, shader input, or shader output. Based on
296 * ir_variable - it should be easy to translate between the two.
297 */
298
299 typedef struct nir_variable {
300 struct exec_node node;
301
302 /**
303 * Declared type of the variable
304 */
305 const struct glsl_type *type;
306
307 /**
308 * Declared name of the variable
309 */
310 char *name;
311
312 struct nir_variable_data {
313 /**
314 * Storage class of the variable.
315 *
316 * \sa nir_variable_mode
317 */
318 nir_variable_mode mode:10;
319
320 /**
321 * Is the variable read-only?
322 *
323 * This is set for variables declared as \c const, shader inputs,
324 * and uniforms.
325 */
326 unsigned read_only:1;
327 unsigned centroid:1;
328 unsigned sample:1;
329 unsigned patch:1;
330 unsigned invariant:1;
331
332 /**
333 * Can this variable be coalesced with another?
334 *
335 * This is set by nir_lower_io_to_temporaries to say that any
336 * copies involving this variable should stay put. Propagating it can
337 * duplicate the resulting load/store, which is not wanted, and may
338 * result in a load/store of the variable with an indirect offset which
339 * the backend may not be able to handle.
340 */
341 unsigned cannot_coalesce:1;
342
343 /**
344 * When separate shader programs are enabled, only input/outputs between
345 * the stages of a multi-stage separate program can be safely removed
346 * from the shader interface. Other input/outputs must remains active.
347 *
348 * This is also used to make sure xfb varyings that are unused by the
349 * fragment shader are not removed.
350 */
351 unsigned always_active_io:1;
352
353 /**
354 * Interpolation mode for shader inputs / outputs
355 *
356 * \sa glsl_interp_mode
357 */
358 unsigned interpolation:2;
359
360 /**
361 * If non-zero, then this variable may be packed along with other variables
362 * into a single varying slot, so this offset should be applied when
363 * accessing components. For example, an offset of 1 means that the x
364 * component of this variable is actually stored in component y of the
365 * location specified by \c location.
366 */
367 unsigned location_frac:2;
368
369 /**
370 * If true, this variable represents an array of scalars that should
371 * be tightly packed. In other words, consecutive array elements
372 * should be stored one component apart, rather than one slot apart.
373 */
374 unsigned compact:1;
375
376 /**
377 * Whether this is a fragment shader output implicitly initialized with
378 * the previous contents of the specified render target at the
379 * framebuffer location corresponding to this shader invocation.
380 */
381 unsigned fb_fetch_output:1;
382
383 /**
384 * Non-zero if this variable is considered bindless as defined by
385 * ARB_bindless_texture.
386 */
387 unsigned bindless:1;
388
389 /**
390 * Was an explicit binding set in the shader?
391 */
392 unsigned explicit_binding:1;
393
394 /**
395 * Was a transfer feedback buffer set in the shader?
396 */
397 unsigned explicit_xfb_buffer:1;
398
399 /**
400 * Was a transfer feedback stride set in the shader?
401 */
402 unsigned explicit_xfb_stride:1;
403
404 /**
405 * Was an explicit offset set in the shader?
406 */
407 unsigned explicit_offset:1;
408
409 /**
410 * How the variable was declared. See nir_var_declaration_type.
411 *
412 * This is used to detect variables generated by the compiler, so should
413 * not be visible via the API.
414 */
415 unsigned how_declared:2;
416
417 /**
418 * \brief Layout qualifier for gl_FragDepth.
419 *
420 * This is not equal to \c ir_depth_layout_none if and only if this
421 * variable is \c gl_FragDepth and a layout qualifier is specified.
422 */
423 nir_depth_layout depth_layout:3;
424
425 /**
426 * Vertex stream output identifier.
427 *
428 * For packed outputs, NIR_STREAM_PACKED is set and bits [2*i+1,2*i]
429 * indicate the stream of the i-th component.
430 */
431 unsigned stream:9;
432
433 /**
434 * Access flags for memory variables (SSBO/global), image uniforms, and
435 * bindless images in uniforms/inputs/outputs.
436 */
437 enum gl_access_qualifier access:8;
438
439 /**
440 * output index for dual source blending.
441 */
442 unsigned index;
443
444 /**
445 * Descriptor set binding for sampler or UBO.
446 */
447 unsigned descriptor_set:5;
448
449 /**
450 * Initial binding point for a sampler or UBO.
451 *
452 * For array types, this represents the binding point for the first element.
453 */
454 unsigned binding;
455
456 /**
457 * Storage location of the base of this variable
458 *
459 * The precise meaning of this field depends on the nature of the variable.
460 *
461 * - Vertex shader input: one of the values from \c gl_vert_attrib.
462 * - Vertex shader output: one of the values from \c gl_varying_slot.
463 * - Geometry shader input: one of the values from \c gl_varying_slot.
464 * - Geometry shader output: one of the values from \c gl_varying_slot.
465 * - Fragment shader input: one of the values from \c gl_varying_slot.
466 * - Fragment shader output: one of the values from \c gl_frag_result.
467 * - Uniforms: Per-stage uniform slot number for default uniform block.
468 * - Uniforms: Index within the uniform block definition for UBO members.
469 * - Non-UBO Uniforms: uniform slot number.
470 * - Other: This field is not currently used.
471 *
472 * If the variable is a uniform, shader input, or shader output, and the
473 * slot has not been assigned, the value will be -1.
474 */
475 int location;
476
477 /**
478 * The actual location of the variable in the IR. Only valid for inputs,
479 * outputs, and uniforms (including samplers and images).
480 */
481 unsigned driver_location;
482
483 /**
484 * Location an atomic counter or transform feedback is stored at.
485 */
486 unsigned offset;
487
488 union {
489 struct {
490 /** Image internal format if specified explicitly, otherwise GL_NONE. */
491 GLenum16 format;
492 } image;
493
494 struct {
495 /**
496 * Transform feedback buffer.
497 */
498 uint16_t buffer:2;
499
500 /**
501 * Transform feedback stride.
502 */
503 uint16_t stride;
504 } xfb;
505 };
506 } data;
507
508 /* Number of nir_variable_data members */
509 unsigned num_members;
510
511 /**
512 * Built-in state that backs this uniform
513 *
514 * Once set at variable creation, \c state_slots must remain invariant.
515 * This is because, ideally, this array would be shared by all clones of
516 * this variable in the IR tree. In other words, we'd really like for it
517 * to be a fly-weight.
518 *
519 * If the variable is not a uniform, \c num_state_slots will be zero and
520 * \c state_slots will be \c NULL.
521 */
522 /*@{*/
523 unsigned num_state_slots; /**< Number of state slots used */
524 nir_state_slot *state_slots; /**< State descriptors. */
525 /*@}*/
526
527 /**
528 * Constant expression assigned in the initializer of the variable
529 *
530 * This field should only be used temporarily by creators of NIR shaders
531 * and then lower_constant_initializers can be used to get rid of them.
532 * Most of the rest of NIR ignores this field or asserts that it's NULL.
533 */
534 nir_constant *constant_initializer;
535
536 /**
537 * For variables that are in an interface block or are an instance of an
538 * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
539 *
540 * \sa ir_variable::location
541 */
542 const struct glsl_type *interface_type;
543
544 /**
545 * Description of per-member data for per-member struct variables
546 *
547 * This is used for variables which are actually an amalgamation of
548 * multiple entities such as a struct of built-in values or a struct of
549 * inputs each with their own layout specifier. This is only allowed on
550 * variables with a struct or array of array of struct type.
551 */
552 struct nir_variable_data *members;
553 } nir_variable;
554
555 #define nir_foreach_variable(var, var_list) \
556 foreach_list_typed(nir_variable, var, node, var_list)
557
558 #define nir_foreach_variable_safe(var, var_list) \
559 foreach_list_typed_safe(nir_variable, var, node, var_list)
560
561 static inline bool
562 nir_variable_is_global(const nir_variable *var)
563 {
564 return var->data.mode != nir_var_function_temp;
565 }
566
567 typedef struct nir_register {
568 struct exec_node node;
569
570 unsigned num_components; /** < number of vector components */
571 unsigned num_array_elems; /** < size of array (0 for no array) */
572
573 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
574 uint8_t bit_size;
575
576 /** generic register index. */
577 unsigned index;
578
579 /** only for debug purposes, can be NULL */
580 const char *name;
581
582 /** set of nir_srcs where this register is used (read from) */
583 struct list_head uses;
584
585 /** set of nir_dests where this register is defined (written to) */
586 struct list_head defs;
587
588 /** set of nir_ifs where this register is used as a condition */
589 struct list_head if_uses;
590 } nir_register;
591
592 #define nir_foreach_register(reg, reg_list) \
593 foreach_list_typed(nir_register, reg, node, reg_list)
594 #define nir_foreach_register_safe(reg, reg_list) \
595 foreach_list_typed_safe(nir_register, reg, node, reg_list)
596
597 typedef enum PACKED {
598 nir_instr_type_alu,
599 nir_instr_type_deref,
600 nir_instr_type_call,
601 nir_instr_type_tex,
602 nir_instr_type_intrinsic,
603 nir_instr_type_load_const,
604 nir_instr_type_jump,
605 nir_instr_type_ssa_undef,
606 nir_instr_type_phi,
607 nir_instr_type_parallel_copy,
608 } nir_instr_type;
609
610 typedef struct nir_instr {
611 struct exec_node node;
612 struct nir_block *block;
613 nir_instr_type type;
614
615 /* A temporary for optimization and analysis passes to use for storing
616 * flags. For instance, DCE uses this to store the "dead/live" info.
617 */
618 uint8_t pass_flags;
619
620 /** generic instruction index. */
621 unsigned index;
622 } nir_instr;
623
624 static inline nir_instr *
625 nir_instr_next(nir_instr *instr)
626 {
627 struct exec_node *next = exec_node_get_next(&instr->node);
628 if (exec_node_is_tail_sentinel(next))
629 return NULL;
630 else
631 return exec_node_data(nir_instr, next, node);
632 }
633
634 static inline nir_instr *
635 nir_instr_prev(nir_instr *instr)
636 {
637 struct exec_node *prev = exec_node_get_prev(&instr->node);
638 if (exec_node_is_head_sentinel(prev))
639 return NULL;
640 else
641 return exec_node_data(nir_instr, prev, node);
642 }
643
644 static inline bool
645 nir_instr_is_first(const nir_instr *instr)
646 {
647 return exec_node_is_head_sentinel(exec_node_get_prev_const(&instr->node));
648 }
649
650 static inline bool
651 nir_instr_is_last(const nir_instr *instr)
652 {
653 return exec_node_is_tail_sentinel(exec_node_get_next_const(&instr->node));
654 }
655
656 typedef struct nir_ssa_def {
657 /** for debugging only, can be NULL */
658 const char* name;
659
660 /** generic SSA definition index. */
661 unsigned index;
662
663 /** Index into the live_in and live_out bitfields */
664 unsigned live_index;
665
666 /** Instruction which produces this SSA value. */
667 nir_instr *parent_instr;
668
669 /** set of nir_instrs where this register is used (read from) */
670 struct list_head uses;
671
672 /** set of nir_ifs where this register is used as a condition */
673 struct list_head if_uses;
674
675 uint8_t num_components;
676
677 /* The bit-size of each channel; must be one of 8, 16, 32, or 64 */
678 uint8_t bit_size;
679 } nir_ssa_def;
680
681 struct nir_src;
682
683 typedef struct {
684 nir_register *reg;
685 struct nir_src *indirect; /** < NULL for no indirect offset */
686 unsigned base_offset;
687
688 /* TODO use-def chain goes here */
689 } nir_reg_src;
690
691 typedef struct {
692 nir_instr *parent_instr;
693 struct list_head def_link;
694
695 nir_register *reg;
696 struct nir_src *indirect; /** < NULL for no indirect offset */
697 unsigned base_offset;
698
699 /* TODO def-use chain goes here */
700 } nir_reg_dest;
701
702 struct nir_if;
703
704 typedef struct nir_src {
705 union {
706 /** Instruction that consumes this value as a source. */
707 nir_instr *parent_instr;
708 struct nir_if *parent_if;
709 };
710
711 struct list_head use_link;
712
713 union {
714 nir_reg_src reg;
715 nir_ssa_def *ssa;
716 };
717
718 bool is_ssa;
719 } nir_src;
720
721 static inline nir_src
722 nir_src_init(void)
723 {
724 nir_src src = { { NULL } };
725 return src;
726 }
727
728 #define NIR_SRC_INIT nir_src_init()
729
730 #define nir_foreach_use(src, reg_or_ssa_def) \
731 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
732
733 #define nir_foreach_use_safe(src, reg_or_ssa_def) \
734 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->uses, use_link)
735
736 #define nir_foreach_if_use(src, reg_or_ssa_def) \
737 list_for_each_entry(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
738
739 #define nir_foreach_if_use_safe(src, reg_or_ssa_def) \
740 list_for_each_entry_safe(nir_src, src, &(reg_or_ssa_def)->if_uses, use_link)
741
742 typedef struct {
743 union {
744 nir_reg_dest reg;
745 nir_ssa_def ssa;
746 };
747
748 bool is_ssa;
749 } nir_dest;
750
751 static inline nir_dest
752 nir_dest_init(void)
753 {
754 nir_dest dest = { { { NULL } } };
755 return dest;
756 }
757
758 #define NIR_DEST_INIT nir_dest_init()
759
760 #define nir_foreach_def(dest, reg) \
761 list_for_each_entry(nir_dest, dest, &(reg)->defs, reg.def_link)
762
763 #define nir_foreach_def_safe(dest, reg) \
764 list_for_each_entry_safe(nir_dest, dest, &(reg)->defs, reg.def_link)
765
766 static inline nir_src
767 nir_src_for_ssa(nir_ssa_def *def)
768 {
769 nir_src src = NIR_SRC_INIT;
770
771 src.is_ssa = true;
772 src.ssa = def;
773
774 return src;
775 }
776
777 static inline nir_src
778 nir_src_for_reg(nir_register *reg)
779 {
780 nir_src src = NIR_SRC_INIT;
781
782 src.is_ssa = false;
783 src.reg.reg = reg;
784 src.reg.indirect = NULL;
785 src.reg.base_offset = 0;
786
787 return src;
788 }
789
790 static inline nir_dest
791 nir_dest_for_reg(nir_register *reg)
792 {
793 nir_dest dest = NIR_DEST_INIT;
794
795 dest.reg.reg = reg;
796
797 return dest;
798 }
799
800 static inline unsigned
801 nir_src_bit_size(nir_src src)
802 {
803 return src.is_ssa ? src.ssa->bit_size : src.reg.reg->bit_size;
804 }
805
806 static inline unsigned
807 nir_src_num_components(nir_src src)
808 {
809 return src.is_ssa ? src.ssa->num_components : src.reg.reg->num_components;
810 }
811
812 static inline bool
813 nir_src_is_const(nir_src src)
814 {
815 return src.is_ssa &&
816 src.ssa->parent_instr->type == nir_instr_type_load_const;
817 }
818
819 static inline unsigned
820 nir_dest_bit_size(nir_dest dest)
821 {
822 return dest.is_ssa ? dest.ssa.bit_size : dest.reg.reg->bit_size;
823 }
824
825 static inline unsigned
826 nir_dest_num_components(nir_dest dest)
827 {
828 return dest.is_ssa ? dest.ssa.num_components : dest.reg.reg->num_components;
829 }
830
831 void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
832 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
833
834 typedef struct {
835 nir_src src;
836
837 /**
838 * \name input modifiers
839 */
840 /*@{*/
841 /**
842 * For inputs interpreted as floating point, flips the sign bit. For
843 * inputs interpreted as integers, performs the two's complement negation.
844 */
845 bool negate;
846
847 /**
848 * Clears the sign bit for floating point values, and computes the integer
849 * absolute value for integers. Note that the negate modifier acts after
850 * the absolute value modifier, therefore if both are set then all inputs
851 * will become negative.
852 */
853 bool abs;
854 /*@}*/
855
856 /**
857 * For each input component, says which component of the register it is
858 * chosen from. Note that which elements of the swizzle are used and which
859 * are ignored are based on the write mask for most opcodes - for example,
860 * a statement like "foo.xzw = bar.zyx" would have a writemask of 1101b and
861 * a swizzle of {2, x, 1, 0} where x means "don't care."
862 */
863 uint8_t swizzle[NIR_MAX_VEC_COMPONENTS];
864 } nir_alu_src;
865
866 typedef struct {
867 nir_dest dest;
868
869 /**
870 * \name saturate output modifier
871 *
872 * Only valid for opcodes that output floating-point numbers. Clamps the
873 * output to between 0.0 and 1.0 inclusive.
874 */
875
876 bool saturate;
877
878 unsigned write_mask : NIR_MAX_VEC_COMPONENTS; /* ignored if dest.is_ssa is true */
879 } nir_alu_dest;
880
881 /** NIR sized and unsized types
882 *
883 * The values in this enum are carefully chosen so that the sized type is
884 * just the unsized type OR the number of bits.
885 */
886 typedef enum {
887 nir_type_invalid = 0, /* Not a valid type */
888 nir_type_int = 2,
889 nir_type_uint = 4,
890 nir_type_bool = 6,
891 nir_type_float = 128,
892 nir_type_bool1 = 1 | nir_type_bool,
893 nir_type_bool32 = 32 | nir_type_bool,
894 nir_type_int1 = 1 | nir_type_int,
895 nir_type_int8 = 8 | nir_type_int,
896 nir_type_int16 = 16 | nir_type_int,
897 nir_type_int32 = 32 | nir_type_int,
898 nir_type_int64 = 64 | nir_type_int,
899 nir_type_uint1 = 1 | nir_type_uint,
900 nir_type_uint8 = 8 | nir_type_uint,
901 nir_type_uint16 = 16 | nir_type_uint,
902 nir_type_uint32 = 32 | nir_type_uint,
903 nir_type_uint64 = 64 | nir_type_uint,
904 nir_type_float16 = 16 | nir_type_float,
905 nir_type_float32 = 32 | nir_type_float,
906 nir_type_float64 = 64 | nir_type_float,
907 } nir_alu_type;
908
909 #define NIR_ALU_TYPE_SIZE_MASK 0x79
910 #define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
911
912 static inline unsigned
913 nir_alu_type_get_type_size(nir_alu_type type)
914 {
915 return type & NIR_ALU_TYPE_SIZE_MASK;
916 }
917
918 static inline unsigned
919 nir_alu_type_get_base_type(nir_alu_type type)
920 {
921 return type & NIR_ALU_TYPE_BASE_TYPE_MASK;
922 }
923
924 static inline nir_alu_type
925 nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
926 {
927 switch (base_type) {
928 case GLSL_TYPE_BOOL:
929 return nir_type_bool1;
930 break;
931 case GLSL_TYPE_UINT:
932 return nir_type_uint32;
933 break;
934 case GLSL_TYPE_INT:
935 return nir_type_int32;
936 break;
937 case GLSL_TYPE_UINT16:
938 return nir_type_uint16;
939 break;
940 case GLSL_TYPE_INT16:
941 return nir_type_int16;
942 break;
943 case GLSL_TYPE_UINT8:
944 return nir_type_uint8;
945 case GLSL_TYPE_INT8:
946 return nir_type_int8;
947 case GLSL_TYPE_UINT64:
948 return nir_type_uint64;
949 break;
950 case GLSL_TYPE_INT64:
951 return nir_type_int64;
952 break;
953 case GLSL_TYPE_FLOAT:
954 return nir_type_float32;
955 break;
956 case GLSL_TYPE_FLOAT16:
957 return nir_type_float16;
958 break;
959 case GLSL_TYPE_DOUBLE:
960 return nir_type_float64;
961 break;
962
963 case GLSL_TYPE_SAMPLER:
964 case GLSL_TYPE_IMAGE:
965 case GLSL_TYPE_ATOMIC_UINT:
966 case GLSL_TYPE_STRUCT:
967 case GLSL_TYPE_INTERFACE:
968 case GLSL_TYPE_ARRAY:
969 case GLSL_TYPE_VOID:
970 case GLSL_TYPE_SUBROUTINE:
971 case GLSL_TYPE_FUNCTION:
972 case GLSL_TYPE_ERROR:
973 return nir_type_invalid;
974 }
975
976 unreachable("unknown type");
977 }
978
979 static inline nir_alu_type
980 nir_get_nir_type_for_glsl_type(const struct glsl_type *type)
981 {
982 return nir_get_nir_type_for_glsl_base_type(glsl_get_base_type(type));
983 }
984
985 nir_op nir_type_conversion_op(nir_alu_type src, nir_alu_type dst,
986 nir_rounding_mode rnd);
987
988 static inline nir_op
989 nir_op_vec(unsigned components)
990 {
991 switch (components) {
992 case 1: return nir_op_mov;
993 case 2: return nir_op_vec2;
994 case 3: return nir_op_vec3;
995 case 4: return nir_op_vec4;
996 default: unreachable("bad component count");
997 }
998 }
999
1000 static inline bool
1001 nir_is_float_control_signed_zero_inf_nan_preserve(unsigned execution_mode, unsigned bit_size)
1002 {
1003 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP16) ||
1004 (32 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP32) ||
1005 (64 == bit_size && execution_mode & FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE_FP64);
1006 }
1007
1008 static inline bool
1009 nir_is_denorm_flush_to_zero(unsigned execution_mode, unsigned bit_size)
1010 {
1011 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16) ||
1012 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32) ||
1013 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64);
1014 }
1015
1016 static inline bool
1017 nir_is_denorm_preserve(unsigned execution_mode, unsigned bit_size)
1018 {
1019 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) ||
1020 (32 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) ||
1021 (64 == bit_size && execution_mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64);
1022 }
1023
1024 static inline bool
1025 nir_is_rounding_mode_rtne(unsigned execution_mode, unsigned bit_size)
1026 {
1027 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1028 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1029 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1030 }
1031
1032 static inline bool
1033 nir_is_rounding_mode_rtz(unsigned execution_mode, unsigned bit_size)
1034 {
1035 return (16 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1036 (32 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1037 (64 == bit_size && execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1038 }
1039
1040 static inline bool
1041 nir_has_any_rounding_mode_rtz(unsigned execution_mode)
1042 {
1043 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16) ||
1044 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32) ||
1045 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64);
1046 }
1047
1048 static inline bool
1049 nir_has_any_rounding_mode_rtne(unsigned execution_mode)
1050 {
1051 return (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16) ||
1052 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32) ||
1053 (execution_mode & FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64);
1054 }
1055
1056 static inline nir_rounding_mode
1057 nir_get_rounding_mode_from_float_controls(unsigned execution_mode,
1058 nir_alu_type type)
1059 {
1060 if (nir_alu_type_get_base_type(type) != nir_type_float)
1061 return nir_rounding_mode_undef;
1062
1063 unsigned bit_size = nir_alu_type_get_type_size(type);
1064
1065 if (nir_is_rounding_mode_rtz(execution_mode, bit_size))
1066 return nir_rounding_mode_rtz;
1067 if (nir_is_rounding_mode_rtne(execution_mode, bit_size))
1068 return nir_rounding_mode_rtne;
1069 return nir_rounding_mode_undef;
1070 }
1071
1072 static inline bool
1073 nir_has_any_rounding_mode_enabled(unsigned execution_mode)
1074 {
1075 bool result =
1076 nir_has_any_rounding_mode_rtne(execution_mode) ||
1077 nir_has_any_rounding_mode_rtz(execution_mode);
1078 return result;
1079 }
1080
1081 typedef enum {
1082 /**
1083 * Operation where the first two sources are commutative.
1084 *
1085 * For 2-source operations, this just mathematical commutativity. Some
1086 * 3-source operations, like ffma, are only commutative in the first two
1087 * sources.
1088 */
1089 NIR_OP_IS_2SRC_COMMUTATIVE = (1 << 0),
1090 NIR_OP_IS_ASSOCIATIVE = (1 << 1),
1091 } nir_op_algebraic_property;
1092
1093 typedef struct {
1094 const char *name;
1095
1096 unsigned num_inputs;
1097
1098 /**
1099 * The number of components in the output
1100 *
1101 * If non-zero, this is the size of the output and input sizes are
1102 * explicitly given; swizzle and writemask are still in effect, but if
1103 * the output component is masked out, then the input component may
1104 * still be in use.
1105 *
1106 * If zero, the opcode acts in the standard, per-component manner; the
1107 * operation is performed on each component (except the ones that are
1108 * masked out) with the input being taken from the input swizzle for
1109 * that component.
1110 *
1111 * The size of some of the inputs may be given (i.e. non-zero) even
1112 * though output_size is zero; in that case, the inputs with a zero
1113 * size act per-component, while the inputs with non-zero size don't.
1114 */
1115 unsigned output_size;
1116
1117 /**
1118 * The type of vector that the instruction outputs. Note that the
1119 * staurate modifier is only allowed on outputs with the float type.
1120 */
1121
1122 nir_alu_type output_type;
1123
1124 /**
1125 * The number of components in each input
1126 */
1127 unsigned input_sizes[NIR_MAX_VEC_COMPONENTS];
1128
1129 /**
1130 * The type of vector that each input takes. Note that negate and
1131 * absolute value are only allowed on inputs with int or float type and
1132 * behave differently on the two.
1133 */
1134 nir_alu_type input_types[NIR_MAX_VEC_COMPONENTS];
1135
1136 nir_op_algebraic_property algebraic_properties;
1137
1138 /* Whether this represents a numeric conversion opcode */
1139 bool is_conversion;
1140 } nir_op_info;
1141
1142 extern const nir_op_info nir_op_infos[nir_num_opcodes];
1143
1144 typedef struct nir_alu_instr {
1145 nir_instr instr;
1146 nir_op op;
1147
1148 /** Indicates that this ALU instruction generates an exact value
1149 *
1150 * This is kind of a mixture of GLSL "precise" and "invariant" and not
1151 * really equivalent to either. This indicates that the value generated by
1152 * this operation is high-precision and any code transformations that touch
1153 * it must ensure that the resulting value is bit-for-bit identical to the
1154 * original.
1155 */
1156 bool exact:1;
1157
1158 /**
1159 * Indicates that this instruction do not cause wrapping to occur, in the
1160 * form of overflow or underflow.
1161 */
1162 bool no_signed_wrap:1;
1163 bool no_unsigned_wrap:1;
1164
1165 nir_alu_dest dest;
1166 nir_alu_src src[];
1167 } nir_alu_instr;
1168
1169 void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
1170 nir_alu_instr *instr);
1171 void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
1172 nir_alu_instr *instr);
1173
1174 /* is this source channel used? */
1175 static inline bool
1176 nir_alu_instr_channel_used(const nir_alu_instr *instr, unsigned src,
1177 unsigned channel)
1178 {
1179 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1180 return channel < nir_op_infos[instr->op].input_sizes[src];
1181
1182 return (instr->dest.write_mask >> channel) & 1;
1183 }
1184
1185 static inline nir_component_mask_t
1186 nir_alu_instr_src_read_mask(const nir_alu_instr *instr, unsigned src)
1187 {
1188 nir_component_mask_t read_mask = 0;
1189 for (unsigned c = 0; c < NIR_MAX_VEC_COMPONENTS; c++) {
1190 if (!nir_alu_instr_channel_used(instr, src, c))
1191 continue;
1192
1193 read_mask |= (1 << instr->src[src].swizzle[c]);
1194 }
1195 return read_mask;
1196 }
1197
1198 /**
1199 * Get the number of channels used for a source
1200 */
1201 static inline unsigned
1202 nir_ssa_alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1203 {
1204 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1205 return nir_op_infos[instr->op].input_sizes[src];
1206
1207 return nir_dest_num_components(instr->dest.dest);
1208 }
1209
1210 static inline bool
1211 nir_alu_instr_is_comparison(const nir_alu_instr *instr)
1212 {
1213 switch (instr->op) {
1214 case nir_op_flt:
1215 case nir_op_fge:
1216 case nir_op_feq:
1217 case nir_op_fne:
1218 case nir_op_ilt:
1219 case nir_op_ult:
1220 case nir_op_ige:
1221 case nir_op_uge:
1222 case nir_op_ieq:
1223 case nir_op_ine:
1224 case nir_op_i2b1:
1225 case nir_op_f2b1:
1226 case nir_op_inot:
1227 return true;
1228 default:
1229 return false;
1230 }
1231 }
1232
1233 bool nir_const_value_negative_equal(nir_const_value c1, nir_const_value c2,
1234 nir_alu_type full_type);
1235
1236 bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
1237 unsigned src1, unsigned src2);
1238
1239 bool nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
1240 const nir_alu_instr *alu2,
1241 unsigned src1, unsigned src2);
1242
1243 typedef enum {
1244 nir_deref_type_var,
1245 nir_deref_type_array,
1246 nir_deref_type_array_wildcard,
1247 nir_deref_type_ptr_as_array,
1248 nir_deref_type_struct,
1249 nir_deref_type_cast,
1250 } nir_deref_type;
1251
1252 typedef struct {
1253 nir_instr instr;
1254
1255 /** The type of this deref instruction */
1256 nir_deref_type deref_type;
1257
1258 /** The mode of the underlying variable */
1259 nir_variable_mode mode;
1260
1261 /** The dereferenced type of the resulting pointer value */
1262 const struct glsl_type *type;
1263
1264 union {
1265 /** Variable being dereferenced if deref_type is a deref_var */
1266 nir_variable *var;
1267
1268 /** Parent deref if deref_type is not deref_var */
1269 nir_src parent;
1270 };
1271
1272 /** Additional deref parameters */
1273 union {
1274 struct {
1275 nir_src index;
1276 } arr;
1277
1278 struct {
1279 unsigned index;
1280 } strct;
1281
1282 struct {
1283 unsigned ptr_stride;
1284 } cast;
1285 };
1286
1287 /** Destination to store the resulting "pointer" */
1288 nir_dest dest;
1289 } nir_deref_instr;
1290
1291 static inline nir_deref_instr *nir_src_as_deref(nir_src src);
1292
1293 static inline nir_deref_instr *
1294 nir_deref_instr_parent(const nir_deref_instr *instr)
1295 {
1296 if (instr->deref_type == nir_deref_type_var)
1297 return NULL;
1298 else
1299 return nir_src_as_deref(instr->parent);
1300 }
1301
1302 static inline nir_variable *
1303 nir_deref_instr_get_variable(const nir_deref_instr *instr)
1304 {
1305 while (instr->deref_type != nir_deref_type_var) {
1306 if (instr->deref_type == nir_deref_type_cast)
1307 return NULL;
1308
1309 instr = nir_deref_instr_parent(instr);
1310 }
1311
1312 return instr->var;
1313 }
1314
1315 bool nir_deref_instr_has_indirect(nir_deref_instr *instr);
1316 bool nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr);
1317 bool nir_deref_instr_has_complex_use(nir_deref_instr *instr);
1318
1319 bool nir_deref_instr_remove_if_unused(nir_deref_instr *instr);
1320
1321 unsigned nir_deref_instr_ptr_as_array_stride(nir_deref_instr *instr);
1322
1323 typedef struct {
1324 nir_instr instr;
1325
1326 struct nir_function *callee;
1327
1328 unsigned num_params;
1329 nir_src params[];
1330 } nir_call_instr;
1331
1332 #include "nir_intrinsics.h"
1333
1334 #define NIR_INTRINSIC_MAX_CONST_INDEX 4
1335
1336 /** Represents an intrinsic
1337 *
1338 * An intrinsic is an instruction type for handling things that are
1339 * more-or-less regular operations but don't just consume and produce SSA
1340 * values like ALU operations do. Intrinsics are not for things that have
1341 * special semantic meaning such as phi nodes and parallel copies.
1342 * Examples of intrinsics include variable load/store operations, system
1343 * value loads, and the like. Even though texturing more-or-less falls
1344 * under this category, texturing is its own instruction type because
1345 * trying to represent texturing with intrinsics would lead to a
1346 * combinatorial explosion of intrinsic opcodes.
1347 *
1348 * By having a single instruction type for handling a lot of different
1349 * cases, optimization passes can look for intrinsics and, for the most
1350 * part, completely ignore them. Each intrinsic type also has a few
1351 * possible flags that govern whether or not they can be reordered or
1352 * eliminated. That way passes like dead code elimination can still work
1353 * on intrisics without understanding the meaning of each.
1354 *
1355 * Each intrinsic has some number of constant indices, some number of
1356 * variables, and some number of sources. What these sources, variables,
1357 * and indices mean depends on the intrinsic and is documented with the
1358 * intrinsic declaration in nir_intrinsics.h. Intrinsics and texture
1359 * instructions are the only types of instruction that can operate on
1360 * variables.
1361 */
1362 typedef struct {
1363 nir_instr instr;
1364
1365 nir_intrinsic_op intrinsic;
1366
1367 nir_dest dest;
1368
1369 /** number of components if this is a vectorized intrinsic
1370 *
1371 * Similarly to ALU operations, some intrinsics are vectorized.
1372 * An intrinsic is vectorized if nir_intrinsic_infos.dest_components == 0.
1373 * For vectorized intrinsics, the num_components field specifies the
1374 * number of destination components and the number of source components
1375 * for all sources with nir_intrinsic_infos.src_components[i] == 0.
1376 */
1377 uint8_t num_components;
1378
1379 int const_index[NIR_INTRINSIC_MAX_CONST_INDEX];
1380
1381 nir_src src[];
1382 } nir_intrinsic_instr;
1383
1384 static inline nir_variable *
1385 nir_intrinsic_get_var(nir_intrinsic_instr *intrin, unsigned i)
1386 {
1387 return nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[i]));
1388 }
1389
1390 typedef enum {
1391 /* Memory ordering. */
1392 NIR_MEMORY_ACQUIRE = 1 << 0,
1393 NIR_MEMORY_RELEASE = 1 << 1,
1394
1395 /* Memory visibility operations. */
1396 NIR_MEMORY_MAKE_AVAILABLE = 1 << 3,
1397 NIR_MEMORY_MAKE_VISIBLE = 1 << 4,
1398 } nir_memory_semantics;
1399
1400 typedef enum {
1401 NIR_SCOPE_DEVICE,
1402 NIR_SCOPE_QUEUE_FAMILY,
1403 NIR_SCOPE_WORKGROUP,
1404 NIR_SCOPE_SUBGROUP,
1405 NIR_SCOPE_INVOCATION,
1406 } nir_scope;
1407
1408 /**
1409 * \name NIR intrinsics semantic flags
1410 *
1411 * information about what the compiler can do with the intrinsics.
1412 *
1413 * \sa nir_intrinsic_info::flags
1414 */
1415 typedef enum {
1416 /**
1417 * whether the intrinsic can be safely eliminated if none of its output
1418 * value is not being used.
1419 */
1420 NIR_INTRINSIC_CAN_ELIMINATE = (1 << 0),
1421
1422 /**
1423 * Whether the intrinsic can be reordered with respect to any other
1424 * intrinsic, i.e. whether the only reordering dependencies of the
1425 * intrinsic are due to the register reads/writes.
1426 */
1427 NIR_INTRINSIC_CAN_REORDER = (1 << 1),
1428 } nir_intrinsic_semantic_flag;
1429
1430 /**
1431 * \name NIR intrinsics const-index flag
1432 *
1433 * Indicates the usage of a const_index slot.
1434 *
1435 * \sa nir_intrinsic_info::index_map
1436 */
1437 typedef enum {
1438 /**
1439 * Generally instructions that take a offset src argument, can encode
1440 * a constant 'base' value which is added to the offset.
1441 */
1442 NIR_INTRINSIC_BASE = 1,
1443
1444 /**
1445 * For store instructions, a writemask for the store.
1446 */
1447 NIR_INTRINSIC_WRMASK,
1448
1449 /**
1450 * The stream-id for GS emit_vertex/end_primitive intrinsics.
1451 */
1452 NIR_INTRINSIC_STREAM_ID,
1453
1454 /**
1455 * The clip-plane id for load_user_clip_plane intrinsic.
1456 */
1457 NIR_INTRINSIC_UCP_ID,
1458
1459 /**
1460 * The amount of data, starting from BASE, that this instruction may
1461 * access. This is used to provide bounds if the offset is not constant.
1462 */
1463 NIR_INTRINSIC_RANGE,
1464
1465 /**
1466 * The Vulkan descriptor set for vulkan_resource_index intrinsic.
1467 */
1468 NIR_INTRINSIC_DESC_SET,
1469
1470 /**
1471 * The Vulkan descriptor set binding for vulkan_resource_index intrinsic.
1472 */
1473 NIR_INTRINSIC_BINDING,
1474
1475 /**
1476 * Component offset.
1477 */
1478 NIR_INTRINSIC_COMPONENT,
1479
1480 /**
1481 * Interpolation mode (only meaningful for FS inputs).
1482 */
1483 NIR_INTRINSIC_INTERP_MODE,
1484
1485 /**
1486 * A binary nir_op to use when performing a reduction or scan operation
1487 */
1488 NIR_INTRINSIC_REDUCTION_OP,
1489
1490 /**
1491 * Cluster size for reduction operations
1492 */
1493 NIR_INTRINSIC_CLUSTER_SIZE,
1494
1495 /**
1496 * Parameter index for a load_param intrinsic
1497 */
1498 NIR_INTRINSIC_PARAM_IDX,
1499
1500 /**
1501 * Image dimensionality for image intrinsics
1502 *
1503 * One of GLSL_SAMPLER_DIM_*
1504 */
1505 NIR_INTRINSIC_IMAGE_DIM,
1506
1507 /**
1508 * Non-zero if we are accessing an array image
1509 */
1510 NIR_INTRINSIC_IMAGE_ARRAY,
1511
1512 /**
1513 * Image format for image intrinsics
1514 */
1515 NIR_INTRINSIC_FORMAT,
1516
1517 /**
1518 * Access qualifiers for image and memory access intrinsics
1519 */
1520 NIR_INTRINSIC_ACCESS,
1521
1522 /**
1523 * Alignment for offsets and addresses
1524 *
1525 * These two parameters, specify an alignment in terms of a multiplier and
1526 * an offset. The offset or address parameter X of the intrinsic is
1527 * guaranteed to satisfy the following:
1528 *
1529 * (X - align_offset) % align_mul == 0
1530 */
1531 NIR_INTRINSIC_ALIGN_MUL,
1532 NIR_INTRINSIC_ALIGN_OFFSET,
1533
1534 /**
1535 * The Vulkan descriptor type for a vulkan_resource_[re]index intrinsic.
1536 */
1537 NIR_INTRINSIC_DESC_TYPE,
1538
1539 /**
1540 * The nir_alu_type of a uniform/input/output
1541 */
1542 NIR_INTRINSIC_TYPE,
1543
1544 /**
1545 * The swizzle mask for the instructions
1546 * SwizzleInvocationsAMD and SwizzleInvocationsMaskedAMD
1547 */
1548 NIR_INTRINSIC_SWIZZLE_MASK,
1549
1550 /* Separate source/dest access flags for copies */
1551 NIR_INTRINSIC_SRC_ACCESS,
1552 NIR_INTRINSIC_DST_ACCESS,
1553
1554 /* Driver location for nir_load_patch_location_ir3 */
1555 NIR_INTRINSIC_DRIVER_LOCATION,
1556
1557 /**
1558 * Mask of nir_memory_semantics, includes ordering and visibility.
1559 */
1560 NIR_INTRINSIC_MEMORY_SEMANTICS,
1561
1562 /**
1563 * Mask of nir_variable_modes affected by the memory operation.
1564 */
1565 NIR_INTRINSIC_MEMORY_MODES,
1566
1567 /**
1568 * Value of nir_scope.
1569 */
1570 NIR_INTRINSIC_MEMORY_SCOPE,
1571
1572 NIR_INTRINSIC_NUM_INDEX_FLAGS,
1573
1574 } nir_intrinsic_index_flag;
1575
1576 #define NIR_INTRINSIC_MAX_INPUTS 5
1577
1578 typedef struct {
1579 const char *name;
1580
1581 unsigned num_srcs; /** < number of register/SSA inputs */
1582
1583 /** number of components of each input register
1584 *
1585 * If this value is 0, the number of components is given by the
1586 * num_components field of nir_intrinsic_instr. If this value is -1, the
1587 * intrinsic consumes however many components are provided and it is not
1588 * validated at all.
1589 */
1590 int src_components[NIR_INTRINSIC_MAX_INPUTS];
1591
1592 bool has_dest;
1593
1594 /** number of components of the output register
1595 *
1596 * If this value is 0, the number of components is given by the
1597 * num_components field of nir_intrinsic_instr.
1598 */
1599 unsigned dest_components;
1600
1601 /** bitfield of legal bit sizes */
1602 unsigned dest_bit_sizes;
1603
1604 /** the number of constant indices used by the intrinsic */
1605 unsigned num_indices;
1606
1607 /** indicates the usage of intr->const_index[n] */
1608 unsigned index_map[NIR_INTRINSIC_NUM_INDEX_FLAGS];
1609
1610 /** semantic flags for calls to this intrinsic */
1611 nir_intrinsic_semantic_flag flags;
1612 } nir_intrinsic_info;
1613
1614 extern const nir_intrinsic_info nir_intrinsic_infos[nir_num_intrinsics];
1615
1616 static inline unsigned
1617 nir_intrinsic_src_components(nir_intrinsic_instr *intr, unsigned srcn)
1618 {
1619 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1620 assert(srcn < info->num_srcs);
1621 if (info->src_components[srcn] > 0)
1622 return info->src_components[srcn];
1623 else if (info->src_components[srcn] == 0)
1624 return intr->num_components;
1625 else
1626 return nir_src_num_components(intr->src[srcn]);
1627 }
1628
1629 static inline unsigned
1630 nir_intrinsic_dest_components(nir_intrinsic_instr *intr)
1631 {
1632 const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
1633 if (!info->has_dest)
1634 return 0;
1635 else if (info->dest_components)
1636 return info->dest_components;
1637 else
1638 return intr->num_components;
1639 }
1640
1641 #define INTRINSIC_IDX_ACCESSORS(name, flag, type) \
1642 static inline type \
1643 nir_intrinsic_##name(const nir_intrinsic_instr *instr) \
1644 { \
1645 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1646 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1647 return (type)instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1]; \
1648 } \
1649 static inline void \
1650 nir_intrinsic_set_##name(nir_intrinsic_instr *instr, type val) \
1651 { \
1652 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; \
1653 assert(info->index_map[NIR_INTRINSIC_##flag] > 0); \
1654 instr->const_index[info->index_map[NIR_INTRINSIC_##flag] - 1] = val; \
1655 }
1656
1657 INTRINSIC_IDX_ACCESSORS(write_mask, WRMASK, unsigned)
1658 INTRINSIC_IDX_ACCESSORS(base, BASE, int)
1659 INTRINSIC_IDX_ACCESSORS(stream_id, STREAM_ID, unsigned)
1660 INTRINSIC_IDX_ACCESSORS(ucp_id, UCP_ID, unsigned)
1661 INTRINSIC_IDX_ACCESSORS(range, RANGE, unsigned)
1662 INTRINSIC_IDX_ACCESSORS(desc_set, DESC_SET, unsigned)
1663 INTRINSIC_IDX_ACCESSORS(binding, BINDING, unsigned)
1664 INTRINSIC_IDX_ACCESSORS(component, COMPONENT, unsigned)
1665 INTRINSIC_IDX_ACCESSORS(interp_mode, INTERP_MODE, unsigned)
1666 INTRINSIC_IDX_ACCESSORS(reduction_op, REDUCTION_OP, unsigned)
1667 INTRINSIC_IDX_ACCESSORS(cluster_size, CLUSTER_SIZE, unsigned)
1668 INTRINSIC_IDX_ACCESSORS(param_idx, PARAM_IDX, unsigned)
1669 INTRINSIC_IDX_ACCESSORS(image_dim, IMAGE_DIM, enum glsl_sampler_dim)
1670 INTRINSIC_IDX_ACCESSORS(image_array, IMAGE_ARRAY, bool)
1671 INTRINSIC_IDX_ACCESSORS(access, ACCESS, enum gl_access_qualifier)
1672 INTRINSIC_IDX_ACCESSORS(src_access, SRC_ACCESS, enum gl_access_qualifier)
1673 INTRINSIC_IDX_ACCESSORS(dst_access, DST_ACCESS, enum gl_access_qualifier)
1674 INTRINSIC_IDX_ACCESSORS(format, FORMAT, unsigned)
1675 INTRINSIC_IDX_ACCESSORS(align_mul, ALIGN_MUL, unsigned)
1676 INTRINSIC_IDX_ACCESSORS(align_offset, ALIGN_OFFSET, unsigned)
1677 INTRINSIC_IDX_ACCESSORS(desc_type, DESC_TYPE, unsigned)
1678 INTRINSIC_IDX_ACCESSORS(type, TYPE, nir_alu_type)
1679 INTRINSIC_IDX_ACCESSORS(swizzle_mask, SWIZZLE_MASK, unsigned)
1680 INTRINSIC_IDX_ACCESSORS(driver_location, DRIVER_LOCATION, unsigned)
1681 INTRINSIC_IDX_ACCESSORS(memory_semantics, MEMORY_SEMANTICS, nir_memory_semantics)
1682 INTRINSIC_IDX_ACCESSORS(memory_modes, MEMORY_MODES, nir_variable_mode)
1683 INTRINSIC_IDX_ACCESSORS(memory_scope, MEMORY_SCOPE, nir_scope)
1684
1685 static inline void
1686 nir_intrinsic_set_align(nir_intrinsic_instr *intrin,
1687 unsigned align_mul, unsigned align_offset)
1688 {
1689 assert(util_is_power_of_two_nonzero(align_mul));
1690 assert(align_offset < align_mul);
1691 nir_intrinsic_set_align_mul(intrin, align_mul);
1692 nir_intrinsic_set_align_offset(intrin, align_offset);
1693 }
1694
1695 /** Returns a simple alignment for a load/store intrinsic offset
1696 *
1697 * Instead of the full mul+offset alignment scheme provided by the ALIGN_MUL
1698 * and ALIGN_OFFSET parameters, this helper takes both into account and
1699 * provides a single simple alignment parameter. The offset X is guaranteed
1700 * to satisfy X % align == 0.
1701 */
1702 static inline unsigned
1703 nir_intrinsic_align(const nir_intrinsic_instr *intrin)
1704 {
1705 const unsigned align_mul = nir_intrinsic_align_mul(intrin);
1706 const unsigned align_offset = nir_intrinsic_align_offset(intrin);
1707 assert(align_offset < align_mul);
1708 return align_offset ? 1 << (ffs(align_offset) - 1) : align_mul;
1709 }
1710
1711 /* Converts a image_deref_* intrinsic into a image_* one */
1712 void nir_rewrite_image_intrinsic(nir_intrinsic_instr *instr,
1713 nir_ssa_def *handle, bool bindless);
1714
1715 /* Determine if an intrinsic can be arbitrarily reordered and eliminated. */
1716 static inline bool
1717 nir_intrinsic_can_reorder(nir_intrinsic_instr *instr)
1718 {
1719 if (instr->intrinsic == nir_intrinsic_load_deref ||
1720 instr->intrinsic == nir_intrinsic_load_ssbo ||
1721 instr->intrinsic == nir_intrinsic_bindless_image_load ||
1722 instr->intrinsic == nir_intrinsic_image_deref_load ||
1723 instr->intrinsic == nir_intrinsic_image_load) {
1724 return nir_intrinsic_access(instr) & ACCESS_CAN_REORDER;
1725 } else {
1726 const nir_intrinsic_info *info =
1727 &nir_intrinsic_infos[instr->intrinsic];
1728 return (info->flags & NIR_INTRINSIC_CAN_ELIMINATE) &&
1729 (info->flags & NIR_INTRINSIC_CAN_REORDER);
1730 }
1731 }
1732
1733 /**
1734 * \group texture information
1735 *
1736 * This gives semantic information about textures which is useful to the
1737 * frontend, the backend, and lowering passes, but not the optimizer.
1738 */
1739
1740 typedef enum {
1741 nir_tex_src_coord,
1742 nir_tex_src_projector,
1743 nir_tex_src_comparator, /* shadow comparator */
1744 nir_tex_src_offset,
1745 nir_tex_src_bias,
1746 nir_tex_src_lod,
1747 nir_tex_src_min_lod,
1748 nir_tex_src_ms_index, /* MSAA sample index */
1749 nir_tex_src_ms_mcs, /* MSAA compression value */
1750 nir_tex_src_ddx,
1751 nir_tex_src_ddy,
1752 nir_tex_src_texture_deref, /* < deref pointing to the texture */
1753 nir_tex_src_sampler_deref, /* < deref pointing to the sampler */
1754 nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */
1755 nir_tex_src_sampler_offset, /* < dynamically uniform indirect offset */
1756 nir_tex_src_texture_handle, /* < bindless texture handle */
1757 nir_tex_src_sampler_handle, /* < bindless sampler handle */
1758 nir_tex_src_plane, /* < selects plane for planar textures */
1759 nir_num_tex_src_types
1760 } nir_tex_src_type;
1761
1762 typedef struct {
1763 nir_src src;
1764 nir_tex_src_type src_type;
1765 } nir_tex_src;
1766
1767 typedef enum {
1768 nir_texop_tex, /**< Regular texture look-up */
1769 nir_texop_txb, /**< Texture look-up with LOD bias */
1770 nir_texop_txl, /**< Texture look-up with explicit LOD */
1771 nir_texop_txd, /**< Texture look-up with partial derivatives */
1772 nir_texop_txf, /**< Texel fetch with explicit LOD */
1773 nir_texop_txf_ms, /**< Multisample texture fetch */
1774 nir_texop_txf_ms_fb, /**< Multisample texture fetch from framebuffer */
1775 nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */
1776 nir_texop_txs, /**< Texture size */
1777 nir_texop_lod, /**< Texture lod query */
1778 nir_texop_tg4, /**< Texture gather */
1779 nir_texop_query_levels, /**< Texture levels query */
1780 nir_texop_texture_samples, /**< Texture samples query */
1781 nir_texop_samples_identical, /**< Query whether all samples are definitely
1782 * identical.
1783 */
1784 nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */
1785 } nir_texop;
1786
1787 typedef struct {
1788 nir_instr instr;
1789
1790 enum glsl_sampler_dim sampler_dim;
1791 nir_alu_type dest_type;
1792
1793 nir_texop op;
1794 nir_dest dest;
1795 nir_tex_src *src;
1796 unsigned num_srcs, coord_components;
1797 bool is_array, is_shadow;
1798
1799 /**
1800 * If is_shadow is true, whether this is the old-style shadow that outputs 4
1801 * components or the new-style shadow that outputs 1 component.
1802 */
1803 bool is_new_style_shadow;
1804
1805 /* gather component selector */
1806 unsigned component : 2;
1807
1808 /* gather offsets */
1809 int8_t tg4_offsets[4][2];
1810
1811 /* True if the texture index or handle is not dynamically uniform */
1812 bool texture_non_uniform;
1813
1814 /* True if the sampler index or handle is not dynamically uniform */
1815 bool sampler_non_uniform;
1816
1817 /** The texture index
1818 *
1819 * If this texture instruction has a nir_tex_src_texture_offset source,
1820 * then the texture index is given by texture_index + texture_offset.
1821 */
1822 unsigned texture_index;
1823
1824 /** The size of the texture array or 0 if it's not an array */
1825 unsigned texture_array_size;
1826
1827 /** The sampler index
1828 *
1829 * The following operations do not require a sampler and, as such, this
1830 * field should be ignored:
1831 * - nir_texop_txf
1832 * - nir_texop_txf_ms
1833 * - nir_texop_txs
1834 * - nir_texop_lod
1835 * - nir_texop_query_levels
1836 * - nir_texop_texture_samples
1837 * - nir_texop_samples_identical
1838 *
1839 * If this texture instruction has a nir_tex_src_sampler_offset source,
1840 * then the sampler index is given by sampler_index + sampler_offset.
1841 */
1842 unsigned sampler_index;
1843 } nir_tex_instr;
1844
1845 static inline unsigned
1846 nir_tex_instr_dest_size(const nir_tex_instr *instr)
1847 {
1848 switch (instr->op) {
1849 case nir_texop_txs: {
1850 unsigned ret;
1851 switch (instr->sampler_dim) {
1852 case GLSL_SAMPLER_DIM_1D:
1853 case GLSL_SAMPLER_DIM_BUF:
1854 ret = 1;
1855 break;
1856 case GLSL_SAMPLER_DIM_2D:
1857 case GLSL_SAMPLER_DIM_CUBE:
1858 case GLSL_SAMPLER_DIM_MS:
1859 case GLSL_SAMPLER_DIM_RECT:
1860 case GLSL_SAMPLER_DIM_EXTERNAL:
1861 case GLSL_SAMPLER_DIM_SUBPASS:
1862 ret = 2;
1863 break;
1864 case GLSL_SAMPLER_DIM_3D:
1865 ret = 3;
1866 break;
1867 default:
1868 unreachable("not reached");
1869 }
1870 if (instr->is_array)
1871 ret++;
1872 return ret;
1873 }
1874
1875 case nir_texop_lod:
1876 return 2;
1877
1878 case nir_texop_texture_samples:
1879 case nir_texop_query_levels:
1880 case nir_texop_samples_identical:
1881 return 1;
1882
1883 default:
1884 if (instr->is_shadow && instr->is_new_style_shadow)
1885 return 1;
1886
1887 return 4;
1888 }
1889 }
1890
1891 /* Returns true if this texture operation queries something about the texture
1892 * rather than actually sampling it.
1893 */
1894 static inline bool
1895 nir_tex_instr_is_query(const nir_tex_instr *instr)
1896 {
1897 switch (instr->op) {
1898 case nir_texop_txs:
1899 case nir_texop_lod:
1900 case nir_texop_texture_samples:
1901 case nir_texop_query_levels:
1902 case nir_texop_txf_ms_mcs:
1903 return true;
1904 case nir_texop_tex:
1905 case nir_texop_txb:
1906 case nir_texop_txl:
1907 case nir_texop_txd:
1908 case nir_texop_txf:
1909 case nir_texop_txf_ms:
1910 case nir_texop_txf_ms_fb:
1911 case nir_texop_tg4:
1912 return false;
1913 default:
1914 unreachable("Invalid texture opcode");
1915 }
1916 }
1917
1918 static inline bool
1919 nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr)
1920 {
1921 switch (instr->op) {
1922 case nir_texop_tex:
1923 case nir_texop_txb:
1924 case nir_texop_lod:
1925 return true;
1926 default:
1927 return false;
1928 }
1929 }
1930
1931 static inline nir_alu_type
1932 nir_tex_instr_src_type(const nir_tex_instr *instr, unsigned src)
1933 {
1934 switch (instr->src[src].src_type) {
1935 case nir_tex_src_coord:
1936 switch (instr->op) {
1937 case nir_texop_txf:
1938 case nir_texop_txf_ms:
1939 case nir_texop_txf_ms_fb:
1940 case nir_texop_txf_ms_mcs:
1941 case nir_texop_samples_identical:
1942 return nir_type_int;
1943
1944 default:
1945 return nir_type_float;
1946 }
1947
1948 case nir_tex_src_lod:
1949 switch (instr->op) {
1950 case nir_texop_txs:
1951 case nir_texop_txf:
1952 return nir_type_int;
1953
1954 default:
1955 return nir_type_float;
1956 }
1957
1958 case nir_tex_src_projector:
1959 case nir_tex_src_comparator:
1960 case nir_tex_src_bias:
1961 case nir_tex_src_min_lod:
1962 case nir_tex_src_ddx:
1963 case nir_tex_src_ddy:
1964 return nir_type_float;
1965
1966 case nir_tex_src_offset:
1967 case nir_tex_src_ms_index:
1968 case nir_tex_src_plane:
1969 return nir_type_int;
1970
1971 case nir_tex_src_ms_mcs:
1972 case nir_tex_src_texture_deref:
1973 case nir_tex_src_sampler_deref:
1974 case nir_tex_src_texture_offset:
1975 case nir_tex_src_sampler_offset:
1976 case nir_tex_src_texture_handle:
1977 case nir_tex_src_sampler_handle:
1978 return nir_type_uint;
1979
1980 case nir_num_tex_src_types:
1981 unreachable("nir_num_tex_src_types is not a valid source type");
1982 }
1983
1984 unreachable("Invalid texture source type");
1985 }
1986
1987 static inline unsigned
1988 nir_tex_instr_src_size(const nir_tex_instr *instr, unsigned src)
1989 {
1990 if (instr->src[src].src_type == nir_tex_src_coord)
1991 return instr->coord_components;
1992
1993 /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */
1994 if (instr->src[src].src_type == nir_tex_src_ms_mcs)
1995 return 4;
1996
1997 if (instr->src[src].src_type == nir_tex_src_ddx ||
1998 instr->src[src].src_type == nir_tex_src_ddy) {
1999 if (instr->is_array)
2000 return instr->coord_components - 1;
2001 else
2002 return instr->coord_components;
2003 }
2004
2005 /* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
2006 * the offset, since a cube maps to a single face.
2007 */
2008 if (instr->src[src].src_type == nir_tex_src_offset) {
2009 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
2010 return 2;
2011 else if (instr->is_array)
2012 return instr->coord_components - 1;
2013 else
2014 return instr->coord_components;
2015 }
2016
2017 return 1;
2018 }
2019
2020 static inline int
2021 nir_tex_instr_src_index(const nir_tex_instr *instr, nir_tex_src_type type)
2022 {
2023 for (unsigned i = 0; i < instr->num_srcs; i++)
2024 if (instr->src[i].src_type == type)
2025 return (int) i;
2026
2027 return -1;
2028 }
2029
2030 void nir_tex_instr_add_src(nir_tex_instr *tex,
2031 nir_tex_src_type src_type,
2032 nir_src src);
2033
2034 void nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx);
2035
2036 bool nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex);
2037
2038 typedef struct {
2039 nir_instr instr;
2040
2041 nir_ssa_def def;
2042
2043 nir_const_value value[];
2044 } nir_load_const_instr;
2045
2046 typedef enum {
2047 nir_jump_return,
2048 nir_jump_break,
2049 nir_jump_continue,
2050 } nir_jump_type;
2051
2052 typedef struct {
2053 nir_instr instr;
2054 nir_jump_type type;
2055 } nir_jump_instr;
2056
2057 /* creates a new SSA variable in an undefined state */
2058
2059 typedef struct {
2060 nir_instr instr;
2061 nir_ssa_def def;
2062 } nir_ssa_undef_instr;
2063
2064 typedef struct {
2065 struct exec_node node;
2066
2067 /* The predecessor block corresponding to this source */
2068 struct nir_block *pred;
2069
2070 nir_src src;
2071 } nir_phi_src;
2072
2073 #define nir_foreach_phi_src(phi_src, phi) \
2074 foreach_list_typed(nir_phi_src, phi_src, node, &(phi)->srcs)
2075 #define nir_foreach_phi_src_safe(phi_src, phi) \
2076 foreach_list_typed_safe(nir_phi_src, phi_src, node, &(phi)->srcs)
2077
2078 typedef struct {
2079 nir_instr instr;
2080
2081 struct exec_list srcs; /** < list of nir_phi_src */
2082
2083 nir_dest dest;
2084 } nir_phi_instr;
2085
2086 typedef struct {
2087 struct exec_node node;
2088 nir_src src;
2089 nir_dest dest;
2090 } nir_parallel_copy_entry;
2091
2092 #define nir_foreach_parallel_copy_entry(entry, pcopy) \
2093 foreach_list_typed(nir_parallel_copy_entry, entry, node, &(pcopy)->entries)
2094
2095 typedef struct {
2096 nir_instr instr;
2097
2098 /* A list of nir_parallel_copy_entrys. The sources of all of the
2099 * entries are copied to the corresponding destinations "in parallel".
2100 * In other words, if we have two entries: a -> b and b -> a, the values
2101 * get swapped.
2102 */
2103 struct exec_list entries;
2104 } nir_parallel_copy_instr;
2105
2106 NIR_DEFINE_CAST(nir_instr_as_alu, nir_instr, nir_alu_instr, instr,
2107 type, nir_instr_type_alu)
2108 NIR_DEFINE_CAST(nir_instr_as_deref, nir_instr, nir_deref_instr, instr,
2109 type, nir_instr_type_deref)
2110 NIR_DEFINE_CAST(nir_instr_as_call, nir_instr, nir_call_instr, instr,
2111 type, nir_instr_type_call)
2112 NIR_DEFINE_CAST(nir_instr_as_jump, nir_instr, nir_jump_instr, instr,
2113 type, nir_instr_type_jump)
2114 NIR_DEFINE_CAST(nir_instr_as_tex, nir_instr, nir_tex_instr, instr,
2115 type, nir_instr_type_tex)
2116 NIR_DEFINE_CAST(nir_instr_as_intrinsic, nir_instr, nir_intrinsic_instr, instr,
2117 type, nir_instr_type_intrinsic)
2118 NIR_DEFINE_CAST(nir_instr_as_load_const, nir_instr, nir_load_const_instr, instr,
2119 type, nir_instr_type_load_const)
2120 NIR_DEFINE_CAST(nir_instr_as_ssa_undef, nir_instr, nir_ssa_undef_instr, instr,
2121 type, nir_instr_type_ssa_undef)
2122 NIR_DEFINE_CAST(nir_instr_as_phi, nir_instr, nir_phi_instr, instr,
2123 type, nir_instr_type_phi)
2124 NIR_DEFINE_CAST(nir_instr_as_parallel_copy, nir_instr,
2125 nir_parallel_copy_instr, instr,
2126 type, nir_instr_type_parallel_copy)
2127
2128
2129 #define NIR_DEFINE_SRC_AS_CONST(type, suffix) \
2130 static inline type \
2131 nir_src_comp_as_##suffix(nir_src src, unsigned comp) \
2132 { \
2133 assert(nir_src_is_const(src)); \
2134 nir_load_const_instr *load = \
2135 nir_instr_as_load_const(src.ssa->parent_instr); \
2136 assert(comp < load->def.num_components); \
2137 return nir_const_value_as_##suffix(load->value[comp], \
2138 load->def.bit_size); \
2139 } \
2140 \
2141 static inline type \
2142 nir_src_as_##suffix(nir_src src) \
2143 { \
2144 assert(nir_src_num_components(src) == 1); \
2145 return nir_src_comp_as_##suffix(src, 0); \
2146 }
2147
2148 NIR_DEFINE_SRC_AS_CONST(int64_t, int)
2149 NIR_DEFINE_SRC_AS_CONST(uint64_t, uint)
2150 NIR_DEFINE_SRC_AS_CONST(bool, bool)
2151 NIR_DEFINE_SRC_AS_CONST(double, float)
2152
2153 #undef NIR_DEFINE_SRC_AS_CONST
2154
2155
2156 typedef struct {
2157 nir_ssa_def *def;
2158 unsigned comp;
2159 } nir_ssa_scalar;
2160
2161 static inline bool
2162 nir_ssa_scalar_is_const(nir_ssa_scalar s)
2163 {
2164 return s.def->parent_instr->type == nir_instr_type_load_const;
2165 }
2166
2167 static inline nir_const_value
2168 nir_ssa_scalar_as_const_value(nir_ssa_scalar s)
2169 {
2170 assert(s.comp < s.def->num_components);
2171 nir_load_const_instr *load = nir_instr_as_load_const(s.def->parent_instr);
2172 return load->value[s.comp];
2173 }
2174
2175 #define NIR_DEFINE_SCALAR_AS_CONST(type, suffix) \
2176 static inline type \
2177 nir_ssa_scalar_as_##suffix(nir_ssa_scalar s) \
2178 { \
2179 return nir_const_value_as_##suffix( \
2180 nir_ssa_scalar_as_const_value(s), s.def->bit_size); \
2181 }
2182
2183 NIR_DEFINE_SCALAR_AS_CONST(int64_t, int)
2184 NIR_DEFINE_SCALAR_AS_CONST(uint64_t, uint)
2185 NIR_DEFINE_SCALAR_AS_CONST(bool, bool)
2186 NIR_DEFINE_SCALAR_AS_CONST(double, float)
2187
2188 #undef NIR_DEFINE_SCALAR_AS_CONST
2189
2190 static inline bool
2191 nir_ssa_scalar_is_alu(nir_ssa_scalar s)
2192 {
2193 return s.def->parent_instr->type == nir_instr_type_alu;
2194 }
2195
2196 static inline nir_op
2197 nir_ssa_scalar_alu_op(nir_ssa_scalar s)
2198 {
2199 return nir_instr_as_alu(s.def->parent_instr)->op;
2200 }
2201
2202 static inline nir_ssa_scalar
2203 nir_ssa_scalar_chase_alu_src(nir_ssa_scalar s, unsigned alu_src_idx)
2204 {
2205 nir_ssa_scalar out = { NULL, 0 };
2206
2207 nir_alu_instr *alu = nir_instr_as_alu(s.def->parent_instr);
2208 assert(alu_src_idx < nir_op_infos[alu->op].num_inputs);
2209
2210 /* Our component must be written */
2211 assert(s.comp < s.def->num_components);
2212 assert(alu->dest.write_mask & (1u << s.comp));
2213
2214 assert(alu->src[alu_src_idx].src.is_ssa);
2215 out.def = alu->src[alu_src_idx].src.ssa;
2216
2217 if (nir_op_infos[alu->op].input_sizes[alu_src_idx] == 0) {
2218 /* The ALU src is unsized so the source component follows the
2219 * destination component.
2220 */
2221 out.comp = alu->src[alu_src_idx].swizzle[s.comp];
2222 } else {
2223 /* This is a sized source so all source components work together to
2224 * produce all the destination components. Since we need to return a
2225 * scalar, this only works if the source is a scalar.
2226 */
2227 assert(nir_op_infos[alu->op].input_sizes[alu_src_idx] == 1);
2228 out.comp = alu->src[alu_src_idx].swizzle[0];
2229 }
2230 assert(out.comp < out.def->num_components);
2231
2232 return out;
2233 }
2234
2235
2236 /*
2237 * Control flow
2238 *
2239 * Control flow consists of a tree of control flow nodes, which include
2240 * if-statements and loops. The leaves of the tree are basic blocks, lists of
2241 * instructions that always run start-to-finish. Each basic block also keeps
2242 * track of its successors (blocks which may run immediately after the current
2243 * block) and predecessors (blocks which could have run immediately before the
2244 * current block). Each function also has a start block and an end block which
2245 * all return statements point to (which is always empty). Together, all the
2246 * blocks with their predecessors and successors make up the control flow
2247 * graph (CFG) of the function. There are helpers that modify the tree of
2248 * control flow nodes while modifying the CFG appropriately; these should be
2249 * used instead of modifying the tree directly.
2250 */
2251
2252 typedef enum {
2253 nir_cf_node_block,
2254 nir_cf_node_if,
2255 nir_cf_node_loop,
2256 nir_cf_node_function
2257 } nir_cf_node_type;
2258
2259 typedef struct nir_cf_node {
2260 struct exec_node node;
2261 nir_cf_node_type type;
2262 struct nir_cf_node *parent;
2263 } nir_cf_node;
2264
2265 typedef struct nir_block {
2266 nir_cf_node cf_node;
2267
2268 struct exec_list instr_list; /** < list of nir_instr */
2269
2270 /** generic block index; generated by nir_index_blocks */
2271 unsigned index;
2272
2273 /*
2274 * Each block can only have up to 2 successors, so we put them in a simple
2275 * array - no need for anything more complicated.
2276 */
2277 struct nir_block *successors[2];
2278
2279 /* Set of nir_block predecessors in the CFG */
2280 struct set *predecessors;
2281
2282 /*
2283 * this node's immediate dominator in the dominance tree - set to NULL for
2284 * the start block.
2285 */
2286 struct nir_block *imm_dom;
2287
2288 /* This node's children in the dominance tree */
2289 unsigned num_dom_children;
2290 struct nir_block **dom_children;
2291
2292 /* Set of nir_blocks on the dominance frontier of this block */
2293 struct set *dom_frontier;
2294
2295 /*
2296 * These two indices have the property that dom_{pre,post}_index for each
2297 * child of this block in the dominance tree will always be between
2298 * dom_pre_index and dom_post_index for this block, which makes testing if
2299 * a given block is dominated by another block an O(1) operation.
2300 */
2301 unsigned dom_pre_index, dom_post_index;
2302
2303 /* live in and out for this block; used for liveness analysis */
2304 BITSET_WORD *live_in;
2305 BITSET_WORD *live_out;
2306 } nir_block;
2307
2308 static inline nir_instr *
2309 nir_block_first_instr(nir_block *block)
2310 {
2311 struct exec_node *head = exec_list_get_head(&block->instr_list);
2312 return exec_node_data(nir_instr, head, node);
2313 }
2314
2315 static inline nir_instr *
2316 nir_block_last_instr(nir_block *block)
2317 {
2318 struct exec_node *tail = exec_list_get_tail(&block->instr_list);
2319 return exec_node_data(nir_instr, tail, node);
2320 }
2321
2322 static inline bool
2323 nir_block_ends_in_jump(nir_block *block)
2324 {
2325 return !exec_list_is_empty(&block->instr_list) &&
2326 nir_block_last_instr(block)->type == nir_instr_type_jump;
2327 }
2328
2329 #define nir_foreach_instr(instr, block) \
2330 foreach_list_typed(nir_instr, instr, node, &(block)->instr_list)
2331 #define nir_foreach_instr_reverse(instr, block) \
2332 foreach_list_typed_reverse(nir_instr, instr, node, &(block)->instr_list)
2333 #define nir_foreach_instr_safe(instr, block) \
2334 foreach_list_typed_safe(nir_instr, instr, node, &(block)->instr_list)
2335 #define nir_foreach_instr_reverse_safe(instr, block) \
2336 foreach_list_typed_reverse_safe(nir_instr, instr, node, &(block)->instr_list)
2337
2338 typedef enum {
2339 nir_selection_control_none = 0x0,
2340 nir_selection_control_flatten = 0x1,
2341 nir_selection_control_dont_flatten = 0x2,
2342 } nir_selection_control;
2343
2344 typedef struct nir_if {
2345 nir_cf_node cf_node;
2346 nir_src condition;
2347 nir_selection_control control;
2348
2349 struct exec_list then_list; /** < list of nir_cf_node */
2350 struct exec_list else_list; /** < list of nir_cf_node */
2351 } nir_if;
2352
2353 typedef struct {
2354 nir_if *nif;
2355
2356 /** Instruction that generates nif::condition. */
2357 nir_instr *conditional_instr;
2358
2359 /** Block within ::nif that has the break instruction. */
2360 nir_block *break_block;
2361
2362 /** Last block for the then- or else-path that does not contain the break. */
2363 nir_block *continue_from_block;
2364
2365 /** True when ::break_block is in the else-path of ::nif. */
2366 bool continue_from_then;
2367 bool induction_rhs;
2368
2369 /* This is true if the terminators exact trip count is unknown. For
2370 * example:
2371 *
2372 * for (int i = 0; i < imin(x, 4); i++)
2373 * ...
2374 *
2375 * Here loop analysis would have set a max_trip_count of 4 however we dont
2376 * know for sure that this is the exact trip count.
2377 */
2378 bool exact_trip_count_unknown;
2379
2380 struct list_head loop_terminator_link;
2381 } nir_loop_terminator;
2382
2383 typedef struct {
2384 /* Estimated cost (in number of instructions) of the loop */
2385 unsigned instr_cost;
2386
2387 /* Guessed trip count based on array indexing */
2388 unsigned guessed_trip_count;
2389
2390 /* Maximum number of times the loop is run (if known) */
2391 unsigned max_trip_count;
2392
2393 /* Do we know the exact number of times the loop will be run */
2394 bool exact_trip_count_known;
2395
2396 /* Unroll the loop regardless of its size */
2397 bool force_unroll;
2398
2399 /* Does the loop contain complex loop terminators, continues or other
2400 * complex behaviours? If this is true we can't rely on
2401 * loop_terminator_list to be complete or accurate.
2402 */
2403 bool complex_loop;
2404
2405 nir_loop_terminator *limiting_terminator;
2406
2407 /* A list of loop_terminators terminating this loop. */
2408 struct list_head loop_terminator_list;
2409 } nir_loop_info;
2410
2411 typedef enum {
2412 nir_loop_control_none = 0x0,
2413 nir_loop_control_unroll = 0x1,
2414 nir_loop_control_dont_unroll = 0x2,
2415 } nir_loop_control;
2416
2417 typedef struct {
2418 nir_cf_node cf_node;
2419
2420 struct exec_list body; /** < list of nir_cf_node */
2421
2422 nir_loop_info *info;
2423 nir_loop_control control;
2424 bool partially_unrolled;
2425 } nir_loop;
2426
2427 /**
2428 * Various bits of metadata that can may be created or required by
2429 * optimization and analysis passes
2430 */
2431 typedef enum {
2432 nir_metadata_none = 0x0,
2433 nir_metadata_block_index = 0x1,
2434 nir_metadata_dominance = 0x2,
2435 nir_metadata_live_ssa_defs = 0x4,
2436 nir_metadata_not_properly_reset = 0x8,
2437 nir_metadata_loop_analysis = 0x10,
2438 } nir_metadata;
2439
2440 typedef struct {
2441 nir_cf_node cf_node;
2442
2443 /** pointer to the function of which this is an implementation */
2444 struct nir_function *function;
2445
2446 struct exec_list body; /** < list of nir_cf_node */
2447
2448 nir_block *end_block;
2449
2450 /** list for all local variables in the function */
2451 struct exec_list locals;
2452
2453 /** list of local registers in the function */
2454 struct exec_list registers;
2455
2456 /** next available local register index */
2457 unsigned reg_alloc;
2458
2459 /** next available SSA value index */
2460 unsigned ssa_alloc;
2461
2462 /* total number of basic blocks, only valid when block_index_dirty = false */
2463 unsigned num_blocks;
2464
2465 nir_metadata valid_metadata;
2466 } nir_function_impl;
2467
2468 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2469 nir_start_block(nir_function_impl *impl)
2470 {
2471 return (nir_block *) impl->body.head_sentinel.next;
2472 }
2473
2474 ATTRIBUTE_RETURNS_NONNULL static inline nir_block *
2475 nir_impl_last_block(nir_function_impl *impl)
2476 {
2477 return (nir_block *) impl->body.tail_sentinel.prev;
2478 }
2479
2480 static inline nir_cf_node *
2481 nir_cf_node_next(nir_cf_node *node)
2482 {
2483 struct exec_node *next = exec_node_get_next(&node->node);
2484 if (exec_node_is_tail_sentinel(next))
2485 return NULL;
2486 else
2487 return exec_node_data(nir_cf_node, next, node);
2488 }
2489
2490 static inline nir_cf_node *
2491 nir_cf_node_prev(nir_cf_node *node)
2492 {
2493 struct exec_node *prev = exec_node_get_prev(&node->node);
2494 if (exec_node_is_head_sentinel(prev))
2495 return NULL;
2496 else
2497 return exec_node_data(nir_cf_node, prev, node);
2498 }
2499
2500 static inline bool
2501 nir_cf_node_is_first(const nir_cf_node *node)
2502 {
2503 return exec_node_is_head_sentinel(node->node.prev);
2504 }
2505
2506 static inline bool
2507 nir_cf_node_is_last(const nir_cf_node *node)
2508 {
2509 return exec_node_is_tail_sentinel(node->node.next);
2510 }
2511
2512 NIR_DEFINE_CAST(nir_cf_node_as_block, nir_cf_node, nir_block, cf_node,
2513 type, nir_cf_node_block)
2514 NIR_DEFINE_CAST(nir_cf_node_as_if, nir_cf_node, nir_if, cf_node,
2515 type, nir_cf_node_if)
2516 NIR_DEFINE_CAST(nir_cf_node_as_loop, nir_cf_node, nir_loop, cf_node,
2517 type, nir_cf_node_loop)
2518 NIR_DEFINE_CAST(nir_cf_node_as_function, nir_cf_node,
2519 nir_function_impl, cf_node, type, nir_cf_node_function)
2520
2521 static inline nir_block *
2522 nir_if_first_then_block(nir_if *if_stmt)
2523 {
2524 struct exec_node *head = exec_list_get_head(&if_stmt->then_list);
2525 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2526 }
2527
2528 static inline nir_block *
2529 nir_if_last_then_block(nir_if *if_stmt)
2530 {
2531 struct exec_node *tail = exec_list_get_tail(&if_stmt->then_list);
2532 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2533 }
2534
2535 static inline nir_block *
2536 nir_if_first_else_block(nir_if *if_stmt)
2537 {
2538 struct exec_node *head = exec_list_get_head(&if_stmt->else_list);
2539 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2540 }
2541
2542 static inline nir_block *
2543 nir_if_last_else_block(nir_if *if_stmt)
2544 {
2545 struct exec_node *tail = exec_list_get_tail(&if_stmt->else_list);
2546 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2547 }
2548
2549 static inline nir_block *
2550 nir_loop_first_block(nir_loop *loop)
2551 {
2552 struct exec_node *head = exec_list_get_head(&loop->body);
2553 return nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2554 }
2555
2556 static inline nir_block *
2557 nir_loop_last_block(nir_loop *loop)
2558 {
2559 struct exec_node *tail = exec_list_get_tail(&loop->body);
2560 return nir_cf_node_as_block(exec_node_data(nir_cf_node, tail, node));
2561 }
2562
2563 /**
2564 * Return true if this list of cf_nodes contains a single empty block.
2565 */
2566 static inline bool
2567 nir_cf_list_is_empty_block(struct exec_list *cf_list)
2568 {
2569 if (exec_list_is_singular(cf_list)) {
2570 struct exec_node *head = exec_list_get_head(cf_list);
2571 nir_block *block =
2572 nir_cf_node_as_block(exec_node_data(nir_cf_node, head, node));
2573 return exec_list_is_empty(&block->instr_list);
2574 }
2575 return false;
2576 }
2577
2578 typedef struct {
2579 uint8_t num_components;
2580 uint8_t bit_size;
2581 } nir_parameter;
2582
2583 typedef struct nir_function {
2584 struct exec_node node;
2585
2586 const char *name;
2587 struct nir_shader *shader;
2588
2589 unsigned num_params;
2590 nir_parameter *params;
2591
2592 /** The implementation of this function.
2593 *
2594 * If the function is only declared and not implemented, this is NULL.
2595 */
2596 nir_function_impl *impl;
2597
2598 bool is_entrypoint;
2599 } nir_function;
2600
2601 typedef enum {
2602 nir_lower_imul64 = (1 << 0),
2603 nir_lower_isign64 = (1 << 1),
2604 /** Lower all int64 modulus and division opcodes */
2605 nir_lower_divmod64 = (1 << 2),
2606 /** Lower all 64-bit umul_high and imul_high opcodes */
2607 nir_lower_imul_high64 = (1 << 3),
2608 nir_lower_mov64 = (1 << 4),
2609 nir_lower_icmp64 = (1 << 5),
2610 nir_lower_iadd64 = (1 << 6),
2611 nir_lower_iabs64 = (1 << 7),
2612 nir_lower_ineg64 = (1 << 8),
2613 nir_lower_logic64 = (1 << 9),
2614 nir_lower_minmax64 = (1 << 10),
2615 nir_lower_shift64 = (1 << 11),
2616 nir_lower_imul_2x32_64 = (1 << 12),
2617 nir_lower_extract64 = (1 << 13),
2618 } nir_lower_int64_options;
2619
2620 typedef enum {
2621 nir_lower_drcp = (1 << 0),
2622 nir_lower_dsqrt = (1 << 1),
2623 nir_lower_drsq = (1 << 2),
2624 nir_lower_dtrunc = (1 << 3),
2625 nir_lower_dfloor = (1 << 4),
2626 nir_lower_dceil = (1 << 5),
2627 nir_lower_dfract = (1 << 6),
2628 nir_lower_dround_even = (1 << 7),
2629 nir_lower_dmod = (1 << 8),
2630 nir_lower_dsub = (1 << 9),
2631 nir_lower_ddiv = (1 << 10),
2632 nir_lower_fp64_full_software = (1 << 11),
2633 } nir_lower_doubles_options;
2634
2635 typedef enum {
2636 nir_divergence_single_prim_per_subgroup = (1 << 0),
2637 nir_divergence_single_patch_per_tcs_subgroup = (1 << 1),
2638 nir_divergence_single_patch_per_tes_subgroup = (1 << 2),
2639 nir_divergence_view_index_uniform = (1 << 3),
2640 } nir_divergence_options;
2641
2642 typedef struct nir_shader_compiler_options {
2643 bool lower_fdiv;
2644 bool lower_ffma;
2645 bool fuse_ffma;
2646 bool lower_flrp16;
2647 bool lower_flrp32;
2648 /** Lowers flrp when it does not support doubles */
2649 bool lower_flrp64;
2650 bool lower_fpow;
2651 bool lower_fsat;
2652 bool lower_fsqrt;
2653 bool lower_sincos;
2654 bool lower_fmod;
2655 /** Lowers ibitfield_extract/ubitfield_extract to ibfe/ubfe. */
2656 bool lower_bitfield_extract;
2657 /** Lowers ibitfield_extract/ubitfield_extract to compares, shifts. */
2658 bool lower_bitfield_extract_to_shifts;
2659 /** Lowers bitfield_insert to bfi/bfm */
2660 bool lower_bitfield_insert;
2661 /** Lowers bitfield_insert to compares, and shifts. */
2662 bool lower_bitfield_insert_to_shifts;
2663 /** Lowers bitfield_insert to bfm/bitfield_select. */
2664 bool lower_bitfield_insert_to_bitfield_select;
2665 /** Lowers bitfield_reverse to shifts. */
2666 bool lower_bitfield_reverse;
2667 /** Lowers bit_count to shifts. */
2668 bool lower_bit_count;
2669 /** Lowers ifind_msb to compare and ufind_msb */
2670 bool lower_ifind_msb;
2671 /** Lowers find_lsb to ufind_msb and logic ops */
2672 bool lower_find_lsb;
2673 bool lower_uadd_carry;
2674 bool lower_usub_borrow;
2675 /** Lowers imul_high/umul_high to 16-bit multiplies and carry operations. */
2676 bool lower_mul_high;
2677 /** lowers fneg and ineg to fsub and isub. */
2678 bool lower_negate;
2679 /** lowers fsub and isub to fadd+fneg and iadd+ineg. */
2680 bool lower_sub;
2681
2682 /* lower {slt,sge,seq,sne} to {flt,fge,feq,fne} + b2f: */
2683 bool lower_scmp;
2684
2685 /* lower fall_equalN/fany_nequalN (ex:fany_nequal4 to sne+fdot4+fsat) */
2686 bool lower_vector_cmp;
2687
2688 /** enables rules to lower idiv by power-of-two: */
2689 bool lower_idiv;
2690
2691 /** enable rules to avoid bit ops */
2692 bool lower_bitops;
2693
2694 /** enables rules to lower isign to imin+imax */
2695 bool lower_isign;
2696
2697 /** enables rules to lower fsign to fsub and flt */
2698 bool lower_fsign;
2699
2700 /* lower fdph to fdot4 */
2701 bool lower_fdph;
2702
2703 /** lower fdot to fmul and fsum/fadd. */
2704 bool lower_fdot;
2705
2706 /* Does the native fdot instruction replicate its result for four
2707 * components? If so, then opt_algebraic_late will turn all fdotN
2708 * instructions into fdot_replicatedN instructions.
2709 */
2710 bool fdot_replicates;
2711
2712 /** lowers ffloor to fsub+ffract: */
2713 bool lower_ffloor;
2714
2715 /** lowers ffract to fsub+ffloor: */
2716 bool lower_ffract;
2717
2718 /** lowers fceil to fneg+ffloor+fneg: */
2719 bool lower_fceil;
2720
2721 bool lower_ftrunc;
2722
2723 bool lower_ldexp;
2724
2725 bool lower_pack_half_2x16;
2726 bool lower_pack_unorm_2x16;
2727 bool lower_pack_snorm_2x16;
2728 bool lower_pack_unorm_4x8;
2729 bool lower_pack_snorm_4x8;
2730 bool lower_unpack_half_2x16;
2731 bool lower_unpack_unorm_2x16;
2732 bool lower_unpack_snorm_2x16;
2733 bool lower_unpack_unorm_4x8;
2734 bool lower_unpack_snorm_4x8;
2735
2736 bool lower_extract_byte;
2737 bool lower_extract_word;
2738
2739 bool lower_all_io_to_temps;
2740 bool lower_all_io_to_elements;
2741
2742 /* Indicates that the driver only has zero-based vertex id */
2743 bool vertex_id_zero_based;
2744
2745 /**
2746 * If enabled, gl_BaseVertex will be lowered as:
2747 * is_indexed_draw (~0/0) & firstvertex
2748 */
2749 bool lower_base_vertex;
2750
2751 /**
2752 * If enabled, gl_HelperInvocation will be lowered as:
2753 *
2754 * !((1 << sample_id) & sample_mask_in))
2755 *
2756 * This depends on some possibly hw implementation details, which may
2757 * not be true for all hw. In particular that the FS is only executed
2758 * for covered samples or for helper invocations. So, do not blindly
2759 * enable this option.
2760 *
2761 * Note: See also issue #22 in ARB_shader_image_load_store
2762 */
2763 bool lower_helper_invocation;
2764
2765 /**
2766 * Convert gl_SampleMaskIn to gl_HelperInvocation as follows:
2767 *
2768 * gl_SampleMaskIn == 0 ---> gl_HelperInvocation
2769 * gl_SampleMaskIn != 0 ---> !gl_HelperInvocation
2770 */
2771 bool optimize_sample_mask_in;
2772
2773 bool lower_cs_local_index_from_id;
2774 bool lower_cs_local_id_from_index;
2775
2776 bool lower_device_index_to_zero;
2777
2778 /* Set if nir_lower_wpos_ytransform() should also invert gl_PointCoord. */
2779 bool lower_wpos_pntc;
2780
2781 bool lower_hadd;
2782 bool lower_add_sat;
2783
2784 /**
2785 * Should IO be re-vectorized? Some scalar ISAs still operate on vec4's
2786 * for IO purposes and would prefer loads/stores be vectorized.
2787 */
2788 bool vectorize_io;
2789 bool lower_to_scalar;
2790
2791 /**
2792 * Should nir_lower_io() create load_interpolated_input intrinsics?
2793 *
2794 * If not, it generates regular load_input intrinsics and interpolation
2795 * information must be inferred from the list of input nir_variables.
2796 */
2797 bool use_interpolated_input_intrinsics;
2798
2799 /* Lowers when 32x32->64 bit multiplication is not supported */
2800 bool lower_mul_2x32_64;
2801
2802 /* Lowers when rotate instruction is not supported */
2803 bool lower_rotate;
2804
2805 /**
2806 * Backend supports imul24, and would like to use it (when possible)
2807 * for address/offset calculation. If true, driver should call
2808 * nir_lower_amul(). (If not set, amul will automatically be lowered
2809 * to imul.)
2810 */
2811 bool has_imul24;
2812
2813 /**
2814 * Is this the Intel vec4 backend?
2815 *
2816 * Used to inhibit algebraic optimizations that are known to be harmful on
2817 * the Intel vec4 backend. This is generally applicable to any
2818 * optimization that might cause more immediate values to be used in
2819 * 3-source (e.g., ffma and flrp) instructions.
2820 */
2821 bool intel_vec4;
2822
2823 unsigned max_unroll_iterations;
2824
2825 nir_lower_int64_options lower_int64_options;
2826 nir_lower_doubles_options lower_doubles_options;
2827 } nir_shader_compiler_options;
2828
2829 typedef struct nir_shader {
2830 /** list of uniforms (nir_variable) */
2831 struct exec_list uniforms;
2832
2833 /** list of inputs (nir_variable) */
2834 struct exec_list inputs;
2835
2836 /** list of outputs (nir_variable) */
2837 struct exec_list outputs;
2838
2839 /** list of shared compute variables (nir_variable) */
2840 struct exec_list shared;
2841
2842 /** Set of driver-specific options for the shader.
2843 *
2844 * The memory for the options is expected to be kept in a single static
2845 * copy by the driver.
2846 */
2847 const struct nir_shader_compiler_options *options;
2848
2849 /** Various bits of compile-time information about a given shader */
2850 struct shader_info info;
2851
2852 /** list of global variables in the shader (nir_variable) */
2853 struct exec_list globals;
2854
2855 /** list of system value variables in the shader (nir_variable) */
2856 struct exec_list system_values;
2857
2858 struct exec_list functions; /** < list of nir_function */
2859
2860 /**
2861 * the highest index a load_input_*, load_uniform_*, etc. intrinsic can
2862 * access plus one
2863 */
2864 unsigned num_inputs, num_uniforms, num_outputs, num_shared;
2865
2866 /** Size in bytes of required scratch space */
2867 unsigned scratch_size;
2868
2869 /** Constant data associated with this shader.
2870 *
2871 * Constant data is loaded through load_constant intrinsics. See also
2872 * nir_opt_large_constants.
2873 */
2874 void *constant_data;
2875 unsigned constant_data_size;
2876 } nir_shader;
2877
2878 #define nir_foreach_function(func, shader) \
2879 foreach_list_typed(nir_function, func, node, &(shader)->functions)
2880
2881 static inline nir_function_impl *
2882 nir_shader_get_entrypoint(nir_shader *shader)
2883 {
2884 nir_function *func = NULL;
2885
2886 nir_foreach_function(function, shader) {
2887 assert(func == NULL);
2888 if (function->is_entrypoint) {
2889 func = function;
2890 #ifndef NDEBUG
2891 break;
2892 #endif
2893 }
2894 }
2895
2896 if (!func)
2897 return NULL;
2898
2899 assert(func->num_params == 0);
2900 assert(func->impl);
2901 return func->impl;
2902 }
2903
2904 nir_shader *nir_shader_create(void *mem_ctx,
2905 gl_shader_stage stage,
2906 const nir_shader_compiler_options *options,
2907 shader_info *si);
2908
2909 nir_register *nir_local_reg_create(nir_function_impl *impl);
2910
2911 void nir_reg_remove(nir_register *reg);
2912
2913 /** Adds a variable to the appropriate list in nir_shader */
2914 void nir_shader_add_variable(nir_shader *shader, nir_variable *var);
2915
2916 static inline void
2917 nir_function_impl_add_variable(nir_function_impl *impl, nir_variable *var)
2918 {
2919 assert(var->data.mode == nir_var_function_temp);
2920 exec_list_push_tail(&impl->locals, &var->node);
2921 }
2922
2923 /** creates a variable, sets a few defaults, and adds it to the list */
2924 nir_variable *nir_variable_create(nir_shader *shader,
2925 nir_variable_mode mode,
2926 const struct glsl_type *type,
2927 const char *name);
2928 /** creates a local variable and adds it to the list */
2929 nir_variable *nir_local_variable_create(nir_function_impl *impl,
2930 const struct glsl_type *type,
2931 const char *name);
2932
2933 /** creates a function and adds it to the shader's list of functions */
2934 nir_function *nir_function_create(nir_shader *shader, const char *name);
2935
2936 nir_function_impl *nir_function_impl_create(nir_function *func);
2937 /** creates a function_impl that isn't tied to any particular function */
2938 nir_function_impl *nir_function_impl_create_bare(nir_shader *shader);
2939
2940 nir_block *nir_block_create(nir_shader *shader);
2941 nir_if *nir_if_create(nir_shader *shader);
2942 nir_loop *nir_loop_create(nir_shader *shader);
2943
2944 nir_function_impl *nir_cf_node_get_function(nir_cf_node *node);
2945
2946 /** requests that the given pieces of metadata be generated */
2947 void nir_metadata_require(nir_function_impl *impl, nir_metadata required, ...);
2948 /** dirties all but the preserved metadata */
2949 void nir_metadata_preserve(nir_function_impl *impl, nir_metadata preserved);
2950
2951 /** creates an instruction with default swizzle/writemask/etc. with NULL registers */
2952 nir_alu_instr *nir_alu_instr_create(nir_shader *shader, nir_op op);
2953
2954 nir_deref_instr *nir_deref_instr_create(nir_shader *shader,
2955 nir_deref_type deref_type);
2956
2957 nir_jump_instr *nir_jump_instr_create(nir_shader *shader, nir_jump_type type);
2958
2959 nir_load_const_instr *nir_load_const_instr_create(nir_shader *shader,
2960 unsigned num_components,
2961 unsigned bit_size);
2962
2963 nir_intrinsic_instr *nir_intrinsic_instr_create(nir_shader *shader,
2964 nir_intrinsic_op op);
2965
2966 nir_call_instr *nir_call_instr_create(nir_shader *shader,
2967 nir_function *callee);
2968
2969 nir_tex_instr *nir_tex_instr_create(nir_shader *shader, unsigned num_srcs);
2970
2971 nir_phi_instr *nir_phi_instr_create(nir_shader *shader);
2972
2973 nir_parallel_copy_instr *nir_parallel_copy_instr_create(nir_shader *shader);
2974
2975 nir_ssa_undef_instr *nir_ssa_undef_instr_create(nir_shader *shader,
2976 unsigned num_components,
2977 unsigned bit_size);
2978
2979 nir_const_value nir_alu_binop_identity(nir_op binop, unsigned bit_size);
2980
2981 /**
2982 * NIR Cursors and Instruction Insertion API
2983 * @{
2984 *
2985 * A tiny struct representing a point to insert/extract instructions or
2986 * control flow nodes. Helps reduce the combinatorial explosion of possible
2987 * points to insert/extract.
2988 *
2989 * \sa nir_control_flow.h
2990 */
2991 typedef enum {
2992 nir_cursor_before_block,
2993 nir_cursor_after_block,
2994 nir_cursor_before_instr,
2995 nir_cursor_after_instr,
2996 } nir_cursor_option;
2997
2998 typedef struct {
2999 nir_cursor_option option;
3000 union {
3001 nir_block *block;
3002 nir_instr *instr;
3003 };
3004 } nir_cursor;
3005
3006 static inline nir_block *
3007 nir_cursor_current_block(nir_cursor cursor)
3008 {
3009 if (cursor.option == nir_cursor_before_instr ||
3010 cursor.option == nir_cursor_after_instr) {
3011 return cursor.instr->block;
3012 } else {
3013 return cursor.block;
3014 }
3015 }
3016
3017 bool nir_cursors_equal(nir_cursor a, nir_cursor b);
3018
3019 static inline nir_cursor
3020 nir_before_block(nir_block *block)
3021 {
3022 nir_cursor cursor;
3023 cursor.option = nir_cursor_before_block;
3024 cursor.block = block;
3025 return cursor;
3026 }
3027
3028 static inline nir_cursor
3029 nir_after_block(nir_block *block)
3030 {
3031 nir_cursor cursor;
3032 cursor.option = nir_cursor_after_block;
3033 cursor.block = block;
3034 return cursor;
3035 }
3036
3037 static inline nir_cursor
3038 nir_before_instr(nir_instr *instr)
3039 {
3040 nir_cursor cursor;
3041 cursor.option = nir_cursor_before_instr;
3042 cursor.instr = instr;
3043 return cursor;
3044 }
3045
3046 static inline nir_cursor
3047 nir_after_instr(nir_instr *instr)
3048 {
3049 nir_cursor cursor;
3050 cursor.option = nir_cursor_after_instr;
3051 cursor.instr = instr;
3052 return cursor;
3053 }
3054
3055 static inline nir_cursor
3056 nir_after_block_before_jump(nir_block *block)
3057 {
3058 nir_instr *last_instr = nir_block_last_instr(block);
3059 if (last_instr && last_instr->type == nir_instr_type_jump) {
3060 return nir_before_instr(last_instr);
3061 } else {
3062 return nir_after_block(block);
3063 }
3064 }
3065
3066 static inline nir_cursor
3067 nir_before_src(nir_src *src, bool is_if_condition)
3068 {
3069 if (is_if_condition) {
3070 nir_block *prev_block =
3071 nir_cf_node_as_block(nir_cf_node_prev(&src->parent_if->cf_node));
3072 assert(!nir_block_ends_in_jump(prev_block));
3073 return nir_after_block(prev_block);
3074 } else if (src->parent_instr->type == nir_instr_type_phi) {
3075 #ifndef NDEBUG
3076 nir_phi_instr *cond_phi = nir_instr_as_phi(src->parent_instr);
3077 bool found = false;
3078 nir_foreach_phi_src(phi_src, cond_phi) {
3079 if (phi_src->src.ssa == src->ssa) {
3080 found = true;
3081 break;
3082 }
3083 }
3084 assert(found);
3085 #endif
3086 /* The LIST_ENTRY macro is a generic container-of macro, it just happens
3087 * to have a more specific name.
3088 */
3089 nir_phi_src *phi_src = LIST_ENTRY(nir_phi_src, src, src);
3090 return nir_after_block_before_jump(phi_src->pred);
3091 } else {
3092 return nir_before_instr(src->parent_instr);
3093 }
3094 }
3095
3096 static inline nir_cursor
3097 nir_before_cf_node(nir_cf_node *node)
3098 {
3099 if (node->type == nir_cf_node_block)
3100 return nir_before_block(nir_cf_node_as_block(node));
3101
3102 return nir_after_block(nir_cf_node_as_block(nir_cf_node_prev(node)));
3103 }
3104
3105 static inline nir_cursor
3106 nir_after_cf_node(nir_cf_node *node)
3107 {
3108 if (node->type == nir_cf_node_block)
3109 return nir_after_block(nir_cf_node_as_block(node));
3110
3111 return nir_before_block(nir_cf_node_as_block(nir_cf_node_next(node)));
3112 }
3113
3114 static inline nir_cursor
3115 nir_after_phis(nir_block *block)
3116 {
3117 nir_foreach_instr(instr, block) {
3118 if (instr->type != nir_instr_type_phi)
3119 return nir_before_instr(instr);
3120 }
3121 return nir_after_block(block);
3122 }
3123
3124 static inline nir_cursor
3125 nir_after_cf_node_and_phis(nir_cf_node *node)
3126 {
3127 if (node->type == nir_cf_node_block)
3128 return nir_after_block(nir_cf_node_as_block(node));
3129
3130 nir_block *block = nir_cf_node_as_block(nir_cf_node_next(node));
3131
3132 return nir_after_phis(block);
3133 }
3134
3135 static inline nir_cursor
3136 nir_before_cf_list(struct exec_list *cf_list)
3137 {
3138 nir_cf_node *first_node = exec_node_data(nir_cf_node,
3139 exec_list_get_head(cf_list), node);
3140 return nir_before_cf_node(first_node);
3141 }
3142
3143 static inline nir_cursor
3144 nir_after_cf_list(struct exec_list *cf_list)
3145 {
3146 nir_cf_node *last_node = exec_node_data(nir_cf_node,
3147 exec_list_get_tail(cf_list), node);
3148 return nir_after_cf_node(last_node);
3149 }
3150
3151 /**
3152 * Insert a NIR instruction at the given cursor.
3153 *
3154 * Note: This does not update the cursor.
3155 */
3156 void nir_instr_insert(nir_cursor cursor, nir_instr *instr);
3157
3158 static inline void
3159 nir_instr_insert_before(nir_instr *instr, nir_instr *before)
3160 {
3161 nir_instr_insert(nir_before_instr(instr), before);
3162 }
3163
3164 static inline void
3165 nir_instr_insert_after(nir_instr *instr, nir_instr *after)
3166 {
3167 nir_instr_insert(nir_after_instr(instr), after);
3168 }
3169
3170 static inline void
3171 nir_instr_insert_before_block(nir_block *block, nir_instr *before)
3172 {
3173 nir_instr_insert(nir_before_block(block), before);
3174 }
3175
3176 static inline void
3177 nir_instr_insert_after_block(nir_block *block, nir_instr *after)
3178 {
3179 nir_instr_insert(nir_after_block(block), after);
3180 }
3181
3182 static inline void
3183 nir_instr_insert_before_cf(nir_cf_node *node, nir_instr *before)
3184 {
3185 nir_instr_insert(nir_before_cf_node(node), before);
3186 }
3187
3188 static inline void
3189 nir_instr_insert_after_cf(nir_cf_node *node, nir_instr *after)
3190 {
3191 nir_instr_insert(nir_after_cf_node(node), after);
3192 }
3193
3194 static inline void
3195 nir_instr_insert_before_cf_list(struct exec_list *list, nir_instr *before)
3196 {
3197 nir_instr_insert(nir_before_cf_list(list), before);
3198 }
3199
3200 static inline void
3201 nir_instr_insert_after_cf_list(struct exec_list *list, nir_instr *after)
3202 {
3203 nir_instr_insert(nir_after_cf_list(list), after);
3204 }
3205
3206 void nir_instr_remove_v(nir_instr *instr);
3207
3208 static inline nir_cursor
3209 nir_instr_remove(nir_instr *instr)
3210 {
3211 nir_cursor cursor;
3212 nir_instr *prev = nir_instr_prev(instr);
3213 if (prev) {
3214 cursor = nir_after_instr(prev);
3215 } else {
3216 cursor = nir_before_block(instr->block);
3217 }
3218 nir_instr_remove_v(instr);
3219 return cursor;
3220 }
3221
3222 /** @} */
3223
3224 nir_ssa_def *nir_instr_ssa_def(nir_instr *instr);
3225
3226 typedef bool (*nir_foreach_ssa_def_cb)(nir_ssa_def *def, void *state);
3227 typedef bool (*nir_foreach_dest_cb)(nir_dest *dest, void *state);
3228 typedef bool (*nir_foreach_src_cb)(nir_src *src, void *state);
3229 bool nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb,
3230 void *state);
3231 bool nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state);
3232 bool nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state);
3233
3234 nir_const_value *nir_src_as_const_value(nir_src src);
3235
3236 #define NIR_SRC_AS_(name, c_type, type_enum, cast_macro) \
3237 static inline c_type * \
3238 nir_src_as_ ## name (nir_src src) \
3239 { \
3240 return src.is_ssa && src.ssa->parent_instr->type == type_enum \
3241 ? cast_macro(src.ssa->parent_instr) : NULL; \
3242 }
3243
3244 NIR_SRC_AS_(alu_instr, nir_alu_instr, nir_instr_type_alu, nir_instr_as_alu)
3245 NIR_SRC_AS_(intrinsic, nir_intrinsic_instr,
3246 nir_instr_type_intrinsic, nir_instr_as_intrinsic)
3247 NIR_SRC_AS_(deref, nir_deref_instr, nir_instr_type_deref, nir_instr_as_deref)
3248
3249 bool nir_src_is_dynamically_uniform(nir_src src);
3250 bool nir_srcs_equal(nir_src src1, nir_src src2);
3251 bool nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2);
3252 void nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src);
3253 void nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src);
3254 void nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src);
3255 void nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest,
3256 nir_dest new_dest);
3257
3258 void nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
3259 unsigned num_components, unsigned bit_size,
3260 const char *name);
3261 void nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
3262 unsigned num_components, unsigned bit_size,
3263 const char *name);
3264 static inline void
3265 nir_ssa_dest_init_for_type(nir_instr *instr, nir_dest *dest,
3266 const struct glsl_type *type,
3267 const char *name)
3268 {
3269 assert(glsl_type_is_vector_or_scalar(type));
3270 nir_ssa_dest_init(instr, dest, glsl_get_components(type),
3271 glsl_get_bit_size(type), name);
3272 }
3273 void nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src);
3274 void nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
3275 nir_instr *after_me);
3276
3277 nir_component_mask_t nir_ssa_def_components_read(const nir_ssa_def *def);
3278
3279 /*
3280 * finds the next basic block in source-code order, returns NULL if there is
3281 * none
3282 */
3283
3284 nir_block *nir_block_cf_tree_next(nir_block *block);
3285
3286 /* Performs the opposite of nir_block_cf_tree_next() */
3287
3288 nir_block *nir_block_cf_tree_prev(nir_block *block);
3289
3290 /* Gets the first block in a CF node in source-code order */
3291
3292 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node);
3293
3294 /* Gets the last block in a CF node in source-code order */
3295
3296 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node);
3297
3298 /* Gets the next block after a CF node in source-code order */
3299
3300 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node);
3301
3302 /* Macros for loops that visit blocks in source-code order */
3303
3304 #define nir_foreach_block(block, impl) \
3305 for (nir_block *block = nir_start_block(impl); block != NULL; \
3306 block = nir_block_cf_tree_next(block))
3307
3308 #define nir_foreach_block_safe(block, impl) \
3309 for (nir_block *block = nir_start_block(impl), \
3310 *next = nir_block_cf_tree_next(block); \
3311 block != NULL; \
3312 block = next, next = nir_block_cf_tree_next(block))
3313
3314 #define nir_foreach_block_reverse(block, impl) \
3315 for (nir_block *block = nir_impl_last_block(impl); block != NULL; \
3316 block = nir_block_cf_tree_prev(block))
3317
3318 #define nir_foreach_block_reverse_safe(block, impl) \
3319 for (nir_block *block = nir_impl_last_block(impl), \
3320 *prev = nir_block_cf_tree_prev(block); \
3321 block != NULL; \
3322 block = prev, prev = nir_block_cf_tree_prev(block))
3323
3324 #define nir_foreach_block_in_cf_node(block, node) \
3325 for (nir_block *block = nir_cf_node_cf_tree_first(node); \
3326 block != nir_cf_node_cf_tree_next(node); \
3327 block = nir_block_cf_tree_next(block))
3328
3329 /* If the following CF node is an if, this function returns that if.
3330 * Otherwise, it returns NULL.
3331 */
3332 nir_if *nir_block_get_following_if(nir_block *block);
3333
3334 nir_loop *nir_block_get_following_loop(nir_block *block);
3335
3336 void nir_index_local_regs(nir_function_impl *impl);
3337 void nir_index_ssa_defs(nir_function_impl *impl);
3338 unsigned nir_index_instrs(nir_function_impl *impl);
3339
3340 void nir_index_blocks(nir_function_impl *impl);
3341
3342 void nir_print_shader(nir_shader *shader, FILE *fp);
3343 void nir_print_shader_annotated(nir_shader *shader, FILE *fp, struct hash_table *errors);
3344 void nir_print_instr(const nir_instr *instr, FILE *fp);
3345 void nir_print_deref(const nir_deref_instr *deref, FILE *fp);
3346
3347 /** Shallow clone of a single ALU instruction. */
3348 nir_alu_instr *nir_alu_instr_clone(nir_shader *s, const nir_alu_instr *orig);
3349
3350 nir_shader *nir_shader_clone(void *mem_ctx, const nir_shader *s);
3351 nir_function_impl *nir_function_impl_clone(nir_shader *shader,
3352 const nir_function_impl *fi);
3353 nir_constant *nir_constant_clone(const nir_constant *c, nir_variable *var);
3354 nir_variable *nir_variable_clone(const nir_variable *c, nir_shader *shader);
3355
3356 void nir_shader_replace(nir_shader *dest, nir_shader *src);
3357
3358 void nir_shader_serialize_deserialize(nir_shader *s);
3359
3360 #ifndef NDEBUG
3361 void nir_validate_shader(nir_shader *shader, const char *when);
3362 void nir_metadata_set_validation_flag(nir_shader *shader);
3363 void nir_metadata_check_validation_flag(nir_shader *shader);
3364
3365 static inline bool
3366 should_skip_nir(const char *name)
3367 {
3368 static const char *list = NULL;
3369 if (!list) {
3370 /* Comma separated list of names to skip. */
3371 list = getenv("NIR_SKIP");
3372 if (!list)
3373 list = "";
3374 }
3375
3376 if (!list[0])
3377 return false;
3378
3379 return comma_separated_list_contains(list, name);
3380 }
3381
3382 static inline bool
3383 should_clone_nir(void)
3384 {
3385 static int should_clone = -1;
3386 if (should_clone < 0)
3387 should_clone = env_var_as_boolean("NIR_TEST_CLONE", false);
3388
3389 return should_clone;
3390 }
3391
3392 static inline bool
3393 should_serialize_deserialize_nir(void)
3394 {
3395 static int test_serialize = -1;
3396 if (test_serialize < 0)
3397 test_serialize = env_var_as_boolean("NIR_TEST_SERIALIZE", false);
3398
3399 return test_serialize;
3400 }
3401
3402 static inline bool
3403 should_print_nir(void)
3404 {
3405 static int should_print = -1;
3406 if (should_print < 0)
3407 should_print = env_var_as_boolean("NIR_PRINT", false);
3408
3409 return should_print;
3410 }
3411 #else
3412 static inline void nir_validate_shader(nir_shader *shader, const char *when) { (void) shader; (void)when; }
3413 static inline void nir_metadata_set_validation_flag(nir_shader *shader) { (void) shader; }
3414 static inline void nir_metadata_check_validation_flag(nir_shader *shader) { (void) shader; }
3415 static inline bool should_skip_nir(UNUSED const char *pass_name) { return false; }
3416 static inline bool should_clone_nir(void) { return false; }
3417 static inline bool should_serialize_deserialize_nir(void) { return false; }
3418 static inline bool should_print_nir(void) { return false; }
3419 #endif /* NDEBUG */
3420
3421 #define _PASS(pass, nir, do_pass) do { \
3422 if (should_skip_nir(#pass)) { \
3423 printf("skipping %s\n", #pass); \
3424 break; \
3425 } \
3426 do_pass \
3427 nir_validate_shader(nir, "after " #pass); \
3428 if (should_clone_nir()) { \
3429 nir_shader *clone = nir_shader_clone(ralloc_parent(nir), nir); \
3430 nir_shader_replace(nir, clone); \
3431 } \
3432 if (should_serialize_deserialize_nir()) { \
3433 nir_shader_serialize_deserialize(nir); \
3434 } \
3435 } while (0)
3436
3437 #define NIR_PASS(progress, nir, pass, ...) _PASS(pass, nir, \
3438 nir_metadata_set_validation_flag(nir); \
3439 if (should_print_nir()) \
3440 printf("%s\n", #pass); \
3441 if (pass(nir, ##__VA_ARGS__)) { \
3442 progress = true; \
3443 if (should_print_nir()) \
3444 nir_print_shader(nir, stdout); \
3445 nir_metadata_check_validation_flag(nir); \
3446 } \
3447 )
3448
3449 #define NIR_PASS_V(nir, pass, ...) _PASS(pass, nir, \
3450 if (should_print_nir()) \
3451 printf("%s\n", #pass); \
3452 pass(nir, ##__VA_ARGS__); \
3453 if (should_print_nir()) \
3454 nir_print_shader(nir, stdout); \
3455 )
3456
3457 #define NIR_SKIP(name) should_skip_nir(#name)
3458
3459 /** An instruction filtering callback
3460 *
3461 * Returns true if the instruction should be processed and false otherwise.
3462 */
3463 typedef bool (*nir_instr_filter_cb)(const nir_instr *, const void *);
3464
3465 /** A simple instruction lowering callback
3466 *
3467 * Many instruction lowering passes can be written as a simple function which
3468 * takes an instruction as its input and returns a sequence of instructions
3469 * that implement the consumed instruction. This function type represents
3470 * such a lowering function. When called, a function with this prototype
3471 * should either return NULL indicating that no lowering needs to be done or
3472 * emit a sequence of instructions using the provided builder (whose cursor
3473 * will already be placed after the instruction to be lowered) and return the
3474 * resulting nir_ssa_def.
3475 */
3476 typedef nir_ssa_def *(*nir_lower_instr_cb)(struct nir_builder *,
3477 nir_instr *, void *);
3478
3479 /**
3480 * Special return value for nir_lower_instr_cb when some progress occurred
3481 * (like changing an input to the instr) that didn't result in a replacement
3482 * SSA def being generated.
3483 */
3484 #define NIR_LOWER_INSTR_PROGRESS ((nir_ssa_def *)(uintptr_t)1)
3485
3486 /** Iterate over all the instructions in a nir_function_impl and lower them
3487 * using the provided callbacks
3488 *
3489 * This function implements the guts of a standard lowering pass for you. It
3490 * iterates over all of the instructions in a nir_function_impl and calls the
3491 * filter callback on each one. If the filter callback returns true, it then
3492 * calls the lowering call back on the instruction. (Splitting it this way
3493 * allows us to avoid some save/restore work for instructions we know won't be
3494 * lowered.) If the instruction is dead after the lowering is complete, it
3495 * will be removed. If new instructions are added, the lowering callback will
3496 * also be called on them in case multiple lowerings are required.
3497 *
3498 * The metadata for the nir_function_impl will also be updated. If any blocks
3499 * are added (they cannot be removed), dominance and block indices will be
3500 * invalidated.
3501 */
3502 bool nir_function_impl_lower_instructions(nir_function_impl *impl,
3503 nir_instr_filter_cb filter,
3504 nir_lower_instr_cb lower,
3505 void *cb_data);
3506 bool nir_shader_lower_instructions(nir_shader *shader,
3507 nir_instr_filter_cb filter,
3508 nir_lower_instr_cb lower,
3509 void *cb_data);
3510
3511 void nir_calc_dominance_impl(nir_function_impl *impl);
3512 void nir_calc_dominance(nir_shader *shader);
3513
3514 nir_block *nir_dominance_lca(nir_block *b1, nir_block *b2);
3515 bool nir_block_dominates(nir_block *parent, nir_block *child);
3516 bool nir_block_is_unreachable(nir_block *block);
3517
3518 void nir_dump_dom_tree_impl(nir_function_impl *impl, FILE *fp);
3519 void nir_dump_dom_tree(nir_shader *shader, FILE *fp);
3520
3521 void nir_dump_dom_frontier_impl(nir_function_impl *impl, FILE *fp);
3522 void nir_dump_dom_frontier(nir_shader *shader, FILE *fp);
3523
3524 void nir_dump_cfg_impl(nir_function_impl *impl, FILE *fp);
3525 void nir_dump_cfg(nir_shader *shader, FILE *fp);
3526
3527 int nir_gs_count_vertices(const nir_shader *shader);
3528
3529 bool nir_shrink_vec_array_vars(nir_shader *shader, nir_variable_mode modes);
3530 bool nir_split_array_vars(nir_shader *shader, nir_variable_mode modes);
3531 bool nir_split_var_copies(nir_shader *shader);
3532 bool nir_split_per_member_structs(nir_shader *shader);
3533 bool nir_split_struct_vars(nir_shader *shader, nir_variable_mode modes);
3534
3535 bool nir_lower_returns_impl(nir_function_impl *impl);
3536 bool nir_lower_returns(nir_shader *shader);
3537
3538 void nir_inline_function_impl(struct nir_builder *b,
3539 const nir_function_impl *impl,
3540 nir_ssa_def **params);
3541 bool nir_inline_functions(nir_shader *shader);
3542
3543 bool nir_propagate_invariant(nir_shader *shader);
3544
3545 void nir_lower_var_copy_instr(nir_intrinsic_instr *copy, nir_shader *shader);
3546 void nir_lower_deref_copy_instr(struct nir_builder *b,
3547 nir_intrinsic_instr *copy);
3548 bool nir_lower_var_copies(nir_shader *shader);
3549
3550 void nir_fixup_deref_modes(nir_shader *shader);
3551
3552 bool nir_lower_global_vars_to_local(nir_shader *shader);
3553
3554 typedef enum {
3555 nir_lower_direct_array_deref_of_vec_load = (1 << 0),
3556 nir_lower_indirect_array_deref_of_vec_load = (1 << 1),
3557 nir_lower_direct_array_deref_of_vec_store = (1 << 2),
3558 nir_lower_indirect_array_deref_of_vec_store = (1 << 3),
3559 } nir_lower_array_deref_of_vec_options;
3560
3561 bool nir_lower_array_deref_of_vec(nir_shader *shader, nir_variable_mode modes,
3562 nir_lower_array_deref_of_vec_options options);
3563
3564 bool nir_lower_indirect_derefs(nir_shader *shader, nir_variable_mode modes);
3565
3566 bool nir_lower_locals_to_regs(nir_shader *shader);
3567
3568 void nir_lower_io_to_temporaries(nir_shader *shader,
3569 nir_function_impl *entrypoint,
3570 bool outputs, bool inputs);
3571
3572 bool nir_lower_vars_to_scratch(nir_shader *shader,
3573 nir_variable_mode modes,
3574 int size_threshold,
3575 glsl_type_size_align_func size_align);
3576
3577 void nir_shader_gather_info(nir_shader *shader, nir_function_impl *entrypoint);
3578
3579 void nir_gather_ssa_types(nir_function_impl *impl,
3580 BITSET_WORD *float_types,
3581 BITSET_WORD *int_types);
3582
3583 void nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
3584 int (*type_size)(const struct glsl_type *, bool));
3585
3586 /* Some helpers to do very simple linking */
3587 bool nir_remove_unused_varyings(nir_shader *producer, nir_shader *consumer);
3588 bool nir_remove_unused_io_vars(nir_shader *shader, struct exec_list *var_list,
3589 uint64_t *used_by_other_stage,
3590 uint64_t *used_by_other_stage_patches);
3591 void nir_compact_varyings(nir_shader *producer, nir_shader *consumer,
3592 bool default_to_smooth_interp);
3593 void nir_link_xfb_varyings(nir_shader *producer, nir_shader *consumer);
3594 bool nir_link_opt_varyings(nir_shader *producer, nir_shader *consumer);
3595
3596 bool nir_lower_amul(nir_shader *shader,
3597 int (*type_size)(const struct glsl_type *, bool));
3598
3599 void nir_assign_io_var_locations(struct exec_list *var_list,
3600 unsigned *size,
3601 gl_shader_stage stage);
3602
3603 typedef enum {
3604 /* If set, this causes all 64-bit IO operations to be lowered on-the-fly
3605 * to 32-bit operations. This is only valid for nir_var_shader_in/out
3606 * modes.
3607 */
3608 nir_lower_io_lower_64bit_to_32 = (1 << 0),
3609
3610 /* If set, this forces all non-flat fragment shader inputs to be
3611 * interpolated as if with the "sample" qualifier. This requires
3612 * nir_shader_compiler_options::use_interpolated_input_intrinsics.
3613 */
3614 nir_lower_io_force_sample_interpolation = (1 << 1),
3615 } nir_lower_io_options;
3616 bool nir_lower_io(nir_shader *shader,
3617 nir_variable_mode modes,
3618 int (*type_size)(const struct glsl_type *, bool),
3619 nir_lower_io_options);
3620
3621 bool nir_io_add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode);
3622
3623 bool
3624 nir_lower_vars_to_explicit_types(nir_shader *shader,
3625 nir_variable_mode modes,
3626 glsl_type_size_align_func type_info);
3627
3628 typedef enum {
3629 /**
3630 * An address format which is a simple 32-bit global GPU address.
3631 */
3632 nir_address_format_32bit_global,
3633
3634 /**
3635 * An address format which is a simple 64-bit global GPU address.
3636 */
3637 nir_address_format_64bit_global,
3638
3639 /**
3640 * An address format which is a bounds-checked 64-bit global GPU address.
3641 *
3642 * The address is comprised as a 32-bit vec4 where .xy are a uint64_t base
3643 * address stored with the low bits in .x and high bits in .y, .z is a
3644 * size, and .w is an offset. When the final I/O operation is lowered, .w
3645 * is checked against .z and the operation is predicated on the result.
3646 */
3647 nir_address_format_64bit_bounded_global,
3648
3649 /**
3650 * An address format which is comprised of a vec2 where the first
3651 * component is a buffer index and the second is an offset.
3652 */
3653 nir_address_format_32bit_index_offset,
3654
3655 /**
3656 * An address format which is a simple 32-bit offset.
3657 */
3658 nir_address_format_32bit_offset,
3659
3660 /**
3661 * An address format representing a purely logical addressing model. In
3662 * this model, all deref chains must be complete from the dereference
3663 * operation to the variable. Cast derefs are not allowed. These
3664 * addresses will be 32-bit scalars but the format is immaterial because
3665 * you can always chase the chain.
3666 */
3667 nir_address_format_logical,
3668 } nir_address_format;
3669
3670 static inline unsigned
3671 nir_address_format_bit_size(nir_address_format addr_format)
3672 {
3673 switch (addr_format) {
3674 case nir_address_format_32bit_global: return 32;
3675 case nir_address_format_64bit_global: return 64;
3676 case nir_address_format_64bit_bounded_global: return 32;
3677 case nir_address_format_32bit_index_offset: return 32;
3678 case nir_address_format_32bit_offset: return 32;
3679 case nir_address_format_logical: return 32;
3680 }
3681 unreachable("Invalid address format");
3682 }
3683
3684 static inline unsigned
3685 nir_address_format_num_components(nir_address_format addr_format)
3686 {
3687 switch (addr_format) {
3688 case nir_address_format_32bit_global: return 1;
3689 case nir_address_format_64bit_global: return 1;
3690 case nir_address_format_64bit_bounded_global: return 4;
3691 case nir_address_format_32bit_index_offset: return 2;
3692 case nir_address_format_32bit_offset: return 1;
3693 case nir_address_format_logical: return 1;
3694 }
3695 unreachable("Invalid address format");
3696 }
3697
3698 static inline const struct glsl_type *
3699 nir_address_format_to_glsl_type(nir_address_format addr_format)
3700 {
3701 unsigned bit_size = nir_address_format_bit_size(addr_format);
3702 assert(bit_size == 32 || bit_size == 64);
3703 return glsl_vector_type(bit_size == 32 ? GLSL_TYPE_UINT : GLSL_TYPE_UINT64,
3704 nir_address_format_num_components(addr_format));
3705 }
3706
3707 const nir_const_value *nir_address_format_null_value(nir_address_format addr_format);
3708
3709 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3710 nir_address_format addr_format);
3711
3712 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
3713 nir_address_format addr_format);
3714
3715 nir_ssa_def * nir_explicit_io_address_from_deref(struct nir_builder *b,
3716 nir_deref_instr *deref,
3717 nir_ssa_def *base_addr,
3718 nir_address_format addr_format);
3719 void nir_lower_explicit_io_instr(struct nir_builder *b,
3720 nir_intrinsic_instr *io_instr,
3721 nir_ssa_def *addr,
3722 nir_address_format addr_format);
3723
3724 bool nir_lower_explicit_io(nir_shader *shader,
3725 nir_variable_mode modes,
3726 nir_address_format);
3727
3728 nir_src *nir_get_io_offset_src(nir_intrinsic_instr *instr);
3729 nir_src *nir_get_io_vertex_index_src(nir_intrinsic_instr *instr);
3730
3731 bool nir_is_per_vertex_io(const nir_variable *var, gl_shader_stage stage);
3732
3733 bool nir_lower_regs_to_ssa_impl(nir_function_impl *impl);
3734 bool nir_lower_regs_to_ssa(nir_shader *shader);
3735 bool nir_lower_vars_to_ssa(nir_shader *shader);
3736
3737 bool nir_remove_dead_derefs(nir_shader *shader);
3738 bool nir_remove_dead_derefs_impl(nir_function_impl *impl);
3739 bool nir_remove_dead_variables(nir_shader *shader, nir_variable_mode modes);
3740 bool nir_lower_constant_initializers(nir_shader *shader,
3741 nir_variable_mode modes);
3742
3743 bool nir_move_vec_src_uses_to_dest(nir_shader *shader);
3744 bool nir_lower_vec_to_movs(nir_shader *shader);
3745 void nir_lower_alpha_test(nir_shader *shader, enum compare_func func,
3746 bool alpha_to_one,
3747 const gl_state_index16 *alpha_ref_state_tokens);
3748 bool nir_lower_alu(nir_shader *shader);
3749
3750 bool nir_lower_flrp(nir_shader *shader, unsigned lowering_mask,
3751 bool always_precise, bool have_ffma);
3752
3753 bool nir_lower_alu_to_scalar(nir_shader *shader, nir_instr_filter_cb cb, const void *data);
3754 bool nir_lower_bool_to_float(nir_shader *shader);
3755 bool nir_lower_bool_to_int32(nir_shader *shader);
3756 bool nir_lower_int_to_float(nir_shader *shader);
3757 bool nir_lower_load_const_to_scalar(nir_shader *shader);
3758 bool nir_lower_read_invocation_to_scalar(nir_shader *shader);
3759 bool nir_lower_phis_to_scalar(nir_shader *shader);
3760 void nir_lower_io_arrays_to_elements(nir_shader *producer, nir_shader *consumer);
3761 void nir_lower_io_arrays_to_elements_no_indirects(nir_shader *shader,
3762 bool outputs_only);
3763 void nir_lower_io_to_scalar(nir_shader *shader, nir_variable_mode mask);
3764 void nir_lower_io_to_scalar_early(nir_shader *shader, nir_variable_mode mask);
3765 bool nir_lower_io_to_vector(nir_shader *shader, nir_variable_mode mask);
3766
3767 void nir_lower_fragcoord_wtrans(nir_shader *shader);
3768 void nir_lower_viewport_transform(nir_shader *shader);
3769 bool nir_lower_uniforms_to_ubo(nir_shader *shader, int multiplier);
3770
3771 typedef struct nir_lower_subgroups_options {
3772 uint8_t subgroup_size;
3773 uint8_t ballot_bit_size;
3774 bool lower_to_scalar:1;
3775 bool lower_vote_trivial:1;
3776 bool lower_vote_eq_to_ballot:1;
3777 bool lower_subgroup_masks:1;
3778 bool lower_shuffle:1;
3779 bool lower_shuffle_to_32bit:1;
3780 bool lower_quad:1;
3781 } nir_lower_subgroups_options;
3782
3783 bool nir_lower_subgroups(nir_shader *shader,
3784 const nir_lower_subgroups_options *options);
3785
3786 bool nir_lower_system_values(nir_shader *shader);
3787
3788 enum PACKED nir_lower_tex_packing {
3789 nir_lower_tex_packing_none = 0,
3790 /* The sampler returns up to 2 32-bit words of half floats or 16-bit signed
3791 * or unsigned ints based on the sampler type
3792 */
3793 nir_lower_tex_packing_16,
3794 /* The sampler returns 1 32-bit word of 4x8 unorm */
3795 nir_lower_tex_packing_8,
3796 };
3797
3798 typedef struct nir_lower_tex_options {
3799 /**
3800 * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
3801 * sampler types a texture projector is lowered.
3802 */
3803 unsigned lower_txp;
3804
3805 /**
3806 * If true, lower away nir_tex_src_offset for all texelfetch instructions.
3807 */
3808 bool lower_txf_offset;
3809
3810 /**
3811 * If true, lower away nir_tex_src_offset for all rect textures.
3812 */
3813 bool lower_rect_offset;
3814
3815 /**
3816 * If true, lower rect textures to 2D, using txs to fetch the
3817 * texture dimensions and dividing the texture coords by the
3818 * texture dims to normalize.
3819 */
3820 bool lower_rect;
3821
3822 /**
3823 * If true, convert yuv to rgb.
3824 */
3825 unsigned lower_y_uv_external;
3826 unsigned lower_y_u_v_external;
3827 unsigned lower_yx_xuxv_external;
3828 unsigned lower_xy_uxvx_external;
3829 unsigned lower_ayuv_external;
3830 unsigned lower_xyuv_external;
3831
3832 /**
3833 * To emulate certain texture wrap modes, this can be used
3834 * to saturate the specified tex coord to [0.0, 1.0]. The
3835 * bits are according to sampler #, ie. if, for example:
3836 *
3837 * (conf->saturate_s & (1 << n))
3838 *
3839 * is true, then the s coord for sampler n is saturated.
3840 *
3841 * Note that clamping must happen *after* projector lowering
3842 * so any projected texture sample instruction with a clamped
3843 * coordinate gets automatically lowered, regardless of the
3844 * 'lower_txp' setting.
3845 */
3846 unsigned saturate_s;
3847 unsigned saturate_t;
3848 unsigned saturate_r;
3849
3850 /* Bitmask of textures that need swizzling.
3851 *
3852 * If (swizzle_result & (1 << texture_index)), then the swizzle in
3853 * swizzles[texture_index] is applied to the result of the texturing
3854 * operation.
3855 */
3856 unsigned swizzle_result;
3857
3858 /* A swizzle for each texture. Values 0-3 represent x, y, z, or w swizzles
3859 * while 4 and 5 represent 0 and 1 respectively.
3860 */
3861 uint8_t swizzles[32][4];
3862
3863 /* Can be used to scale sampled values in range required by the format. */
3864 float scale_factors[32];
3865
3866 /**
3867 * Bitmap of textures that need srgb to linear conversion. If
3868 * (lower_srgb & (1 << texture_index)) then the rgb (xyz) components
3869 * of the texture are lowered to linear.
3870 */
3871 unsigned lower_srgb;
3872
3873 /**
3874 * If true, lower nir_texop_tex on shaders that doesn't support implicit
3875 * LODs to nir_texop_txl.
3876 */
3877 bool lower_tex_without_implicit_lod;
3878
3879 /**
3880 * If true, lower nir_texop_txd on cube maps with nir_texop_txl.
3881 */
3882 bool lower_txd_cube_map;
3883
3884 /**
3885 * If true, lower nir_texop_txd on 3D surfaces with nir_texop_txl.
3886 */
3887 bool lower_txd_3d;
3888
3889 /**
3890 * If true, lower nir_texop_txd on shadow samplers (except cube maps)
3891 * with nir_texop_txl. Notice that cube map shadow samplers are lowered
3892 * with lower_txd_cube_map.
3893 */
3894 bool lower_txd_shadow;
3895
3896 /**
3897 * If true, lower nir_texop_txd on all samplers to a nir_texop_txl.
3898 * Implies lower_txd_cube_map and lower_txd_shadow.
3899 */
3900 bool lower_txd;
3901
3902 /**
3903 * If true, lower nir_texop_txb that try to use shadow compare and min_lod
3904 * at the same time to a nir_texop_lod, some math, and nir_texop_tex.
3905 */
3906 bool lower_txb_shadow_clamp;
3907
3908 /**
3909 * If true, lower nir_texop_txd on shadow samplers when it uses min_lod
3910 * with nir_texop_txl. This includes cube maps.
3911 */
3912 bool lower_txd_shadow_clamp;
3913
3914 /**
3915 * If true, lower nir_texop_txd on when it uses both offset and min_lod
3916 * with nir_texop_txl. This includes cube maps.
3917 */
3918 bool lower_txd_offset_clamp;
3919
3920 /**
3921 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3922 * sampler is bindless.
3923 */
3924 bool lower_txd_clamp_bindless_sampler;
3925
3926 /**
3927 * If true, lower nir_texop_txd with min_lod to a nir_texop_txl if the
3928 * sampler index is not statically determinable to be less than 16.
3929 */
3930 bool lower_txd_clamp_if_sampler_index_not_lt_16;
3931
3932 /**
3933 * If true, lower nir_texop_txs with a non-0-lod into nir_texop_txs with
3934 * 0-lod followed by a nir_ishr.
3935 */
3936 bool lower_txs_lod;
3937
3938 /**
3939 * If true, apply a .bagr swizzle on tg4 results to handle Broadcom's
3940 * mixed-up tg4 locations.
3941 */
3942 bool lower_tg4_broadcom_swizzle;
3943
3944 /**
3945 * If true, lowers tg4 with 4 constant offsets to 4 tg4 calls
3946 */
3947 bool lower_tg4_offsets;
3948
3949 enum nir_lower_tex_packing lower_tex_packing[32];
3950 } nir_lower_tex_options;
3951
3952 bool nir_lower_tex(nir_shader *shader,
3953 const nir_lower_tex_options *options);
3954
3955 enum nir_lower_non_uniform_access_type {
3956 nir_lower_non_uniform_ubo_access = (1 << 0),
3957 nir_lower_non_uniform_ssbo_access = (1 << 1),
3958 nir_lower_non_uniform_texture_access = (1 << 2),
3959 nir_lower_non_uniform_image_access = (1 << 3),
3960 };
3961
3962 bool nir_lower_non_uniform_access(nir_shader *shader,
3963 enum nir_lower_non_uniform_access_type);
3964
3965 enum nir_lower_idiv_path {
3966 /* This path is based on NV50LegalizeSSA::handleDIV(). It is the faster of
3967 * the two but it is not exact in some cases (for example, 1091317713u /
3968 * 1034u gives 5209173 instead of 1055432) */
3969 nir_lower_idiv_fast,
3970 /* This path is based on AMDGPUTargetLowering::LowerUDIVREM() and
3971 * AMDGPUTargetLowering::LowerSDIVREM(). It requires more instructions than
3972 * the nv50 path and many of them are integer multiplications, so it is
3973 * probably slower. It should always return the correct result, though. */
3974 nir_lower_idiv_precise,
3975 };
3976
3977 bool nir_lower_idiv(nir_shader *shader, enum nir_lower_idiv_path path);
3978
3979 bool nir_lower_input_attachments(nir_shader *shader, bool use_fragcoord_sysval);
3980
3981 bool nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables,
3982 bool use_vars,
3983 bool use_clipdist_array,
3984 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3985 bool nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
3986 bool use_clipdist_array,
3987 const gl_state_index16 clipplane_state_tokens[][STATE_LENGTH]);
3988 bool nir_lower_clip_fs(nir_shader *shader, unsigned ucp_enables,
3989 bool use_clipdist_array);
3990 bool nir_lower_clip_cull_distance_arrays(nir_shader *nir);
3991
3992 void nir_lower_point_size_mov(nir_shader *shader,
3993 const gl_state_index16 *pointsize_state_tokens);
3994
3995 bool nir_lower_frexp(nir_shader *nir);
3996
3997 void nir_lower_two_sided_color(nir_shader *shader);
3998
3999 bool nir_lower_clamp_color_outputs(nir_shader *shader);
4000
4001 bool nir_lower_flatshade(nir_shader *shader);
4002
4003 void nir_lower_passthrough_edgeflags(nir_shader *shader);
4004 bool nir_lower_patch_vertices(nir_shader *nir, unsigned static_count,
4005 const gl_state_index16 *uniform_state_tokens);
4006
4007 typedef struct nir_lower_wpos_ytransform_options {
4008 gl_state_index16 state_tokens[STATE_LENGTH];
4009 bool fs_coord_origin_upper_left :1;
4010 bool fs_coord_origin_lower_left :1;
4011 bool fs_coord_pixel_center_integer :1;
4012 bool fs_coord_pixel_center_half_integer :1;
4013 } nir_lower_wpos_ytransform_options;
4014
4015 bool nir_lower_wpos_ytransform(nir_shader *shader,
4016 const nir_lower_wpos_ytransform_options *options);
4017 bool nir_lower_wpos_center(nir_shader *shader, const bool for_sample_shading);
4018
4019 bool nir_lower_fb_read(nir_shader *shader);
4020
4021 typedef struct nir_lower_drawpixels_options {
4022 gl_state_index16 texcoord_state_tokens[STATE_LENGTH];
4023 gl_state_index16 scale_state_tokens[STATE_LENGTH];
4024 gl_state_index16 bias_state_tokens[STATE_LENGTH];
4025 unsigned drawpix_sampler;
4026 unsigned pixelmap_sampler;
4027 bool pixel_maps :1;
4028 bool scale_and_bias :1;
4029 } nir_lower_drawpixels_options;
4030
4031 void nir_lower_drawpixels(nir_shader *shader,
4032 const nir_lower_drawpixels_options *options);
4033
4034 typedef struct nir_lower_bitmap_options {
4035 unsigned sampler;
4036 bool swizzle_xxxx;
4037 } nir_lower_bitmap_options;
4038
4039 void nir_lower_bitmap(nir_shader *shader, const nir_lower_bitmap_options *options);
4040
4041 bool nir_lower_atomics_to_ssbo(nir_shader *shader, unsigned ssbo_offset);
4042
4043 typedef enum {
4044 nir_lower_int_source_mods = 1 << 0,
4045 nir_lower_float_source_mods = 1 << 1,
4046 nir_lower_triop_abs = 1 << 2,
4047 nir_lower_all_source_mods = (1 << 3) - 1
4048 } nir_lower_to_source_mods_flags;
4049
4050
4051 bool nir_lower_to_source_mods(nir_shader *shader, nir_lower_to_source_mods_flags options);
4052
4053 bool nir_lower_gs_intrinsics(nir_shader *shader);
4054
4055 typedef unsigned (*nir_lower_bit_size_callback)(const nir_alu_instr *, void *);
4056
4057 bool nir_lower_bit_size(nir_shader *shader,
4058 nir_lower_bit_size_callback callback,
4059 void *callback_data);
4060
4061 nir_lower_int64_options nir_lower_int64_op_to_options_mask(nir_op opcode);
4062 bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
4063
4064 nir_lower_doubles_options nir_lower_doubles_op_to_options_mask(nir_op opcode);
4065 bool nir_lower_doubles(nir_shader *shader, const nir_shader *softfp64,
4066 nir_lower_doubles_options options);
4067 bool nir_lower_pack(nir_shader *shader);
4068
4069 bool nir_lower_point_size(nir_shader *shader, float min, float max);
4070
4071 typedef enum {
4072 nir_lower_interpolation_at_sample = (1 << 1),
4073 nir_lower_interpolation_at_offset = (1 << 2),
4074 nir_lower_interpolation_centroid = (1 << 3),
4075 nir_lower_interpolation_pixel = (1 << 4),
4076 nir_lower_interpolation_sample = (1 << 5),
4077 } nir_lower_interpolation_options;
4078
4079 bool nir_lower_interpolation(nir_shader *shader,
4080 nir_lower_interpolation_options options);
4081
4082 bool nir_normalize_cubemap_coords(nir_shader *shader);
4083
4084 void nir_live_ssa_defs_impl(nir_function_impl *impl);
4085
4086 void nir_loop_analyze_impl(nir_function_impl *impl,
4087 nir_variable_mode indirect_mask);
4088
4089 bool nir_ssa_defs_interfere(nir_ssa_def *a, nir_ssa_def *b);
4090
4091 bool nir_repair_ssa_impl(nir_function_impl *impl);
4092 bool nir_repair_ssa(nir_shader *shader);
4093
4094 void nir_convert_loop_to_lcssa(nir_loop *loop);
4095 bool nir_convert_to_lcssa(nir_shader *shader, bool skip_invariants, bool skip_bool_invariants);
4096 bool* nir_divergence_analysis(nir_shader *shader, nir_divergence_options options);
4097
4098 /* If phi_webs_only is true, only convert SSA values involved in phi nodes to
4099 * registers. If false, convert all values (even those not involved in a phi
4100 * node) to registers.
4101 */
4102 bool nir_convert_from_ssa(nir_shader *shader, bool phi_webs_only);
4103
4104 bool nir_lower_phis_to_regs_block(nir_block *block);
4105 bool nir_lower_ssa_defs_to_regs_block(nir_block *block);
4106 bool nir_rematerialize_derefs_in_use_blocks_impl(nir_function_impl *impl);
4107
4108 bool nir_lower_samplers(nir_shader *shader);
4109
4110 /* This is here for unit tests. */
4111 bool nir_opt_comparison_pre_impl(nir_function_impl *impl);
4112
4113 bool nir_opt_comparison_pre(nir_shader *shader);
4114
4115 bool nir_opt_access(nir_shader *shader);
4116 bool nir_opt_algebraic(nir_shader *shader);
4117 bool nir_opt_algebraic_before_ffma(nir_shader *shader);
4118 bool nir_opt_algebraic_late(nir_shader *shader);
4119 bool nir_opt_constant_folding(nir_shader *shader);
4120
4121 bool nir_opt_combine_stores(nir_shader *shader, nir_variable_mode modes);
4122
4123 bool nir_copy_prop(nir_shader *shader);
4124
4125 bool nir_opt_copy_prop_vars(nir_shader *shader);
4126
4127 bool nir_opt_cse(nir_shader *shader);
4128
4129 bool nir_opt_dce(nir_shader *shader);
4130
4131 bool nir_opt_dead_cf(nir_shader *shader);
4132
4133 bool nir_opt_dead_write_vars(nir_shader *shader);
4134
4135 bool nir_opt_deref_impl(nir_function_impl *impl);
4136 bool nir_opt_deref(nir_shader *shader);
4137
4138 bool nir_opt_find_array_copies(nir_shader *shader);
4139
4140 bool nir_opt_gcm(nir_shader *shader, bool value_number);
4141
4142 bool nir_opt_idiv_const(nir_shader *shader, unsigned min_bit_size);
4143
4144 bool nir_opt_if(nir_shader *shader, bool aggressive_last_continue);
4145
4146 bool nir_opt_intrinsics(nir_shader *shader);
4147
4148 bool nir_opt_large_constants(nir_shader *shader,
4149 glsl_type_size_align_func size_align,
4150 unsigned threshold);
4151
4152 bool nir_opt_loop_unroll(nir_shader *shader, nir_variable_mode indirect_mask);
4153
4154 typedef enum {
4155 nir_move_const_undef = (1 << 0),
4156 nir_move_load_ubo = (1 << 1),
4157 nir_move_load_input = (1 << 2),
4158 nir_move_comparisons = (1 << 3),
4159 } nir_move_options;
4160
4161 bool nir_can_move_instr(nir_instr *instr, nir_move_options options);
4162
4163 bool nir_opt_sink(nir_shader *shader, nir_move_options options);
4164
4165 bool nir_opt_move(nir_shader *shader, nir_move_options options);
4166
4167 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit,
4168 bool indirect_load_ok, bool expensive_alu_ok);
4169
4170 bool nir_opt_rematerialize_compares(nir_shader *shader);
4171
4172 bool nir_opt_remove_phis(nir_shader *shader);
4173 bool nir_opt_remove_phis_block(nir_block *block);
4174
4175 bool nir_opt_shrink_load(nir_shader *shader);
4176
4177 bool nir_opt_trivial_continues(nir_shader *shader);
4178
4179 bool nir_opt_undef(nir_shader *shader);
4180
4181 bool nir_opt_vectorize(nir_shader *shader);
4182
4183 bool nir_opt_conditional_discard(nir_shader *shader);
4184
4185 void nir_strip(nir_shader *shader);
4186
4187 void nir_sweep(nir_shader *shader);
4188
4189 void nir_remap_dual_slot_attributes(nir_shader *shader,
4190 uint64_t *dual_slot_inputs);
4191 uint64_t nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot);
4192
4193 nir_intrinsic_op nir_intrinsic_from_system_value(gl_system_value val);
4194 gl_system_value nir_system_value_from_intrinsic(nir_intrinsic_op intrin);
4195
4196 static inline bool
4197 nir_variable_is_in_ubo(const nir_variable *var)
4198 {
4199 return (var->data.mode == nir_var_mem_ubo &&
4200 var->interface_type != NULL);
4201 }
4202
4203 static inline bool
4204 nir_variable_is_in_ssbo(const nir_variable *var)
4205 {
4206 return (var->data.mode == nir_var_mem_ssbo &&
4207 var->interface_type != NULL);
4208 }
4209
4210 static inline bool
4211 nir_variable_is_in_block(const nir_variable *var)
4212 {
4213 return nir_variable_is_in_ubo(var) || nir_variable_is_in_ssbo(var);
4214 }
4215
4216 #ifdef __cplusplus
4217 } /* extern "C" */
4218 #endif
4219
4220 #endif /* NIR_H */