src/compiler/nir/nir_builder.h

   1 /*
   2  * Copyright © 2014-2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef NIR_BUILDER_H
  25 #define NIR_BUILDER_H
  26
  27 #include "nir_control_flow.h"
  28 #include "util/bitscan.h"
  29 #include "util/half_float.h"
  30
  31 struct exec_list;
  32
  33 typedef struct nir_builder {
  34    nir_cursor cursor;
  35
  36    /* Whether new ALU instructions will be marked "exact" */
  37    bool exact;
  38
  39    nir_shader *shader;
  40    nir_function_impl *impl;
  41 } nir_builder;
  42
  43 static inline void
  44 nir_builder_init(nir_builder *build, nir_function_impl *impl)
  45 {
  46    memset(build, 0, sizeof(*build));
  47    build->exact = false;
  48    build->impl = impl;
  49    build->shader = impl->function->shader;
  50 }
  51
  52 static inline void
  53 nir_builder_init_simple_shader(nir_builder *build, void *mem_ctx,
  54                                gl_shader_stage stage,
  55                                const nir_shader_compiler_options *options)
  56 {
  57    build->shader = nir_shader_create(mem_ctx, stage, options, NULL);
  58    nir_function *func = nir_function_create(build->shader, "main");
  59    func->is_entrypoint = true;
  60    build->exact = false;
  61    build->impl = nir_function_impl_create(func);
  62    build->cursor = nir_after_cf_list(&build->impl->body);
  63 }
  64
  65 static inline void
  66 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
  67 {
  68    nir_instr_insert(build->cursor, instr);
  69
  70    /* Move the cursor forward. */
  71    build->cursor = nir_after_instr(instr);
  72 }
  73
  74 static inline nir_instr *
  75 nir_builder_last_instr(nir_builder *build)
  76 {
  77    assert(build->cursor.option == nir_cursor_after_instr);
  78    return build->cursor.instr;
  79 }
  80
  81 static inline void
  82 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
  83 {
  84    nir_cf_node_insert(build->cursor, cf);
  85 }
  86
  87 static inline bool
  88 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
  89 {
  90    nir_block *block = nir_cursor_current_block(build->cursor);
  91    for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
  92       if (n == cf_node)
  93          return true;
  94    }
  95    return false;
  96 }
  97
  98 static inline nir_if *
  99 nir_push_if(nir_builder *build, nir_ssa_def *condition)
 100 {
 101    nir_if *nif = nir_if_create(build->shader);
 102    nif->condition = nir_src_for_ssa(condition);
 103    nir_builder_cf_insert(build, &nif->cf_node);
 104    build->cursor = nir_before_cf_list(&nif->then_list);
 105    return nif;
 106 }
 107
 108 static inline nir_if *
 109 nir_push_else(nir_builder *build, nir_if *nif)
 110 {
 111    if (nif) {
 112       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 113    } else {
 114       nir_block *block = nir_cursor_current_block(build->cursor);
 115       nif = nir_cf_node_as_if(block->cf_node.parent);
 116    }
 117    build->cursor = nir_before_cf_list(&nif->else_list);
 118    return nif;
 119 }
 120
 121 static inline void
 122 nir_pop_if(nir_builder *build, nir_if *nif)
 123 {
 124    if (nif) {
 125       assert(nir_builder_is_inside_cf(build, &nif->cf_node));
 126    } else {
 127       nir_block *block = nir_cursor_current_block(build->cursor);
 128       nif = nir_cf_node_as_if(block->cf_node.parent);
 129    }
 130    build->cursor = nir_after_cf_node(&nif->cf_node);
 131 }
 132
 133 static inline nir_ssa_def *
 134 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
 135 {
 136    nir_block *block = nir_cursor_current_block(build->cursor);
 137    nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
 138
 139    nir_phi_instr *phi = nir_phi_instr_create(build->shader);
 140
 141    nir_phi_src *src = ralloc(phi, nir_phi_src);
 142    src->pred = nir_if_last_then_block(nif);
 143    src->src = nir_src_for_ssa(then_def);
 144    exec_list_push_tail(&phi->srcs, &src->node);
 145
 146    src = ralloc(phi, nir_phi_src);
 147    src->pred = nir_if_last_else_block(nif);
 148    src->src = nir_src_for_ssa(else_def);
 149    exec_list_push_tail(&phi->srcs, &src->node);
 150
 151    assert(then_def->num_components == else_def->num_components);
 152    assert(then_def->bit_size == else_def->bit_size);
 153    nir_ssa_dest_init(&phi->instr, &phi->dest,
 154                      then_def->num_components, then_def->bit_size, NULL);
 155
 156    nir_builder_instr_insert(build, &phi->instr);
 157
 158    return &phi->dest.ssa;
 159 }
 160
 161 static inline nir_loop *
 162 nir_push_loop(nir_builder *build)
 163 {
 164    nir_loop *loop = nir_loop_create(build->shader);
 165    nir_builder_cf_insert(build, &loop->cf_node);
 166    build->cursor = nir_before_cf_list(&loop->body);
 167    return loop;
 168 }
 169
 170 static inline void
 171 nir_pop_loop(nir_builder *build, nir_loop *loop)
 172 {
 173    if (loop) {
 174       assert(nir_builder_is_inside_cf(build, &loop->cf_node));
 175    } else {
 176       nir_block *block = nir_cursor_current_block(build->cursor);
 177       loop = nir_cf_node_as_loop(block->cf_node.parent);
 178    }
 179    build->cursor = nir_after_cf_node(&loop->cf_node);
 180 }
 181
 182 static inline nir_ssa_def *
 183 nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
 184 {
 185    nir_ssa_undef_instr *undef =
 186       nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
 187    if (!undef)
 188       return NULL;
 189
 190    nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
 191
 192    return &undef->def;
 193 }
 194
 195 static inline nir_ssa_def *
 196 nir_build_imm(nir_builder *build, unsigned num_components,
 197               unsigned bit_size, const nir_const_value *value)
 198 {
 199    nir_load_const_instr *load_const =
 200       nir_load_const_instr_create(build->shader, num_components, bit_size);
 201    if (!load_const)
 202       return NULL;
 203
 204    memcpy(load_const->value, value, sizeof(nir_const_value) * num_components);
 205
 206    nir_builder_instr_insert(build, &load_const->instr);
 207
 208    return &load_const->def;
 209 }
 210
 211 static inline nir_ssa_def *
 212 nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
 213 {
 214    nir_load_const_instr *load_const =
 215       nir_load_const_instr_create(build->shader, num_components, bit_size);
 216
 217    /* nir_load_const_instr_create uses rzalloc so it's already zero */
 218
 219    nir_builder_instr_insert(build, &load_const->instr);
 220
 221    return &load_const->def;
 222 }
 223
 224 static inline nir_ssa_def *
 225 nir_imm_bool(nir_builder *build, bool x)
 226 {
 227    nir_const_value v;
 228
 229    memset(&v, 0, sizeof(v));
 230    v.b = x;
 231
 232    return nir_build_imm(build, 1, 1, &v);
 233 }
 234
 235 static inline nir_ssa_def *
 236 nir_imm_true(nir_builder *build)
 237 {
 238    return nir_imm_bool(build, true);
 239 }
 240
 241 static inline nir_ssa_def *
 242 nir_imm_false(nir_builder *build)
 243 {
 244    return nir_imm_bool(build, false);
 245 }
 246
 247 static inline nir_ssa_def *
 248 nir_imm_float16(nir_builder *build, float x)
 249 {
 250    nir_const_value v;
 251
 252    memset(&v, 0, sizeof(v));
 253    v.u16 = _mesa_float_to_half(x);
 254
 255    return nir_build_imm(build, 1, 16, &v);
 256 }
 257
 258 static inline nir_ssa_def *
 259 nir_imm_float(nir_builder *build, float x)
 260 {
 261    nir_const_value v;
 262
 263    memset(&v, 0, sizeof(v));
 264    v.f32 = x;
 265
 266    return nir_build_imm(build, 1, 32, &v);
 267 }
 268
 269 static inline nir_ssa_def *
 270 nir_imm_double(nir_builder *build, double x)
 271 {
 272    nir_const_value v;
 273
 274    memset(&v, 0, sizeof(v));
 275    v.f64 = x;
 276
 277    return nir_build_imm(build, 1, 64, &v);
 278 }
 279
 280 static inline nir_ssa_def *
 281 nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
 282 {
 283    switch (bit_size) {
 284    case 16:
 285       return nir_imm_float16(build, x);
 286    case 32:
 287       return nir_imm_float(build, x);
 288    case 64:
 289       return nir_imm_double(build, x);
 290    }
 291
 292    unreachable("unknown float immediate bit size");
 293 }
 294
 295 static inline nir_ssa_def *
 296 nir_imm_vec2(nir_builder *build, float x, float y)
 297 {
 298    nir_const_value v[2];
 299
 300    memset(v, 0, sizeof(v));
 301    v[0].f32 = x;
 302    v[1].f32 = y;
 303
 304    return nir_build_imm(build, 2, 32, v);
 305 }
 306
 307 static inline nir_ssa_def *
 308 nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
 309 {
 310    nir_const_value v[4];
 311
 312    memset(v, 0, sizeof(v));
 313    v[0].f32 = x;
 314    v[1].f32 = y;
 315    v[2].f32 = z;
 316    v[3].f32 = w;
 317
 318    return nir_build_imm(build, 4, 32, v);
 319 }
 320
 321 static inline nir_ssa_def *
 322 nir_imm_ivec2(nir_builder *build, int x, int y)
 323 {
 324    nir_const_value v[2];
 325
 326    memset(v, 0, sizeof(v));
 327    v[0].i32 = x;
 328    v[1].i32 = y;
 329
 330    return nir_build_imm(build, 2, 32, v);
 331 }
 332
 333 static inline nir_ssa_def *
 334 nir_imm_int(nir_builder *build, int x)
 335 {
 336    nir_const_value v;
 337
 338    memset(&v, 0, sizeof(v));
 339    v.i32 = x;
 340
 341    return nir_build_imm(build, 1, 32, &v);
 342 }
 343
 344 static inline nir_ssa_def *
 345 nir_imm_int64(nir_builder *build, int64_t x)
 346 {
 347    nir_const_value v;
 348
 349    memset(&v, 0, sizeof(v));
 350    v.i64 = x;
 351
 352    return nir_build_imm(build, 1, 64, &v);
 353 }
 354
 355 static inline nir_ssa_def *
 356 nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
 357 {
 358    nir_const_value v;
 359
 360    memset(&v, 0, sizeof(v));
 361    assert(bit_size <= 64);
 362    if (bit_size == 1)
 363       v.b = x & 1;
 364    else
 365       v.i64 = x & (~0ull >> (64 - bit_size));
 366
 367    return nir_build_imm(build, 1, bit_size, &v);
 368 }
 369
 370 static inline nir_ssa_def *
 371 nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
 372 {
 373    nir_const_value v[4];
 374
 375    memset(v, 0, sizeof(v));
 376    v[0].i32 = x;
 377    v[1].i32 = y;
 378    v[2].i32 = z;
 379    v[3].i32 = w;
 380
 381    return nir_build_imm(build, 4, 32, v);
 382 }
 383
 384 static inline nir_ssa_def *
 385 nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
 386 {
 387    /* We use a 0/-1 convention for all booleans regardless of size */
 388    return nir_imm_intN_t(build, -(int)x, bit_size);
 389 }
 390
 391 static inline nir_ssa_def *
 392 nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr)
 393 {
 394    const nir_op_info *op_info = &nir_op_infos[instr->op];
 395
 396    instr->exact = build->exact;
 397
 398    /* Guess the number of components the destination temporary should have
 399     * based on our input sizes, if it's not fixed for the op.
 400     */
 401    unsigned num_components = op_info->output_size;
 402    if (num_components == 0) {
 403       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 404          if (op_info->input_sizes[i] == 0)
 405             num_components = MAX2(num_components,
 406                                   instr->src[i].src.ssa->num_components);
 407       }
 408    }
 409    assert(num_components != 0);
 410
 411    /* Figure out the bitwidth based on the source bitwidth if the instruction
 412     * is variable-width.
 413     */
 414    unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
 415    if (bit_size == 0) {
 416       for (unsigned i = 0; i < op_info->num_inputs; i++) {
 417          unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
 418          if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
 419             if (bit_size)
 420                assert(src_bit_size == bit_size);
 421             else
 422                bit_size = src_bit_size;
 423          } else {
 424             assert(src_bit_size ==
 425                nir_alu_type_get_type_size(op_info->input_types[i]));
 426          }
 427       }
 428    }
 429
 430    /* When in doubt, assume 32. */
 431    if (bit_size == 0)
 432       bit_size = 32;
 433
 434    /* Make sure we don't swizzle from outside of our source vector (like if a
 435     * scalar value was passed into a multiply with a vector).
 436     */
 437    for (unsigned i = 0; i < op_info->num_inputs; i++) {
 438       for (unsigned j = instr->src[i].src.ssa->num_components;
 439            j < NIR_MAX_VEC_COMPONENTS; j++) {
 440          instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
 441       }
 442    }
 443
 444    nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
 445                      bit_size, NULL);
 446    instr->dest.write_mask = (1 << num_components) - 1;
 447
 448    nir_builder_instr_insert(build, &instr->instr);
 449
 450    return &instr->dest.dest.ssa;
 451 }
 452
 453 static inline nir_ssa_def *
 454 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
 455               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
 456 {
 457    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 458    if (!instr)
 459       return NULL;
 460
 461    instr->src[0].src = nir_src_for_ssa(src0);
 462    if (src1)
 463       instr->src[1].src = nir_src_for_ssa(src1);
 464    if (src2)
 465       instr->src[2].src = nir_src_for_ssa(src2);
 466    if (src3)
 467       instr->src[3].src = nir_src_for_ssa(src3);
 468
 469    return nir_builder_alu_instr_finish_and_insert(build, instr);
 470 }
 471
 472 /* for the couple special cases with more than 4 src args: */
 473 static inline nir_ssa_def *
 474 nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs)
 475 {
 476    const nir_op_info *op_info = &nir_op_infos[op];
 477    nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
 478    if (!instr)
 479       return NULL;
 480
 481    for (unsigned i = 0; i < op_info->num_inputs; i++)
 482       instr->src[i].src = nir_src_for_ssa(srcs[i]);
 483
 484    return nir_builder_alu_instr_finish_and_insert(build, instr);
 485 }
 486
 487 #include "nir_builder_opcodes.h"
 488
 489 static inline nir_ssa_def *
 490 nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
 491 {
 492    return nir_build_alu_src_arr(build, nir_op_vec(num_components), comp);
 493 }
 494
 495 static inline nir_ssa_def *
 496 nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
 497 {
 498    assert(!src.abs && !src.negate);
 499    nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
 500    nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
 501                      nir_src_bit_size(src.src), NULL);
 502    mov->exact = build->exact;
 503    mov->dest.write_mask = (1 << num_components) - 1;
 504    mov->src[0] = src;
 505    nir_builder_instr_insert(build, &mov->instr);
 506
 507    return &mov->dest.dest.ssa;
 508 }
 509
 510 /**
 511  * Construct an fmov or imov that reswizzles the source's components.
 512  */
 513 static inline nir_ssa_def *
 514 nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
 515             unsigned num_components)
 516 {
 517    assert(num_components <= NIR_MAX_VEC_COMPONENTS);
 518    nir_alu_src alu_src = { NIR_SRC_INIT };
 519    alu_src.src = nir_src_for_ssa(src);
 520
 521    bool is_identity_swizzle = true;
 522    for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
 523       if (swiz[i] != i)
 524          is_identity_swizzle = false;
 525       alu_src.swizzle[i] = swiz[i];
 526    }
 527
 528    if (num_components == src->num_components && is_identity_swizzle)
 529       return src;
 530
 531    return nir_mov_alu(build, alu_src, num_components);
 532 }
 533
 534 /* Selects the right fdot given the number of components in each source. */
 535 static inline nir_ssa_def *
 536 nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
 537 {
 538    assert(src0->num_components == src1->num_components);
 539    switch (src0->num_components) {
 540    case 1: return nir_fmul(build, src0, src1);
 541    case 2: return nir_fdot2(build, src0, src1);
 542    case 3: return nir_fdot3(build, src0, src1);
 543    case 4: return nir_fdot4(build, src0, src1);
 544    default:
 545       unreachable("bad component size");
 546    }
 547
 548    return NULL;
 549 }
 550
 551 static inline nir_ssa_def *
 552 nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
 553 {
 554    switch (src0->num_components) {
 555    case 1: return nir_ine(b, src0, src1);
 556    case 2: return nir_bany_inequal2(b, src0, src1);
 557    case 3: return nir_bany_inequal3(b, src0, src1);
 558    case 4: return nir_bany_inequal4(b, src0, src1);
 559    default:
 560       unreachable("bad component size");
 561    }
 562 }
 563
 564 static inline nir_ssa_def *
 565 nir_bany(nir_builder *b, nir_ssa_def *src)
 566 {
 567    return nir_bany_inequal(b, src, nir_imm_false(b));
 568 }
 569
 570 static inline nir_ssa_def *
 571 nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
 572 {
 573    return nir_swizzle(b, def, &c, 1);
 574 }
 575
 576 static inline nir_ssa_def *
 577 nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
 578 {
 579    unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
 580
 581    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 582       if ((mask & (1 << i)) == 0)
 583          continue;
 584       swizzle[num_channels++] = i;
 585    }
 586
 587    return nir_swizzle(b, def, swizzle, num_channels);
 588 }
 589
 590 static inline nir_ssa_def *
 591 _nir_vector_extract_helper(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c,
 592                            unsigned start, unsigned end)
 593 {
 594    if (start == end - 1) {
 595       return nir_channel(b, vec, start);
 596    } else {
 597       unsigned mid = start + (end - start) / 2;
 598       return nir_bcsel(b, nir_ilt(b, c, nir_imm_int(b, mid)),
 599                        _nir_vector_extract_helper(b, vec, c, start, mid),
 600                        _nir_vector_extract_helper(b, vec, c, mid, end));
 601    }
 602 }
 603
 604 static inline nir_ssa_def *
 605 nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
 606 {
 607    nir_src c_src = nir_src_for_ssa(c);
 608    if (nir_src_is_const(c_src)) {
 609       unsigned c_const = nir_src_as_uint(c_src);
 610       if (c_const < vec->num_components)
 611          return nir_channel(b, vec, c_const);
 612       else
 613          return nir_ssa_undef(b, 1, vec->bit_size);
 614    } else {
 615       return _nir_vector_extract_helper(b, vec, c, 0, vec->num_components);
 616    }
 617 }
 618
 619 static inline nir_ssa_def *
 620 nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 621 {
 622    if (x->bit_size == dest_bit_size)
 623       return x;
 624
 625    switch (dest_bit_size) {
 626    case 64: return nir_i2i64(build, x);
 627    case 32: return nir_i2i32(build, x);
 628    case 16: return nir_i2i16(build, x);
 629    case 8:  return nir_i2i8(build, x);
 630    default: unreachable("Invalid bit size");
 631    }
 632 }
 633
 634 static inline nir_ssa_def *
 635 nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
 636 {
 637    if (x->bit_size == dest_bit_size)
 638       return x;
 639
 640    switch (dest_bit_size) {
 641    case 64: return nir_u2u64(build, x);
 642    case 32: return nir_u2u32(build, x);
 643    case 16: return nir_u2u16(build, x);
 644    case 8:  return nir_u2u8(build, x);
 645    default: unreachable("Invalid bit size");
 646    }
 647 }
 648
 649 static inline nir_ssa_def *
 650 nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 651 {
 652    assert(x->bit_size <= 64);
 653    if (x->bit_size < 64)
 654       y &= (1ull << x->bit_size) - 1;
 655
 656    if (y == 0) {
 657       return x;
 658    } else {
 659       return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
 660    }
 661 }
 662
 663 static inline nir_ssa_def *
 664 nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
 665 {
 666    assert(x->bit_size <= 64);
 667    if (x->bit_size < 64)
 668       y &= (1ull << x->bit_size) - 1;
 669
 670    if (y == 0) {
 671       return nir_imm_intN_t(build, 0, x->bit_size);
 672    } else if (y == 1) {
 673       return x;
 674    } else if (util_is_power_of_two_or_zero64(y)) {
 675       return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
 676    } else {
 677       return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
 678    }
 679 }
 680
 681 static inline nir_ssa_def *
 682 nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
 683 {
 684    return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 685 }
 686
 687 static inline nir_ssa_def *
 688 nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
 689 {
 690    return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
 691 }
 692
 693 static inline nir_ssa_def *
 694 nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 695 {
 696    assert(src->num_components * src->bit_size == dest_bit_size);
 697
 698    switch (dest_bit_size) {
 699    case 64:
 700       switch (src->bit_size) {
 701       case 32: return nir_pack_64_2x32(b, src);
 702       case 16: return nir_pack_64_4x16(b, src);
 703       default: break;
 704       }
 705       break;
 706
 707    case 32:
 708       if (src->bit_size == 16)
 709          return nir_pack_32_2x16(b, src);
 710       break;
 711
 712    default:
 713       break;
 714    }
 715
 716    /* If we got here, we have no dedicated unpack opcode. */
 717    nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
 718    for (unsigned i = 0; i < src->num_components; i++) {
 719       nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
 720       val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
 721       dest = nir_ior(b, dest, val);
 722    }
 723    return dest;
 724 }
 725
 726 static inline nir_ssa_def *
 727 nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 728 {
 729    assert(src->num_components == 1);
 730    assert(src->bit_size > dest_bit_size);
 731    const unsigned dest_num_components = src->bit_size / dest_bit_size;
 732    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 733
 734    switch (src->bit_size) {
 735    case 64:
 736       switch (dest_bit_size) {
 737       case 32: return nir_unpack_64_2x32(b, src);
 738       case 16: return nir_unpack_64_4x16(b, src);
 739       default: break;
 740       }
 741       break;
 742
 743    case 32:
 744       if (dest_bit_size == 16)
 745          return nir_unpack_32_2x16(b, src);
 746       break;
 747
 748    default:
 749       break;
 750    }
 751
 752    /* If we got here, we have no dedicated unpack opcode. */
 753    nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
 754    for (unsigned i = 0; i < dest_num_components; i++) {
 755       nir_ssa_def *val = nir_ushr(b, src, nir_imm_int(b, i * dest_bit_size));
 756       dest_comps[i] = nir_u2u(b, val, dest_bit_size);
 757    }
 758    return nir_vec(b, dest_comps, dest_num_components);
 759 }
 760
 761 static inline nir_ssa_def *
 762 nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
 763 {
 764    assert((src->bit_size * src->num_components) % dest_bit_size == 0);
 765    const unsigned dest_num_components =
 766       (src->bit_size * src->num_components) / dest_bit_size;
 767    assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
 768
 769    if (src->bit_size > dest_bit_size) {
 770       assert(src->bit_size % dest_bit_size == 0);
 771       if (src->num_components == 1) {
 772          return nir_unpack_bits(b, src, dest_bit_size);
 773       } else {
 774          const unsigned divisor = src->bit_size / dest_bit_size;
 775          assert(src->num_components * divisor == dest_num_components);
 776          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 777          for (unsigned i = 0; i < src->num_components; i++) {
 778             nir_ssa_def *unpacked =
 779                nir_unpack_bits(b, nir_channel(b, src, i), dest_bit_size);
 780             assert(unpacked->num_components == divisor);
 781             for (unsigned j = 0; j < divisor; j++)
 782                dest[i * divisor + j] = nir_channel(b, unpacked, j);
 783          }
 784          return nir_vec(b, dest, dest_num_components);
 785       }
 786    } else if (src->bit_size < dest_bit_size) {
 787       assert(dest_bit_size % src->bit_size == 0);
 788       if (dest_num_components == 1) {
 789          return nir_pack_bits(b, src, dest_bit_size);
 790       } else {
 791          const unsigned divisor = dest_bit_size / src->bit_size;
 792          assert(src->num_components == dest_num_components * divisor);
 793          nir_ssa_def *dest[NIR_MAX_VEC_COMPONENTS];
 794          for (unsigned i = 0; i < dest_num_components; i++) {
 795             nir_component_mask_t src_mask =
 796                ((1 << divisor) - 1) << (i * divisor);
 797             dest[i] = nir_pack_bits(b, nir_channels(b, src, src_mask),
 798                                        dest_bit_size);
 799          }
 800          return nir_vec(b, dest, dest_num_components);
 801       }
 802    } else {
 803       assert(src->bit_size == dest_bit_size);
 804       return src;
 805    }
 806 }
 807
 808 /**
 809  * Turns a nir_src into a nir_ssa_def * so it can be passed to
 810  * nir_build_alu()-based builder calls.
 811  *
 812  * See nir_ssa_for_alu_src() for alu instructions.
 813  */
 814 static inline nir_ssa_def *
 815 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
 816 {
 817    if (src.is_ssa && src.ssa->num_components == num_components)
 818       return src.ssa;
 819
 820    nir_alu_src alu = { NIR_SRC_INIT };
 821    alu.src = src;
 822    for (int j = 0; j < 4; j++)
 823       alu.swizzle[j] = j;
 824
 825    return nir_mov_alu(build, alu, num_components);
 826 }
 827
 828 /**
 829  * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
 830  * nir_alu_src's swizzle.
 831  */
 832 static inline nir_ssa_def *
 833 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
 834 {
 835    static uint8_t trivial_swizzle[NIR_MAX_VEC_COMPONENTS];
 836    for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
 837       trivial_swizzle[i] = i;
 838    nir_alu_src *src = &instr->src[srcn];
 839    unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
 840
 841    if (src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
 842        !src->abs && !src->negate &&
 843        (memcmp(src->swizzle, trivial_swizzle, num_components) == 0))
 844       return src->src.ssa;
 845
 846    return nir_mov_alu(build, *src, num_components);
 847 }
 848
 849 static inline unsigned
 850 nir_get_ptr_bitsize(nir_builder *build)
 851 {
 852    if (build->shader->info.stage == MESA_SHADER_KERNEL)
 853       return build->shader->info.cs.ptr_size;
 854    return 32;
 855 }
 856
 857 static inline nir_deref_instr *
 858 nir_build_deref_var(nir_builder *build, nir_variable *var)
 859 {
 860    nir_deref_instr *deref =
 861       nir_deref_instr_create(build->shader, nir_deref_type_var);
 862
 863    deref->mode = var->data.mode;
 864    deref->type = var->type;
 865    deref->var = var;
 866
 867    nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
 868                      nir_get_ptr_bitsize(build), NULL);
 869
 870    nir_builder_instr_insert(build, &deref->instr);
 871
 872    return deref;
 873 }
 874
 875 static inline nir_deref_instr *
 876 nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
 877                       nir_ssa_def *index)
 878 {
 879    assert(glsl_type_is_array(parent->type) ||
 880           glsl_type_is_matrix(parent->type) ||
 881           glsl_type_is_vector(parent->type));
 882
 883    assert(index->bit_size == parent->dest.ssa.bit_size);
 884
 885    nir_deref_instr *deref =
 886       nir_deref_instr_create(build->shader, nir_deref_type_array);
 887
 888    deref->mode = parent->mode;
 889    deref->type = glsl_get_array_element(parent->type);
 890    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 891    deref->arr.index = nir_src_for_ssa(index);
 892
 893    nir_ssa_dest_init(&deref->instr, &deref->dest,
 894                      parent->dest.ssa.num_components,
 895                      parent->dest.ssa.bit_size, NULL);
 896
 897    nir_builder_instr_insert(build, &deref->instr);
 898
 899    return deref;
 900 }
 901
 902 static inline nir_deref_instr *
 903 nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
 904                           int64_t index)
 905 {
 906    assert(parent->dest.is_ssa);
 907    nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
 908                                          parent->dest.ssa.bit_size);
 909
 910    return nir_build_deref_array(build, parent, idx_ssa);
 911 }
 912
 913 static inline nir_deref_instr *
 914 nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
 915                              nir_ssa_def *index)
 916 {
 917    assert(parent->deref_type == nir_deref_type_array ||
 918           parent->deref_type == nir_deref_type_ptr_as_array ||
 919           parent->deref_type == nir_deref_type_cast);
 920
 921    assert(index->bit_size == parent->dest.ssa.bit_size);
 922
 923    nir_deref_instr *deref =
 924       nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
 925
 926    deref->mode = parent->mode;
 927    deref->type = parent->type;
 928    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 929    deref->arr.index = nir_src_for_ssa(index);
 930
 931    nir_ssa_dest_init(&deref->instr, &deref->dest,
 932                      parent->dest.ssa.num_components,
 933                      parent->dest.ssa.bit_size, NULL);
 934
 935    nir_builder_instr_insert(build, &deref->instr);
 936
 937    return deref;
 938 }
 939
 940 static inline nir_deref_instr *
 941 nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
 942 {
 943    assert(glsl_type_is_array(parent->type) ||
 944           glsl_type_is_matrix(parent->type));
 945
 946    nir_deref_instr *deref =
 947       nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
 948
 949    deref->mode = parent->mode;
 950    deref->type = glsl_get_array_element(parent->type);
 951    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 952
 953    nir_ssa_dest_init(&deref->instr, &deref->dest,
 954                      parent->dest.ssa.num_components,
 955                      parent->dest.ssa.bit_size, NULL);
 956
 957    nir_builder_instr_insert(build, &deref->instr);
 958
 959    return deref;
 960 }
 961
 962 static inline nir_deref_instr *
 963 nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
 964                        unsigned index)
 965 {
 966    assert(glsl_type_is_struct_or_ifc(parent->type));
 967
 968    nir_deref_instr *deref =
 969       nir_deref_instr_create(build->shader, nir_deref_type_struct);
 970
 971    deref->mode = parent->mode;
 972    deref->type = glsl_get_struct_field(parent->type, index);
 973    deref->parent = nir_src_for_ssa(&parent->dest.ssa);
 974    deref->strct.index = index;
 975
 976    nir_ssa_dest_init(&deref->instr, &deref->dest,
 977                      parent->dest.ssa.num_components,
 978                      parent->dest.ssa.bit_size, NULL);
 979
 980    nir_builder_instr_insert(build, &deref->instr);
 981
 982    return deref;
 983 }
 984
 985 static inline nir_deref_instr *
 986 nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
 987                      nir_variable_mode mode, const struct glsl_type *type,
 988                      unsigned ptr_stride)
 989 {
 990    nir_deref_instr *deref =
 991       nir_deref_instr_create(build->shader, nir_deref_type_cast);
 992
 993    deref->mode = mode;
 994    deref->type = type;
 995    deref->parent = nir_src_for_ssa(parent);
 996    deref->cast.ptr_stride = ptr_stride;
 997
 998    nir_ssa_dest_init(&deref->instr, &deref->dest,
 999                      parent->num_components, parent->bit_size, NULL);
1000
1001    nir_builder_instr_insert(build, &deref->instr);
1002
1003    return deref;
1004 }
1005
1006 /** Returns a deref that follows another but starting from the given parent
1007  *
1008  * The new deref will be the same type and take the same array or struct index
1009  * as the leader deref but it may have a different parent.  This is very
1010  * useful for walking deref paths.
1011  */
1012 static inline nir_deref_instr *
1013 nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1014                          nir_deref_instr *leader)
1015 {
1016    /* If the derefs would have the same parent, don't make a new one */
1017    assert(leader->parent.is_ssa);
1018    if (leader->parent.ssa == &parent->dest.ssa)
1019       return leader;
1020
1021    UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1022
1023    switch (leader->deref_type) {
1024    case nir_deref_type_var:
1025       unreachable("A var dereference cannot have a parent");
1026       break;
1027
1028    case nir_deref_type_array:
1029    case nir_deref_type_array_wildcard:
1030       assert(glsl_type_is_matrix(parent->type) ||
1031              glsl_type_is_array(parent->type) ||
1032              (leader->deref_type == nir_deref_type_array &&
1033               glsl_type_is_vector(parent->type)));
1034       assert(glsl_get_length(parent->type) ==
1035              glsl_get_length(leader_parent->type));
1036
1037       if (leader->deref_type == nir_deref_type_array) {
1038          assert(leader->arr.index.is_ssa);
1039          nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1040                                          parent->dest.ssa.bit_size);
1041          return nir_build_deref_array(b, parent, index);
1042       } else {
1043          return nir_build_deref_array_wildcard(b, parent);
1044       }
1045
1046    case nir_deref_type_struct:
1047       assert(glsl_type_is_struct_or_ifc(parent->type));
1048       assert(glsl_get_length(parent->type) ==
1049              glsl_get_length(leader_parent->type));
1050
1051       return nir_build_deref_struct(b, parent, leader->strct.index);
1052
1053    default:
1054       unreachable("Invalid deref instruction type");
1055    }
1056 }
1057
1058 static inline nir_ssa_def *
1059 nir_load_reg(nir_builder *build, nir_register *reg)
1060 {
1061    return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1062 }
1063
1064 static inline nir_ssa_def *
1065 nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1066                            enum gl_access_qualifier access)
1067 {
1068    nir_intrinsic_instr *load =
1069       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_deref);
1070    load->num_components = glsl_get_vector_elements(deref->type);
1071    load->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1072    nir_ssa_dest_init(&load->instr, &load->dest, load->num_components,
1073                      glsl_get_bit_size(deref->type), NULL);
1074    nir_intrinsic_set_access(load, access);
1075    nir_builder_instr_insert(build, &load->instr);
1076    return &load->dest.ssa;
1077 }
1078
1079 static inline nir_ssa_def *
1080 nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1081 {
1082    return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1083 }
1084
1085 static inline void
1086 nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1087                             nir_ssa_def *value, unsigned writemask,
1088                             enum gl_access_qualifier access)
1089 {
1090    nir_intrinsic_instr *store =
1091       nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_deref);
1092    store->num_components = glsl_get_vector_elements(deref->type);
1093    store->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1094    store->src[1] = nir_src_for_ssa(value);
1095    nir_intrinsic_set_write_mask(store,
1096                                 writemask & ((1 << store->num_components) - 1));
1097    nir_intrinsic_set_access(store, access);
1098    nir_builder_instr_insert(build, &store->instr);
1099 }
1100
1101 static inline void
1102 nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1103                 nir_ssa_def *value, unsigned writemask)
1104 {
1105    nir_store_deref_with_access(build, deref, value, writemask,
1106                                (enum gl_access_qualifier)0);
1107 }
1108
1109 static inline void
1110 nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1111 {
1112    nir_intrinsic_instr *copy =
1113       nir_intrinsic_instr_create(build->shader, nir_intrinsic_copy_deref);
1114    copy->src[0] = nir_src_for_ssa(&dest->dest.ssa);
1115    copy->src[1] = nir_src_for_ssa(&src->dest.ssa);
1116    nir_builder_instr_insert(build, &copy->instr);
1117 }
1118
1119 static inline nir_ssa_def *
1120 nir_load_var(nir_builder *build, nir_variable *var)
1121 {
1122    return nir_load_deref(build, nir_build_deref_var(build, var));
1123 }
1124
1125 static inline void
1126 nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1127               unsigned writemask)
1128 {
1129    nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1130 }
1131
1132 static inline void
1133 nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1134 {
1135    nir_copy_deref(build, nir_build_deref_var(build, dest),
1136                          nir_build_deref_var(build, src));
1137 }
1138
1139 static inline nir_ssa_def *
1140 nir_load_param(nir_builder *build, uint32_t param_idx)
1141 {
1142    assert(param_idx < build->impl->function->num_params);
1143    nir_parameter *param = &build->impl->function->params[param_idx];
1144
1145    nir_intrinsic_instr *load =
1146       nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_param);
1147    nir_intrinsic_set_param_idx(load, param_idx);
1148    load->num_components = param->num_components;
1149    nir_ssa_dest_init(&load->instr, &load->dest,
1150                      param->num_components, param->bit_size, NULL);
1151    nir_builder_instr_insert(build, &load->instr);
1152    return &load->dest.ssa;
1153 }
1154
1155 #include "nir_builder_opcodes.h"
1156
1157 static inline nir_ssa_def *
1158 nir_f2b(nir_builder *build, nir_ssa_def *f)
1159 {
1160    return nir_f2b1(build, f);
1161 }
1162
1163 static inline nir_ssa_def *
1164 nir_i2b(nir_builder *build, nir_ssa_def *i)
1165 {
1166    return nir_i2b1(build, i);
1167 }
1168
1169 static inline nir_ssa_def *
1170 nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1171 {
1172    switch (bit_size) {
1173    case 64: return nir_b2f64(build, b);
1174    case 32: return nir_b2f32(build, b);
1175    case 16: return nir_b2f16(build, b);
1176    default:
1177       unreachable("Invalid bit-size");
1178    };
1179 }
1180
1181 static inline nir_ssa_def *
1182 nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1183                      unsigned interp_mode)
1184 {
1185    nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1186    nir_ssa_dest_init(&bary->instr, &bary->dest, 2, 32, NULL);
1187    nir_intrinsic_set_interp_mode(bary, interp_mode);
1188    nir_builder_instr_insert(build, &bary->instr);
1189    return &bary->dest.ssa;
1190 }
1191
1192 static inline void
1193 nir_jump(nir_builder *build, nir_jump_type jump_type)
1194 {
1195    nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1196    nir_builder_instr_insert(build, &jump->instr);
1197 }
1198
1199 static inline nir_ssa_def *
1200 nir_compare_func(nir_builder *b, enum compare_func func,
1201                  nir_ssa_def *src0, nir_ssa_def *src1)
1202 {
1203    switch (func) {
1204    case COMPARE_FUNC_NEVER:
1205       return nir_imm_int(b, 0);
1206    case COMPARE_FUNC_ALWAYS:
1207       return nir_imm_int(b, ~0);
1208    case COMPARE_FUNC_EQUAL:
1209       return nir_feq(b, src0, src1);
1210    case COMPARE_FUNC_NOTEQUAL:
1211       return nir_fne(b, src0, src1);
1212    case COMPARE_FUNC_GREATER:
1213       return nir_flt(b, src1, src0);
1214    case COMPARE_FUNC_GEQUAL:
1215       return nir_fge(b, src0, src1);
1216    case COMPARE_FUNC_LESS:
1217       return nir_flt(b, src0, src1);
1218    case COMPARE_FUNC_LEQUAL:
1219       return nir_fge(b, src1, src0);
1220    }
1221    unreachable("bad compare func");
1222 }
1223
1224 #endif /* NIR_BUILDER_H */