src/compiler/nir/nir_format_convert.h

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_builder.h"
  25
  26 #include "util/format_rgb9e5.h"
  27
  28 static inline nir_ssa_def *
  29 nir_shift(nir_builder *b, nir_ssa_def *value, int left_shift)
  30 {
  31    if (left_shift > 0)
  32       return nir_ishl(b, value, nir_imm_int(b, left_shift));
  33    else if (left_shift < 0)
  34       return nir_ushr(b, value, nir_imm_int(b, -left_shift));
  35    else
  36       return value;
  37 }
  38
  39 static inline nir_ssa_def *
  40 nir_mask_shift(struct nir_builder *b, nir_ssa_def *src,
  41                uint32_t mask, int left_shift)
  42 {
  43    return nir_shift(b, nir_iand(b, src, nir_imm_int(b, mask)), left_shift);
  44 }
  45
  46 static inline nir_ssa_def *
  47 nir_mask_shift_or(struct nir_builder *b, nir_ssa_def *dst, nir_ssa_def *src,
  48                   uint32_t src_mask, int src_left_shift)
  49 {
  50    return nir_ior(b, nir_mask_shift(b, src, src_mask, src_left_shift), dst);
  51 }
  52
  53 static inline nir_ssa_def *
  54 nir_format_mask_uvec(nir_builder *b, nir_ssa_def *src,
  55                      const unsigned *bits)
  56 {
  57    nir_const_value mask;
  58    for (unsigned i = 0; i < src->num_components; i++) {
  59       assert(bits[i] < 32);
  60       mask.u32[i] = (1u << bits[i]) - 1;
  61    }
  62    return nir_iand(b, src, nir_build_imm(b, src->num_components, 32, mask));
  63 }
  64
  65 static inline nir_ssa_def *
  66 nir_format_sign_extend_ivec(nir_builder *b, nir_ssa_def *src,
  67                             const unsigned *bits)
  68 {
  69    assert(src->num_components <= 4);
  70    nir_ssa_def *comps[4];
  71    for (unsigned i = 0; i < src->num_components; i++) {
  72       nir_ssa_def *shift = nir_imm_int(b, src->bit_size - bits[i]);
  73       comps[i] = nir_ishr(b, nir_ishl(b, nir_channel(b, src, i), shift), shift);
  74    }
  75    return nir_vec(b, comps, src->num_components);
  76 }
  77
  78
  79 static inline nir_ssa_def *
  80 nir_format_unpack_int(nir_builder *b, nir_ssa_def *packed,
  81                       const unsigned *bits, unsigned num_components,
  82                       bool sign_extend)
  83 {
  84    assert(num_components >= 1 && num_components <= 4);
  85    const unsigned bit_size = packed->bit_size;
  86    nir_ssa_def *comps[4];
  87
  88    if (bits[0] >= bit_size) {
  89       assert(bits[0] == bit_size);
  90       assert(num_components == 1);
  91       return packed;
  92    }
  93
  94    unsigned offset = 0;
  95    for (unsigned i = 0; i < num_components; i++) {
  96       assert(bits[i] < bit_size);
  97       assert(offset + bits[i] <= bit_size);
  98       nir_ssa_def *lshift = nir_imm_int(b, bit_size - (offset + bits[i]));
  99       nir_ssa_def *rshift = nir_imm_int(b, bit_size - bits[i]);
 100       if (sign_extend)
 101          comps[i] = nir_ishr(b, nir_ishl(b, packed, lshift), rshift);
 102       else
 103          comps[i] = nir_ushr(b, nir_ishl(b, packed, lshift), rshift);
 104       offset += bits[i];
 105    }
 106    assert(offset <= bit_size);
 107
 108    return nir_vec(b, comps, num_components);
 109 }
 110
 111 static inline nir_ssa_def *
 112 nir_format_unpack_uint(nir_builder *b, nir_ssa_def *packed,
 113                        const unsigned *bits, unsigned num_components)
 114 {
 115    return nir_format_unpack_int(b, packed, bits, num_components, false);
 116 }
 117
 118 static inline nir_ssa_def *
 119 nir_format_unpack_sint(nir_builder *b, nir_ssa_def *packed,
 120                        const unsigned *bits, unsigned num_components)
 121 {
 122    return nir_format_unpack_int(b, packed, bits, num_components, true);
 123 }
 124
 125 static inline nir_ssa_def *
 126 nir_format_pack_uint_unmasked(nir_builder *b, nir_ssa_def *color,
 127                               const unsigned *bits, unsigned num_components)
 128 {
 129    assert(num_components >= 1 && num_components <= 4);
 130    nir_ssa_def *packed = nir_imm_int(b, 0);
 131    unsigned offset = 0;
 132    for (unsigned i = 0; i < num_components; i++) {
 133       packed = nir_ior(b, packed, nir_shift(b, nir_channel(b, color, i),
 134                                                offset));
 135       offset += bits[i];
 136    }
 137    assert(offset <= packed->bit_size);
 138
 139    return packed;
 140 }
 141
 142 static inline nir_ssa_def *
 143 nir_format_pack_uint(nir_builder *b, nir_ssa_def *color,
 144                      const unsigned *bits, unsigned num_components)
 145 {
 146    return nir_format_pack_uint_unmasked(b, nir_format_mask_uvec(b, color, bits),
 147                                         bits, num_components);
 148 }
 149
 150 static inline nir_ssa_def *
 151 nir_format_bitcast_uint_vec_unmasked(nir_builder *b, nir_ssa_def *src,
 152                                      unsigned src_bits, unsigned dst_bits)
 153 {
 154    assert(src_bits == 8 || src_bits == 16 || src_bits == 32);
 155    assert(dst_bits == 8 || dst_bits == 16 || dst_bits == 32);
 156
 157    if (src_bits == dst_bits)
 158       return src;
 159
 160    const unsigned dst_components =
 161       DIV_ROUND_UP(src->num_components * src_bits, dst_bits);
 162    assert(dst_components <= 4);
 163
 164    nir_ssa_def *dst_chan[4] = {0};
 165    if (dst_bits > src_bits) {
 166       unsigned shift = 0;
 167       unsigned dst_idx = 0;
 168       for (unsigned i = 0; i < src->num_components; i++) {
 169          nir_ssa_def *shifted = nir_ishl(b, nir_channel(b, src, i),
 170                                             nir_imm_int(b, shift));
 171          if (shift == 0) {
 172             dst_chan[dst_idx] = shifted;
 173          } else {
 174             dst_chan[dst_idx] = nir_ior(b, dst_chan[dst_idx], shifted);
 175          }
 176
 177          shift += src_bits;
 178          if (shift >= dst_bits) {
 179             dst_idx++;
 180             shift = 0;
 181          }
 182       }
 183    } else {
 184       nir_ssa_def *mask = nir_imm_int(b, ~0u >> (32 - dst_bits));
 185
 186       unsigned src_idx = 0;
 187       unsigned shift = 0;
 188       for (unsigned i = 0; i < dst_components; i++) {
 189          dst_chan[i] = nir_iand(b, nir_ushr(b, nir_channel(b, src, src_idx),
 190                                                nir_imm_int(b, shift)),
 191                                    mask);
 192          shift += dst_bits;
 193          if (shift >= src_bits) {
 194             src_idx++;
 195             shift = 0;
 196          }
 197       }
 198    }
 199
 200    return nir_vec(b, dst_chan, dst_components);
 201 }
 202
 203 static inline nir_ssa_def *
 204 nir_format_linear_to_srgb(nir_builder *b, nir_ssa_def *c)
 205 {
 206    nir_ssa_def *linear = nir_fmul(b, c, nir_imm_float(b, 12.92f));
 207    nir_ssa_def *curved =
 208       nir_fsub(b, nir_fmul(b, nir_imm_float(b, 1.055f),
 209                               nir_fpow(b, c, nir_imm_float(b, 1.0 / 2.4))),
 210                   nir_imm_float(b, 0.055f));
 211
 212    return nir_fsat(b, nir_bcsel(b, nir_flt(b, c, nir_imm_float(b, 0.0031308f)),
 213                                    linear, curved));
 214 }
 215
 216 static inline nir_ssa_def *
 217 nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c)
 218 {
 219    nir_ssa_def *linear = nir_fdiv(b, c, nir_imm_float(b, 12.92f));
 220    nir_ssa_def *curved =
 221       nir_fpow(b, nir_fdiv(b, nir_fadd(b, c, nir_imm_float(b, 0.055f)),
 222                               nir_imm_float(b, 1.055f)),
 223                   nir_imm_float(b, 2.4f));
 224
 225    return nir_fsat(b, nir_bcsel(b, nir_fge(b, nir_imm_float(b, 0.04045f), c),
 226                                    linear, curved));
 227 }
 228
 229 static inline nir_ssa_def *
 230 nir_format_unpack_11f11f10f(nir_builder *b, nir_ssa_def *packed)
 231 {
 232    nir_ssa_def *chans[3];
 233    chans[0] = nir_mask_shift(b, packed, 0x000007ff, 4);
 234    chans[1] = nir_mask_shift(b, packed, 0x003ff100, -7);
 235    chans[2] = nir_mask_shift(b, packed, 0xffc00000, -17);
 236
 237    for (unsigned i = 0; i < 3; i++)
 238       chans[i] = nir_unpack_half_2x16_split_x(b, chans[i]);
 239
 240    return nir_vec(b, chans, 3);
 241 }
 242
 243 static inline nir_ssa_def *
 244 nir_format_pack_r11g11b10f(nir_builder *b, nir_ssa_def *color)
 245 {
 246    /* 10 and 11-bit floats are unsigned.  Clamp to non-negative */
 247    nir_ssa_def *clamped = nir_fmax(b, color, nir_imm_float(b, 0));
 248
 249    nir_ssa_def *undef = nir_ssa_undef(b, 1, color->bit_size);
 250    nir_ssa_def *p1 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 0),
 251                                                  nir_channel(b, clamped, 1));
 252    nir_ssa_def *p2 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 2),
 253                                                  undef);
 254
 255    /* A 10 or 11-bit float has the same exponent as a 16-bit float but with
 256     * fewer mantissa bits and no sign bit.  All we have to do is throw away
 257     * the sign bit and the bottom mantissa bits and shift it into place.
 258     */
 259    nir_ssa_def *packed = nir_imm_int(b, 0);
 260    packed = nir_mask_shift_or(b, packed, p1, 0x00007ff0, -4);
 261    packed = nir_mask_shift_or(b, packed, p1, 0x7ff00000, -9);
 262    packed = nir_mask_shift_or(b, packed, p2, 0x00007fe0, 17);
 263
 264    return packed;
 265 }
 266
 267 static inline nir_ssa_def *
 268 nir_format_pack_r9g9b9e5(nir_builder *b, nir_ssa_def *color)
 269 {
 270    /* See also float3_to_rgb9e5 */
 271
 272    /* First, we need to clamp it to range. */
 273    nir_ssa_def *clamped = nir_fmin(b, color, nir_imm_float(b, MAX_RGB9E5));
 274
 275    /* Get rid of negatives and NaN */
 276    clamped = nir_bcsel(b, nir_ult(b, nir_imm_int(b, 0x7f800000), color),
 277                           nir_imm_float(b, 0), clamped);
 278
 279    /* maxrgb.u = MAX3(rc.u, gc.u, bc.u); */
 280    nir_ssa_def *maxu = nir_umax(b, nir_channel(b, clamped, 0),
 281                        nir_umax(b, nir_channel(b, clamped, 1),
 282                                    nir_channel(b, clamped, 2)));
 283
 284    /* maxrgb.u += maxrgb.u & (1 << (23-9)); */
 285    maxu = nir_iadd(b, maxu, nir_iand(b, maxu, nir_imm_int(b, 1 << 14)));
 286
 287    /* exp_shared = MAX2((maxrgb.u >> 23), -RGB9E5_EXP_BIAS - 1 + 127) +
 288     *              1 + RGB9E5_EXP_BIAS - 127;
 289     */
 290    nir_ssa_def *exp_shared =
 291       nir_iadd(b, nir_umax(b, nir_ushr(b, maxu, nir_imm_int(b, 23)),
 292                               nir_imm_int(b, -RGB9E5_EXP_BIAS - 1 + 127)),
 293                   nir_imm_int(b, 1 + RGB9E5_EXP_BIAS - 127));
 294
 295    /* revdenom_biasedexp = 127 - (exp_shared - RGB9E5_EXP_BIAS -
 296     *                             RGB9E5_MANTISSA_BITS) + 1;
 297     */
 298    nir_ssa_def *revdenom_biasedexp =
 299       nir_isub(b, nir_imm_int(b, 127 + RGB9E5_EXP_BIAS +
 300                                  RGB9E5_MANTISSA_BITS + 1),
 301                   exp_shared);
 302
 303    /* revdenom.u = revdenom_biasedexp << 23; */
 304    nir_ssa_def *revdenom =
 305       nir_ishl(b, revdenom_biasedexp, nir_imm_int(b, 23));
 306
 307    /* rm = (int) (rc.f * revdenom.f);
 308     * gm = (int) (gc.f * revdenom.f);
 309     * bm = (int) (bc.f * revdenom.f);
 310     */
 311    nir_ssa_def *mantissa =
 312       nir_f2i32(b, nir_fmul(b, clamped, revdenom));
 313
 314    /* rm = (rm & 1) + (rm >> 1);
 315     * gm = (gm & 1) + (gm >> 1);
 316     * bm = (bm & 1) + (bm >> 1);
 317     */
 318    mantissa = nir_iadd(b, nir_iand(b, mantissa, nir_imm_int(b, 1)),
 319                           nir_ushr(b, mantissa, nir_imm_int(b, 1)));
 320
 321    nir_ssa_def *packed = nir_channel(b, mantissa, 0);
 322    packed = nir_mask_shift_or(b, packed, nir_channel(b, mantissa, 1), ~0, 9);
 323    packed = nir_mask_shift_or(b, packed, nir_channel(b, mantissa, 2), ~0, 18);
 324    packed = nir_mask_shift_or(b, packed, exp_shared, ~0, 27);
 325
 326    return packed;
 327 }