src/compiler/nir/nir_format_convert.h

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_builder.h"
  25
  26 #include "util/format_rgb9e5.h"
  27
  28 static inline nir_ssa_def *
  29 nir_shift(nir_builder *b, nir_ssa_def *value, int left_shift)
  30 {
  31    if (left_shift > 0)
  32       return nir_ishl(b, value, nir_imm_int(b, left_shift));
  33    else if (left_shift < 0)
  34       return nir_ushr(b, value, nir_imm_int(b, -left_shift));
  35    else
  36       return value;
  37 }
  38
  39 static inline nir_ssa_def *
  40 nir_mask_shift(struct nir_builder *b, nir_ssa_def *src,
  41                uint32_t mask, int left_shift)
  42 {
  43    return nir_shift(b, nir_iand(b, src, nir_imm_int(b, mask)), left_shift);
  44 }
  45
  46 static inline nir_ssa_def *
  47 nir_mask_shift_or(struct nir_builder *b, nir_ssa_def *dst, nir_ssa_def *src,
  48                   uint32_t src_mask, int src_left_shift)
  49 {
  50    return nir_ior(b, nir_mask_shift(b, src, src_mask, src_left_shift), dst);
  51 }
  52
  53 static inline nir_ssa_def *
  54 nir_format_unpack_int(nir_builder *b, nir_ssa_def *packed,
  55                       const unsigned *bits, unsigned num_components,
  56                       bool sign_extend)
  57 {
  58    assert(num_components >= 1 && num_components <= 4);
  59    const unsigned bit_size = packed->bit_size;
  60    nir_ssa_def *comps[4];
  61
  62    if (bits[0] >= bit_size) {
  63       assert(bits[0] == bit_size);
  64       assert(num_components == 1);
  65       return packed;
  66    }
  67
  68    unsigned offset = 0;
  69    for (unsigned i = 0; i < num_components; i++) {
  70       assert(bits[i] < bit_size);
  71       assert(offset + bits[i] <= bit_size);
  72       nir_ssa_def *lshift = nir_imm_int(b, bit_size - (offset + bits[i]));
  73       nir_ssa_def *rshift = nir_imm_int(b, bit_size - bits[i]);
  74       if (sign_extend)
  75          comps[i] = nir_ishr(b, nir_ishl(b, packed, lshift), rshift);
  76       else
  77          comps[i] = nir_ushr(b, nir_ishl(b, packed, lshift), rshift);
  78       offset += bits[i];
  79    }
  80    assert(offset <= bit_size);
  81
  82    return nir_vec(b, comps, num_components);
  83 }
  84
  85 static inline nir_ssa_def *
  86 nir_format_unpack_uint(nir_builder *b, nir_ssa_def *packed,
  87                        const unsigned *bits, unsigned num_components)
  88 {
  89    return nir_format_unpack_int(b, packed, bits, num_components, false);
  90 }
  91
  92 static inline nir_ssa_def *
  93 nir_format_unpack_sint(nir_builder *b, nir_ssa_def *packed,
  94                        const unsigned *bits, unsigned num_components)
  95 {
  96    return nir_format_unpack_int(b, packed, bits, num_components, true);
  97 }
  98
  99 static inline nir_ssa_def *
 100 nir_format_pack_uint_unmasked(nir_builder *b, nir_ssa_def *color,
 101                               const unsigned *bits, unsigned num_components)
 102 {
 103    assert(num_components >= 1 && num_components <= 4);
 104    nir_ssa_def *packed = nir_imm_int(b, 0);
 105    unsigned offset = 0;
 106    for (unsigned i = 0; i < num_components; i++) {
 107       packed = nir_ior(b, packed, nir_shift(b, nir_channel(b, color, i),
 108                                                offset));
 109       offset += bits[i];
 110    }
 111    assert(offset <= packed->bit_size);
 112
 113    return packed;
 114 }
 115
 116 static inline nir_ssa_def *
 117 nir_format_pack_uint(nir_builder *b, nir_ssa_def *color,
 118                      const unsigned *bits, unsigned num_components)
 119 {
 120    nir_const_value mask;
 121    for (unsigned i = 0; i < num_components; i++) {
 122       assert(bits[i] < 32);
 123       mask.u32[i] = (1u << bits[i]) - 1;
 124    }
 125    nir_ssa_def *mask_imm = nir_build_imm(b, num_components, 32, mask);
 126
 127    return nir_format_pack_uint_unmasked(b, nir_iand(b, color, mask_imm),
 128                                         bits, num_components);
 129 }
 130
 131 static inline nir_ssa_def *
 132 nir_format_bitcast_uint_vec_unmasked(nir_builder *b, nir_ssa_def *src,
 133                                      unsigned src_bits, unsigned dst_bits)
 134 {
 135    assert(src_bits == 8 || src_bits == 16 || src_bits == 32);
 136    assert(dst_bits == 8 || dst_bits == 16 || dst_bits == 32);
 137
 138    if (src_bits == dst_bits)
 139       return src;
 140
 141    const unsigned dst_components =
 142       DIV_ROUND_UP(src->num_components * src_bits, dst_bits);
 143    assert(dst_components <= 4);
 144
 145    nir_ssa_def *dst_chan[4] = {0};
 146    if (dst_bits > src_bits) {
 147       unsigned shift = 0;
 148       unsigned dst_idx = 0;
 149       for (unsigned i = 0; i < src->num_components; i++) {
 150          nir_ssa_def *shifted = nir_ishl(b, nir_channel(b, src, i),
 151                                             nir_imm_int(b, shift));
 152          if (shift == 0) {
 153             dst_chan[dst_idx] = shifted;
 154          } else {
 155             dst_chan[dst_idx] = nir_ior(b, dst_chan[dst_idx], shifted);
 156          }
 157
 158          shift += src_bits;
 159          if (shift >= dst_bits) {
 160             dst_idx++;
 161             shift = 0;
 162          }
 163       }
 164    } else {
 165       nir_ssa_def *mask = nir_imm_int(b, ~0u >> (32 - dst_bits));
 166
 167       unsigned src_idx = 0;
 168       unsigned shift = 0;
 169       for (unsigned i = 0; i < dst_components; i++) {
 170          dst_chan[i] = nir_iand(b, nir_ushr(b, nir_channel(b, src, src_idx),
 171                                                nir_imm_int(b, shift)),
 172                                    mask);
 173          shift += dst_bits;
 174          if (shift >= src_bits) {
 175             src_idx++;
 176             shift = 0;
 177          }
 178       }
 179    }
 180
 181    return nir_vec(b, dst_chan, dst_components);
 182 }
 183
 184 static inline nir_ssa_def *
 185 nir_format_linear_to_srgb(nir_builder *b, nir_ssa_def *c)
 186 {
 187    nir_ssa_def *linear = nir_fmul(b, c, nir_imm_float(b, 12.92f));
 188    nir_ssa_def *curved =
 189       nir_fsub(b, nir_fmul(b, nir_imm_float(b, 1.055f),
 190                               nir_fpow(b, c, nir_imm_float(b, 1.0 / 2.4))),
 191                   nir_imm_float(b, 0.055f));
 192
 193    return nir_fsat(b, nir_bcsel(b, nir_flt(b, c, nir_imm_float(b, 0.0031308f)),
 194                                    linear, curved));
 195 }
 196
 197 static inline nir_ssa_def *
 198 nir_format_srgb_to_linear(nir_builder *b, nir_ssa_def *c)
 199 {
 200    nir_ssa_def *linear = nir_fdiv(b, c, nir_imm_float(b, 12.92f));
 201    nir_ssa_def *curved =
 202       nir_fpow(b, nir_fdiv(b, nir_fadd(b, c, nir_imm_float(b, 0.055f)),
 203                               nir_imm_float(b, 1.055f)),
 204                   nir_imm_float(b, 2.4f));
 205
 206    return nir_fsat(b, nir_bcsel(b, nir_fge(b, nir_imm_float(b, 0.04045f), c),
 207                                    linear, curved));
 208 }
 209
 210 static inline nir_ssa_def *
 211 nir_format_unpack_11f11f10f(nir_builder *b, nir_ssa_def *packed)
 212 {
 213    nir_ssa_def *chans[3];
 214    chans[0] = nir_mask_shift(b, packed, 0x000007ff, 4);
 215    chans[1] = nir_mask_shift(b, packed, 0x003ff100, -7);
 216    chans[2] = nir_mask_shift(b, packed, 0xffc00000, -17);
 217
 218    for (unsigned i = 0; i < 3; i++)
 219       chans[i] = nir_unpack_half_2x16_split_x(b, chans[i]);
 220
 221    return nir_vec(b, chans, 3);
 222 }
 223
 224 static inline nir_ssa_def *
 225 nir_format_pack_r11g11b10f(nir_builder *b, nir_ssa_def *color)
 226 {
 227    /* 10 and 11-bit floats are unsigned.  Clamp to non-negative */
 228    nir_ssa_def *clamped = nir_fmax(b, color, nir_imm_float(b, 0));
 229
 230    nir_ssa_def *undef = nir_ssa_undef(b, 1, color->bit_size);
 231    nir_ssa_def *p1 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 0),
 232                                                  nir_channel(b, clamped, 1));
 233    nir_ssa_def *p2 = nir_pack_half_2x16_split(b, nir_channel(b, clamped, 2),
 234                                                  undef);
 235
 236    /* A 10 or 11-bit float has the same exponent as a 16-bit float but with
 237     * fewer mantissa bits and no sign bit.  All we have to do is throw away
 238     * the sign bit and the bottom mantissa bits and shift it into place.
 239     */
 240    nir_ssa_def *packed = nir_imm_int(b, 0);
 241    packed = nir_mask_shift_or(b, packed, p1, 0x00007ff0, -4);
 242    packed = nir_mask_shift_or(b, packed, p1, 0x7ff00000, -9);
 243    packed = nir_mask_shift_or(b, packed, p2, 0x00007fe0, 17);
 244
 245    return packed;
 246 }
 247
 248 static inline nir_ssa_def *
 249 nir_format_pack_r9g9b9e5(nir_builder *b, nir_ssa_def *color)
 250 {
 251    /* See also float3_to_rgb9e5 */
 252
 253    /* First, we need to clamp it to range. */
 254    nir_ssa_def *clamped = nir_fmin(b, color, nir_imm_float(b, MAX_RGB9E5));
 255
 256    /* Get rid of negatives and NaN */
 257    clamped = nir_bcsel(b, nir_ult(b, nir_imm_int(b, 0x7f800000), color),
 258                           nir_imm_float(b, 0), clamped);
 259
 260    /* maxrgb.u = MAX3(rc.u, gc.u, bc.u); */
 261    nir_ssa_def *maxu = nir_umax(b, nir_channel(b, clamped, 0),
 262                        nir_umax(b, nir_channel(b, clamped, 1),
 263                                    nir_channel(b, clamped, 2)));
 264
 265    /* maxrgb.u += maxrgb.u & (1 << (23-9)); */
 266    maxu = nir_iadd(b, maxu, nir_iand(b, maxu, nir_imm_int(b, 1 << 14)));
 267
 268    /* exp_shared = MAX2((maxrgb.u >> 23), -RGB9E5_EXP_BIAS - 1 + 127) +
 269     *              1 + RGB9E5_EXP_BIAS - 127;
 270     */
 271    nir_ssa_def *exp_shared =
 272       nir_iadd(b, nir_umax(b, nir_ushr(b, maxu, nir_imm_int(b, 23)),
 273                               nir_imm_int(b, -RGB9E5_EXP_BIAS - 1 + 127)),
 274                   nir_imm_int(b, 1 + RGB9E5_EXP_BIAS - 127));
 275
 276    /* revdenom_biasedexp = 127 - (exp_shared - RGB9E5_EXP_BIAS -
 277     *                             RGB9E5_MANTISSA_BITS) + 1;
 278     */
 279    nir_ssa_def *revdenom_biasedexp =
 280       nir_isub(b, nir_imm_int(b, 127 + RGB9E5_EXP_BIAS +
 281                                  RGB9E5_MANTISSA_BITS + 1),
 282                   exp_shared);
 283
 284    /* revdenom.u = revdenom_biasedexp << 23; */
 285    nir_ssa_def *revdenom =
 286       nir_ishl(b, revdenom_biasedexp, nir_imm_int(b, 23));
 287
 288    /* rm = (int) (rc.f * revdenom.f);
 289     * gm = (int) (gc.f * revdenom.f);
 290     * bm = (int) (bc.f * revdenom.f);
 291     */
 292    nir_ssa_def *mantissa =
 293       nir_f2i32(b, nir_fmul(b, clamped, revdenom));
 294
 295    /* rm = (rm & 1) + (rm >> 1);
 296     * gm = (gm & 1) + (gm >> 1);
 297     * bm = (bm & 1) + (bm >> 1);
 298     */
 299    mantissa = nir_iadd(b, nir_iand(b, mantissa, nir_imm_int(b, 1)),
 300                           nir_ushr(b, mantissa, nir_imm_int(b, 1)));
 301
 302    nir_ssa_def *packed = nir_channel(b, mantissa, 0);
 303    packed = nir_mask_shift_or(b, packed, nir_channel(b, mantissa, 1), ~0, 9);
 304    packed = nir_mask_shift_or(b, packed, nir_channel(b, mantissa, 2), ~0, 18);
 305    packed = nir_mask_shift_or(b, packed, exp_shared, ~0, 27);
 306
 307    return packed;
 308 }