2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
27 gather_intrinsic_info(nir_intrinsic_instr
*instr
, nir_shader
*shader
)
29 switch (instr
->intrinsic
) {
30 case nir_intrinsic_discard
:
31 case nir_intrinsic_discard_if
:
32 assert(shader
->stage
== MESA_SHADER_FRAGMENT
);
33 shader
->info
.fs
.uses_discard
= true;
36 case nir_intrinsic_load_front_face
:
37 case nir_intrinsic_load_vertex_id
:
38 case nir_intrinsic_load_vertex_id_zero_base
:
39 case nir_intrinsic_load_base_vertex
:
40 case nir_intrinsic_load_instance_id
:
41 case nir_intrinsic_load_sample_id
:
42 case nir_intrinsic_load_sample_pos
:
43 case nir_intrinsic_load_sample_mask_in
:
44 case nir_intrinsic_load_primitive_id
:
45 case nir_intrinsic_load_invocation_id
:
46 case nir_intrinsic_load_local_invocation_id
:
47 case nir_intrinsic_load_work_group_id
:
48 case nir_intrinsic_load_num_work_groups
:
49 shader
->info
.system_values_read
|=
50 (1 << nir_system_value_from_intrinsic(instr
->intrinsic
));
53 case nir_intrinsic_end_primitive
:
54 case nir_intrinsic_end_primitive_with_counter
:
55 assert(shader
->stage
== MESA_SHADER_GEOMETRY
);
56 shader
->info
.gs
.uses_end_primitive
= 1;
65 gather_tex_info(nir_tex_instr
*instr
, nir_shader
*shader
)
67 if (instr
->op
== nir_texop_tg4
)
68 shader
->info
.uses_texture_gather
= true;
72 gather_info_block(nir_block
*block
, void *shader
)
74 nir_foreach_instr(block
, instr
) {
75 switch (instr
->type
) {
76 case nir_instr_type_intrinsic
:
77 gather_intrinsic_info(nir_instr_as_intrinsic(instr
), shader
);
79 case nir_instr_type_tex
:
80 gather_tex_info(nir_instr_as_tex(instr
), shader
);
82 case nir_instr_type_call
:
83 assert(!"nir_shader_gather_info only works if functions are inlined");
94 * Returns the bits in the inputs_read, outputs_written, or
95 * system_values_read bitfield corresponding to this variable.
97 static inline uint64_t
98 get_io_mask(nir_variable
*var
, gl_shader_stage stage
)
100 assert(var
->data
.mode
== nir_var_shader_in
||
101 var
->data
.mode
== nir_var_shader_out
||
102 var
->data
.mode
== nir_var_system_value
);
103 assert(var
->data
.location
>= 0);
105 const struct glsl_type
*var_type
= var
->type
;
106 if (stage
== MESA_SHADER_GEOMETRY
&& var
->data
.mode
== nir_var_shader_in
) {
107 /* Most geometry shader inputs are per-vertex arrays */
108 if (var
->data
.location
>= VARYING_SLOT_VAR0
)
109 assert(glsl_type_is_array(var_type
));
111 if (glsl_type_is_array(var_type
))
112 var_type
= glsl_get_array_element(var_type
);
115 bool is_vertex_input
= (var
->data
.mode
== nir_var_shader_in
&&
116 stage
== MESA_SHADER_VERTEX
);
117 unsigned slots
= glsl_count_attribute_slots(var_type
, is_vertex_input
);
118 return ((1ull << slots
) - 1) << var
->data
.location
;
122 nir_shader_gather_info(nir_shader
*shader
, nir_function_impl
*entrypoint
)
124 /* This pass does not yet support tessellation shaders */
125 assert(shader
->stage
== MESA_SHADER_VERTEX
||
126 shader
->stage
== MESA_SHADER_GEOMETRY
||
127 shader
->stage
== MESA_SHADER_FRAGMENT
||
128 shader
->stage
== MESA_SHADER_COMPUTE
);
130 shader
->info
.inputs_read
= 0;
131 foreach_list_typed(nir_variable
, var
, node
, &shader
->inputs
)
132 shader
->info
.inputs_read
|= get_io_mask(var
, shader
->stage
);
134 /* TODO: Some day we may need to add stream support to NIR */
135 shader
->info
.outputs_written
= 0;
136 foreach_list_typed(nir_variable
, var
, node
, &shader
->outputs
)
137 shader
->info
.outputs_written
|= get_io_mask(var
, shader
->stage
);
139 shader
->info
.system_values_read
= 0;
140 foreach_list_typed(nir_variable
, var
, node
, &shader
->system_values
)
141 shader
->info
.system_values_read
|= get_io_mask(var
, shader
->stage
);
143 shader
->info
.num_textures
= 0;
144 shader
->info
.num_images
= 0;
145 nir_foreach_variable(var
, &shader
->uniforms
) {
146 const struct glsl_type
*type
= var
->type
;
148 if (glsl_type_is_array(type
)) {
149 count
= glsl_get_length(type
);
150 type
= glsl_get_array_element(type
);
153 if (glsl_type_is_image(type
)) {
154 shader
->info
.num_images
+= count
;
155 } else if (glsl_type_is_sampler(type
)) {
156 shader
->info
.num_textures
+= count
;
160 nir_foreach_block(entrypoint
, gather_info_block
, shader
);