src/compiler/nir/nir_instr_set.c

   1 /*
   2  * Copyright © 2014 Connor Abbott
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_instr_set.h"
  25 #include "nir_vla.h"
  26 #include "util/half_float.h"
  27
  28 static bool
  29 src_is_ssa(nir_src *src, void *data)
  30 {
  31    (void) data;
  32    return src->is_ssa;
  33 }
  34
  35 static bool
  36 dest_is_ssa(nir_dest *dest, void *data)
  37 {
  38    (void) data;
  39    return dest->is_ssa;
  40 }
  41
  42 static inline bool
  43 instr_each_src_and_dest_is_ssa(const nir_instr *instr)
  44 {
  45    if (!nir_foreach_dest((nir_instr *)instr, dest_is_ssa, NULL) ||
  46        !nir_foreach_src((nir_instr *)instr, src_is_ssa, NULL))
  47       return false;
  48
  49    return true;
  50 }
  51
  52 /* This function determines if uses of an instruction can safely be rewritten
  53  * to use another identical instruction instead. Note that this function must
  54  * be kept in sync with hash_instr() and nir_instrs_equal() -- only
  55  * instructions that pass this test will be handed on to those functions, and
  56  * conversely they must handle everything that this function returns true for.
  57  */
  58 static bool
  59 instr_can_rewrite(const nir_instr *instr)
  60 {
  61    /* We only handle SSA. */
  62    assert(instr_each_src_and_dest_is_ssa(instr));
  63
  64    switch (instr->type) {
  65    case nir_instr_type_alu:
  66    case nir_instr_type_deref:
  67    case nir_instr_type_tex:
  68    case nir_instr_type_load_const:
  69    case nir_instr_type_phi:
  70       return true;
  71    case nir_instr_type_intrinsic:
  72       return nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr));
  73    case nir_instr_type_call:
  74    case nir_instr_type_jump:
  75    case nir_instr_type_ssa_undef:
  76       return false;
  77    case nir_instr_type_parallel_copy:
  78    default:
  79       unreachable("Invalid instruction type");
  80    }
  81
  82    return false;
  83 }
  84
  85
  86 #define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
  87
  88 static uint32_t
  89 hash_src(uint32_t hash, const nir_src *src)
  90 {
  91    assert(src->is_ssa);
  92    hash = HASH(hash, src->ssa);
  93    return hash;
  94 }
  95
  96 static uint32_t
  97 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
  98 {
  99    hash = HASH(hash, src->abs);
 100    hash = HASH(hash, src->negate);
 101
 102    for (unsigned i = 0; i < num_components; i++)
 103       hash = HASH(hash, src->swizzle[i]);
 104
 105    hash = hash_src(hash, &src->src);
 106    return hash;
 107 }
 108
 109 static uint32_t
 110 hash_alu(uint32_t hash, const nir_alu_instr *instr)
 111 {
 112    hash = HASH(hash, instr->op);
 113
 114    /* We explicitly don't hash instr->exact. */
 115    uint8_t flags = instr->no_signed_wrap |
 116                    instr->no_unsigned_wrap << 1;
 117    hash = HASH(hash, flags);
 118
 119    hash = HASH(hash, instr->dest.dest.ssa.num_components);
 120    hash = HASH(hash, instr->dest.dest.ssa.bit_size);
 121
 122    if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
 123       assert(nir_op_infos[instr->op].num_inputs >= 2);
 124
 125       uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
 126                                     nir_ssa_alu_instr_src_components(instr, 0));
 127       uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
 128                                     nir_ssa_alu_instr_src_components(instr, 1));
 129       /* For commutative operations, we need some commutative way of
 130        * combining the hashes.  One option would be to XOR them but that
 131        * means that anything with two identical sources will hash to 0 and
 132        * that's common enough we probably don't want the guaranteed
 133        * collision.  Either addition or multiplication will also work.
 134        */
 135       hash = hash0 * hash1;
 136
 137       for (unsigned i = 2; i < nir_op_infos[instr->op].num_inputs; i++) {
 138          hash = hash_alu_src(hash, &instr->src[i],
 139                              nir_ssa_alu_instr_src_components(instr, i));
 140       }
 141    } else {
 142       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
 143          hash = hash_alu_src(hash, &instr->src[i],
 144                              nir_ssa_alu_instr_src_components(instr, i));
 145       }
 146    }
 147
 148    return hash;
 149 }
 150
 151 static uint32_t
 152 hash_deref(uint32_t hash, const nir_deref_instr *instr)
 153 {
 154    hash = HASH(hash, instr->deref_type);
 155    hash = HASH(hash, instr->mode);
 156    hash = HASH(hash, instr->type);
 157
 158    if (instr->deref_type == nir_deref_type_var)
 159       return HASH(hash, instr->var);
 160
 161    hash = hash_src(hash, &instr->parent);
 162
 163    switch (instr->deref_type) {
 164    case nir_deref_type_struct:
 165       hash = HASH(hash, instr->strct.index);
 166       break;
 167
 168    case nir_deref_type_array:
 169    case nir_deref_type_ptr_as_array:
 170       hash = hash_src(hash, &instr->arr.index);
 171       break;
 172
 173    case nir_deref_type_cast:
 174       hash = HASH(hash, instr->cast.ptr_stride);
 175       break;
 176
 177    case nir_deref_type_var:
 178    case nir_deref_type_array_wildcard:
 179       /* Nothing to do */
 180       break;
 181
 182    default:
 183       unreachable("Invalid instruction deref type");
 184    }
 185
 186    return hash;
 187 }
 188
 189 static uint32_t
 190 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
 191 {
 192    hash = HASH(hash, instr->def.num_components);
 193
 194    if (instr->def.bit_size == 1) {
 195       for (unsigned i = 0; i < instr->def.num_components; i++) {
 196          uint8_t b = instr->value[i].b;
 197          hash = HASH(hash, b);
 198       }
 199    } else {
 200       unsigned size = instr->def.num_components * sizeof(*instr->value);
 201       hash = _mesa_fnv32_1a_accumulate_block(hash, instr->value, size);
 202    }
 203
 204    return hash;
 205 }
 206
 207 static int
 208 cmp_phi_src(const void *data1, const void *data2)
 209 {
 210    nir_phi_src *src1 = *(nir_phi_src **)data1;
 211    nir_phi_src *src2 = *(nir_phi_src **)data2;
 212    return src1->pred - src2->pred;
 213 }
 214
 215 static uint32_t
 216 hash_phi(uint32_t hash, const nir_phi_instr *instr)
 217 {
 218    hash = HASH(hash, instr->instr.block);
 219
 220    /* sort sources by predecessor, since the order shouldn't matter */
 221    unsigned num_preds = instr->instr.block->predecessors->entries;
 222    NIR_VLA(nir_phi_src *, srcs, num_preds);
 223    unsigned i = 0;
 224    nir_foreach_phi_src(src, instr) {
 225       srcs[i++] = src;
 226    }
 227
 228    qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
 229
 230    for (i = 0; i < num_preds; i++) {
 231       hash = hash_src(hash, &srcs[i]->src);
 232       hash = HASH(hash, srcs[i]->pred);
 233    }
 234
 235    return hash;
 236 }
 237
 238 static uint32_t
 239 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
 240 {
 241    const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
 242    hash = HASH(hash, instr->intrinsic);
 243
 244    if (info->has_dest) {
 245       hash = HASH(hash, instr->dest.ssa.num_components);
 246       hash = HASH(hash, instr->dest.ssa.bit_size);
 247    }
 248
 249    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->const_index,
 250                                           info->num_indices
 251                                              * sizeof(instr->const_index[0]));
 252    return hash;
 253 }
 254
 255 static uint32_t
 256 hash_tex(uint32_t hash, const nir_tex_instr *instr)
 257 {
 258    hash = HASH(hash, instr->op);
 259    hash = HASH(hash, instr->num_srcs);
 260
 261    for (unsigned i = 0; i < instr->num_srcs; i++) {
 262       hash = HASH(hash, instr->src[i].src_type);
 263       hash = hash_src(hash, &instr->src[i].src);
 264    }
 265
 266    hash = HASH(hash, instr->coord_components);
 267    hash = HASH(hash, instr->sampler_dim);
 268    hash = HASH(hash, instr->is_array);
 269    hash = HASH(hash, instr->is_shadow);
 270    hash = HASH(hash, instr->is_new_style_shadow);
 271    unsigned component = instr->component;
 272    hash = HASH(hash, component);
 273    for (unsigned i = 0; i < 4; ++i)
 274       for (unsigned j = 0; j < 2; ++j)
 275          hash = HASH(hash, instr->tg4_offsets[i][j]);
 276    hash = HASH(hash, instr->texture_index);
 277    hash = HASH(hash, instr->texture_array_size);
 278    hash = HASH(hash, instr->sampler_index);
 279
 280    return hash;
 281 }
 282
 283 /* Computes a hash of an instruction for use in a hash table. Note that this
 284  * will only work for instructions where instr_can_rewrite() returns true, and
 285  * it should return identical hashes for two instructions that are the same
 286  * according nir_instrs_equal().
 287  */
 288
 289 static uint32_t
 290 hash_instr(const void *data)
 291 {
 292    const nir_instr *instr = data;
 293    uint32_t hash = _mesa_fnv32_1a_offset_bias;
 294
 295    switch (instr->type) {
 296    case nir_instr_type_alu:
 297       hash = hash_alu(hash, nir_instr_as_alu(instr));
 298       break;
 299    case nir_instr_type_deref:
 300       hash = hash_deref(hash, nir_instr_as_deref(instr));
 301       break;
 302    case nir_instr_type_load_const:
 303       hash = hash_load_const(hash, nir_instr_as_load_const(instr));
 304       break;
 305    case nir_instr_type_phi:
 306       hash = hash_phi(hash, nir_instr_as_phi(instr));
 307       break;
 308    case nir_instr_type_intrinsic:
 309       hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
 310       break;
 311    case nir_instr_type_tex:
 312       hash = hash_tex(hash, nir_instr_as_tex(instr));
 313       break;
 314    default:
 315       unreachable("Invalid instruction type");
 316    }
 317
 318    return hash;
 319 }
 320
 321 bool
 322 nir_srcs_equal(nir_src src1, nir_src src2)
 323 {
 324    if (src1.is_ssa) {
 325       if (src2.is_ssa) {
 326          return src1.ssa == src2.ssa;
 327       } else {
 328          return false;
 329       }
 330    } else {
 331       if (src2.is_ssa) {
 332          return false;
 333       } else {
 334          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
 335             return false;
 336
 337          if (src1.reg.indirect) {
 338             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
 339                return false;
 340          }
 341
 342          return src1.reg.reg == src2.reg.reg &&
 343                 src1.reg.base_offset == src2.reg.base_offset;
 344       }
 345    }
 346 }
 347
 348 /**
 349  * If the \p s is an SSA value that was generated by a negation instruction,
 350  * that instruction is returned as a \c nir_alu_instr.  Otherwise \c NULL is
 351  * returned.
 352  */
 353 static nir_alu_instr *
 354 get_neg_instr(nir_src s)
 355 {
 356    nir_alu_instr *alu = nir_src_as_alu_instr(s);
 357
 358    return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
 359           ? alu : NULL;
 360 }
 361
 362 bool
 363 nir_const_value_negative_equal(nir_const_value c1,
 364                                nir_const_value c2,
 365                                nir_alu_type full_type)
 366 {
 367    assert(nir_alu_type_get_base_type(full_type) != nir_type_invalid);
 368    assert(nir_alu_type_get_type_size(full_type) != 0);
 369
 370    switch (full_type) {
 371    case nir_type_float16:
 372       return _mesa_half_to_float(c1.u16) == -_mesa_half_to_float(c2.u16);
 373
 374    case nir_type_float32:
 375       return c1.f32 == -c2.f32;
 376
 377    case nir_type_float64:
 378       return c1.f64 == -c2.f64;
 379
 380    case nir_type_int8:
 381    case nir_type_uint8:
 382       return c1.i8 == -c2.i8;
 383
 384    case nir_type_int16:
 385    case nir_type_uint16:
 386       return c1.i16 == -c2.i16;
 387
 388    case nir_type_int32:
 389    case nir_type_uint32:
 390       return c1.i32 == -c2.i32;
 391
 392    case nir_type_int64:
 393    case nir_type_uint64:
 394       return c1.i64 == -c2.i64;
 395
 396    default:
 397       break;
 398    }
 399
 400    return false;
 401 }
 402
 403 /**
 404  * Shallow compare of ALU srcs to determine if one is the negation of the other
 405  *
 406  * This function detects cases where \p alu1 is a constant and \p alu2 is a
 407  * constant that is its negation.  It will also detect cases where \p alu2 is
 408  * an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
 409  *
 410  * This function does not detect the general case when \p alu1 and \p alu2 are
 411  * SSA values that are the negations of each other (e.g., \p alu1 represents
 412  * (a * b) and \p alu2 represents (-a * b)).
 413  *
 414  * \warning
 415  * It is the responsibility of the caller to ensure that the component counts,
 416  * write masks, and base types of the sources being compared are compatible.
 417  */
 418 bool
 419 nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
 420                             const nir_alu_instr *alu2,
 421                             unsigned src1, unsigned src2)
 422 {
 423 #ifndef NDEBUG
 424    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 425       assert(nir_alu_instr_channel_used(alu1, src1, i) ==
 426              nir_alu_instr_channel_used(alu2, src2, i));
 427    }
 428
 429    if (nir_op_infos[alu1->op].input_types[src1] == nir_type_float) {
 430       assert(nir_op_infos[alu1->op].input_types[src1] ==
 431              nir_op_infos[alu2->op].input_types[src2]);
 432    } else {
 433       assert(nir_op_infos[alu1->op].input_types[src1] == nir_type_int);
 434       assert(nir_op_infos[alu2->op].input_types[src2] == nir_type_int);
 435    }
 436 #endif
 437
 438    if (alu1->src[src1].abs != alu2->src[src2].abs)
 439       return false;
 440
 441    bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
 442
 443    /* Handling load_const instructions is tricky. */
 444
 445    const nir_const_value *const const1 =
 446       nir_src_as_const_value(alu1->src[src1].src);
 447
 448    if (const1 != NULL) {
 449       /* Assume that constant folding will eliminate source mods and unary
 450        * ops.
 451        */
 452       if (parity)
 453          return false;
 454
 455       const nir_const_value *const const2 =
 456          nir_src_as_const_value(alu2->src[src2].src);
 457
 458       if (const2 == NULL)
 459          return false;
 460
 461       if (nir_src_bit_size(alu1->src[src1].src) !=
 462           nir_src_bit_size(alu2->src[src2].src))
 463          return false;
 464
 465       const nir_alu_type full_type = nir_op_infos[alu1->op].input_types[src1] |
 466                                      nir_src_bit_size(alu1->src[src1].src);
 467       for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 468          if (nir_alu_instr_channel_used(alu1, src1, i) &&
 469              !nir_const_value_negative_equal(const1[alu1->src[src1].swizzle[i]],
 470                                              const2[alu2->src[src2].swizzle[i]],
 471                                              full_type))
 472             return false;
 473       }
 474
 475       return true;
 476    }
 477
 478    uint8_t alu1_swizzle[4] = {0};
 479    nir_src alu1_actual_src;
 480    nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
 481
 482    if (neg1) {
 483       parity = !parity;
 484       alu1_actual_src = neg1->src[0].src;
 485
 486       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
 487          alu1_swizzle[i] = neg1->src[0].swizzle[i];
 488    } else {
 489       alu1_actual_src = alu1->src[src1].src;
 490
 491       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
 492          alu1_swizzle[i] = i;
 493    }
 494
 495    uint8_t alu2_swizzle[4] = {0};
 496    nir_src alu2_actual_src;
 497    nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
 498
 499    if (neg2) {
 500       parity = !parity;
 501       alu2_actual_src = neg2->src[0].src;
 502
 503       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
 504          alu2_swizzle[i] = neg2->src[0].swizzle[i];
 505    } else {
 506       alu2_actual_src = alu2->src[src2].src;
 507
 508       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
 509          alu2_swizzle[i] = i;
 510    }
 511
 512    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 513       if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
 514           alu2_swizzle[alu2->src[src2].swizzle[i]])
 515          return false;
 516    }
 517
 518    return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
 519 }
 520
 521 bool
 522 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
 523                    unsigned src1, unsigned src2)
 524 {
 525    if (alu1->src[src1].abs != alu2->src[src2].abs ||
 526        alu1->src[src1].negate != alu2->src[src2].negate)
 527       return false;
 528
 529    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 530       if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
 531          return false;
 532    }
 533
 534    return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
 535 }
 536
 537 /* Returns "true" if two instructions are equal. Note that this will only
 538  * work for the subset of instructions defined by instr_can_rewrite(). Also,
 539  * it should only return "true" for instructions that hash_instr() will return
 540  * the same hash for (ignoring collisions, of course).
 541  */
 542
 543 bool
 544 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
 545 {
 546    assert(instr_can_rewrite(instr1) && instr_can_rewrite(instr2));
 547
 548    if (instr1->type != instr2->type)
 549       return false;
 550
 551    switch (instr1->type) {
 552    case nir_instr_type_alu: {
 553       nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
 554       nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
 555
 556       if (alu1->op != alu2->op)
 557          return false;
 558
 559       /* We explicitly don't compare instr->exact. */
 560
 561       if (alu1->no_signed_wrap != alu2->no_signed_wrap)
 562          return false;
 563
 564       if (alu1->no_unsigned_wrap != alu2->no_unsigned_wrap)
 565          return false;
 566
 567       /* TODO: We can probably acutally do something more inteligent such
 568        * as allowing different numbers and taking a maximum or something
 569        * here */
 570       if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
 571          return false;
 572
 573       if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
 574          return false;
 575
 576       if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
 577          if ((!nir_alu_srcs_equal(alu1, alu2, 0, 0) ||
 578               !nir_alu_srcs_equal(alu1, alu2, 1, 1)) &&
 579              (!nir_alu_srcs_equal(alu1, alu2, 0, 1) ||
 580               !nir_alu_srcs_equal(alu1, alu2, 1, 0)))
 581             return false;
 582
 583          for (unsigned i = 2; i < nir_op_infos[alu1->op].num_inputs; i++) {
 584             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 585                return false;
 586          }
 587       } else {
 588          for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
 589             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 590                return false;
 591          }
 592       }
 593       return true;
 594    }
 595    case nir_instr_type_deref: {
 596       nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
 597       nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
 598
 599       if (deref1->deref_type != deref2->deref_type ||
 600           deref1->mode != deref2->mode ||
 601           deref1->type != deref2->type)
 602          return false;
 603
 604       if (deref1->deref_type == nir_deref_type_var)
 605          return deref1->var == deref2->var;
 606
 607       if (!nir_srcs_equal(deref1->parent, deref2->parent))
 608          return false;
 609
 610       switch (deref1->deref_type) {
 611       case nir_deref_type_struct:
 612          if (deref1->strct.index != deref2->strct.index)
 613             return false;
 614          break;
 615
 616       case nir_deref_type_array:
 617       case nir_deref_type_ptr_as_array:
 618          if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
 619             return false;
 620          break;
 621
 622       case nir_deref_type_cast:
 623          if (deref1->cast.ptr_stride != deref2->cast.ptr_stride)
 624             return false;
 625          break;
 626
 627       case nir_deref_type_var:
 628       case nir_deref_type_array_wildcard:
 629          /* Nothing to do */
 630          break;
 631
 632       default:
 633          unreachable("Invalid instruction deref type");
 634       }
 635       return true;
 636    }
 637    case nir_instr_type_tex: {
 638       nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
 639       nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
 640
 641       if (tex1->op != tex2->op)
 642          return false;
 643
 644       if (tex1->num_srcs != tex2->num_srcs)
 645          return false;
 646       for (unsigned i = 0; i < tex1->num_srcs; i++) {
 647          if (tex1->src[i].src_type != tex2->src[i].src_type ||
 648              !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
 649             return false;
 650          }
 651       }
 652
 653       if (tex1->coord_components != tex2->coord_components ||
 654           tex1->sampler_dim != tex2->sampler_dim ||
 655           tex1->is_array != tex2->is_array ||
 656           tex1->is_shadow != tex2->is_shadow ||
 657           tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
 658           tex1->component != tex2->component ||
 659          tex1->texture_index != tex2->texture_index ||
 660          tex1->texture_array_size != tex2->texture_array_size ||
 661          tex1->sampler_index != tex2->sampler_index) {
 662          return false;
 663       }
 664
 665       if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
 666                  sizeof(tex1->tg4_offsets)))
 667          return false;
 668
 669       return true;
 670    }
 671    case nir_instr_type_load_const: {
 672       nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
 673       nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
 674
 675       if (load1->def.num_components != load2->def.num_components)
 676          return false;
 677
 678       if (load1->def.bit_size != load2->def.bit_size)
 679          return false;
 680
 681       if (load1->def.bit_size == 1) {
 682          for (unsigned i = 0; i < load1->def.num_components; ++i) {
 683             if (load1->value[i].b != load2->value[i].b)
 684                return false;
 685          }
 686       } else {
 687          unsigned size = load1->def.num_components * sizeof(*load1->value);
 688          if (memcmp(load1->value, load2->value, size) != 0)
 689             return false;
 690       }
 691       return true;
 692    }
 693    case nir_instr_type_phi: {
 694       nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
 695       nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
 696
 697       if (phi1->instr.block != phi2->instr.block)
 698          return false;
 699
 700       nir_foreach_phi_src(src1, phi1) {
 701          nir_foreach_phi_src(src2, phi2) {
 702             if (src1->pred == src2->pred) {
 703                if (!nir_srcs_equal(src1->src, src2->src))
 704                   return false;
 705
 706                break;
 707             }
 708          }
 709       }
 710
 711       return true;
 712    }
 713    case nir_instr_type_intrinsic: {
 714       nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
 715       nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
 716       const nir_intrinsic_info *info =
 717          &nir_intrinsic_infos[intrinsic1->intrinsic];
 718
 719       if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
 720           intrinsic1->num_components != intrinsic2->num_components)
 721          return false;
 722
 723       if (info->has_dest && intrinsic1->dest.ssa.num_components !=
 724                             intrinsic2->dest.ssa.num_components)
 725          return false;
 726
 727       if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
 728                             intrinsic2->dest.ssa.bit_size)
 729          return false;
 730
 731       for (unsigned i = 0; i < info->num_srcs; i++) {
 732          if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
 733             return false;
 734       }
 735
 736       for (unsigned i = 0; i < info->num_indices; i++) {
 737          if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
 738             return false;
 739       }
 740
 741       return true;
 742    }
 743    case nir_instr_type_call:
 744    case nir_instr_type_jump:
 745    case nir_instr_type_ssa_undef:
 746    case nir_instr_type_parallel_copy:
 747    default:
 748       unreachable("Invalid instruction type");
 749    }
 750
 751    unreachable("All cases in the above switch should return");
 752 }
 753
 754 static nir_ssa_def *
 755 nir_instr_get_dest_ssa_def(nir_instr *instr)
 756 {
 757    switch (instr->type) {
 758    case nir_instr_type_alu:
 759       assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
 760       return &nir_instr_as_alu(instr)->dest.dest.ssa;
 761    case nir_instr_type_deref:
 762       assert(nir_instr_as_deref(instr)->dest.is_ssa);
 763       return &nir_instr_as_deref(instr)->dest.ssa;
 764    case nir_instr_type_load_const:
 765       return &nir_instr_as_load_const(instr)->def;
 766    case nir_instr_type_phi:
 767       assert(nir_instr_as_phi(instr)->dest.is_ssa);
 768       return &nir_instr_as_phi(instr)->dest.ssa;
 769    case nir_instr_type_intrinsic:
 770       assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
 771       return &nir_instr_as_intrinsic(instr)->dest.ssa;
 772    case nir_instr_type_tex:
 773       assert(nir_instr_as_tex(instr)->dest.is_ssa);
 774       return &nir_instr_as_tex(instr)->dest.ssa;
 775    default:
 776       unreachable("We never ask for any of these");
 777    }
 778 }
 779
 780 static bool
 781 cmp_func(const void *data1, const void *data2)
 782 {
 783    return nir_instrs_equal(data1, data2);
 784 }
 785
 786 struct set *
 787 nir_instr_set_create(void *mem_ctx)
 788 {
 789    return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
 790 }
 791
 792 void
 793 nir_instr_set_destroy(struct set *instr_set)
 794 {
 795    _mesa_set_destroy(instr_set, NULL);
 796 }
 797
 798 bool
 799 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
 800 {
 801    if (!instr_can_rewrite(instr))
 802       return false;
 803
 804    struct set_entry *e = _mesa_set_search_or_add(instr_set, instr);
 805    nir_instr *match = (nir_instr *) e->key;
 806    if (match != instr) {
 807       nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
 808       nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
 809
 810       /* It's safe to replace an exact instruction with an inexact one as
 811        * long as we make it exact.  If we got here, the two instructions are
 812        * exactly identical in every other way so, once we've set the exact
 813        * bit, they are the same.
 814        */
 815       if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
 816          nir_instr_as_alu(match)->exact = true;
 817
 818       nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
 819       return true;
 820    }
 821
 822    return false;
 823 }
 824
 825 void
 826 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
 827 {
 828    if (!instr_can_rewrite(instr))
 829       return;
 830
 831    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 832    if (entry)
 833       _mesa_set_remove(instr_set, entry);
 834 }
 835