src/compiler/nir/nir_instr_set.c

   1 /*
   2  * Copyright © 2014 Connor Abbott
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_instr_set.h"
  25 #include "nir_vla.h"
  26 #include "util/half_float.h"
  27
  28 #define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
  29
  30 static uint32_t
  31 hash_src(uint32_t hash, const nir_src *src)
  32 {
  33    assert(src->is_ssa);
  34    hash = HASH(hash, src->ssa);
  35    return hash;
  36 }
  37
  38 static uint32_t
  39 hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
  40 {
  41    hash = HASH(hash, src->abs);
  42    hash = HASH(hash, src->negate);
  43
  44    for (unsigned i = 0; i < num_components; i++)
  45       hash = HASH(hash, src->swizzle[i]);
  46
  47    hash = hash_src(hash, &src->src);
  48    return hash;
  49 }
  50
  51 static uint32_t
  52 hash_alu(uint32_t hash, const nir_alu_instr *instr)
  53 {
  54    hash = HASH(hash, instr->op);
  55
  56    /* We explicitly don't hash instr->exact. */
  57    uint8_t flags = instr->no_signed_wrap |
  58                    instr->no_unsigned_wrap << 1;
  59    hash = HASH(hash, flags);
  60
  61    hash = HASH(hash, instr->dest.dest.ssa.num_components);
  62    hash = HASH(hash, instr->dest.dest.ssa.bit_size);
  63
  64    if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
  65       assert(nir_op_infos[instr->op].num_inputs >= 2);
  66
  67       uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
  68                                     nir_ssa_alu_instr_src_components(instr, 0));
  69       uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
  70                                     nir_ssa_alu_instr_src_components(instr, 1));
  71       /* For commutative operations, we need some commutative way of
  72        * combining the hashes.  One option would be to XOR them but that
  73        * means that anything with two identical sources will hash to 0 and
  74        * that's common enough we probably don't want the guaranteed
  75        * collision.  Either addition or multiplication will also work.
  76        */
  77       hash = hash0 * hash1;
  78
  79       for (unsigned i = 2; i < nir_op_infos[instr->op].num_inputs; i++) {
  80          hash = hash_alu_src(hash, &instr->src[i],
  81                              nir_ssa_alu_instr_src_components(instr, i));
  82       }
  83    } else {
  84       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
  85          hash = hash_alu_src(hash, &instr->src[i],
  86                              nir_ssa_alu_instr_src_components(instr, i));
  87       }
  88    }
  89
  90    return hash;
  91 }
  92
  93 static uint32_t
  94 hash_deref(uint32_t hash, const nir_deref_instr *instr)
  95 {
  96    hash = HASH(hash, instr->deref_type);
  97    hash = HASH(hash, instr->mode);
  98    hash = HASH(hash, instr->type);
  99
 100    if (instr->deref_type == nir_deref_type_var)
 101       return HASH(hash, instr->var);
 102
 103    hash = hash_src(hash, &instr->parent);
 104
 105    switch (instr->deref_type) {
 106    case nir_deref_type_struct:
 107       hash = HASH(hash, instr->strct.index);
 108       break;
 109
 110    case nir_deref_type_array:
 111    case nir_deref_type_ptr_as_array:
 112       hash = hash_src(hash, &instr->arr.index);
 113       break;
 114
 115    case nir_deref_type_cast:
 116       hash = HASH(hash, instr->cast.ptr_stride);
 117       break;
 118
 119    case nir_deref_type_var:
 120    case nir_deref_type_array_wildcard:
 121       /* Nothing to do */
 122       break;
 123
 124    default:
 125       unreachable("Invalid instruction deref type");
 126    }
 127
 128    return hash;
 129 }
 130
 131 static uint32_t
 132 hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
 133 {
 134    hash = HASH(hash, instr->def.num_components);
 135
 136    if (instr->def.bit_size == 1) {
 137       for (unsigned i = 0; i < instr->def.num_components; i++) {
 138          uint8_t b = instr->value[i].b;
 139          hash = HASH(hash, b);
 140       }
 141    } else {
 142       unsigned size = instr->def.num_components * sizeof(*instr->value);
 143       hash = _mesa_fnv32_1a_accumulate_block(hash, instr->value, size);
 144    }
 145
 146    return hash;
 147 }
 148
 149 static int
 150 cmp_phi_src(const void *data1, const void *data2)
 151 {
 152    nir_phi_src *src1 = *(nir_phi_src **)data1;
 153    nir_phi_src *src2 = *(nir_phi_src **)data2;
 154    return src1->pred - src2->pred;
 155 }
 156
 157 static uint32_t
 158 hash_phi(uint32_t hash, const nir_phi_instr *instr)
 159 {
 160    hash = HASH(hash, instr->instr.block);
 161
 162    /* sort sources by predecessor, since the order shouldn't matter */
 163    unsigned num_preds = instr->instr.block->predecessors->entries;
 164    NIR_VLA(nir_phi_src *, srcs, num_preds);
 165    unsigned i = 0;
 166    nir_foreach_phi_src(src, instr) {
 167       srcs[i++] = src;
 168    }
 169
 170    qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
 171
 172    for (i = 0; i < num_preds; i++) {
 173       hash = hash_src(hash, &srcs[i]->src);
 174       hash = HASH(hash, srcs[i]->pred);
 175    }
 176
 177    return hash;
 178 }
 179
 180 static uint32_t
 181 hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
 182 {
 183    const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
 184    hash = HASH(hash, instr->intrinsic);
 185
 186    if (info->has_dest) {
 187       hash = HASH(hash, instr->dest.ssa.num_components);
 188       hash = HASH(hash, instr->dest.ssa.bit_size);
 189    }
 190
 191    hash = _mesa_fnv32_1a_accumulate_block(hash, instr->const_index,
 192                                           info->num_indices
 193                                              * sizeof(instr->const_index[0]));
 194    return hash;
 195 }
 196
 197 static uint32_t
 198 hash_tex(uint32_t hash, const nir_tex_instr *instr)
 199 {
 200    hash = HASH(hash, instr->op);
 201    hash = HASH(hash, instr->num_srcs);
 202
 203    for (unsigned i = 0; i < instr->num_srcs; i++) {
 204       hash = HASH(hash, instr->src[i].src_type);
 205       hash = hash_src(hash, &instr->src[i].src);
 206    }
 207
 208    hash = HASH(hash, instr->coord_components);
 209    hash = HASH(hash, instr->sampler_dim);
 210    hash = HASH(hash, instr->is_array);
 211    hash = HASH(hash, instr->is_shadow);
 212    hash = HASH(hash, instr->is_new_style_shadow);
 213    unsigned component = instr->component;
 214    hash = HASH(hash, component);
 215    for (unsigned i = 0; i < 4; ++i)
 216       for (unsigned j = 0; j < 2; ++j)
 217          hash = HASH(hash, instr->tg4_offsets[i][j]);
 218    hash = HASH(hash, instr->texture_index);
 219    hash = HASH(hash, instr->texture_array_size);
 220    hash = HASH(hash, instr->sampler_index);
 221
 222    return hash;
 223 }
 224
 225 /* Computes a hash of an instruction for use in a hash table. Note that this
 226  * will only work for instructions where instr_can_rewrite() returns true, and
 227  * it should return identical hashes for two instructions that are the same
 228  * according nir_instrs_equal().
 229  */
 230
 231 static uint32_t
 232 hash_instr(const void *data)
 233 {
 234    const nir_instr *instr = data;
 235    uint32_t hash = _mesa_fnv32_1a_offset_bias;
 236
 237    switch (instr->type) {
 238    case nir_instr_type_alu:
 239       hash = hash_alu(hash, nir_instr_as_alu(instr));
 240       break;
 241    case nir_instr_type_deref:
 242       hash = hash_deref(hash, nir_instr_as_deref(instr));
 243       break;
 244    case nir_instr_type_load_const:
 245       hash = hash_load_const(hash, nir_instr_as_load_const(instr));
 246       break;
 247    case nir_instr_type_phi:
 248       hash = hash_phi(hash, nir_instr_as_phi(instr));
 249       break;
 250    case nir_instr_type_intrinsic:
 251       hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
 252       break;
 253    case nir_instr_type_tex:
 254       hash = hash_tex(hash, nir_instr_as_tex(instr));
 255       break;
 256    default:
 257       unreachable("Invalid instruction type");
 258    }
 259
 260    return hash;
 261 }
 262
 263 bool
 264 nir_srcs_equal(nir_src src1, nir_src src2)
 265 {
 266    if (src1.is_ssa) {
 267       if (src2.is_ssa) {
 268          return src1.ssa == src2.ssa;
 269       } else {
 270          return false;
 271       }
 272    } else {
 273       if (src2.is_ssa) {
 274          return false;
 275       } else {
 276          if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
 277             return false;
 278
 279          if (src1.reg.indirect) {
 280             if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
 281                return false;
 282          }
 283
 284          return src1.reg.reg == src2.reg.reg &&
 285                 src1.reg.base_offset == src2.reg.base_offset;
 286       }
 287    }
 288 }
 289
 290 /**
 291  * If the \p s is an SSA value that was generated by a negation instruction,
 292  * that instruction is returned as a \c nir_alu_instr.  Otherwise \c NULL is
 293  * returned.
 294  */
 295 static nir_alu_instr *
 296 get_neg_instr(nir_src s)
 297 {
 298    nir_alu_instr *alu = nir_src_as_alu_instr(s);
 299
 300    return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
 301           ? alu : NULL;
 302 }
 303
 304 bool
 305 nir_const_value_negative_equal(const nir_const_value *c1,
 306                                const nir_const_value *c2,
 307                                unsigned components,
 308                                nir_alu_type base_type,
 309                                unsigned bits)
 310 {
 311    assert(base_type == nir_alu_type_get_base_type(base_type));
 312    assert(base_type != nir_type_invalid);
 313
 314    /* This can occur for 1-bit Boolean values. */
 315    if (bits == 1)
 316       return false;
 317
 318    switch (base_type) {
 319    case nir_type_float:
 320       switch (bits) {
 321       case 16:
 322          for (unsigned i = 0; i < components; i++) {
 323             if (_mesa_half_to_float(c1[i].u16) !=
 324                 -_mesa_half_to_float(c2[i].u16)) {
 325                return false;
 326             }
 327          }
 328
 329          return true;
 330
 331       case 32:
 332          for (unsigned i = 0; i < components; i++) {
 333             if (c1[i].f32 != -c2[i].f32)
 334                return false;
 335          }
 336
 337          return true;
 338
 339       case 64:
 340          for (unsigned i = 0; i < components; i++) {
 341             if (c1[i].f64 != -c2[i].f64)
 342                return false;
 343          }
 344
 345          return true;
 346
 347       default:
 348          unreachable("unknown bit size");
 349       }
 350
 351       break;
 352
 353    case nir_type_int:
 354    case nir_type_uint:
 355       switch (bits) {
 356       case 8:
 357          for (unsigned i = 0; i < components; i++) {
 358             if (c1[i].i8 != -c2[i].i8)
 359                return false;
 360          }
 361
 362          return true;
 363
 364       case 16:
 365          for (unsigned i = 0; i < components; i++) {
 366             if (c1[i].i16 != -c2[i].i16)
 367                return false;
 368          }
 369
 370          return true;
 371          break;
 372
 373       case 32:
 374          for (unsigned i = 0; i < components; i++) {
 375             if (c1[i].i32 != -c2[i].i32)
 376                return false;
 377          }
 378
 379          return true;
 380
 381       case 64:
 382          for (unsigned i = 0; i < components; i++) {
 383             if (c1[i].i64 != -c2[i].i64)
 384                return false;
 385          }
 386
 387          return true;
 388
 389       default:
 390          unreachable("unknown bit size");
 391       }
 392
 393       break;
 394
 395    case nir_type_bool:
 396       return false;
 397
 398    default:
 399       break;
 400    }
 401
 402    return false;
 403 }
 404
 405 /**
 406  * Shallow compare of ALU srcs to determine if one is the negation of the other
 407  *
 408  * This function detects cases where \p alu1 is a constant and \p alu2 is a
 409  * constant that is its negation.  It will also detect cases where \p alu2 is
 410  * an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
 411  *
 412  * This function does not detect the general case when \p alu1 and \p alu2 are
 413  * SSA values that are the negations of each other (e.g., \p alu1 represents
 414  * (a * b) and \p alu2 represents (-a * b)).
 415  */
 416 bool
 417 nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
 418                             const nir_alu_instr *alu2,
 419                             unsigned src1, unsigned src2)
 420 {
 421    if (alu1->src[src1].abs != alu2->src[src2].abs)
 422       return false;
 423
 424    bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
 425
 426    /* Handling load_const instructions is tricky. */
 427
 428    const nir_const_value *const const1 =
 429       nir_src_as_const_value(alu1->src[src1].src);
 430
 431    if (const1 != NULL) {
 432       /* Assume that constant folding will eliminate source mods and unary
 433        * ops.
 434        */
 435       if (parity)
 436          return false;
 437
 438       const nir_const_value *const const2 =
 439          nir_src_as_const_value(alu2->src[src2].src);
 440
 441       if (const2 == NULL)
 442          return false;
 443
 444       /* FINISHME: Apply the swizzle? */
 445       return nir_const_value_negative_equal(const1,
 446                                             const2,
 447                                             nir_ssa_alu_instr_src_components(alu1, src1),
 448                                             nir_op_infos[alu1->op].input_types[src1],
 449                                             alu1->dest.dest.ssa.bit_size);
 450    }
 451
 452    uint8_t alu1_swizzle[4] = {0};
 453    nir_src alu1_actual_src;
 454    nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
 455
 456    if (neg1) {
 457       parity = !parity;
 458       alu1_actual_src = neg1->src[0].src;
 459
 460       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
 461          alu1_swizzle[i] = neg1->src[0].swizzle[i];
 462    } else {
 463       alu1_actual_src = alu1->src[src1].src;
 464
 465       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
 466          alu1_swizzle[i] = i;
 467    }
 468
 469    uint8_t alu2_swizzle[4] = {0};
 470    nir_src alu2_actual_src;
 471    nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
 472
 473    if (neg2) {
 474       parity = !parity;
 475       alu2_actual_src = neg2->src[0].src;
 476
 477       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
 478          alu2_swizzle[i] = neg2->src[0].swizzle[i];
 479    } else {
 480       alu2_actual_src = alu2->src[src2].src;
 481
 482       for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
 483          alu2_swizzle[i] = i;
 484    }
 485
 486    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 487       if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
 488           alu2_swizzle[alu2->src[src2].swizzle[i]])
 489          return false;
 490    }
 491
 492    return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
 493 }
 494
 495 bool
 496 nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
 497                    unsigned src1, unsigned src2)
 498 {
 499    if (alu1->src[src1].abs != alu2->src[src2].abs ||
 500        alu1->src[src1].negate != alu2->src[src2].negate)
 501       return false;
 502
 503    for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
 504       if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
 505          return false;
 506    }
 507
 508    return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
 509 }
 510
 511 /* Returns "true" if two instructions are equal. Note that this will only
 512  * work for the subset of instructions defined by instr_can_rewrite(). Also,
 513  * it should only return "true" for instructions that hash_instr() will return
 514  * the same hash for (ignoring collisions, of course).
 515  */
 516
 517 static bool
 518 nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
 519 {
 520    if (instr1->type != instr2->type)
 521       return false;
 522
 523    switch (instr1->type) {
 524    case nir_instr_type_alu: {
 525       nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
 526       nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
 527
 528       if (alu1->op != alu2->op)
 529          return false;
 530
 531       /* We explicitly don't compare instr->exact. */
 532
 533       if (alu1->no_signed_wrap != alu2->no_signed_wrap)
 534          return false;
 535
 536       if (alu1->no_unsigned_wrap != alu2->no_unsigned_wrap)
 537          return false;
 538
 539       /* TODO: We can probably acutally do something more inteligent such
 540        * as allowing different numbers and taking a maximum or something
 541        * here */
 542       if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
 543          return false;
 544
 545       if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
 546          return false;
 547
 548       if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
 549          if ((!nir_alu_srcs_equal(alu1, alu2, 0, 0) ||
 550               !nir_alu_srcs_equal(alu1, alu2, 1, 1)) &&
 551              (!nir_alu_srcs_equal(alu1, alu2, 0, 1) ||
 552               !nir_alu_srcs_equal(alu1, alu2, 1, 0)))
 553             return false;
 554
 555          for (unsigned i = 2; i < nir_op_infos[alu1->op].num_inputs; i++) {
 556             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 557                return false;
 558          }
 559       } else {
 560          for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
 561             if (!nir_alu_srcs_equal(alu1, alu2, i, i))
 562                return false;
 563          }
 564       }
 565       return true;
 566    }
 567    case nir_instr_type_deref: {
 568       nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
 569       nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
 570
 571       if (deref1->deref_type != deref2->deref_type ||
 572           deref1->mode != deref2->mode ||
 573           deref1->type != deref2->type)
 574          return false;
 575
 576       if (deref1->deref_type == nir_deref_type_var)
 577          return deref1->var == deref2->var;
 578
 579       if (!nir_srcs_equal(deref1->parent, deref2->parent))
 580          return false;
 581
 582       switch (deref1->deref_type) {
 583       case nir_deref_type_struct:
 584          if (deref1->strct.index != deref2->strct.index)
 585             return false;
 586          break;
 587
 588       case nir_deref_type_array:
 589       case nir_deref_type_ptr_as_array:
 590          if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
 591             return false;
 592          break;
 593
 594       case nir_deref_type_cast:
 595          if (deref1->cast.ptr_stride != deref2->cast.ptr_stride)
 596             return false;
 597          break;
 598
 599       case nir_deref_type_var:
 600       case nir_deref_type_array_wildcard:
 601          /* Nothing to do */
 602          break;
 603
 604       default:
 605          unreachable("Invalid instruction deref type");
 606       }
 607       return true;
 608    }
 609    case nir_instr_type_tex: {
 610       nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
 611       nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
 612
 613       if (tex1->op != tex2->op)
 614          return false;
 615
 616       if (tex1->num_srcs != tex2->num_srcs)
 617          return false;
 618       for (unsigned i = 0; i < tex1->num_srcs; i++) {
 619          if (tex1->src[i].src_type != tex2->src[i].src_type ||
 620              !nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
 621             return false;
 622          }
 623       }
 624
 625       if (tex1->coord_components != tex2->coord_components ||
 626           tex1->sampler_dim != tex2->sampler_dim ||
 627           tex1->is_array != tex2->is_array ||
 628           tex1->is_shadow != tex2->is_shadow ||
 629           tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
 630           tex1->component != tex2->component ||
 631          tex1->texture_index != tex2->texture_index ||
 632          tex1->texture_array_size != tex2->texture_array_size ||
 633          tex1->sampler_index != tex2->sampler_index) {
 634          return false;
 635       }
 636
 637       if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
 638                  sizeof(tex1->tg4_offsets)))
 639          return false;
 640
 641       return true;
 642    }
 643    case nir_instr_type_load_const: {
 644       nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
 645       nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
 646
 647       if (load1->def.num_components != load2->def.num_components)
 648          return false;
 649
 650       if (load1->def.bit_size != load2->def.bit_size)
 651          return false;
 652
 653       if (load1->def.bit_size == 1) {
 654          for (unsigned i = 0; i < load1->def.num_components; ++i) {
 655             if (load1->value[i].b != load2->value[i].b)
 656                return false;
 657          }
 658       } else {
 659          unsigned size = load1->def.num_components * sizeof(*load1->value);
 660          if (memcmp(load1->value, load2->value, size) != 0)
 661             return false;
 662       }
 663       return true;
 664    }
 665    case nir_instr_type_phi: {
 666       nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
 667       nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
 668
 669       if (phi1->instr.block != phi2->instr.block)
 670          return false;
 671
 672       nir_foreach_phi_src(src1, phi1) {
 673          nir_foreach_phi_src(src2, phi2) {
 674             if (src1->pred == src2->pred) {
 675                if (!nir_srcs_equal(src1->src, src2->src))
 676                   return false;
 677
 678                break;
 679             }
 680          }
 681       }
 682
 683       return true;
 684    }
 685    case nir_instr_type_intrinsic: {
 686       nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
 687       nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
 688       const nir_intrinsic_info *info =
 689          &nir_intrinsic_infos[intrinsic1->intrinsic];
 690
 691       if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
 692           intrinsic1->num_components != intrinsic2->num_components)
 693          return false;
 694
 695       if (info->has_dest && intrinsic1->dest.ssa.num_components !=
 696                             intrinsic2->dest.ssa.num_components)
 697          return false;
 698
 699       if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
 700                             intrinsic2->dest.ssa.bit_size)
 701          return false;
 702
 703       for (unsigned i = 0; i < info->num_srcs; i++) {
 704          if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
 705             return false;
 706       }
 707
 708       for (unsigned i = 0; i < info->num_indices; i++) {
 709          if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
 710             return false;
 711       }
 712
 713       return true;
 714    }
 715    case nir_instr_type_call:
 716    case nir_instr_type_jump:
 717    case nir_instr_type_ssa_undef:
 718    case nir_instr_type_parallel_copy:
 719    default:
 720       unreachable("Invalid instruction type");
 721    }
 722
 723    unreachable("All cases in the above switch should return");
 724 }
 725
 726 static bool
 727 src_is_ssa(nir_src *src, void *data)
 728 {
 729    (void) data;
 730    return src->is_ssa;
 731 }
 732
 733 static bool
 734 dest_is_ssa(nir_dest *dest, void *data)
 735 {
 736    (void) data;
 737    return dest->is_ssa;
 738 }
 739
 740 static inline bool
 741 instr_each_src_and_dest_is_ssa(nir_instr *instr)
 742 {
 743    if (!nir_foreach_dest(instr, dest_is_ssa, NULL) ||
 744        !nir_foreach_src(instr, src_is_ssa, NULL))
 745       return false;
 746
 747    return true;
 748 }
 749
 750 /* This function determines if uses of an instruction can safely be rewritten
 751  * to use another identical instruction instead. Note that this function must
 752  * be kept in sync with hash_instr() and nir_instrs_equal() -- only
 753  * instructions that pass this test will be handed on to those functions, and
 754  * conversely they must handle everything that this function returns true for.
 755  */
 756
 757 static bool
 758 instr_can_rewrite(nir_instr *instr)
 759 {
 760    /* We only handle SSA. */
 761    assert(instr_each_src_and_dest_is_ssa(instr));
 762
 763    switch (instr->type) {
 764    case nir_instr_type_alu:
 765    case nir_instr_type_deref:
 766    case nir_instr_type_tex:
 767    case nir_instr_type_load_const:
 768    case nir_instr_type_phi:
 769       return true;
 770    case nir_instr_type_intrinsic:
 771       return nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr));
 772    case nir_instr_type_call:
 773    case nir_instr_type_jump:
 774    case nir_instr_type_ssa_undef:
 775       return false;
 776    case nir_instr_type_parallel_copy:
 777    default:
 778       unreachable("Invalid instruction type");
 779    }
 780
 781    return false;
 782 }
 783
 784 static nir_ssa_def *
 785 nir_instr_get_dest_ssa_def(nir_instr *instr)
 786 {
 787    switch (instr->type) {
 788    case nir_instr_type_alu:
 789       assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
 790       return &nir_instr_as_alu(instr)->dest.dest.ssa;
 791    case nir_instr_type_deref:
 792       assert(nir_instr_as_deref(instr)->dest.is_ssa);
 793       return &nir_instr_as_deref(instr)->dest.ssa;
 794    case nir_instr_type_load_const:
 795       return &nir_instr_as_load_const(instr)->def;
 796    case nir_instr_type_phi:
 797       assert(nir_instr_as_phi(instr)->dest.is_ssa);
 798       return &nir_instr_as_phi(instr)->dest.ssa;
 799    case nir_instr_type_intrinsic:
 800       assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
 801       return &nir_instr_as_intrinsic(instr)->dest.ssa;
 802    case nir_instr_type_tex:
 803       assert(nir_instr_as_tex(instr)->dest.is_ssa);
 804       return &nir_instr_as_tex(instr)->dest.ssa;
 805    default:
 806       unreachable("We never ask for any of these");
 807    }
 808 }
 809
 810 static bool
 811 cmp_func(const void *data1, const void *data2)
 812 {
 813    return nir_instrs_equal(data1, data2);
 814 }
 815
 816 struct set *
 817 nir_instr_set_create(void *mem_ctx)
 818 {
 819    return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
 820 }
 821
 822 void
 823 nir_instr_set_destroy(struct set *instr_set)
 824 {
 825    _mesa_set_destroy(instr_set, NULL);
 826 }
 827
 828 bool
 829 nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr)
 830 {
 831    if (!instr_can_rewrite(instr))
 832       return false;
 833
 834    struct set_entry *e = _mesa_set_search_or_add(instr_set, instr);
 835    nir_instr *match = (nir_instr *) e->key;
 836    if (match != instr) {
 837       nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
 838       nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
 839
 840       /* It's safe to replace an exact instruction with an inexact one as
 841        * long as we make it exact.  If we got here, the two instructions are
 842        * exactly identical in every other way so, once we've set the exact
 843        * bit, they are the same.
 844        */
 845       if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
 846          nir_instr_as_alu(match)->exact = true;
 847
 848       nir_ssa_def_rewrite_uses(def, nir_src_for_ssa(new_def));
 849       return true;
 850    }
 851
 852    return false;
 853 }
 854
 855 void
 856 nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
 857 {
 858    if (!instr_can_rewrite(instr))
 859       return;
 860
 861    struct set_entry *entry = _mesa_set_search(instr_set, instr);
 862    if (entry)
 863       _mesa_set_remove(instr_set, entry);
 864 }
 865