src/compiler/nir/nir_intrinsics.py

   1 #
   2 # Copyright (C) 2018 Red Hat
   3 # Copyright (C) 2014 Intel Corporation
   4 #
   5 # Permission is hereby granted, free of charge, to any person obtaining a
   6 # copy of this software and associated documentation files (the "Software"),
   7 # to deal in the Software without restriction, including without limitation
   8 # the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9 # and/or sell copies of the Software, and to permit persons to whom the
  10 # Software is furnished to do so, subject to the following conditions:
  11 #
  12 # The above copyright notice and this permission notice (including the next
  13 # paragraph) shall be included in all copies or substantial portions of the
  14 # Software.
  15 #
  16 # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19 # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21 # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22 # IN THE SOFTWARE.
  23 #
  24
  25 # This file defines all the available intrinsics in one place.
  26 #
  27 # The Intrinsic class corresponds one-to-one with nir_intrinsic_info
  28 # structure.
  29
  30 class Intrinsic(object):
  31    """Class that represents all the information about an intrinsic opcode.
  32    NOTE: this must be kept in sync with nir_intrinsic_info.
  33    """
  34    def __init__(self, name, src_components, dest_components,
  35                 indices, flags, sysval, bit_sizes):
  36        """Parameters:
  37
  38        - name: the intrinsic name
  39        - src_components: list of the number of components per src, 0 means
  40          vectorized instruction with number of components given in the
  41          num_components field in nir_intrinsic_instr.
  42        - dest_components: number of destination components, -1 means no
  43          dest, 0 means number of components given in num_components field
  44          in nir_intrinsic_instr.
  45        - indices: list of constant indicies
  46        - flags: list of semantic flags
  47        - sysval: is this a system-value intrinsic
  48        - bit_sizes: allowed dest bit_sizes
  49        """
  50        assert isinstance(name, str)
  51        assert isinstance(src_components, list)
  52        if src_components:
  53            assert isinstance(src_components[0], int)
  54        assert isinstance(dest_components, int)
  55        assert isinstance(indices, list)
  56        if indices:
  57            assert isinstance(indices[0], str)
  58        assert isinstance(flags, list)
  59        if flags:
  60            assert isinstance(flags[0], str)
  61        assert isinstance(sysval, bool)
  62        if bit_sizes:
  63            assert isinstance(bit_sizes[0], int)
  64
  65        self.name = name
  66        self.num_srcs = len(src_components)
  67        self.src_components = src_components
  68        self.has_dest = (dest_components >= 0)
  69        self.dest_components = dest_components
  70        self.num_indices = len(indices)
  71        self.indices = indices
  72        self.flags = flags
  73        self.sysval = sysval
  74        self.bit_sizes = bit_sizes
  75
  76 #
  77 # Possible indices:
  78 #
  79
  80 # A constant 'base' value that is added to an offset src:
  81 BASE = "NIR_INTRINSIC_BASE"
  82 # For store instructions, a writemask:
  83 WRMASK = "NIR_INTRINSIC_WRMASK"
  84 # The stream-id for GS emit_vertex/end_primitive intrinsics:
  85 STREAM_ID = "NIR_INTRINSIC_STREAM_ID"
  86 # The clip-plane id for load_user_clip_plane intrinsics:
  87 UCP_ID = "NIR_INTRINSIC_UCP_ID"
  88 # The amount of data, starting from BASE, that this instruction
  89 # may access.  This is used to provide bounds if the offset is
  90 # not constant.
  91 RANGE = "NIR_INTRINSIC_RANGE"
  92 # The vulkan descriptor set binding for vulkan_resource_index
  93 # intrinsic
  94 DESC_SET = "NIR_INTRINSIC_DESC_SET"
  95 # The vulkan descriptor set binding for vulkan_resource_index
  96 # intrinsic
  97 BINDING = "NIR_INTRINSIC_BINDING"
  98 # Component offset
  99 COMPONENT = "NIR_INTRINSIC_COMPONENT"
 100 # Interpolation mode (only meaningful for FS inputs)
 101 INTERP_MODE = "NIR_INTRINSIC_INTERP_MODE"
 102 # A binary nir_op to use when performing a reduction or scan operation
 103 REDUCTION_OP = "NIR_INTRINSIC_REDUCTION_OP"
 104 # Cluster size for reduction operations
 105 CLUSTER_SIZE = "NIR_INTRINSIC_CLUSTER_SIZE"
 106 # Parameter index for a load_param intrinsic
 107 PARAM_IDX = "NIR_INTRINSIC_PARAM_IDX"
 108 # Image dimensionality for image intrinsics
 109 IMAGE_DIM = "NIR_INTRINSIC_IMAGE_DIM"
 110 # Non-zero if we are accessing an array image
 111 IMAGE_ARRAY = "NIR_INTRINSIC_IMAGE_ARRAY"
 112 # Access qualifiers for image and memory access intrinsics
 113 ACCESS = "NIR_INTRINSIC_ACCESS"
 114 DST_ACCESS = "NIR_INTRINSIC_DST_ACCESS"
 115 SRC_ACCESS = "NIR_INTRINSIC_SRC_ACCESS"
 116 # Image format for image intrinsics
 117 FORMAT = "NIR_INTRINSIC_FORMAT"
 118 # Offset or address alignment
 119 ALIGN_MUL = "NIR_INTRINSIC_ALIGN_MUL"
 120 ALIGN_OFFSET = "NIR_INTRINSIC_ALIGN_OFFSET"
 121 # The vulkan descriptor type for vulkan_resource_index
 122 DESC_TYPE = "NIR_INTRINSIC_DESC_TYPE"
 123 # The nir_alu_type of a uniform/input/output
 124 TYPE = "NIR_INTRINSIC_TYPE"
 125 # The swizzle mask for quad_swizzle_amd & masked_swizzle_amd
 126 SWIZZLE_MASK = "NIR_INTRINSIC_SWIZZLE_MASK"
 127 # Driver location of attribute
 128 DRIVER_LOCATION = "NIR_INTRINSIC_DRIVER_LOCATION"
 129 # Ordering and visibility of a memory operation
 130 MEMORY_SEMANTICS = "NIR_INTRINSIC_MEMORY_SEMANTICS"
 131 # Modes affected by a memory operation
 132 MEMORY_MODES = "NIR_INTRINSIC_MEMORY_MODES"
 133 # Scope of a memory operation
 134 MEMORY_SCOPE = "NIR_INTRINSIC_MEMORY_SCOPE"
 135
 136 #
 137 # Possible flags:
 138 #
 139
 140 CAN_ELIMINATE = "NIR_INTRINSIC_CAN_ELIMINATE"
 141 CAN_REORDER   = "NIR_INTRINSIC_CAN_REORDER"
 142
 143 INTR_OPCODES = {}
 144
 145 # Defines a new NIR intrinsic.  By default, the intrinsic will have no sources
 146 # and no destination.
 147 #
 148 # You can set dest_comp=n to enable a destination for the intrinsic, in which
 149 # case it will have that many components, or =0 for "as many components as the
 150 # NIR destination value."
 151 #
 152 # Set src_comp=n to enable sources for the intruction.  It can be an array of
 153 # component counts, or (for convenience) a scalar component count if there's
 154 # only one source.  If a component count is 0, it will be as many components as
 155 # the intrinsic has based on the dest_comp.
 156 def intrinsic(name, src_comp=[], dest_comp=-1, indices=[],
 157               flags=[], sysval=False, bit_sizes=[]):
 158     assert name not in INTR_OPCODES
 159     INTR_OPCODES[name] = Intrinsic(name, src_comp, dest_comp,
 160                                    indices, flags, sysval, bit_sizes)
 161
 162 intrinsic("nop", flags=[CAN_ELIMINATE])
 163
 164 intrinsic("load_param", dest_comp=0, indices=[PARAM_IDX], flags=[CAN_ELIMINATE])
 165
 166 intrinsic("load_deref", dest_comp=0, src_comp=[-1],
 167           indices=[ACCESS], flags=[CAN_ELIMINATE])
 168 intrinsic("store_deref", src_comp=[-1, 0], indices=[WRMASK, ACCESS])
 169 intrinsic("copy_deref", src_comp=[-1, -1], indices=[DST_ACCESS, SRC_ACCESS])
 170
 171 # Interpolation of input.  The interp_deref_at* intrinsics are similar to the
 172 # load_var intrinsic acting on a shader input except that they interpolate the
 173 # input differently.  The at_sample and at_offset intrinsics take an
 174 # additional source that is an integer sample id or a vec2 position offset
 175 # respectively.
 176
 177 intrinsic("interp_deref_at_centroid", dest_comp=0, src_comp=[1],
 178           flags=[ CAN_ELIMINATE, CAN_REORDER])
 179 intrinsic("interp_deref_at_sample", src_comp=[1, 1], dest_comp=0,
 180           flags=[CAN_ELIMINATE, CAN_REORDER])
 181 intrinsic("interp_deref_at_offset", src_comp=[1, 2], dest_comp=0,
 182           flags=[CAN_ELIMINATE, CAN_REORDER])
 183
 184 # Gets the length of an unsized array at the end of a buffer
 185 intrinsic("deref_buffer_array_length", src_comp=[-1], dest_comp=1,
 186           flags=[CAN_ELIMINATE, CAN_REORDER])
 187
 188 # Ask the driver for the size of a given buffer. It takes the buffer index
 189 # as source.
 190 intrinsic("get_buffer_size", src_comp=[-1], dest_comp=1,
 191           flags=[CAN_ELIMINATE, CAN_REORDER])
 192
 193 # a barrier is an intrinsic with no inputs/outputs but which can't be moved
 194 # around/optimized in general
 195 def barrier(name):
 196     intrinsic(name)
 197
 198 barrier("barrier")
 199 barrier("discard")
 200
 201 # Demote fragment shader invocation to a helper invocation.  Any stores to
 202 # memory after this instruction are suppressed and the fragment does not write
 203 # outputs to the framebuffer.  Unlike discard, demote needs to ensure that
 204 # derivatives will still work for invocations that were not demoted.
 205 #
 206 # As specified by SPV_EXT_demote_to_helper_invocation.
 207 barrier("demote")
 208 intrinsic("is_helper_invocation", dest_comp=1, flags=[CAN_ELIMINATE])
 209
 210
 211 # Memory barrier with semantics analogous to the memoryBarrier() GLSL
 212 # intrinsic.
 213 barrier("memory_barrier")
 214
 215 # Memory barrier with explicit scope.  Follows the semantics of SPIR-V
 216 # OpMemoryBarrier, used to implement Vulkan Memory Model.  Storage that the
 217 # barrierr applies is represented using NIR variable modes.
 218 intrinsic("scoped_memory_barrier",
 219           indices=[MEMORY_SEMANTICS, MEMORY_MODES, MEMORY_SCOPE])
 220
 221 # Shader clock intrinsic with semantics analogous to the clock2x32ARB()
 222 # GLSL intrinsic.
 223 # The latter can be used as code motion barrier, which is currently not
 224 # feasible with NIR.
 225 intrinsic("shader_clock", dest_comp=2, flags=[CAN_ELIMINATE])
 226
 227 # Shader ballot intrinsics with semantics analogous to the
 228 #
 229 #    ballotARB()
 230 #    readInvocationARB()
 231 #    readFirstInvocationARB()
 232 #
 233 # GLSL functions from ARB_shader_ballot.
 234 intrinsic("ballot", src_comp=[1], dest_comp=0, flags=[CAN_ELIMINATE])
 235 intrinsic("read_invocation", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 236 intrinsic("read_first_invocation", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
 237
 238 # Additional SPIR-V ballot intrinsics
 239 #
 240 # These correspond to the SPIR-V opcodes
 241 #
 242 #    OpGroupUniformElect
 243 #    OpSubgroupFirstInvocationKHR
 244 intrinsic("elect", dest_comp=1, flags=[CAN_ELIMINATE])
 245 intrinsic("first_invocation", dest_comp=1, flags=[CAN_ELIMINATE])
 246
 247 # Memory barrier with semantics analogous to the compute shader
 248 # groupMemoryBarrier(), memoryBarrierAtomicCounter(), memoryBarrierBuffer(),
 249 # memoryBarrierImage() and memoryBarrierShared() GLSL intrinsics.
 250 barrier("group_memory_barrier")
 251 barrier("memory_barrier_atomic_counter")
 252 barrier("memory_barrier_buffer")
 253 barrier("memory_barrier_image")
 254 barrier("memory_barrier_shared")
 255 barrier("begin_invocation_interlock")
 256 barrier("end_invocation_interlock")
 257
 258 # Memory barrier for synchronizing TCS patch outputs
 259 barrier("memory_barrier_tcs_patch")
 260
 261 # A conditional discard/demote, with a single boolean source.
 262 intrinsic("discard_if", src_comp=[1])
 263 intrinsic("demote_if", src_comp=[1])
 264
 265 # ARB_shader_group_vote intrinsics
 266 intrinsic("vote_any", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
 267 intrinsic("vote_all", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
 268 intrinsic("vote_feq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
 269 intrinsic("vote_ieq", src_comp=[0], dest_comp=1, flags=[CAN_ELIMINATE])
 270
 271 # Ballot ALU operations from SPIR-V.
 272 #
 273 # These operations work like their ALU counterparts except that the operate
 274 # on a uvec4 which is treated as a 128bit integer.  Also, they are, in
 275 # general, free to ignore any bits which are above the subgroup size.
 276 intrinsic("ballot_bitfield_extract", src_comp=[4, 1], dest_comp=1, flags=[CAN_ELIMINATE])
 277 intrinsic("ballot_bit_count_reduce", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
 278 intrinsic("ballot_bit_count_inclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
 279 intrinsic("ballot_bit_count_exclusive", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
 280 intrinsic("ballot_find_lsb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
 281 intrinsic("ballot_find_msb", src_comp=[4], dest_comp=1, flags=[CAN_ELIMINATE])
 282
 283 # Shuffle operations from SPIR-V.
 284 intrinsic("shuffle", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 285 intrinsic("shuffle_xor", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 286 intrinsic("shuffle_up", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 287 intrinsic("shuffle_down", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 288
 289 # Quad operations from SPIR-V.
 290 intrinsic("quad_broadcast", src_comp=[0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 291 intrinsic("quad_swap_horizontal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
 292 intrinsic("quad_swap_vertical", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
 293 intrinsic("quad_swap_diagonal", src_comp=[0], dest_comp=0, flags=[CAN_ELIMINATE])
 294
 295 intrinsic("reduce", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP, CLUSTER_SIZE],
 296           flags=[CAN_ELIMINATE])
 297 intrinsic("inclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
 298           flags=[CAN_ELIMINATE])
 299 intrinsic("exclusive_scan", src_comp=[0], dest_comp=0, indices=[REDUCTION_OP],
 300           flags=[CAN_ELIMINATE])
 301
 302 # AMD shader ballot operations
 303 intrinsic("quad_swizzle_amd", src_comp=[0], dest_comp=0, indices=[SWIZZLE_MASK],
 304           flags=[CAN_ELIMINATE])
 305 intrinsic("masked_swizzle_amd", src_comp=[0], dest_comp=0, indices=[SWIZZLE_MASK],
 306           flags=[CAN_ELIMINATE])
 307 intrinsic("write_invocation_amd", src_comp=[0, 0, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 308 intrinsic("mbcnt_amd", src_comp=[1], dest_comp=1, flags=[CAN_ELIMINATE])
 309
 310 # Basic Geometry Shader intrinsics.
 311 #
 312 # emit_vertex implements GLSL's EmitStreamVertex() built-in.  It takes a single
 313 # index, which is the stream ID to write to.
 314 #
 315 # end_primitive implements GLSL's EndPrimitive() built-in.
 316 intrinsic("emit_vertex",   indices=[STREAM_ID])
 317 intrinsic("end_primitive", indices=[STREAM_ID])
 318
 319 # Geometry Shader intrinsics with a vertex count.
 320 #
 321 # Alternatively, drivers may implement these intrinsics, and use
 322 # nir_lower_gs_intrinsics() to convert from the basic intrinsics.
 323 #
 324 # These maintain a count of the number of vertices emitted, as an additional
 325 # unsigned integer source.
 326 intrinsic("emit_vertex_with_counter", src_comp=[1], indices=[STREAM_ID])
 327 intrinsic("end_primitive_with_counter", src_comp=[1], indices=[STREAM_ID])
 328 intrinsic("set_vertex_count", src_comp=[1])
 329
 330 # Atomic counters
 331 #
 332 # The *_var variants take an atomic_uint nir_variable, while the other,
 333 # lowered, variants take a constant buffer index and register offset.
 334
 335 def atomic(name, flags=[]):
 336     intrinsic(name + "_deref", src_comp=[-1], dest_comp=1, flags=flags)
 337     intrinsic(name, src_comp=[1], dest_comp=1, indices=[BASE], flags=flags)
 338
 339 def atomic2(name):
 340     intrinsic(name + "_deref", src_comp=[-1, 1], dest_comp=1)
 341     intrinsic(name, src_comp=[1, 1], dest_comp=1, indices=[BASE])
 342
 343 def atomic3(name):
 344     intrinsic(name + "_deref", src_comp=[-1, 1, 1], dest_comp=1)
 345     intrinsic(name, src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
 346
 347 atomic("atomic_counter_inc")
 348 atomic("atomic_counter_pre_dec")
 349 atomic("atomic_counter_post_dec")
 350 atomic("atomic_counter_read", flags=[CAN_ELIMINATE])
 351 atomic2("atomic_counter_add")
 352 atomic2("atomic_counter_min")
 353 atomic2("atomic_counter_max")
 354 atomic2("atomic_counter_and")
 355 atomic2("atomic_counter_or")
 356 atomic2("atomic_counter_xor")
 357 atomic2("atomic_counter_exchange")
 358 atomic3("atomic_counter_comp_swap")
 359
 360 # Image load, store and atomic intrinsics.
 361 #
 362 # All image intrinsics come in three versions.  One which take an image target
 363 # passed as a deref chain as the first source, one which takes an index as the
 364 # first source, and one which takes a bindless handle as the first source.
 365 # In the first version, the image variable contains the memory and layout
 366 # qualifiers that influence the semantics of the intrinsic.  In the second and
 367 # third, the image format and access qualifiers are provided as constant
 368 # indices.
 369 #
 370 # All image intrinsics take a four-coordinate vector and a sample index as
 371 # 2nd and 3rd sources, determining the location within the image that will be
 372 # accessed by the intrinsic.  Components not applicable to the image target
 373 # in use are undefined.  Image store takes an additional four-component
 374 # argument with the value to be written, and image atomic operations take
 375 # either one or two additional scalar arguments with the same meaning as in
 376 # the ARB_shader_image_load_store specification.
 377 def image(name, src_comp=[], **kwargs):
 378     intrinsic("image_deref_" + name, src_comp=[1] + src_comp,
 379               indices=[ACCESS], **kwargs)
 380     intrinsic("image_" + name, src_comp=[1] + src_comp,
 381               indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
 382     intrinsic("bindless_image_" + name, src_comp=[1] + src_comp,
 383               indices=[IMAGE_DIM, IMAGE_ARRAY, FORMAT, ACCESS], **kwargs)
 384
 385 image("load", src_comp=[4, 1, 1], dest_comp=0, flags=[CAN_ELIMINATE])
 386 image("store", src_comp=[4, 1, 0, 1])
 387 image("atomic_add",  src_comp=[4, 1, 1], dest_comp=1)
 388 image("atomic_imin",  src_comp=[4, 1, 1], dest_comp=1)
 389 image("atomic_umin",  src_comp=[4, 1, 1], dest_comp=1)
 390 image("atomic_imax",  src_comp=[4, 1, 1], dest_comp=1)
 391 image("atomic_umax",  src_comp=[4, 1, 1], dest_comp=1)
 392 image("atomic_and",  src_comp=[4, 1, 1], dest_comp=1)
 393 image("atomic_or",   src_comp=[4, 1, 1], dest_comp=1)
 394 image("atomic_xor",  src_comp=[4, 1, 1], dest_comp=1)
 395 image("atomic_exchange",  src_comp=[4, 1, 1], dest_comp=1)
 396 image("atomic_comp_swap", src_comp=[4, 1, 1, 1], dest_comp=1)
 397 image("atomic_fadd",  src_comp=[1, 4, 1, 1], dest_comp=1)
 398 image("size",    dest_comp=0, flags=[CAN_ELIMINATE, CAN_REORDER])
 399 image("samples", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
 400 image("atomic_inc_wrap",  src_comp=[4, 1, 1], dest_comp=1)
 401 image("atomic_dec_wrap",  src_comp=[4, 1, 1], dest_comp=1)
 402
 403 # Intel-specific query for loading from the brw_image_param struct passed
 404 # into the shader as a uniform.  The variable is a deref to the image
 405 # variable. The const index specifies which of the six parameters to load.
 406 intrinsic("image_deref_load_param_intel", src_comp=[1], dest_comp=0,
 407           indices=[BASE], flags=[CAN_ELIMINATE, CAN_REORDER])
 408 image("load_raw_intel", src_comp=[1], dest_comp=0,
 409       flags=[CAN_ELIMINATE])
 410 image("store_raw_intel", src_comp=[1, 0])
 411
 412 # Vulkan descriptor set intrinsics
 413 #
 414 # The Vulkan API uses a different binding model from GL.  In the Vulkan
 415 # API, all external resources are represented by a tuple:
 416 #
 417 # (descriptor set, binding, array index)
 418 #
 419 # where the array index is the only thing allowed to be indirect.  The
 420 # vulkan_surface_index intrinsic takes the descriptor set and binding as
 421 # its first two indices and the array index as its source.  The third
 422 # index is a nir_variable_mode in case that's useful to the backend.
 423 #
 424 # The intended usage is that the shader will call vulkan_surface_index to
 425 # get an index and then pass that as the buffer index ubo/ssbo calls.
 426 #
 427 # The vulkan_resource_reindex intrinsic takes a resource index in src0
 428 # (the result of a vulkan_resource_index or vulkan_resource_reindex) which
 429 # corresponds to the tuple (set, binding, index) and computes an index
 430 # corresponding to tuple (set, binding, idx + src1).
 431 intrinsic("vulkan_resource_index", src_comp=[1], dest_comp=0,
 432           indices=[DESC_SET, BINDING, DESC_TYPE],
 433           flags=[CAN_ELIMINATE, CAN_REORDER])
 434 intrinsic("vulkan_resource_reindex", src_comp=[0, 1], dest_comp=0,
 435           indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
 436 intrinsic("load_vulkan_descriptor", src_comp=[-1], dest_comp=0,
 437           indices=[DESC_TYPE], flags=[CAN_ELIMINATE, CAN_REORDER])
 438
 439 # variable atomic intrinsics
 440 #
 441 # All of these variable atomic memory operations read a value from memory,
 442 # compute a new value using one of the operations below, write the new value
 443 # to memory, and return the original value read.
 444 #
 445 # All operations take 2 sources except CompSwap that takes 3. These sources
 446 # represent:
 447 #
 448 # 0: A deref to the memory on which to perform the atomic
 449 # 1: The data parameter to the atomic function (i.e. the value to add
 450 #    in shared_atomic_add, etc).
 451 # 2: For CompSwap only: the second data parameter.
 452 intrinsic("deref_atomic_add",  src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 453 intrinsic("deref_atomic_imin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 454 intrinsic("deref_atomic_umin", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 455 intrinsic("deref_atomic_imax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 456 intrinsic("deref_atomic_umax", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 457 intrinsic("deref_atomic_and",  src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 458 intrinsic("deref_atomic_or",   src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 459 intrinsic("deref_atomic_xor",  src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 460 intrinsic("deref_atomic_exchange", src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 461 intrinsic("deref_atomic_comp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
 462 intrinsic("deref_atomic_fadd",  src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 463 intrinsic("deref_atomic_fmin",  src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 464 intrinsic("deref_atomic_fmax",  src_comp=[-1, 1], dest_comp=1, indices=[ACCESS])
 465 intrinsic("deref_atomic_fcomp_swap", src_comp=[-1, 1, 1], dest_comp=1, indices=[ACCESS])
 466
 467 # SSBO atomic intrinsics
 468 #
 469 # All of the SSBO atomic memory operations read a value from memory,
 470 # compute a new value using one of the operations below, write the new
 471 # value to memory, and return the original value read.
 472 #
 473 # All operations take 3 sources except CompSwap that takes 4. These
 474 # sources represent:
 475 #
 476 # 0: The SSBO buffer index.
 477 # 1: The offset into the SSBO buffer of the variable that the atomic
 478 #    operation will operate on.
 479 # 2: The data parameter to the atomic function (i.e. the value to add
 480 #    in ssbo_atomic_add, etc).
 481 # 3: For CompSwap only: the second data parameter.
 482 intrinsic("ssbo_atomic_add",  src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 483 intrinsic("ssbo_atomic_imin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 484 intrinsic("ssbo_atomic_umin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 485 intrinsic("ssbo_atomic_imax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 486 intrinsic("ssbo_atomic_umax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 487 intrinsic("ssbo_atomic_and",  src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 488 intrinsic("ssbo_atomic_or",   src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 489 intrinsic("ssbo_atomic_xor",  src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 490 intrinsic("ssbo_atomic_exchange", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 491 intrinsic("ssbo_atomic_comp_swap", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
 492 intrinsic("ssbo_atomic_fadd", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 493 intrinsic("ssbo_atomic_fmin", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 494 intrinsic("ssbo_atomic_fmax", src_comp=[1, 1, 1], dest_comp=1, indices=[ACCESS])
 495 intrinsic("ssbo_atomic_fcomp_swap", src_comp=[1, 1, 1, 1], dest_comp=1, indices=[ACCESS])
 496
 497 # CS shared variable atomic intrinsics
 498 #
 499 # All of the shared variable atomic memory operations read a value from
 500 # memory, compute a new value using one of the operations below, write the
 501 # new value to memory, and return the original value read.
 502 #
 503 # All operations take 2 sources except CompSwap that takes 3. These
 504 # sources represent:
 505 #
 506 # 0: The offset into the shared variable storage region that the atomic
 507 #    operation will operate on.
 508 # 1: The data parameter to the atomic function (i.e. the value to add
 509 #    in shared_atomic_add, etc).
 510 # 2: For CompSwap only: the second data parameter.
 511 intrinsic("shared_atomic_add",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 512 intrinsic("shared_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 513 intrinsic("shared_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 514 intrinsic("shared_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 515 intrinsic("shared_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 516 intrinsic("shared_atomic_and",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 517 intrinsic("shared_atomic_or",   src_comp=[1, 1], dest_comp=1, indices=[BASE])
 518 intrinsic("shared_atomic_xor",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 519 intrinsic("shared_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 520 intrinsic("shared_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
 521 intrinsic("shared_atomic_fadd",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 522 intrinsic("shared_atomic_fmin",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 523 intrinsic("shared_atomic_fmax",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 524 intrinsic("shared_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
 525
 526 # Global atomic intrinsics
 527 #
 528 # All of the shared variable atomic memory operations read a value from
 529 # memory, compute a new value using one of the operations below, write the
 530 # new value to memory, and return the original value read.
 531 #
 532 # All operations take 2 sources except CompSwap that takes 3. These
 533 # sources represent:
 534 #
 535 # 0: The memory address that the atomic operation will operate on.
 536 # 1: The data parameter to the atomic function (i.e. the value to add
 537 #    in shared_atomic_add, etc).
 538 # 2: For CompSwap only: the second data parameter.
 539 intrinsic("global_atomic_add",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 540 intrinsic("global_atomic_imin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 541 intrinsic("global_atomic_umin", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 542 intrinsic("global_atomic_imax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 543 intrinsic("global_atomic_umax", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 544 intrinsic("global_atomic_and",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 545 intrinsic("global_atomic_or",   src_comp=[1, 1], dest_comp=1, indices=[BASE])
 546 intrinsic("global_atomic_xor",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 547 intrinsic("global_atomic_exchange", src_comp=[1, 1], dest_comp=1, indices=[BASE])
 548 intrinsic("global_atomic_comp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
 549 intrinsic("global_atomic_fadd",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 550 intrinsic("global_atomic_fmin",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 551 intrinsic("global_atomic_fmax",  src_comp=[1, 1], dest_comp=1, indices=[BASE])
 552 intrinsic("global_atomic_fcomp_swap", src_comp=[1, 1, 1], dest_comp=1, indices=[BASE])
 553
 554 def system_value(name, dest_comp, indices=[], bit_sizes=[32]):
 555     intrinsic("load_" + name, [], dest_comp, indices,
 556               flags=[CAN_ELIMINATE, CAN_REORDER], sysval=True,
 557               bit_sizes=bit_sizes)
 558
 559 system_value("frag_coord", 4)
 560 system_value("point_coord", 2)
 561 system_value("front_face", 1, bit_sizes=[1, 32])
 562 system_value("vertex_id", 1)
 563 system_value("vertex_id_zero_base", 1)
 564 system_value("first_vertex", 1)
 565 system_value("is_indexed_draw", 1)
 566 system_value("base_vertex", 1)
 567 system_value("instance_id", 1)
 568 system_value("base_instance", 1)
 569 system_value("draw_id", 1)
 570 system_value("sample_id", 1)
 571 # sample_id_no_per_sample is like sample_id but does not imply per-
 572 # sample shading.  See the lower_helper_invocation option.
 573 system_value("sample_id_no_per_sample", 1)
 574 system_value("sample_pos", 2)
 575 system_value("sample_mask_in", 1)
 576 system_value("primitive_id", 1)
 577 system_value("invocation_id", 1)
 578 system_value("tess_coord", 3)
 579 system_value("tess_level_outer", 4)
 580 system_value("tess_level_inner", 2)
 581 system_value("tess_level_outer_default", 4)
 582 system_value("tess_level_inner_default", 2)
 583 system_value("patch_vertices_in", 1)
 584 system_value("local_invocation_id", 3)
 585 system_value("local_invocation_index", 1)
 586 system_value("work_group_id", 3)
 587 system_value("user_clip_plane", 4, indices=[UCP_ID])
 588 system_value("num_work_groups", 3)
 589 system_value("helper_invocation", 1, bit_sizes=[1, 32])
 590 system_value("alpha_ref_float", 1)
 591 system_value("layer_id", 1)
 592 system_value("view_index", 1)
 593 system_value("subgroup_size", 1)
 594 system_value("subgroup_invocation", 1)
 595 system_value("subgroup_eq_mask", 0, bit_sizes=[32, 64])
 596 system_value("subgroup_ge_mask", 0, bit_sizes=[32, 64])
 597 system_value("subgroup_gt_mask", 0, bit_sizes=[32, 64])
 598 system_value("subgroup_le_mask", 0, bit_sizes=[32, 64])
 599 system_value("subgroup_lt_mask", 0, bit_sizes=[32, 64])
 600 system_value("num_subgroups", 1)
 601 system_value("subgroup_id", 1)
 602 system_value("local_group_size", 3)
 603 system_value("global_invocation_id", 3, bit_sizes=[32, 64])
 604 system_value("global_invocation_index", 1, bit_sizes=[32, 64])
 605 system_value("work_dim", 1)
 606 # Driver-specific viewport scale/offset parameters.
 607 #
 608 # VC4 and V3D need to emit a scaled version of the position in the vertex
 609 # shaders for binning, and having system values lets us move the math for that
 610 # into NIR.
 611 #
 612 # Panfrost needs to implement all coordinate transformation in the
 613 # vertex shader; system values allow us to share this routine in NIR.
 614 system_value("viewport_x_scale", 1)
 615 system_value("viewport_y_scale", 1)
 616 system_value("viewport_z_scale", 1)
 617 system_value("viewport_z_offset", 1)
 618 system_value("viewport_scale", 3)
 619 system_value("viewport_offset", 3)
 620
 621 # Blend constant color values.  Float values are clamped. Vectored versions are
 622 # provided as well for driver convenience
 623
 624 system_value("blend_const_color_r_float", 1)
 625 system_value("blend_const_color_g_float", 1)
 626 system_value("blend_const_color_b_float", 1)
 627 system_value("blend_const_color_a_float", 1)
 628 system_value("blend_const_color_rgba", 4)
 629 system_value("blend_const_color_rgba8888_unorm", 1)
 630 system_value("blend_const_color_aaaa8888_unorm", 1)
 631
 632 # System values for gl_Color, for radeonsi which interpolates these in the
 633 # shader prolog to handle two-sided color without recompiles and therefore
 634 # doesn't handle these in the main shader part like normal varyings.
 635 system_value("color0", 4)
 636 system_value("color1", 4)
 637
 638 # System value for internal compute shaders in radeonsi.
 639 system_value("user_data_amd", 4)
 640
 641 # Barycentric coordinate intrinsics.
 642 #
 643 # These set up the barycentric coordinates for a particular interpolation.
 644 # The first three are for the simple cases: pixel, centroid, or per-sample
 645 # (at gl_SampleID).  The next two handle interpolating at a specified
 646 # sample location, or interpolating with a vec2 offset,
 647 #
 648 # The interp_mode index should be either the INTERP_MODE_SMOOTH or
 649 # INTERP_MODE_NOPERSPECTIVE enum values.
 650 #
 651 # The vec2 value produced by these intrinsics is intended for use as the
 652 # barycoord source of a load_interpolated_input intrinsic.
 653
 654 def barycentric(name, src_comp=[]):
 655     intrinsic("load_barycentric_" + name, src_comp=src_comp, dest_comp=2,
 656               indices=[INTERP_MODE], flags=[CAN_ELIMINATE, CAN_REORDER])
 657
 658 # no sources.
 659 barycentric("pixel")
 660 barycentric("centroid")
 661 barycentric("sample")
 662 # src[] = { sample_id }.
 663 barycentric("at_sample", [1])
 664 # src[] = { offset.xy }.
 665 barycentric("at_offset", [2])
 666
 667 # Load sample position:
 668 #
 669 # Takes a sample # and returns a sample position.  Used for lowering
 670 # interpolateAtSample() to interpolateAtOffset()
 671 intrinsic("load_sample_pos_from_id", src_comp=[1], dest_comp=2,
 672           flags=[CAN_ELIMINATE, CAN_REORDER])
 673
 674 # Loads what I believe is the primitive size, for scaling ij to pixel size:
 675 intrinsic("load_size_ir3", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])
 676
 677 # Fragment shader input interpolation delta intrinsic.
 678 #
 679 # For hw where fragment shader input interpolation is handled in shader, the
 680 # load_fs_input_interp deltas intrinsics can be used to load the input deltas
 681 # used for interpolation as follows:
 682 #
 683 #    vec3 iid = load_fs_input_interp_deltas(varying_slot)
 684 #    vec2 bary = load_barycentric_*(...)
 685 #    float result = iid.x + iid.y * bary.y + iid.z * bary.x
 686
 687 intrinsic("load_fs_input_interp_deltas", src_comp=[1], dest_comp=3,
 688           indices=[BASE, COMPONENT], flags=[CAN_ELIMINATE, CAN_REORDER])
 689
 690 # Load operations pull data from some piece of GPU memory.  All load
 691 # operations operate in terms of offsets into some piece of theoretical
 692 # memory.  Loads from externally visible memory (UBO and SSBO) simply take a
 693 # byte offset as a source.  Loads from opaque memory (uniforms, inputs, etc.)
 694 # take a base+offset pair where the nir_intrinsic_base() gives the location
 695 # of the start of the variable being loaded and and the offset source is a
 696 # offset into that variable.
 697 #
 698 # Uniform load operations have a nir_intrinsic_range() index that specifies the
 699 # range (starting at base) of the data from which we are loading.  If
 700 # range == 0, then the range is unknown.
 701 #
 702 # Some load operations such as UBO/SSBO load and per_vertex loads take an
 703 # additional source to specify which UBO/SSBO/vertex to load from.
 704 #
 705 # The exact address type depends on the lowering pass that generates the
 706 # load/store intrinsics.  Typically, this is vec4 units for things such as
 707 # varying slots and float units for fragment shader inputs.  UBO and SSBO
 708 # offsets are always in bytes.
 709
 710 def load(name, num_srcs, indices=[], flags=[]):
 711     intrinsic("load_" + name, [1] * num_srcs, dest_comp=0, indices=indices,
 712               flags=flags)
 713
 714 # src[] = { offset }.
 715 load("uniform", 1, [BASE, RANGE, TYPE], [CAN_ELIMINATE, CAN_REORDER])
 716 # src[] = { buffer_index, offset }.
 717 load("ubo", 2, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE, CAN_REORDER])
 718 # src[] = { offset }.
 719 load("input", 1, [BASE, COMPONENT, TYPE], [CAN_ELIMINATE, CAN_REORDER])
 720 # src[] = { vertex, offset }.
 721 load("per_vertex_input", 2, [BASE, COMPONENT], [CAN_ELIMINATE, CAN_REORDER])
 722 # src[] = { barycoord, offset }.
 723 intrinsic("load_interpolated_input", src_comp=[2, 1], dest_comp=0,
 724           indices=[BASE, COMPONENT], flags=[CAN_ELIMINATE, CAN_REORDER])
 725
 726 # src[] = { buffer_index, offset }.
 727 load("ssbo", 2, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
 728 # src[] = { offset }.
 729 load("output", 1, [BASE, COMPONENT], flags=[CAN_ELIMINATE])
 730 # src[] = { vertex, offset }.
 731 load("per_vertex_output", 2, [BASE, COMPONENT], [CAN_ELIMINATE])
 732 # src[] = { offset }.
 733 load("shared", 1, [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
 734 # src[] = { offset }.
 735 load("push_constant", 1, [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
 736 # src[] = { offset }.
 737 load("constant", 1, [BASE, RANGE], [CAN_ELIMINATE, CAN_REORDER])
 738 # src[] = { address }.
 739 load("global", 1, [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
 740 # src[] = { address }.
 741 load("kernel_input", 1, [BASE, RANGE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE, CAN_REORDER])
 742 # src[] = { offset }.
 743 load("scratch", 1, [ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
 744
 745 # Stores work the same way as loads, except now the first source is the value
 746 # to store and the second (and possibly third) source specify where to store
 747 # the value.  SSBO and shared memory stores also have a
 748 # nir_intrinsic_write_mask()
 749
 750 def store(name, num_srcs, indices=[], flags=[]):
 751     intrinsic("store_" + name, [0] + ([1] * (num_srcs - 1)), indices=indices, flags=flags)
 752
 753 # src[] = { value, offset }.
 754 store("output", 2, [BASE, WRMASK, COMPONENT, TYPE])
 755 # src[] = { value, vertex, offset }.
 756 store("per_vertex_output", 3, [BASE, WRMASK, COMPONENT])
 757 # src[] = { value, block_index, offset }
 758 store("ssbo", 3, [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
 759 # src[] = { value, offset }.
 760 store("shared", 2, [BASE, WRMASK, ALIGN_MUL, ALIGN_OFFSET])
 761 # src[] = { value, address }.
 762 store("global", 2, [WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
 763 # src[] = { value, offset }.
 764 store("scratch", 2, [ALIGN_MUL, ALIGN_OFFSET, WRMASK])
 765
 766 # IR3-specific version of most SSBO intrinsics. The only different
 767 # compare to the originals is that they add an extra source to hold
 768 # the dword-offset, which is needed by the backend code apart from
 769 # the byte-offset already provided by NIR in one of the sources.
 770 #
 771 # NIR lowering pass 'ir3_nir_lower_io_offset' will replace the
 772 # original SSBO intrinsics by these, placing the computed
 773 # dword-offset always in the last source.
 774 #
 775 # The float versions are not handled because those are not supported
 776 # by the backend.
 777 intrinsic("store_ssbo_ir3",  src_comp=[0, 1, 1, 1],
 778           indices=[WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
 779 intrinsic("load_ssbo_ir3",  src_comp=[1, 1, 1], dest_comp=0,
 780           indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
 781 intrinsic("ssbo_atomic_add_ir3",        src_comp=[1, 1, 1, 1],    dest_comp=1)
 782 intrinsic("ssbo_atomic_imin_ir3",       src_comp=[1, 1, 1, 1],    dest_comp=1)
 783 intrinsic("ssbo_atomic_umin_ir3",       src_comp=[1, 1, 1, 1],    dest_comp=1)
 784 intrinsic("ssbo_atomic_imax_ir3",       src_comp=[1, 1, 1, 1],    dest_comp=1)
 785 intrinsic("ssbo_atomic_umax_ir3",       src_comp=[1, 1, 1, 1],    dest_comp=1)
 786 intrinsic("ssbo_atomic_and_ir3",        src_comp=[1, 1, 1, 1],    dest_comp=1)
 787 intrinsic("ssbo_atomic_or_ir3",         src_comp=[1, 1, 1, 1],    dest_comp=1)
 788 intrinsic("ssbo_atomic_xor_ir3",        src_comp=[1, 1, 1, 1],    dest_comp=1)
 789 intrinsic("ssbo_atomic_exchange_ir3",   src_comp=[1, 1, 1, 1],    dest_comp=1)
 790 intrinsic("ssbo_atomic_comp_swap_ir3",  src_comp=[1, 1, 1, 1, 1], dest_comp=1)
 791
 792 # System values for freedreno geometry shaders.
 793 system_value("vs_primitive_stride_ir3", 1)
 794 system_value("vs_vertex_stride_ir3", 1)
 795 system_value("gs_header_ir3", 1)
 796 system_value("primitive_location_ir3", 1, indices=[DRIVER_LOCATION])
 797
 798 # System values for freedreno tessellation shaders.
 799 system_value("hs_patch_stride_ir3", 1)
 800 system_value("tess_factor_base_ir3", 2)
 801 system_value("tess_param_base_ir3", 2)
 802 system_value("tcs_header_ir3", 1)
 803
 804 # IR3-specific intrinsics for tessellation control shaders.  cond_end_ir3 end
 805 # the shader when src0 is false and is used to narrow down the TCS shader to
 806 # just thread 0 before writing out tessellation levels.
 807 intrinsic("cond_end_ir3", src_comp=[1])
 808 # end_patch_ir3 is used just before thread 0 exist the TCS and presumably
 809 # signals the TE that the patch is complete and can be tessellated.
 810 intrinsic("end_patch_ir3")
 811
 812 # IR3-specific load/store intrinsics. These access a buffer used to pass data
 813 # between geometry stages - perhaps it's explicit access to the vertex cache.
 814
 815 # src[] = { value, offset }.
 816 store("shared_ir3", 2, [BASE, WRMASK, ALIGN_MUL, ALIGN_OFFSET])
 817 # src[] = { offset }.
 818 load("shared_ir3", 1, [BASE, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE])
 819
 820 # IR3-specific load/store global intrinsics. They take a 64-bit base address
 821 # and a 32-bit offset.  The hardware will add the base and the offset, which
 822 # saves us from doing 64-bit math on the base address.
 823
 824 # src[] = { value, address(vec2 of hi+lo uint32_t), offset }.
 825 # const_index[] = { write_mask, align_mul, align_offset }
 826 intrinsic("store_global_ir3", [0, 2, 1], indices=[WRMASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET])
 827 # src[] = { address(vec2 of hi+lo uint32_t), offset }.
 828 # const_index[] = { access, align_mul, align_offset }
 829 intrinsic("load_global_ir3", [2, 1], dest_comp=0, indices=[ACCESS, ALIGN_MUL, ALIGN_OFFSET], flags=[CAN_ELIMINATE])
 830
 831 # Intrinsics used by the Midgard/Bifrost blend pipeline. These are defined
 832 # within a blend shader to read/write the raw value from the tile buffer,
 833 # without applying any format conversion in the process. If the shader needs
 834 # usable pixel values, it must apply format conversions itself.
 835 #
 836 # These definitions are generic, but they are explicitly vendored to prevent
 837 # other drivers from using them, as their semantics is defined in terms of the
 838 # Midgard/Bifrost hardware tile buffer and may not line up with anything sane.
 839 # One notable divergence is sRGB, which is asymmetric: raw_input_pan requires
 840 # an sRGB->linear conversion, but linear values should be written to
 841 # raw_output_pan and the hardware handles linear->sRGB.
 842 #
 843 # We also have format-specific Midgard intrinsics. There are rather
 844 # here-be-dragons. load_output_u8_as_fp16_pan does the equivalent of
 845 # load_raw_out_pan on an RGBA8 UNORM framebuffer followed by u2u16 -> fp16 ->
 846 # division by 255.
 847
 848 # src[] = { value }
 849 store("raw_output_pan", 1, [])
 850 load("raw_output_pan", 0, [], [CAN_ELIMINATE, CAN_REORDER])
 851 load("output_u8_as_fp16_pan", 0, [], [CAN_ELIMINATE, CAN_REORDER])
 852
 853 # Loads the sampler paramaters <min_lod, max_lod, lod_bias>
 854 # src[] = { sampler_index }
 855 load("sampler_lod_parameters_pan", 1, [CAN_ELIMINATE, CAN_REORDER])
 856
 857 # V3D-specific instrinc for tile buffer color reads.
 858 #
 859 # The hardware requires that we read the samples and components of a pixel
 860 # in order, so we cannot eliminate or remove any loads in a sequence.
 861 #
 862 # src[] = { render_target }
 863 # BASE = sample index
 864 load("tlb_color_v3d", 1, [BASE, COMPONENT], [])
 865
 866 # V3D-specific instrinc for per-sample tile buffer color writes.
 867 #
 868 # The driver backend needs to identify per-sample color writes and emit
 869 # specific code for them.
 870 #
 871 # src[] = { value, render_target }
 872 # BASE = sample index
 873 store("tlb_sample_color_v3d", 2, [BASE, COMPONENT, TYPE], [])
 874
 875 # V3D-specific intrinsic to load the number of layers attached to
 876 # the target framebuffer
 877 intrinsic("load_fb_layers_v3d", dest_comp=1, flags=[CAN_ELIMINATE, CAN_REORDER])