nir: Drop imov/fmov in favor of one mov instruction
[mesa.git] / src / compiler / nir / nir_opt_copy_propagate.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include <main/imports.h>
30
31 /**
32 * SSA-based copy propagation
33 */
34
35 static bool is_move(nir_alu_instr *instr)
36 {
37 assert(instr->src[0].src.is_ssa);
38
39 if (instr->op != nir_op_mov)
40 return false;
41
42 if (instr->dest.saturate)
43 return false;
44
45 /* we handle modifiers in a separate pass */
46
47 if (instr->src[0].abs || instr->src[0].negate)
48 return false;
49
50 return true;
51
52 }
53
54 static bool is_vec(nir_alu_instr *instr)
55 {
56 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
57 assert(instr->src[i].src.is_ssa);
58
59 /* we handle modifiers in a separate pass */
60 if (instr->src[i].abs || instr->src[i].negate)
61 return false;
62 }
63
64 return instr->op == nir_op_vec2 ||
65 instr->op == nir_op_vec3 ||
66 instr->op == nir_op_vec4;
67 }
68
69 static bool
70 is_swizzleless_move(nir_alu_instr *instr)
71 {
72 if (is_move(instr)) {
73 for (unsigned i = 0; i < 4; i++) {
74 if (!((instr->dest.write_mask >> i) & 1))
75 break;
76 if (instr->src[0].swizzle[i] != i)
77 return false;
78 }
79 return true;
80 } else if (is_vec(instr)) {
81 nir_ssa_def *def = NULL;
82 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
83 if (instr->src[i].swizzle[0] != i)
84 return false;
85
86 if (def == NULL) {
87 def = instr->src[i].src.ssa;
88 } else if (instr->src[i].src.ssa != def) {
89 return false;
90 }
91 }
92 return true;
93 } else {
94 return false;
95 }
96 }
97
98 static bool
99 copy_prop_src(nir_src *src, nir_instr *parent_instr, nir_if *parent_if,
100 unsigned num_components)
101 {
102 assert(src->is_ssa);
103
104 nir_instr *src_instr = src->ssa->parent_instr;
105 nir_ssa_def *copy_def;
106 if (src_instr->type == nir_instr_type_alu) {
107 nir_alu_instr *alu_instr = nir_instr_as_alu(src_instr);
108 if (!is_swizzleless_move(alu_instr))
109 return false;
110
111 if (alu_instr->src[0].src.ssa->num_components != num_components)
112 return false;
113
114 copy_def= alu_instr->src[0].src.ssa;
115 } else {
116 return false;
117 }
118
119 if (parent_instr) {
120 nir_instr_rewrite_src(parent_instr, src, nir_src_for_ssa(copy_def));
121 } else {
122 assert(src == &parent_if->condition);
123 nir_if_rewrite_condition(parent_if, nir_src_for_ssa(copy_def));
124 }
125
126 return true;
127 }
128
129 static bool
130 copy_prop_alu_src(nir_alu_instr *parent_alu_instr, unsigned index)
131 {
132 nir_alu_src *src = &parent_alu_instr->src[index];
133 assert(src->src.is_ssa);
134
135 nir_instr *src_instr = src->src.ssa->parent_instr;
136 if (src_instr->type != nir_instr_type_alu)
137 return false;
138
139 nir_alu_instr *alu_instr = nir_instr_as_alu(src_instr);
140 if (!is_move(alu_instr) && !is_vec(alu_instr))
141 return false;
142
143 nir_ssa_def *def;
144 unsigned new_swizzle[NIR_MAX_VEC_COMPONENTS] = {0, 0, 0, 0};
145
146 if (alu_instr->op == nir_op_mov) {
147 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
148 new_swizzle[i] = alu_instr->src[0].swizzle[src->swizzle[i]];
149 def = alu_instr->src[0].src.ssa;
150 } else {
151 def = NULL;
152
153 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
154 if (!nir_alu_instr_channel_used(parent_alu_instr, index, i))
155 continue;
156
157 nir_ssa_def *new_def = alu_instr->src[src->swizzle[i]].src.ssa;
158 if (def == NULL)
159 def = new_def;
160 else {
161 if (def != new_def)
162 return false;
163 }
164 new_swizzle[i] = alu_instr->src[src->swizzle[i]].swizzle[0];
165 }
166 }
167
168 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
169 src->swizzle[i] = new_swizzle[i];
170
171 nir_instr_rewrite_src(&parent_alu_instr->instr, &src->src,
172 nir_src_for_ssa(def));
173
174 return true;
175 }
176
177 static bool
178 copy_prop_instr(nir_instr *instr)
179 {
180 bool progress = false;
181 switch (instr->type) {
182 case nir_instr_type_alu: {
183 nir_alu_instr *alu_instr = nir_instr_as_alu(instr);
184
185 for (unsigned i = 0; i < nir_op_infos[alu_instr->op].num_inputs; i++)
186 while (copy_prop_alu_src(alu_instr, i))
187 progress = true;
188
189 return progress;
190 }
191
192 case nir_instr_type_deref: {
193 nir_deref_instr *deref = nir_instr_as_deref(instr);
194
195 if (deref->deref_type != nir_deref_type_var) {
196 assert(deref->dest.is_ssa);
197 const unsigned comps = deref->dest.ssa.num_components;
198 while (copy_prop_src(&deref->parent, instr, NULL, comps))
199 progress = true;
200 }
201
202 if (deref->deref_type == nir_deref_type_array ||
203 deref->deref_type == nir_deref_type_ptr_as_array) {
204 while (copy_prop_src(&deref->arr.index, instr, NULL, 1))
205 progress = true;
206 }
207
208 return progress;
209 }
210
211 case nir_instr_type_tex: {
212 nir_tex_instr *tex = nir_instr_as_tex(instr);
213 for (unsigned i = 0; i < tex->num_srcs; i++) {
214 unsigned num_components = nir_tex_instr_src_size(tex, i);
215 while (copy_prop_src(&tex->src[i].src, instr, NULL, num_components))
216 progress = true;
217 }
218
219 return progress;
220 }
221
222 case nir_instr_type_intrinsic: {
223 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
224 for (unsigned i = 0;
225 i < nir_intrinsic_infos[intrin->intrinsic].num_srcs; i++) {
226 unsigned num_components = nir_intrinsic_src_components(intrin, i);
227
228 while (copy_prop_src(&intrin->src[i], instr, NULL, num_components))
229 progress = true;
230 }
231
232 return progress;
233 }
234
235 case nir_instr_type_phi: {
236 nir_phi_instr *phi = nir_instr_as_phi(instr);
237 assert(phi->dest.is_ssa);
238 unsigned num_components = phi->dest.ssa.num_components;
239 nir_foreach_phi_src(src, phi) {
240 while (copy_prop_src(&src->src, instr, NULL, num_components))
241 progress = true;
242 }
243
244 return progress;
245 }
246
247 default:
248 return false;
249 }
250 }
251
252 static bool
253 copy_prop_if(nir_if *if_stmt)
254 {
255 return copy_prop_src(&if_stmt->condition, NULL, if_stmt, 1);
256 }
257
258 static bool
259 nir_copy_prop_impl(nir_function_impl *impl)
260 {
261 bool progress = false;
262
263 nir_foreach_block(block, impl) {
264 nir_foreach_instr(instr, block) {
265 if (copy_prop_instr(instr))
266 progress = true;
267 }
268
269 nir_if *if_stmt = nir_block_get_following_if(block);
270 if (if_stmt && copy_prop_if(if_stmt))
271 progress = true;
272 }
273
274 if (progress) {
275 nir_metadata_preserve(impl, nir_metadata_block_index |
276 nir_metadata_dominance);
277 } else {
278 #ifndef NDEBUG
279 impl->valid_metadata &= ~nir_metadata_not_properly_reset;
280 #endif
281 }
282
283 return progress;
284 }
285
286 bool
287 nir_copy_prop(nir_shader *shader)
288 {
289 bool progress = false;
290
291 nir_foreach_function(function, shader) {
292 if (function->impl && nir_copy_prop_impl(function->impl))
293 progress = true;
294 }
295
296 return progress;
297 }