2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include "nir/nir_builder.h"
26 #include "nir_constant_expressions.h"
27 #include "nir_control_flow.h"
28 #include "nir_loop_analyze.h"
30 static nir_ssa_def
*clone_alu_and_replace_src_defs(nir_builder
*b
,
31 const nir_alu_instr
*alu
,
32 nir_ssa_def
**src_defs
);
35 * Gets the single block that jumps back to the loop header. Already assumes
36 * there is exactly one such block.
39 find_continue_block(nir_loop
*loop
)
41 nir_block
*header_block
= nir_loop_first_block(loop
);
42 nir_block
*prev_block
=
43 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
45 assert(header_block
->predecessors
->entries
== 2);
47 set_foreach(header_block
->predecessors
, pred_entry
) {
48 if (pred_entry
->key
!= prev_block
)
49 return (nir_block
*)pred_entry
->key
;
52 unreachable("Continue block not found!");
56 * Does a phi have one constant value from outside a loop and one from inside?
59 phi_has_constant_from_outside_and_one_from_inside_loop(nir_phi_instr
*phi
,
60 const nir_block
*entry_block
,
62 uint32_t *continue_val
)
64 /* We already know we have exactly one continue */
65 assert(exec_list_length(&phi
->srcs
) == 2);
70 nir_foreach_phi_src(src
, phi
) {
71 assert(src
->src
.is_ssa
);
72 nir_const_value
*const_src
= nir_src_as_const_value(src
->src
);
76 if (src
->pred
!= entry_block
) {
77 *continue_val
= const_src
[0].u32
;
79 *entry_val
= const_src
[0].u32
;
87 * This optimization detects if statements at the tops of loops where the
88 * condition is a phi node of two constants and moves half of the if to above
89 * the loop and the other half of the if to the end of the loop. A simple for
90 * loop "for (int i = 0; i < 4; i++)", when run through the SPIR-V front-end,
91 * ends up looking something like this:
93 * vec1 32 ssa_0 = load_const (0x00000000)
94 * vec1 32 ssa_1 = load_const (0xffffffff)
97 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
98 * vec1 32 ssa_3 = phi block_0: ssa_0, block_7: ssa_1
101 * vec1 32 ssa_4 = load_const (0x00000001)
102 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
107 * vec1 32 ssa_6 = load_const (0x00000004)
108 * vec1 32 ssa_7 = ilt ssa_5, ssa_6
118 * This turns it into something like this:
120 * // Stuff from block 1
121 * // Stuff from block 3
124 * vec1 32 ssa_2 = phi block_0: ssa_0, block_7: ssa_5
125 * vec1 32 ssa_6 = load_const (0x00000004)
126 * vec1 32 ssa_7 = ilt ssa_2, ssa_6
134 * // Stuff from block 1
135 * // Stuff from block 2
136 * vec1 32 ssa_4 = load_const (0x00000001)
137 * vec1 32 ssa_5 = iadd ssa_2, ssa_4
141 opt_peel_loop_initial_if(nir_loop
*loop
)
143 nir_block
*header_block
= nir_loop_first_block(loop
);
144 nir_block
*const prev_block
=
145 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
147 /* It would be insane if this were not true */
148 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
150 /* The loop must have exactly one continue block which could be a block
151 * ending in a continue instruction or the "natural" continue from the
152 * last block in the loop back to the top.
154 if (header_block
->predecessors
->entries
!= 2)
157 nir_cf_node
*if_node
= nir_cf_node_next(&header_block
->cf_node
);
158 if (!if_node
|| if_node
->type
!= nir_cf_node_if
)
161 nir_if
*nif
= nir_cf_node_as_if(if_node
);
162 assert(nif
->condition
.is_ssa
);
164 nir_ssa_def
*cond
= nif
->condition
.ssa
;
165 if (cond
->parent_instr
->type
!= nir_instr_type_phi
)
168 nir_phi_instr
*cond_phi
= nir_instr_as_phi(cond
->parent_instr
);
169 if (cond
->parent_instr
->block
!= header_block
)
172 uint32_t entry_val
= 0, continue_val
= 0;
173 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
179 /* If they both execute or both don't execute, this is a job for
180 * nir_dead_cf, not this pass.
182 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
185 struct exec_list
*continue_list
, *entry_list
;
187 continue_list
= &nif
->then_list
;
188 entry_list
= &nif
->else_list
;
190 continue_list
= &nif
->else_list
;
191 entry_list
= &nif
->then_list
;
194 /* We want to be moving the contents of entry_list to above the loop so it
195 * can't contain any break or continue instructions.
197 foreach_list_typed(nir_cf_node
, cf_node
, node
, entry_list
) {
198 nir_foreach_block_in_cf_node(block
, cf_node
) {
199 nir_instr
*last_instr
= nir_block_last_instr(block
);
200 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
)
205 /* We're about to re-arrange a bunch of blocks so make sure that we don't
206 * have deref uses which cross block boundaries. We don't want a deref
207 * accidentally ending up in a phi.
209 nir_rematerialize_derefs_in_use_blocks_impl(
210 nir_cf_node_get_function(&loop
->cf_node
));
212 /* Before we do anything, convert the loop to LCSSA. We're about to
213 * replace a bunch of SSA defs with registers and this will prevent any of
214 * it from leaking outside the loop.
216 nir_convert_loop_to_lcssa(loop
);
218 nir_block
*after_if_block
=
219 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
221 /* Get rid of phis in the header block since we will be duplicating it */
222 nir_lower_phis_to_regs_block(header_block
);
223 /* Get rid of phis after the if since dominance will change */
224 nir_lower_phis_to_regs_block(after_if_block
);
226 /* Get rid of SSA defs in the pieces we're about to move around */
227 nir_lower_ssa_defs_to_regs_block(header_block
);
228 nir_foreach_block_in_cf_node(block
, &nif
->cf_node
)
229 nir_lower_ssa_defs_to_regs_block(block
);
231 nir_cf_list header
, tmp
;
232 nir_cf_extract(&header
, nir_before_block(header_block
),
233 nir_after_block(header_block
));
235 nir_cf_list_clone(&tmp
, &header
, &loop
->cf_node
, NULL
);
236 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
237 nir_cf_extract(&tmp
, nir_before_cf_list(entry_list
),
238 nir_after_cf_list(entry_list
));
239 nir_cf_reinsert(&tmp
, nir_before_cf_node(&loop
->cf_node
));
241 nir_cf_reinsert(&header
,
242 nir_after_block_before_jump(find_continue_block(loop
)));
244 bool continue_list_jumps
=
245 nir_block_ends_in_jump(exec_node_data(nir_block
,
246 exec_list_get_tail(continue_list
),
249 nir_cf_extract(&tmp
, nir_before_cf_list(continue_list
),
250 nir_after_cf_list(continue_list
));
252 /* Get continue block again as the previous reinsert might have removed the
253 * block. Also, if both the continue list and the continue block ends in
254 * jump instructions, removes the jump from the latter, as it will not be
255 * executed if we insert the continue list before it. */
257 nir_block
*continue_block
= find_continue_block(loop
);
259 if (continue_list_jumps
) {
260 nir_instr
*last_instr
= nir_block_last_instr(continue_block
);
261 if (last_instr
&& last_instr
->type
== nir_instr_type_jump
)
262 nir_instr_remove(last_instr
);
265 nir_cf_reinsert(&tmp
,
266 nir_after_block_before_jump(continue_block
));
268 nir_cf_node_remove(&nif
->cf_node
);
274 alu_instr_is_comparison(const nir_alu_instr
*alu
)
289 return nir_alu_instr_is_comparison(alu
);
294 alu_instr_is_type_conversion(const nir_alu_instr
*alu
)
296 return nir_op_infos
[alu
->op
].num_inputs
== 1 &&
297 nir_alu_type_get_base_type(nir_op_infos
[alu
->op
].output_type
) !=
298 nir_alu_type_get_base_type(nir_op_infos
[alu
->op
].input_types
[0]);
302 * Splits ALU instructions that have a source that is a phi node
304 * ALU instructions in the header block of a loop that meet the following
305 * criteria can be split.
307 * - The loop has no continue instructions other than the "natural" continue
308 * at the bottom of the loop.
310 * - At least one source of the instruction is a phi node from the header block.
312 * - The phi node selects a constant or undef from the block before the loop.
314 * - Any non-phi sources of the ALU instruction come from a block that
315 * dominates the block before the loop. The most common failure mode for
316 * this check is sources that are generated in the loop header block.
318 * The split process splits the original ALU instruction into two, one at the
319 * bottom of the loop and one at the block before the loop. The instruction
320 * before the loop computes the value on the first iteration, and the
321 * instruction at the bottom computes the value on the second, third, and so
322 * on. A new phi node is added to the header block that selects either the
323 * instruction before the loop or the one at the end, and uses of the original
324 * instruction are replaced by this phi.
326 * The splitting transforms a loop like:
328 * vec1 32 ssa_8 = load_const (0x00000001)
329 * vec1 32 ssa_10 = load_const (0x00000000)
333 * // preds: block_0 block_4
334 * vec1 32 ssa_11 = phi block_0: ssa_10, block_4: ssa_15
335 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
336 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
337 * vec1 32 ssa_14 = iadd ssa_11, ssa_8
338 * vec1 32 ssa_15 = b32csel ssa_13, ssa_14, ssa_12
345 * vec1 32 ssa_8 = load_const (0x00000001)
346 * vec1 32 ssa_10 = load_const (0x00000000)
347 * vec1 32 ssa_22 = iadd ssa_10, ssa_8
351 * // preds: block_0 block_4
352 * vec1 32 ssa_11 = phi block_0: ssa_10, block_4: ssa_15
353 * vec1 32 ssa_12 = phi block_0: ssa_1, block_4: ssa_15
354 * vec1 32 ssa_13 = phi block_0: ssa_10, block_4: ssa_16
355 * vec1 32 ssa_21 = phi block_0: ssa_22, block_4: ssa_20
356 * vec1 32 ssa_15 = b32csel ssa_13, ssa_21, ssa_12
358 * vec1 32 ssa_20 = iadd ssa_15, ssa_8
363 opt_split_alu_of_phi(nir_builder
*b
, nir_loop
*loop
)
365 bool progress
= false;
366 nir_block
*header_block
= nir_loop_first_block(loop
);
367 nir_block
*const prev_block
=
368 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
370 /* It would be insane if this were not true */
371 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
373 /* The loop must have exactly one continue block which could be a block
374 * ending in a continue instruction or the "natural" continue from the
375 * last block in the loop back to the top.
377 if (header_block
->predecessors
->entries
!= 2)
380 nir_foreach_instr_safe(instr
, header_block
) {
381 if (instr
->type
!= nir_instr_type_alu
)
384 nir_alu_instr
*const alu
= nir_instr_as_alu(instr
);
386 /* nir_op_vec{2,3,4} and nir_op_mov are excluded because they can easily
387 * lead to infinite optimization loops. Splitting comparisons can lead
388 * to loop unrolling not recognizing loop termintators, and type
389 * conversions also lead to regressions.
391 if (nir_op_is_vec(alu
->op
) ||
392 alu_instr_is_comparison(alu
) ||
393 alu_instr_is_type_conversion(alu
))
396 bool has_phi_src_from_prev_block
= false;
397 bool all_non_phi_exist_in_prev_block
= true;
398 bool is_prev_result_undef
= true;
399 bool is_prev_result_const
= true;
400 nir_ssa_def
*prev_srcs
[8]; // FINISHME: Array size?
401 nir_ssa_def
*continue_srcs
[8]; // FINISHME: Array size?
403 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
404 nir_instr
*const src_instr
= alu
->src
[i
].src
.ssa
->parent_instr
;
406 /* If the source is a phi in the loop header block, then the
407 * prev_srcs and continue_srcs will come from the different sources
410 if (src_instr
->type
== nir_instr_type_phi
&&
411 src_instr
->block
== header_block
) {
412 nir_phi_instr
*const phi
= nir_instr_as_phi(src_instr
);
414 /* Only strictly need to NULL out the pointers when the assertions
415 * (below) are compiled in. Debugging a NULL pointer deref in the
416 * wild is easier than debugging a random pointer deref, so set
417 * NULL unconditionally just to be safe.
420 continue_srcs
[i
] = NULL
;
422 nir_foreach_phi_src(src_of_phi
, phi
) {
423 if (src_of_phi
->pred
== prev_block
) {
424 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
425 nir_instr_type_ssa_undef
) {
426 is_prev_result_undef
= false;
429 if (src_of_phi
->src
.ssa
->parent_instr
->type
!=
430 nir_instr_type_load_const
) {
431 is_prev_result_const
= false;
434 prev_srcs
[i
] = src_of_phi
->src
.ssa
;
435 has_phi_src_from_prev_block
= true;
437 continue_srcs
[i
] = src_of_phi
->src
.ssa
;
440 assert(prev_srcs
[i
] != NULL
);
441 assert(continue_srcs
[i
] != NULL
);
443 /* If the source is not a phi (or a phi in a block other than the
444 * loop header), then the value must exist in prev_block.
446 if (!nir_block_dominates(src_instr
->block
, prev_block
)) {
447 all_non_phi_exist_in_prev_block
= false;
451 prev_srcs
[i
] = alu
->src
[i
].src
.ssa
;
452 continue_srcs
[i
] = alu
->src
[i
].src
.ssa
;
456 if (has_phi_src_from_prev_block
&& all_non_phi_exist_in_prev_block
&&
457 (is_prev_result_undef
|| is_prev_result_const
)) {
458 nir_block
*const continue_block
= find_continue_block(loop
);
460 b
->cursor
= nir_after_block(prev_block
);
461 nir_ssa_def
*prev_value
= clone_alu_and_replace_src_defs(b
, alu
, prev_srcs
);
463 /* Make a copy of the original ALU instruction. Replace the sources
464 * of the new instruction that read a phi with an undef source from
465 * prev_block with the non-undef source of that phi.
467 * Insert the new instruction at the end of the continue block.
469 b
->cursor
= nir_after_block_before_jump(continue_block
);
471 nir_ssa_def
*const alu_copy
=
472 clone_alu_and_replace_src_defs(b
, alu
, continue_srcs
);
474 /* Make a new phi node that selects a value from prev_block and the
475 * result of the new instruction from continue_block.
477 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
478 nir_phi_src
*phi_src
;
480 phi_src
= ralloc(phi
, nir_phi_src
);
481 phi_src
->pred
= prev_block
;
482 phi_src
->src
= nir_src_for_ssa(prev_value
);
483 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
485 phi_src
= ralloc(phi
, nir_phi_src
);
486 phi_src
->pred
= continue_block
;
487 phi_src
->src
= nir_src_for_ssa(alu_copy
);
488 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
490 nir_ssa_dest_init(&phi
->instr
, &phi
->dest
,
491 alu_copy
->num_components
, alu_copy
->bit_size
, NULL
);
493 b
->cursor
= nir_after_phis(header_block
);
494 nir_builder_instr_insert(b
, &phi
->instr
);
496 /* Modify all readers of the original ALU instruction to read the
499 nir_foreach_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
500 nir_instr_rewrite_src(use_src
->parent_instr
,
502 nir_src_for_ssa(&phi
->dest
.ssa
));
505 nir_foreach_if_use_safe(use_src
, &alu
->dest
.dest
.ssa
) {
506 nir_if_rewrite_condition(use_src
->parent_if
,
507 nir_src_for_ssa(&phi
->dest
.ssa
));
510 /* Since the original ALU instruction no longer has any readers, just
513 nir_instr_remove_v(&alu
->instr
);
524 * Get the SSA value from a phi node that corresponds to a specific block
527 ssa_for_phi_from_block(nir_phi_instr
*phi
, nir_block
*block
)
529 nir_foreach_phi_src(src
, phi
) {
530 if (src
->pred
== block
)
534 assert(!"Block is not a predecessor of phi.");
539 * Simplify a bcsel whose sources are all phi nodes from the loop header block
541 * bcsel instructions in a loop that meet the following criteria can be
542 * converted to phi nodes:
544 * - The loop has no continue instructions other than the "natural" continue
545 * at the bottom of the loop.
547 * - All of the sources of the bcsel are phi nodes in the header block of the
550 * - The phi node representing the condition of the bcsel instruction chooses
551 * only constant values.
553 * The contant value from the condition will select one of the other sources
554 * when entered from outside the loop and the remaining source when entered
555 * from the continue block. Since each of these sources is also a phi node in
556 * the header block, the value of the phi node can be "evaluated." These
557 * evaluated phi nodes provide the sources for a new phi node. All users of
558 * the bcsel result are updated to use the phi node result.
560 * The replacement transforms loops like:
562 * vec1 32 ssa_7 = undefined
563 * vec1 32 ssa_8 = load_const (0x00000001)
564 * vec1 32 ssa_9 = load_const (0x000000c8)
565 * vec1 32 ssa_10 = load_const (0x00000000)
569 * // preds: block_0 block_4
570 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
571 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
572 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
573 * vec1 32 ssa_14 = b32csel ssa_12, ssa_13, ssa_11
574 * vec1 32 ssa_16 = ige32 ssa_14, ssa_9
576 * vec1 32 ssa_15 = load_const (0xffffffff)
578 * vec1 32 ssa_25 = iadd ssa_14, ssa_8
584 * vec1 32 ssa_7 = undefined
585 * vec1 32 ssa_8 = load_const (0x00000001)
586 * vec1 32 ssa_9 = load_const (0x000000c8)
587 * vec1 32 ssa_10 = load_const (0x00000000)
591 * // preds: block_0 block_4
592 * vec1 32 ssa_11 = phi block_0: ssa_1, block_4: ssa_14
593 * vec1 32 ssa_12 = phi block_0: ssa_10, block_4: ssa_15
594 * vec1 32 ssa_13 = phi block_0: ssa_7, block_4: ssa_25
595 * vec1 32 sss_26 = phi block_0: ssa_1, block_4: ssa_25
596 * vec1 32 ssa_16 = ige32 ssa_26, ssa_9
598 * vec1 32 ssa_15 = load_const (0xffffffff)
600 * vec1 32 ssa_25 = iadd ssa_26, ssa_8
605 * It may be possible modify this function to not require a phi node as the
606 * source of the bcsel that is selected when entering from outside the loop.
607 * The only restriction is that the source must be geneated outside the loop
608 * (since it will become the source of a phi node in the header block of the
612 opt_simplify_bcsel_of_phi(nir_builder
*b
, nir_loop
*loop
)
614 bool progress
= false;
615 nir_block
*header_block
= nir_loop_first_block(loop
);
616 nir_block
*const prev_block
=
617 nir_cf_node_as_block(nir_cf_node_prev(&loop
->cf_node
));
619 /* It would be insane if this were not true */
620 assert(_mesa_set_search(header_block
->predecessors
, prev_block
));
622 /* The loop must have exactly one continue block which could be a block
623 * ending in a continue instruction or the "natural" continue from the
624 * last block in the loop back to the top.
626 if (header_block
->predecessors
->entries
!= 2)
629 /* We can move any bcsel that can guaranteed to execut on every iteration
630 * of a loop. For now this is accomplished by only taking bcsels from the
631 * header_block. In the future, this could be expanced to include any
632 * bcsel that must come before any break.
634 * For more details, see
635 * https://gitlab.freedesktop.org/mesa/mesa/merge_requests/170#note_110305
637 nir_foreach_instr_safe(instr
, header_block
) {
638 if (instr
->type
!= nir_instr_type_alu
)
641 nir_alu_instr
*const bcsel
= nir_instr_as_alu(instr
);
642 if (bcsel
->op
!= nir_op_bcsel
&&
643 bcsel
->op
!= nir_op_b32csel
&&
644 bcsel
->op
!= nir_op_fcsel
)
648 for (unsigned i
= 0; i
< 3; i
++) {
649 /* FINISHME: The abs and negate cases could be handled by adding
650 * move instructions at the bottom of the continue block and more
651 * phi nodes in the header_block.
653 if (!bcsel
->src
[i
].src
.is_ssa
||
654 bcsel
->src
[i
].src
.ssa
->parent_instr
->type
!= nir_instr_type_phi
||
655 bcsel
->src
[i
].src
.ssa
->parent_instr
->block
!= header_block
||
656 bcsel
->src
[i
].negate
|| bcsel
->src
[i
].abs
) {
665 nir_phi_instr
*const cond_phi
=
666 nir_instr_as_phi(bcsel
->src
[0].src
.ssa
->parent_instr
);
668 uint32_t entry_val
= 0, continue_val
= 0;
669 if (!phi_has_constant_from_outside_and_one_from_inside_loop(cond_phi
,
675 /* If they both execute or both don't execute, this is a job for
676 * nir_dead_cf, not this pass.
678 if ((entry_val
&& continue_val
) || (!entry_val
&& !continue_val
))
681 const unsigned entry_src
= entry_val
? 1 : 2;
682 const unsigned continue_src
= entry_val
? 2 : 1;
684 /* Create a new phi node that selects the value for prev_block from
685 * the bcsel source that is selected by entry_val and the value for
686 * continue_block from the other bcsel source. Both sources have
687 * already been verified to be phi nodes.
689 nir_block
*const continue_block
= find_continue_block(loop
);
690 nir_phi_instr
*const phi
= nir_phi_instr_create(b
->shader
);
691 nir_phi_src
*phi_src
;
693 phi_src
= ralloc(phi
, nir_phi_src
);
694 phi_src
->pred
= prev_block
;
696 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[entry_src
].src
.ssa
->parent_instr
),
698 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
700 phi_src
= ralloc(phi
, nir_phi_src
);
701 phi_src
->pred
= continue_block
;
703 nir_src_for_ssa(ssa_for_phi_from_block(nir_instr_as_phi(bcsel
->src
[continue_src
].src
.ssa
->parent_instr
),
705 exec_list_push_tail(&phi
->srcs
, &phi_src
->node
);
707 nir_ssa_dest_init(&phi
->instr
,
709 nir_dest_num_components(bcsel
->dest
.dest
),
710 nir_dest_bit_size(bcsel
->dest
.dest
),
713 b
->cursor
= nir_after_phis(header_block
);
714 nir_builder_instr_insert(b
, &phi
->instr
);
716 /* Modify all readers of the bcsel instruction to read the result of
719 nir_foreach_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
720 nir_instr_rewrite_src(use_src
->parent_instr
,
722 nir_src_for_ssa(&phi
->dest
.ssa
));
725 nir_foreach_if_use_safe(use_src
, &bcsel
->dest
.dest
.ssa
) {
726 nir_if_rewrite_condition(use_src
->parent_if
,
727 nir_src_for_ssa(&phi
->dest
.ssa
));
730 /* Since the original bcsel instruction no longer has any readers,
733 nir_instr_remove_v(&bcsel
->instr
);
743 is_block_empty(nir_block
*block
)
745 return nir_cf_node_is_last(&block
->cf_node
) &&
746 exec_list_is_empty(&block
->instr_list
);
750 nir_block_ends_in_continue(nir_block
*block
)
752 if (exec_list_is_empty(&block
->instr_list
))
755 nir_instr
*instr
= nir_block_last_instr(block
);
756 return instr
->type
== nir_instr_type_jump
&&
757 nir_instr_as_jump(instr
)->type
== nir_jump_continue
;
761 * This optimization turns:
785 * The continue should then be removed by nir_opt_trivial_continues() and the
786 * loop can potentially be unrolled.
788 * Note: Unless the function param aggressive_last_continue==true do_work_2()
789 * is only ever blocks and nested loops. We avoid nesting other if-statments
790 * in the branch as this can result in increased register pressure, and in
791 * the i965 driver it causes a large amount of spilling in shader-db.
792 * For RADV however nesting these if-statements allows further continues to be
793 * remove and provides a significant FPS boost in Doom, which is why we have
794 * opted for this special bool to enable more aggresive optimisations.
795 * TODO: The GCM pass solves most of the spilling regressions in i965, if it
796 * is ever enabled we should consider removing the aggressive_last_continue
800 opt_if_loop_last_continue(nir_loop
*loop
, bool aggressive_last_continue
)
803 bool then_ends_in_continue
= false;
804 bool else_ends_in_continue
= false;
806 /* Scan the control flow of the loop from the last to the first node
807 * looking for an if-statement we can optimise.
809 nir_block
*last_block
= nir_loop_last_block(loop
);
810 nir_cf_node
*if_node
= nir_cf_node_prev(&last_block
->cf_node
);
812 if (if_node
->type
== nir_cf_node_if
) {
813 nif
= nir_cf_node_as_if(if_node
);
814 nir_block
*then_block
= nir_if_last_then_block(nif
);
815 nir_block
*else_block
= nir_if_last_else_block(nif
);
817 then_ends_in_continue
= nir_block_ends_in_continue(then_block
);
818 else_ends_in_continue
= nir_block_ends_in_continue(else_block
);
820 /* If both branches end in a jump do nothing, this should be handled
821 * by nir_opt_dead_cf().
823 if ((then_ends_in_continue
|| nir_block_ends_in_break(then_block
)) &&
824 (else_ends_in_continue
|| nir_block_ends_in_break(else_block
)))
827 /* If continue found stop scanning and attempt optimisation, or
829 if (then_ends_in_continue
|| else_ends_in_continue
||
830 !aggressive_last_continue
)
834 if_node
= nir_cf_node_prev(if_node
);
837 /* If we didn't find an if to optimise return */
838 if (!then_ends_in_continue
&& !else_ends_in_continue
)
841 /* If there is nothing after the if-statement we bail */
842 if (&nif
->cf_node
== nir_cf_node_prev(&last_block
->cf_node
) &&
843 exec_list_is_empty(&last_block
->instr_list
))
846 /* Move the last block of the loop inside the last if-statement */
848 nir_cf_extract(&tmp
, nir_after_cf_node(if_node
),
849 nir_after_block(last_block
));
850 if (then_ends_in_continue
)
851 nir_cf_reinsert(&tmp
, nir_after_cf_list(&nif
->else_list
));
853 nir_cf_reinsert(&tmp
, nir_after_cf_list(&nif
->then_list
));
855 /* In order to avoid running nir_lower_regs_to_ssa_impl() every time an if
856 * opt makes progress we leave nir_opt_trivial_continues() to remove the
857 * continue now that the end of the loop has been simplified.
863 /* Walk all the phis in the block immediately following the if statement and
867 rewrite_phi_predecessor_blocks(nir_if
*nif
,
868 nir_block
*old_then_block
,
869 nir_block
*old_else_block
,
870 nir_block
*new_then_block
,
871 nir_block
*new_else_block
)
873 nir_block
*after_if_block
=
874 nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
));
876 nir_foreach_instr(instr
, after_if_block
) {
877 if (instr
->type
!= nir_instr_type_phi
)
880 nir_phi_instr
*phi
= nir_instr_as_phi(instr
);
882 foreach_list_typed(nir_phi_src
, src
, node
, &phi
->srcs
) {
883 if (src
->pred
== old_then_block
) {
884 src
->pred
= new_then_block
;
885 } else if (src
->pred
== old_else_block
) {
886 src
->pred
= new_else_block
;
893 * This optimization turns:
908 opt_if_simplification(nir_builder
*b
, nir_if
*nif
)
910 /* Only simplify if the then block is empty and the else block is not. */
911 if (!is_block_empty(nir_if_first_then_block(nif
)) ||
912 is_block_empty(nir_if_first_else_block(nif
)))
915 /* Make sure the condition is a comparison operation. */
916 nir_instr
*src_instr
= nif
->condition
.ssa
->parent_instr
;
917 if (src_instr
->type
!= nir_instr_type_alu
)
920 nir_alu_instr
*alu_instr
= nir_instr_as_alu(src_instr
);
921 if (!nir_alu_instr_is_comparison(alu_instr
))
924 /* Insert the inverted instruction and rewrite the condition. */
925 b
->cursor
= nir_after_instr(&alu_instr
->instr
);
927 nir_ssa_def
*new_condition
=
928 nir_inot(b
, &alu_instr
->dest
.dest
.ssa
);
930 nir_if_rewrite_condition(nif
, nir_src_for_ssa(new_condition
));
932 /* Grab pointers to the last then/else blocks for fixing up the phis. */
933 nir_block
*then_block
= nir_if_last_then_block(nif
);
934 nir_block
*else_block
= nir_if_last_else_block(nif
);
936 rewrite_phi_predecessor_blocks(nif
, then_block
, else_block
, else_block
,
939 /* Finally, move the else block to the then block. */
941 nir_cf_extract(&tmp
, nir_before_cf_list(&nif
->else_list
),
942 nir_after_cf_list(&nif
->else_list
));
943 nir_cf_reinsert(&tmp
, nir_before_cf_list(&nif
->then_list
));
949 * This optimization simplifies potential loop terminators which then allows
950 * other passes such as opt_if_simplification() and loop unrolling to progress
954 * ... then block instructions ...
967 * ... then block instructions ...
970 opt_if_loop_terminator(nir_if
*nif
)
972 nir_block
*break_blk
= NULL
;
973 nir_block
*continue_from_blk
= NULL
;
974 bool continue_from_then
= true;
976 nir_block
*last_then
= nir_if_last_then_block(nif
);
977 nir_block
*last_else
= nir_if_last_else_block(nif
);
979 if (nir_block_ends_in_break(last_then
)) {
980 break_blk
= last_then
;
981 continue_from_blk
= last_else
;
982 continue_from_then
= false;
983 } else if (nir_block_ends_in_break(last_else
)) {
984 break_blk
= last_else
;
985 continue_from_blk
= last_then
;
988 /* Continue if the if-statement contained no jumps at all */
992 /* If the continue from block is empty then return as there is nothing to
995 nir_block
*first_continue_from_blk
= continue_from_then
?
996 nir_if_first_then_block(nif
) :
997 nir_if_first_else_block(nif
);
998 if (is_block_empty(first_continue_from_blk
))
1001 if (nir_block_ends_in_jump(continue_from_blk
))
1004 /* Even though this if statement has a jump on one side, we may still have
1005 * phis afterwards. Single-source phis can be produced by loop unrolling
1006 * or dead control-flow passes and are perfectly legal. Run a quick phi
1007 * removal on the block after the if to clean up any such phis.
1009 nir_opt_remove_phis_block(nir_cf_node_as_block(nir_cf_node_next(&nif
->cf_node
)));
1011 /* Finally, move the continue from branch after the if-statement. */
1013 nir_cf_extract(&tmp
, nir_before_block(first_continue_from_blk
),
1014 nir_after_block(continue_from_blk
));
1015 nir_cf_reinsert(&tmp
, nir_after_cf_node(&nif
->cf_node
));
1021 evaluate_if_condition(nir_if
*nif
, nir_cursor cursor
, bool *value
)
1023 nir_block
*use_block
= nir_cursor_current_block(cursor
);
1024 if (nir_block_dominates(nir_if_first_then_block(nif
), use_block
)) {
1027 } else if (nir_block_dominates(nir_if_first_else_block(nif
), use_block
)) {
1035 static nir_ssa_def
*
1036 clone_alu_and_replace_src_defs(nir_builder
*b
, const nir_alu_instr
*alu
,
1037 nir_ssa_def
**src_defs
)
1039 nir_alu_instr
*nalu
= nir_alu_instr_create(b
->shader
, alu
->op
);
1040 nalu
->exact
= alu
->exact
;
1042 nir_ssa_dest_init(&nalu
->instr
, &nalu
->dest
.dest
,
1043 alu
->dest
.dest
.ssa
.num_components
,
1044 alu
->dest
.dest
.ssa
.bit_size
, alu
->dest
.dest
.ssa
.name
);
1046 nalu
->dest
.saturate
= alu
->dest
.saturate
;
1047 nalu
->dest
.write_mask
= alu
->dest
.write_mask
;
1049 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1050 assert(alu
->src
[i
].src
.is_ssa
);
1051 nalu
->src
[i
].src
= nir_src_for_ssa(src_defs
[i
]);
1052 nalu
->src
[i
].negate
= alu
->src
[i
].negate
;
1053 nalu
->src
[i
].abs
= alu
->src
[i
].abs
;
1054 memcpy(nalu
->src
[i
].swizzle
, alu
->src
[i
].swizzle
,
1055 sizeof(nalu
->src
[i
].swizzle
));
1058 nir_builder_instr_insert(b
, &nalu
->instr
);
1060 return &nalu
->dest
.dest
.ssa
;;
1064 * This propagates if condition evaluation down the chain of some alu
1065 * instructions. For example by checking the use of some of the following alu
1066 * instruction we can eventually replace ssa_107 with NIR_TRUE.
1070 * vec1 32 ssa_85 = load_const (0x00000002)
1071 * vec1 32 ssa_86 = ieq ssa_48, ssa_85
1072 * vec1 32 ssa_87 = load_const (0x00000001)
1073 * vec1 32 ssa_88 = ieq ssa_48, ssa_87
1074 * vec1 32 ssa_89 = ior ssa_86, ssa_88
1075 * vec1 32 ssa_90 = ieq ssa_48, ssa_0
1076 * vec1 32 ssa_91 = ior ssa_89, ssa_90
1101 * vec1 32 ssa_107 = inot ssa_91
1111 propagate_condition_eval(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1112 nir_src
*alu_use
, nir_alu_instr
*alu
,
1113 bool is_if_condition
)
1116 b
->cursor
= nir_before_src(alu_use
, is_if_condition
);
1117 if (!evaluate_if_condition(nif
, b
->cursor
, &bool_value
))
1120 nir_ssa_def
*def
[4] = {0};
1121 for (unsigned i
= 0; i
< nir_op_infos
[alu
->op
].num_inputs
; i
++) {
1122 if (alu
->src
[i
].src
.ssa
== use_src
->ssa
) {
1123 def
[i
] = nir_imm_bool(b
, bool_value
);
1125 def
[i
] = alu
->src
[i
].src
.ssa
;
1129 nir_ssa_def
*nalu
= clone_alu_and_replace_src_defs(b
, alu
, def
);
1131 /* Rewrite use to use new alu instruction */
1132 nir_src new_src
= nir_src_for_ssa(nalu
);
1134 if (is_if_condition
)
1135 nir_if_rewrite_condition(alu_use
->parent_if
, new_src
);
1137 nir_instr_rewrite_src(alu_use
->parent_instr
, alu_use
, new_src
);
1143 can_propagate_through_alu(nir_src
*src
)
1145 if (src
->parent_instr
->type
!= nir_instr_type_alu
)
1148 nir_alu_instr
*alu
= nir_instr_as_alu(src
->parent_instr
);
1156 return src
== &alu
->src
[0].src
;
1163 evaluate_condition_use(nir_builder
*b
, nir_if
*nif
, nir_src
*use_src
,
1164 bool is_if_condition
)
1166 bool progress
= false;
1168 b
->cursor
= nir_before_src(use_src
, is_if_condition
);
1171 if (evaluate_if_condition(nif
, b
->cursor
, &bool_value
)) {
1172 /* Rewrite use to use const */
1173 nir_src imm_src
= nir_src_for_ssa(nir_imm_bool(b
, bool_value
));
1174 if (is_if_condition
)
1175 nir_if_rewrite_condition(use_src
->parent_if
, imm_src
);
1177 nir_instr_rewrite_src(use_src
->parent_instr
, use_src
, imm_src
);
1182 if (!is_if_condition
&& can_propagate_through_alu(use_src
)) {
1183 nir_alu_instr
*alu
= nir_instr_as_alu(use_src
->parent_instr
);
1185 nir_foreach_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1186 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1190 nir_foreach_if_use_safe(alu_use
, &alu
->dest
.dest
.ssa
) {
1191 progress
|= propagate_condition_eval(b
, nif
, use_src
, alu_use
, alu
,
1200 opt_if_evaluate_condition_use(nir_builder
*b
, nir_if
*nif
)
1202 bool progress
= false;
1204 /* Evaluate any uses of the if condition inside the if branches */
1205 assert(nif
->condition
.is_ssa
);
1206 nir_foreach_use_safe(use_src
, nif
->condition
.ssa
) {
1207 progress
|= evaluate_condition_use(b
, nif
, use_src
, false);
1210 nir_foreach_if_use_safe(use_src
, nif
->condition
.ssa
) {
1211 if (use_src
->parent_if
!= nif
)
1212 progress
|= evaluate_condition_use(b
, nif
, use_src
, true);
1219 simple_merge_if(nir_if
*dest_if
, nir_if
*src_if
, bool dest_if_then
,
1222 /* Now merge the if branch */
1223 nir_block
*dest_blk
= dest_if_then
? nir_if_last_then_block(dest_if
)
1224 : nir_if_last_else_block(dest_if
);
1226 struct exec_list
*list
= src_if_then
? &src_if
->then_list
1227 : &src_if
->else_list
;
1229 nir_cf_list if_cf_list
;
1230 nir_cf_extract(&if_cf_list
, nir_before_cf_list(list
),
1231 nir_after_cf_list(list
));
1232 nir_cf_reinsert(&if_cf_list
, nir_after_block(dest_blk
));
1236 opt_if_merge(nir_if
*nif
)
1238 bool progress
= false;
1240 nir_block
*next_blk
= nir_cf_node_cf_tree_next(&nif
->cf_node
);
1241 if (next_blk
&& nif
->condition
.is_ssa
) {
1242 nir_if
*next_if
= nir_block_get_following_if(next_blk
);
1243 if (next_if
&& next_if
->condition
.is_ssa
) {
1245 /* Here we merge two consecutive ifs that have the same
1259 * Note: This only merges if-statements when the block between them
1260 * is empty. The reason we don't try to merge ifs that just have phis
1261 * between them is because this can results in increased register
1262 * pressure. For example when merging if ladders created by indirect
1265 if (nif
->condition
.ssa
== next_if
->condition
.ssa
&&
1266 exec_list_is_empty(&next_blk
->instr_list
)) {
1268 simple_merge_if(nif
, next_if
, true, true);
1269 simple_merge_if(nif
, next_if
, false, false);
1271 nir_block
*new_then_block
= nir_if_last_then_block(nif
);
1272 nir_block
*new_else_block
= nir_if_last_else_block(nif
);
1274 nir_block
*old_then_block
= nir_if_last_then_block(next_if
);
1275 nir_block
*old_else_block
= nir_if_last_else_block(next_if
);
1277 /* Rewrite the predecessor block for any phis following the second
1280 rewrite_phi_predecessor_blocks(next_if
, old_then_block
,
1285 /* Move phis after merged if to avoid them being deleted when we
1286 * remove the merged if-statement.
1288 nir_block
*after_next_if_block
=
1289 nir_cf_node_as_block(nir_cf_node_next(&next_if
->cf_node
));
1291 nir_foreach_instr_safe(instr
, after_next_if_block
) {
1292 if (instr
->type
!= nir_instr_type_phi
)
1295 exec_node_remove(&instr
->node
);
1296 exec_list_push_tail(&next_blk
->instr_list
, &instr
->node
);
1297 instr
->block
= next_blk
;
1300 nir_cf_node_remove(&next_if
->cf_node
);
1311 opt_if_cf_list(nir_builder
*b
, struct exec_list
*cf_list
,
1312 bool aggressive_last_continue
)
1314 bool progress
= false;
1315 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1316 switch (cf_node
->type
) {
1317 case nir_cf_node_block
:
1320 case nir_cf_node_if
: {
1321 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1322 progress
|= opt_if_cf_list(b
, &nif
->then_list
,
1323 aggressive_last_continue
);
1324 progress
|= opt_if_cf_list(b
, &nif
->else_list
,
1325 aggressive_last_continue
);
1326 progress
|= opt_if_loop_terminator(nif
);
1327 progress
|= opt_if_merge(nif
);
1328 progress
|= opt_if_simplification(b
, nif
);
1332 case nir_cf_node_loop
: {
1333 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1334 progress
|= opt_if_cf_list(b
, &loop
->body
,
1335 aggressive_last_continue
);
1336 progress
|= opt_simplify_bcsel_of_phi(b
, loop
);
1337 progress
|= opt_peel_loop_initial_if(loop
);
1338 progress
|= opt_if_loop_last_continue(loop
,
1339 aggressive_last_continue
);
1343 case nir_cf_node_function
:
1344 unreachable("Invalid cf type");
1352 * These optimisations depend on nir_metadata_block_index and therefore must
1353 * not do anything to cause the metadata to become invalid.
1356 opt_if_safe_cf_list(nir_builder
*b
, struct exec_list
*cf_list
)
1358 bool progress
= false;
1359 foreach_list_typed(nir_cf_node
, cf_node
, node
, cf_list
) {
1360 switch (cf_node
->type
) {
1361 case nir_cf_node_block
:
1364 case nir_cf_node_if
: {
1365 nir_if
*nif
= nir_cf_node_as_if(cf_node
);
1366 progress
|= opt_if_safe_cf_list(b
, &nif
->then_list
);
1367 progress
|= opt_if_safe_cf_list(b
, &nif
->else_list
);
1368 progress
|= opt_if_evaluate_condition_use(b
, nif
);
1372 case nir_cf_node_loop
: {
1373 nir_loop
*loop
= nir_cf_node_as_loop(cf_node
);
1374 progress
|= opt_if_safe_cf_list(b
, &loop
->body
);
1375 progress
|= opt_split_alu_of_phi(b
, loop
);
1379 case nir_cf_node_function
:
1380 unreachable("Invalid cf type");
1388 nir_opt_if(nir_shader
*shader
, bool aggressive_last_continue
)
1390 bool progress
= false;
1392 nir_foreach_function(function
, shader
) {
1393 if (function
->impl
== NULL
)
1397 nir_builder_init(&b
, function
->impl
);
1399 nir_metadata_require(function
->impl
, nir_metadata_block_index
|
1400 nir_metadata_dominance
);
1401 progress
= opt_if_safe_cf_list(&b
, &function
->impl
->body
);
1402 nir_metadata_preserve(function
->impl
, nir_metadata_block_index
|
1403 nir_metadata_dominance
);
1405 if (opt_if_cf_list(&b
, &function
->impl
->body
,
1406 aggressive_last_continue
)) {
1407 nir_metadata_preserve(function
->impl
, nir_metadata_none
);
1409 /* If that made progress, we're no longer really in SSA form. We
1410 * need to convert registers back into SSA defs and clean up SSA defs
1411 * that don't dominate their uses.
1413 nir_lower_regs_to_ssa_impl(function
->impl
);
1418 function
->impl
->valid_metadata
&= ~nir_metadata_not_properly_reset
;