nir: Add a lowering pass to split 64bit phis
[mesa.git] / src / compiler / nir / nir_opt_load_store_vectorize.c
1 /*
2 * Copyright © 2019 Valve Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /**
25 * Although it's called a load/store "vectorization" pass, this also combines
26 * intersecting and identical loads/stores. It currently supports derefs, ubo,
27 * ssbo and push constant loads/stores.
28 *
29 * This doesn't handle copy_deref intrinsics and assumes that
30 * nir_lower_alu_to_scalar() has been called and that the IR is free from ALU
31 * modifiers. It also assumes that derefs have explicitly laid out types.
32 *
33 * After vectorization, the backend may want to call nir_lower_alu_to_scalar()
34 * and nir_lower_pack(). Also this creates cast instructions taking derefs as a
35 * source and some parts of NIR may not be able to handle that well.
36 *
37 * There are a few situations where this doesn't vectorize as well as it could:
38 * - It won't turn four consecutive vec3 loads into 3 vec4 loads.
39 * - It doesn't do global vectorization.
40 * Handling these cases probably wouldn't provide much benefit though.
41 *
42 * This probably doesn't handle big-endian GPUs correctly.
43 */
44
45 #include "nir.h"
46 #include "nir_deref.h"
47 #include "nir_builder.h"
48 #include "nir_worklist.h"
49 #include "util/u_dynarray.h"
50
51 #include <stdlib.h>
52
53 struct intrinsic_info {
54 nir_variable_mode mode; /* 0 if the mode is obtained from the deref. */
55 nir_intrinsic_op op;
56 bool is_atomic;
57 /* Indices into nir_intrinsic::src[] or -1 if not applicable. */
58 int resource_src; /* resource (e.g. from vulkan_resource_index) */
59 int base_src; /* offset which it loads/stores from */
60 int deref_src; /* deref which is loads/stores from */
61 int value_src; /* the data it is storing */
62 };
63
64 static const struct intrinsic_info *
65 get_info(nir_intrinsic_op op) {
66 switch (op) {
67 #define INFO(mode, op, atomic, res, base, deref, val) \
68 case nir_intrinsic_##op: {\
69 static const struct intrinsic_info op##_info = {mode, nir_intrinsic_##op, atomic, res, base, deref, val};\
70 return &op##_info;\
71 }
72 #define LOAD(mode, op, res, base, deref) INFO(mode, load_##op, false, res, base, deref, -1)
73 #define STORE(mode, op, res, base, deref, val) INFO(mode, store_##op, false, res, base, deref, val)
74 #define ATOMIC(mode, type, op, res, base, deref, val) INFO(mode, type##_atomic_##op, true, res, base, deref, val)
75 LOAD(nir_var_mem_push_const, push_constant, -1, 0, -1)
76 LOAD(nir_var_mem_ubo, ubo, 0, 1, -1)
77 LOAD(nir_var_mem_ssbo, ssbo, 0, 1, -1)
78 STORE(nir_var_mem_ssbo, ssbo, 1, 2, -1, 0)
79 LOAD(0, deref, -1, -1, 0)
80 STORE(0, deref, -1, -1, 0, 1)
81 LOAD(nir_var_mem_shared, shared, -1, 0, -1)
82 STORE(nir_var_mem_shared, shared, -1, 1, -1, 0)
83 LOAD(nir_var_mem_global, global, -1, 0, -1)
84 STORE(nir_var_mem_global, global, -1, 1, -1, 0)
85 ATOMIC(nir_var_mem_ssbo, ssbo, add, 0, 1, -1, 2)
86 ATOMIC(nir_var_mem_ssbo, ssbo, imin, 0, 1, -1, 2)
87 ATOMIC(nir_var_mem_ssbo, ssbo, umin, 0, 1, -1, 2)
88 ATOMIC(nir_var_mem_ssbo, ssbo, imax, 0, 1, -1, 2)
89 ATOMIC(nir_var_mem_ssbo, ssbo, umax, 0, 1, -1, 2)
90 ATOMIC(nir_var_mem_ssbo, ssbo, and, 0, 1, -1, 2)
91 ATOMIC(nir_var_mem_ssbo, ssbo, or, 0, 1, -1, 2)
92 ATOMIC(nir_var_mem_ssbo, ssbo, xor, 0, 1, -1, 2)
93 ATOMIC(nir_var_mem_ssbo, ssbo, exchange, 0, 1, -1, 2)
94 ATOMIC(nir_var_mem_ssbo, ssbo, comp_swap, 0, 1, -1, 2)
95 ATOMIC(nir_var_mem_ssbo, ssbo, fadd, 0, 1, -1, 2)
96 ATOMIC(nir_var_mem_ssbo, ssbo, fmin, 0, 1, -1, 2)
97 ATOMIC(nir_var_mem_ssbo, ssbo, fmax, 0, 1, -1, 2)
98 ATOMIC(nir_var_mem_ssbo, ssbo, fcomp_swap, 0, 1, -1, 2)
99 ATOMIC(0, deref, add, -1, -1, 0, 1)
100 ATOMIC(0, deref, imin, -1, -1, 0, 1)
101 ATOMIC(0, deref, umin, -1, -1, 0, 1)
102 ATOMIC(0, deref, imax, -1, -1, 0, 1)
103 ATOMIC(0, deref, umax, -1, -1, 0, 1)
104 ATOMIC(0, deref, and, -1, -1, 0, 1)
105 ATOMIC(0, deref, or, -1, -1, 0, 1)
106 ATOMIC(0, deref, xor, -1, -1, 0, 1)
107 ATOMIC(0, deref, exchange, -1, -1, 0, 1)
108 ATOMIC(0, deref, comp_swap, -1, -1, 0, 1)
109 ATOMIC(0, deref, fadd, -1, -1, 0, 1)
110 ATOMIC(0, deref, fmin, -1, -1, 0, 1)
111 ATOMIC(0, deref, fmax, -1, -1, 0, 1)
112 ATOMIC(0, deref, fcomp_swap, -1, -1, 0, 1)
113 ATOMIC(nir_var_mem_shared, shared, add, -1, 0, -1, 1)
114 ATOMIC(nir_var_mem_shared, shared, imin, -1, 0, -1, 1)
115 ATOMIC(nir_var_mem_shared, shared, umin, -1, 0, -1, 1)
116 ATOMIC(nir_var_mem_shared, shared, imax, -1, 0, -1, 1)
117 ATOMIC(nir_var_mem_shared, shared, umax, -1, 0, -1, 1)
118 ATOMIC(nir_var_mem_shared, shared, and, -1, 0, -1, 1)
119 ATOMIC(nir_var_mem_shared, shared, or, -1, 0, -1, 1)
120 ATOMIC(nir_var_mem_shared, shared, xor, -1, 0, -1, 1)
121 ATOMIC(nir_var_mem_shared, shared, exchange, -1, 0, -1, 1)
122 ATOMIC(nir_var_mem_shared, shared, comp_swap, -1, 0, -1, 1)
123 ATOMIC(nir_var_mem_shared, shared, fadd, -1, 0, -1, 1)
124 ATOMIC(nir_var_mem_shared, shared, fmin, -1, 0, -1, 1)
125 ATOMIC(nir_var_mem_shared, shared, fmax, -1, 0, -1, 1)
126 ATOMIC(nir_var_mem_shared, shared, fcomp_swap, -1, 0, -1, 1)
127 ATOMIC(nir_var_mem_global, global, add, -1, 0, -1, 1)
128 ATOMIC(nir_var_mem_global, global, imin, -1, 0, -1, 1)
129 ATOMIC(nir_var_mem_global, global, umin, -1, 0, -1, 1)
130 ATOMIC(nir_var_mem_global, global, imax, -1, 0, -1, 1)
131 ATOMIC(nir_var_mem_global, global, umax, -1, 0, -1, 1)
132 ATOMIC(nir_var_mem_global, global, and, -1, 0, -1, 1)
133 ATOMIC(nir_var_mem_global, global, or, -1, 0, -1, 1)
134 ATOMIC(nir_var_mem_global, global, xor, -1, 0, -1, 1)
135 ATOMIC(nir_var_mem_global, global, exchange, -1, 0, -1, 1)
136 ATOMIC(nir_var_mem_global, global, comp_swap, -1, 0, -1, 1)
137 ATOMIC(nir_var_mem_global, global, fadd, -1, 0, -1, 1)
138 ATOMIC(nir_var_mem_global, global, fmin, -1, 0, -1, 1)
139 ATOMIC(nir_var_mem_global, global, fmax, -1, 0, -1, 1)
140 ATOMIC(nir_var_mem_global, global, fcomp_swap, -1, 0, -1, 1)
141 default:
142 break;
143 #undef ATOMIC
144 #undef STORE
145 #undef LOAD
146 #undef INFO
147 }
148 return NULL;
149 }
150
151 /*
152 * Information used to compare memory operations.
153 * It canonically represents an offset as:
154 * `offset_defs[0]*offset_defs_mul[0] + offset_defs[1]*offset_defs_mul[1] + ...`
155 * "offset_defs" is sorted in ascenting order by the ssa definition's index.
156 * "resource" or "var" may be NULL.
157 */
158 struct entry_key {
159 nir_ssa_def *resource;
160 nir_variable *var;
161 unsigned offset_def_count;
162 nir_ssa_def **offset_defs;
163 uint64_t *offset_defs_mul;
164 };
165
166 /* Information on a single memory operation. */
167 struct entry {
168 struct list_head head;
169 unsigned index;
170
171 struct entry_key *key;
172 union {
173 uint64_t offset; /* sign-extended */
174 int64_t offset_signed;
175 };
176 uint32_t best_align;
177
178 nir_instr *instr;
179 nir_intrinsic_instr *intrin;
180 const struct intrinsic_info *info;
181 enum gl_access_qualifier access;
182 bool is_store;
183
184 nir_deref_instr *deref;
185 };
186
187 struct vectorize_ctx {
188 nir_variable_mode modes;
189 nir_should_vectorize_mem_func callback;
190 nir_variable_mode robust_modes;
191 struct list_head entries[nir_num_variable_modes];
192 struct hash_table *loads[nir_num_variable_modes];
193 struct hash_table *stores[nir_num_variable_modes];
194 };
195
196 static uint32_t hash_entry_key(const void *key_)
197 {
198 /* this is careful to not include pointers in the hash calculation so that
199 * the order of the hash table walk is deterministic */
200 struct entry_key *key = (struct entry_key*)key_;
201
202 uint32_t hash = 0;
203 if (key->resource)
204 hash = XXH32(&key->resource->index, sizeof(key->resource->index), hash);
205 if (key->var) {
206 hash = XXH32(&key->var->index, sizeof(key->var->index), hash);
207 unsigned mode = key->var->data.mode;
208 hash = XXH32(&mode, sizeof(mode), hash);
209 }
210
211 for (unsigned i = 0; i < key->offset_def_count; i++)
212 hash = XXH32(&key->offset_defs[i]->index, sizeof(key->offset_defs[i]->index), hash);
213
214 hash = XXH32(key->offset_defs_mul, key->offset_def_count * sizeof(uint64_t), hash);
215
216 return hash;
217 }
218
219 static bool entry_key_equals(const void *a_, const void *b_)
220 {
221 struct entry_key *a = (struct entry_key*)a_;
222 struct entry_key *b = (struct entry_key*)b_;
223
224 if (a->var != b->var || a->resource != b->resource)
225 return false;
226
227 if (a->offset_def_count != b->offset_def_count)
228 return false;
229
230 size_t offset_def_size = a->offset_def_count * sizeof(nir_ssa_def *);
231 size_t offset_def_mul_size = a->offset_def_count * sizeof(uint64_t);
232 if (a->offset_def_count &&
233 (memcmp(a->offset_defs, b->offset_defs, offset_def_size) ||
234 memcmp(a->offset_defs_mul, b->offset_defs_mul, offset_def_mul_size)))
235 return false;
236
237 return true;
238 }
239
240 static void delete_entry_dynarray(struct hash_entry *entry)
241 {
242 struct util_dynarray *arr = (struct util_dynarray *)entry->data;
243 ralloc_free(arr);
244 }
245
246 static int sort_entries(const void *a_, const void *b_)
247 {
248 struct entry *a = *(struct entry*const*)a_;
249 struct entry *b = *(struct entry*const*)b_;
250
251 if (a->offset_signed > b->offset_signed)
252 return 1;
253 else if (a->offset_signed < b->offset_signed)
254 return -1;
255 else
256 return 0;
257 }
258
259 static unsigned
260 get_bit_size(struct entry *entry)
261 {
262 unsigned size = entry->is_store ?
263 entry->intrin->src[entry->info->value_src].ssa->bit_size :
264 entry->intrin->dest.ssa.bit_size;
265 return size == 1 ? 32u : size;
266 }
267
268 /* If "def" is from an alu instruction with the opcode "op" and one of it's
269 * sources is a constant, update "def" to be the non-constant source, fill "c"
270 * with the constant and return true. */
271 static bool
272 parse_alu(nir_ssa_def **def, nir_op op, uint64_t *c)
273 {
274 nir_ssa_scalar scalar;
275 scalar.def = *def;
276 scalar.comp = 0;
277
278 if (!nir_ssa_scalar_is_alu(scalar) || nir_ssa_scalar_alu_op(scalar) != op)
279 return false;
280
281 nir_ssa_scalar src0 = nir_ssa_scalar_chase_alu_src(scalar, 0);
282 nir_ssa_scalar src1 = nir_ssa_scalar_chase_alu_src(scalar, 1);
283 if (op != nir_op_ishl && nir_ssa_scalar_is_const(src0) && src1.comp == 0) {
284 *c = nir_ssa_scalar_as_uint(src0);
285 *def = src1.def;
286 } else if (nir_ssa_scalar_is_const(src1) && src0.comp == 0) {
287 *c = nir_ssa_scalar_as_uint(src1);
288 *def = src0.def;
289 } else {
290 return false;
291 }
292 return true;
293 }
294
295 /* Parses an offset expression such as "a * 16 + 4" and "(a * 16 + 4) * 64 + 32". */
296 static void
297 parse_offset(nir_ssa_def **base, uint64_t *base_mul, uint64_t *offset)
298 {
299 if ((*base)->parent_instr->type == nir_instr_type_load_const) {
300 *offset = nir_src_comp_as_uint(nir_src_for_ssa(*base), 0);
301 *base = NULL;
302 return;
303 }
304
305 uint64_t mul = 1;
306 uint64_t add = 0;
307 bool progress = false;
308 do {
309 uint64_t mul2 = 1, add2 = 0;
310
311 progress = parse_alu(base, nir_op_imul, &mul2);
312 mul *= mul2;
313
314 mul2 = 0;
315 progress |= parse_alu(base, nir_op_ishl, &mul2);
316 mul <<= mul2;
317
318 progress |= parse_alu(base, nir_op_iadd, &add2);
319 add += add2 * mul;
320 } while (progress);
321
322 *base_mul = mul;
323 *offset = add;
324 }
325
326 static unsigned
327 type_scalar_size_bytes(const struct glsl_type *type)
328 {
329 assert(glsl_type_is_vector_or_scalar(type) ||
330 glsl_type_is_matrix(type));
331 return glsl_type_is_boolean(type) ? 4u : glsl_get_bit_size(type) / 8u;
332 }
333
334 static int
335 get_array_stride(const struct glsl_type *type)
336 {
337 unsigned explicit_stride = glsl_get_explicit_stride(type);
338 if ((glsl_type_is_matrix(type) &&
339 glsl_matrix_type_is_row_major(type)) ||
340 (glsl_type_is_vector(type) && explicit_stride == 0))
341 return type_scalar_size_bytes(type);
342 return explicit_stride;
343 }
344
345 static uint64_t
346 mask_sign_extend(uint64_t val, unsigned bit_size)
347 {
348 return (int64_t)(val << (64 - bit_size)) >> (64 - bit_size);
349 }
350
351 static unsigned
352 add_to_entry_key(nir_ssa_def **offset_defs, uint64_t *offset_defs_mul,
353 unsigned offset_def_count, nir_ssa_def *def, uint64_t mul)
354 {
355 mul = mask_sign_extend(mul, def->bit_size);
356
357 for (unsigned i = 0; i <= offset_def_count; i++) {
358 if (i == offset_def_count || def->index > offset_defs[i]->index) {
359 /* insert before i */
360 memmove(offset_defs + i + 1, offset_defs + i,
361 (offset_def_count - i) * sizeof(nir_ssa_def *));
362 memmove(offset_defs_mul + i + 1, offset_defs_mul + i,
363 (offset_def_count - i) * sizeof(uint64_t));
364 offset_defs[i] = def;
365 offset_defs_mul[i] = mul;
366 return 1;
367 } else if (def->index == offset_defs[i]->index) {
368 /* merge with offset_def at i */
369 offset_defs_mul[i] += mul;
370 return 0;
371 }
372 }
373 unreachable("Unreachable.");
374 return 0;
375 }
376
377 static struct entry_key *
378 create_entry_key_from_deref(void *mem_ctx,
379 struct vectorize_ctx *ctx,
380 nir_deref_path *path,
381 uint64_t *offset_base)
382 {
383 unsigned path_len = 0;
384 while (path->path[path_len])
385 path_len++;
386
387 nir_ssa_def *offset_defs_stack[32];
388 uint64_t offset_defs_mul_stack[32];
389 nir_ssa_def **offset_defs = offset_defs_stack;
390 uint64_t *offset_defs_mul = offset_defs_mul_stack;
391 if (path_len > 32) {
392 offset_defs = malloc(path_len * sizeof(nir_ssa_def *));
393 offset_defs_mul = malloc(path_len * sizeof(uint64_t));
394 }
395 unsigned offset_def_count = 0;
396
397 struct entry_key* key = ralloc(mem_ctx, struct entry_key);
398 key->resource = NULL;
399 key->var = NULL;
400 *offset_base = 0;
401
402 for (unsigned i = 0; i < path_len; i++) {
403 nir_deref_instr *parent = i ? path->path[i - 1] : NULL;
404 nir_deref_instr *deref = path->path[i];
405
406 switch (deref->deref_type) {
407 case nir_deref_type_var: {
408 assert(!parent);
409 key->var = deref->var;
410 break;
411 }
412 case nir_deref_type_array:
413 case nir_deref_type_ptr_as_array: {
414 assert(parent);
415 nir_ssa_def *index = deref->arr.index.ssa;
416 uint32_t stride;
417 if (deref->deref_type == nir_deref_type_ptr_as_array)
418 stride = nir_deref_instr_ptr_as_array_stride(deref);
419 else
420 stride = get_array_stride(parent->type);
421
422 nir_ssa_def *base = index;
423 uint64_t offset = 0, base_mul = 1;
424 parse_offset(&base, &base_mul, &offset);
425 offset = mask_sign_extend(offset, index->bit_size);
426
427 *offset_base += offset * stride;
428 if (base) {
429 offset_def_count += add_to_entry_key(offset_defs, offset_defs_mul,
430 offset_def_count,
431 base, base_mul * stride);
432 }
433 break;
434 }
435 case nir_deref_type_struct: {
436 assert(parent);
437 int offset = glsl_get_struct_field_offset(parent->type, deref->strct.index);
438 *offset_base += offset;
439 break;
440 }
441 case nir_deref_type_cast: {
442 if (!parent)
443 key->resource = deref->parent.ssa;
444 break;
445 }
446 default:
447 unreachable("Unhandled deref type");
448 }
449 }
450
451 key->offset_def_count = offset_def_count;
452 key->offset_defs = ralloc_array(mem_ctx, nir_ssa_def *, offset_def_count);
453 key->offset_defs_mul = ralloc_array(mem_ctx, uint64_t, offset_def_count);
454 memcpy(key->offset_defs, offset_defs, offset_def_count * sizeof(nir_ssa_def *));
455 memcpy(key->offset_defs_mul, offset_defs_mul, offset_def_count * sizeof(uint64_t));
456
457 if (offset_defs != offset_defs_stack)
458 free(offset_defs);
459 if (offset_defs_mul != offset_defs_mul_stack)
460 free(offset_defs_mul);
461
462 return key;
463 }
464
465 static unsigned
466 parse_entry_key_from_offset(struct entry_key *key, unsigned size, unsigned left,
467 nir_ssa_def *base, uint64_t base_mul, uint64_t *offset)
468 {
469 uint64_t new_mul;
470 uint64_t new_offset;
471 parse_offset(&base, &new_mul, &new_offset);
472 *offset += new_offset * base_mul;
473
474 if (!base)
475 return 0;
476
477 base_mul *= new_mul;
478
479 assert(left >= 1);
480
481 if (left >= 2) {
482 nir_ssa_scalar scalar;
483 scalar.def = base;
484 scalar.comp = 0;
485 if (nir_ssa_scalar_is_alu(scalar) && nir_ssa_scalar_alu_op(scalar) == nir_op_iadd) {
486 nir_ssa_scalar src0 = nir_ssa_scalar_chase_alu_src(scalar, 0);
487 nir_ssa_scalar src1 = nir_ssa_scalar_chase_alu_src(scalar, 1);
488 if (src0.comp == 0 && src1.comp == 0) {
489 unsigned amount = parse_entry_key_from_offset(key, size, left - 1, src0.def, base_mul, offset);
490 amount += parse_entry_key_from_offset(key, size + amount, left - amount, src1.def, base_mul, offset);
491 return amount;
492 }
493 }
494 }
495
496 return add_to_entry_key(key->offset_defs, key->offset_defs_mul, size, base, base_mul);
497 }
498
499 static struct entry_key *
500 create_entry_key_from_offset(void *mem_ctx, nir_ssa_def *base, uint64_t base_mul, uint64_t *offset)
501 {
502 struct entry_key *key = ralloc(mem_ctx, struct entry_key);
503 key->resource = NULL;
504 key->var = NULL;
505 if (base) {
506 nir_ssa_def *offset_defs[32];
507 uint64_t offset_defs_mul[32];
508 key->offset_defs = offset_defs;
509 key->offset_defs_mul = offset_defs_mul;
510
511 key->offset_def_count = parse_entry_key_from_offset(key, 0, 32, base, base_mul, offset);
512
513 key->offset_defs = ralloc_array(mem_ctx, nir_ssa_def *, key->offset_def_count);
514 key->offset_defs_mul = ralloc_array(mem_ctx, uint64_t, key->offset_def_count);
515 memcpy(key->offset_defs, offset_defs, key->offset_def_count * sizeof(nir_ssa_def *));
516 memcpy(key->offset_defs_mul, offset_defs_mul, key->offset_def_count * sizeof(uint64_t));
517 } else {
518 key->offset_def_count = 0;
519 key->offset_defs = NULL;
520 key->offset_defs_mul = NULL;
521 }
522 return key;
523 }
524
525 static nir_variable_mode
526 get_variable_mode(struct entry *entry)
527 {
528 if (entry->info->mode)
529 return entry->info->mode;
530 assert(entry->deref);
531 return entry->deref->mode;
532 }
533
534 static unsigned
535 mode_to_index(nir_variable_mode mode)
536 {
537 assert(util_bitcount(mode) == 1);
538
539 /* Globals and SSBOs should be tracked together */
540 if (mode == nir_var_mem_global)
541 mode = nir_var_mem_ssbo;
542
543 return ffs(mode) - 1;
544 }
545
546 static nir_variable_mode
547 aliasing_modes(nir_variable_mode modes)
548 {
549 /* Global and SSBO can alias */
550 if (modes & (nir_var_mem_ssbo | nir_var_mem_global))
551 modes |= nir_var_mem_ssbo | nir_var_mem_global;
552 return modes;
553 }
554
555 static struct entry *
556 create_entry(struct vectorize_ctx *ctx,
557 const struct intrinsic_info *info,
558 nir_intrinsic_instr *intrin)
559 {
560 struct entry *entry = rzalloc(ctx, struct entry);
561 entry->intrin = intrin;
562 entry->instr = &intrin->instr;
563 entry->info = info;
564 entry->best_align = UINT32_MAX;
565 entry->is_store = entry->info->value_src >= 0;
566
567 if (entry->info->deref_src >= 0) {
568 entry->deref = nir_src_as_deref(intrin->src[entry->info->deref_src]);
569 nir_deref_path path;
570 nir_deref_path_init(&path, entry->deref, NULL);
571 entry->key = create_entry_key_from_deref(entry, ctx, &path, &entry->offset);
572 nir_deref_path_finish(&path);
573 } else {
574 nir_ssa_def *base = entry->info->base_src >= 0 ?
575 intrin->src[entry->info->base_src].ssa : NULL;
576 uint64_t offset = 0;
577 if (nir_intrinsic_has_base(intrin))
578 offset += nir_intrinsic_base(intrin);
579 entry->key = create_entry_key_from_offset(entry, base, 1, &offset);
580 entry->offset = offset;
581
582 if (base)
583 entry->offset = mask_sign_extend(entry->offset, base->bit_size);
584 }
585
586 if (entry->info->resource_src >= 0)
587 entry->key->resource = intrin->src[entry->info->resource_src].ssa;
588
589 if (nir_intrinsic_has_access(intrin))
590 entry->access = nir_intrinsic_access(intrin);
591 else if (entry->key->var)
592 entry->access = entry->key->var->data.access;
593
594 uint32_t restrict_modes = nir_var_shader_in | nir_var_shader_out;
595 restrict_modes |= nir_var_shader_temp | nir_var_function_temp;
596 restrict_modes |= nir_var_uniform | nir_var_mem_push_const;
597 restrict_modes |= nir_var_system_value | nir_var_mem_shared;
598 if (get_variable_mode(entry) & restrict_modes)
599 entry->access |= ACCESS_RESTRICT;
600
601 return entry;
602 }
603
604 static nir_deref_instr *
605 cast_deref(nir_builder *b, unsigned num_components, unsigned bit_size, nir_deref_instr *deref)
606 {
607 if (glsl_get_components(deref->type) == num_components &&
608 type_scalar_size_bytes(deref->type)*8u == bit_size)
609 return deref;
610
611 enum glsl_base_type types[] = {
612 GLSL_TYPE_UINT8, GLSL_TYPE_UINT16, GLSL_TYPE_UINT, GLSL_TYPE_UINT64};
613 enum glsl_base_type base = types[ffs(bit_size / 8u) - 1u];
614 const struct glsl_type *type = glsl_vector_type(base, num_components);
615
616 if (deref->type == type)
617 return deref;
618
619 return nir_build_deref_cast(b, &deref->dest.ssa, deref->mode, type, 0);
620 }
621
622 /* Return true if the write mask "write_mask" of a store with "old_bit_size"
623 * bits per element can be represented for a store with "new_bit_size" bits per
624 * element. */
625 static bool
626 writemask_representable(unsigned write_mask, unsigned old_bit_size, unsigned new_bit_size)
627 {
628 while (write_mask) {
629 int start, count;
630 u_bit_scan_consecutive_range(&write_mask, &start, &count);
631 start *= old_bit_size;
632 count *= old_bit_size;
633 if (start % new_bit_size != 0)
634 return false;
635 if (count % new_bit_size != 0)
636 return false;
637 }
638 return true;
639 }
640
641 static uint64_t
642 gcd(uint64_t a, uint64_t b)
643 {
644 while (b) {
645 uint64_t old_b = b;
646 b = a % b;
647 a = old_b;
648 }
649 return a;
650 }
651
652 static uint32_t
653 get_best_align(struct entry *entry)
654 {
655 if (entry->best_align != UINT32_MAX)
656 return entry->best_align;
657
658 uint64_t best_align = entry->offset;
659 for (unsigned i = 0; i < entry->key->offset_def_count; i++) {
660 if (!best_align)
661 best_align = entry->key->offset_defs_mul[i];
662 else if (entry->key->offset_defs_mul[i])
663 best_align = gcd(best_align, entry->key->offset_defs_mul[i]);
664 }
665
666 if (nir_intrinsic_has_align_mul(entry->intrin))
667 best_align = MAX2(best_align, nir_intrinsic_align(entry->intrin));
668
669 /* ensure the result is a power of two that fits in a int32_t */
670 entry->best_align = gcd(best_align, 1u << 30);
671
672 return entry->best_align;
673 }
674
675 /* Return true if "new_bit_size" is a usable bit size for a vectorized load/store
676 * of "low" and "high". */
677 static bool
678 new_bitsize_acceptable(struct vectorize_ctx *ctx, unsigned new_bit_size,
679 struct entry *low, struct entry *high, unsigned size)
680 {
681 if (size % new_bit_size != 0)
682 return false;
683
684 unsigned new_num_components = size / new_bit_size;
685 if (!nir_num_components_valid(new_num_components))
686 return false;
687
688 unsigned high_offset = high->offset_signed - low->offset_signed;
689
690 /* check nir_extract_bits limitations */
691 unsigned common_bit_size = MIN2(get_bit_size(low), get_bit_size(high));
692 common_bit_size = MIN2(common_bit_size, new_bit_size);
693 if (high_offset > 0)
694 common_bit_size = MIN2(common_bit_size, (1u << (ffs(high_offset * 8) - 1)));
695 if (new_bit_size / common_bit_size > NIR_MAX_VEC_COMPONENTS)
696 return false;
697
698 if (!ctx->callback(get_best_align(low), new_bit_size, new_num_components,
699 high_offset, low->intrin, high->intrin))
700 return false;
701
702 if (low->is_store) {
703 unsigned low_size = low->intrin->num_components * get_bit_size(low);
704 unsigned high_size = high->intrin->num_components * get_bit_size(high);
705
706 if (low_size % new_bit_size != 0)
707 return false;
708 if (high_size % new_bit_size != 0)
709 return false;
710
711 unsigned write_mask = nir_intrinsic_write_mask(low->intrin);
712 if (!writemask_representable(write_mask, low_size, new_bit_size))
713 return false;
714
715 write_mask = nir_intrinsic_write_mask(high->intrin);
716 if (!writemask_representable(write_mask, high_size, new_bit_size))
717 return false;
718 }
719
720 return true;
721 }
722
723 /* Updates a write mask, "write_mask", so that it can be used with a
724 * "new_bit_size"-bit store instead of a "old_bit_size"-bit store. */
725 static uint32_t
726 update_writemask(unsigned write_mask, unsigned old_bit_size, unsigned new_bit_size)
727 {
728 uint32_t res = 0;
729 while (write_mask) {
730 int start, count;
731 u_bit_scan_consecutive_range(&write_mask, &start, &count);
732 start = start * old_bit_size / new_bit_size;
733 count = count * old_bit_size / new_bit_size;
734 res |= ((1 << count) - 1) << start;
735 }
736 return res;
737 }
738
739 static nir_deref_instr *subtract_deref(nir_builder *b, nir_deref_instr *deref, int64_t offset)
740 {
741 /* avoid adding another deref to the path */
742 if (deref->deref_type == nir_deref_type_ptr_as_array &&
743 nir_src_is_const(deref->arr.index) &&
744 offset % nir_deref_instr_ptr_as_array_stride(deref) == 0) {
745 unsigned stride = nir_deref_instr_ptr_as_array_stride(deref);
746 nir_ssa_def *index = nir_imm_intN_t(b, nir_src_as_int(deref->arr.index) - offset / stride,
747 deref->dest.ssa.bit_size);
748 return nir_build_deref_ptr_as_array(b, nir_deref_instr_parent(deref), index);
749 }
750
751 if (deref->deref_type == nir_deref_type_array &&
752 nir_src_is_const(deref->arr.index)) {
753 nir_deref_instr *parent = nir_deref_instr_parent(deref);
754 unsigned stride = glsl_get_explicit_stride(parent->type);
755 if (offset % stride == 0)
756 return nir_build_deref_array_imm(
757 b, parent, nir_src_as_int(deref->arr.index) - offset / stride);
758 }
759
760
761 deref = nir_build_deref_cast(b, &deref->dest.ssa, deref->mode,
762 glsl_scalar_type(GLSL_TYPE_UINT8), 1);
763 return nir_build_deref_ptr_as_array(
764 b, deref, nir_imm_intN_t(b, -offset, deref->dest.ssa.bit_size));
765 }
766
767 static bool update_align(struct entry *entry)
768 {
769 if (nir_intrinsic_has_align_mul(entry->intrin)) {
770 unsigned align = get_best_align(entry);
771 if (align != nir_intrinsic_align(entry->intrin)) {
772 nir_intrinsic_set_align(entry->intrin, align, 0);
773 return true;
774 }
775 }
776 return false;
777 }
778
779 static void
780 vectorize_loads(nir_builder *b, struct vectorize_ctx *ctx,
781 struct entry *low, struct entry *high,
782 struct entry *first, struct entry *second,
783 unsigned new_bit_size, unsigned new_num_components,
784 unsigned high_start)
785 {
786 unsigned low_bit_size = get_bit_size(low);
787 unsigned high_bit_size = get_bit_size(high);
788 bool low_bool = low->intrin->dest.ssa.bit_size == 1;
789 bool high_bool = high->intrin->dest.ssa.bit_size == 1;
790 nir_ssa_def *data = &first->intrin->dest.ssa;
791
792 b->cursor = nir_after_instr(first->instr);
793
794 /* update the load's destination size and extract data for each of the original loads */
795 data->num_components = new_num_components;
796 data->bit_size = new_bit_size;
797
798 nir_ssa_def *low_def = nir_extract_bits(
799 b, &data, 1, 0, low->intrin->num_components, low_bit_size);
800 nir_ssa_def *high_def = nir_extract_bits(
801 b, &data, 1, high_start, high->intrin->num_components, high_bit_size);
802
803 /* convert booleans */
804 low_def = low_bool ? nir_i2b(b, low_def) : nir_mov(b, low_def);
805 high_def = high_bool ? nir_i2b(b, high_def) : nir_mov(b, high_def);
806
807 /* update uses */
808 if (first == low) {
809 nir_ssa_def_rewrite_uses_after(&low->intrin->dest.ssa, nir_src_for_ssa(low_def),
810 high_def->parent_instr);
811 nir_ssa_def_rewrite_uses(&high->intrin->dest.ssa, nir_src_for_ssa(high_def));
812 } else {
813 nir_ssa_def_rewrite_uses(&low->intrin->dest.ssa, nir_src_for_ssa(low_def));
814 nir_ssa_def_rewrite_uses_after(&high->intrin->dest.ssa, nir_src_for_ssa(high_def),
815 high_def->parent_instr);
816 }
817
818 /* update the intrinsic */
819 first->intrin->num_components = new_num_components;
820
821 const struct intrinsic_info *info = first->info;
822
823 /* update the offset */
824 if (first != low && info->base_src >= 0) {
825 /* let nir_opt_algebraic() remove this addition. this doesn't have much
826 * issues with subtracting 16 from expressions like "(i + 1) * 16" because
827 * nir_opt_algebraic() turns them into "i * 16 + 16" */
828 b->cursor = nir_before_instr(first->instr);
829
830 nir_ssa_def *new_base = first->intrin->src[info->base_src].ssa;
831 new_base = nir_iadd_imm(b, new_base, -(int)(high_start / 8u));
832
833 nir_instr_rewrite_src(first->instr, &first->intrin->src[info->base_src],
834 nir_src_for_ssa(new_base));
835 }
836
837 /* update the deref */
838 if (info->deref_src >= 0) {
839 b->cursor = nir_before_instr(first->instr);
840
841 nir_deref_instr *deref = nir_src_as_deref(first->intrin->src[info->deref_src]);
842 if (first != low && high_start != 0)
843 deref = subtract_deref(b, deref, high_start / 8u);
844 first->deref = cast_deref(b, new_num_components, new_bit_size, deref);
845
846 nir_instr_rewrite_src(first->instr, &first->intrin->src[info->deref_src],
847 nir_src_for_ssa(&first->deref->dest.ssa));
848 }
849
850 /* update base/align */
851 if (first != low && nir_intrinsic_has_base(first->intrin))
852 nir_intrinsic_set_base(first->intrin, nir_intrinsic_base(low->intrin));
853
854 first->key = low->key;
855 first->offset = low->offset;
856 first->best_align = get_best_align(low);
857
858 update_align(first);
859
860 nir_instr_remove(second->instr);
861 }
862
863 static void
864 vectorize_stores(nir_builder *b, struct vectorize_ctx *ctx,
865 struct entry *low, struct entry *high,
866 struct entry *first, struct entry *second,
867 unsigned new_bit_size, unsigned new_num_components,
868 unsigned high_start)
869 {
870 ASSERTED unsigned low_size = low->intrin->num_components * get_bit_size(low);
871 assert(low_size % new_bit_size == 0);
872
873 b->cursor = nir_before_instr(second->instr);
874
875 /* get new writemasks */
876 uint32_t low_write_mask = nir_intrinsic_write_mask(low->intrin);
877 uint32_t high_write_mask = nir_intrinsic_write_mask(high->intrin);
878 low_write_mask = update_writemask(low_write_mask, get_bit_size(low), new_bit_size);
879 high_write_mask = update_writemask(high_write_mask, get_bit_size(high), new_bit_size);
880 high_write_mask <<= high_start / new_bit_size;
881
882 uint32_t write_mask = low_write_mask | high_write_mask;
883
884 /* convert booleans */
885 nir_ssa_def *low_val = low->intrin->src[low->info->value_src].ssa;
886 nir_ssa_def *high_val = high->intrin->src[high->info->value_src].ssa;
887 low_val = low_val->bit_size == 1 ? nir_b2i(b, low_val, 32) : low_val;
888 high_val = high_val->bit_size == 1 ? nir_b2i(b, high_val, 32) : high_val;
889
890 /* combine the data */
891 nir_ssa_def *data_channels[NIR_MAX_VEC_COMPONENTS];
892 for (unsigned i = 0; i < new_num_components; i++) {
893 bool set_low = low_write_mask & (1 << i);
894 bool set_high = high_write_mask & (1 << i);
895
896 if (set_low && (!set_high || low == second)) {
897 unsigned offset = i * new_bit_size;
898 data_channels[i] = nir_extract_bits(b, &low_val, 1, offset, 1, new_bit_size);
899 } else if (set_high) {
900 assert(!set_low || high == second);
901 unsigned offset = i * new_bit_size - high_start;
902 data_channels[i] = nir_extract_bits(b, &high_val, 1, offset, 1, new_bit_size);
903 } else {
904 data_channels[i] = nir_ssa_undef(b, 1, new_bit_size);
905 }
906 }
907 nir_ssa_def *data = nir_vec(b, data_channels, new_num_components);
908
909 /* update the intrinsic */
910 nir_intrinsic_set_write_mask(second->intrin, write_mask);
911 second->intrin->num_components = data->num_components;
912
913 const struct intrinsic_info *info = second->info;
914 assert(info->value_src >= 0);
915 nir_instr_rewrite_src(second->instr, &second->intrin->src[info->value_src],
916 nir_src_for_ssa(data));
917
918 /* update the offset */
919 if (second != low && info->base_src >= 0)
920 nir_instr_rewrite_src(second->instr, &second->intrin->src[info->base_src],
921 low->intrin->src[info->base_src]);
922
923 /* update the deref */
924 if (info->deref_src >= 0) {
925 b->cursor = nir_before_instr(second->instr);
926 second->deref = cast_deref(b, new_num_components, new_bit_size,
927 nir_src_as_deref(low->intrin->src[info->deref_src]));
928 nir_instr_rewrite_src(second->instr, &second->intrin->src[info->deref_src],
929 nir_src_for_ssa(&second->deref->dest.ssa));
930 }
931
932 /* update base/align */
933 if (second != low && nir_intrinsic_has_base(second->intrin))
934 nir_intrinsic_set_base(second->intrin, nir_intrinsic_base(low->intrin));
935
936 second->key = low->key;
937 second->offset = low->offset;
938 second->best_align = get_best_align(low);
939
940 update_align(second);
941
942 list_del(&first->head);
943 nir_instr_remove(first->instr);
944 }
945
946 /* Returns true if it can prove that "a" and "b" point to different resources. */
947 static bool
948 resources_different(nir_ssa_def *a, nir_ssa_def *b)
949 {
950 if (!a || !b)
951 return false;
952
953 if (a->parent_instr->type == nir_instr_type_load_const &&
954 b->parent_instr->type == nir_instr_type_load_const) {
955 return nir_src_as_uint(nir_src_for_ssa(a)) != nir_src_as_uint(nir_src_for_ssa(b));
956 }
957
958 if (a->parent_instr->type == nir_instr_type_intrinsic &&
959 b->parent_instr->type == nir_instr_type_intrinsic) {
960 nir_intrinsic_instr *aintrin = nir_instr_as_intrinsic(a->parent_instr);
961 nir_intrinsic_instr *bintrin = nir_instr_as_intrinsic(b->parent_instr);
962 if (aintrin->intrinsic == nir_intrinsic_vulkan_resource_index &&
963 bintrin->intrinsic == nir_intrinsic_vulkan_resource_index) {
964 return nir_intrinsic_desc_set(aintrin) != nir_intrinsic_desc_set(bintrin) ||
965 nir_intrinsic_binding(aintrin) != nir_intrinsic_binding(bintrin) ||
966 resources_different(aintrin->src[0].ssa, bintrin->src[0].ssa);
967 }
968 }
969
970 return false;
971 }
972
973 static int64_t
974 compare_entries(struct entry *a, struct entry *b)
975 {
976 if (!entry_key_equals(a->key, b->key))
977 return INT64_MAX;
978 return b->offset_signed - a->offset_signed;
979 }
980
981 static bool
982 may_alias(struct entry *a, struct entry *b)
983 {
984 assert(mode_to_index(get_variable_mode(a)) ==
985 mode_to_index(get_variable_mode(b)));
986
987 /* if the resources/variables are definitively different and both have
988 * ACCESS_RESTRICT, we can assume they do not alias. */
989 bool res_different = a->key->var != b->key->var ||
990 resources_different(a->key->resource, b->key->resource);
991 if (res_different && (a->access & ACCESS_RESTRICT) && (b->access & ACCESS_RESTRICT))
992 return false;
993
994 /* we can't compare offsets if the resources/variables might be different */
995 if (a->key->var != b->key->var || a->key->resource != b->key->resource)
996 return true;
997
998 /* use adjacency information */
999 /* TODO: we can look closer at the entry keys */
1000 int64_t diff = compare_entries(a, b);
1001 if (diff != INT64_MAX) {
1002 /* with atomics, intrin->num_components can be 0 */
1003 if (diff < 0)
1004 return llabs(diff) < MAX2(b->intrin->num_components, 1u) * (get_bit_size(b) / 8u);
1005 else
1006 return diff < MAX2(a->intrin->num_components, 1u) * (get_bit_size(a) / 8u);
1007 }
1008
1009 /* TODO: we can use deref information */
1010
1011 return true;
1012 }
1013
1014 static bool
1015 check_for_aliasing(struct vectorize_ctx *ctx, struct entry *first, struct entry *second)
1016 {
1017 nir_variable_mode mode = get_variable_mode(first);
1018 if (mode & (nir_var_uniform | nir_var_system_value |
1019 nir_var_mem_push_const | nir_var_mem_ubo))
1020 return false;
1021
1022 unsigned mode_index = mode_to_index(mode);
1023 if (first->is_store) {
1024 /* find first entry that aliases "first" */
1025 list_for_each_entry_from(struct entry, next, first, &ctx->entries[mode_index], head) {
1026 if (next == first)
1027 continue;
1028 if (next == second)
1029 return false;
1030 if (may_alias(first, next))
1031 return true;
1032 }
1033 } else {
1034 /* find previous store that aliases this load */
1035 list_for_each_entry_from_rev(struct entry, prev, second, &ctx->entries[mode_index], head) {
1036 if (prev == second)
1037 continue;
1038 if (prev == first)
1039 return false;
1040 if (prev->is_store && may_alias(second, prev))
1041 return true;
1042 }
1043 }
1044
1045 return false;
1046 }
1047
1048 static bool
1049 check_for_robustness(struct vectorize_ctx *ctx, struct entry *low)
1050 {
1051 nir_variable_mode mode = get_variable_mode(low);
1052 if (mode & ctx->robust_modes) {
1053 unsigned low_bit_size = get_bit_size(low);
1054 unsigned low_size = low->intrin->num_components * low_bit_size;
1055
1056 /* don't attempt to vectorize accesses if the offset can overflow. */
1057 /* TODO: handle indirect accesses. */
1058 return low->offset_signed < 0 && low->offset_signed + low_size >= 0;
1059 }
1060
1061 return false;
1062 }
1063
1064 static bool
1065 is_strided_vector(const struct glsl_type *type)
1066 {
1067 if (glsl_type_is_vector(type)) {
1068 unsigned explicit_stride = glsl_get_explicit_stride(type);
1069 return explicit_stride != 0 && explicit_stride !=
1070 type_scalar_size_bytes(glsl_get_array_element(type));
1071 } else {
1072 return false;
1073 }
1074 }
1075
1076 static bool
1077 try_vectorize(nir_function_impl *impl, struct vectorize_ctx *ctx,
1078 struct entry *low, struct entry *high,
1079 struct entry *first, struct entry *second)
1080 {
1081 if (!(get_variable_mode(first) & ctx->modes) ||
1082 !(get_variable_mode(second) & ctx->modes))
1083 return false;
1084
1085 if (check_for_aliasing(ctx, first, second))
1086 return false;
1087
1088 if (check_for_robustness(ctx, low))
1089 return false;
1090
1091 /* we can only vectorize non-volatile loads/stores of the same type and with
1092 * the same access */
1093 if (first->info != second->info || first->access != second->access ||
1094 (first->access & ACCESS_VOLATILE) || first->info->is_atomic)
1095 return false;
1096
1097 /* don't attempt to vectorize accesses of row-major matrix columns */
1098 if (first->deref) {
1099 const struct glsl_type *first_type = first->deref->type;
1100 const struct glsl_type *second_type = second->deref->type;
1101 if (is_strided_vector(first_type) || is_strided_vector(second_type))
1102 return false;
1103 }
1104
1105 /* gather information */
1106 uint64_t diff = high->offset_signed - low->offset_signed;
1107 unsigned low_bit_size = get_bit_size(low);
1108 unsigned high_bit_size = get_bit_size(high);
1109 unsigned low_size = low->intrin->num_components * low_bit_size;
1110 unsigned high_size = high->intrin->num_components * high_bit_size;
1111 unsigned new_size = MAX2(diff * 8u + high_size, low_size);
1112
1113 /* find a good bit size for the new load/store */
1114 unsigned new_bit_size = 0;
1115 if (new_bitsize_acceptable(ctx, low_bit_size, low, high, new_size)) {
1116 new_bit_size = low_bit_size;
1117 } else if (low_bit_size != high_bit_size &&
1118 new_bitsize_acceptable(ctx, high_bit_size, low, high, new_size)) {
1119 new_bit_size = high_bit_size;
1120 } else {
1121 new_bit_size = 64;
1122 for (; new_bit_size >= 8; new_bit_size /= 2) {
1123 /* don't repeat trying out bitsizes */
1124 if (new_bit_size == low_bit_size || new_bit_size == high_bit_size)
1125 continue;
1126 if (new_bitsize_acceptable(ctx, new_bit_size, low, high, new_size))
1127 break;
1128 }
1129 if (new_bit_size < 8)
1130 return false;
1131 }
1132 unsigned new_num_components = new_size / new_bit_size;
1133
1134 /* vectorize the loads/stores */
1135 nir_builder b;
1136 nir_builder_init(&b, impl);
1137
1138 if (first->is_store)
1139 vectorize_stores(&b, ctx, low, high, first, second,
1140 new_bit_size, new_num_components, diff * 8u);
1141 else
1142 vectorize_loads(&b, ctx, low, high, first, second,
1143 new_bit_size, new_num_components, diff * 8u);
1144
1145 return true;
1146 }
1147
1148 static bool
1149 vectorize_entries(struct vectorize_ctx *ctx, nir_function_impl *impl, struct hash_table *ht)
1150 {
1151 if (!ht)
1152 return false;
1153
1154 bool progress = false;
1155 hash_table_foreach(ht, entry) {
1156 struct util_dynarray *arr = entry->data;
1157 if (!arr->size)
1158 continue;
1159
1160 qsort(util_dynarray_begin(arr),
1161 util_dynarray_num_elements(arr, struct entry *),
1162 sizeof(struct entry *), &sort_entries);
1163
1164 unsigned i = 0;
1165 for (; i < util_dynarray_num_elements(arr, struct entry*) - 1; i++) {
1166 struct entry *low = *util_dynarray_element(arr, struct entry *, i);
1167 struct entry *high = *util_dynarray_element(arr, struct entry *, i + 1);
1168
1169 uint64_t diff = high->offset_signed - low->offset_signed;
1170 if (diff > get_bit_size(low) / 8u * low->intrin->num_components) {
1171 progress |= update_align(low);
1172 continue;
1173 }
1174
1175 struct entry *first = low->index < high->index ? low : high;
1176 struct entry *second = low->index < high->index ? high : low;
1177
1178 if (try_vectorize(impl, ctx, low, high, first, second)) {
1179 *util_dynarray_element(arr, struct entry *, i) = NULL;
1180 *util_dynarray_element(arr, struct entry *, i + 1) = low->is_store ? second : first;
1181 progress = true;
1182 } else {
1183 progress |= update_align(low);
1184 }
1185 }
1186
1187 struct entry *last = *util_dynarray_element(arr, struct entry *, i);
1188 progress |= update_align(last);
1189 }
1190
1191 _mesa_hash_table_clear(ht, delete_entry_dynarray);
1192
1193 return progress;
1194 }
1195
1196 static bool
1197 handle_barrier(struct vectorize_ctx *ctx, bool *progress, nir_function_impl *impl, nir_instr *instr)
1198 {
1199 unsigned modes = 0;
1200 bool acquire = true;
1201 bool release = true;
1202 if (instr->type == nir_instr_type_intrinsic) {
1203 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1204 switch (intrin->intrinsic) {
1205 case nir_intrinsic_group_memory_barrier:
1206 case nir_intrinsic_memory_barrier:
1207 modes = nir_var_mem_ssbo | nir_var_mem_shared | nir_var_mem_global;
1208 break;
1209 /* prevent speculative loads/stores */
1210 case nir_intrinsic_discard_if:
1211 case nir_intrinsic_discard:
1212 modes = nir_var_all;
1213 break;
1214 case nir_intrinsic_memory_barrier_buffer:
1215 modes = nir_var_mem_ssbo | nir_var_mem_global;
1216 break;
1217 case nir_intrinsic_memory_barrier_shared:
1218 modes = nir_var_mem_shared;
1219 break;
1220 case nir_intrinsic_scoped_barrier:
1221 if (nir_intrinsic_memory_scope(intrin) == NIR_SCOPE_NONE)
1222 break;
1223
1224 modes = nir_intrinsic_memory_modes(intrin) & (nir_var_mem_ssbo |
1225 nir_var_mem_shared |
1226 nir_var_mem_global);
1227 acquire = nir_intrinsic_memory_semantics(intrin) & NIR_MEMORY_ACQUIRE;
1228 release = nir_intrinsic_memory_semantics(intrin) & NIR_MEMORY_RELEASE;
1229 switch (nir_intrinsic_memory_scope(intrin)) {
1230 case NIR_SCOPE_INVOCATION:
1231 case NIR_SCOPE_SUBGROUP:
1232 /* a barier should never be required for correctness with these scopes */
1233 modes = 0;
1234 break;
1235 default:
1236 break;
1237 }
1238 break;
1239 default:
1240 return false;
1241 }
1242 } else if (instr->type == nir_instr_type_call) {
1243 modes = nir_var_all;
1244 } else {
1245 return false;
1246 }
1247
1248 while (modes) {
1249 unsigned mode_index = u_bit_scan(&modes);
1250 if ((1 << mode_index) == nir_var_mem_global) {
1251 /* Global should be rolled in with SSBO */
1252 assert(list_is_empty(&ctx->entries[mode_index]));
1253 assert(ctx->loads[mode_index] == NULL);
1254 assert(ctx->stores[mode_index] == NULL);
1255 continue;
1256 }
1257
1258 if (acquire)
1259 *progress |= vectorize_entries(ctx, impl, ctx->loads[mode_index]);
1260 if (release)
1261 *progress |= vectorize_entries(ctx, impl, ctx->stores[mode_index]);
1262 }
1263
1264 return true;
1265 }
1266
1267 static bool
1268 process_block(nir_function_impl *impl, struct vectorize_ctx *ctx, nir_block *block)
1269 {
1270 bool progress = false;
1271
1272 for (unsigned i = 0; i < nir_num_variable_modes; i++) {
1273 list_inithead(&ctx->entries[i]);
1274 if (ctx->loads[i])
1275 _mesa_hash_table_clear(ctx->loads[i], delete_entry_dynarray);
1276 if (ctx->stores[i])
1277 _mesa_hash_table_clear(ctx->stores[i], delete_entry_dynarray);
1278 }
1279
1280 /* create entries */
1281 unsigned next_index = 0;
1282
1283 nir_foreach_instr_safe(instr, block) {
1284 if (handle_barrier(ctx, &progress, impl, instr))
1285 continue;
1286
1287 /* gather information */
1288 if (instr->type != nir_instr_type_intrinsic)
1289 continue;
1290 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1291
1292 const struct intrinsic_info *info = get_info(intrin->intrinsic);
1293 if (!info)
1294 continue;
1295
1296 nir_variable_mode mode = info->mode;
1297 if (!mode)
1298 mode = nir_src_as_deref(intrin->src[info->deref_src])->mode;
1299 if (!(mode & aliasing_modes(ctx->modes)))
1300 continue;
1301 unsigned mode_index = mode_to_index(mode);
1302
1303 /* create entry */
1304 struct entry *entry = create_entry(ctx, info, intrin);
1305 entry->index = next_index++;
1306
1307 list_addtail(&entry->head, &ctx->entries[mode_index]);
1308
1309 /* add the entry to a hash table */
1310
1311 struct hash_table *adj_ht = NULL;
1312 if (entry->is_store) {
1313 if (!ctx->stores[mode_index])
1314 ctx->stores[mode_index] = _mesa_hash_table_create(ctx, &hash_entry_key, &entry_key_equals);
1315 adj_ht = ctx->stores[mode_index];
1316 } else {
1317 if (!ctx->loads[mode_index])
1318 ctx->loads[mode_index] = _mesa_hash_table_create(ctx, &hash_entry_key, &entry_key_equals);
1319 adj_ht = ctx->loads[mode_index];
1320 }
1321
1322 uint32_t key_hash = hash_entry_key(entry->key);
1323 struct hash_entry *adj_entry = _mesa_hash_table_search_pre_hashed(adj_ht, key_hash, entry->key);
1324 struct util_dynarray *arr;
1325 if (adj_entry && adj_entry->data) {
1326 arr = (struct util_dynarray *)adj_entry->data;
1327 } else {
1328 arr = ralloc(ctx, struct util_dynarray);
1329 util_dynarray_init(arr, arr);
1330 _mesa_hash_table_insert_pre_hashed(adj_ht, key_hash, entry->key, arr);
1331 }
1332 util_dynarray_append(arr, struct entry *, entry);
1333 }
1334
1335 /* sort and combine entries */
1336 for (unsigned i = 0; i < nir_num_variable_modes; i++) {
1337 progress |= vectorize_entries(ctx, impl, ctx->loads[i]);
1338 progress |= vectorize_entries(ctx, impl, ctx->stores[i]);
1339 }
1340
1341 return progress;
1342 }
1343
1344 bool
1345 nir_opt_load_store_vectorize(nir_shader *shader, nir_variable_mode modes,
1346 nir_should_vectorize_mem_func callback,
1347 nir_variable_mode robust_modes)
1348 {
1349 bool progress = false;
1350
1351 struct vectorize_ctx *ctx = rzalloc(NULL, struct vectorize_ctx);
1352 ctx->modes = modes;
1353 ctx->callback = callback;
1354 ctx->robust_modes = robust_modes;
1355
1356 nir_shader_index_vars(shader, modes);
1357
1358 nir_foreach_function(function, shader) {
1359 if (function->impl) {
1360 if (modes & nir_var_function_temp)
1361 nir_function_impl_index_vars(function->impl);
1362
1363 nir_foreach_block(block, function->impl)
1364 progress |= process_block(function->impl, ctx, block);
1365
1366 nir_metadata_preserve(function->impl,
1367 nir_metadata_block_index |
1368 nir_metadata_dominance |
1369 nir_metadata_live_ssa_defs);
1370 }
1371 }
1372
1373 ralloc_free(ctx);
1374 return progress;
1375 }