src/compiler/nir/nir_opt_peephole_select.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Jason Ekstrand (jason@jlekstrand.net)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow.h"
  30
  31 /*
  32  * Implements a small peephole optimization that looks for
  33  *
  34  * if (cond) {
  35  *    <then SSA defs>
  36  * } else {
  37  *    <else SSA defs>
  38  * }
  39  * phi
  40  * ...
  41  * phi
  42  *
  43  * and replaces it with:
  44  *
  45  * <then SSA defs>
  46  * <else SSA defs>
  47  * bcsel
  48  * ...
  49  * bcsel
  50  *
  51  * where the SSA defs are ALU operations or other cheap instructions (not
  52  * texturing, for example).
  53  *
  54  * If the number of ALU operations in the branches is greater than the limit
  55  * parameter, then the optimization is skipped.  In limit=0 mode, the SSA defs
  56  * must only be MOVs which we expect to get copy-propagated away once they're
  57  * out of the inner blocks.
  58  */
  59
  60 static bool
  61 block_check_for_allowed_instrs(nir_block *block, unsigned *count, bool alu_ok)
  62 {
  63    nir_foreach_instr(instr, block) {
  64       switch (instr->type) {
  65       case nir_instr_type_intrinsic: {
  66          nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
  67
  68          switch (intrin->intrinsic) {
  69          case nir_intrinsic_load_var:
  70             switch (intrin->variables[0]->var->data.mode) {
  71             case nir_var_shader_in:
  72             case nir_var_uniform:
  73                break;
  74
  75             default:
  76                return false;
  77             }
  78             break;
  79
  80          case nir_intrinsic_load_deref:
  81             switch (nir_src_as_deref(intrin->src[0])->mode) {
  82             case nir_var_shader_in:
  83             case nir_var_uniform:
  84                break;
  85
  86             default:
  87                return false;
  88             }
  89             break;
  90
  91          case nir_intrinsic_load_uniform:
  92             if (!alu_ok)
  93                return false;
  94             break;
  95
  96          default:
  97             return false;
  98          }
  99
 100          break;
 101       }
 102
 103       case nir_instr_type_load_const:
 104          break;
 105
 106       case nir_instr_type_alu: {
 107          nir_alu_instr *mov = nir_instr_as_alu(instr);
 108          switch (mov->op) {
 109          case nir_op_fmov:
 110          case nir_op_imov:
 111          case nir_op_fneg:
 112          case nir_op_ineg:
 113          case nir_op_fabs:
 114          case nir_op_iabs:
 115          case nir_op_vec2:
 116          case nir_op_vec3:
 117          case nir_op_vec4:
 118             break;
 119          default:
 120             if (!alu_ok) {
 121                /* It must be a move-like operation. */
 122                return false;
 123             }
 124             break;
 125          }
 126
 127          /* It must be SSA */
 128          if (!mov->dest.dest.is_ssa)
 129             return false;
 130
 131          if (alu_ok) {
 132             (*count)++;
 133          } else {
 134             /* Can't handle saturate */
 135             if (mov->dest.saturate)
 136                return false;
 137
 138             /* It cannot have any if-uses */
 139             if (!list_empty(&mov->dest.dest.ssa.if_uses))
 140                return false;
 141
 142             /* The only uses of this definition must be phis in the successor */
 143             nir_foreach_use(use, &mov->dest.dest.ssa) {
 144                if (use->parent_instr->type != nir_instr_type_phi ||
 145                    use->parent_instr->block != block->successors[0])
 146                   return false;
 147             }
 148          }
 149          break;
 150       }
 151
 152       default:
 153          return false;
 154       }
 155    }
 156
 157    return true;
 158 }
 159
 160 static bool
 161 nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
 162                               unsigned limit)
 163 {
 164    if (nir_cf_node_is_first(&block->cf_node))
 165       return false;
 166
 167    nir_cf_node *prev_node = nir_cf_node_prev(&block->cf_node);
 168    if (prev_node->type != nir_cf_node_if)
 169       return false;
 170
 171    nir_if *if_stmt = nir_cf_node_as_if(prev_node);
 172    nir_block *then_block = nir_if_first_then_block(if_stmt);
 173    nir_block *else_block = nir_if_first_else_block(if_stmt);
 174
 175    /* We can only have one block in each side ... */
 176    if (nir_if_last_then_block(if_stmt) != then_block ||
 177        nir_if_last_else_block(if_stmt) != else_block)
 178       return false;
 179
 180    /* ... and those blocks must only contain "allowed" instructions. */
 181    unsigned count = 0;
 182    if (!block_check_for_allowed_instrs(then_block, &count, limit != 0) ||
 183        !block_check_for_allowed_instrs(else_block, &count, limit != 0))
 184       return false;
 185
 186    if (count > limit)
 187       return false;
 188
 189    /* At this point, we know that the previous CFG node is an if-then
 190     * statement containing only moves to phi nodes in this block.  We can
 191     * just remove that entire CF node and replace all of the phi nodes with
 192     * selects.
 193     */
 194
 195    nir_block *prev_block = nir_cf_node_as_block(nir_cf_node_prev(prev_node));
 196
 197    /* First, we move the remaining instructions from the blocks to the
 198     * block before.  We have already guaranteed that this is safe by
 199     * calling block_check_for_allowed_instrs()
 200     */
 201    nir_foreach_instr_safe(instr, then_block) {
 202       exec_node_remove(&instr->node);
 203       instr->block = prev_block;
 204       exec_list_push_tail(&prev_block->instr_list, &instr->node);
 205    }
 206
 207    nir_foreach_instr_safe(instr, else_block) {
 208       exec_node_remove(&instr->node);
 209       instr->block = prev_block;
 210       exec_list_push_tail(&prev_block->instr_list, &instr->node);
 211    }
 212
 213    nir_foreach_instr_safe(instr, block) {
 214       if (instr->type != nir_instr_type_phi)
 215          break;
 216
 217       nir_phi_instr *phi = nir_instr_as_phi(instr);
 218       nir_alu_instr *sel = nir_alu_instr_create(shader, nir_op_bcsel);
 219       nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel);
 220       /* Splat the condition to all channels */
 221       memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle);
 222
 223       assert(exec_list_length(&phi->srcs) == 2);
 224       nir_foreach_phi_src(src, phi) {
 225          assert(src->pred == then_block || src->pred == else_block);
 226          assert(src->src.is_ssa);
 227
 228          unsigned idx = src->pred == then_block ? 1 : 2;
 229          nir_src_copy(&sel->src[idx].src, &src->src, sel);
 230       }
 231
 232       nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
 233                         phi->dest.ssa.num_components,
 234                         phi->dest.ssa.bit_size, phi->dest.ssa.name);
 235       sel->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
 236
 237       nir_ssa_def_rewrite_uses(&phi->dest.ssa,
 238                                nir_src_for_ssa(&sel->dest.dest.ssa));
 239
 240       nir_instr_insert_before(&phi->instr, &sel->instr);
 241       nir_instr_remove(&phi->instr);
 242    }
 243
 244    nir_cf_node_remove(&if_stmt->cf_node);
 245    return true;
 246 }
 247
 248 static bool
 249 nir_opt_peephole_select_impl(nir_function_impl *impl, unsigned limit)
 250 {
 251    nir_shader *shader = impl->function->shader;
 252    bool progress = false;
 253
 254    nir_foreach_block_safe(block, impl) {
 255       progress |= nir_opt_peephole_select_block(block, shader, limit);
 256    }
 257
 258    if (progress)
 259       nir_metadata_preserve(impl, nir_metadata_none);
 260
 261    return progress;
 262 }
 263
 264 bool
 265 nir_opt_peephole_select(nir_shader *shader, unsigned limit)
 266 {
 267    bool progress = false;
 268
 269    nir_foreach_function(function, shader) {
 270       if (function->impl)
 271          progress |= nir_opt_peephole_select_impl(function->impl, limit);
 272    }
 273
 274    return progress;
 275 }