src/gallium/auxiliary/gallivm/lp_bld_nir.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2019 Red Hat.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  **************************************************************************/
  25
  26 #include "lp_bld_nir.h"
  27 #include "lp_bld_arit.h"
  28 #include "lp_bld_bitarit.h"
  29 #include "lp_bld_const.h"
  30 #include "lp_bld_gather.h"
  31 #include "lp_bld_logic.h"
  32 #include "lp_bld_quad.h"
  33 #include "lp_bld_flow.h"
  34 #include "lp_bld_struct.h"
  35 #include "lp_bld_debug.h"
  36 #include "lp_bld_printf.h"
  37 #include "nir_deref.h"
  38
  39 static void visit_cf_list(struct lp_build_nir_context *bld_base,
  40                           struct exec_list *list);
  41
  42 static LLVMValueRef cast_type(struct lp_build_nir_context *bld_base, LLVMValueRef val,
  43                               nir_alu_type alu_type, unsigned bit_size)
  44 {
  45    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
  46    switch (alu_type) {
  47    case nir_type_float:
  48       switch (bit_size) {
  49       case 32:
  50          return LLVMBuildBitCast(builder, val, bld_base->base.vec_type, "");
  51       case 64:
  52          return LLVMBuildBitCast(builder, val, bld_base->dbl_bld.vec_type, "");
  53       default:
  54          assert(0);
  55          break;
  56       }
  57       break;
  58    case nir_type_int:
  59       switch (bit_size) {
  60       case 8:
  61          return LLVMBuildBitCast(builder, val, bld_base->int8_bld.vec_type, "");
  62       case 16:
  63          return LLVMBuildBitCast(builder, val, bld_base->int16_bld.vec_type, "");
  64       case 32:
  65          return LLVMBuildBitCast(builder, val, bld_base->int_bld.vec_type, "");
  66       case 64:
  67          return LLVMBuildBitCast(builder, val, bld_base->int64_bld.vec_type, "");
  68       default:
  69          assert(0);
  70          break;
  71       }
  72       break;
  73    case nir_type_uint:
  74       switch (bit_size) {
  75       case 8:
  76          return LLVMBuildBitCast(builder, val, bld_base->uint8_bld.vec_type, "");
  77       case 16:
  78          return LLVMBuildBitCast(builder, val, bld_base->uint16_bld.vec_type, "");
  79       case 32:
  80          return LLVMBuildBitCast(builder, val, bld_base->uint_bld.vec_type, "");
  81       case 64:
  82          return LLVMBuildBitCast(builder, val, bld_base->uint64_bld.vec_type, "");
  83       default:
  84          assert(0);
  85          break;
  86       }
  87       break;
  88    case nir_type_uint32:
  89       return LLVMBuildBitCast(builder, val, bld_base->uint_bld.vec_type, "");
  90    default:
  91       return val;
  92    }
  93    return NULL;
  94 }
  95
  96
  97 static struct lp_build_context *get_flt_bld(struct lp_build_nir_context *bld_base,
  98                                             unsigned op_bit_size)
  99 {
 100    if (op_bit_size == 64)
 101       return &bld_base->dbl_bld;
 102    else
 103       return &bld_base->base;
 104 }
 105
 106 static unsigned glsl_sampler_to_pipe(int sampler_dim, bool is_array)
 107 {
 108    unsigned pipe_target = PIPE_BUFFER;
 109    switch (sampler_dim) {
 110    case GLSL_SAMPLER_DIM_1D:
 111       pipe_target = is_array ? PIPE_TEXTURE_1D_ARRAY : PIPE_TEXTURE_1D;
 112       break;
 113    case GLSL_SAMPLER_DIM_2D:
 114       pipe_target = is_array ? PIPE_TEXTURE_2D_ARRAY : PIPE_TEXTURE_2D;
 115       break;
 116    case GLSL_SAMPLER_DIM_3D:
 117       pipe_target = PIPE_TEXTURE_3D;
 118       break;
 119    case GLSL_SAMPLER_DIM_CUBE:
 120       pipe_target = is_array ? PIPE_TEXTURE_CUBE_ARRAY : PIPE_TEXTURE_CUBE;
 121       break;
 122    case GLSL_SAMPLER_DIM_RECT:
 123       pipe_target = PIPE_TEXTURE_RECT;
 124       break;
 125    case GLSL_SAMPLER_DIM_BUF:
 126       pipe_target = PIPE_BUFFER;
 127       break;
 128    default:
 129       break;
 130    }
 131    return pipe_target;
 132 }
 133
 134 static LLVMValueRef get_ssa_src(struct lp_build_nir_context *bld_base, nir_ssa_def *ssa)
 135 {
 136    return bld_base->ssa_defs[ssa->index];
 137 }
 138
 139 static LLVMValueRef get_src(struct lp_build_nir_context *bld_base, nir_src src);
 140
 141 static LLVMValueRef get_reg_src(struct lp_build_nir_context *bld_base, nir_reg_src src)
 142 {
 143    struct hash_entry *entry = _mesa_hash_table_search(bld_base->regs, src.reg);
 144    LLVMValueRef reg_storage = (LLVMValueRef)entry->data;
 145    struct lp_build_context *reg_bld = get_int_bld(bld_base, true, src.reg->bit_size);
 146    LLVMValueRef indir_src = NULL;
 147    if (src.indirect)
 148       indir_src = get_src(bld_base, *src.indirect);
 149    return bld_base->load_reg(bld_base, reg_bld, &src, indir_src, reg_storage);
 150 }
 151
 152 static LLVMValueRef get_src(struct lp_build_nir_context *bld_base, nir_src src)
 153 {
 154    if (src.is_ssa)
 155       return get_ssa_src(bld_base, src.ssa);
 156    else
 157       return get_reg_src(bld_base, src.reg);
 158 }
 159
 160 static void assign_ssa(struct lp_build_nir_context *bld_base, int idx, LLVMValueRef ptr)
 161 {
 162    bld_base->ssa_defs[idx] = ptr;
 163 }
 164
 165 static void assign_ssa_dest(struct lp_build_nir_context *bld_base, const nir_ssa_def *ssa,
 166                             LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 167 {
 168    assign_ssa(bld_base, ssa->index, ssa->num_components == 1 ? vals[0] : lp_nir_array_build_gather_values(bld_base->base.gallivm->builder, vals, ssa->num_components));
 169 }
 170
 171 static void assign_reg(struct lp_build_nir_context *bld_base, const nir_reg_dest *reg,
 172                        unsigned write_mask,
 173                        LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 174 {
 175    struct hash_entry *entry = _mesa_hash_table_search(bld_base->regs, reg->reg);
 176    LLVMValueRef reg_storage = (LLVMValueRef)entry->data;
 177    struct lp_build_context *reg_bld = get_int_bld(bld_base, true, reg->reg->bit_size);
 178    LLVMValueRef indir_src = NULL;
 179    if (reg->indirect)
 180       indir_src = get_src(bld_base, *reg->indirect);
 181    bld_base->store_reg(bld_base, reg_bld, reg, write_mask ? write_mask : 0xf, indir_src, reg_storage, vals);
 182 }
 183
 184 static void assign_dest(struct lp_build_nir_context *bld_base, const nir_dest *dest, LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 185 {
 186    if (dest->is_ssa)
 187       assign_ssa_dest(bld_base, &dest->ssa, vals);
 188    else
 189       assign_reg(bld_base, &dest->reg, 0, vals);
 190 }
 191
 192 static void assign_alu_dest(struct lp_build_nir_context *bld_base, const nir_alu_dest *dest, LLVMValueRef vals[NIR_MAX_VEC_COMPONENTS])
 193 {
 194    if (dest->dest.is_ssa)
 195       assign_ssa_dest(bld_base, &dest->dest.ssa, vals);
 196    else
 197       assign_reg(bld_base, &dest->dest.reg, dest->write_mask, vals);
 198 }
 199
 200 static LLVMValueRef int_to_bool32(struct lp_build_nir_context *bld_base,
 201                                 uint32_t src_bit_size,
 202                                 bool is_unsigned,
 203                                 LLVMValueRef val)
 204 {
 205    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 206    struct lp_build_context *int_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
 207    LLVMValueRef result = lp_build_compare(bld_base->base.gallivm, int_bld->type, PIPE_FUNC_NOTEQUAL, val, int_bld->zero);
 208    if (src_bit_size == 64)
 209       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 210    return result;
 211 }
 212
 213 static LLVMValueRef flt_to_bool32(struct lp_build_nir_context *bld_base,
 214                                   uint32_t src_bit_size,
 215                                   LLVMValueRef val)
 216 {
 217    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 218    struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size);
 219    LLVMValueRef result = lp_build_cmp(flt_bld, PIPE_FUNC_NOTEQUAL, val, flt_bld->zero);
 220    if (src_bit_size == 64)
 221       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 222    return result;
 223 }
 224
 225 static LLVMValueRef fcmp32(struct lp_build_nir_context *bld_base,
 226                            enum pipe_compare_func compare,
 227                            uint32_t src_bit_size,
 228                            LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 229 {
 230    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 231    struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size);
 232    LLVMValueRef result;
 233
 234    if (compare != PIPE_FUNC_NOTEQUAL)
 235       result = lp_build_cmp_ordered(flt_bld, compare, src[0], src[1]);
 236    else
 237       result = lp_build_cmp(flt_bld, compare, src[0], src[1]);
 238    if (src_bit_size == 64)
 239       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 240    return result;
 241 }
 242
 243 static LLVMValueRef icmp32(struct lp_build_nir_context *bld_base,
 244                            enum pipe_compare_func compare,
 245                            bool is_unsigned,
 246                            uint32_t src_bit_size,
 247                            LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 248 {
 249    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 250    struct lp_build_context *i_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
 251    LLVMValueRef result = lp_build_cmp(i_bld, compare, src[0], src[1]);
 252    if (src_bit_size < 32)
 253       result = LLVMBuildSExt(builder, result, bld_base->int_bld.vec_type, "");
 254    else if (src_bit_size == 64)
 255       result = LLVMBuildTrunc(builder, result, bld_base->int_bld.vec_type, "");
 256    return result;
 257 }
 258
 259 static LLVMValueRef get_alu_src(struct lp_build_nir_context *bld_base,
 260                                 nir_alu_src src,
 261                                 unsigned num_components)
 262 {
 263    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 264    struct gallivm_state *gallivm = bld_base->base.gallivm;
 265    LLVMValueRef value = get_src(bld_base, src.src);
 266    bool need_swizzle = false;
 267
 268    assert(value);
 269    unsigned src_components = nir_src_num_components(src.src);
 270    for (unsigned i = 0; i < num_components; ++i) {
 271       assert(src.swizzle[i] < src_components);
 272       if (src.swizzle[i] != i)
 273          need_swizzle = true;
 274    }
 275
 276    if (need_swizzle || num_components != src_components) {
 277       if (src_components > 1 && num_components == 1) {
 278          value = LLVMBuildExtractValue(gallivm->builder, value,
 279                                        src.swizzle[0], "");
 280       } else if (src_components == 1 && num_components > 1) {
 281          LLVMValueRef values[] = {value, value, value, value, value, value, value, value, value, value, value, value, value, value, value, value};
 282          value = lp_nir_array_build_gather_values(builder, values, num_components);
 283       } else {
 284          LLVMValueRef arr = LLVMGetUndef(LLVMArrayType(LLVMTypeOf(LLVMBuildExtractValue(builder, value, 0, "")), num_components));
 285          for (unsigned i = 0; i < num_components; i++)
 286             arr = LLVMBuildInsertValue(builder, arr, LLVMBuildExtractValue(builder, value, src.swizzle[i], ""), i, "");
 287          value = arr;
 288       }
 289    }
 290    assert(!src.negate);
 291    assert(!src.abs);
 292    return value;
 293 }
 294
 295 static LLVMValueRef emit_b2f(struct lp_build_nir_context *bld_base,
 296                              LLVMValueRef src0,
 297                              unsigned bitsize)
 298 {
 299    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 300    LLVMValueRef result = LLVMBuildAnd(builder, cast_type(bld_base, src0, nir_type_int, 32),
 301                                       LLVMBuildBitCast(builder, lp_build_const_vec(bld_base->base.gallivm, bld_base->base.type,
 302                                                                                    1.0), bld_base->int_bld.vec_type, ""),
 303                                       "");
 304    result = LLVMBuildBitCast(builder, result, bld_base->base.vec_type, "");
 305    switch (bitsize) {
 306    case 32:
 307       break;
 308    case 64:
 309       result = LLVMBuildFPExt(builder, result, bld_base->dbl_bld.vec_type, "");
 310       break;
 311    default:
 312       unreachable("unsupported bit size.");
 313    }
 314    return result;
 315 }
 316
 317 static LLVMValueRef emit_b2i(struct lp_build_nir_context *bld_base,
 318                              LLVMValueRef src0,
 319                              unsigned bitsize)
 320 {
 321    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 322    LLVMValueRef result = LLVMBuildAnd(builder, cast_type(bld_base, src0, nir_type_int, 32),
 323                                       lp_build_const_int_vec(bld_base->base.gallivm, bld_base->base.type, 1), "");
 324    switch (bitsize) {
 325    case 32:
 326       return result;
 327    case 64:
 328       return LLVMBuildZExt(builder, result, bld_base->int64_bld.vec_type, "");
 329    default:
 330       unreachable("unsupported bit size.");
 331    }
 332 }
 333
 334 static LLVMValueRef emit_b32csel(struct lp_build_nir_context *bld_base,
 335                                unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS],
 336                                LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 337 {
 338    LLVMValueRef sel = cast_type(bld_base, src[0], nir_type_int, 32);
 339    LLVMValueRef v = lp_build_compare(bld_base->base.gallivm, bld_base->int_bld.type, PIPE_FUNC_NOTEQUAL, sel, bld_base->int_bld.zero);
 340    struct lp_build_context *bld = get_int_bld(bld_base, false, src_bit_size[1]);
 341    return lp_build_select(bld, v, src[1], src[2]);
 342 }
 343
 344 static LLVMValueRef split_64bit(struct lp_build_nir_context *bld_base,
 345                                 LLVMValueRef src,
 346                                 bool hi)
 347 {
 348    struct gallivm_state *gallivm = bld_base->base.gallivm;
 349    LLVMValueRef shuffles[LP_MAX_VECTOR_WIDTH/32];
 350    LLVMValueRef shuffles2[LP_MAX_VECTOR_WIDTH/32];
 351    int len = bld_base->base.type.length * 2;
 352    for (unsigned i = 0; i < bld_base->base.type.length; i++) {
 353       shuffles[i] = lp_build_const_int32(gallivm, i * 2);
 354       shuffles2[i] = lp_build_const_int32(gallivm, (i * 2) + 1);
 355    }
 356
 357    src = LLVMBuildBitCast(gallivm->builder, src, LLVMVectorType(LLVMInt32TypeInContext(gallivm->context), len), "");
 358    return LLVMBuildShuffleVector(gallivm->builder, src,
 359                                  LLVMGetUndef(LLVMTypeOf(src)),
 360                                  LLVMConstVector(hi ? shuffles2 : shuffles,
 361                                                  bld_base->base.type.length),
 362                                  "");
 363 }
 364
 365 static LLVMValueRef
 366 merge_64bit(struct lp_build_nir_context *bld_base,
 367             LLVMValueRef input,
 368             LLVMValueRef input2)
 369 {
 370    struct gallivm_state *gallivm = bld_base->base.gallivm;
 371    LLVMBuilderRef builder = gallivm->builder;
 372    int i;
 373    LLVMValueRef shuffles[2 * (LP_MAX_VECTOR_WIDTH/32)];
 374    int len = bld_base->base.type.length * 2;
 375    assert(len <= (2 * (LP_MAX_VECTOR_WIDTH/32)));
 376
 377    for (i = 0; i < bld_base->base.type.length * 2; i+=2) {
 378       shuffles[i] = lp_build_const_int32(gallivm, i / 2);
 379       shuffles[i + 1] = lp_build_const_int32(gallivm, i / 2 + bld_base->base.type.length);
 380    }
 381    return LLVMBuildShuffleVector(builder, input, input2, LLVMConstVector(shuffles, len), "");
 382 }
 383
 384 static LLVMValueRef
 385 do_int_divide(struct lp_build_nir_context *bld_base,
 386               bool is_unsigned, unsigned src_bit_size,
 387               LLVMValueRef src, LLVMValueRef src2)
 388 {
 389    struct gallivm_state *gallivm = bld_base->base.gallivm;
 390    LLVMBuilderRef builder = gallivm->builder;
 391    struct lp_build_context *int_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
 392    struct lp_build_context *mask_bld = get_int_bld(bld_base, true, src_bit_size);
 393    LLVMValueRef div_mask = lp_build_cmp(mask_bld, PIPE_FUNC_EQUAL, src2,
 394                                         mask_bld->zero);
 395
 396    if (!is_unsigned) {
 397       /* INT_MIN (0x80000000) / -1 (0xffffffff) causes sigfpe, seen with blender. */
 398       div_mask = LLVMBuildAnd(builder, div_mask, lp_build_const_int_vec(gallivm, int_bld->type, 0x7fffffff), "");
 399    }
 400    LLVMValueRef divisor = LLVMBuildOr(builder,
 401                                       div_mask,
 402                                       src2, "");
 403    LLVMValueRef result = lp_build_div(int_bld, src, divisor);
 404
 405    if (!is_unsigned) {
 406       LLVMValueRef not_div_mask = LLVMBuildNot(builder, div_mask, "");
 407       return LLVMBuildAnd(builder, not_div_mask, result, "");
 408    } else
 409       /* udiv by zero is guaranteed to return 0xffffffff at least with d3d10
 410        * may as well do same for idiv */
 411       return LLVMBuildOr(builder, div_mask, result, "");
 412 }
 413
 414 static LLVMValueRef
 415 do_int_mod(struct lp_build_nir_context *bld_base,
 416            bool is_unsigned, unsigned src_bit_size,
 417            LLVMValueRef src, LLVMValueRef src2)
 418 {
 419    struct gallivm_state *gallivm = bld_base->base.gallivm;
 420    LLVMBuilderRef builder = gallivm->builder;
 421    struct lp_build_context *int_bld = get_int_bld(bld_base, is_unsigned, src_bit_size);
 422    LLVMValueRef div_mask = lp_build_cmp(int_bld, PIPE_FUNC_EQUAL, src2,
 423                                         int_bld->zero);
 424    LLVMValueRef divisor = LLVMBuildOr(builder,
 425                                       div_mask,
 426                                       src2, "");
 427    LLVMValueRef result = lp_build_mod(int_bld, src, divisor);
 428    return LLVMBuildOr(builder, div_mask, result, "");
 429 }
 430
 431 static LLVMValueRef do_alu_action(struct lp_build_nir_context *bld_base,
 432                                   nir_op op, unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS], LLVMValueRef src[NIR_MAX_VEC_COMPONENTS])
 433 {
 434    struct gallivm_state *gallivm = bld_base->base.gallivm;
 435    LLVMBuilderRef builder = gallivm->builder;
 436    LLVMValueRef result;
 437    switch (op) {
 438    case nir_op_b2f32:
 439       result = emit_b2f(bld_base, src[0], 32);
 440       break;
 441    case nir_op_b2f64:
 442       result = emit_b2f(bld_base, src[0], 64);
 443       break;
 444    case nir_op_b2i32:
 445       result = emit_b2i(bld_base, src[0], 32);
 446       break;
 447    case nir_op_b2i64:
 448       result = emit_b2i(bld_base, src[0], 64);
 449       break;
 450    case nir_op_b32csel:
 451       result = emit_b32csel(bld_base, src_bit_size, src);
 452       break;
 453    case nir_op_bit_count:
 454       result = lp_build_popcount(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 455       break;
 456    case nir_op_bitfield_select:
 457       result = lp_build_xor(&bld_base->uint_bld, src[2], lp_build_and(&bld_base->uint_bld, src[0], lp_build_xor(&bld_base->uint_bld, src[1], src[2])));
 458       break;
 459    case nir_op_bitfield_reverse:
 460       result = lp_build_bitfield_reverse(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 461       break;
 462    case nir_op_f2b32:
 463       result = flt_to_bool32(bld_base, src_bit_size[0], src[0]);
 464       break;
 465    case nir_op_f2f32:
 466       result = LLVMBuildFPTrunc(builder, src[0],
 467                                 bld_base->base.vec_type, "");
 468       break;
 469    case nir_op_f2f64:
 470       result = LLVMBuildFPExt(builder, src[0],
 471                               bld_base->dbl_bld.vec_type, "");
 472       break;
 473    case nir_op_f2i32:
 474       result = LLVMBuildFPToSI(builder, src[0], bld_base->base.int_vec_type, "");
 475       break;
 476    case nir_op_f2u32:
 477       result = LLVMBuildFPToUI(builder,
 478                                src[0],
 479                                bld_base->base.int_vec_type, "");
 480       break;
 481    case nir_op_f2i64:
 482       result = LLVMBuildFPToSI(builder,
 483                                src[0],
 484                                bld_base->int64_bld.vec_type, "");
 485       break;
 486    case nir_op_f2u64:
 487       result = LLVMBuildFPToUI(builder,
 488                                src[0],
 489                                bld_base->uint64_bld.vec_type, "");
 490       break;
 491    case nir_op_fabs:
 492       result = lp_build_abs(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 493       break;
 494    case nir_op_fadd:
 495       result = lp_build_add(get_flt_bld(bld_base, src_bit_size[0]),
 496                             src[0], src[1]);
 497       break;
 498    case nir_op_fceil:
 499       result = lp_build_ceil(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 500       break;
 501    case nir_op_fcos:
 502       result = lp_build_cos(&bld_base->base, src[0]);
 503       break;
 504    case nir_op_fddx:
 505    case nir_op_fddx_coarse:
 506    case nir_op_fddx_fine:
 507       result = lp_build_ddx(&bld_base->base, src[0]);
 508       break;
 509    case nir_op_fddy:
 510    case nir_op_fddy_coarse:
 511    case nir_op_fddy_fine:
 512       result = lp_build_ddy(&bld_base->base, src[0]);
 513       break;
 514    case nir_op_fdiv:
 515       result = lp_build_div(get_flt_bld(bld_base, src_bit_size[0]),
 516                             src[0], src[1]);
 517       break;
 518    case nir_op_feq32:
 519       result = fcmp32(bld_base, PIPE_FUNC_EQUAL, src_bit_size[0], src);
 520       break;
 521    case nir_op_fexp2:
 522       result = lp_build_exp2(&bld_base->base, src[0]);
 523       break;
 524    case nir_op_ffloor:
 525       result = lp_build_floor(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 526       break;
 527    case nir_op_ffma:
 528       result = lp_build_fmuladd(builder, src[0], src[1], src[2]);
 529       break;
 530    case nir_op_ffract: {
 531       struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size[0]);
 532       LLVMValueRef tmp = lp_build_floor(flt_bld, src[0]);
 533       result = lp_build_sub(flt_bld, src[0], tmp);
 534       break;
 535    }
 536    case nir_op_fge32:
 537       result = fcmp32(bld_base, PIPE_FUNC_GEQUAL, src_bit_size[0], src);
 538       break;
 539    case nir_op_find_lsb:
 540       result = lp_build_cttz(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 541       break;
 542    case nir_op_flog2:
 543       result = lp_build_log2_safe(&bld_base->base, src[0]);
 544       break;
 545    case nir_op_flt32:
 546       result = fcmp32(bld_base, PIPE_FUNC_LESS, src_bit_size[0], src);
 547       break;
 548    case nir_op_fmin:
 549       result = lp_build_min(get_flt_bld(bld_base, src_bit_size[0]), src[0], src[1]);
 550       break;
 551    case nir_op_fmod: {
 552       struct lp_build_context *flt_bld = get_flt_bld(bld_base, src_bit_size[0]);
 553       result = lp_build_div(flt_bld, src[0], src[1]);
 554       result = lp_build_floor(flt_bld, result);
 555       result = lp_build_mul(flt_bld, src[1], result);
 556       result = lp_build_sub(flt_bld, src[0], result);
 557       break;
 558    }
 559    case nir_op_fmul:
 560       result = lp_build_mul(get_flt_bld(bld_base, src_bit_size[0]),
 561                             src[0], src[1]);
 562       break;
 563    case nir_op_fmax:
 564       result = lp_build_max(get_flt_bld(bld_base, src_bit_size[0]), src[0], src[1]);
 565       break;
 566    case nir_op_fne32:
 567       result = fcmp32(bld_base, PIPE_FUNC_NOTEQUAL, src_bit_size[0], src);
 568       break;
 569    case nir_op_fneg:
 570       result = lp_build_negate(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 571       break;
 572    case nir_op_fpow:
 573       result = lp_build_pow(&bld_base->base, src[0], src[1]);
 574       break;
 575    case nir_op_frcp:
 576       result = lp_build_rcp(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 577       break;
 578    case nir_op_fround_even:
 579       result = lp_build_round(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 580       break;
 581    case nir_op_frsq:
 582       result = lp_build_rsqrt(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 583       break;
 584    case nir_op_fsat:
 585       result = lp_build_clamp_zero_one_nanzero(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 586       break;
 587    case nir_op_fsign:
 588       result = lp_build_sgn(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 589       break;
 590    case nir_op_fsin:
 591       result = lp_build_sin(&bld_base->base, src[0]);
 592       break;
 593    case nir_op_fsqrt:
 594       result = lp_build_sqrt(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 595       break;
 596    case nir_op_ftrunc:
 597       result = lp_build_trunc(get_flt_bld(bld_base, src_bit_size[0]), src[0]);
 598       break;
 599    case nir_op_i2b32:
 600       result = int_to_bool32(bld_base, src_bit_size[0], false, src[0]);
 601       break;
 602    case nir_op_i2f32:
 603       result = lp_build_int_to_float(&bld_base->base, src[0]);
 604       break;
 605    case nir_op_i2f64:
 606       result = lp_build_int_to_float(&bld_base->dbl_bld, src[0]);
 607       break;
 608    case nir_op_i2i8:
 609       result = LLVMBuildTrunc(builder, src[0], bld_base->int8_bld.vec_type, "");
 610       break;
 611    case nir_op_i2i16:
 612       if (src_bit_size[0] < 16)
 613          result = LLVMBuildSExt(builder, src[0], bld_base->int16_bld.vec_type, "");
 614       else
 615          result = LLVMBuildTrunc(builder, src[0], bld_base->int16_bld.vec_type, "");
 616       break;
 617    case nir_op_i2i32:
 618       if (src_bit_size[0] < 32)
 619          result = LLVMBuildSExt(builder, src[0], bld_base->int_bld.vec_type, "");
 620       else
 621          result = LLVMBuildTrunc(builder, src[0], bld_base->int_bld.vec_type, "");
 622       break;
 623    case nir_op_i2i64:
 624       result = LLVMBuildSExt(builder, src[0], bld_base->int64_bld.vec_type, "");
 625       break;
 626    case nir_op_iabs:
 627       result = lp_build_abs(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 628       break;
 629    case nir_op_iadd:
 630       result = lp_build_add(get_int_bld(bld_base, false, src_bit_size[0]),
 631                             src[0], src[1]);
 632       break;
 633    case nir_op_iand:
 634       result = lp_build_and(get_int_bld(bld_base, false, src_bit_size[0]),
 635                             src[0], src[1]);
 636       break;
 637    case nir_op_idiv:
 638       result = do_int_divide(bld_base, false, src_bit_size[0], src[0], src[1]);
 639       break;
 640    case nir_op_ieq32:
 641       result = icmp32(bld_base, PIPE_FUNC_EQUAL, false, src_bit_size[0], src);
 642       break;
 643    case nir_op_ige32:
 644       result = icmp32(bld_base, PIPE_FUNC_GEQUAL, false, src_bit_size[0], src);
 645       break;
 646    case nir_op_ilt32:
 647       result = icmp32(bld_base, PIPE_FUNC_LESS, false, src_bit_size[0], src);
 648       break;
 649    case nir_op_imax:
 650       result = lp_build_max(get_int_bld(bld_base, false, src_bit_size[0]), src[0], src[1]);
 651       break;
 652    case nir_op_imin:
 653       result = lp_build_min(get_int_bld(bld_base, false, src_bit_size[0]), src[0], src[1]);
 654       break;
 655    case nir_op_imul:
 656    case nir_op_imul24:
 657       result = lp_build_mul(get_int_bld(bld_base, false, src_bit_size[0]),
 658                             src[0], src[1]);
 659       break;
 660    case nir_op_imul_high: {
 661       LLVMValueRef hi_bits;
 662       lp_build_mul_32_lohi(&bld_base->int_bld, src[0], src[1], &hi_bits);
 663       result = hi_bits;
 664       break;
 665    }
 666    case nir_op_ine32:
 667       result = icmp32(bld_base, PIPE_FUNC_NOTEQUAL, false, src_bit_size[0], src);
 668       break;
 669    case nir_op_ineg:
 670       result = lp_build_negate(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 671       break;
 672    case nir_op_inot:
 673       result = lp_build_not(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 674       break;
 675    case nir_op_ior:
 676       result = lp_build_or(get_int_bld(bld_base, false, src_bit_size[0]),
 677                            src[0], src[1]);
 678       break;
 679    case nir_op_irem:
 680       result = do_int_mod(bld_base, false, src_bit_size[0], src[0], src[1]);
 681       break;
 682    case nir_op_ishl: {
 683       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 684       struct lp_build_context *int_bld = get_int_bld(bld_base, false, src_bit_size[0]);
 685       if (src_bit_size[0] == 64)
 686          src[1] = LLVMBuildZExt(builder, src[1], uint_bld->vec_type, "");
 687       if (src_bit_size[0] < 32)
 688          src[1] = LLVMBuildTrunc(builder, src[1], uint_bld->vec_type, "");
 689       src[1] = lp_build_and(uint_bld, src[1], lp_build_const_int_vec(gallivm, uint_bld->type, (src_bit_size[0] - 1)));
 690       result = lp_build_shl(int_bld, src[0], src[1]);
 691       break;
 692    }
 693    case nir_op_ishr: {
 694       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 695       struct lp_build_context *int_bld = get_int_bld(bld_base, false, src_bit_size[0]);
 696       if (src_bit_size[0] == 64)
 697          src[1] = LLVMBuildZExt(builder, src[1], uint_bld->vec_type, "");
 698       if (src_bit_size[0] < 32)
 699          src[1] = LLVMBuildTrunc(builder, src[1], uint_bld->vec_type, "");
 700       src[1] = lp_build_and(uint_bld, src[1], lp_build_const_int_vec(gallivm, uint_bld->type, (src_bit_size[0] - 1)));
 701       result = lp_build_shr(int_bld, src[0], src[1]);
 702       break;
 703    }
 704    case nir_op_isign:
 705       result = lp_build_sgn(get_int_bld(bld_base, false, src_bit_size[0]), src[0]);
 706       break;
 707    case nir_op_isub:
 708       result = lp_build_sub(get_int_bld(bld_base, false, src_bit_size[0]),
 709                             src[0], src[1]);
 710       break;
 711    case nir_op_ixor:
 712       result = lp_build_xor(get_int_bld(bld_base, false, src_bit_size[0]),
 713                             src[0], src[1]);
 714       break;
 715    case nir_op_mov:
 716       result = src[0];
 717       break;
 718    case nir_op_unpack_64_2x32_split_x:
 719       result = split_64bit(bld_base, src[0], false);
 720       break;
 721    case nir_op_unpack_64_2x32_split_y:
 722       result = split_64bit(bld_base, src[0], true);
 723       break;
 724
 725    case nir_op_pack_64_2x32_split: {
 726       LLVMValueRef tmp = merge_64bit(bld_base, src[0], src[1]);
 727       result = LLVMBuildBitCast(builder, tmp, bld_base->dbl_bld.vec_type, "");
 728       break;
 729    }
 730    case nir_op_u2f32:
 731       result = LLVMBuildUIToFP(builder, src[0], bld_base->base.vec_type, "");
 732       break;
 733    case nir_op_u2f64:
 734       result = LLVMBuildUIToFP(builder, src[0], bld_base->dbl_bld.vec_type, "");
 735       break;
 736    case nir_op_u2u8:
 737       result = LLVMBuildTrunc(builder, src[0], bld_base->uint8_bld.vec_type, "");
 738       break;
 739    case nir_op_u2u16:
 740       if (src_bit_size[0] < 16)
 741          result = LLVMBuildZExt(builder, src[0], bld_base->uint16_bld.vec_type, "");
 742       else
 743          result = LLVMBuildTrunc(builder, src[0], bld_base->uint16_bld.vec_type, "");
 744       break;
 745    case nir_op_u2u32:
 746       if (src_bit_size[0] < 32)
 747          result = LLVMBuildZExt(builder, src[0], bld_base->uint_bld.vec_type, "");
 748       else
 749          result = LLVMBuildTrunc(builder, src[0], bld_base->uint_bld.vec_type, "");
 750       break;
 751    case nir_op_u2u64:
 752       result = LLVMBuildZExt(builder, src[0], bld_base->uint64_bld.vec_type, "");
 753       break;
 754    case nir_op_udiv:
 755       result = do_int_divide(bld_base, true, src_bit_size[0], src[0], src[1]);
 756       break;
 757    case nir_op_ufind_msb: {
 758       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 759       result = lp_build_ctlz(uint_bld, src[0]);
 760       result = lp_build_sub(uint_bld, lp_build_const_int_vec(gallivm, uint_bld->type, src_bit_size[0] - 1), result);
 761       break;
 762    }
 763    case nir_op_uge32:
 764       result = icmp32(bld_base, PIPE_FUNC_GEQUAL, true, src_bit_size[0], src);
 765       break;
 766    case nir_op_ult32:
 767       result = icmp32(bld_base, PIPE_FUNC_LESS, true, src_bit_size[0], src);
 768       break;
 769    case nir_op_umax:
 770       result = lp_build_max(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1]);
 771       break;
 772    case nir_op_umin:
 773       result = lp_build_min(get_int_bld(bld_base, true, src_bit_size[0]), src[0], src[1]);
 774       break;
 775    case nir_op_umod:
 776       result = do_int_mod(bld_base, true, src_bit_size[0], src[0], src[1]);
 777       break;
 778    case nir_op_umul_high: {
 779       LLVMValueRef hi_bits;
 780       lp_build_mul_32_lohi(&bld_base->uint_bld, src[0], src[1], &hi_bits);
 781       result = hi_bits;
 782       break;
 783    }
 784    case nir_op_ushr: {
 785       struct lp_build_context *uint_bld = get_int_bld(bld_base, true, src_bit_size[0]);
 786       if (src_bit_size[0] == 64)
 787          src[1] = LLVMBuildZExt(builder, src[1], uint_bld->vec_type, "");
 788       if (src_bit_size[0] < 32)
 789          src[1] = LLVMBuildTrunc(builder, src[1], uint_bld->vec_type, "");
 790       src[1] = lp_build_and(uint_bld, src[1], lp_build_const_int_vec(gallivm, uint_bld->type, (src_bit_size[0] - 1)));
 791       result = lp_build_shr(uint_bld, src[0], src[1]);
 792       break;
 793    }
 794    default:
 795       assert(0);
 796       break;
 797    }
 798    return result;
 799 }
 800
 801 static void visit_alu(struct lp_build_nir_context *bld_base, const nir_alu_instr *instr)
 802 {
 803    struct gallivm_state *gallivm = bld_base->base.gallivm;
 804    LLVMValueRef src[NIR_MAX_VEC_COMPONENTS];
 805    unsigned src_bit_size[NIR_MAX_VEC_COMPONENTS];
 806    unsigned num_components = nir_dest_num_components(instr->dest.dest);
 807    unsigned src_components;
 808    switch (instr->op) {
 809    case nir_op_vec2:
 810    case nir_op_vec3:
 811    case nir_op_vec4:
 812    case nir_op_vec8:
 813    case nir_op_vec16:
 814       src_components = 1;
 815       break;
 816    case nir_op_pack_half_2x16:
 817       src_components = 2;
 818       break;
 819    case nir_op_unpack_half_2x16:
 820       src_components = 1;
 821       break;
 822    case nir_op_cube_face_coord:
 823    case nir_op_cube_face_index:
 824       src_components = 3;
 825       break;
 826    default:
 827       src_components = num_components;
 828       break;
 829    }
 830    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
 831       src[i] = get_alu_src(bld_base, instr->src[i], src_components);
 832       src_bit_size[i] = nir_src_bit_size(instr->src[i].src);
 833    }
 834
 835    LLVMValueRef result[NIR_MAX_VEC_COMPONENTS];
 836    if (instr->op == nir_op_vec4 || instr->op == nir_op_vec3 || instr->op == nir_op_vec2 || instr->op == nir_op_vec8 || instr->op == nir_op_vec16) {
 837       for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
 838          result[i] = cast_type(bld_base, src[i], nir_op_infos[instr->op].input_types[i], src_bit_size[i]);
 839       }
 840    } else {
 841       for (unsigned c = 0; c < num_components; c++) {
 842          LLVMValueRef src_chan[NIR_MAX_VEC_COMPONENTS];
 843
 844          for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
 845             if (num_components > 1) {
 846                src_chan[i] = LLVMBuildExtractValue(gallivm->builder,
 847                                                      src[i], c, "");
 848             } else
 849                src_chan[i] = src[i];
 850             src_chan[i] = cast_type(bld_base, src_chan[i], nir_op_infos[instr->op].input_types[i], src_bit_size[i]);
 851          }
 852          result[c] = do_alu_action(bld_base, instr->op, src_bit_size, src_chan);
 853          result[c] = cast_type(bld_base, result[c], nir_op_infos[instr->op].output_type, nir_dest_bit_size(instr->dest.dest));
 854       }
 855    }
 856    assign_alu_dest(bld_base, &instr->dest, result);
 857  }
 858
 859 static void visit_load_const(struct lp_build_nir_context *bld_base,
 860                              const nir_load_const_instr *instr)
 861 {
 862    LLVMValueRef result[NIR_MAX_VEC_COMPONENTS];
 863    struct lp_build_context *int_bld = get_int_bld(bld_base, true, instr->def.bit_size);
 864    for (unsigned i = 0; i < instr->def.num_components; i++)
 865       result[i] = lp_build_const_int_vec(bld_base->base.gallivm, int_bld->type, instr->value[i].u64);
 866    assign_ssa_dest(bld_base, &instr->def, result);
 867 }
 868
 869 static void
 870 get_deref_offset(struct lp_build_nir_context *bld_base, nir_deref_instr *instr,
 871                  bool vs_in, unsigned *vertex_index_out,
 872                  LLVMValueRef *vertex_index_ref,
 873                  unsigned *const_out, LLVMValueRef *indir_out)
 874 {
 875    LLVMBuilderRef builder = bld_base->base.gallivm->builder;
 876    nir_variable *var = nir_deref_instr_get_variable(instr);
 877    nir_deref_path path;
 878    unsigned idx_lvl = 1;
 879
 880    nir_deref_path_init(&path, instr, NULL);
 881
 882    if (vertex_index_out != NULL || vertex_index_ref != NULL) {
 883       if (vertex_index_ref) {
 884          *vertex_index_ref = get_src(bld_base, path.path[idx_lvl]->arr.index);
 885          if (vertex_index_out)
 886             *vertex_index_out = 0;
 887       } else {
 888          *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
 889       }
 890       ++idx_lvl;
 891    }
 892
 893    uint32_t const_offset = 0;
 894    LLVMValueRef offset = NULL;
 895
 896    if (var->data.compact) {
 897       assert(instr->deref_type == nir_deref_type_array);
 898       const_offset = nir_src_as_uint(instr->arr.index);
 899       goto out;
 900    }
 901
 902    for (; path.path[idx_lvl]; ++idx_lvl) {
 903       const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
 904       if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
 905          unsigned index = path.path[idx_lvl]->strct.index;
 906
 907          for (unsigned i = 0; i < index; i++) {
 908             const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
 909             const_offset += glsl_count_attribute_slots(ft, vs_in);
 910          }
 911       } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
 912          unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
 913          if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
 914            const_offset += nir_src_comp_as_int(path.path[idx_lvl]->arr.index, 0) * size;
 915          } else {
 916            LLVMValueRef idx_src = get_src(bld_base, path.path[idx_lvl]->arr.index);
 917            idx_src = cast_type(bld_base, idx_src, nir_type_uint, 32);
 918            LLVMValueRef array_off = lp_build_mul(&bld_base->uint_bld, lp_build_const_int_vec(bld_base->base.gallivm, bld_base->base.type, size),
 919                                                idx_src);
 920            if (offset)
 921              offset = lp_build_add(&bld_base->uint_bld, offset, array_off);
 922            else
 923              offset = array_off;
 924          }
 925       } else
 926          unreachable("Uhandled deref type in get_deref_instr_offset");
 927    }
 928
 929 out:
 930    nir_deref_path_finish(&path);
 931
 932    if (const_offset && offset)
 933       offset = LLVMBuildAdd(builder, offset,
 934                             lp_build_const_int_vec(bld_base->base.gallivm, bld_base->uint_bld.type, const_offset),
 935                             "");
 936    *const_out = const_offset;
 937    *indir_out = offset;
 938 }
 939
 940 static void visit_load_var(struct lp_build_nir_context *bld_base,
 941                            nir_intrinsic_instr *instr,
 942                            LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
 943 {
 944    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
 945    nir_variable *var = nir_deref_instr_get_variable(deref);
 946    nir_variable_mode mode = deref->mode;
 947    unsigned const_index;
 948    LLVMValueRef indir_index;
 949    unsigned vertex_index = 0;
 950    unsigned nc = nir_dest_num_components(instr->dest);
 951    unsigned bit_size = nir_dest_bit_size(instr->dest);
 952    if (var) {
 953       bool vs_in = bld_base->shader->info.stage == MESA_SHADER_VERTEX &&
 954          var->data.mode == nir_var_shader_in;
 955       bool gs_in = bld_base->shader->info.stage == MESA_SHADER_GEOMETRY &&
 956          var->data.mode == nir_var_shader_in;
 957       mode = var->data.mode;
 958
 959       get_deref_offset(bld_base, deref, vs_in, gs_in ? &vertex_index : NULL, NULL,
 960                        &const_index, &indir_index);
 961    }
 962    bld_base->load_var(bld_base, mode, nc, bit_size, var, vertex_index, const_index, indir_index, result);
 963 }
 964
 965 static void
 966 visit_store_var(struct lp_build_nir_context *bld_base,
 967                 nir_intrinsic_instr *instr)
 968 {
 969    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
 970    nir_variable *var = nir_deref_instr_get_variable(deref);
 971    nir_variable_mode mode = deref->mode;
 972    int writemask = instr->const_index[0];
 973    unsigned bit_size = nir_src_bit_size(instr->src[1]);
 974    LLVMValueRef src = get_src(bld_base, instr->src[1]);
 975    unsigned const_index = 0;
 976    LLVMValueRef indir_index;
 977    if (var)
 978       get_deref_offset(bld_base, deref, false, NULL, NULL,
 979                        &const_index, &indir_index);
 980    bld_base->store_var(bld_base, mode, bit_size, instr->num_components, writemask, const_index, var, src);
 981 }
 982
 983 static void visit_load_ubo(struct lp_build_nir_context *bld_base,
 984                            nir_intrinsic_instr *instr,
 985                            LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
 986 {
 987    struct gallivm_state *gallivm = bld_base->base.gallivm;
 988    LLVMBuilderRef builder = gallivm->builder;
 989    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
 990    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
 991
 992    bool offset_is_uniform = nir_src_is_dynamically_uniform(instr->src[1]);
 993    idx = LLVMBuildExtractElement(builder, idx, lp_build_const_int32(gallivm, 0), "");
 994    bld_base->load_ubo(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
 995                       offset_is_uniform, idx, offset, result);
 996 }
 997
 998
 999 static void visit_load_ssbo(struct lp_build_nir_context *bld_base,
1000                            nir_intrinsic_instr *instr,
1001                            LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1002 {
1003    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
1004    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
1005    bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
1006                        idx, offset, result);
1007 }
1008
1009 static void visit_store_ssbo(struct lp_build_nir_context *bld_base,
1010                              nir_intrinsic_instr *instr)
1011 {
1012    LLVMValueRef val = get_src(bld_base, instr->src[0]);
1013    LLVMValueRef idx = get_src(bld_base, instr->src[1]);
1014    LLVMValueRef offset = get_src(bld_base, instr->src[2]);
1015    int writemask = instr->const_index[0];
1016    int nc = nir_src_num_components(instr->src[0]);
1017    int bitsize = nir_src_bit_size(instr->src[0]);
1018    bld_base->store_mem(bld_base, writemask, nc, bitsize, idx, offset, val);
1019 }
1020
1021 static void visit_get_buffer_size(struct lp_build_nir_context *bld_base,
1022                                   nir_intrinsic_instr *instr,
1023                                   LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1024 {
1025    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
1026    result[0] = bld_base->get_buffer_size(bld_base, idx);
1027 }
1028
1029 static void visit_ssbo_atomic(struct lp_build_nir_context *bld_base,
1030                               nir_intrinsic_instr *instr,
1031                               LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1032 {
1033    LLVMValueRef idx = get_src(bld_base, instr->src[0]);
1034    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
1035    LLVMValueRef val = get_src(bld_base, instr->src[2]);
1036    LLVMValueRef val2 = NULL;
1037    if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap)
1038       val2 = get_src(bld_base, instr->src[3]);
1039
1040    bld_base->atomic_mem(bld_base, instr->intrinsic, idx, offset, val, val2, &result[0]);
1041
1042 }
1043
1044 static void visit_load_image(struct lp_build_nir_context *bld_base,
1045                              nir_intrinsic_instr *instr,
1046                              LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1047 {
1048    struct gallivm_state *gallivm = bld_base->base.gallivm;
1049    LLVMBuilderRef builder = gallivm->builder;
1050    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1051    nir_variable *var = nir_deref_instr_get_variable(deref);
1052    LLVMValueRef coord_val = get_src(bld_base, instr->src[1]);
1053    LLVMValueRef coords[5];
1054    struct lp_img_params params;
1055    const struct glsl_type *type = glsl_without_array(var->type);
1056
1057    memset(&params, 0, sizeof(params));
1058    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(type), glsl_sampler_type_is_array(type));
1059    for (unsigned i = 0; i < 4; i++)
1060       coords[i] = LLVMBuildExtractValue(builder, coord_val, i, "");
1061    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1062       coords[2] = coords[1];
1063
1064    params.coords = coords;
1065    params.outdata = result;
1066    params.img_op = LP_IMG_LOAD;
1067    params.image_index = var->data.binding;
1068    bld_base->image_op(bld_base, &params);
1069 }
1070
1071 static void visit_store_image(struct lp_build_nir_context *bld_base,
1072                               nir_intrinsic_instr *instr)
1073 {
1074    struct gallivm_state *gallivm = bld_base->base.gallivm;
1075    LLVMBuilderRef builder = gallivm->builder;
1076    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1077    nir_variable *var = nir_deref_instr_get_variable(deref);
1078    LLVMValueRef coord_val = get_src(bld_base, instr->src[1]);
1079    LLVMValueRef in_val = get_src(bld_base, instr->src[3]);
1080    LLVMValueRef coords[5];
1081    struct lp_img_params params;
1082    const struct glsl_type *type = glsl_without_array(var->type);
1083
1084    memset(&params, 0, sizeof(params));
1085    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(type), glsl_sampler_type_is_array(type));
1086    for (unsigned i = 0; i < 4; i++)
1087       coords[i] = LLVMBuildExtractValue(builder, coord_val, i, "");
1088    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1089       coords[2] = coords[1];
1090    params.coords = coords;
1091
1092    for (unsigned i = 0; i < 4; i++) {
1093       params.indata[i] = LLVMBuildExtractValue(builder, in_val, i, "");
1094       params.indata[i] = LLVMBuildBitCast(builder, params.indata[i], bld_base->base.vec_type, "");
1095    }
1096    params.img_op = LP_IMG_STORE;
1097    params.image_index = var->data.binding;
1098
1099    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1100       coords[2] = coords[1];
1101    bld_base->image_op(bld_base, &params);
1102 }
1103
1104 static void visit_atomic_image(struct lp_build_nir_context *bld_base,
1105                                nir_intrinsic_instr *instr,
1106                                LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1107 {
1108    struct gallivm_state *gallivm = bld_base->base.gallivm;
1109    LLVMBuilderRef builder = gallivm->builder;
1110    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1111    nir_variable *var = nir_deref_instr_get_variable(deref);
1112    struct lp_img_params params;
1113    LLVMValueRef coord_val = get_src(bld_base, instr->src[1]);
1114    LLVMValueRef in_val = get_src(bld_base, instr->src[3]);
1115    LLVMValueRef coords[5];
1116    const struct glsl_type *type = glsl_without_array(var->type);
1117
1118    memset(&params, 0, sizeof(params));
1119
1120    switch (instr->intrinsic) {
1121    case nir_intrinsic_image_deref_atomic_add:
1122       params.op = LLVMAtomicRMWBinOpAdd;
1123       break;
1124    case nir_intrinsic_image_deref_atomic_exchange:
1125       params.op = LLVMAtomicRMWBinOpXchg;
1126       break;
1127    case nir_intrinsic_image_deref_atomic_and:
1128       params.op = LLVMAtomicRMWBinOpAnd;
1129       break;
1130    case nir_intrinsic_image_deref_atomic_or:
1131       params.op = LLVMAtomicRMWBinOpOr;
1132       break;
1133    case nir_intrinsic_image_deref_atomic_xor:
1134       params.op = LLVMAtomicRMWBinOpXor;
1135       break;
1136    case nir_intrinsic_image_deref_atomic_umin:
1137       params.op = LLVMAtomicRMWBinOpUMin;
1138       break;
1139    case nir_intrinsic_image_deref_atomic_umax:
1140       params.op = LLVMAtomicRMWBinOpUMax;
1141       break;
1142    case nir_intrinsic_image_deref_atomic_imin:
1143       params.op = LLVMAtomicRMWBinOpMin;
1144       break;
1145    case nir_intrinsic_image_deref_atomic_imax:
1146       params.op = LLVMAtomicRMWBinOpMax;
1147       break;
1148    default:
1149       break;
1150    }
1151
1152    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(type), glsl_sampler_type_is_array(type));
1153    for (unsigned i = 0; i < 4; i++)
1154       coords[i] = LLVMBuildExtractValue(builder, coord_val, i, "");
1155    if (params.target == PIPE_TEXTURE_1D_ARRAY)
1156       coords[2] = coords[1];
1157    params.coords = coords;
1158    if (instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap) {
1159       LLVMValueRef cas_val = get_src(bld_base, instr->src[4]);
1160       params.indata[0] = in_val;
1161       params.indata2[0] = cas_val;
1162    } else
1163       params.indata[0] = in_val;
1164
1165    params.outdata = result;
1166    params.img_op = (instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap) ? LP_IMG_ATOMIC_CAS : LP_IMG_ATOMIC;
1167    params.image_index = var->data.binding;
1168
1169    bld_base->image_op(bld_base, &params);
1170 }
1171
1172
1173 static void visit_image_size(struct lp_build_nir_context *bld_base,
1174                              nir_intrinsic_instr *instr,
1175                              LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1176 {
1177    nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
1178    nir_variable *var = nir_deref_instr_get_variable(deref);
1179    struct lp_sampler_size_query_params params = { 0 };
1180    params.texture_unit = var->data.binding;
1181    params.target = glsl_sampler_to_pipe(glsl_get_sampler_dim(var->type), glsl_sampler_type_is_array(var->type));
1182    params.sizes_out = result;
1183
1184    bld_base->image_size(bld_base, &params);
1185 }
1186
1187 static void visit_shared_load(struct lp_build_nir_context *bld_base,
1188                                 nir_intrinsic_instr *instr,
1189                                 LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1190 {
1191    LLVMValueRef offset = get_src(bld_base, instr->src[0]);
1192    bld_base->load_mem(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
1193                       NULL, offset, result);
1194 }
1195
1196 static void visit_shared_store(struct lp_build_nir_context *bld_base,
1197                                nir_intrinsic_instr *instr)
1198 {
1199    LLVMValueRef val = get_src(bld_base, instr->src[0]);
1200    LLVMValueRef offset = get_src(bld_base, instr->src[1]);
1201    int writemask = instr->const_index[1];
1202    int nc = nir_src_num_components(instr->src[0]);
1203    int bitsize = nir_src_bit_size(instr->src[0]);
1204    bld_base->store_mem(bld_base, writemask, nc, bitsize, NULL, offset, val);
1205 }
1206
1207 static void visit_shared_atomic(struct lp_build_nir_context *bld_base,
1208                                 nir_intrinsic_instr *instr,
1209                                 LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1210 {
1211    LLVMValueRef offset = get_src(bld_base, instr->src[0]);
1212    LLVMValueRef val = get_src(bld_base, instr->src[1]);
1213    LLVMValueRef val2 = NULL;
1214    if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap)
1215       val2 = get_src(bld_base, instr->src[2]);
1216
1217    bld_base->atomic_mem(bld_base, instr->intrinsic, NULL, offset, val, val2, &result[0]);
1218
1219 }
1220
1221 static void visit_barrier(struct lp_build_nir_context *bld_base)
1222 {
1223    bld_base->barrier(bld_base);
1224 }
1225
1226 static void visit_discard(struct lp_build_nir_context *bld_base,
1227                           nir_intrinsic_instr *instr)
1228 {
1229    LLVMValueRef cond = NULL;
1230    if (instr->intrinsic == nir_intrinsic_discard_if) {
1231       cond = get_src(bld_base, instr->src[0]);
1232       cond = cast_type(bld_base, cond, nir_type_int, 32);
1233    }
1234    bld_base->discard(bld_base, cond);
1235 }
1236
1237 static void visit_load_kernel_input(struct lp_build_nir_context *bld_base,
1238                                     nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1239 {
1240    LLVMValueRef offset = get_src(bld_base, instr->src[0]);
1241
1242    bool offset_is_uniform = nir_src_is_dynamically_uniform(instr->src[0]);
1243    bld_base->load_kernel_arg(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
1244                              nir_src_bit_size(instr->src[0]),
1245                              offset_is_uniform, offset, result);
1246 }
1247
1248 static void visit_load_global(struct lp_build_nir_context *bld_base,
1249                               nir_intrinsic_instr *instr, LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1250 {
1251    LLVMValueRef addr = get_src(bld_base, instr->src[0]);
1252    bld_base->load_global(bld_base, nir_dest_num_components(instr->dest), nir_dest_bit_size(instr->dest),
1253                          nir_src_bit_size(instr->src[0]),
1254                          addr, result);
1255 }
1256
1257 static void visit_store_global(struct lp_build_nir_context *bld_base,
1258                                nir_intrinsic_instr *instr)
1259 {
1260    LLVMValueRef val = get_src(bld_base, instr->src[0]);
1261    int nc = nir_src_num_components(instr->src[0]);
1262    int bitsize = nir_src_bit_size(instr->src[0]);
1263    LLVMValueRef addr = get_src(bld_base, instr->src[1]);
1264    int addr_bitsize = nir_src_bit_size(instr->src[1]);
1265    int writemask = instr->const_index[0];
1266    bld_base->store_global(bld_base, writemask, nc, bitsize, addr_bitsize, addr, val);
1267 }
1268
1269 static void visit_global_atomic(struct lp_build_nir_context *bld_base,
1270                                 nir_intrinsic_instr *instr,
1271                                 LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
1272 {
1273    LLVMValueRef addr = get_src(bld_base, instr->src[0]);
1274    LLVMValueRef val = get_src(bld_base, instr->src[1]);
1275    LLVMValueRef val2 = NULL;
1276    int addr_bitsize = nir_src_bit_size(instr->src[0]);
1277    if (instr->intrinsic == nir_intrinsic_global_atomic_comp_swap)
1278       val2 = get_src(bld_base, instr->src[2]);
1279
1280    bld_base->atomic_global(bld_base, instr->intrinsic, addr_bitsize, addr, val, val2, &result[0]);
1281 }
1282
1283 static void visit_intrinsic(struct lp_build_nir_context *bld_base,
1284                             nir_intrinsic_instr *instr)
1285 {
1286    LLVMValueRef result[NIR_MAX_VEC_COMPONENTS] = {0};
1287    switch (instr->intrinsic) {
1288    case nir_intrinsic_load_deref:
1289       visit_load_var(bld_base, instr, result);
1290       break;
1291    case nir_intrinsic_store_deref:
1292       visit_store_var(bld_base, instr);
1293       break;
1294    case nir_intrinsic_load_ubo:
1295       visit_load_ubo(bld_base, instr, result);
1296       break;
1297    case nir_intrinsic_load_ssbo:
1298       visit_load_ssbo(bld_base, instr, result);
1299       break;
1300    case nir_intrinsic_store_ssbo:
1301       visit_store_ssbo(bld_base, instr);
1302       break;
1303    case nir_intrinsic_get_buffer_size:
1304       visit_get_buffer_size(bld_base, instr, result);
1305       break;
1306    case nir_intrinsic_load_vertex_id:
1307    case nir_intrinsic_load_primitive_id:
1308    case nir_intrinsic_load_instance_id:
1309    case nir_intrinsic_load_base_instance:
1310    case nir_intrinsic_load_base_vertex:
1311    case nir_intrinsic_load_work_group_id:
1312    case nir_intrinsic_load_local_invocation_id:
1313    case nir_intrinsic_load_num_work_groups:
1314    case nir_intrinsic_load_invocation_id:
1315    case nir_intrinsic_load_front_face:
1316    case nir_intrinsic_load_draw_id:
1317    case nir_intrinsic_load_local_group_size:
1318    case nir_intrinsic_load_work_dim:
1319    case nir_intrinsic_load_tess_coord:
1320    case nir_intrinsic_load_tess_level_outer:
1321    case nir_intrinsic_load_tess_level_inner:
1322    case nir_intrinsic_load_patch_vertices_in:
1323       bld_base->sysval_intrin(bld_base, instr, result);
1324       break;
1325    case nir_intrinsic_discard_if:
1326    case nir_intrinsic_discard:
1327       visit_discard(bld_base, instr);
1328       break;
1329    case nir_intrinsic_emit_vertex:
1330       bld_base->emit_vertex(bld_base, nir_intrinsic_stream_id(instr));
1331       break;
1332    case nir_intrinsic_end_primitive:
1333       bld_base->end_primitive(bld_base, nir_intrinsic_stream_id(instr));
1334       break;
1335    case nir_intrinsic_ssbo_atomic_add:
1336    case nir_intrinsic_ssbo_atomic_imin:
1337    case nir_intrinsic_ssbo_atomic_imax:
1338    case nir_intrinsic_ssbo_atomic_umin:
1339    case nir_intrinsic_ssbo_atomic_umax:
1340    case nir_intrinsic_ssbo_atomic_and:
1341    case nir_intrinsic_ssbo_atomic_or:
1342    case nir_intrinsic_ssbo_atomic_xor:
1343    case nir_intrinsic_ssbo_atomic_exchange:
1344    case nir_intrinsic_ssbo_atomic_comp_swap:
1345       visit_ssbo_atomic(bld_base, instr, result);
1346       break;
1347    case nir_intrinsic_image_deref_load:
1348       visit_load_image(bld_base, instr, result);
1349       break;
1350    case nir_intrinsic_image_deref_store:
1351       visit_store_image(bld_base, instr);
1352       break;
1353    case nir_intrinsic_image_deref_atomic_add:
1354    case nir_intrinsic_image_deref_atomic_imin:
1355    case nir_intrinsic_image_deref_atomic_imax:
1356    case nir_intrinsic_image_deref_atomic_umin:
1357    case nir_intrinsic_image_deref_atomic_umax:
1358    case nir_intrinsic_image_deref_atomic_and:
1359    case nir_intrinsic_image_deref_atomic_or:
1360    case nir_intrinsic_image_deref_atomic_xor:
1361    case nir_intrinsic_image_deref_atomic_exchange:
1362    case nir_intrinsic_image_deref_atomic_comp_swap:
1363       visit_atomic_image(bld_base, instr, result);
1364       break;
1365    case nir_intrinsic_image_deref_size:
1366       visit_image_size(bld_base, instr, result);
1367       break;
1368    case nir_intrinsic_load_shared:
1369       visit_shared_load(bld_base, instr, result);
1370       break;
1371    case nir_intrinsic_store_shared:
1372       visit_shared_store(bld_base, instr);
1373       break;
1374    case nir_intrinsic_shared_atomic_add:
1375    case nir_intrinsic_shared_atomic_imin:
1376    case nir_intrinsic_shared_atomic_umin:
1377    case nir_intrinsic_shared_atomic_imax:
1378    case nir_intrinsic_shared_atomic_umax:
1379    case nir_intrinsic_shared_atomic_and:
1380    case nir_intrinsic_shared_atomic_or:
1381    case nir_intrinsic_shared_atomic_xor:
1382    case nir_intrinsic_shared_atomic_exchange:
1383    case nir_intrinsic_shared_atomic_comp_swap:
1384       visit_shared_atomic(bld_base, instr, result);
1385       break;
1386    case nir_intrinsic_control_barrier:
1387       visit_barrier(bld_base);
1388       break;
1389    case nir_intrinsic_memory_barrier:
1390    case nir_intrinsic_memory_barrier_shared:
1391    case nir_intrinsic_memory_barrier_buffer:
1392    case nir_intrinsic_memory_barrier_image:
1393    case nir_intrinsic_memory_barrier_tcs_patch:
1394       break;
1395    case nir_intrinsic_load_kernel_input:
1396       visit_load_kernel_input(bld_base, instr, result);
1397      break;
1398    case nir_intrinsic_load_global:
1399       visit_load_global(bld_base, instr, result);
1400       break;
1401    case nir_intrinsic_store_global:
1402       visit_store_global(bld_base, instr);
1403       break;
1404    case nir_intrinsic_global_atomic_add:
1405    case nir_intrinsic_global_atomic_imin:
1406    case nir_intrinsic_global_atomic_umin:
1407    case nir_intrinsic_global_atomic_imax:
1408    case nir_intrinsic_global_atomic_umax:
1409    case nir_intrinsic_global_atomic_and:
1410    case nir_intrinsic_global_atomic_or:
1411    case nir_intrinsic_global_atomic_xor:
1412    case nir_intrinsic_global_atomic_exchange:
1413    case nir_intrinsic_global_atomic_comp_swap:
1414       visit_global_atomic(bld_base, instr, result);
1415    case nir_intrinsic_vote_all:
1416    case nir_intrinsic_vote_any:
1417    case nir_intrinsic_vote_ieq:
1418       bld_base->vote(bld_base, cast_type(bld_base, get_src(bld_base, instr->src[0]), nir_type_int, 32), instr, result);
1419       break;
1420    default:
1421       assert(0);
1422       break;
1423    }
1424    if (result[0]) {
1425       assign_dest(bld_base, &instr->dest, result);
1426    }
1427 }
1428
1429 static void visit_txs(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
1430 {
1431    struct lp_sampler_size_query_params params;
1432    LLVMValueRef sizes_out[NIR_MAX_VEC_COMPONENTS];
1433    LLVMValueRef explicit_lod = NULL;
1434
1435    for (unsigned i = 0; i < instr->num_srcs; i++) {
1436       switch (instr->src[i].src_type) {
1437       case nir_tex_src_lod:
1438          explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_int, 32);
1439          break;
1440       default:
1441          break;
1442       }
1443    }
1444
1445    params.target = glsl_sampler_to_pipe(instr->sampler_dim, instr->is_array);
1446    params.texture_unit = instr->texture_index;
1447    params.explicit_lod = explicit_lod;
1448    params.is_sviewinfo = TRUE;
1449    params.sizes_out = sizes_out;
1450
1451    if (instr->op == nir_texop_query_levels)
1452       params.explicit_lod = bld_base->uint_bld.zero;
1453    bld_base->tex_size(bld_base, &params);
1454    assign_dest(bld_base, &instr->dest, &sizes_out[instr->op == nir_texop_query_levels ? 3 : 0]);
1455 }
1456
1457 static enum lp_sampler_lod_property lp_build_nir_lod_property(struct lp_build_nir_context *bld_base,
1458                                                               nir_src lod_src)
1459 {
1460    enum lp_sampler_lod_property lod_property;
1461
1462    if (nir_src_is_dynamically_uniform(lod_src))
1463       lod_property = LP_SAMPLER_LOD_SCALAR;
1464    else if (bld_base->shader->info.stage == MESA_SHADER_FRAGMENT) {
1465       if (gallivm_perf & GALLIVM_PERF_NO_QUAD_LOD)
1466          lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1467       else
1468          lod_property = LP_SAMPLER_LOD_PER_QUAD;
1469    }
1470    else
1471       lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1472    return lod_property;
1473 }
1474
1475 static void visit_tex(struct lp_build_nir_context *bld_base, nir_tex_instr *instr)
1476 {
1477    struct gallivm_state *gallivm = bld_base->base.gallivm;
1478    LLVMBuilderRef builder = gallivm->builder;
1479    LLVMValueRef coords[5];
1480    LLVMValueRef offsets[3] = { NULL };
1481    LLVMValueRef explicit_lod = NULL, projector = NULL;
1482    struct lp_sampler_params params;
1483    struct lp_derivatives derivs;
1484    unsigned sample_key = 0;
1485    nir_deref_instr *texture_deref_instr = NULL;
1486    nir_deref_instr *sampler_deref_instr = NULL;
1487    LLVMValueRef texel[NIR_MAX_VEC_COMPONENTS];
1488    unsigned lod_src = 0;
1489    LLVMValueRef coord_undef = LLVMGetUndef(bld_base->base.int_vec_type);
1490
1491    memset(&params, 0, sizeof(params));
1492    enum lp_sampler_lod_property lod_property = LP_SAMPLER_LOD_SCALAR;
1493
1494    if (instr->op == nir_texop_txs || instr->op == nir_texop_query_levels) {
1495       visit_txs(bld_base, instr);
1496       return;
1497    }
1498    if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
1499       sample_key |= LP_SAMPLER_OP_FETCH << LP_SAMPLER_OP_TYPE_SHIFT;
1500    else if (instr->op == nir_texop_tg4) {
1501       sample_key |= LP_SAMPLER_OP_GATHER << LP_SAMPLER_OP_TYPE_SHIFT;
1502       sample_key |= (instr->component << LP_SAMPLER_GATHER_COMP_SHIFT);
1503    } else if (instr->op == nir_texop_lod)
1504       sample_key |= LP_SAMPLER_OP_LODQ << LP_SAMPLER_OP_TYPE_SHIFT;
1505    for (unsigned i = 0; i < instr->num_srcs; i++) {
1506       switch (instr->src[i].src_type) {
1507       case nir_tex_src_coord: {
1508          LLVMValueRef coord = get_src(bld_base, instr->src[i].src);
1509          if (instr->coord_components == 1)
1510             coords[0] = coord;
1511          else {
1512             for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1513                coords[chan] = LLVMBuildExtractValue(builder, coord,
1514                                                     chan, "");
1515          }
1516          for (unsigned chan = instr->coord_components; chan < 5; chan++)
1517             coords[chan] = coord_undef;
1518
1519          break;
1520       }
1521       case nir_tex_src_texture_deref:
1522          texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1523          break;
1524       case nir_tex_src_sampler_deref:
1525          sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
1526          break;
1527       case nir_tex_src_projector:
1528          projector = lp_build_rcp(&bld_base->base, cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_float, 32));
1529          break;
1530       case nir_tex_src_comparator:
1531          sample_key |= LP_SAMPLER_SHADOW;
1532          coords[4] = get_src(bld_base, instr->src[i].src);
1533          coords[4] = cast_type(bld_base, coords[4], nir_type_float, 32);
1534          break;
1535       case nir_tex_src_bias:
1536          sample_key |= LP_SAMPLER_LOD_BIAS << LP_SAMPLER_LOD_CONTROL_SHIFT;
1537          lod_src = i;
1538          explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_float, 32);
1539          break;
1540       case nir_tex_src_lod:
1541          sample_key |= LP_SAMPLER_LOD_EXPLICIT << LP_SAMPLER_LOD_CONTROL_SHIFT;
1542          lod_src = i;
1543          if (instr->op == nir_texop_txf)
1544             explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_int, 32);
1545          else
1546             explicit_lod = cast_type(bld_base, get_src(bld_base, instr->src[i].src), nir_type_float, 32);
1547          break;
1548       case nir_tex_src_ddx: {
1549          int deriv_cnt = instr->coord_components;
1550          if (instr->is_array)
1551             deriv_cnt--;
1552          LLVMValueRef deriv_val = get_src(bld_base, instr->src[i].src);
1553          if (deriv_cnt == 1)
1554             derivs.ddx[0] = deriv_val;
1555          else
1556             for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1557                derivs.ddx[chan] = LLVMBuildExtractValue(builder, deriv_val,
1558                                                         chan, "");
1559          for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1560             derivs.ddx[chan] = cast_type(bld_base, derivs.ddx[chan], nir_type_float, 32);
1561          break;
1562       }
1563       case nir_tex_src_ddy: {
1564          int deriv_cnt = instr->coord_components;
1565          if (instr->is_array)
1566             deriv_cnt--;
1567          LLVMValueRef deriv_val = get_src(bld_base, instr->src[i].src);
1568          if (deriv_cnt == 1)
1569             derivs.ddy[0] = deriv_val;
1570          else
1571             for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1572                derivs.ddy[chan] = LLVMBuildExtractValue(builder, deriv_val,
1573                                                         chan, "");
1574          for (unsigned chan = 0; chan < deriv_cnt; ++chan)
1575             derivs.ddy[chan] = cast_type(bld_base, derivs.ddy[chan], nir_type_float, 32);
1576          break;
1577       }
1578       case nir_tex_src_offset: {
1579          int offset_cnt = instr->coord_components;
1580          if (instr->is_array)
1581             offset_cnt--;
1582          LLVMValueRef offset_val = get_src(bld_base, instr->src[i].src);
1583          sample_key |= LP_SAMPLER_OFFSETS;
1584          if (offset_cnt == 1)
1585             offsets[0] = cast_type(bld_base, offset_val, nir_type_int, 32);
1586          else {
1587             for (unsigned chan = 0; chan < offset_cnt; ++chan) {
1588                offsets[chan] = LLVMBuildExtractValue(builder, offset_val,
1589                                                      chan, "");
1590                offsets[chan] = cast_type(bld_base, offsets[chan], nir_type_int, 32);
1591             }
1592          }
1593          break;
1594       }
1595       case nir_tex_src_ms_index:
1596          break;
1597       default:
1598          assert(0);
1599          break;
1600       }
1601    }
1602    if (!sampler_deref_instr)
1603       sampler_deref_instr = texture_deref_instr;
1604
1605    if (explicit_lod)
1606       lod_property = lp_build_nir_lod_property(bld_base, instr->src[lod_src].src);
1607
1608    if (instr->op == nir_texop_tex || instr->op == nir_texop_tg4 || instr->op == nir_texop_txb ||
1609        instr->op == nir_texop_txl || instr->op == nir_texop_txd || instr->op == nir_texop_lod)
1610       for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1611          coords[chan] = cast_type(bld_base, coords[chan], nir_type_float, 32);
1612    else if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)
1613       for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1614          coords[chan] = cast_type(bld_base, coords[chan], nir_type_int, 32);
1615
1616    if (instr->is_array && instr->sampler_dim == GLSL_SAMPLER_DIM_1D) {
1617       /* move layer coord for 1d arrays. */
1618       coords[2] = coords[1];
1619       coords[1] = coord_undef;
1620    }
1621
1622    if (projector) {
1623       for (unsigned chan = 0; chan < instr->coord_components; ++chan)
1624          coords[chan] = lp_build_mul(&bld_base->base, coords[chan], projector);
1625       if (sample_key & LP_SAMPLER_SHADOW)
1626          coords[4] = lp_build_mul(&bld_base->base, coords[4], projector);
1627    }
1628
1629    uint32_t base_index = 0;
1630    if (!texture_deref_instr) {
1631       int samp_src_index = nir_tex_instr_src_index(instr, nir_tex_src_sampler_handle);
1632       if (samp_src_index == -1) {
1633          base_index = instr->sampler_index;
1634       }
1635    }
1636
1637    if (instr->op == nir_texop_txd) {
1638       sample_key |= LP_SAMPLER_LOD_DERIVATIVES << LP_SAMPLER_LOD_CONTROL_SHIFT;
1639       params.derivs = &derivs;
1640       if (bld_base->shader->info.stage == MESA_SHADER_FRAGMENT) {
1641          if (gallivm_perf & GALLIVM_PERF_NO_QUAD_LOD)
1642             lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1643          else
1644             lod_property = LP_SAMPLER_LOD_PER_QUAD;
1645       } else
1646          lod_property = LP_SAMPLER_LOD_PER_ELEMENT;
1647    }
1648
1649    sample_key |= lod_property << LP_SAMPLER_LOD_PROPERTY_SHIFT;
1650    params.sample_key = sample_key;
1651    params.offsets = offsets;
1652    params.texture_index = base_index;
1653    params.sampler_index = base_index;
1654    params.coords = coords;
1655    params.texel = texel;
1656    params.lod = explicit_lod;
1657    bld_base->tex(bld_base, &params);
1658    assign_dest(bld_base, &instr->dest, texel);
1659 }
1660
1661 static void visit_ssa_undef(struct lp_build_nir_context *bld_base,
1662                             const nir_ssa_undef_instr *instr)
1663 {
1664    unsigned num_components = instr->def.num_components;
1665    LLVMValueRef undef[NIR_MAX_VEC_COMPONENTS];
1666    struct lp_build_context *undef_bld = get_int_bld(bld_base, true, instr->def.bit_size);
1667    for (unsigned i = 0; i < num_components; i++)
1668       undef[i] = LLVMGetUndef(undef_bld->vec_type);
1669    assign_ssa_dest(bld_base, &instr->def, undef);
1670 }
1671
1672 static void visit_jump(struct lp_build_nir_context *bld_base,
1673                        const nir_jump_instr *instr)
1674 {
1675    switch (instr->type) {
1676    case nir_jump_break:
1677       bld_base->break_stmt(bld_base);
1678       break;
1679    case nir_jump_continue:
1680       bld_base->continue_stmt(bld_base);
1681       break;
1682    default:
1683       unreachable("Unknown jump instr\n");
1684    }
1685 }
1686
1687 static void visit_deref(struct lp_build_nir_context *bld_base,
1688                         nir_deref_instr *instr)
1689 {
1690    if (instr->mode != nir_var_mem_shared &&
1691        instr->mode != nir_var_mem_global)
1692       return;
1693    LLVMValueRef result = NULL;
1694    switch(instr->deref_type) {
1695    case nir_deref_type_var: {
1696       struct hash_entry *entry = _mesa_hash_table_search(bld_base->vars, instr->var);
1697       result = entry->data;
1698       break;
1699    }
1700    default:
1701       unreachable("Unhandled deref_instr deref type");
1702    }
1703
1704    assign_ssa(bld_base, instr->dest.ssa.index, result);
1705 }
1706
1707 static void visit_block(struct lp_build_nir_context *bld_base, nir_block *block)
1708 {
1709    nir_foreach_instr(instr, block)
1710    {
1711       switch (instr->type) {
1712       case nir_instr_type_alu:
1713          visit_alu(bld_base, nir_instr_as_alu(instr));
1714          break;
1715       case nir_instr_type_load_const:
1716          visit_load_const(bld_base, nir_instr_as_load_const(instr));
1717          break;
1718       case nir_instr_type_intrinsic:
1719          visit_intrinsic(bld_base, nir_instr_as_intrinsic(instr));
1720          break;
1721       case nir_instr_type_tex:
1722          visit_tex(bld_base, nir_instr_as_tex(instr));
1723          break;
1724       case nir_instr_type_phi:
1725          assert(0);
1726          break;
1727       case nir_instr_type_ssa_undef:
1728          visit_ssa_undef(bld_base, nir_instr_as_ssa_undef(instr));
1729          break;
1730       case nir_instr_type_jump:
1731          visit_jump(bld_base, nir_instr_as_jump(instr));
1732          break;
1733       case nir_instr_type_deref:
1734          visit_deref(bld_base, nir_instr_as_deref(instr));
1735          break;
1736       default:
1737          fprintf(stderr, "Unknown NIR instr type: ");
1738          nir_print_instr(instr, stderr);
1739          fprintf(stderr, "\n");
1740          abort();
1741       }
1742    }
1743 }
1744
1745 static void visit_if(struct lp_build_nir_context *bld_base, nir_if *if_stmt)
1746 {
1747    LLVMValueRef cond = get_src(bld_base, if_stmt->condition);
1748
1749    bld_base->if_cond(bld_base, cond);
1750    visit_cf_list(bld_base, &if_stmt->then_list);
1751
1752    if (!exec_list_is_empty(&if_stmt->else_list)) {
1753       bld_base->else_stmt(bld_base);
1754       visit_cf_list(bld_base, &if_stmt->else_list);
1755    }
1756    bld_base->endif_stmt(bld_base);
1757 }
1758
1759 static void visit_loop(struct lp_build_nir_context *bld_base, nir_loop *loop)
1760 {
1761    bld_base->bgnloop(bld_base);
1762    visit_cf_list(bld_base, &loop->body);
1763    bld_base->endloop(bld_base);
1764 }
1765
1766 static void visit_cf_list(struct lp_build_nir_context *bld_base,
1767                           struct exec_list *list)
1768 {
1769    foreach_list_typed(nir_cf_node, node, node, list)
1770    {
1771       switch (node->type) {
1772       case nir_cf_node_block:
1773          visit_block(bld_base, nir_cf_node_as_block(node));
1774          break;
1775
1776       case nir_cf_node_if:
1777          visit_if(bld_base, nir_cf_node_as_if(node));
1778          break;
1779
1780       case nir_cf_node_loop:
1781          visit_loop(bld_base, nir_cf_node_as_loop(node));
1782          break;
1783
1784       default:
1785          assert(0);
1786       }
1787    }
1788 }
1789
1790 static void
1791 handle_shader_output_decl(struct lp_build_nir_context *bld_base,
1792                           struct nir_shader *nir,
1793                           struct nir_variable *variable)
1794 {
1795    bld_base->emit_var_decl(bld_base, variable);
1796 }
1797
1798 /* vector registers are stored as arrays in LLVM side,
1799    so we can use GEP on them, as to do exec mask stores
1800    we need to operate on a single components.
1801    arrays are:
1802    0.x, 1.x, 2.x, 3.x
1803    0.y, 1.y, 2.y, 3.y
1804    ....
1805 */
1806 static LLVMTypeRef get_register_type(struct lp_build_nir_context *bld_base,
1807                                      nir_register *reg)
1808 {
1809    struct lp_build_context *int_bld = get_int_bld(bld_base, true, reg->bit_size);
1810
1811    LLVMTypeRef type = int_bld->vec_type;
1812    if (reg->num_array_elems)
1813       type = LLVMArrayType(type, reg->num_array_elems);
1814    if (reg->num_components > 1)
1815       type = LLVMArrayType(type, reg->num_components);
1816
1817    return type;
1818 }
1819
1820
1821 bool lp_build_nir_llvm(
1822    struct lp_build_nir_context *bld_base,
1823    struct nir_shader *nir)
1824 {
1825    struct nir_function *func;
1826
1827    nir_convert_from_ssa(nir, true);
1828    nir_lower_locals_to_regs(nir);
1829    nir_remove_dead_derefs(nir);
1830    nir_remove_dead_variables(nir, nir_var_function_temp);
1831
1832    nir_foreach_variable(variable, &nir->outputs)
1833       handle_shader_output_decl(bld_base, nir, variable);
1834
1835    bld_base->regs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
1836                                             _mesa_key_pointer_equal);
1837    bld_base->vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
1838                                             _mesa_key_pointer_equal);
1839
1840    func = (struct nir_function *)exec_list_get_head(&nir->functions);
1841
1842    nir_foreach_register(reg, &func->impl->registers) {
1843       LLVMTypeRef type = get_register_type(bld_base, reg);
1844       LLVMValueRef reg_alloc = lp_build_alloca_undef(bld_base->base.gallivm,
1845                                                      type, "reg");
1846       _mesa_hash_table_insert(bld_base->regs, reg, reg_alloc);
1847    }
1848    nir_index_ssa_defs(func->impl);
1849    bld_base->ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
1850    visit_cf_list(bld_base, &func->impl->body);
1851
1852    free(bld_base->ssa_defs);
1853    ralloc_free(bld_base->vars);
1854    ralloc_free(bld_base->regs);
1855    return true;
1856 }
1857
1858 /* do some basic opts to remove some things we don't want to see. */
1859 void lp_build_opt_nir(struct nir_shader *nir)
1860 {
1861    bool progress;
1862    do {
1863       progress = false;
1864       NIR_PASS_V(nir, nir_opt_constant_folding);
1865       NIR_PASS_V(nir, nir_opt_algebraic);
1866       NIR_PASS_V(nir, nir_lower_pack);
1867    } while (progress);
1868    nir_lower_bool_to_int32(nir);
1869 }