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tgsi: Implement OPCODE_DIV.
[mesa.git] / src / gallium / auxiliary / tgsi / tgsi_exec.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 /**
30 * TGSI interpreter/executor.
31 *
32 * Flow control information:
33 *
34 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
35 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
36 * care since a condition may be true for some quad components but false
37 * for other components.
38 *
39 * We basically execute all statements (even if they're in the part of
40 * an IF/ELSE clause that's "not taken") and use a special mask to
41 * control writing to destination registers. This is the ExecMask.
42 * See store_dest().
43 *
44 * The ExecMask is computed from three other masks (CondMask, LoopMask and
45 * ContMask) which are controlled by the flow control instructions (namely:
46 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
47 *
48 *
49 * Authors:
50 * Michal Krol
51 * Brian Paul
52 */
53
54 #include "pipe/p_compiler.h"
55 #include "pipe/p_state.h"
56 #include "pipe/p_shader_tokens.h"
57 #include "tgsi/tgsi_dump.h"
58 #include "tgsi/tgsi_parse.h"
59 #include "tgsi/tgsi_util.h"
60 #include "tgsi_exec.h"
61 #include "util/u_memory.h"
62 #include "util/u_math.h"
63
64
65 #define FAST_MATH 1
66
67 #define TILE_TOP_LEFT 0
68 #define TILE_TOP_RIGHT 1
69 #define TILE_BOTTOM_LEFT 2
70 #define TILE_BOTTOM_RIGHT 3
71
72 static void
73 micro_abs(union tgsi_exec_channel *dst,
74 const union tgsi_exec_channel *src)
75 {
76 dst->f[0] = fabsf(src->f[0]);
77 dst->f[1] = fabsf(src->f[1]);
78 dst->f[2] = fabsf(src->f[2]);
79 dst->f[3] = fabsf(src->f[3]);
80 }
81
82 static void
83 micro_arl(union tgsi_exec_channel *dst,
84 const union tgsi_exec_channel *src)
85 {
86 dst->i[0] = (int)floorf(src->f[0]);
87 dst->i[1] = (int)floorf(src->f[1]);
88 dst->i[2] = (int)floorf(src->f[2]);
89 dst->i[3] = (int)floorf(src->f[3]);
90 }
91
92 static void
93 micro_arr(union tgsi_exec_channel *dst,
94 const union tgsi_exec_channel *src)
95 {
96 dst->i[0] = (int)floorf(src->f[0] + 0.5f);
97 dst->i[1] = (int)floorf(src->f[1] + 0.5f);
98 dst->i[2] = (int)floorf(src->f[2] + 0.5f);
99 dst->i[3] = (int)floorf(src->f[3] + 0.5f);
100 }
101
102 static void
103 micro_ceil(union tgsi_exec_channel *dst,
104 const union tgsi_exec_channel *src)
105 {
106 dst->f[0] = ceilf(src->f[0]);
107 dst->f[1] = ceilf(src->f[1]);
108 dst->f[2] = ceilf(src->f[2]);
109 dst->f[3] = ceilf(src->f[3]);
110 }
111
112 static void
113 micro_clamp(union tgsi_exec_channel *dst,
114 const union tgsi_exec_channel *src0,
115 const union tgsi_exec_channel *src1,
116 const union tgsi_exec_channel *src2)
117 {
118 dst->f[0] = src0->f[0] < src1->f[0] ? src1->f[0] : src0->f[0] > src2->f[0] ? src2->f[0] : src0->f[0];
119 dst->f[1] = src0->f[1] < src1->f[1] ? src1->f[1] : src0->f[1] > src2->f[1] ? src2->f[1] : src0->f[1];
120 dst->f[2] = src0->f[2] < src1->f[2] ? src1->f[2] : src0->f[2] > src2->f[2] ? src2->f[2] : src0->f[2];
121 dst->f[3] = src0->f[3] < src1->f[3] ? src1->f[3] : src0->f[3] > src2->f[3] ? src2->f[3] : src0->f[3];
122 }
123
124 static void
125 micro_cmp(union tgsi_exec_channel *dst,
126 const union tgsi_exec_channel *src0,
127 const union tgsi_exec_channel *src1,
128 const union tgsi_exec_channel *src2)
129 {
130 dst->f[0] = src0->f[0] < 0.0f ? src1->f[0] : src2->f[0];
131 dst->f[1] = src0->f[1] < 0.0f ? src1->f[1] : src2->f[1];
132 dst->f[2] = src0->f[2] < 0.0f ? src1->f[2] : src2->f[2];
133 dst->f[3] = src0->f[3] < 0.0f ? src1->f[3] : src2->f[3];
134 }
135
136 static void
137 micro_cnd(union tgsi_exec_channel *dst,
138 const union tgsi_exec_channel *src0,
139 const union tgsi_exec_channel *src1,
140 const union tgsi_exec_channel *src2)
141 {
142 dst->f[0] = src2->f[0] > 0.5f ? src0->f[0] : src1->f[0];
143 dst->f[1] = src2->f[1] > 0.5f ? src0->f[1] : src1->f[1];
144 dst->f[2] = src2->f[2] > 0.5f ? src0->f[2] : src1->f[2];
145 dst->f[3] = src2->f[3] > 0.5f ? src0->f[3] : src1->f[3];
146 }
147
148 static void
149 micro_cos(union tgsi_exec_channel *dst,
150 const union tgsi_exec_channel *src)
151 {
152 dst->f[0] = cosf(src->f[0]);
153 dst->f[1] = cosf(src->f[1]);
154 dst->f[2] = cosf(src->f[2]);
155 dst->f[3] = cosf(src->f[3]);
156 }
157
158 static void
159 micro_ddx(union tgsi_exec_channel *dst,
160 const union tgsi_exec_channel *src)
161 {
162 dst->f[0] =
163 dst->f[1] =
164 dst->f[2] =
165 dst->f[3] = src->f[TILE_BOTTOM_RIGHT] - src->f[TILE_BOTTOM_LEFT];
166 }
167
168 static void
169 micro_ddy(union tgsi_exec_channel *dst,
170 const union tgsi_exec_channel *src)
171 {
172 dst->f[0] =
173 dst->f[1] =
174 dst->f[2] =
175 dst->f[3] = src->f[TILE_BOTTOM_LEFT] - src->f[TILE_TOP_LEFT];
176 }
177
178 static void
179 micro_exp2(union tgsi_exec_channel *dst,
180 const union tgsi_exec_channel *src)
181 {
182 #if FAST_MATH
183 dst->f[0] = util_fast_exp2(src->f[0]);
184 dst->f[1] = util_fast_exp2(src->f[1]);
185 dst->f[2] = util_fast_exp2(src->f[2]);
186 dst->f[3] = util_fast_exp2(src->f[3]);
187 #else
188 #if DEBUG
189 /* Inf is okay for this instruction, so clamp it to silence assertions. */
190 uint i;
191 union tgsi_exec_channel clamped;
192
193 for (i = 0; i < 4; i++) {
194 if (src->f[i] > 127.99999f) {
195 clamped.f[i] = 127.99999f;
196 } else if (src->f[i] < -126.99999f) {
197 clamped.f[i] = -126.99999f;
198 } else {
199 clamped.f[i] = src->f[i];
200 }
201 }
202 src = &clamped;
203 #endif /* DEBUG */
204
205 dst->f[0] = powf(2.0f, src->f[0]);
206 dst->f[1] = powf(2.0f, src->f[1]);
207 dst->f[2] = powf(2.0f, src->f[2]);
208 dst->f[3] = powf(2.0f, src->f[3]);
209 #endif /* FAST_MATH */
210 }
211
212 static void
213 micro_flr(union tgsi_exec_channel *dst,
214 const union tgsi_exec_channel *src)
215 {
216 dst->f[0] = floorf(src->f[0]);
217 dst->f[1] = floorf(src->f[1]);
218 dst->f[2] = floorf(src->f[2]);
219 dst->f[3] = floorf(src->f[3]);
220 }
221
222 static void
223 micro_frc(union tgsi_exec_channel *dst,
224 const union tgsi_exec_channel *src)
225 {
226 dst->f[0] = src->f[0] - floorf(src->f[0]);
227 dst->f[1] = src->f[1] - floorf(src->f[1]);
228 dst->f[2] = src->f[2] - floorf(src->f[2]);
229 dst->f[3] = src->f[3] - floorf(src->f[3]);
230 }
231
232 static void
233 micro_iabs(union tgsi_exec_channel *dst,
234 const union tgsi_exec_channel *src)
235 {
236 dst->i[0] = src->i[0] >= 0 ? src->i[0] : -src->i[0];
237 dst->i[1] = src->i[1] >= 0 ? src->i[1] : -src->i[1];
238 dst->i[2] = src->i[2] >= 0 ? src->i[2] : -src->i[2];
239 dst->i[3] = src->i[3] >= 0 ? src->i[3] : -src->i[3];
240 }
241
242 static void
243 micro_ineg(union tgsi_exec_channel *dst,
244 const union tgsi_exec_channel *src)
245 {
246 dst->i[0] = -src->i[0];
247 dst->i[1] = -src->i[1];
248 dst->i[2] = -src->i[2];
249 dst->i[3] = -src->i[3];
250 }
251
252 static void
253 micro_lg2(union tgsi_exec_channel *dst,
254 const union tgsi_exec_channel *src)
255 {
256 #if FAST_MATH
257 dst->f[0] = util_fast_log2(src->f[0]);
258 dst->f[1] = util_fast_log2(src->f[1]);
259 dst->f[2] = util_fast_log2(src->f[2]);
260 dst->f[3] = util_fast_log2(src->f[3]);
261 #else
262 dst->f[0] = logf(src->f[0]) * 1.442695f;
263 dst->f[1] = logf(src->f[1]) * 1.442695f;
264 dst->f[2] = logf(src->f[2]) * 1.442695f;
265 dst->f[3] = logf(src->f[3]) * 1.442695f;
266 #endif
267 }
268
269 static void
270 micro_lrp(union tgsi_exec_channel *dst,
271 const union tgsi_exec_channel *src0,
272 const union tgsi_exec_channel *src1,
273 const union tgsi_exec_channel *src2)
274 {
275 dst->f[0] = src0->f[0] * (src1->f[0] - src2->f[0]) + src2->f[0];
276 dst->f[1] = src0->f[1] * (src1->f[1] - src2->f[1]) + src2->f[1];
277 dst->f[2] = src0->f[2] * (src1->f[2] - src2->f[2]) + src2->f[2];
278 dst->f[3] = src0->f[3] * (src1->f[3] - src2->f[3]) + src2->f[3];
279 }
280
281 static void
282 micro_mad(union tgsi_exec_channel *dst,
283 const union tgsi_exec_channel *src0,
284 const union tgsi_exec_channel *src1,
285 const union tgsi_exec_channel *src2)
286 {
287 dst->f[0] = src0->f[0] * src1->f[0] + src2->f[0];
288 dst->f[1] = src0->f[1] * src1->f[1] + src2->f[1];
289 dst->f[2] = src0->f[2] * src1->f[2] + src2->f[2];
290 dst->f[3] = src0->f[3] * src1->f[3] + src2->f[3];
291 }
292
293 static void
294 micro_mov(union tgsi_exec_channel *dst,
295 const union tgsi_exec_channel *src)
296 {
297 dst->u[0] = src->u[0];
298 dst->u[1] = src->u[1];
299 dst->u[2] = src->u[2];
300 dst->u[3] = src->u[3];
301 }
302
303 static void
304 micro_rcp(union tgsi_exec_channel *dst,
305 const union tgsi_exec_channel *src)
306 {
307 #if 0 /* for debugging */
308 assert(src->f[0] != 0.0f);
309 assert(src->f[1] != 0.0f);
310 assert(src->f[2] != 0.0f);
311 assert(src->f[3] != 0.0f);
312 #endif
313 dst->f[0] = 1.0f / src->f[0];
314 dst->f[1] = 1.0f / src->f[1];
315 dst->f[2] = 1.0f / src->f[2];
316 dst->f[3] = 1.0f / src->f[3];
317 }
318
319 static void
320 micro_rnd(union tgsi_exec_channel *dst,
321 const union tgsi_exec_channel *src)
322 {
323 dst->f[0] = floorf(src->f[0] + 0.5f);
324 dst->f[1] = floorf(src->f[1] + 0.5f);
325 dst->f[2] = floorf(src->f[2] + 0.5f);
326 dst->f[3] = floorf(src->f[3] + 0.5f);
327 }
328
329 static void
330 micro_rsq(union tgsi_exec_channel *dst,
331 const union tgsi_exec_channel *src)
332 {
333 #if 0 /* for debugging */
334 assert(src->f[0] != 0.0f);
335 assert(src->f[1] != 0.0f);
336 assert(src->f[2] != 0.0f);
337 assert(src->f[3] != 0.0f);
338 #endif
339 dst->f[0] = 1.0f / sqrtf(fabsf(src->f[0]));
340 dst->f[1] = 1.0f / sqrtf(fabsf(src->f[1]));
341 dst->f[2] = 1.0f / sqrtf(fabsf(src->f[2]));
342 dst->f[3] = 1.0f / sqrtf(fabsf(src->f[3]));
343 }
344
345 static void
346 micro_seq(union tgsi_exec_channel *dst,
347 const union tgsi_exec_channel *src0,
348 const union tgsi_exec_channel *src1)
349 {
350 dst->f[0] = src0->f[0] == src1->f[0] ? 1.0f : 0.0f;
351 dst->f[1] = src0->f[1] == src1->f[1] ? 1.0f : 0.0f;
352 dst->f[2] = src0->f[2] == src1->f[2] ? 1.0f : 0.0f;
353 dst->f[3] = src0->f[3] == src1->f[3] ? 1.0f : 0.0f;
354 }
355
356 static void
357 micro_sge(union tgsi_exec_channel *dst,
358 const union tgsi_exec_channel *src0,
359 const union tgsi_exec_channel *src1)
360 {
361 dst->f[0] = src0->f[0] >= src1->f[0] ? 1.0f : 0.0f;
362 dst->f[1] = src0->f[1] >= src1->f[1] ? 1.0f : 0.0f;
363 dst->f[2] = src0->f[2] >= src1->f[2] ? 1.0f : 0.0f;
364 dst->f[3] = src0->f[3] >= src1->f[3] ? 1.0f : 0.0f;
365 }
366
367 static void
368 micro_sgn(union tgsi_exec_channel *dst,
369 const union tgsi_exec_channel *src)
370 {
371 dst->f[0] = src->f[0] < 0.0f ? -1.0f : src->f[0] > 0.0f ? 1.0f : 0.0f;
372 dst->f[1] = src->f[1] < 0.0f ? -1.0f : src->f[1] > 0.0f ? 1.0f : 0.0f;
373 dst->f[2] = src->f[2] < 0.0f ? -1.0f : src->f[2] > 0.0f ? 1.0f : 0.0f;
374 dst->f[3] = src->f[3] < 0.0f ? -1.0f : src->f[3] > 0.0f ? 1.0f : 0.0f;
375 }
376
377 static void
378 micro_sgt(union tgsi_exec_channel *dst,
379 const union tgsi_exec_channel *src0,
380 const union tgsi_exec_channel *src1)
381 {
382 dst->f[0] = src0->f[0] > src1->f[0] ? 1.0f : 0.0f;
383 dst->f[1] = src0->f[1] > src1->f[1] ? 1.0f : 0.0f;
384 dst->f[2] = src0->f[2] > src1->f[2] ? 1.0f : 0.0f;
385 dst->f[3] = src0->f[3] > src1->f[3] ? 1.0f : 0.0f;
386 }
387
388 static void
389 micro_sin(union tgsi_exec_channel *dst,
390 const union tgsi_exec_channel *src)
391 {
392 dst->f[0] = sinf(src->f[0]);
393 dst->f[1] = sinf(src->f[1]);
394 dst->f[2] = sinf(src->f[2]);
395 dst->f[3] = sinf(src->f[3]);
396 }
397
398 static void
399 micro_sle(union tgsi_exec_channel *dst,
400 const union tgsi_exec_channel *src0,
401 const union tgsi_exec_channel *src1)
402 {
403 dst->f[0] = src0->f[0] <= src1->f[0] ? 1.0f : 0.0f;
404 dst->f[1] = src0->f[1] <= src1->f[1] ? 1.0f : 0.0f;
405 dst->f[2] = src0->f[2] <= src1->f[2] ? 1.0f : 0.0f;
406 dst->f[3] = src0->f[3] <= src1->f[3] ? 1.0f : 0.0f;
407 }
408
409 static void
410 micro_slt(union tgsi_exec_channel *dst,
411 const union tgsi_exec_channel *src0,
412 const union tgsi_exec_channel *src1)
413 {
414 dst->f[0] = src0->f[0] < src1->f[0] ? 1.0f : 0.0f;
415 dst->f[1] = src0->f[1] < src1->f[1] ? 1.0f : 0.0f;
416 dst->f[2] = src0->f[2] < src1->f[2] ? 1.0f : 0.0f;
417 dst->f[3] = src0->f[3] < src1->f[3] ? 1.0f : 0.0f;
418 }
419
420 static void
421 micro_sne(union tgsi_exec_channel *dst,
422 const union tgsi_exec_channel *src0,
423 const union tgsi_exec_channel *src1)
424 {
425 dst->f[0] = src0->f[0] != src1->f[0] ? 1.0f : 0.0f;
426 dst->f[1] = src0->f[1] != src1->f[1] ? 1.0f : 0.0f;
427 dst->f[2] = src0->f[2] != src1->f[2] ? 1.0f : 0.0f;
428 dst->f[3] = src0->f[3] != src1->f[3] ? 1.0f : 0.0f;
429 }
430
431 static void
432 micro_trunc(union tgsi_exec_channel *dst,
433 const union tgsi_exec_channel *src)
434 {
435 dst->f[0] = (float)(int)src->f[0];
436 dst->f[1] = (float)(int)src->f[1];
437 dst->f[2] = (float)(int)src->f[2];
438 dst->f[3] = (float)(int)src->f[3];
439 }
440
441
442 #define CHAN_X 0
443 #define CHAN_Y 1
444 #define CHAN_Z 2
445 #define CHAN_W 3
446
447 enum tgsi_exec_datatype {
448 TGSI_EXEC_DATA_FLOAT,
449 TGSI_EXEC_DATA_INT,
450 TGSI_EXEC_DATA_UINT
451 };
452
453 /*
454 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
455 */
456 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
457 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
458 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
459 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
460 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
461 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
462 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
463 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
464 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
465 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
466 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
467 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
468 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
469 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
470 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
471 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
472 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
473 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
474 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
475 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
476 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
477 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
478 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
479 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
480 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
481 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
482 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
483 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
484 #define TEMP_R0 TGSI_EXEC_TEMP_R0
485 #define TEMP_P0 TGSI_EXEC_TEMP_P0
486
487 #define IS_CHANNEL_ENABLED(INST, CHAN)\
488 ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
489
490 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
491 ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
492
493 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
494 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
495 if (IS_CHANNEL_ENABLED( INST, CHAN ))
496
497 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
498 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
499 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
500
501
502 /** The execution mask depends on the conditional mask and the loop mask */
503 #define UPDATE_EXEC_MASK(MACH) \
504 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
505
506
507 static const union tgsi_exec_channel ZeroVec =
508 { { 0.0, 0.0, 0.0, 0.0 } };
509
510 static const union tgsi_exec_channel OneVec = {
511 {1.0f, 1.0f, 1.0f, 1.0f}
512 };
513
514
515 /**
516 * Assert that none of the float values in 'chan' are infinite or NaN.
517 * NaN and Inf may occur normally during program execution and should
518 * not lead to crashes, etc. But when debugging, it's helpful to catch
519 * them.
520 */
521 static INLINE void
522 check_inf_or_nan(const union tgsi_exec_channel *chan)
523 {
524 assert(!util_is_inf_or_nan((chan)->f[0]));
525 assert(!util_is_inf_or_nan((chan)->f[1]));
526 assert(!util_is_inf_or_nan((chan)->f[2]));
527 assert(!util_is_inf_or_nan((chan)->f[3]));
528 }
529
530
531 #ifdef DEBUG
532 static void
533 print_chan(const char *msg, const union tgsi_exec_channel *chan)
534 {
535 debug_printf("%s = {%f, %f, %f, %f}\n",
536 msg, chan->f[0], chan->f[1], chan->f[2], chan->f[3]);
537 }
538 #endif
539
540
541 #ifdef DEBUG
542 static void
543 print_temp(const struct tgsi_exec_machine *mach, uint index)
544 {
545 const struct tgsi_exec_vector *tmp = &mach->Temps[index];
546 int i;
547 debug_printf("Temp[%u] =\n", index);
548 for (i = 0; i < 4; i++) {
549 debug_printf(" %c: { %f, %f, %f, %f }\n",
550 "XYZW"[i],
551 tmp->xyzw[i].f[0],
552 tmp->xyzw[i].f[1],
553 tmp->xyzw[i].f[2],
554 tmp->xyzw[i].f[3]);
555 }
556 }
557 #endif
558
559
560 /**
561 * Check if there's a potential src/dst register data dependency when
562 * using SOA execution.
563 * Example:
564 * MOV T, T.yxwz;
565 * This would expand into:
566 * MOV t0, t1;
567 * MOV t1, t0;
568 * MOV t2, t3;
569 * MOV t3, t2;
570 * The second instruction will have the wrong value for t0 if executed as-is.
571 */
572 boolean
573 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
574 {
575 uint i, chan;
576
577 uint writemask = inst->Dst[0].Register.WriteMask;
578 if (writemask == TGSI_WRITEMASK_X ||
579 writemask == TGSI_WRITEMASK_Y ||
580 writemask == TGSI_WRITEMASK_Z ||
581 writemask == TGSI_WRITEMASK_W ||
582 writemask == TGSI_WRITEMASK_NONE) {
583 /* no chance of data dependency */
584 return FALSE;
585 }
586
587 /* loop over src regs */
588 for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
589 if ((inst->Src[i].Register.File ==
590 inst->Dst[0].Register.File) &&
591 (inst->Src[i].Register.Index ==
592 inst->Dst[0].Register.Index)) {
593 /* loop over dest channels */
594 uint channelsWritten = 0x0;
595 FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
596 /* check if we're reading a channel that's been written */
597 uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
598 if (channelsWritten & (1 << swizzle)) {
599 return TRUE;
600 }
601
602 channelsWritten |= (1 << chan);
603 }
604 }
605 }
606 return FALSE;
607 }
608
609
610 /**
611 * Initialize machine state by expanding tokens to full instructions,
612 * allocating temporary storage, setting up constants, etc.
613 * After this, we can call tgsi_exec_machine_run() many times.
614 */
615 void
616 tgsi_exec_machine_bind_shader(
617 struct tgsi_exec_machine *mach,
618 const struct tgsi_token *tokens,
619 uint numSamplers,
620 struct tgsi_sampler **samplers)
621 {
622 uint k;
623 struct tgsi_parse_context parse;
624 struct tgsi_full_instruction *instructions;
625 struct tgsi_full_declaration *declarations;
626 uint maxInstructions = 10, numInstructions = 0;
627 uint maxDeclarations = 10, numDeclarations = 0;
628
629 #if 0
630 tgsi_dump(tokens, 0);
631 #endif
632
633 util_init_math();
634
635 mach->Tokens = tokens;
636 mach->Samplers = samplers;
637
638 if (!tokens) {
639 /* unbind and free all */
640 if (mach->Declarations) {
641 FREE( mach->Declarations );
642 }
643 mach->Declarations = NULL;
644 mach->NumDeclarations = 0;
645
646 if (mach->Instructions) {
647 FREE( mach->Instructions );
648 }
649 mach->Instructions = NULL;
650 mach->NumInstructions = 0;
651
652 return;
653 }
654
655 k = tgsi_parse_init (&parse, mach->Tokens);
656 if (k != TGSI_PARSE_OK) {
657 debug_printf( "Problem parsing!\n" );
658 return;
659 }
660
661 mach->Processor = parse.FullHeader.Processor.Processor;
662 mach->ImmLimit = 0;
663
664 declarations = (struct tgsi_full_declaration *)
665 MALLOC( maxDeclarations * sizeof(struct tgsi_full_declaration) );
666
667 if (!declarations) {
668 return;
669 }
670
671 instructions = (struct tgsi_full_instruction *)
672 MALLOC( maxInstructions * sizeof(struct tgsi_full_instruction) );
673
674 if (!instructions) {
675 FREE( declarations );
676 return;
677 }
678
679 while( !tgsi_parse_end_of_tokens( &parse ) ) {
680 uint i;
681
682 tgsi_parse_token( &parse );
683 switch( parse.FullToken.Token.Type ) {
684 case TGSI_TOKEN_TYPE_DECLARATION:
685 /* save expanded declaration */
686 if (numDeclarations == maxDeclarations) {
687 declarations = REALLOC(declarations,
688 maxDeclarations
689 * sizeof(struct tgsi_full_declaration),
690 (maxDeclarations + 10)
691 * sizeof(struct tgsi_full_declaration));
692 maxDeclarations += 10;
693 }
694 if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_OUTPUT) {
695 unsigned reg;
696 for (reg = parse.FullToken.FullDeclaration.Range.First;
697 reg <= parse.FullToken.FullDeclaration.Range.Last;
698 ++reg) {
699 ++mach->NumOutputs;
700 }
701 }
702 memcpy(declarations + numDeclarations,
703 &parse.FullToken.FullDeclaration,
704 sizeof(declarations[0]));
705 numDeclarations++;
706 break;
707
708 case TGSI_TOKEN_TYPE_IMMEDIATE:
709 {
710 uint size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
711 assert( size <= 4 );
712 assert( mach->ImmLimit + 1 <= TGSI_EXEC_NUM_IMMEDIATES );
713
714 for( i = 0; i < size; i++ ) {
715 mach->Imms[mach->ImmLimit][i] =
716 parse.FullToken.FullImmediate.u[i].Float;
717 }
718 mach->ImmLimit += 1;
719 }
720 break;
721
722 case TGSI_TOKEN_TYPE_INSTRUCTION:
723
724 /* save expanded instruction */
725 if (numInstructions == maxInstructions) {
726 instructions = REALLOC(instructions,
727 maxInstructions
728 * sizeof(struct tgsi_full_instruction),
729 (maxInstructions + 10)
730 * sizeof(struct tgsi_full_instruction));
731 maxInstructions += 10;
732 }
733
734 memcpy(instructions + numInstructions,
735 &parse.FullToken.FullInstruction,
736 sizeof(instructions[0]));
737
738 numInstructions++;
739 break;
740
741 case TGSI_TOKEN_TYPE_PROPERTY:
742 break;
743
744 default:
745 assert( 0 );
746 }
747 }
748 tgsi_parse_free (&parse);
749
750 if (mach->Declarations) {
751 FREE( mach->Declarations );
752 }
753 mach->Declarations = declarations;
754 mach->NumDeclarations = numDeclarations;
755
756 if (mach->Instructions) {
757 FREE( mach->Instructions );
758 }
759 mach->Instructions = instructions;
760 mach->NumInstructions = numInstructions;
761 }
762
763
764 struct tgsi_exec_machine *
765 tgsi_exec_machine_create( void )
766 {
767 struct tgsi_exec_machine *mach;
768 uint i;
769
770 mach = align_malloc( sizeof *mach, 16 );
771 if (!mach)
772 goto fail;
773
774 memset(mach, 0, sizeof(*mach));
775
776 mach->Addrs = &mach->Temps[TGSI_EXEC_TEMP_ADDR];
777 mach->MaxGeometryShaderOutputs = TGSI_MAX_TOTAL_VERTICES;
778 mach->Predicates = &mach->Temps[TGSI_EXEC_TEMP_P0];
779
780 /* Setup constants. */
781 for( i = 0; i < 4; i++ ) {
782 mach->Temps[TEMP_0_I].xyzw[TEMP_0_C].u[i] = 0x00000000;
783 mach->Temps[TEMP_7F_I].xyzw[TEMP_7F_C].u[i] = 0x7FFFFFFF;
784 mach->Temps[TEMP_80_I].xyzw[TEMP_80_C].u[i] = 0x80000000;
785 mach->Temps[TEMP_FF_I].xyzw[TEMP_FF_C].u[i] = 0xFFFFFFFF;
786 mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].f[i] = 1.0f;
787 mach->Temps[TEMP_2_I].xyzw[TEMP_2_C].f[i] = 2.0f;
788 mach->Temps[TEMP_128_I].xyzw[TEMP_128_C].f[i] = 128.0f;
789 mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C].f[i] = -128.0f;
790 mach->Temps[TEMP_3_I].xyzw[TEMP_3_C].f[i] = 3.0f;
791 mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C].f[i] = 0.5f;
792 }
793
794 #ifdef DEBUG
795 /* silence warnings */
796 (void) print_chan;
797 (void) print_temp;
798 #endif
799
800 return mach;
801
802 fail:
803 align_free(mach);
804 return NULL;
805 }
806
807
808 void
809 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach)
810 {
811 if (mach) {
812 if (mach->Instructions)
813 FREE(mach->Instructions);
814 if (mach->Declarations)
815 FREE(mach->Declarations);
816 }
817
818 align_free(mach);
819 }
820
821 static void
822 micro_add(union tgsi_exec_channel *dst,
823 const union tgsi_exec_channel *src0,
824 const union tgsi_exec_channel *src1)
825 {
826 dst->f[0] = src0->f[0] + src1->f[0];
827 dst->f[1] = src0->f[1] + src1->f[1];
828 dst->f[2] = src0->f[2] + src1->f[2];
829 dst->f[3] = src0->f[3] + src1->f[3];
830 }
831
832 static void
833 micro_div(
834 union tgsi_exec_channel *dst,
835 const union tgsi_exec_channel *src0,
836 const union tgsi_exec_channel *src1 )
837 {
838 if (src1->f[0] != 0) {
839 dst->f[0] = src0->f[0] / src1->f[0];
840 }
841 if (src1->f[1] != 0) {
842 dst->f[1] = src0->f[1] / src1->f[1];
843 }
844 if (src1->f[2] != 0) {
845 dst->f[2] = src0->f[2] / src1->f[2];
846 }
847 if (src1->f[3] != 0) {
848 dst->f[3] = src0->f[3] / src1->f[3];
849 }
850 }
851
852 static void
853 micro_float_clamp(union tgsi_exec_channel *dst,
854 const union tgsi_exec_channel *src)
855 {
856 uint i;
857
858 for (i = 0; i < 4; i++) {
859 if (src->f[i] > 0.0f) {
860 if (src->f[i] > 1.884467e+019f)
861 dst->f[i] = 1.884467e+019f;
862 else if (src->f[i] < 5.42101e-020f)
863 dst->f[i] = 5.42101e-020f;
864 else
865 dst->f[i] = src->f[i];
866 }
867 else {
868 if (src->f[i] < -1.884467e+019f)
869 dst->f[i] = -1.884467e+019f;
870 else if (src->f[i] > -5.42101e-020f)
871 dst->f[i] = -5.42101e-020f;
872 else
873 dst->f[i] = src->f[i];
874 }
875 }
876 }
877
878 static void
879 micro_lt(
880 union tgsi_exec_channel *dst,
881 const union tgsi_exec_channel *src0,
882 const union tgsi_exec_channel *src1,
883 const union tgsi_exec_channel *src2,
884 const union tgsi_exec_channel *src3 )
885 {
886 dst->f[0] = src0->f[0] < src1->f[0] ? src2->f[0] : src3->f[0];
887 dst->f[1] = src0->f[1] < src1->f[1] ? src2->f[1] : src3->f[1];
888 dst->f[2] = src0->f[2] < src1->f[2] ? src2->f[2] : src3->f[2];
889 dst->f[3] = src0->f[3] < src1->f[3] ? src2->f[3] : src3->f[3];
890 }
891
892 static void
893 micro_max(union tgsi_exec_channel *dst,
894 const union tgsi_exec_channel *src0,
895 const union tgsi_exec_channel *src1)
896 {
897 dst->f[0] = src0->f[0] > src1->f[0] ? src0->f[0] : src1->f[0];
898 dst->f[1] = src0->f[1] > src1->f[1] ? src0->f[1] : src1->f[1];
899 dst->f[2] = src0->f[2] > src1->f[2] ? src0->f[2] : src1->f[2];
900 dst->f[3] = src0->f[3] > src1->f[3] ? src0->f[3] : src1->f[3];
901 }
902
903 static void
904 micro_min(union tgsi_exec_channel *dst,
905 const union tgsi_exec_channel *src0,
906 const union tgsi_exec_channel *src1)
907 {
908 dst->f[0] = src0->f[0] < src1->f[0] ? src0->f[0] : src1->f[0];
909 dst->f[1] = src0->f[1] < src1->f[1] ? src0->f[1] : src1->f[1];
910 dst->f[2] = src0->f[2] < src1->f[2] ? src0->f[2] : src1->f[2];
911 dst->f[3] = src0->f[3] < src1->f[3] ? src0->f[3] : src1->f[3];
912 }
913
914 static void
915 micro_mul(union tgsi_exec_channel *dst,
916 const union tgsi_exec_channel *src0,
917 const union tgsi_exec_channel *src1)
918 {
919 dst->f[0] = src0->f[0] * src1->f[0];
920 dst->f[1] = src0->f[1] * src1->f[1];
921 dst->f[2] = src0->f[2] * src1->f[2];
922 dst->f[3] = src0->f[3] * src1->f[3];
923 }
924
925 #if 0
926 static void
927 micro_imul64(
928 union tgsi_exec_channel *dst0,
929 union tgsi_exec_channel *dst1,
930 const union tgsi_exec_channel *src0,
931 const union tgsi_exec_channel *src1 )
932 {
933 dst1->i[0] = src0->i[0] * src1->i[0];
934 dst1->i[1] = src0->i[1] * src1->i[1];
935 dst1->i[2] = src0->i[2] * src1->i[2];
936 dst1->i[3] = src0->i[3] * src1->i[3];
937 dst0->i[0] = 0;
938 dst0->i[1] = 0;
939 dst0->i[2] = 0;
940 dst0->i[3] = 0;
941 }
942 #endif
943
944 #if 0
945 static void
946 micro_umul64(
947 union tgsi_exec_channel *dst0,
948 union tgsi_exec_channel *dst1,
949 const union tgsi_exec_channel *src0,
950 const union tgsi_exec_channel *src1 )
951 {
952 dst1->u[0] = src0->u[0] * src1->u[0];
953 dst1->u[1] = src0->u[1] * src1->u[1];
954 dst1->u[2] = src0->u[2] * src1->u[2];
955 dst1->u[3] = src0->u[3] * src1->u[3];
956 dst0->u[0] = 0;
957 dst0->u[1] = 0;
958 dst0->u[2] = 0;
959 dst0->u[3] = 0;
960 }
961 #endif
962
963
964 #if 0
965 static void
966 micro_movc(
967 union tgsi_exec_channel *dst,
968 const union tgsi_exec_channel *src0,
969 const union tgsi_exec_channel *src1,
970 const union tgsi_exec_channel *src2 )
971 {
972 dst->u[0] = src0->u[0] ? src1->u[0] : src2->u[0];
973 dst->u[1] = src0->u[1] ? src1->u[1] : src2->u[1];
974 dst->u[2] = src0->u[2] ? src1->u[2] : src2->u[2];
975 dst->u[3] = src0->u[3] ? src1->u[3] : src2->u[3];
976 }
977 #endif
978
979 static void
980 micro_neg(
981 union tgsi_exec_channel *dst,
982 const union tgsi_exec_channel *src )
983 {
984 dst->f[0] = -src->f[0];
985 dst->f[1] = -src->f[1];
986 dst->f[2] = -src->f[2];
987 dst->f[3] = -src->f[3];
988 }
989
990 static void
991 micro_pow(
992 union tgsi_exec_channel *dst,
993 const union tgsi_exec_channel *src0,
994 const union tgsi_exec_channel *src1 )
995 {
996 #if FAST_MATH
997 dst->f[0] = util_fast_pow( src0->f[0], src1->f[0] );
998 dst->f[1] = util_fast_pow( src0->f[1], src1->f[1] );
999 dst->f[2] = util_fast_pow( src0->f[2], src1->f[2] );
1000 dst->f[3] = util_fast_pow( src0->f[3], src1->f[3] );
1001 #else
1002 dst->f[0] = powf( src0->f[0], src1->f[0] );
1003 dst->f[1] = powf( src0->f[1], src1->f[1] );
1004 dst->f[2] = powf( src0->f[2], src1->f[2] );
1005 dst->f[3] = powf( src0->f[3], src1->f[3] );
1006 #endif
1007 }
1008
1009 static void
1010 micro_sub(union tgsi_exec_channel *dst,
1011 const union tgsi_exec_channel *src0,
1012 const union tgsi_exec_channel *src1)
1013 {
1014 dst->f[0] = src0->f[0] - src1->f[0];
1015 dst->f[1] = src0->f[1] - src1->f[1];
1016 dst->f[2] = src0->f[2] - src1->f[2];
1017 dst->f[3] = src0->f[3] - src1->f[3];
1018 }
1019
1020 static void
1021 fetch_src_file_channel(const struct tgsi_exec_machine *mach,
1022 const uint file,
1023 const uint swizzle,
1024 const union tgsi_exec_channel *index,
1025 const union tgsi_exec_channel *index2D,
1026 union tgsi_exec_channel *chan)
1027 {
1028 uint i;
1029
1030 switch (file) {
1031 case TGSI_FILE_CONSTANT:
1032 for (i = 0; i < QUAD_SIZE; i++) {
1033 assert(index2D->i[i] >= 0 && index2D->i[i] < PIPE_MAX_CONSTANT_BUFFERS);
1034 assert(mach->Consts[index2D->i[i]]);
1035
1036 if (index->i[i] < 0) {
1037 chan->u[i] = 0;
1038 } else {
1039 const uint *p = (const uint *)mach->Consts[index2D->i[i]];
1040
1041 chan->u[i] = p[index->i[i] * 4 + swizzle];
1042 }
1043 }
1044 break;
1045
1046 case TGSI_FILE_INPUT:
1047 case TGSI_FILE_SYSTEM_VALUE:
1048 for (i = 0; i < QUAD_SIZE; i++) {
1049 /* XXX: 2D indexing */
1050 chan->u[i] = mach->Inputs[index2D->i[i] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index->i[i]].xyzw[swizzle].u[i];
1051 }
1052 break;
1053
1054 case TGSI_FILE_TEMPORARY:
1055 for (i = 0; i < QUAD_SIZE; i++) {
1056 assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
1057 assert(index2D->i[i] == 0);
1058
1059 chan->u[i] = mach->Temps[index->i[i]].xyzw[swizzle].u[i];
1060 }
1061 break;
1062
1063 case TGSI_FILE_IMMEDIATE:
1064 for (i = 0; i < QUAD_SIZE; i++) {
1065 assert(index->i[i] >= 0 && index->i[i] < (int)mach->ImmLimit);
1066 assert(index2D->i[i] == 0);
1067
1068 chan->f[i] = mach->Imms[index->i[i]][swizzle];
1069 }
1070 break;
1071
1072 case TGSI_FILE_ADDRESS:
1073 for (i = 0; i < QUAD_SIZE; i++) {
1074 assert(index->i[i] >= 0);
1075 assert(index2D->i[i] == 0);
1076
1077 chan->u[i] = mach->Addrs[index->i[i]].xyzw[swizzle].u[i];
1078 }
1079 break;
1080
1081 case TGSI_FILE_PREDICATE:
1082 for (i = 0; i < QUAD_SIZE; i++) {
1083 assert(index->i[i] >= 0 && index->i[i] < TGSI_EXEC_NUM_PREDS);
1084 assert(index2D->i[i] == 0);
1085
1086 chan->u[i] = mach->Predicates[0].xyzw[swizzle].u[i];
1087 }
1088 break;
1089
1090 case TGSI_FILE_OUTPUT:
1091 /* vertex/fragment output vars can be read too */
1092 for (i = 0; i < QUAD_SIZE; i++) {
1093 assert(index->i[i] >= 0);
1094 assert(index2D->i[i] == 0);
1095
1096 chan->u[i] = mach->Outputs[index->i[i]].xyzw[swizzle].u[i];
1097 }
1098 break;
1099
1100 default:
1101 assert(0);
1102 for (i = 0; i < QUAD_SIZE; i++) {
1103 chan->u[i] = 0;
1104 }
1105 }
1106 }
1107
1108 static void
1109 fetch_source(const struct tgsi_exec_machine *mach,
1110 union tgsi_exec_channel *chan,
1111 const struct tgsi_full_src_register *reg,
1112 const uint chan_index,
1113 enum tgsi_exec_datatype src_datatype)
1114 {
1115 union tgsi_exec_channel index;
1116 union tgsi_exec_channel index2D;
1117 uint swizzle;
1118
1119 /* We start with a direct index into a register file.
1120 *
1121 * file[1],
1122 * where:
1123 * file = Register.File
1124 * [1] = Register.Index
1125 */
1126 index.i[0] =
1127 index.i[1] =
1128 index.i[2] =
1129 index.i[3] = reg->Register.Index;
1130
1131 /* There is an extra source register that indirectly subscripts
1132 * a register file. The direct index now becomes an offset
1133 * that is being added to the indirect register.
1134 *
1135 * file[ind[2].x+1],
1136 * where:
1137 * ind = Indirect.File
1138 * [2] = Indirect.Index
1139 * .x = Indirect.SwizzleX
1140 */
1141 if (reg->Register.Indirect) {
1142 union tgsi_exec_channel index2;
1143 union tgsi_exec_channel indir_index;
1144 const uint execmask = mach->ExecMask;
1145 uint i;
1146
1147 /* which address register (always zero now) */
1148 index2.i[0] =
1149 index2.i[1] =
1150 index2.i[2] =
1151 index2.i[3] = reg->Indirect.Index;
1152
1153 /* get current value of address register[swizzle] */
1154 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1155 fetch_src_file_channel(mach,
1156 reg->Indirect.File,
1157 swizzle,
1158 &index2,
1159 &ZeroVec,
1160 &indir_index);
1161
1162 /* add value of address register to the offset */
1163 index.i[0] += indir_index.i[0];
1164 index.i[1] += indir_index.i[1];
1165 index.i[2] += indir_index.i[2];
1166 index.i[3] += indir_index.i[3];
1167
1168 /* for disabled execution channels, zero-out the index to
1169 * avoid using a potential garbage value.
1170 */
1171 for (i = 0; i < QUAD_SIZE; i++) {
1172 if ((execmask & (1 << i)) == 0)
1173 index.i[i] = 0;
1174 }
1175 }
1176
1177 /* There is an extra source register that is a second
1178 * subscript to a register file. Effectively it means that
1179 * the register file is actually a 2D array of registers.
1180 *
1181 * file[3][1],
1182 * where:
1183 * [3] = Dimension.Index
1184 */
1185 if (reg->Register.Dimension) {
1186 index2D.i[0] =
1187 index2D.i[1] =
1188 index2D.i[2] =
1189 index2D.i[3] = reg->Dimension.Index;
1190
1191 /* Again, the second subscript index can be addressed indirectly
1192 * identically to the first one.
1193 * Nothing stops us from indirectly addressing the indirect register,
1194 * but there is no need for that, so we won't exercise it.
1195 *
1196 * file[ind[4].y+3][1],
1197 * where:
1198 * ind = DimIndirect.File
1199 * [4] = DimIndirect.Index
1200 * .y = DimIndirect.SwizzleX
1201 */
1202 if (reg->Dimension.Indirect) {
1203 union tgsi_exec_channel index2;
1204 union tgsi_exec_channel indir_index;
1205 const uint execmask = mach->ExecMask;
1206 uint i;
1207
1208 index2.i[0] =
1209 index2.i[1] =
1210 index2.i[2] =
1211 index2.i[3] = reg->DimIndirect.Index;
1212
1213 swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
1214 fetch_src_file_channel(mach,
1215 reg->DimIndirect.File,
1216 swizzle,
1217 &index2,
1218 &ZeroVec,
1219 &indir_index);
1220
1221 index2D.i[0] += indir_index.i[0];
1222 index2D.i[1] += indir_index.i[1];
1223 index2D.i[2] += indir_index.i[2];
1224 index2D.i[3] += indir_index.i[3];
1225
1226 /* for disabled execution channels, zero-out the index to
1227 * avoid using a potential garbage value.
1228 */
1229 for (i = 0; i < QUAD_SIZE; i++) {
1230 if ((execmask & (1 << i)) == 0) {
1231 index2D.i[i] = 0;
1232 }
1233 }
1234 }
1235
1236 /* If by any chance there was a need for a 3D array of register
1237 * files, we would have to check whether Dimension is followed
1238 * by a dimension register and continue the saga.
1239 */
1240 } else {
1241 index2D.i[0] =
1242 index2D.i[1] =
1243 index2D.i[2] =
1244 index2D.i[3] = 0;
1245 }
1246
1247 swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
1248 fetch_src_file_channel(mach,
1249 reg->Register.File,
1250 swizzle,
1251 &index,
1252 &index2D,
1253 chan);
1254
1255 if (reg->Register.Absolute) {
1256 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1257 micro_abs(chan, chan);
1258 } else {
1259 micro_iabs(chan, chan);
1260 }
1261 }
1262
1263 if (reg->Register.Negate) {
1264 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1265 micro_neg(chan, chan);
1266 } else {
1267 micro_ineg(chan, chan);
1268 }
1269 }
1270 }
1271
1272 static void
1273 store_dest(struct tgsi_exec_machine *mach,
1274 const union tgsi_exec_channel *chan,
1275 const struct tgsi_full_dst_register *reg,
1276 const struct tgsi_full_instruction *inst,
1277 uint chan_index,
1278 enum tgsi_exec_datatype dst_datatype)
1279 {
1280 uint i;
1281 union tgsi_exec_channel null;
1282 union tgsi_exec_channel *dst;
1283 uint execmask = mach->ExecMask;
1284 int offset = 0; /* indirection offset */
1285 int index;
1286
1287 /* for debugging */
1288 if (0 && dst_datatype == TGSI_EXEC_DATA_FLOAT) {
1289 check_inf_or_nan(chan);
1290 }
1291
1292 /* There is an extra source register that indirectly subscripts
1293 * a register file. The direct index now becomes an offset
1294 * that is being added to the indirect register.
1295 *
1296 * file[ind[2].x+1],
1297 * where:
1298 * ind = Indirect.File
1299 * [2] = Indirect.Index
1300 * .x = Indirect.SwizzleX
1301 */
1302 if (reg->Register.Indirect) {
1303 union tgsi_exec_channel index;
1304 union tgsi_exec_channel indir_index;
1305 uint swizzle;
1306
1307 /* which address register (always zero for now) */
1308 index.i[0] =
1309 index.i[1] =
1310 index.i[2] =
1311 index.i[3] = reg->Indirect.Index;
1312
1313 /* get current value of address register[swizzle] */
1314 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1315
1316 /* fetch values from the address/indirection register */
1317 fetch_src_file_channel(mach,
1318 reg->Indirect.File,
1319 swizzle,
1320 &index,
1321 &ZeroVec,
1322 &indir_index);
1323
1324 /* save indirection offset */
1325 offset = indir_index.i[0];
1326 }
1327
1328 switch (reg->Register.File) {
1329 case TGSI_FILE_NULL:
1330 dst = &null;
1331 break;
1332
1333 case TGSI_FILE_OUTPUT:
1334 index = mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
1335 + reg->Register.Index;
1336 dst = &mach->Outputs[offset + index].xyzw[chan_index];
1337 #if 0
1338 if (TGSI_PROCESSOR_GEOMETRY == mach->Processor) {
1339 fprintf(stderr, "STORING OUT[%d] mask(%d), = (", offset + index, execmask);
1340 for (i = 0; i < QUAD_SIZE; i++)
1341 if (execmask & (1 << i))
1342 fprintf(stderr, "%f, ", chan->f[i]);
1343 fprintf(stderr, ")\n");
1344 }
1345 #endif
1346 break;
1347
1348 case TGSI_FILE_TEMPORARY:
1349 index = reg->Register.Index;
1350 assert( index < TGSI_EXEC_NUM_TEMPS );
1351 dst = &mach->Temps[offset + index].xyzw[chan_index];
1352 break;
1353
1354 case TGSI_FILE_ADDRESS:
1355 index = reg->Register.Index;
1356 dst = &mach->Addrs[index].xyzw[chan_index];
1357 break;
1358
1359 case TGSI_FILE_PREDICATE:
1360 index = reg->Register.Index;
1361 assert(index < TGSI_EXEC_NUM_PREDS);
1362 dst = &mach->Predicates[index].xyzw[chan_index];
1363 break;
1364
1365 default:
1366 assert( 0 );
1367 return;
1368 }
1369
1370 if (inst->Instruction.Predicate) {
1371 uint swizzle;
1372 union tgsi_exec_channel *pred;
1373
1374 switch (chan_index) {
1375 case CHAN_X:
1376 swizzle = inst->Predicate.SwizzleX;
1377 break;
1378 case CHAN_Y:
1379 swizzle = inst->Predicate.SwizzleY;
1380 break;
1381 case CHAN_Z:
1382 swizzle = inst->Predicate.SwizzleZ;
1383 break;
1384 case CHAN_W:
1385 swizzle = inst->Predicate.SwizzleW;
1386 break;
1387 default:
1388 assert(0);
1389 return;
1390 }
1391
1392 assert(inst->Predicate.Index == 0);
1393
1394 pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
1395
1396 if (inst->Predicate.Negate) {
1397 for (i = 0; i < QUAD_SIZE; i++) {
1398 if (pred->u[i]) {
1399 execmask &= ~(1 << i);
1400 }
1401 }
1402 } else {
1403 for (i = 0; i < QUAD_SIZE; i++) {
1404 if (!pred->u[i]) {
1405 execmask &= ~(1 << i);
1406 }
1407 }
1408 }
1409 }
1410
1411 switch (inst->Instruction.Saturate) {
1412 case TGSI_SAT_NONE:
1413 for (i = 0; i < QUAD_SIZE; i++)
1414 if (execmask & (1 << i))
1415 dst->i[i] = chan->i[i];
1416 break;
1417
1418 case TGSI_SAT_ZERO_ONE:
1419 for (i = 0; i < QUAD_SIZE; i++)
1420 if (execmask & (1 << i)) {
1421 if (chan->f[i] < 0.0f)
1422 dst->f[i] = 0.0f;
1423 else if (chan->f[i] > 1.0f)
1424 dst->f[i] = 1.0f;
1425 else
1426 dst->i[i] = chan->i[i];
1427 }
1428 break;
1429
1430 case TGSI_SAT_MINUS_PLUS_ONE:
1431 for (i = 0; i < QUAD_SIZE; i++)
1432 if (execmask & (1 << i)) {
1433 if (chan->f[i] < -1.0f)
1434 dst->f[i] = -1.0f;
1435 else if (chan->f[i] > 1.0f)
1436 dst->f[i] = 1.0f;
1437 else
1438 dst->i[i] = chan->i[i];
1439 }
1440 break;
1441
1442 default:
1443 assert( 0 );
1444 }
1445 }
1446
1447 #define FETCH(VAL,INDEX,CHAN)\
1448 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1449
1450 #define STORE(VAL,INDEX,CHAN)\
1451 store_dest(mach, VAL, &inst->Dst[INDEX], inst, CHAN, TGSI_EXEC_DATA_FLOAT)
1452
1453
1454 /**
1455 * Execute ARB-style KIL which is predicated by a src register.
1456 * Kill fragment if any of the four values is less than zero.
1457 */
1458 static void
1459 exec_kil(struct tgsi_exec_machine *mach,
1460 const struct tgsi_full_instruction *inst)
1461 {
1462 uint uniquemask;
1463 uint chan_index;
1464 uint kilmask = 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1465 union tgsi_exec_channel r[1];
1466
1467 /* This mask stores component bits that were already tested. */
1468 uniquemask = 0;
1469
1470 for (chan_index = 0; chan_index < 4; chan_index++)
1471 {
1472 uint swizzle;
1473 uint i;
1474
1475 /* unswizzle channel */
1476 swizzle = tgsi_util_get_full_src_register_swizzle (
1477 &inst->Src[0],
1478 chan_index);
1479
1480 /* check if the component has not been already tested */
1481 if (uniquemask & (1 << swizzle))
1482 continue;
1483 uniquemask |= 1 << swizzle;
1484
1485 FETCH(&r[0], 0, chan_index);
1486 for (i = 0; i < 4; i++)
1487 if (r[0].f[i] < 0.0f)
1488 kilmask |= 1 << i;
1489 }
1490
1491 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1492 }
1493
1494 /**
1495 * Execute NVIDIA-style KIL which is predicated by a condition code.
1496 * Kill fragment if the condition code is TRUE.
1497 */
1498 static void
1499 exec_kilp(struct tgsi_exec_machine *mach,
1500 const struct tgsi_full_instruction *inst)
1501 {
1502 uint kilmask; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1503
1504 /* "unconditional" kil */
1505 kilmask = mach->ExecMask;
1506 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1507 }
1508
1509 static void
1510 emit_vertex(struct tgsi_exec_machine *mach)
1511 {
1512 /* FIXME: check for exec mask correctly
1513 unsigned i;
1514 for (i = 0; i < QUAD_SIZE; ++i) {
1515 if ((mach->ExecMask & (1 << i)))
1516 */
1517 if (mach->ExecMask) {
1518 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] += mach->NumOutputs;
1519 mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]]++;
1520 }
1521 }
1522
1523 static void
1524 emit_primitive(struct tgsi_exec_machine *mach)
1525 {
1526 unsigned *prim_count = &mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0];
1527 /* FIXME: check for exec mask correctly
1528 unsigned i;
1529 for (i = 0; i < QUAD_SIZE; ++i) {
1530 if ((mach->ExecMask & (1 << i)))
1531 */
1532 if (mach->ExecMask) {
1533 ++(*prim_count);
1534 debug_assert((*prim_count * mach->NumOutputs) < mach->MaxGeometryShaderOutputs);
1535 mach->Primitives[*prim_count] = 0;
1536 }
1537 }
1538
1539 /*
1540 * Fetch four texture samples using STR texture coordinates.
1541 */
1542 static void
1543 fetch_texel( struct tgsi_sampler *sampler,
1544 const union tgsi_exec_channel *s,
1545 const union tgsi_exec_channel *t,
1546 const union tgsi_exec_channel *p,
1547 const union tgsi_exec_channel *c0,
1548 enum tgsi_sampler_control control,
1549 union tgsi_exec_channel *r,
1550 union tgsi_exec_channel *g,
1551 union tgsi_exec_channel *b,
1552 union tgsi_exec_channel *a )
1553 {
1554 uint j;
1555 float rgba[NUM_CHANNELS][QUAD_SIZE];
1556
1557 sampler->get_samples(sampler, s->f, t->f, p->f, c0->f, control, rgba);
1558
1559 for (j = 0; j < 4; j++) {
1560 r->f[j] = rgba[0][j];
1561 g->f[j] = rgba[1][j];
1562 b->f[j] = rgba[2][j];
1563 a->f[j] = rgba[3][j];
1564 }
1565 }
1566
1567
1568 #define TEX_MODIFIER_NONE 0
1569 #define TEX_MODIFIER_PROJECTED 1
1570 #define TEX_MODIFIER_LOD_BIAS 2
1571 #define TEX_MODIFIER_EXPLICIT_LOD 3
1572
1573
1574 static void
1575 exec_tex(struct tgsi_exec_machine *mach,
1576 const struct tgsi_full_instruction *inst,
1577 uint modifier)
1578 {
1579 const uint unit = inst->Src[1].Register.Index;
1580 union tgsi_exec_channel r[4];
1581 const union tgsi_exec_channel *lod = &ZeroVec;
1582 enum tgsi_sampler_control control;
1583 uint chan_index;
1584
1585 if (modifier != TEX_MODIFIER_NONE) {
1586 FETCH(&r[3], 0, CHAN_W);
1587 if (modifier != TEX_MODIFIER_PROJECTED) {
1588 lod = &r[3];
1589 }
1590 }
1591
1592 if (modifier == TEX_MODIFIER_EXPLICIT_LOD) {
1593 control = tgsi_sampler_lod_explicit;
1594 } else {
1595 control = tgsi_sampler_lod_bias;
1596 }
1597
1598 switch (inst->Texture.Texture) {
1599 case TGSI_TEXTURE_1D:
1600 case TGSI_TEXTURE_SHADOW1D:
1601 FETCH(&r[0], 0, CHAN_X);
1602
1603 if (modifier == TEX_MODIFIER_PROJECTED) {
1604 micro_div(&r[0], &r[0], &r[3]);
1605 }
1606
1607 fetch_texel(mach->Samplers[unit],
1608 &r[0], &ZeroVec, &ZeroVec, lod, /* S, T, P, LOD */
1609 control,
1610 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1611 break;
1612
1613 case TGSI_TEXTURE_2D:
1614 case TGSI_TEXTURE_RECT:
1615 case TGSI_TEXTURE_SHADOW2D:
1616 case TGSI_TEXTURE_SHADOWRECT:
1617 FETCH(&r[0], 0, CHAN_X);
1618 FETCH(&r[1], 0, CHAN_Y);
1619 FETCH(&r[2], 0, CHAN_Z);
1620
1621 if (modifier == TEX_MODIFIER_PROJECTED) {
1622 micro_div(&r[0], &r[0], &r[3]);
1623 micro_div(&r[1], &r[1], &r[3]);
1624 micro_div(&r[2], &r[2], &r[3]);
1625 }
1626
1627 fetch_texel(mach->Samplers[unit],
1628 &r[0], &r[1], &r[2], lod, /* S, T, P, LOD */
1629 control,
1630 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1631 break;
1632
1633 case TGSI_TEXTURE_3D:
1634 case TGSI_TEXTURE_CUBE:
1635 FETCH(&r[0], 0, CHAN_X);
1636 FETCH(&r[1], 0, CHAN_Y);
1637 FETCH(&r[2], 0, CHAN_Z);
1638
1639 if (modifier == TEX_MODIFIER_PROJECTED) {
1640 micro_div(&r[0], &r[0], &r[3]);
1641 micro_div(&r[1], &r[1], &r[3]);
1642 micro_div(&r[2], &r[2], &r[3]);
1643 }
1644
1645 fetch_texel(mach->Samplers[unit],
1646 &r[0], &r[1], &r[2], lod,
1647 control,
1648 &r[0], &r[1], &r[2], &r[3]);
1649 break;
1650
1651 default:
1652 assert(0);
1653 }
1654
1655 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1656 STORE(&r[chan_index], 0, chan_index);
1657 }
1658 }
1659
1660 static void
1661 exec_txd(struct tgsi_exec_machine *mach,
1662 const struct tgsi_full_instruction *inst)
1663 {
1664 const uint unit = inst->Src[3].Register.Index;
1665 union tgsi_exec_channel r[4];
1666 uint chan_index;
1667
1668 /*
1669 * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
1670 */
1671
1672 switch (inst->Texture.Texture) {
1673 case TGSI_TEXTURE_1D:
1674 case TGSI_TEXTURE_SHADOW1D:
1675
1676 FETCH(&r[0], 0, CHAN_X);
1677
1678 fetch_texel(mach->Samplers[unit],
1679 &r[0], &ZeroVec, &ZeroVec, &ZeroVec, /* S, T, P, BIAS */
1680 tgsi_sampler_lod_bias,
1681 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1682 break;
1683
1684 case TGSI_TEXTURE_2D:
1685 case TGSI_TEXTURE_RECT:
1686 case TGSI_TEXTURE_SHADOW2D:
1687 case TGSI_TEXTURE_SHADOWRECT:
1688
1689 FETCH(&r[0], 0, CHAN_X);
1690 FETCH(&r[1], 0, CHAN_Y);
1691 FETCH(&r[2], 0, CHAN_Z);
1692
1693 fetch_texel(mach->Samplers[unit],
1694 &r[0], &r[1], &r[2], &ZeroVec, /* inputs */
1695 tgsi_sampler_lod_bias,
1696 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1697 break;
1698
1699 case TGSI_TEXTURE_3D:
1700 case TGSI_TEXTURE_CUBE:
1701
1702 FETCH(&r[0], 0, CHAN_X);
1703 FETCH(&r[1], 0, CHAN_Y);
1704 FETCH(&r[2], 0, CHAN_Z);
1705
1706 fetch_texel(mach->Samplers[unit],
1707 &r[0], &r[1], &r[2], &ZeroVec,
1708 tgsi_sampler_lod_bias,
1709 &r[0], &r[1], &r[2], &r[3]);
1710 break;
1711
1712 default:
1713 assert(0);
1714 }
1715
1716 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1717 STORE(&r[chan_index], 0, chan_index);
1718 }
1719 }
1720
1721
1722 /**
1723 * Evaluate a constant-valued coefficient at the position of the
1724 * current quad.
1725 */
1726 static void
1727 eval_constant_coef(
1728 struct tgsi_exec_machine *mach,
1729 unsigned attrib,
1730 unsigned chan )
1731 {
1732 unsigned i;
1733
1734 for( i = 0; i < QUAD_SIZE; i++ ) {
1735 mach->Inputs[attrib].xyzw[chan].f[i] = mach->InterpCoefs[attrib].a0[chan];
1736 }
1737 }
1738
1739 /**
1740 * Evaluate a linear-valued coefficient at the position of the
1741 * current quad.
1742 */
1743 static void
1744 eval_linear_coef(
1745 struct tgsi_exec_machine *mach,
1746 unsigned attrib,
1747 unsigned chan )
1748 {
1749 const float x = mach->QuadPos.xyzw[0].f[0];
1750 const float y = mach->QuadPos.xyzw[1].f[0];
1751 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1752 const float dady = mach->InterpCoefs[attrib].dady[chan];
1753 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1754 mach->Inputs[attrib].xyzw[chan].f[0] = a0;
1755 mach->Inputs[attrib].xyzw[chan].f[1] = a0 + dadx;
1756 mach->Inputs[attrib].xyzw[chan].f[2] = a0 + dady;
1757 mach->Inputs[attrib].xyzw[chan].f[3] = a0 + dadx + dady;
1758 }
1759
1760 /**
1761 * Evaluate a perspective-valued coefficient at the position of the
1762 * current quad.
1763 */
1764 static void
1765 eval_perspective_coef(
1766 struct tgsi_exec_machine *mach,
1767 unsigned attrib,
1768 unsigned chan )
1769 {
1770 const float x = mach->QuadPos.xyzw[0].f[0];
1771 const float y = mach->QuadPos.xyzw[1].f[0];
1772 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1773 const float dady = mach->InterpCoefs[attrib].dady[chan];
1774 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1775 const float *w = mach->QuadPos.xyzw[3].f;
1776 /* divide by W here */
1777 mach->Inputs[attrib].xyzw[chan].f[0] = a0 / w[0];
1778 mach->Inputs[attrib].xyzw[chan].f[1] = (a0 + dadx) / w[1];
1779 mach->Inputs[attrib].xyzw[chan].f[2] = (a0 + dady) / w[2];
1780 mach->Inputs[attrib].xyzw[chan].f[3] = (a0 + dadx + dady) / w[3];
1781 }
1782
1783
1784 typedef void (* eval_coef_func)(
1785 struct tgsi_exec_machine *mach,
1786 unsigned attrib,
1787 unsigned chan );
1788
1789 static void
1790 exec_declaration(struct tgsi_exec_machine *mach,
1791 const struct tgsi_full_declaration *decl)
1792 {
1793 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
1794 if (decl->Declaration.File == TGSI_FILE_INPUT ||
1795 decl->Declaration.File == TGSI_FILE_SYSTEM_VALUE) {
1796 uint first, last, mask;
1797
1798 first = decl->Range.First;
1799 last = decl->Range.Last;
1800 mask = decl->Declaration.UsageMask;
1801
1802 /* XXX we could remove this special-case code since
1803 * mach->InterpCoefs[first].a0 should already have the
1804 * front/back-face value. But we should first update the
1805 * ureg code to emit the right UsageMask value (WRITEMASK_X).
1806 * Then, we could remove the tgsi_exec_machine::Face field.
1807 */
1808 if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
1809 uint i;
1810
1811 assert(decl->Semantic.Index == 0);
1812 assert(first == last);
1813
1814 for (i = 0; i < QUAD_SIZE; i++) {
1815 mach->Inputs[first].xyzw[0].f[i] = mach->Face;
1816 }
1817 } else {
1818 eval_coef_func eval;
1819 uint i, j;
1820
1821 switch (decl->Declaration.Interpolate) {
1822 case TGSI_INTERPOLATE_CONSTANT:
1823 eval = eval_constant_coef;
1824 break;
1825
1826 case TGSI_INTERPOLATE_LINEAR:
1827 eval = eval_linear_coef;
1828 break;
1829
1830 case TGSI_INTERPOLATE_PERSPECTIVE:
1831 eval = eval_perspective_coef;
1832 break;
1833
1834 default:
1835 assert(0);
1836 return;
1837 }
1838
1839 for (j = 0; j < NUM_CHANNELS; j++) {
1840 if (mask & (1 << j)) {
1841 for (i = first; i <= last; i++) {
1842 eval(mach, i, j);
1843 }
1844 }
1845 }
1846 }
1847 }
1848 }
1849 }
1850
1851 typedef void (* micro_unary_op)(union tgsi_exec_channel *dst,
1852 const union tgsi_exec_channel *src);
1853
1854 static void
1855 exec_scalar_unary(struct tgsi_exec_machine *mach,
1856 const struct tgsi_full_instruction *inst,
1857 micro_unary_op op,
1858 enum tgsi_exec_datatype dst_datatype,
1859 enum tgsi_exec_datatype src_datatype)
1860 {
1861 unsigned int chan;
1862 union tgsi_exec_channel src;
1863 union tgsi_exec_channel dst;
1864
1865 fetch_source(mach, &src, &inst->Src[0], CHAN_X, src_datatype);
1866 op(&dst, &src);
1867 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1868 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1869 store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
1870 }
1871 }
1872 }
1873
1874 static void
1875 exec_vector_unary(struct tgsi_exec_machine *mach,
1876 const struct tgsi_full_instruction *inst,
1877 micro_unary_op op,
1878 enum tgsi_exec_datatype dst_datatype,
1879 enum tgsi_exec_datatype src_datatype)
1880 {
1881 unsigned int chan;
1882 struct tgsi_exec_vector dst;
1883
1884 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1885 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1886 union tgsi_exec_channel src;
1887
1888 fetch_source(mach, &src, &inst->Src[0], chan, src_datatype);
1889 op(&dst.xyzw[chan], &src);
1890 }
1891 }
1892 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1893 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1894 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1895 }
1896 }
1897 }
1898
1899 typedef void (* micro_binary_op)(union tgsi_exec_channel *dst,
1900 const union tgsi_exec_channel *src0,
1901 const union tgsi_exec_channel *src1);
1902
1903 static void
1904 exec_vector_binary(struct tgsi_exec_machine *mach,
1905 const struct tgsi_full_instruction *inst,
1906 micro_binary_op op,
1907 enum tgsi_exec_datatype dst_datatype,
1908 enum tgsi_exec_datatype src_datatype)
1909 {
1910 unsigned int chan;
1911 struct tgsi_exec_vector dst;
1912
1913 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1914 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1915 union tgsi_exec_channel src[2];
1916
1917 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1918 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1919 op(&dst.xyzw[chan], &src[0], &src[1]);
1920 }
1921 }
1922 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1923 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1924 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1925 }
1926 }
1927 }
1928
1929 typedef void (* micro_trinary_op)(union tgsi_exec_channel *dst,
1930 const union tgsi_exec_channel *src0,
1931 const union tgsi_exec_channel *src1,
1932 const union tgsi_exec_channel *src2);
1933
1934 static void
1935 exec_vector_trinary(struct tgsi_exec_machine *mach,
1936 const struct tgsi_full_instruction *inst,
1937 micro_trinary_op op,
1938 enum tgsi_exec_datatype dst_datatype,
1939 enum tgsi_exec_datatype src_datatype)
1940 {
1941 unsigned int chan;
1942 struct tgsi_exec_vector dst;
1943
1944 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1945 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1946 union tgsi_exec_channel src[3];
1947
1948 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1949 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1950 fetch_source(mach, &src[2], &inst->Src[2], chan, src_datatype);
1951 op(&dst.xyzw[chan], &src[0], &src[1], &src[2]);
1952 }
1953 }
1954 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1955 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1956 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1957 }
1958 }
1959 }
1960
1961 static void
1962 exec_dp3(struct tgsi_exec_machine *mach,
1963 const struct tgsi_full_instruction *inst)
1964 {
1965 unsigned int chan;
1966 union tgsi_exec_channel arg[3];
1967
1968 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1969 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1970 micro_mul(&arg[2], &arg[0], &arg[1]);
1971
1972 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
1973 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1974 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1975 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
1976 }
1977
1978 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1979 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1980 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
1981 }
1982 }
1983 }
1984
1985 static void
1986 exec_dp4(struct tgsi_exec_machine *mach,
1987 const struct tgsi_full_instruction *inst)
1988 {
1989 unsigned int chan;
1990 union tgsi_exec_channel arg[3];
1991
1992 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1993 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1994 micro_mul(&arg[2], &arg[0], &arg[1]);
1995
1996 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
1997 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1998 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1999 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2000 }
2001
2002 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2003 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2004 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2005 }
2006 }
2007 }
2008
2009 static void
2010 exec_dp2a(struct tgsi_exec_machine *mach,
2011 const struct tgsi_full_instruction *inst)
2012 {
2013 unsigned int chan;
2014 union tgsi_exec_channel arg[3];
2015
2016 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2017 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2018 micro_mul(&arg[2], &arg[0], &arg[1]);
2019
2020 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2021 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2022 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
2023
2024 fetch_source(mach, &arg[1], &inst->Src[2], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2025 micro_add(&arg[0], &arg[0], &arg[1]);
2026
2027 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2028 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2029 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2030 }
2031 }
2032 }
2033
2034 static void
2035 exec_dph(struct tgsi_exec_machine *mach,
2036 const struct tgsi_full_instruction *inst)
2037 {
2038 unsigned int chan;
2039 union tgsi_exec_channel arg[3];
2040
2041 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2042 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2043 micro_mul(&arg[2], &arg[0], &arg[1]);
2044
2045 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2046 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2047 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2048
2049 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2050 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2051 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
2052
2053 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_W, TGSI_EXEC_DATA_FLOAT);
2054 micro_add(&arg[0], &arg[0], &arg[1]);
2055
2056 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2057 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2058 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2059 }
2060 }
2061 }
2062
2063 static void
2064 exec_dp2(struct tgsi_exec_machine *mach,
2065 const struct tgsi_full_instruction *inst)
2066 {
2067 unsigned int chan;
2068 union tgsi_exec_channel arg[3];
2069
2070 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2071 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2072 micro_mul(&arg[2], &arg[0], &arg[1]);
2073
2074 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2075 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2076 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2077
2078 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2079 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2080 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2081 }
2082 }
2083 }
2084
2085 static void
2086 exec_nrm4(struct tgsi_exec_machine *mach,
2087 const struct tgsi_full_instruction *inst)
2088 {
2089 unsigned int chan;
2090 union tgsi_exec_channel arg[4];
2091 union tgsi_exec_channel scale;
2092
2093 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2094 micro_mul(&scale, &arg[0], &arg[0]);
2095
2096 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
2097 union tgsi_exec_channel product;
2098
2099 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2100 micro_mul(&product, &arg[chan], &arg[chan]);
2101 micro_add(&scale, &scale, &product);
2102 }
2103
2104 micro_rsq(&scale, &scale);
2105
2106 for (chan = CHAN_X; chan <= CHAN_W; chan++) {
2107 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2108 micro_mul(&arg[chan], &arg[chan], &scale);
2109 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2110 }
2111 }
2112 }
2113
2114 static void
2115 exec_nrm3(struct tgsi_exec_machine *mach,
2116 const struct tgsi_full_instruction *inst)
2117 {
2118 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {
2119 unsigned int chan;
2120 union tgsi_exec_channel arg[3];
2121 union tgsi_exec_channel scale;
2122
2123 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2124 micro_mul(&scale, &arg[0], &arg[0]);
2125
2126 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
2127 union tgsi_exec_channel product;
2128
2129 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2130 micro_mul(&product, &arg[chan], &arg[chan]);
2131 micro_add(&scale, &scale, &product);
2132 }
2133
2134 micro_rsq(&scale, &scale);
2135
2136 for (chan = CHAN_X; chan <= CHAN_Z; chan++) {
2137 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2138 micro_mul(&arg[chan], &arg[chan], &scale);
2139 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2140 }
2141 }
2142 }
2143
2144 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
2145 store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
2146 }
2147 }
2148
2149 static void
2150 exec_break(struct tgsi_exec_machine *mach)
2151 {
2152 if (mach->BreakType == TGSI_EXEC_BREAK_INSIDE_LOOP) {
2153 /* turn off loop channels for each enabled exec channel */
2154 mach->LoopMask &= ~mach->ExecMask;
2155 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2156 UPDATE_EXEC_MASK(mach);
2157 } else {
2158 assert(mach->BreakType == TGSI_EXEC_BREAK_INSIDE_SWITCH);
2159
2160 mach->Switch.mask = 0x0;
2161
2162 UPDATE_EXEC_MASK(mach);
2163 }
2164 }
2165
2166 static void
2167 exec_switch(struct tgsi_exec_machine *mach,
2168 const struct tgsi_full_instruction *inst)
2169 {
2170 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
2171 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
2172
2173 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
2174 fetch_source(mach, &mach->Switch.selector, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2175 mach->Switch.mask = 0x0;
2176 mach->Switch.defaultMask = 0x0;
2177
2178 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
2179 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_SWITCH;
2180
2181 UPDATE_EXEC_MASK(mach);
2182 }
2183
2184 static void
2185 exec_case(struct tgsi_exec_machine *mach,
2186 const struct tgsi_full_instruction *inst)
2187 {
2188 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2189 union tgsi_exec_channel src;
2190 uint mask = 0;
2191
2192 fetch_source(mach, &src, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2193
2194 if (mach->Switch.selector.u[0] == src.u[0]) {
2195 mask |= 0x1;
2196 }
2197 if (mach->Switch.selector.u[1] == src.u[1]) {
2198 mask |= 0x2;
2199 }
2200 if (mach->Switch.selector.u[2] == src.u[2]) {
2201 mask |= 0x4;
2202 }
2203 if (mach->Switch.selector.u[3] == src.u[3]) {
2204 mask |= 0x8;
2205 }
2206
2207 mach->Switch.defaultMask |= mask;
2208
2209 mach->Switch.mask |= mask & prevMask;
2210
2211 UPDATE_EXEC_MASK(mach);
2212 }
2213
2214 static void
2215 exec_default(struct tgsi_exec_machine *mach)
2216 {
2217 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2218
2219 mach->Switch.mask |= ~mach->Switch.defaultMask & prevMask;
2220
2221 UPDATE_EXEC_MASK(mach);
2222 }
2223
2224 static void
2225 exec_endswitch(struct tgsi_exec_machine *mach)
2226 {
2227 mach->Switch = mach->SwitchStack[--mach->SwitchStackTop];
2228 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
2229
2230 UPDATE_EXEC_MASK(mach);
2231 }
2232
2233 static void
2234 micro_i2f(union tgsi_exec_channel *dst,
2235 const union tgsi_exec_channel *src)
2236 {
2237 dst->f[0] = (float)src->i[0];
2238 dst->f[1] = (float)src->i[1];
2239 dst->f[2] = (float)src->i[2];
2240 dst->f[3] = (float)src->i[3];
2241 }
2242
2243 static void
2244 micro_not(union tgsi_exec_channel *dst,
2245 const union tgsi_exec_channel *src)
2246 {
2247 dst->u[0] = ~src->u[0];
2248 dst->u[1] = ~src->u[1];
2249 dst->u[2] = ~src->u[2];
2250 dst->u[3] = ~src->u[3];
2251 }
2252
2253 static void
2254 micro_shl(union tgsi_exec_channel *dst,
2255 const union tgsi_exec_channel *src0,
2256 const union tgsi_exec_channel *src1)
2257 {
2258 dst->u[0] = src0->u[0] << src1->u[0];
2259 dst->u[1] = src0->u[1] << src1->u[1];
2260 dst->u[2] = src0->u[2] << src1->u[2];
2261 dst->u[3] = src0->u[3] << src1->u[3];
2262 }
2263
2264 static void
2265 micro_and(union tgsi_exec_channel *dst,
2266 const union tgsi_exec_channel *src0,
2267 const union tgsi_exec_channel *src1)
2268 {
2269 dst->u[0] = src0->u[0] & src1->u[0];
2270 dst->u[1] = src0->u[1] & src1->u[1];
2271 dst->u[2] = src0->u[2] & src1->u[2];
2272 dst->u[3] = src0->u[3] & src1->u[3];
2273 }
2274
2275 static void
2276 micro_or(union tgsi_exec_channel *dst,
2277 const union tgsi_exec_channel *src0,
2278 const union tgsi_exec_channel *src1)
2279 {
2280 dst->u[0] = src0->u[0] | src1->u[0];
2281 dst->u[1] = src0->u[1] | src1->u[1];
2282 dst->u[2] = src0->u[2] | src1->u[2];
2283 dst->u[3] = src0->u[3] | src1->u[3];
2284 }
2285
2286 static void
2287 micro_xor(union tgsi_exec_channel *dst,
2288 const union tgsi_exec_channel *src0,
2289 const union tgsi_exec_channel *src1)
2290 {
2291 dst->u[0] = src0->u[0] ^ src1->u[0];
2292 dst->u[1] = src0->u[1] ^ src1->u[1];
2293 dst->u[2] = src0->u[2] ^ src1->u[2];
2294 dst->u[3] = src0->u[3] ^ src1->u[3];
2295 }
2296
2297 static void
2298 micro_f2i(union tgsi_exec_channel *dst,
2299 const union tgsi_exec_channel *src)
2300 {
2301 dst->i[0] = (int)src->f[0];
2302 dst->i[1] = (int)src->f[1];
2303 dst->i[2] = (int)src->f[2];
2304 dst->i[3] = (int)src->f[3];
2305 }
2306
2307 static void
2308 micro_idiv(union tgsi_exec_channel *dst,
2309 const union tgsi_exec_channel *src0,
2310 const union tgsi_exec_channel *src1)
2311 {
2312 dst->i[0] = src0->i[0] / src1->i[0];
2313 dst->i[1] = src0->i[1] / src1->i[1];
2314 dst->i[2] = src0->i[2] / src1->i[2];
2315 dst->i[3] = src0->i[3] / src1->i[3];
2316 }
2317
2318 static void
2319 micro_imax(union tgsi_exec_channel *dst,
2320 const union tgsi_exec_channel *src0,
2321 const union tgsi_exec_channel *src1)
2322 {
2323 dst->i[0] = src0->i[0] > src1->i[0] ? src0->i[0] : src1->i[0];
2324 dst->i[1] = src0->i[1] > src1->i[1] ? src0->i[1] : src1->i[1];
2325 dst->i[2] = src0->i[2] > src1->i[2] ? src0->i[2] : src1->i[2];
2326 dst->i[3] = src0->i[3] > src1->i[3] ? src0->i[3] : src1->i[3];
2327 }
2328
2329 static void
2330 micro_imin(union tgsi_exec_channel *dst,
2331 const union tgsi_exec_channel *src0,
2332 const union tgsi_exec_channel *src1)
2333 {
2334 dst->i[0] = src0->i[0] < src1->i[0] ? src0->i[0] : src1->i[0];
2335 dst->i[1] = src0->i[1] < src1->i[1] ? src0->i[1] : src1->i[1];
2336 dst->i[2] = src0->i[2] < src1->i[2] ? src0->i[2] : src1->i[2];
2337 dst->i[3] = src0->i[3] < src1->i[3] ? src0->i[3] : src1->i[3];
2338 }
2339
2340 static void
2341 micro_isge(union tgsi_exec_channel *dst,
2342 const union tgsi_exec_channel *src0,
2343 const union tgsi_exec_channel *src1)
2344 {
2345 dst->i[0] = src0->i[0] >= src1->i[0] ? -1 : 0;
2346 dst->i[1] = src0->i[1] >= src1->i[1] ? -1 : 0;
2347 dst->i[2] = src0->i[2] >= src1->i[2] ? -1 : 0;
2348 dst->i[3] = src0->i[3] >= src1->i[3] ? -1 : 0;
2349 }
2350
2351 static void
2352 micro_ishr(union tgsi_exec_channel *dst,
2353 const union tgsi_exec_channel *src0,
2354 const union tgsi_exec_channel *src1)
2355 {
2356 dst->i[0] = src0->i[0] >> src1->i[0];
2357 dst->i[1] = src0->i[1] >> src1->i[1];
2358 dst->i[2] = src0->i[2] >> src1->i[2];
2359 dst->i[3] = src0->i[3] >> src1->i[3];
2360 }
2361
2362 static void
2363 micro_islt(union tgsi_exec_channel *dst,
2364 const union tgsi_exec_channel *src0,
2365 const union tgsi_exec_channel *src1)
2366 {
2367 dst->i[0] = src0->i[0] < src1->i[0] ? -1 : 0;
2368 dst->i[1] = src0->i[1] < src1->i[1] ? -1 : 0;
2369 dst->i[2] = src0->i[2] < src1->i[2] ? -1 : 0;
2370 dst->i[3] = src0->i[3] < src1->i[3] ? -1 : 0;
2371 }
2372
2373 static void
2374 micro_f2u(union tgsi_exec_channel *dst,
2375 const union tgsi_exec_channel *src)
2376 {
2377 dst->u[0] = (uint)src->f[0];
2378 dst->u[1] = (uint)src->f[1];
2379 dst->u[2] = (uint)src->f[2];
2380 dst->u[3] = (uint)src->f[3];
2381 }
2382
2383 static void
2384 micro_u2f(union tgsi_exec_channel *dst,
2385 const union tgsi_exec_channel *src)
2386 {
2387 dst->f[0] = (float)src->u[0];
2388 dst->f[1] = (float)src->u[1];
2389 dst->f[2] = (float)src->u[2];
2390 dst->f[3] = (float)src->u[3];
2391 }
2392
2393 static void
2394 micro_uadd(union tgsi_exec_channel *dst,
2395 const union tgsi_exec_channel *src0,
2396 const union tgsi_exec_channel *src1)
2397 {
2398 dst->u[0] = src0->u[0] + src1->u[0];
2399 dst->u[1] = src0->u[1] + src1->u[1];
2400 dst->u[2] = src0->u[2] + src1->u[2];
2401 dst->u[3] = src0->u[3] + src1->u[3];
2402 }
2403
2404 static void
2405 micro_udiv(union tgsi_exec_channel *dst,
2406 const union tgsi_exec_channel *src0,
2407 const union tgsi_exec_channel *src1)
2408 {
2409 dst->u[0] = src0->u[0] / src1->u[0];
2410 dst->u[1] = src0->u[1] / src1->u[1];
2411 dst->u[2] = src0->u[2] / src1->u[2];
2412 dst->u[3] = src0->u[3] / src1->u[3];
2413 }
2414
2415 static void
2416 micro_umad(union tgsi_exec_channel *dst,
2417 const union tgsi_exec_channel *src0,
2418 const union tgsi_exec_channel *src1,
2419 const union tgsi_exec_channel *src2)
2420 {
2421 dst->u[0] = src0->u[0] * src1->u[0] + src2->u[0];
2422 dst->u[1] = src0->u[1] * src1->u[1] + src2->u[1];
2423 dst->u[2] = src0->u[2] * src1->u[2] + src2->u[2];
2424 dst->u[3] = src0->u[3] * src1->u[3] + src2->u[3];
2425 }
2426
2427 static void
2428 micro_umax(union tgsi_exec_channel *dst,
2429 const union tgsi_exec_channel *src0,
2430 const union tgsi_exec_channel *src1)
2431 {
2432 dst->u[0] = src0->u[0] > src1->u[0] ? src0->u[0] : src1->u[0];
2433 dst->u[1] = src0->u[1] > src1->u[1] ? src0->u[1] : src1->u[1];
2434 dst->u[2] = src0->u[2] > src1->u[2] ? src0->u[2] : src1->u[2];
2435 dst->u[3] = src0->u[3] > src1->u[3] ? src0->u[3] : src1->u[3];
2436 }
2437
2438 static void
2439 micro_umin(union tgsi_exec_channel *dst,
2440 const union tgsi_exec_channel *src0,
2441 const union tgsi_exec_channel *src1)
2442 {
2443 dst->u[0] = src0->u[0] < src1->u[0] ? src0->u[0] : src1->u[0];
2444 dst->u[1] = src0->u[1] < src1->u[1] ? src0->u[1] : src1->u[1];
2445 dst->u[2] = src0->u[2] < src1->u[2] ? src0->u[2] : src1->u[2];
2446 dst->u[3] = src0->u[3] < src1->u[3] ? src0->u[3] : src1->u[3];
2447 }
2448
2449 static void
2450 micro_umod(union tgsi_exec_channel *dst,
2451 const union tgsi_exec_channel *src0,
2452 const union tgsi_exec_channel *src1)
2453 {
2454 dst->u[0] = src0->u[0] % src1->u[0];
2455 dst->u[1] = src0->u[1] % src1->u[1];
2456 dst->u[2] = src0->u[2] % src1->u[2];
2457 dst->u[3] = src0->u[3] % src1->u[3];
2458 }
2459
2460 static void
2461 micro_umul(union tgsi_exec_channel *dst,
2462 const union tgsi_exec_channel *src0,
2463 const union tgsi_exec_channel *src1)
2464 {
2465 dst->u[0] = src0->u[0] * src1->u[0];
2466 dst->u[1] = src0->u[1] * src1->u[1];
2467 dst->u[2] = src0->u[2] * src1->u[2];
2468 dst->u[3] = src0->u[3] * src1->u[3];
2469 }
2470
2471 static void
2472 micro_useq(union tgsi_exec_channel *dst,
2473 const union tgsi_exec_channel *src0,
2474 const union tgsi_exec_channel *src1)
2475 {
2476 dst->u[0] = src0->u[0] == src1->u[0] ? ~0 : 0;
2477 dst->u[1] = src0->u[1] == src1->u[1] ? ~0 : 0;
2478 dst->u[2] = src0->u[2] == src1->u[2] ? ~0 : 0;
2479 dst->u[3] = src0->u[3] == src1->u[3] ? ~0 : 0;
2480 }
2481
2482 static void
2483 micro_usge(union tgsi_exec_channel *dst,
2484 const union tgsi_exec_channel *src0,
2485 const union tgsi_exec_channel *src1)
2486 {
2487 dst->u[0] = src0->u[0] >= src1->u[0] ? ~0 : 0;
2488 dst->u[1] = src0->u[1] >= src1->u[1] ? ~0 : 0;
2489 dst->u[2] = src0->u[2] >= src1->u[2] ? ~0 : 0;
2490 dst->u[3] = src0->u[3] >= src1->u[3] ? ~0 : 0;
2491 }
2492
2493 static void
2494 micro_ushr(union tgsi_exec_channel *dst,
2495 const union tgsi_exec_channel *src0,
2496 const union tgsi_exec_channel *src1)
2497 {
2498 dst->u[0] = src0->u[0] >> src1->u[0];
2499 dst->u[1] = src0->u[1] >> src1->u[1];
2500 dst->u[2] = src0->u[2] >> src1->u[2];
2501 dst->u[3] = src0->u[3] >> src1->u[3];
2502 }
2503
2504 static void
2505 micro_uslt(union tgsi_exec_channel *dst,
2506 const union tgsi_exec_channel *src0,
2507 const union tgsi_exec_channel *src1)
2508 {
2509 dst->u[0] = src0->u[0] < src1->u[0] ? ~0 : 0;
2510 dst->u[1] = src0->u[1] < src1->u[1] ? ~0 : 0;
2511 dst->u[2] = src0->u[2] < src1->u[2] ? ~0 : 0;
2512 dst->u[3] = src0->u[3] < src1->u[3] ? ~0 : 0;
2513 }
2514
2515 static void
2516 micro_usne(union tgsi_exec_channel *dst,
2517 const union tgsi_exec_channel *src0,
2518 const union tgsi_exec_channel *src1)
2519 {
2520 dst->u[0] = src0->u[0] != src1->u[0] ? ~0 : 0;
2521 dst->u[1] = src0->u[1] != src1->u[1] ? ~0 : 0;
2522 dst->u[2] = src0->u[2] != src1->u[2] ? ~0 : 0;
2523 dst->u[3] = src0->u[3] != src1->u[3] ? ~0 : 0;
2524 }
2525
2526 static void
2527 exec_instruction(
2528 struct tgsi_exec_machine *mach,
2529 const struct tgsi_full_instruction *inst,
2530 int *pc )
2531 {
2532 uint chan_index;
2533 union tgsi_exec_channel r[10];
2534 union tgsi_exec_channel d[8];
2535
2536 (*pc)++;
2537
2538 switch (inst->Instruction.Opcode) {
2539 case TGSI_OPCODE_ARL:
2540 exec_vector_unary(mach, inst, micro_arl, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
2541 break;
2542
2543 case TGSI_OPCODE_MOV:
2544 exec_vector_unary(mach, inst, micro_mov, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
2545 break;
2546
2547 case TGSI_OPCODE_LIT:
2548 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y ) || IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2549 FETCH( &r[0], 0, CHAN_X );
2550 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2551 micro_max(&d[CHAN_Y], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2552 }
2553
2554 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2555 FETCH( &r[1], 0, CHAN_Y );
2556 micro_max( &r[1], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
2557
2558 FETCH( &r[2], 0, CHAN_W );
2559 micro_min( &r[2], &r[2], &mach->Temps[TEMP_128_I].xyzw[TEMP_128_C] );
2560 micro_max( &r[2], &r[2], &mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C] );
2561 micro_pow( &r[1], &r[1], &r[2] );
2562 micro_lt(&d[CHAN_Z], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2563 }
2564
2565 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2566 STORE(&d[CHAN_Y], 0, CHAN_Y);
2567 }
2568 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2569 STORE(&d[CHAN_Z], 0, CHAN_Z);
2570 }
2571 }
2572 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2573 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
2574 }
2575 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2576 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2577 }
2578 break;
2579
2580 case TGSI_OPCODE_RCP:
2581 exec_scalar_unary(mach, inst, micro_rcp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2582 break;
2583
2584 case TGSI_OPCODE_RSQ:
2585 exec_scalar_unary(mach, inst, micro_rsq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2586 break;
2587
2588 case TGSI_OPCODE_EXP:
2589 FETCH( &r[0], 0, CHAN_X );
2590 micro_flr( &r[1], &r[0] ); /* r1 = floor(r0) */
2591 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2592 micro_exp2( &r[2], &r[1] ); /* r2 = 2 ^ r1 */
2593 STORE( &r[2], 0, CHAN_X ); /* store r2 */
2594 }
2595 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2596 micro_sub( &r[2], &r[0], &r[1] ); /* r2 = r0 - r1 */
2597 STORE( &r[2], 0, CHAN_Y ); /* store r2 */
2598 }
2599 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2600 micro_exp2( &r[2], &r[0] ); /* r2 = 2 ^ r0 */
2601 STORE( &r[2], 0, CHAN_Z ); /* store r2 */
2602 }
2603 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2604 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2605 }
2606 break;
2607
2608 case TGSI_OPCODE_LOG:
2609 FETCH( &r[0], 0, CHAN_X );
2610 micro_abs( &r[2], &r[0] ); /* r2 = abs(r0) */
2611 micro_lg2( &r[1], &r[2] ); /* r1 = lg2(r2) */
2612 micro_flr( &r[0], &r[1] ); /* r0 = floor(r1) */
2613 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2614 STORE( &r[0], 0, CHAN_X );
2615 }
2616 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2617 micro_exp2( &r[0], &r[0] ); /* r0 = 2 ^ r0 */
2618 micro_div( &r[0], &r[2], &r[0] ); /* r0 = r2 / r0 */
2619 STORE( &r[0], 0, CHAN_Y );
2620 }
2621 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2622 STORE( &r[1], 0, CHAN_Z );
2623 }
2624 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2625 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2626 }
2627 break;
2628
2629 case TGSI_OPCODE_MUL:
2630 exec_vector_binary(mach, inst, micro_mul, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2631 break;
2632
2633 case TGSI_OPCODE_ADD:
2634 exec_vector_binary(mach, inst, micro_add, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2635 break;
2636
2637 case TGSI_OPCODE_DP3:
2638 exec_dp3(mach, inst);
2639 break;
2640
2641 case TGSI_OPCODE_DP4:
2642 exec_dp4(mach, inst);
2643 break;
2644
2645 case TGSI_OPCODE_DST:
2646 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2647 FETCH( &r[0], 0, CHAN_Y );
2648 FETCH( &r[1], 1, CHAN_Y);
2649 micro_mul(&d[CHAN_Y], &r[0], &r[1]);
2650 }
2651 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2652 FETCH(&d[CHAN_Z], 0, CHAN_Z);
2653 }
2654 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2655 FETCH(&d[CHAN_W], 1, CHAN_W);
2656 }
2657
2658 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2659 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X);
2660 }
2661 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2662 STORE(&d[CHAN_Y], 0, CHAN_Y);
2663 }
2664 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2665 STORE(&d[CHAN_Z], 0, CHAN_Z);
2666 }
2667 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2668 STORE(&d[CHAN_W], 0, CHAN_W);
2669 }
2670 break;
2671
2672 case TGSI_OPCODE_MIN:
2673 exec_vector_binary(mach, inst, micro_min, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2674 break;
2675
2676 case TGSI_OPCODE_MAX:
2677 exec_vector_binary(mach, inst, micro_max, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2678 break;
2679
2680 case TGSI_OPCODE_SLT:
2681 exec_vector_binary(mach, inst, micro_slt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2682 break;
2683
2684 case TGSI_OPCODE_SGE:
2685 exec_vector_binary(mach, inst, micro_sge, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2686 break;
2687
2688 case TGSI_OPCODE_MAD:
2689 exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2690 break;
2691
2692 case TGSI_OPCODE_SUB:
2693 exec_vector_binary(mach, inst, micro_sub, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2694 break;
2695
2696 case TGSI_OPCODE_LRP:
2697 exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2698 break;
2699
2700 case TGSI_OPCODE_CND:
2701 exec_vector_trinary(mach, inst, micro_cnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2702 break;
2703
2704 case TGSI_OPCODE_DP2A:
2705 exec_dp2a(mach, inst);
2706 break;
2707
2708 case TGSI_OPCODE_FRC:
2709 exec_vector_unary(mach, inst, micro_frc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2710 break;
2711
2712 case TGSI_OPCODE_CLAMP:
2713 exec_vector_trinary(mach, inst, micro_clamp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2714 break;
2715
2716 case TGSI_OPCODE_FLR:
2717 exec_vector_unary(mach, inst, micro_flr, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2718 break;
2719
2720 case TGSI_OPCODE_ROUND:
2721 exec_vector_unary(mach, inst, micro_rnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2722 break;
2723
2724 case TGSI_OPCODE_EX2:
2725 exec_scalar_unary(mach, inst, micro_exp2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2726 break;
2727
2728 case TGSI_OPCODE_LG2:
2729 exec_scalar_unary(mach, inst, micro_lg2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2730 break;
2731
2732 case TGSI_OPCODE_POW:
2733 FETCH(&r[0], 0, CHAN_X);
2734 FETCH(&r[1], 1, CHAN_X);
2735
2736 micro_pow( &r[0], &r[0], &r[1] );
2737
2738 FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
2739 STORE( &r[0], 0, chan_index );
2740 }
2741 break;
2742
2743 case TGSI_OPCODE_XPD:
2744 FETCH(&r[0], 0, CHAN_Y);
2745 FETCH(&r[1], 1, CHAN_Z);
2746
2747 micro_mul( &r[2], &r[0], &r[1] );
2748
2749 FETCH(&r[3], 0, CHAN_Z);
2750 FETCH(&r[4], 1, CHAN_Y);
2751
2752 micro_mul( &r[5], &r[3], &r[4] );
2753 micro_sub(&d[CHAN_X], &r[2], &r[5]);
2754
2755 FETCH(&r[2], 1, CHAN_X);
2756
2757 micro_mul( &r[3], &r[3], &r[2] );
2758
2759 FETCH(&r[5], 0, CHAN_X);
2760
2761 micro_mul( &r[1], &r[1], &r[5] );
2762 micro_sub(&d[CHAN_Y], &r[3], &r[1]);
2763
2764 micro_mul( &r[5], &r[5], &r[4] );
2765 micro_mul( &r[0], &r[0], &r[2] );
2766 micro_sub(&d[CHAN_Z], &r[5], &r[0]);
2767
2768 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2769 STORE(&d[CHAN_X], 0, CHAN_X);
2770 }
2771 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2772 STORE(&d[CHAN_Y], 0, CHAN_Y);
2773 }
2774 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2775 STORE(&d[CHAN_Z], 0, CHAN_Z);
2776 }
2777 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2778 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2779 }
2780 break;
2781
2782 case TGSI_OPCODE_ABS:
2783 exec_vector_unary(mach, inst, micro_abs, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2784 break;
2785
2786 case TGSI_OPCODE_RCC:
2787 FETCH(&r[0], 0, CHAN_X);
2788 micro_div(&r[0], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &r[0]);
2789 micro_float_clamp(&r[0], &r[0]);
2790 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2791 STORE(&r[0], 0, chan_index);
2792 }
2793 break;
2794
2795 case TGSI_OPCODE_DPH:
2796 exec_dph(mach, inst);
2797 break;
2798
2799 case TGSI_OPCODE_COS:
2800 exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2801 break;
2802
2803 case TGSI_OPCODE_DDX:
2804 exec_vector_unary(mach, inst, micro_ddx, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2805 break;
2806
2807 case TGSI_OPCODE_DDY:
2808 exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2809 break;
2810
2811 case TGSI_OPCODE_KILP:
2812 exec_kilp (mach, inst);
2813 break;
2814
2815 case TGSI_OPCODE_KIL:
2816 exec_kil (mach, inst);
2817 break;
2818
2819 case TGSI_OPCODE_PK2H:
2820 assert (0);
2821 break;
2822
2823 case TGSI_OPCODE_PK2US:
2824 assert (0);
2825 break;
2826
2827 case TGSI_OPCODE_PK4B:
2828 assert (0);
2829 break;
2830
2831 case TGSI_OPCODE_PK4UB:
2832 assert (0);
2833 break;
2834
2835 case TGSI_OPCODE_RFL:
2836 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2837 IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2838 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2839 /* r0 = dp3(src0, src0) */
2840 FETCH(&r[2], 0, CHAN_X);
2841 micro_mul(&r[0], &r[2], &r[2]);
2842 FETCH(&r[4], 0, CHAN_Y);
2843 micro_mul(&r[8], &r[4], &r[4]);
2844 micro_add(&r[0], &r[0], &r[8]);
2845 FETCH(&r[6], 0, CHAN_Z);
2846 micro_mul(&r[8], &r[6], &r[6]);
2847 micro_add(&r[0], &r[0], &r[8]);
2848
2849 /* r1 = dp3(src0, src1) */
2850 FETCH(&r[3], 1, CHAN_X);
2851 micro_mul(&r[1], &r[2], &r[3]);
2852 FETCH(&r[5], 1, CHAN_Y);
2853 micro_mul(&r[8], &r[4], &r[5]);
2854 micro_add(&r[1], &r[1], &r[8]);
2855 FETCH(&r[7], 1, CHAN_Z);
2856 micro_mul(&r[8], &r[6], &r[7]);
2857 micro_add(&r[1], &r[1], &r[8]);
2858
2859 /* r1 = 2 * r1 / r0 */
2860 micro_add(&r[1], &r[1], &r[1]);
2861 micro_div(&r[1], &r[1], &r[0]);
2862
2863 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2864 micro_mul(&r[2], &r[2], &r[1]);
2865 micro_sub(&r[2], &r[2], &r[3]);
2866 STORE(&r[2], 0, CHAN_X);
2867 }
2868 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2869 micro_mul(&r[4], &r[4], &r[1]);
2870 micro_sub(&r[4], &r[4], &r[5]);
2871 STORE(&r[4], 0, CHAN_Y);
2872 }
2873 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2874 micro_mul(&r[6], &r[6], &r[1]);
2875 micro_sub(&r[6], &r[6], &r[7]);
2876 STORE(&r[6], 0, CHAN_Z);
2877 }
2878 }
2879 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2880 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W);
2881 }
2882 break;
2883
2884 case TGSI_OPCODE_SEQ:
2885 exec_vector_binary(mach, inst, micro_seq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2886 break;
2887
2888 case TGSI_OPCODE_SFL:
2889 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2890 STORE(&mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, chan_index);
2891 }
2892 break;
2893
2894 case TGSI_OPCODE_SGT:
2895 exec_vector_binary(mach, inst, micro_sgt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2896 break;
2897
2898 case TGSI_OPCODE_SIN:
2899 exec_scalar_unary(mach, inst, micro_sin, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2900 break;
2901
2902 case TGSI_OPCODE_SLE:
2903 exec_vector_binary(mach, inst, micro_sle, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2904 break;
2905
2906 case TGSI_OPCODE_SNE:
2907 exec_vector_binary(mach, inst, micro_sne, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2908 break;
2909
2910 case TGSI_OPCODE_STR:
2911 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2912 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, chan_index);
2913 }
2914 break;
2915
2916 case TGSI_OPCODE_TEX:
2917 /* simple texture lookup */
2918 /* src[0] = texcoord */
2919 /* src[1] = sampler unit */
2920 exec_tex(mach, inst, TEX_MODIFIER_NONE);
2921 break;
2922
2923 case TGSI_OPCODE_TXB:
2924 /* Texture lookup with lod bias */
2925 /* src[0] = texcoord (src[0].w = LOD bias) */
2926 /* src[1] = sampler unit */
2927 exec_tex(mach, inst, TEX_MODIFIER_LOD_BIAS);
2928 break;
2929
2930 case TGSI_OPCODE_TXD:
2931 /* Texture lookup with explict partial derivatives */
2932 /* src[0] = texcoord */
2933 /* src[1] = d[strq]/dx */
2934 /* src[2] = d[strq]/dy */
2935 /* src[3] = sampler unit */
2936 exec_txd(mach, inst);
2937 break;
2938
2939 case TGSI_OPCODE_TXL:
2940 /* Texture lookup with explit LOD */
2941 /* src[0] = texcoord (src[0].w = LOD) */
2942 /* src[1] = sampler unit */
2943 exec_tex(mach, inst, TEX_MODIFIER_EXPLICIT_LOD);
2944 break;
2945
2946 case TGSI_OPCODE_TXP:
2947 /* Texture lookup with projection */
2948 /* src[0] = texcoord (src[0].w = projection) */
2949 /* src[1] = sampler unit */
2950 exec_tex(mach, inst, TEX_MODIFIER_PROJECTED);
2951 break;
2952
2953 case TGSI_OPCODE_UP2H:
2954 assert (0);
2955 break;
2956
2957 case TGSI_OPCODE_UP2US:
2958 assert (0);
2959 break;
2960
2961 case TGSI_OPCODE_UP4B:
2962 assert (0);
2963 break;
2964
2965 case TGSI_OPCODE_UP4UB:
2966 assert (0);
2967 break;
2968
2969 case TGSI_OPCODE_X2D:
2970 FETCH(&r[0], 1, CHAN_X);
2971 FETCH(&r[1], 1, CHAN_Y);
2972 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2973 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2974 FETCH(&r[2], 2, CHAN_X);
2975 micro_mul(&r[2], &r[2], &r[0]);
2976 FETCH(&r[3], 2, CHAN_Y);
2977 micro_mul(&r[3], &r[3], &r[1]);
2978 micro_add(&r[2], &r[2], &r[3]);
2979 FETCH(&r[3], 0, CHAN_X);
2980 micro_add(&d[CHAN_X], &r[2], &r[3]);
2981
2982 }
2983 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2984 IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2985 FETCH(&r[2], 2, CHAN_Z);
2986 micro_mul(&r[2], &r[2], &r[0]);
2987 FETCH(&r[3], 2, CHAN_W);
2988 micro_mul(&r[3], &r[3], &r[1]);
2989 micro_add(&r[2], &r[2], &r[3]);
2990 FETCH(&r[3], 0, CHAN_Y);
2991 micro_add(&d[CHAN_Y], &r[2], &r[3]);
2992
2993 }
2994 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2995 STORE(&d[CHAN_X], 0, CHAN_X);
2996 }
2997 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2998 STORE(&d[CHAN_Y], 0, CHAN_Y);
2999 }
3000 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
3001 STORE(&d[CHAN_X], 0, CHAN_Z);
3002 }
3003 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
3004 STORE(&d[CHAN_Y], 0, CHAN_W);
3005 }
3006 break;
3007
3008 case TGSI_OPCODE_ARA:
3009 assert (0);
3010 break;
3011
3012 case TGSI_OPCODE_ARR:
3013 exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
3014 break;
3015
3016 case TGSI_OPCODE_BRA:
3017 assert (0);
3018 break;
3019
3020 case TGSI_OPCODE_CAL:
3021 /* skip the call if no execution channels are enabled */
3022 if (mach->ExecMask) {
3023 /* do the call */
3024
3025 /* First, record the depths of the execution stacks.
3026 * This is important for deeply nested/looped return statements.
3027 * We have to unwind the stacks by the correct amount. For a
3028 * real code generator, we could determine the number of entries
3029 * to pop off each stack with simple static analysis and avoid
3030 * implementing this data structure at run time.
3031 */
3032 mach->CallStack[mach->CallStackTop].CondStackTop = mach->CondStackTop;
3033 mach->CallStack[mach->CallStackTop].LoopStackTop = mach->LoopStackTop;
3034 mach->CallStack[mach->CallStackTop].ContStackTop = mach->ContStackTop;
3035 mach->CallStack[mach->CallStackTop].SwitchStackTop = mach->SwitchStackTop;
3036 mach->CallStack[mach->CallStackTop].BreakStackTop = mach->BreakStackTop;
3037 /* note that PC was already incremented above */
3038 mach->CallStack[mach->CallStackTop].ReturnAddr = *pc;
3039
3040 mach->CallStackTop++;
3041
3042 /* Second, push the Cond, Loop, Cont, Func stacks */
3043 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3044 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3045 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3046 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
3047 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3048 assert(mach->FuncStackTop < TGSI_EXEC_MAX_CALL_NESTING);
3049
3050 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3051 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3052 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3053 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
3054 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3055 mach->FuncStack[mach->FuncStackTop++] = mach->FuncMask;
3056
3057 /* Finally, jump to the subroutine */
3058 *pc = inst->Label.Label;
3059 }
3060 break;
3061
3062 case TGSI_OPCODE_RET:
3063 mach->FuncMask &= ~mach->ExecMask;
3064 UPDATE_EXEC_MASK(mach);
3065
3066 if (mach->FuncMask == 0x0) {
3067 /* really return now (otherwise, keep executing */
3068
3069 if (mach->CallStackTop == 0) {
3070 /* returning from main() */
3071 *pc = -1;
3072 return;
3073 }
3074
3075 assert(mach->CallStackTop > 0);
3076 mach->CallStackTop--;
3077
3078 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3079 mach->CondMask = mach->CondStack[mach->CondStackTop];
3080
3081 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3082 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3083
3084 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3085 mach->ContMask = mach->ContStack[mach->ContStackTop];
3086
3087 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3088 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3089
3090 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3091 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3092
3093 assert(mach->FuncStackTop > 0);
3094 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3095
3096 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3097
3098 UPDATE_EXEC_MASK(mach);
3099 }
3100 break;
3101
3102 case TGSI_OPCODE_SSG:
3103 exec_vector_unary(mach, inst, micro_sgn, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3104 break;
3105
3106 case TGSI_OPCODE_CMP:
3107 exec_vector_trinary(mach, inst, micro_cmp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3108 break;
3109
3110 case TGSI_OPCODE_SCS:
3111 if( IS_CHANNEL_ENABLED( *inst, CHAN_X ) || IS_CHANNEL_ENABLED( *inst, CHAN_Y ) ) {
3112 FETCH( &r[0], 0, CHAN_X );
3113 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
3114 micro_cos(&r[1], &r[0]);
3115 STORE(&r[1], 0, CHAN_X);
3116 }
3117 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
3118 micro_sin(&r[1], &r[0]);
3119 STORE(&r[1], 0, CHAN_Y);
3120 }
3121 }
3122 if( IS_CHANNEL_ENABLED( *inst, CHAN_Z ) ) {
3123 STORE( &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, CHAN_Z );
3124 }
3125 if( IS_CHANNEL_ENABLED( *inst, CHAN_W ) ) {
3126 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
3127 }
3128 break;
3129
3130 case TGSI_OPCODE_NRM:
3131 exec_nrm3(mach, inst);
3132 break;
3133
3134 case TGSI_OPCODE_NRM4:
3135 exec_nrm4(mach, inst);
3136 break;
3137
3138 case TGSI_OPCODE_DIV:
3139 exec_vector_binary(mach, inst, micro_div, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3140 break;
3141
3142 case TGSI_OPCODE_DP2:
3143 exec_dp2(mach, inst);
3144 break;
3145
3146 case TGSI_OPCODE_IF:
3147 /* push CondMask */
3148 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3149 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3150 FETCH( &r[0], 0, CHAN_X );
3151 /* update CondMask */
3152 if( ! r[0].u[0] ) {
3153 mach->CondMask &= ~0x1;
3154 }
3155 if( ! r[0].u[1] ) {
3156 mach->CondMask &= ~0x2;
3157 }
3158 if( ! r[0].u[2] ) {
3159 mach->CondMask &= ~0x4;
3160 }
3161 if( ! r[0].u[3] ) {
3162 mach->CondMask &= ~0x8;
3163 }
3164 UPDATE_EXEC_MASK(mach);
3165 /* Todo: If CondMask==0, jump to ELSE */
3166 break;
3167
3168 case TGSI_OPCODE_ELSE:
3169 /* invert CondMask wrt previous mask */
3170 {
3171 uint prevMask;
3172 assert(mach->CondStackTop > 0);
3173 prevMask = mach->CondStack[mach->CondStackTop - 1];
3174 mach->CondMask = ~mach->CondMask & prevMask;
3175 UPDATE_EXEC_MASK(mach);
3176 /* Todo: If CondMask==0, jump to ENDIF */
3177 }
3178 break;
3179
3180 case TGSI_OPCODE_ENDIF:
3181 /* pop CondMask */
3182 assert(mach->CondStackTop > 0);
3183 mach->CondMask = mach->CondStack[--mach->CondStackTop];
3184 UPDATE_EXEC_MASK(mach);
3185 break;
3186
3187 case TGSI_OPCODE_END:
3188 /* halt execution */
3189 *pc = -1;
3190 break;
3191
3192 case TGSI_OPCODE_PUSHA:
3193 assert (0);
3194 break;
3195
3196 case TGSI_OPCODE_POPA:
3197 assert (0);
3198 break;
3199
3200 case TGSI_OPCODE_CEIL:
3201 exec_vector_unary(mach, inst, micro_ceil, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3202 break;
3203
3204 case TGSI_OPCODE_I2F:
3205 exec_vector_unary(mach, inst, micro_i2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_INT);
3206 break;
3207
3208 case TGSI_OPCODE_NOT:
3209 exec_vector_unary(mach, inst, micro_not, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3210 break;
3211
3212 case TGSI_OPCODE_TRUNC:
3213 exec_vector_unary(mach, inst, micro_trunc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3214 break;
3215
3216 case TGSI_OPCODE_SHL:
3217 exec_vector_binary(mach, inst, micro_shl, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3218 break;
3219
3220 case TGSI_OPCODE_AND:
3221 exec_vector_binary(mach, inst, micro_and, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3222 break;
3223
3224 case TGSI_OPCODE_OR:
3225 exec_vector_binary(mach, inst, micro_or, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3226 break;
3227
3228 case TGSI_OPCODE_MOD:
3229 assert (0);
3230 break;
3231
3232 case TGSI_OPCODE_XOR:
3233 exec_vector_binary(mach, inst, micro_xor, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3234 break;
3235
3236 case TGSI_OPCODE_SAD:
3237 assert (0);
3238 break;
3239
3240 case TGSI_OPCODE_TXF:
3241 assert (0);
3242 break;
3243
3244 case TGSI_OPCODE_TXQ:
3245 assert (0);
3246 break;
3247
3248 case TGSI_OPCODE_EMIT:
3249 emit_vertex(mach);
3250 break;
3251
3252 case TGSI_OPCODE_ENDPRIM:
3253 emit_primitive(mach);
3254 break;
3255
3256 case TGSI_OPCODE_BGNLOOP:
3257 /* push LoopMask and ContMasks */
3258 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3259 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3260 assert(mach->LoopLabelStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3261 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3262
3263 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3264 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3265 mach->LoopLabelStack[mach->LoopLabelStackTop++] = *pc - 1;
3266 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3267 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_LOOP;
3268 break;
3269
3270 case TGSI_OPCODE_ENDLOOP:
3271 /* Restore ContMask, but don't pop */
3272 assert(mach->ContStackTop > 0);
3273 mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
3274 UPDATE_EXEC_MASK(mach);
3275 if (mach->ExecMask) {
3276 /* repeat loop: jump to instruction just past BGNLOOP */
3277 assert(mach->LoopLabelStackTop > 0);
3278 *pc = mach->LoopLabelStack[mach->LoopLabelStackTop - 1] + 1;
3279 }
3280 else {
3281 /* exit loop: pop LoopMask */
3282 assert(mach->LoopStackTop > 0);
3283 mach->LoopMask = mach->LoopStack[--mach->LoopStackTop];
3284 /* pop ContMask */
3285 assert(mach->ContStackTop > 0);
3286 mach->ContMask = mach->ContStack[--mach->ContStackTop];
3287 assert(mach->LoopLabelStackTop > 0);
3288 --mach->LoopLabelStackTop;
3289
3290 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
3291 }
3292 UPDATE_EXEC_MASK(mach);
3293 break;
3294
3295 case TGSI_OPCODE_BRK:
3296 exec_break(mach);
3297 break;
3298
3299 case TGSI_OPCODE_CONT:
3300 /* turn off cont channels for each enabled exec channel */
3301 mach->ContMask &= ~mach->ExecMask;
3302 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3303 UPDATE_EXEC_MASK(mach);
3304 break;
3305
3306 case TGSI_OPCODE_BGNSUB:
3307 /* no-op */
3308 break;
3309
3310 case TGSI_OPCODE_ENDSUB:
3311 /*
3312 * XXX: This really should be a no-op. We should never reach this opcode.
3313 */
3314
3315 assert(mach->CallStackTop > 0);
3316 mach->CallStackTop--;
3317
3318 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3319 mach->CondMask = mach->CondStack[mach->CondStackTop];
3320
3321 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3322 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3323
3324 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3325 mach->ContMask = mach->ContStack[mach->ContStackTop];
3326
3327 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3328 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3329
3330 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3331 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3332
3333 assert(mach->FuncStackTop > 0);
3334 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3335
3336 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3337
3338 UPDATE_EXEC_MASK(mach);
3339 break;
3340
3341 case TGSI_OPCODE_NOP:
3342 break;
3343
3344 case TGSI_OPCODE_BREAKC:
3345 FETCH(&r[0], 0, CHAN_X);
3346 /* update CondMask */
3347 if (r[0].u[0] && (mach->ExecMask & 0x1)) {
3348 mach->LoopMask &= ~0x1;
3349 }
3350 if (r[0].u[1] && (mach->ExecMask & 0x2)) {
3351 mach->LoopMask &= ~0x2;
3352 }
3353 if (r[0].u[2] && (mach->ExecMask & 0x4)) {
3354 mach->LoopMask &= ~0x4;
3355 }
3356 if (r[0].u[3] && (mach->ExecMask & 0x8)) {
3357 mach->LoopMask &= ~0x8;
3358 }
3359 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3360 UPDATE_EXEC_MASK(mach);
3361 break;
3362
3363 case TGSI_OPCODE_F2I:
3364 exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
3365 break;
3366
3367 case TGSI_OPCODE_IDIV:
3368 exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3369 break;
3370
3371 case TGSI_OPCODE_IMAX:
3372 exec_vector_binary(mach, inst, micro_imax, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3373 break;
3374
3375 case TGSI_OPCODE_IMIN:
3376 exec_vector_binary(mach, inst, micro_imin, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3377 break;
3378
3379 case TGSI_OPCODE_INEG:
3380 exec_vector_unary(mach, inst, micro_ineg, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3381 break;
3382
3383 case TGSI_OPCODE_ISGE:
3384 exec_vector_binary(mach, inst, micro_isge, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3385 break;
3386
3387 case TGSI_OPCODE_ISHR:
3388 exec_vector_binary(mach, inst, micro_ishr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3389 break;
3390
3391 case TGSI_OPCODE_ISLT:
3392 exec_vector_binary(mach, inst, micro_islt, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3393 break;
3394
3395 case TGSI_OPCODE_F2U:
3396 exec_vector_unary(mach, inst, micro_f2u, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
3397 break;
3398
3399 case TGSI_OPCODE_U2F:
3400 exec_vector_unary(mach, inst, micro_u2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_UINT);
3401 break;
3402
3403 case TGSI_OPCODE_UADD:
3404 exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3405 break;
3406
3407 case TGSI_OPCODE_UDIV:
3408 exec_vector_binary(mach, inst, micro_udiv, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3409 break;
3410
3411 case TGSI_OPCODE_UMAD:
3412 exec_vector_trinary(mach, inst, micro_umad, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3413 break;
3414
3415 case TGSI_OPCODE_UMAX:
3416 exec_vector_binary(mach, inst, micro_umax, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3417 break;
3418
3419 case TGSI_OPCODE_UMIN:
3420 exec_vector_binary(mach, inst, micro_umin, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3421 break;
3422
3423 case TGSI_OPCODE_UMOD:
3424 exec_vector_binary(mach, inst, micro_umod, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3425 break;
3426
3427 case TGSI_OPCODE_UMUL:
3428 exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3429 break;
3430
3431 case TGSI_OPCODE_USEQ:
3432 exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3433 break;
3434
3435 case TGSI_OPCODE_USGE:
3436 exec_vector_binary(mach, inst, micro_usge, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3437 break;
3438
3439 case TGSI_OPCODE_USHR:
3440 exec_vector_binary(mach, inst, micro_ushr, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3441 break;
3442
3443 case TGSI_OPCODE_USLT:
3444 exec_vector_binary(mach, inst, micro_uslt, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3445 break;
3446
3447 case TGSI_OPCODE_USNE:
3448 exec_vector_binary(mach, inst, micro_usne, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3449 break;
3450
3451 case TGSI_OPCODE_SWITCH:
3452 exec_switch(mach, inst);
3453 break;
3454
3455 case TGSI_OPCODE_CASE:
3456 exec_case(mach, inst);
3457 break;
3458
3459 case TGSI_OPCODE_DEFAULT:
3460 exec_default(mach);
3461 break;
3462
3463 case TGSI_OPCODE_ENDSWITCH:
3464 exec_endswitch(mach);
3465 break;
3466
3467 default:
3468 assert( 0 );
3469 }
3470 }
3471
3472
3473 #define DEBUG_EXECUTION 0
3474
3475
3476 /**
3477 * Run TGSI interpreter.
3478 * \return bitmask of "alive" quad components
3479 */
3480 uint
3481 tgsi_exec_machine_run( struct tgsi_exec_machine *mach )
3482 {
3483 uint i;
3484 int pc = 0;
3485
3486 mach->CondMask = 0xf;
3487 mach->LoopMask = 0xf;
3488 mach->ContMask = 0xf;
3489 mach->FuncMask = 0xf;
3490 mach->ExecMask = 0xf;
3491
3492 mach->Switch.mask = 0xf;
3493
3494 assert(mach->CondStackTop == 0);
3495 assert(mach->LoopStackTop == 0);
3496 assert(mach->ContStackTop == 0);
3497 assert(mach->SwitchStackTop == 0);
3498 assert(mach->BreakStackTop == 0);
3499 assert(mach->CallStackTop == 0);
3500
3501 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] = 0;
3502 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] = 0;
3503
3504 if( mach->Processor == TGSI_PROCESSOR_GEOMETRY ) {
3505 mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0] = 0;
3506 mach->Primitives[0] = 0;
3507 }
3508
3509 for (i = 0; i < QUAD_SIZE; i++) {
3510 mach->Temps[TEMP_CC_I].xyzw[TEMP_CC_C].u[i] =
3511 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_X_SHIFT) |
3512 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Y_SHIFT) |
3513 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Z_SHIFT) |
3514 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_W_SHIFT);
3515 }
3516
3517 /* execute declarations (interpolants) */
3518 for (i = 0; i < mach->NumDeclarations; i++) {
3519 exec_declaration( mach, mach->Declarations+i );
3520 }
3521
3522 {
3523 #if DEBUG_EXECUTION
3524 struct tgsi_exec_vector temps[TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS];
3525 struct tgsi_exec_vector outputs[PIPE_MAX_ATTRIBS];
3526 uint inst = 1;
3527
3528 memcpy(temps, mach->Temps, sizeof(temps));
3529 memcpy(outputs, mach->Outputs, sizeof(outputs));
3530 #endif
3531
3532 /* execute instructions, until pc is set to -1 */
3533 while (pc != -1) {
3534
3535 #if DEBUG_EXECUTION
3536 uint i;
3537
3538 tgsi_dump_instruction(&mach->Instructions[pc], inst++);
3539 #endif
3540
3541 assert(pc < (int) mach->NumInstructions);
3542 exec_instruction(mach, mach->Instructions + pc, &pc);
3543
3544 #if DEBUG_EXECUTION
3545 for (i = 0; i < TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS; i++) {
3546 if (memcmp(&temps[i], &mach->Temps[i], sizeof(temps[i]))) {
3547 uint j;
3548
3549 memcpy(&temps[i], &mach->Temps[i], sizeof(temps[i]));
3550 debug_printf("TEMP[%2u] = ", i);
3551 for (j = 0; j < 4; j++) {
3552 if (j > 0) {
3553 debug_printf(" ");
3554 }
3555 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3556 temps[i].xyzw[0].f[j], temps[i].xyzw[0].u[j],
3557 temps[i].xyzw[1].f[j], temps[i].xyzw[1].u[j],
3558 temps[i].xyzw[2].f[j], temps[i].xyzw[2].u[j],
3559 temps[i].xyzw[3].f[j], temps[i].xyzw[3].u[j]);
3560 }
3561 }
3562 }
3563 for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
3564 if (memcmp(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]))) {
3565 uint j;
3566
3567 memcpy(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]));
3568 debug_printf("OUT[%2u] = ", i);
3569 for (j = 0; j < 4; j++) {
3570 if (j > 0) {
3571 debug_printf(" ");
3572 }
3573 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3574 outputs[i].xyzw[0].f[j], outputs[i].xyzw[0].u[j],
3575 outputs[i].xyzw[1].f[j], outputs[i].xyzw[1].u[j],
3576 outputs[i].xyzw[2].f[j], outputs[i].xyzw[2].u[j],
3577 outputs[i].xyzw[3].f[j], outputs[i].xyzw[3].u[j]);
3578 }
3579 }
3580 }
3581 #endif
3582 }
3583 }
3584
3585 #if 0
3586 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3587 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
3588 /*
3589 * Scale back depth component.
3590 */
3591 for (i = 0; i < 4; i++)
3592 mach->Outputs[0].xyzw[2].f[i] *= ctx->DrawBuffer->_DepthMaxF;
3593 }
3594 #endif
3595
3596 assert(mach->CondStackTop == 0);
3597 assert(mach->LoopStackTop == 0);
3598 assert(mach->ContStackTop == 0);
3599 assert(mach->SwitchStackTop == 0);
3600 assert(mach->BreakStackTop == 0);
3601 assert(mach->CallStackTop == 0);
3602
3603 return ~mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0];
3604 }