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Merge branch '7.8'
[mesa.git] / src / gallium / auxiliary / tgsi / tgsi_exec.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 /**
30 * TGSI interpreter/executor.
31 *
32 * Flow control information:
33 *
34 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
35 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
36 * care since a condition may be true for some quad components but false
37 * for other components.
38 *
39 * We basically execute all statements (even if they're in the part of
40 * an IF/ELSE clause that's "not taken") and use a special mask to
41 * control writing to destination registers. This is the ExecMask.
42 * See store_dest().
43 *
44 * The ExecMask is computed from three other masks (CondMask, LoopMask and
45 * ContMask) which are controlled by the flow control instructions (namely:
46 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
47 *
48 *
49 * Authors:
50 * Michal Krol
51 * Brian Paul
52 */
53
54 #include "pipe/p_compiler.h"
55 #include "pipe/p_state.h"
56 #include "pipe/p_shader_tokens.h"
57 #include "tgsi/tgsi_dump.h"
58 #include "tgsi/tgsi_parse.h"
59 #include "tgsi/tgsi_util.h"
60 #include "tgsi_exec.h"
61 #include "util/u_memory.h"
62 #include "util/u_math.h"
63
64
65 #define FAST_MATH 1
66
67 #define TILE_TOP_LEFT 0
68 #define TILE_TOP_RIGHT 1
69 #define TILE_BOTTOM_LEFT 2
70 #define TILE_BOTTOM_RIGHT 3
71
72 static void
73 micro_abs(union tgsi_exec_channel *dst,
74 const union tgsi_exec_channel *src)
75 {
76 dst->f[0] = fabsf(src->f[0]);
77 dst->f[1] = fabsf(src->f[1]);
78 dst->f[2] = fabsf(src->f[2]);
79 dst->f[3] = fabsf(src->f[3]);
80 }
81
82 static void
83 micro_arl(union tgsi_exec_channel *dst,
84 const union tgsi_exec_channel *src)
85 {
86 dst->i[0] = (int)floorf(src->f[0]);
87 dst->i[1] = (int)floorf(src->f[1]);
88 dst->i[2] = (int)floorf(src->f[2]);
89 dst->i[3] = (int)floorf(src->f[3]);
90 }
91
92 static void
93 micro_arr(union tgsi_exec_channel *dst,
94 const union tgsi_exec_channel *src)
95 {
96 dst->i[0] = (int)floorf(src->f[0] + 0.5f);
97 dst->i[1] = (int)floorf(src->f[1] + 0.5f);
98 dst->i[2] = (int)floorf(src->f[2] + 0.5f);
99 dst->i[3] = (int)floorf(src->f[3] + 0.5f);
100 }
101
102 static void
103 micro_ceil(union tgsi_exec_channel *dst,
104 const union tgsi_exec_channel *src)
105 {
106 dst->f[0] = ceilf(src->f[0]);
107 dst->f[1] = ceilf(src->f[1]);
108 dst->f[2] = ceilf(src->f[2]);
109 dst->f[3] = ceilf(src->f[3]);
110 }
111
112 static void
113 micro_clamp(union tgsi_exec_channel *dst,
114 const union tgsi_exec_channel *src0,
115 const union tgsi_exec_channel *src1,
116 const union tgsi_exec_channel *src2)
117 {
118 dst->f[0] = src0->f[0] < src1->f[0] ? src1->f[0] : src0->f[0] > src2->f[0] ? src2->f[0] : src0->f[0];
119 dst->f[1] = src0->f[1] < src1->f[1] ? src1->f[1] : src0->f[1] > src2->f[1] ? src2->f[1] : src0->f[1];
120 dst->f[2] = src0->f[2] < src1->f[2] ? src1->f[2] : src0->f[2] > src2->f[2] ? src2->f[2] : src0->f[2];
121 dst->f[3] = src0->f[3] < src1->f[3] ? src1->f[3] : src0->f[3] > src2->f[3] ? src2->f[3] : src0->f[3];
122 }
123
124 static void
125 micro_cmp(union tgsi_exec_channel *dst,
126 const union tgsi_exec_channel *src0,
127 const union tgsi_exec_channel *src1,
128 const union tgsi_exec_channel *src2)
129 {
130 dst->f[0] = src0->f[0] < 0.0f ? src1->f[0] : src2->f[0];
131 dst->f[1] = src0->f[1] < 0.0f ? src1->f[1] : src2->f[1];
132 dst->f[2] = src0->f[2] < 0.0f ? src1->f[2] : src2->f[2];
133 dst->f[3] = src0->f[3] < 0.0f ? src1->f[3] : src2->f[3];
134 }
135
136 static void
137 micro_cnd(union tgsi_exec_channel *dst,
138 const union tgsi_exec_channel *src0,
139 const union tgsi_exec_channel *src1,
140 const union tgsi_exec_channel *src2)
141 {
142 dst->f[0] = src2->f[0] > 0.5f ? src0->f[0] : src1->f[0];
143 dst->f[1] = src2->f[1] > 0.5f ? src0->f[1] : src1->f[1];
144 dst->f[2] = src2->f[2] > 0.5f ? src0->f[2] : src1->f[2];
145 dst->f[3] = src2->f[3] > 0.5f ? src0->f[3] : src1->f[3];
146 }
147
148 static void
149 micro_cos(union tgsi_exec_channel *dst,
150 const union tgsi_exec_channel *src)
151 {
152 dst->f[0] = cosf(src->f[0]);
153 dst->f[1] = cosf(src->f[1]);
154 dst->f[2] = cosf(src->f[2]);
155 dst->f[3] = cosf(src->f[3]);
156 }
157
158 static void
159 micro_ddx(union tgsi_exec_channel *dst,
160 const union tgsi_exec_channel *src)
161 {
162 dst->f[0] =
163 dst->f[1] =
164 dst->f[2] =
165 dst->f[3] = src->f[TILE_BOTTOM_RIGHT] - src->f[TILE_BOTTOM_LEFT];
166 }
167
168 static void
169 micro_ddy(union tgsi_exec_channel *dst,
170 const union tgsi_exec_channel *src)
171 {
172 dst->f[0] =
173 dst->f[1] =
174 dst->f[2] =
175 dst->f[3] = src->f[TILE_BOTTOM_LEFT] - src->f[TILE_TOP_LEFT];
176 }
177
178 static void
179 micro_exp2(union tgsi_exec_channel *dst,
180 const union tgsi_exec_channel *src)
181 {
182 #if FAST_MATH
183 dst->f[0] = util_fast_exp2(src->f[0]);
184 dst->f[1] = util_fast_exp2(src->f[1]);
185 dst->f[2] = util_fast_exp2(src->f[2]);
186 dst->f[3] = util_fast_exp2(src->f[3]);
187 #else
188 #if DEBUG
189 /* Inf is okay for this instruction, so clamp it to silence assertions. */
190 uint i;
191 union tgsi_exec_channel clamped;
192
193 for (i = 0; i < 4; i++) {
194 if (src->f[i] > 127.99999f) {
195 clamped.f[i] = 127.99999f;
196 } else if (src->f[i] < -126.99999f) {
197 clamped.f[i] = -126.99999f;
198 } else {
199 clamped.f[i] = src->f[i];
200 }
201 }
202 src = &clamped;
203 #endif /* DEBUG */
204
205 dst->f[0] = powf(2.0f, src->f[0]);
206 dst->f[1] = powf(2.0f, src->f[1]);
207 dst->f[2] = powf(2.0f, src->f[2]);
208 dst->f[3] = powf(2.0f, src->f[3]);
209 #endif /* FAST_MATH */
210 }
211
212 static void
213 micro_flr(union tgsi_exec_channel *dst,
214 const union tgsi_exec_channel *src)
215 {
216 dst->f[0] = floorf(src->f[0]);
217 dst->f[1] = floorf(src->f[1]);
218 dst->f[2] = floorf(src->f[2]);
219 dst->f[3] = floorf(src->f[3]);
220 }
221
222 static void
223 micro_frc(union tgsi_exec_channel *dst,
224 const union tgsi_exec_channel *src)
225 {
226 dst->f[0] = src->f[0] - floorf(src->f[0]);
227 dst->f[1] = src->f[1] - floorf(src->f[1]);
228 dst->f[2] = src->f[2] - floorf(src->f[2]);
229 dst->f[3] = src->f[3] - floorf(src->f[3]);
230 }
231
232 static void
233 micro_iabs(union tgsi_exec_channel *dst,
234 const union tgsi_exec_channel *src)
235 {
236 dst->i[0] = src->i[0] >= 0 ? src->i[0] : -src->i[0];
237 dst->i[1] = src->i[1] >= 0 ? src->i[1] : -src->i[1];
238 dst->i[2] = src->i[2] >= 0 ? src->i[2] : -src->i[2];
239 dst->i[3] = src->i[3] >= 0 ? src->i[3] : -src->i[3];
240 }
241
242 static void
243 micro_ineg(union tgsi_exec_channel *dst,
244 const union tgsi_exec_channel *src)
245 {
246 dst->i[0] = -src->i[0];
247 dst->i[1] = -src->i[1];
248 dst->i[2] = -src->i[2];
249 dst->i[3] = -src->i[3];
250 }
251
252 static void
253 micro_lg2(union tgsi_exec_channel *dst,
254 const union tgsi_exec_channel *src)
255 {
256 #if FAST_MATH
257 dst->f[0] = util_fast_log2(src->f[0]);
258 dst->f[1] = util_fast_log2(src->f[1]);
259 dst->f[2] = util_fast_log2(src->f[2]);
260 dst->f[3] = util_fast_log2(src->f[3]);
261 #else
262 dst->f[0] = logf(src->f[0]) * 1.442695f;
263 dst->f[1] = logf(src->f[1]) * 1.442695f;
264 dst->f[2] = logf(src->f[2]) * 1.442695f;
265 dst->f[3] = logf(src->f[3]) * 1.442695f;
266 #endif
267 }
268
269 static void
270 micro_lrp(union tgsi_exec_channel *dst,
271 const union tgsi_exec_channel *src0,
272 const union tgsi_exec_channel *src1,
273 const union tgsi_exec_channel *src2)
274 {
275 dst->f[0] = src0->f[0] * (src1->f[0] - src2->f[0]) + src2->f[0];
276 dst->f[1] = src0->f[1] * (src1->f[1] - src2->f[1]) + src2->f[1];
277 dst->f[2] = src0->f[2] * (src1->f[2] - src2->f[2]) + src2->f[2];
278 dst->f[3] = src0->f[3] * (src1->f[3] - src2->f[3]) + src2->f[3];
279 }
280
281 static void
282 micro_mad(union tgsi_exec_channel *dst,
283 const union tgsi_exec_channel *src0,
284 const union tgsi_exec_channel *src1,
285 const union tgsi_exec_channel *src2)
286 {
287 dst->f[0] = src0->f[0] * src1->f[0] + src2->f[0];
288 dst->f[1] = src0->f[1] * src1->f[1] + src2->f[1];
289 dst->f[2] = src0->f[2] * src1->f[2] + src2->f[2];
290 dst->f[3] = src0->f[3] * src1->f[3] + src2->f[3];
291 }
292
293 static void
294 micro_mov(union tgsi_exec_channel *dst,
295 const union tgsi_exec_channel *src)
296 {
297 dst->u[0] = src->u[0];
298 dst->u[1] = src->u[1];
299 dst->u[2] = src->u[2];
300 dst->u[3] = src->u[3];
301 }
302
303 static void
304 micro_rcp(union tgsi_exec_channel *dst,
305 const union tgsi_exec_channel *src)
306 {
307 #if 0 /* for debugging */
308 assert(src->f[0] != 0.0f);
309 assert(src->f[1] != 0.0f);
310 assert(src->f[2] != 0.0f);
311 assert(src->f[3] != 0.0f);
312 #endif
313 dst->f[0] = 1.0f / src->f[0];
314 dst->f[1] = 1.0f / src->f[1];
315 dst->f[2] = 1.0f / src->f[2];
316 dst->f[3] = 1.0f / src->f[3];
317 }
318
319 static void
320 micro_rnd(union tgsi_exec_channel *dst,
321 const union tgsi_exec_channel *src)
322 {
323 dst->f[0] = floorf(src->f[0] + 0.5f);
324 dst->f[1] = floorf(src->f[1] + 0.5f);
325 dst->f[2] = floorf(src->f[2] + 0.5f);
326 dst->f[3] = floorf(src->f[3] + 0.5f);
327 }
328
329 static void
330 micro_rsq(union tgsi_exec_channel *dst,
331 const union tgsi_exec_channel *src)
332 {
333 #if 0 /* for debugging */
334 assert(src->f[0] != 0.0f);
335 assert(src->f[1] != 0.0f);
336 assert(src->f[2] != 0.0f);
337 assert(src->f[3] != 0.0f);
338 #endif
339 dst->f[0] = 1.0f / sqrtf(fabsf(src->f[0]));
340 dst->f[1] = 1.0f / sqrtf(fabsf(src->f[1]));
341 dst->f[2] = 1.0f / sqrtf(fabsf(src->f[2]));
342 dst->f[3] = 1.0f / sqrtf(fabsf(src->f[3]));
343 }
344
345 static void
346 micro_seq(union tgsi_exec_channel *dst,
347 const union tgsi_exec_channel *src0,
348 const union tgsi_exec_channel *src1)
349 {
350 dst->f[0] = src0->f[0] == src1->f[0] ? 1.0f : 0.0f;
351 dst->f[1] = src0->f[1] == src1->f[1] ? 1.0f : 0.0f;
352 dst->f[2] = src0->f[2] == src1->f[2] ? 1.0f : 0.0f;
353 dst->f[3] = src0->f[3] == src1->f[3] ? 1.0f : 0.0f;
354 }
355
356 static void
357 micro_sge(union tgsi_exec_channel *dst,
358 const union tgsi_exec_channel *src0,
359 const union tgsi_exec_channel *src1)
360 {
361 dst->f[0] = src0->f[0] >= src1->f[0] ? 1.0f : 0.0f;
362 dst->f[1] = src0->f[1] >= src1->f[1] ? 1.0f : 0.0f;
363 dst->f[2] = src0->f[2] >= src1->f[2] ? 1.0f : 0.0f;
364 dst->f[3] = src0->f[3] >= src1->f[3] ? 1.0f : 0.0f;
365 }
366
367 static void
368 micro_sgn(union tgsi_exec_channel *dst,
369 const union tgsi_exec_channel *src)
370 {
371 dst->f[0] = src->f[0] < 0.0f ? -1.0f : src->f[0] > 0.0f ? 1.0f : 0.0f;
372 dst->f[1] = src->f[1] < 0.0f ? -1.0f : src->f[1] > 0.0f ? 1.0f : 0.0f;
373 dst->f[2] = src->f[2] < 0.0f ? -1.0f : src->f[2] > 0.0f ? 1.0f : 0.0f;
374 dst->f[3] = src->f[3] < 0.0f ? -1.0f : src->f[3] > 0.0f ? 1.0f : 0.0f;
375 }
376
377 static void
378 micro_sgt(union tgsi_exec_channel *dst,
379 const union tgsi_exec_channel *src0,
380 const union tgsi_exec_channel *src1)
381 {
382 dst->f[0] = src0->f[0] > src1->f[0] ? 1.0f : 0.0f;
383 dst->f[1] = src0->f[1] > src1->f[1] ? 1.0f : 0.0f;
384 dst->f[2] = src0->f[2] > src1->f[2] ? 1.0f : 0.0f;
385 dst->f[3] = src0->f[3] > src1->f[3] ? 1.0f : 0.0f;
386 }
387
388 static void
389 micro_sin(union tgsi_exec_channel *dst,
390 const union tgsi_exec_channel *src)
391 {
392 dst->f[0] = sinf(src->f[0]);
393 dst->f[1] = sinf(src->f[1]);
394 dst->f[2] = sinf(src->f[2]);
395 dst->f[3] = sinf(src->f[3]);
396 }
397
398 static void
399 micro_sle(union tgsi_exec_channel *dst,
400 const union tgsi_exec_channel *src0,
401 const union tgsi_exec_channel *src1)
402 {
403 dst->f[0] = src0->f[0] <= src1->f[0] ? 1.0f : 0.0f;
404 dst->f[1] = src0->f[1] <= src1->f[1] ? 1.0f : 0.0f;
405 dst->f[2] = src0->f[2] <= src1->f[2] ? 1.0f : 0.0f;
406 dst->f[3] = src0->f[3] <= src1->f[3] ? 1.0f : 0.0f;
407 }
408
409 static void
410 micro_slt(union tgsi_exec_channel *dst,
411 const union tgsi_exec_channel *src0,
412 const union tgsi_exec_channel *src1)
413 {
414 dst->f[0] = src0->f[0] < src1->f[0] ? 1.0f : 0.0f;
415 dst->f[1] = src0->f[1] < src1->f[1] ? 1.0f : 0.0f;
416 dst->f[2] = src0->f[2] < src1->f[2] ? 1.0f : 0.0f;
417 dst->f[3] = src0->f[3] < src1->f[3] ? 1.0f : 0.0f;
418 }
419
420 static void
421 micro_sne(union tgsi_exec_channel *dst,
422 const union tgsi_exec_channel *src0,
423 const union tgsi_exec_channel *src1)
424 {
425 dst->f[0] = src0->f[0] != src1->f[0] ? 1.0f : 0.0f;
426 dst->f[1] = src0->f[1] != src1->f[1] ? 1.0f : 0.0f;
427 dst->f[2] = src0->f[2] != src1->f[2] ? 1.0f : 0.0f;
428 dst->f[3] = src0->f[3] != src1->f[3] ? 1.0f : 0.0f;
429 }
430
431 static void
432 micro_trunc(union tgsi_exec_channel *dst,
433 const union tgsi_exec_channel *src)
434 {
435 dst->f[0] = (float)(int)src->f[0];
436 dst->f[1] = (float)(int)src->f[1];
437 dst->f[2] = (float)(int)src->f[2];
438 dst->f[3] = (float)(int)src->f[3];
439 }
440
441
442 #define CHAN_X 0
443 #define CHAN_Y 1
444 #define CHAN_Z 2
445 #define CHAN_W 3
446
447 enum tgsi_exec_datatype {
448 TGSI_EXEC_DATA_FLOAT,
449 TGSI_EXEC_DATA_INT,
450 TGSI_EXEC_DATA_UINT
451 };
452
453 /*
454 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
455 */
456 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
457 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
458 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
459 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
460 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
461 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
462 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
463 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
464 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
465 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
466 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
467 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
468 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
469 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
470 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
471 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
472 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
473 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
474 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
475 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
476 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
477 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
478 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
479 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
480 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
481 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
482 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
483 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
484 #define TEMP_R0 TGSI_EXEC_TEMP_R0
485 #define TEMP_P0 TGSI_EXEC_TEMP_P0
486
487 #define IS_CHANNEL_ENABLED(INST, CHAN)\
488 ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
489
490 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
491 ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
492
493 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
494 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
495 if (IS_CHANNEL_ENABLED( INST, CHAN ))
496
497 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
498 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
499 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
500
501
502 /** The execution mask depends on the conditional mask and the loop mask */
503 #define UPDATE_EXEC_MASK(MACH) \
504 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
505
506
507 static const union tgsi_exec_channel ZeroVec =
508 { { 0.0, 0.0, 0.0, 0.0 } };
509
510 static const union tgsi_exec_channel OneVec = {
511 {1.0f, 1.0f, 1.0f, 1.0f}
512 };
513
514
515 /**
516 * Assert that none of the float values in 'chan' are infinite or NaN.
517 * NaN and Inf may occur normally during program execution and should
518 * not lead to crashes, etc. But when debugging, it's helpful to catch
519 * them.
520 */
521 static INLINE void
522 check_inf_or_nan(const union tgsi_exec_channel *chan)
523 {
524 assert(!util_is_inf_or_nan((chan)->f[0]));
525 assert(!util_is_inf_or_nan((chan)->f[1]));
526 assert(!util_is_inf_or_nan((chan)->f[2]));
527 assert(!util_is_inf_or_nan((chan)->f[3]));
528 }
529
530
531 #ifdef DEBUG
532 static void
533 print_chan(const char *msg, const union tgsi_exec_channel *chan)
534 {
535 debug_printf("%s = {%f, %f, %f, %f}\n",
536 msg, chan->f[0], chan->f[1], chan->f[2], chan->f[3]);
537 }
538 #endif
539
540
541 #ifdef DEBUG
542 static void
543 print_temp(const struct tgsi_exec_machine *mach, uint index)
544 {
545 const struct tgsi_exec_vector *tmp = &mach->Temps[index];
546 int i;
547 debug_printf("Temp[%u] =\n", index);
548 for (i = 0; i < 4; i++) {
549 debug_printf(" %c: { %f, %f, %f, %f }\n",
550 "XYZW"[i],
551 tmp->xyzw[i].f[0],
552 tmp->xyzw[i].f[1],
553 tmp->xyzw[i].f[2],
554 tmp->xyzw[i].f[3]);
555 }
556 }
557 #endif
558
559
560 /**
561 * Check if there's a potential src/dst register data dependency when
562 * using SOA execution.
563 * Example:
564 * MOV T, T.yxwz;
565 * This would expand into:
566 * MOV t0, t1;
567 * MOV t1, t0;
568 * MOV t2, t3;
569 * MOV t3, t2;
570 * The second instruction will have the wrong value for t0 if executed as-is.
571 */
572 boolean
573 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
574 {
575 uint i, chan;
576
577 uint writemask = inst->Dst[0].Register.WriteMask;
578 if (writemask == TGSI_WRITEMASK_X ||
579 writemask == TGSI_WRITEMASK_Y ||
580 writemask == TGSI_WRITEMASK_Z ||
581 writemask == TGSI_WRITEMASK_W ||
582 writemask == TGSI_WRITEMASK_NONE) {
583 /* no chance of data dependency */
584 return FALSE;
585 }
586
587 /* loop over src regs */
588 for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
589 if ((inst->Src[i].Register.File ==
590 inst->Dst[0].Register.File) &&
591 (inst->Src[i].Register.Index ==
592 inst->Dst[0].Register.Index)) {
593 /* loop over dest channels */
594 uint channelsWritten = 0x0;
595 FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
596 /* check if we're reading a channel that's been written */
597 uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
598 if (channelsWritten & (1 << swizzle)) {
599 return TRUE;
600 }
601
602 channelsWritten |= (1 << chan);
603 }
604 }
605 }
606 return FALSE;
607 }
608
609
610 /**
611 * Initialize machine state by expanding tokens to full instructions,
612 * allocating temporary storage, setting up constants, etc.
613 * After this, we can call tgsi_exec_machine_run() many times.
614 */
615 void
616 tgsi_exec_machine_bind_shader(
617 struct tgsi_exec_machine *mach,
618 const struct tgsi_token *tokens,
619 uint numSamplers,
620 struct tgsi_sampler **samplers)
621 {
622 uint k;
623 struct tgsi_parse_context parse;
624 struct tgsi_exec_labels *labels = &mach->Labels;
625 struct tgsi_full_instruction *instructions;
626 struct tgsi_full_declaration *declarations;
627 uint maxInstructions = 10, numInstructions = 0;
628 uint maxDeclarations = 10, numDeclarations = 0;
629 uint instno = 0;
630
631 #if 0
632 tgsi_dump(tokens, 0);
633 #endif
634
635 util_init_math();
636
637 mach->Tokens = tokens;
638 mach->Samplers = samplers;
639
640 k = tgsi_parse_init (&parse, mach->Tokens);
641 if (k != TGSI_PARSE_OK) {
642 debug_printf( "Problem parsing!\n" );
643 return;
644 }
645
646 mach->Processor = parse.FullHeader.Processor.Processor;
647 mach->ImmLimit = 0;
648 labels->count = 0;
649
650 declarations = (struct tgsi_full_declaration *)
651 MALLOC( maxDeclarations * sizeof(struct tgsi_full_declaration) );
652
653 if (!declarations) {
654 return;
655 }
656
657 instructions = (struct tgsi_full_instruction *)
658 MALLOC( maxInstructions * sizeof(struct tgsi_full_instruction) );
659
660 if (!instructions) {
661 FREE( declarations );
662 return;
663 }
664
665 while( !tgsi_parse_end_of_tokens( &parse ) ) {
666 uint pointer = parse.Position;
667 uint i;
668
669 tgsi_parse_token( &parse );
670 switch( parse.FullToken.Token.Type ) {
671 case TGSI_TOKEN_TYPE_DECLARATION:
672 /* save expanded declaration */
673 if (numDeclarations == maxDeclarations) {
674 declarations = REALLOC(declarations,
675 maxDeclarations
676 * sizeof(struct tgsi_full_declaration),
677 (maxDeclarations + 10)
678 * sizeof(struct tgsi_full_declaration));
679 maxDeclarations += 10;
680 }
681 if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_OUTPUT) {
682 unsigned reg;
683 for (reg = parse.FullToken.FullDeclaration.Range.First;
684 reg <= parse.FullToken.FullDeclaration.Range.Last;
685 ++reg) {
686 ++mach->NumOutputs;
687 }
688 }
689 memcpy(declarations + numDeclarations,
690 &parse.FullToken.FullDeclaration,
691 sizeof(declarations[0]));
692 numDeclarations++;
693 break;
694
695 case TGSI_TOKEN_TYPE_IMMEDIATE:
696 {
697 uint size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
698 assert( size <= 4 );
699 assert( mach->ImmLimit + 1 <= TGSI_EXEC_NUM_IMMEDIATES );
700
701 for( i = 0; i < size; i++ ) {
702 mach->Imms[mach->ImmLimit][i] =
703 parse.FullToken.FullImmediate.u[i].Float;
704 }
705 mach->ImmLimit += 1;
706 }
707 break;
708
709 case TGSI_TOKEN_TYPE_INSTRUCTION:
710 assert( labels->count < MAX_LABELS );
711
712 labels->labels[labels->count][0] = instno;
713 labels->labels[labels->count][1] = pointer;
714 labels->count++;
715
716 /* save expanded instruction */
717 if (numInstructions == maxInstructions) {
718 instructions = REALLOC(instructions,
719 maxInstructions
720 * sizeof(struct tgsi_full_instruction),
721 (maxInstructions + 10)
722 * sizeof(struct tgsi_full_instruction));
723 maxInstructions += 10;
724 }
725
726 memcpy(instructions + numInstructions,
727 &parse.FullToken.FullInstruction,
728 sizeof(instructions[0]));
729
730 numInstructions++;
731 break;
732
733 case TGSI_TOKEN_TYPE_PROPERTY:
734 break;
735
736 default:
737 assert( 0 );
738 }
739 }
740 tgsi_parse_free (&parse);
741
742 if (mach->Declarations) {
743 FREE( mach->Declarations );
744 }
745 mach->Declarations = declarations;
746 mach->NumDeclarations = numDeclarations;
747
748 if (mach->Instructions) {
749 FREE( mach->Instructions );
750 }
751 mach->Instructions = instructions;
752 mach->NumInstructions = numInstructions;
753 }
754
755
756 struct tgsi_exec_machine *
757 tgsi_exec_machine_create( void )
758 {
759 struct tgsi_exec_machine *mach;
760 uint i;
761
762 mach = align_malloc( sizeof *mach, 16 );
763 if (!mach)
764 goto fail;
765
766 memset(mach, 0, sizeof(*mach));
767
768 mach->Addrs = &mach->Temps[TGSI_EXEC_TEMP_ADDR];
769 mach->MaxGeometryShaderOutputs = TGSI_MAX_TOTAL_VERTICES;
770 mach->Predicates = &mach->Temps[TGSI_EXEC_TEMP_P0];
771
772 /* Setup constants. */
773 for( i = 0; i < 4; i++ ) {
774 mach->Temps[TEMP_0_I].xyzw[TEMP_0_C].u[i] = 0x00000000;
775 mach->Temps[TEMP_7F_I].xyzw[TEMP_7F_C].u[i] = 0x7FFFFFFF;
776 mach->Temps[TEMP_80_I].xyzw[TEMP_80_C].u[i] = 0x80000000;
777 mach->Temps[TEMP_FF_I].xyzw[TEMP_FF_C].u[i] = 0xFFFFFFFF;
778 mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].f[i] = 1.0f;
779 mach->Temps[TEMP_2_I].xyzw[TEMP_2_C].f[i] = 2.0f;
780 mach->Temps[TEMP_128_I].xyzw[TEMP_128_C].f[i] = 128.0f;
781 mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C].f[i] = -128.0f;
782 mach->Temps[TEMP_3_I].xyzw[TEMP_3_C].f[i] = 3.0f;
783 mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C].f[i] = 0.5f;
784 }
785
786 #ifdef DEBUG
787 /* silence warnings */
788 (void) print_chan;
789 (void) print_temp;
790 #endif
791
792 return mach;
793
794 fail:
795 align_free(mach);
796 return NULL;
797 }
798
799
800 void
801 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach)
802 {
803 if (mach) {
804 FREE(mach->Instructions);
805 FREE(mach->Declarations);
806 }
807
808 align_free(mach);
809 }
810
811 static void
812 micro_add(union tgsi_exec_channel *dst,
813 const union tgsi_exec_channel *src0,
814 const union tgsi_exec_channel *src1)
815 {
816 dst->f[0] = src0->f[0] + src1->f[0];
817 dst->f[1] = src0->f[1] + src1->f[1];
818 dst->f[2] = src0->f[2] + src1->f[2];
819 dst->f[3] = src0->f[3] + src1->f[3];
820 }
821
822 static void
823 micro_div(
824 union tgsi_exec_channel *dst,
825 const union tgsi_exec_channel *src0,
826 const union tgsi_exec_channel *src1 )
827 {
828 if (src1->f[0] != 0) {
829 dst->f[0] = src0->f[0] / src1->f[0];
830 }
831 if (src1->f[1] != 0) {
832 dst->f[1] = src0->f[1] / src1->f[1];
833 }
834 if (src1->f[2] != 0) {
835 dst->f[2] = src0->f[2] / src1->f[2];
836 }
837 if (src1->f[3] != 0) {
838 dst->f[3] = src0->f[3] / src1->f[3];
839 }
840 }
841
842 static void
843 micro_float_clamp(union tgsi_exec_channel *dst,
844 const union tgsi_exec_channel *src)
845 {
846 uint i;
847
848 for (i = 0; i < 4; i++) {
849 if (src->f[i] > 0.0f) {
850 if (src->f[i] > 1.884467e+019f)
851 dst->f[i] = 1.884467e+019f;
852 else if (src->f[i] < 5.42101e-020f)
853 dst->f[i] = 5.42101e-020f;
854 else
855 dst->f[i] = src->f[i];
856 }
857 else {
858 if (src->f[i] < -1.884467e+019f)
859 dst->f[i] = -1.884467e+019f;
860 else if (src->f[i] > -5.42101e-020f)
861 dst->f[i] = -5.42101e-020f;
862 else
863 dst->f[i] = src->f[i];
864 }
865 }
866 }
867
868 static void
869 micro_lt(
870 union tgsi_exec_channel *dst,
871 const union tgsi_exec_channel *src0,
872 const union tgsi_exec_channel *src1,
873 const union tgsi_exec_channel *src2,
874 const union tgsi_exec_channel *src3 )
875 {
876 dst->f[0] = src0->f[0] < src1->f[0] ? src2->f[0] : src3->f[0];
877 dst->f[1] = src0->f[1] < src1->f[1] ? src2->f[1] : src3->f[1];
878 dst->f[2] = src0->f[2] < src1->f[2] ? src2->f[2] : src3->f[2];
879 dst->f[3] = src0->f[3] < src1->f[3] ? src2->f[3] : src3->f[3];
880 }
881
882 static void
883 micro_max(union tgsi_exec_channel *dst,
884 const union tgsi_exec_channel *src0,
885 const union tgsi_exec_channel *src1)
886 {
887 dst->f[0] = src0->f[0] > src1->f[0] ? src0->f[0] : src1->f[0];
888 dst->f[1] = src0->f[1] > src1->f[1] ? src0->f[1] : src1->f[1];
889 dst->f[2] = src0->f[2] > src1->f[2] ? src0->f[2] : src1->f[2];
890 dst->f[3] = src0->f[3] > src1->f[3] ? src0->f[3] : src1->f[3];
891 }
892
893 static void
894 micro_min(union tgsi_exec_channel *dst,
895 const union tgsi_exec_channel *src0,
896 const union tgsi_exec_channel *src1)
897 {
898 dst->f[0] = src0->f[0] < src1->f[0] ? src0->f[0] : src1->f[0];
899 dst->f[1] = src0->f[1] < src1->f[1] ? src0->f[1] : src1->f[1];
900 dst->f[2] = src0->f[2] < src1->f[2] ? src0->f[2] : src1->f[2];
901 dst->f[3] = src0->f[3] < src1->f[3] ? src0->f[3] : src1->f[3];
902 }
903
904 static void
905 micro_mul(union tgsi_exec_channel *dst,
906 const union tgsi_exec_channel *src0,
907 const union tgsi_exec_channel *src1)
908 {
909 dst->f[0] = src0->f[0] * src1->f[0];
910 dst->f[1] = src0->f[1] * src1->f[1];
911 dst->f[2] = src0->f[2] * src1->f[2];
912 dst->f[3] = src0->f[3] * src1->f[3];
913 }
914
915 #if 0
916 static void
917 micro_imul64(
918 union tgsi_exec_channel *dst0,
919 union tgsi_exec_channel *dst1,
920 const union tgsi_exec_channel *src0,
921 const union tgsi_exec_channel *src1 )
922 {
923 dst1->i[0] = src0->i[0] * src1->i[0];
924 dst1->i[1] = src0->i[1] * src1->i[1];
925 dst1->i[2] = src0->i[2] * src1->i[2];
926 dst1->i[3] = src0->i[3] * src1->i[3];
927 dst0->i[0] = 0;
928 dst0->i[1] = 0;
929 dst0->i[2] = 0;
930 dst0->i[3] = 0;
931 }
932 #endif
933
934 #if 0
935 static void
936 micro_umul64(
937 union tgsi_exec_channel *dst0,
938 union tgsi_exec_channel *dst1,
939 const union tgsi_exec_channel *src0,
940 const union tgsi_exec_channel *src1 )
941 {
942 dst1->u[0] = src0->u[0] * src1->u[0];
943 dst1->u[1] = src0->u[1] * src1->u[1];
944 dst1->u[2] = src0->u[2] * src1->u[2];
945 dst1->u[3] = src0->u[3] * src1->u[3];
946 dst0->u[0] = 0;
947 dst0->u[1] = 0;
948 dst0->u[2] = 0;
949 dst0->u[3] = 0;
950 }
951 #endif
952
953
954 #if 0
955 static void
956 micro_movc(
957 union tgsi_exec_channel *dst,
958 const union tgsi_exec_channel *src0,
959 const union tgsi_exec_channel *src1,
960 const union tgsi_exec_channel *src2 )
961 {
962 dst->u[0] = src0->u[0] ? src1->u[0] : src2->u[0];
963 dst->u[1] = src0->u[1] ? src1->u[1] : src2->u[1];
964 dst->u[2] = src0->u[2] ? src1->u[2] : src2->u[2];
965 dst->u[3] = src0->u[3] ? src1->u[3] : src2->u[3];
966 }
967 #endif
968
969 static void
970 micro_neg(
971 union tgsi_exec_channel *dst,
972 const union tgsi_exec_channel *src )
973 {
974 dst->f[0] = -src->f[0];
975 dst->f[1] = -src->f[1];
976 dst->f[2] = -src->f[2];
977 dst->f[3] = -src->f[3];
978 }
979
980 static void
981 micro_pow(
982 union tgsi_exec_channel *dst,
983 const union tgsi_exec_channel *src0,
984 const union tgsi_exec_channel *src1 )
985 {
986 #if FAST_MATH
987 dst->f[0] = util_fast_pow( src0->f[0], src1->f[0] );
988 dst->f[1] = util_fast_pow( src0->f[1], src1->f[1] );
989 dst->f[2] = util_fast_pow( src0->f[2], src1->f[2] );
990 dst->f[3] = util_fast_pow( src0->f[3], src1->f[3] );
991 #else
992 dst->f[0] = powf( src0->f[0], src1->f[0] );
993 dst->f[1] = powf( src0->f[1], src1->f[1] );
994 dst->f[2] = powf( src0->f[2], src1->f[2] );
995 dst->f[3] = powf( src0->f[3], src1->f[3] );
996 #endif
997 }
998
999 static void
1000 micro_sub(union tgsi_exec_channel *dst,
1001 const union tgsi_exec_channel *src0,
1002 const union tgsi_exec_channel *src1)
1003 {
1004 dst->f[0] = src0->f[0] - src1->f[0];
1005 dst->f[1] = src0->f[1] - src1->f[1];
1006 dst->f[2] = src0->f[2] - src1->f[2];
1007 dst->f[3] = src0->f[3] - src1->f[3];
1008 }
1009
1010 static void
1011 fetch_src_file_channel(const struct tgsi_exec_machine *mach,
1012 const uint file,
1013 const uint swizzle,
1014 const union tgsi_exec_channel *index,
1015 const union tgsi_exec_channel *index2D,
1016 union tgsi_exec_channel *chan)
1017 {
1018 uint i;
1019
1020 switch (file) {
1021 case TGSI_FILE_CONSTANT:
1022 for (i = 0; i < QUAD_SIZE; i++) {
1023 assert(index2D->i[i] >= 0 && index2D->i[i] < PIPE_MAX_CONSTANT_BUFFERS);
1024 assert(mach->Consts[index2D->i[i]]);
1025
1026 if (index->i[i] < 0) {
1027 chan->u[i] = 0;
1028 } else {
1029 const uint *p = (const uint *)mach->Consts[index2D->i[i]];
1030
1031 chan->u[i] = p[index->i[i] * 4 + swizzle];
1032 }
1033 }
1034 break;
1035
1036 case TGSI_FILE_INPUT:
1037 case TGSI_FILE_SYSTEM_VALUE:
1038 for (i = 0; i < QUAD_SIZE; i++) {
1039 /* XXX: 2D indexing */
1040 chan->u[i] = mach->Inputs[index2D->i[i] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index->i[i]].xyzw[swizzle].u[i];
1041 }
1042 break;
1043
1044 case TGSI_FILE_TEMPORARY:
1045 for (i = 0; i < QUAD_SIZE; i++) {
1046 assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
1047 assert(index2D->i[i] == 0);
1048
1049 chan->u[i] = mach->Temps[index->i[i]].xyzw[swizzle].u[i];
1050 }
1051 break;
1052
1053 case TGSI_FILE_IMMEDIATE:
1054 for (i = 0; i < QUAD_SIZE; i++) {
1055 assert(index->i[i] >= 0 && index->i[i] < (int)mach->ImmLimit);
1056 assert(index2D->i[i] == 0);
1057
1058 chan->f[i] = mach->Imms[index->i[i]][swizzle];
1059 }
1060 break;
1061
1062 case TGSI_FILE_ADDRESS:
1063 for (i = 0; i < QUAD_SIZE; i++) {
1064 assert(index->i[i] >= 0);
1065 assert(index2D->i[i] == 0);
1066
1067 chan->u[i] = mach->Addrs[index->i[i]].xyzw[swizzle].u[i];
1068 }
1069 break;
1070
1071 case TGSI_FILE_PREDICATE:
1072 for (i = 0; i < QUAD_SIZE; i++) {
1073 assert(index->i[i] >= 0 && index->i[i] < TGSI_EXEC_NUM_PREDS);
1074 assert(index2D->i[i] == 0);
1075
1076 chan->u[i] = mach->Predicates[0].xyzw[swizzle].u[i];
1077 }
1078 break;
1079
1080 case TGSI_FILE_OUTPUT:
1081 /* vertex/fragment output vars can be read too */
1082 for (i = 0; i < QUAD_SIZE; i++) {
1083 assert(index->i[i] >= 0);
1084 assert(index2D->i[i] == 0);
1085
1086 chan->u[i] = mach->Outputs[index->i[i]].xyzw[swizzle].u[i];
1087 }
1088 break;
1089
1090 default:
1091 assert(0);
1092 for (i = 0; i < QUAD_SIZE; i++) {
1093 chan->u[i] = 0;
1094 }
1095 }
1096 }
1097
1098 static void
1099 fetch_source(const struct tgsi_exec_machine *mach,
1100 union tgsi_exec_channel *chan,
1101 const struct tgsi_full_src_register *reg,
1102 const uint chan_index,
1103 enum tgsi_exec_datatype src_datatype)
1104 {
1105 union tgsi_exec_channel index;
1106 union tgsi_exec_channel index2D;
1107 uint swizzle;
1108
1109 /* We start with a direct index into a register file.
1110 *
1111 * file[1],
1112 * where:
1113 * file = Register.File
1114 * [1] = Register.Index
1115 */
1116 index.i[0] =
1117 index.i[1] =
1118 index.i[2] =
1119 index.i[3] = reg->Register.Index;
1120
1121 /* There is an extra source register that indirectly subscripts
1122 * a register file. The direct index now becomes an offset
1123 * that is being added to the indirect register.
1124 *
1125 * file[ind[2].x+1],
1126 * where:
1127 * ind = Indirect.File
1128 * [2] = Indirect.Index
1129 * .x = Indirect.SwizzleX
1130 */
1131 if (reg->Register.Indirect) {
1132 union tgsi_exec_channel index2;
1133 union tgsi_exec_channel indir_index;
1134 const uint execmask = mach->ExecMask;
1135 uint i;
1136
1137 /* which address register (always zero now) */
1138 index2.i[0] =
1139 index2.i[1] =
1140 index2.i[2] =
1141 index2.i[3] = reg->Indirect.Index;
1142
1143 /* get current value of address register[swizzle] */
1144 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1145 fetch_src_file_channel(mach,
1146 reg->Indirect.File,
1147 swizzle,
1148 &index2,
1149 &ZeroVec,
1150 &indir_index);
1151
1152 /* add value of address register to the offset */
1153 index.i[0] += indir_index.i[0];
1154 index.i[1] += indir_index.i[1];
1155 index.i[2] += indir_index.i[2];
1156 index.i[3] += indir_index.i[3];
1157
1158 /* for disabled execution channels, zero-out the index to
1159 * avoid using a potential garbage value.
1160 */
1161 for (i = 0; i < QUAD_SIZE; i++) {
1162 if ((execmask & (1 << i)) == 0)
1163 index.i[i] = 0;
1164 }
1165 }
1166
1167 /* There is an extra source register that is a second
1168 * subscript to a register file. Effectively it means that
1169 * the register file is actually a 2D array of registers.
1170 *
1171 * file[3][1],
1172 * where:
1173 * [3] = Dimension.Index
1174 */
1175 if (reg->Register.Dimension) {
1176 index2D.i[0] =
1177 index2D.i[1] =
1178 index2D.i[2] =
1179 index2D.i[3] = reg->Dimension.Index;
1180
1181 /* Again, the second subscript index can be addressed indirectly
1182 * identically to the first one.
1183 * Nothing stops us from indirectly addressing the indirect register,
1184 * but there is no need for that, so we won't exercise it.
1185 *
1186 * file[ind[4].y+3][1],
1187 * where:
1188 * ind = DimIndirect.File
1189 * [4] = DimIndirect.Index
1190 * .y = DimIndirect.SwizzleX
1191 */
1192 if (reg->Dimension.Indirect) {
1193 union tgsi_exec_channel index2;
1194 union tgsi_exec_channel indir_index;
1195 const uint execmask = mach->ExecMask;
1196 uint i;
1197
1198 index2.i[0] =
1199 index2.i[1] =
1200 index2.i[2] =
1201 index2.i[3] = reg->DimIndirect.Index;
1202
1203 swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
1204 fetch_src_file_channel(mach,
1205 reg->DimIndirect.File,
1206 swizzle,
1207 &index2,
1208 &ZeroVec,
1209 &indir_index);
1210
1211 index2D.i[0] += indir_index.i[0];
1212 index2D.i[1] += indir_index.i[1];
1213 index2D.i[2] += indir_index.i[2];
1214 index2D.i[3] += indir_index.i[3];
1215
1216 /* for disabled execution channels, zero-out the index to
1217 * avoid using a potential garbage value.
1218 */
1219 for (i = 0; i < QUAD_SIZE; i++) {
1220 if ((execmask & (1 << i)) == 0) {
1221 index2D.i[i] = 0;
1222 }
1223 }
1224 }
1225
1226 /* If by any chance there was a need for a 3D array of register
1227 * files, we would have to check whether Dimension is followed
1228 * by a dimension register and continue the saga.
1229 */
1230 } else {
1231 index2D.i[0] =
1232 index2D.i[1] =
1233 index2D.i[2] =
1234 index2D.i[3] = 0;
1235 }
1236
1237 swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
1238 fetch_src_file_channel(mach,
1239 reg->Register.File,
1240 swizzle,
1241 &index,
1242 &index2D,
1243 chan);
1244
1245 if (reg->Register.Absolute) {
1246 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1247 micro_abs(chan, chan);
1248 } else {
1249 micro_iabs(chan, chan);
1250 }
1251 }
1252
1253 if (reg->Register.Negate) {
1254 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1255 micro_neg(chan, chan);
1256 } else {
1257 micro_ineg(chan, chan);
1258 }
1259 }
1260 }
1261
1262 static void
1263 store_dest(struct tgsi_exec_machine *mach,
1264 const union tgsi_exec_channel *chan,
1265 const struct tgsi_full_dst_register *reg,
1266 const struct tgsi_full_instruction *inst,
1267 uint chan_index,
1268 enum tgsi_exec_datatype dst_datatype)
1269 {
1270 uint i;
1271 union tgsi_exec_channel null;
1272 union tgsi_exec_channel *dst;
1273 uint execmask = mach->ExecMask;
1274 int offset = 0; /* indirection offset */
1275 int index;
1276
1277 /* for debugging */
1278 if (0 && dst_datatype == TGSI_EXEC_DATA_FLOAT) {
1279 check_inf_or_nan(chan);
1280 }
1281
1282 /* There is an extra source register that indirectly subscripts
1283 * a register file. The direct index now becomes an offset
1284 * that is being added to the indirect register.
1285 *
1286 * file[ind[2].x+1],
1287 * where:
1288 * ind = Indirect.File
1289 * [2] = Indirect.Index
1290 * .x = Indirect.SwizzleX
1291 */
1292 if (reg->Register.Indirect) {
1293 union tgsi_exec_channel index;
1294 union tgsi_exec_channel indir_index;
1295 uint swizzle;
1296
1297 /* which address register (always zero for now) */
1298 index.i[0] =
1299 index.i[1] =
1300 index.i[2] =
1301 index.i[3] = reg->Indirect.Index;
1302
1303 /* get current value of address register[swizzle] */
1304 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1305
1306 /* fetch values from the address/indirection register */
1307 fetch_src_file_channel(mach,
1308 reg->Indirect.File,
1309 swizzle,
1310 &index,
1311 &ZeroVec,
1312 &indir_index);
1313
1314 /* save indirection offset */
1315 offset = indir_index.i[0];
1316 }
1317
1318 switch (reg->Register.File) {
1319 case TGSI_FILE_NULL:
1320 dst = &null;
1321 break;
1322
1323 case TGSI_FILE_OUTPUT:
1324 index = mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
1325 + reg->Register.Index;
1326 dst = &mach->Outputs[offset + index].xyzw[chan_index];
1327 #if 0
1328 if (TGSI_PROCESSOR_GEOMETRY == mach->Processor) {
1329 fprintf(stderr, "STORING OUT[%d] mask(%d), = (", offset + index, execmask);
1330 for (i = 0; i < QUAD_SIZE; i++)
1331 if (execmask & (1 << i))
1332 fprintf(stderr, "%f, ", chan->f[i]);
1333 fprintf(stderr, ")\n");
1334 }
1335 #endif
1336 break;
1337
1338 case TGSI_FILE_TEMPORARY:
1339 index = reg->Register.Index;
1340 assert( index < TGSI_EXEC_NUM_TEMPS );
1341 dst = &mach->Temps[offset + index].xyzw[chan_index];
1342 break;
1343
1344 case TGSI_FILE_ADDRESS:
1345 index = reg->Register.Index;
1346 dst = &mach->Addrs[index].xyzw[chan_index];
1347 break;
1348
1349 case TGSI_FILE_LOOP:
1350 assert(reg->Register.Index == 0);
1351 assert(mach->LoopCounterStackTop > 0);
1352 assert(chan_index == CHAN_X);
1353 dst = &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[chan_index];
1354 break;
1355
1356 case TGSI_FILE_PREDICATE:
1357 index = reg->Register.Index;
1358 assert(index < TGSI_EXEC_NUM_PREDS);
1359 dst = &mach->Predicates[index].xyzw[chan_index];
1360 break;
1361
1362 default:
1363 assert( 0 );
1364 return;
1365 }
1366
1367 if (inst->Instruction.Predicate) {
1368 uint swizzle;
1369 union tgsi_exec_channel *pred;
1370
1371 switch (chan_index) {
1372 case CHAN_X:
1373 swizzle = inst->Predicate.SwizzleX;
1374 break;
1375 case CHAN_Y:
1376 swizzle = inst->Predicate.SwizzleY;
1377 break;
1378 case CHAN_Z:
1379 swizzle = inst->Predicate.SwizzleZ;
1380 break;
1381 case CHAN_W:
1382 swizzle = inst->Predicate.SwizzleW;
1383 break;
1384 default:
1385 assert(0);
1386 return;
1387 }
1388
1389 assert(inst->Predicate.Index == 0);
1390
1391 pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
1392
1393 if (inst->Predicate.Negate) {
1394 for (i = 0; i < QUAD_SIZE; i++) {
1395 if (pred->u[i]) {
1396 execmask &= ~(1 << i);
1397 }
1398 }
1399 } else {
1400 for (i = 0; i < QUAD_SIZE; i++) {
1401 if (!pred->u[i]) {
1402 execmask &= ~(1 << i);
1403 }
1404 }
1405 }
1406 }
1407
1408 switch (inst->Instruction.Saturate) {
1409 case TGSI_SAT_NONE:
1410 for (i = 0; i < QUAD_SIZE; i++)
1411 if (execmask & (1 << i))
1412 dst->i[i] = chan->i[i];
1413 break;
1414
1415 case TGSI_SAT_ZERO_ONE:
1416 for (i = 0; i < QUAD_SIZE; i++)
1417 if (execmask & (1 << i)) {
1418 if (chan->f[i] < 0.0f)
1419 dst->f[i] = 0.0f;
1420 else if (chan->f[i] > 1.0f)
1421 dst->f[i] = 1.0f;
1422 else
1423 dst->i[i] = chan->i[i];
1424 }
1425 break;
1426
1427 case TGSI_SAT_MINUS_PLUS_ONE:
1428 for (i = 0; i < QUAD_SIZE; i++)
1429 if (execmask & (1 << i)) {
1430 if (chan->f[i] < -1.0f)
1431 dst->f[i] = -1.0f;
1432 else if (chan->f[i] > 1.0f)
1433 dst->f[i] = 1.0f;
1434 else
1435 dst->i[i] = chan->i[i];
1436 }
1437 break;
1438
1439 default:
1440 assert( 0 );
1441 }
1442 }
1443
1444 #define FETCH(VAL,INDEX,CHAN)\
1445 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1446
1447 #define STORE(VAL,INDEX,CHAN)\
1448 store_dest(mach, VAL, &inst->Dst[INDEX], inst, CHAN, TGSI_EXEC_DATA_FLOAT)
1449
1450
1451 /**
1452 * Execute ARB-style KIL which is predicated by a src register.
1453 * Kill fragment if any of the four values is less than zero.
1454 */
1455 static void
1456 exec_kil(struct tgsi_exec_machine *mach,
1457 const struct tgsi_full_instruction *inst)
1458 {
1459 uint uniquemask;
1460 uint chan_index;
1461 uint kilmask = 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1462 union tgsi_exec_channel r[1];
1463
1464 /* This mask stores component bits that were already tested. */
1465 uniquemask = 0;
1466
1467 for (chan_index = 0; chan_index < 4; chan_index++)
1468 {
1469 uint swizzle;
1470 uint i;
1471
1472 /* unswizzle channel */
1473 swizzle = tgsi_util_get_full_src_register_swizzle (
1474 &inst->Src[0],
1475 chan_index);
1476
1477 /* check if the component has not been already tested */
1478 if (uniquemask & (1 << swizzle))
1479 continue;
1480 uniquemask |= 1 << swizzle;
1481
1482 FETCH(&r[0], 0, chan_index);
1483 for (i = 0; i < 4; i++)
1484 if (r[0].f[i] < 0.0f)
1485 kilmask |= 1 << i;
1486 }
1487
1488 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1489 }
1490
1491 /**
1492 * Execute NVIDIA-style KIL which is predicated by a condition code.
1493 * Kill fragment if the condition code is TRUE.
1494 */
1495 static void
1496 exec_kilp(struct tgsi_exec_machine *mach,
1497 const struct tgsi_full_instruction *inst)
1498 {
1499 uint kilmask; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1500
1501 /* "unconditional" kil */
1502 kilmask = mach->ExecMask;
1503 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1504 }
1505
1506 static void
1507 emit_vertex(struct tgsi_exec_machine *mach)
1508 {
1509 /* FIXME: check for exec mask correctly
1510 unsigned i;
1511 for (i = 0; i < QUAD_SIZE; ++i) {
1512 if ((mach->ExecMask & (1 << i)))
1513 */
1514 if (mach->ExecMask) {
1515 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] += mach->NumOutputs;
1516 mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]]++;
1517 }
1518 }
1519
1520 static void
1521 emit_primitive(struct tgsi_exec_machine *mach)
1522 {
1523 unsigned *prim_count = &mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0];
1524 /* FIXME: check for exec mask correctly
1525 unsigned i;
1526 for (i = 0; i < QUAD_SIZE; ++i) {
1527 if ((mach->ExecMask & (1 << i)))
1528 */
1529 if (mach->ExecMask) {
1530 ++(*prim_count);
1531 debug_assert((*prim_count * mach->NumOutputs) < mach->MaxGeometryShaderOutputs);
1532 mach->Primitives[*prim_count] = 0;
1533 }
1534 }
1535
1536 /*
1537 * Fetch four texture samples using STR texture coordinates.
1538 */
1539 static void
1540 fetch_texel( struct tgsi_sampler *sampler,
1541 const union tgsi_exec_channel *s,
1542 const union tgsi_exec_channel *t,
1543 const union tgsi_exec_channel *p,
1544 const union tgsi_exec_channel *c0,
1545 enum tgsi_sampler_control control,
1546 union tgsi_exec_channel *r,
1547 union tgsi_exec_channel *g,
1548 union tgsi_exec_channel *b,
1549 union tgsi_exec_channel *a )
1550 {
1551 uint j;
1552 float rgba[NUM_CHANNELS][QUAD_SIZE];
1553
1554 sampler->get_samples(sampler, s->f, t->f, p->f, c0->f, control, rgba);
1555
1556 for (j = 0; j < 4; j++) {
1557 r->f[j] = rgba[0][j];
1558 g->f[j] = rgba[1][j];
1559 b->f[j] = rgba[2][j];
1560 a->f[j] = rgba[3][j];
1561 }
1562 }
1563
1564
1565 #define TEX_MODIFIER_NONE 0
1566 #define TEX_MODIFIER_PROJECTED 1
1567 #define TEX_MODIFIER_LOD_BIAS 2
1568 #define TEX_MODIFIER_EXPLICIT_LOD 3
1569
1570
1571 static void
1572 exec_tex(struct tgsi_exec_machine *mach,
1573 const struct tgsi_full_instruction *inst,
1574 uint modifier)
1575 {
1576 const uint unit = inst->Src[1].Register.Index;
1577 union tgsi_exec_channel r[4];
1578 const union tgsi_exec_channel *lod = &ZeroVec;
1579 enum tgsi_sampler_control control;
1580 uint chan_index;
1581
1582 if (modifier != TEX_MODIFIER_NONE) {
1583 FETCH(&r[3], 0, CHAN_W);
1584 if (modifier != TEX_MODIFIER_PROJECTED) {
1585 lod = &r[3];
1586 }
1587 }
1588
1589 if (modifier == TEX_MODIFIER_EXPLICIT_LOD) {
1590 control = tgsi_sampler_lod_explicit;
1591 } else {
1592 control = tgsi_sampler_lod_bias;
1593 }
1594
1595 switch (inst->Texture.Texture) {
1596 case TGSI_TEXTURE_1D:
1597 case TGSI_TEXTURE_SHADOW1D:
1598 FETCH(&r[0], 0, CHAN_X);
1599
1600 if (modifier == TEX_MODIFIER_PROJECTED) {
1601 micro_div(&r[0], &r[0], &r[3]);
1602 }
1603
1604 fetch_texel(mach->Samplers[unit],
1605 &r[0], &ZeroVec, &ZeroVec, lod, /* S, T, P, LOD */
1606 control,
1607 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1608 break;
1609
1610 case TGSI_TEXTURE_2D:
1611 case TGSI_TEXTURE_RECT:
1612 case TGSI_TEXTURE_SHADOW2D:
1613 case TGSI_TEXTURE_SHADOWRECT:
1614 FETCH(&r[0], 0, CHAN_X);
1615 FETCH(&r[1], 0, CHAN_Y);
1616 FETCH(&r[2], 0, CHAN_Z);
1617
1618 if (modifier == TEX_MODIFIER_PROJECTED) {
1619 micro_div(&r[0], &r[0], &r[3]);
1620 micro_div(&r[1], &r[1], &r[3]);
1621 micro_div(&r[2], &r[2], &r[3]);
1622 }
1623
1624 fetch_texel(mach->Samplers[unit],
1625 &r[0], &r[1], &r[2], lod, /* S, T, P, LOD */
1626 control,
1627 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1628 break;
1629
1630 case TGSI_TEXTURE_3D:
1631 case TGSI_TEXTURE_CUBE:
1632 FETCH(&r[0], 0, CHAN_X);
1633 FETCH(&r[1], 0, CHAN_Y);
1634 FETCH(&r[2], 0, CHAN_Z);
1635
1636 if (modifier == TEX_MODIFIER_PROJECTED) {
1637 micro_div(&r[0], &r[0], &r[3]);
1638 micro_div(&r[1], &r[1], &r[3]);
1639 micro_div(&r[2], &r[2], &r[3]);
1640 }
1641
1642 fetch_texel(mach->Samplers[unit],
1643 &r[0], &r[1], &r[2], lod,
1644 control,
1645 &r[0], &r[1], &r[2], &r[3]);
1646 break;
1647
1648 default:
1649 assert(0);
1650 }
1651
1652 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1653 STORE(&r[chan_index], 0, chan_index);
1654 }
1655 }
1656
1657 static void
1658 exec_txd(struct tgsi_exec_machine *mach,
1659 const struct tgsi_full_instruction *inst)
1660 {
1661 const uint unit = inst->Src[3].Register.Index;
1662 union tgsi_exec_channel r[4];
1663 uint chan_index;
1664
1665 /*
1666 * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
1667 */
1668
1669 switch (inst->Texture.Texture) {
1670 case TGSI_TEXTURE_1D:
1671 case TGSI_TEXTURE_SHADOW1D:
1672
1673 FETCH(&r[0], 0, CHAN_X);
1674
1675 fetch_texel(mach->Samplers[unit],
1676 &r[0], &ZeroVec, &ZeroVec, &ZeroVec, /* S, T, P, BIAS */
1677 tgsi_sampler_lod_bias,
1678 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1679 break;
1680
1681 case TGSI_TEXTURE_2D:
1682 case TGSI_TEXTURE_RECT:
1683 case TGSI_TEXTURE_SHADOW2D:
1684 case TGSI_TEXTURE_SHADOWRECT:
1685
1686 FETCH(&r[0], 0, CHAN_X);
1687 FETCH(&r[1], 0, CHAN_Y);
1688 FETCH(&r[2], 0, CHAN_Z);
1689
1690 fetch_texel(mach->Samplers[unit],
1691 &r[0], &r[1], &r[2], &ZeroVec, /* inputs */
1692 tgsi_sampler_lod_bias,
1693 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1694 break;
1695
1696 case TGSI_TEXTURE_3D:
1697 case TGSI_TEXTURE_CUBE:
1698
1699 FETCH(&r[0], 0, CHAN_X);
1700 FETCH(&r[1], 0, CHAN_Y);
1701 FETCH(&r[2], 0, CHAN_Z);
1702
1703 fetch_texel(mach->Samplers[unit],
1704 &r[0], &r[1], &r[2], &ZeroVec,
1705 tgsi_sampler_lod_bias,
1706 &r[0], &r[1], &r[2], &r[3]);
1707 break;
1708
1709 default:
1710 assert(0);
1711 }
1712
1713 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1714 STORE(&r[chan_index], 0, chan_index);
1715 }
1716 }
1717
1718
1719 /**
1720 * Evaluate a constant-valued coefficient at the position of the
1721 * current quad.
1722 */
1723 static void
1724 eval_constant_coef(
1725 struct tgsi_exec_machine *mach,
1726 unsigned attrib,
1727 unsigned chan )
1728 {
1729 unsigned i;
1730
1731 for( i = 0; i < QUAD_SIZE; i++ ) {
1732 mach->Inputs[attrib].xyzw[chan].f[i] = mach->InterpCoefs[attrib].a0[chan];
1733 }
1734 }
1735
1736 /**
1737 * Evaluate a linear-valued coefficient at the position of the
1738 * current quad.
1739 */
1740 static void
1741 eval_linear_coef(
1742 struct tgsi_exec_machine *mach,
1743 unsigned attrib,
1744 unsigned chan )
1745 {
1746 const float x = mach->QuadPos.xyzw[0].f[0];
1747 const float y = mach->QuadPos.xyzw[1].f[0];
1748 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1749 const float dady = mach->InterpCoefs[attrib].dady[chan];
1750 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1751 mach->Inputs[attrib].xyzw[chan].f[0] = a0;
1752 mach->Inputs[attrib].xyzw[chan].f[1] = a0 + dadx;
1753 mach->Inputs[attrib].xyzw[chan].f[2] = a0 + dady;
1754 mach->Inputs[attrib].xyzw[chan].f[3] = a0 + dadx + dady;
1755 }
1756
1757 /**
1758 * Evaluate a perspective-valued coefficient at the position of the
1759 * current quad.
1760 */
1761 static void
1762 eval_perspective_coef(
1763 struct tgsi_exec_machine *mach,
1764 unsigned attrib,
1765 unsigned chan )
1766 {
1767 const float x = mach->QuadPos.xyzw[0].f[0];
1768 const float y = mach->QuadPos.xyzw[1].f[0];
1769 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1770 const float dady = mach->InterpCoefs[attrib].dady[chan];
1771 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1772 const float *w = mach->QuadPos.xyzw[3].f;
1773 /* divide by W here */
1774 mach->Inputs[attrib].xyzw[chan].f[0] = a0 / w[0];
1775 mach->Inputs[attrib].xyzw[chan].f[1] = (a0 + dadx) / w[1];
1776 mach->Inputs[attrib].xyzw[chan].f[2] = (a0 + dady) / w[2];
1777 mach->Inputs[attrib].xyzw[chan].f[3] = (a0 + dadx + dady) / w[3];
1778 }
1779
1780
1781 typedef void (* eval_coef_func)(
1782 struct tgsi_exec_machine *mach,
1783 unsigned attrib,
1784 unsigned chan );
1785
1786 static void
1787 exec_declaration(struct tgsi_exec_machine *mach,
1788 const struct tgsi_full_declaration *decl)
1789 {
1790 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
1791 if (decl->Declaration.File == TGSI_FILE_INPUT ||
1792 decl->Declaration.File == TGSI_FILE_SYSTEM_VALUE) {
1793 uint first, last, mask;
1794
1795 first = decl->Range.First;
1796 last = decl->Range.Last;
1797 mask = decl->Declaration.UsageMask;
1798
1799 /* XXX we could remove this special-case code since
1800 * mach->InterpCoefs[first].a0 should already have the
1801 * front/back-face value. But we should first update the
1802 * ureg code to emit the right UsageMask value (WRITEMASK_X).
1803 * Then, we could remove the tgsi_exec_machine::Face field.
1804 */
1805 if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
1806 uint i;
1807
1808 assert(decl->Semantic.Index == 0);
1809 assert(first == last);
1810
1811 for (i = 0; i < QUAD_SIZE; i++) {
1812 mach->Inputs[first].xyzw[0].f[i] = mach->Face;
1813 }
1814 } else {
1815 eval_coef_func eval;
1816 uint i, j;
1817
1818 switch (decl->Declaration.Interpolate) {
1819 case TGSI_INTERPOLATE_CONSTANT:
1820 eval = eval_constant_coef;
1821 break;
1822
1823 case TGSI_INTERPOLATE_LINEAR:
1824 eval = eval_linear_coef;
1825 break;
1826
1827 case TGSI_INTERPOLATE_PERSPECTIVE:
1828 eval = eval_perspective_coef;
1829 break;
1830
1831 default:
1832 assert(0);
1833 return;
1834 }
1835
1836 for (j = 0; j < NUM_CHANNELS; j++) {
1837 if (mask & (1 << j)) {
1838 for (i = first; i <= last; i++) {
1839 eval(mach, i, j);
1840 }
1841 }
1842 }
1843 }
1844 }
1845 }
1846 }
1847
1848 typedef void (* micro_unary_op)(union tgsi_exec_channel *dst,
1849 const union tgsi_exec_channel *src);
1850
1851 static void
1852 exec_scalar_unary(struct tgsi_exec_machine *mach,
1853 const struct tgsi_full_instruction *inst,
1854 micro_unary_op op,
1855 enum tgsi_exec_datatype dst_datatype,
1856 enum tgsi_exec_datatype src_datatype)
1857 {
1858 unsigned int chan;
1859 union tgsi_exec_channel src;
1860 union tgsi_exec_channel dst;
1861
1862 fetch_source(mach, &src, &inst->Src[0], CHAN_X, src_datatype);
1863 op(&dst, &src);
1864 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1865 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1866 store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
1867 }
1868 }
1869 }
1870
1871 static void
1872 exec_vector_unary(struct tgsi_exec_machine *mach,
1873 const struct tgsi_full_instruction *inst,
1874 micro_unary_op op,
1875 enum tgsi_exec_datatype dst_datatype,
1876 enum tgsi_exec_datatype src_datatype)
1877 {
1878 unsigned int chan;
1879 struct tgsi_exec_vector dst;
1880
1881 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1882 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1883 union tgsi_exec_channel src;
1884
1885 fetch_source(mach, &src, &inst->Src[0], chan, src_datatype);
1886 op(&dst.xyzw[chan], &src);
1887 }
1888 }
1889 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1890 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1891 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1892 }
1893 }
1894 }
1895
1896 typedef void (* micro_binary_op)(union tgsi_exec_channel *dst,
1897 const union tgsi_exec_channel *src0,
1898 const union tgsi_exec_channel *src1);
1899
1900 static void
1901 exec_vector_binary(struct tgsi_exec_machine *mach,
1902 const struct tgsi_full_instruction *inst,
1903 micro_binary_op op,
1904 enum tgsi_exec_datatype dst_datatype,
1905 enum tgsi_exec_datatype src_datatype)
1906 {
1907 unsigned int chan;
1908 struct tgsi_exec_vector dst;
1909
1910 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1911 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1912 union tgsi_exec_channel src[2];
1913
1914 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1915 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1916 op(&dst.xyzw[chan], &src[0], &src[1]);
1917 }
1918 }
1919 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1920 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1921 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1922 }
1923 }
1924 }
1925
1926 typedef void (* micro_trinary_op)(union tgsi_exec_channel *dst,
1927 const union tgsi_exec_channel *src0,
1928 const union tgsi_exec_channel *src1,
1929 const union tgsi_exec_channel *src2);
1930
1931 static void
1932 exec_vector_trinary(struct tgsi_exec_machine *mach,
1933 const struct tgsi_full_instruction *inst,
1934 micro_trinary_op op,
1935 enum tgsi_exec_datatype dst_datatype,
1936 enum tgsi_exec_datatype src_datatype)
1937 {
1938 unsigned int chan;
1939 struct tgsi_exec_vector dst;
1940
1941 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1942 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1943 union tgsi_exec_channel src[3];
1944
1945 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1946 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1947 fetch_source(mach, &src[2], &inst->Src[2], chan, src_datatype);
1948 op(&dst.xyzw[chan], &src[0], &src[1], &src[2]);
1949 }
1950 }
1951 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1952 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1953 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1954 }
1955 }
1956 }
1957
1958 static void
1959 exec_dp3(struct tgsi_exec_machine *mach,
1960 const struct tgsi_full_instruction *inst)
1961 {
1962 unsigned int chan;
1963 union tgsi_exec_channel arg[3];
1964
1965 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1966 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1967 micro_mul(&arg[2], &arg[0], &arg[1]);
1968
1969 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
1970 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1971 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1972 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
1973 }
1974
1975 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1976 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1977 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
1978 }
1979 }
1980 }
1981
1982 static void
1983 exec_dp4(struct tgsi_exec_machine *mach,
1984 const struct tgsi_full_instruction *inst)
1985 {
1986 unsigned int chan;
1987 union tgsi_exec_channel arg[3];
1988
1989 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1990 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1991 micro_mul(&arg[2], &arg[0], &arg[1]);
1992
1993 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
1994 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1995 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1996 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
1997 }
1998
1999 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2000 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2001 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2002 }
2003 }
2004 }
2005
2006 static void
2007 exec_dp2a(struct tgsi_exec_machine *mach,
2008 const struct tgsi_full_instruction *inst)
2009 {
2010 unsigned int chan;
2011 union tgsi_exec_channel arg[3];
2012
2013 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2014 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2015 micro_mul(&arg[2], &arg[0], &arg[1]);
2016
2017 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2018 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2019 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
2020
2021 fetch_source(mach, &arg[1], &inst->Src[2], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2022 micro_add(&arg[0], &arg[0], &arg[1]);
2023
2024 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2025 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2026 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2027 }
2028 }
2029 }
2030
2031 static void
2032 exec_dph(struct tgsi_exec_machine *mach,
2033 const struct tgsi_full_instruction *inst)
2034 {
2035 unsigned int chan;
2036 union tgsi_exec_channel arg[3];
2037
2038 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2039 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2040 micro_mul(&arg[2], &arg[0], &arg[1]);
2041
2042 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2043 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2044 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2045
2046 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2047 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2048 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
2049
2050 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_W, TGSI_EXEC_DATA_FLOAT);
2051 micro_add(&arg[0], &arg[0], &arg[1]);
2052
2053 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2054 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2055 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2056 }
2057 }
2058 }
2059
2060 static void
2061 exec_dp2(struct tgsi_exec_machine *mach,
2062 const struct tgsi_full_instruction *inst)
2063 {
2064 unsigned int chan;
2065 union tgsi_exec_channel arg[3];
2066
2067 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2068 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2069 micro_mul(&arg[2], &arg[0], &arg[1]);
2070
2071 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2072 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2073 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2074
2075 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2076 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2077 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2078 }
2079 }
2080 }
2081
2082 static void
2083 exec_nrm4(struct tgsi_exec_machine *mach,
2084 const struct tgsi_full_instruction *inst)
2085 {
2086 unsigned int chan;
2087 union tgsi_exec_channel arg[4];
2088 union tgsi_exec_channel scale;
2089
2090 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2091 micro_mul(&scale, &arg[0], &arg[0]);
2092
2093 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
2094 union tgsi_exec_channel product;
2095
2096 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2097 micro_mul(&product, &arg[chan], &arg[chan]);
2098 micro_add(&scale, &scale, &product);
2099 }
2100
2101 micro_rsq(&scale, &scale);
2102
2103 for (chan = CHAN_X; chan <= CHAN_W; chan++) {
2104 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2105 micro_mul(&arg[chan], &arg[chan], &scale);
2106 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2107 }
2108 }
2109 }
2110
2111 static void
2112 exec_nrm3(struct tgsi_exec_machine *mach,
2113 const struct tgsi_full_instruction *inst)
2114 {
2115 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {
2116 unsigned int chan;
2117 union tgsi_exec_channel arg[3];
2118 union tgsi_exec_channel scale;
2119
2120 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2121 micro_mul(&scale, &arg[0], &arg[0]);
2122
2123 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
2124 union tgsi_exec_channel product;
2125
2126 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2127 micro_mul(&product, &arg[chan], &arg[chan]);
2128 micro_add(&scale, &scale, &product);
2129 }
2130
2131 micro_rsq(&scale, &scale);
2132
2133 for (chan = CHAN_X; chan <= CHAN_Z; chan++) {
2134 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2135 micro_mul(&arg[chan], &arg[chan], &scale);
2136 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2137 }
2138 }
2139 }
2140
2141 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
2142 store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
2143 }
2144 }
2145
2146 static void
2147 exec_break(struct tgsi_exec_machine *mach)
2148 {
2149 if (mach->BreakType == TGSI_EXEC_BREAK_INSIDE_LOOP) {
2150 /* turn off loop channels for each enabled exec channel */
2151 mach->LoopMask &= ~mach->ExecMask;
2152 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2153 UPDATE_EXEC_MASK(mach);
2154 } else {
2155 assert(mach->BreakType == TGSI_EXEC_BREAK_INSIDE_SWITCH);
2156
2157 mach->Switch.mask = 0x0;
2158
2159 UPDATE_EXEC_MASK(mach);
2160 }
2161 }
2162
2163 static void
2164 exec_switch(struct tgsi_exec_machine *mach,
2165 const struct tgsi_full_instruction *inst)
2166 {
2167 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
2168 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
2169
2170 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
2171 fetch_source(mach, &mach->Switch.selector, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2172 mach->Switch.mask = 0x0;
2173 mach->Switch.defaultMask = 0x0;
2174
2175 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
2176 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_SWITCH;
2177
2178 UPDATE_EXEC_MASK(mach);
2179 }
2180
2181 static void
2182 exec_case(struct tgsi_exec_machine *mach,
2183 const struct tgsi_full_instruction *inst)
2184 {
2185 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2186 union tgsi_exec_channel src;
2187 uint mask = 0;
2188
2189 fetch_source(mach, &src, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2190
2191 if (mach->Switch.selector.u[0] == src.u[0]) {
2192 mask |= 0x1;
2193 }
2194 if (mach->Switch.selector.u[1] == src.u[1]) {
2195 mask |= 0x2;
2196 }
2197 if (mach->Switch.selector.u[2] == src.u[2]) {
2198 mask |= 0x4;
2199 }
2200 if (mach->Switch.selector.u[3] == src.u[3]) {
2201 mask |= 0x8;
2202 }
2203
2204 mach->Switch.defaultMask |= mask;
2205
2206 mach->Switch.mask |= mask & prevMask;
2207
2208 UPDATE_EXEC_MASK(mach);
2209 }
2210
2211 static void
2212 exec_default(struct tgsi_exec_machine *mach)
2213 {
2214 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2215
2216 mach->Switch.mask |= ~mach->Switch.defaultMask & prevMask;
2217
2218 UPDATE_EXEC_MASK(mach);
2219 }
2220
2221 static void
2222 exec_endswitch(struct tgsi_exec_machine *mach)
2223 {
2224 mach->Switch = mach->SwitchStack[--mach->SwitchStackTop];
2225 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
2226
2227 UPDATE_EXEC_MASK(mach);
2228 }
2229
2230 static void
2231 micro_i2f(union tgsi_exec_channel *dst,
2232 const union tgsi_exec_channel *src)
2233 {
2234 dst->f[0] = (float)src->i[0];
2235 dst->f[1] = (float)src->i[1];
2236 dst->f[2] = (float)src->i[2];
2237 dst->f[3] = (float)src->i[3];
2238 }
2239
2240 static void
2241 micro_not(union tgsi_exec_channel *dst,
2242 const union tgsi_exec_channel *src)
2243 {
2244 dst->u[0] = ~src->u[0];
2245 dst->u[1] = ~src->u[1];
2246 dst->u[2] = ~src->u[2];
2247 dst->u[3] = ~src->u[3];
2248 }
2249
2250 static void
2251 micro_shl(union tgsi_exec_channel *dst,
2252 const union tgsi_exec_channel *src0,
2253 const union tgsi_exec_channel *src1)
2254 {
2255 dst->u[0] = src0->u[0] << src1->u[0];
2256 dst->u[1] = src0->u[1] << src1->u[1];
2257 dst->u[2] = src0->u[2] << src1->u[2];
2258 dst->u[3] = src0->u[3] << src1->u[3];
2259 }
2260
2261 static void
2262 micro_and(union tgsi_exec_channel *dst,
2263 const union tgsi_exec_channel *src0,
2264 const union tgsi_exec_channel *src1)
2265 {
2266 dst->u[0] = src0->u[0] & src1->u[0];
2267 dst->u[1] = src0->u[1] & src1->u[1];
2268 dst->u[2] = src0->u[2] & src1->u[2];
2269 dst->u[3] = src0->u[3] & src1->u[3];
2270 }
2271
2272 static void
2273 micro_or(union tgsi_exec_channel *dst,
2274 const union tgsi_exec_channel *src0,
2275 const union tgsi_exec_channel *src1)
2276 {
2277 dst->u[0] = src0->u[0] | src1->u[0];
2278 dst->u[1] = src0->u[1] | src1->u[1];
2279 dst->u[2] = src0->u[2] | src1->u[2];
2280 dst->u[3] = src0->u[3] | src1->u[3];
2281 }
2282
2283 static void
2284 micro_xor(union tgsi_exec_channel *dst,
2285 const union tgsi_exec_channel *src0,
2286 const union tgsi_exec_channel *src1)
2287 {
2288 dst->u[0] = src0->u[0] ^ src1->u[0];
2289 dst->u[1] = src0->u[1] ^ src1->u[1];
2290 dst->u[2] = src0->u[2] ^ src1->u[2];
2291 dst->u[3] = src0->u[3] ^ src1->u[3];
2292 }
2293
2294 static void
2295 micro_f2i(union tgsi_exec_channel *dst,
2296 const union tgsi_exec_channel *src)
2297 {
2298 dst->i[0] = (int)src->f[0];
2299 dst->i[1] = (int)src->f[1];
2300 dst->i[2] = (int)src->f[2];
2301 dst->i[3] = (int)src->f[3];
2302 }
2303
2304 static void
2305 micro_idiv(union tgsi_exec_channel *dst,
2306 const union tgsi_exec_channel *src0,
2307 const union tgsi_exec_channel *src1)
2308 {
2309 dst->i[0] = src0->i[0] / src1->i[0];
2310 dst->i[1] = src0->i[1] / src1->i[1];
2311 dst->i[2] = src0->i[2] / src1->i[2];
2312 dst->i[3] = src0->i[3] / src1->i[3];
2313 }
2314
2315 static void
2316 micro_imax(union tgsi_exec_channel *dst,
2317 const union tgsi_exec_channel *src0,
2318 const union tgsi_exec_channel *src1)
2319 {
2320 dst->i[0] = src0->i[0] > src1->i[0] ? src0->i[0] : src1->i[0];
2321 dst->i[1] = src0->i[1] > src1->i[1] ? src0->i[1] : src1->i[1];
2322 dst->i[2] = src0->i[2] > src1->i[2] ? src0->i[2] : src1->i[2];
2323 dst->i[3] = src0->i[3] > src1->i[3] ? src0->i[3] : src1->i[3];
2324 }
2325
2326 static void
2327 micro_imin(union tgsi_exec_channel *dst,
2328 const union tgsi_exec_channel *src0,
2329 const union tgsi_exec_channel *src1)
2330 {
2331 dst->i[0] = src0->i[0] < src1->i[0] ? src0->i[0] : src1->i[0];
2332 dst->i[1] = src0->i[1] < src1->i[1] ? src0->i[1] : src1->i[1];
2333 dst->i[2] = src0->i[2] < src1->i[2] ? src0->i[2] : src1->i[2];
2334 dst->i[3] = src0->i[3] < src1->i[3] ? src0->i[3] : src1->i[3];
2335 }
2336
2337 static void
2338 micro_isge(union tgsi_exec_channel *dst,
2339 const union tgsi_exec_channel *src0,
2340 const union tgsi_exec_channel *src1)
2341 {
2342 dst->i[0] = src0->i[0] >= src1->i[0] ? -1 : 0;
2343 dst->i[1] = src0->i[1] >= src1->i[1] ? -1 : 0;
2344 dst->i[2] = src0->i[2] >= src1->i[2] ? -1 : 0;
2345 dst->i[3] = src0->i[3] >= src1->i[3] ? -1 : 0;
2346 }
2347
2348 static void
2349 micro_ishr(union tgsi_exec_channel *dst,
2350 const union tgsi_exec_channel *src0,
2351 const union tgsi_exec_channel *src1)
2352 {
2353 dst->i[0] = src0->i[0] >> src1->i[0];
2354 dst->i[1] = src0->i[1] >> src1->i[1];
2355 dst->i[2] = src0->i[2] >> src1->i[2];
2356 dst->i[3] = src0->i[3] >> src1->i[3];
2357 }
2358
2359 static void
2360 micro_islt(union tgsi_exec_channel *dst,
2361 const union tgsi_exec_channel *src0,
2362 const union tgsi_exec_channel *src1)
2363 {
2364 dst->i[0] = src0->i[0] < src1->i[0] ? -1 : 0;
2365 dst->i[1] = src0->i[1] < src1->i[1] ? -1 : 0;
2366 dst->i[2] = src0->i[2] < src1->i[2] ? -1 : 0;
2367 dst->i[3] = src0->i[3] < src1->i[3] ? -1 : 0;
2368 }
2369
2370 static void
2371 micro_f2u(union tgsi_exec_channel *dst,
2372 const union tgsi_exec_channel *src)
2373 {
2374 dst->u[0] = (uint)src->f[0];
2375 dst->u[1] = (uint)src->f[1];
2376 dst->u[2] = (uint)src->f[2];
2377 dst->u[3] = (uint)src->f[3];
2378 }
2379
2380 static void
2381 micro_u2f(union tgsi_exec_channel *dst,
2382 const union tgsi_exec_channel *src)
2383 {
2384 dst->f[0] = (float)src->u[0];
2385 dst->f[1] = (float)src->u[1];
2386 dst->f[2] = (float)src->u[2];
2387 dst->f[3] = (float)src->u[3];
2388 }
2389
2390 static void
2391 micro_uadd(union tgsi_exec_channel *dst,
2392 const union tgsi_exec_channel *src0,
2393 const union tgsi_exec_channel *src1)
2394 {
2395 dst->u[0] = src0->u[0] + src1->u[0];
2396 dst->u[1] = src0->u[1] + src1->u[1];
2397 dst->u[2] = src0->u[2] + src1->u[2];
2398 dst->u[3] = src0->u[3] + src1->u[3];
2399 }
2400
2401 static void
2402 micro_udiv(union tgsi_exec_channel *dst,
2403 const union tgsi_exec_channel *src0,
2404 const union tgsi_exec_channel *src1)
2405 {
2406 dst->u[0] = src0->u[0] / src1->u[0];
2407 dst->u[1] = src0->u[1] / src1->u[1];
2408 dst->u[2] = src0->u[2] / src1->u[2];
2409 dst->u[3] = src0->u[3] / src1->u[3];
2410 }
2411
2412 static void
2413 micro_umad(union tgsi_exec_channel *dst,
2414 const union tgsi_exec_channel *src0,
2415 const union tgsi_exec_channel *src1,
2416 const union tgsi_exec_channel *src2)
2417 {
2418 dst->u[0] = src0->u[0] * src1->u[0] + src2->u[0];
2419 dst->u[1] = src0->u[1] * src1->u[1] + src2->u[1];
2420 dst->u[2] = src0->u[2] * src1->u[2] + src2->u[2];
2421 dst->u[3] = src0->u[3] * src1->u[3] + src2->u[3];
2422 }
2423
2424 static void
2425 micro_umax(union tgsi_exec_channel *dst,
2426 const union tgsi_exec_channel *src0,
2427 const union tgsi_exec_channel *src1)
2428 {
2429 dst->u[0] = src0->u[0] > src1->u[0] ? src0->u[0] : src1->u[0];
2430 dst->u[1] = src0->u[1] > src1->u[1] ? src0->u[1] : src1->u[1];
2431 dst->u[2] = src0->u[2] > src1->u[2] ? src0->u[2] : src1->u[2];
2432 dst->u[3] = src0->u[3] > src1->u[3] ? src0->u[3] : src1->u[3];
2433 }
2434
2435 static void
2436 micro_umin(union tgsi_exec_channel *dst,
2437 const union tgsi_exec_channel *src0,
2438 const union tgsi_exec_channel *src1)
2439 {
2440 dst->u[0] = src0->u[0] < src1->u[0] ? src0->u[0] : src1->u[0];
2441 dst->u[1] = src0->u[1] < src1->u[1] ? src0->u[1] : src1->u[1];
2442 dst->u[2] = src0->u[2] < src1->u[2] ? src0->u[2] : src1->u[2];
2443 dst->u[3] = src0->u[3] < src1->u[3] ? src0->u[3] : src1->u[3];
2444 }
2445
2446 static void
2447 micro_umod(union tgsi_exec_channel *dst,
2448 const union tgsi_exec_channel *src0,
2449 const union tgsi_exec_channel *src1)
2450 {
2451 dst->u[0] = src0->u[0] % src1->u[0];
2452 dst->u[1] = src0->u[1] % src1->u[1];
2453 dst->u[2] = src0->u[2] % src1->u[2];
2454 dst->u[3] = src0->u[3] % src1->u[3];
2455 }
2456
2457 static void
2458 micro_umul(union tgsi_exec_channel *dst,
2459 const union tgsi_exec_channel *src0,
2460 const union tgsi_exec_channel *src1)
2461 {
2462 dst->u[0] = src0->u[0] * src1->u[0];
2463 dst->u[1] = src0->u[1] * src1->u[1];
2464 dst->u[2] = src0->u[2] * src1->u[2];
2465 dst->u[3] = src0->u[3] * src1->u[3];
2466 }
2467
2468 static void
2469 micro_useq(union tgsi_exec_channel *dst,
2470 const union tgsi_exec_channel *src0,
2471 const union tgsi_exec_channel *src1)
2472 {
2473 dst->u[0] = src0->u[0] == src1->u[0] ? ~0 : 0;
2474 dst->u[1] = src0->u[1] == src1->u[1] ? ~0 : 0;
2475 dst->u[2] = src0->u[2] == src1->u[2] ? ~0 : 0;
2476 dst->u[3] = src0->u[3] == src1->u[3] ? ~0 : 0;
2477 }
2478
2479 static void
2480 micro_usge(union tgsi_exec_channel *dst,
2481 const union tgsi_exec_channel *src0,
2482 const union tgsi_exec_channel *src1)
2483 {
2484 dst->u[0] = src0->u[0] >= src1->u[0] ? ~0 : 0;
2485 dst->u[1] = src0->u[1] >= src1->u[1] ? ~0 : 0;
2486 dst->u[2] = src0->u[2] >= src1->u[2] ? ~0 : 0;
2487 dst->u[3] = src0->u[3] >= src1->u[3] ? ~0 : 0;
2488 }
2489
2490 static void
2491 micro_ushr(union tgsi_exec_channel *dst,
2492 const union tgsi_exec_channel *src0,
2493 const union tgsi_exec_channel *src1)
2494 {
2495 dst->u[0] = src0->u[0] >> src1->u[0];
2496 dst->u[1] = src0->u[1] >> src1->u[1];
2497 dst->u[2] = src0->u[2] >> src1->u[2];
2498 dst->u[3] = src0->u[3] >> src1->u[3];
2499 }
2500
2501 static void
2502 micro_uslt(union tgsi_exec_channel *dst,
2503 const union tgsi_exec_channel *src0,
2504 const union tgsi_exec_channel *src1)
2505 {
2506 dst->u[0] = src0->u[0] < src1->u[0] ? ~0 : 0;
2507 dst->u[1] = src0->u[1] < src1->u[1] ? ~0 : 0;
2508 dst->u[2] = src0->u[2] < src1->u[2] ? ~0 : 0;
2509 dst->u[3] = src0->u[3] < src1->u[3] ? ~0 : 0;
2510 }
2511
2512 static void
2513 micro_usne(union tgsi_exec_channel *dst,
2514 const union tgsi_exec_channel *src0,
2515 const union tgsi_exec_channel *src1)
2516 {
2517 dst->u[0] = src0->u[0] != src1->u[0] ? ~0 : 0;
2518 dst->u[1] = src0->u[1] != src1->u[1] ? ~0 : 0;
2519 dst->u[2] = src0->u[2] != src1->u[2] ? ~0 : 0;
2520 dst->u[3] = src0->u[3] != src1->u[3] ? ~0 : 0;
2521 }
2522
2523 static void
2524 exec_instruction(
2525 struct tgsi_exec_machine *mach,
2526 const struct tgsi_full_instruction *inst,
2527 int *pc )
2528 {
2529 uint chan_index;
2530 union tgsi_exec_channel r[10];
2531 union tgsi_exec_channel d[8];
2532
2533 (*pc)++;
2534
2535 switch (inst->Instruction.Opcode) {
2536 case TGSI_OPCODE_ARL:
2537 exec_vector_unary(mach, inst, micro_arl, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
2538 break;
2539
2540 case TGSI_OPCODE_MOV:
2541 exec_vector_unary(mach, inst, micro_mov, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
2542 break;
2543
2544 case TGSI_OPCODE_LIT:
2545 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y ) || IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2546 FETCH( &r[0], 0, CHAN_X );
2547 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2548 micro_max(&d[CHAN_Y], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2549 }
2550
2551 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2552 FETCH( &r[1], 0, CHAN_Y );
2553 micro_max( &r[1], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
2554
2555 FETCH( &r[2], 0, CHAN_W );
2556 micro_min( &r[2], &r[2], &mach->Temps[TEMP_128_I].xyzw[TEMP_128_C] );
2557 micro_max( &r[2], &r[2], &mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C] );
2558 micro_pow( &r[1], &r[1], &r[2] );
2559 micro_lt(&d[CHAN_Z], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2560 }
2561
2562 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2563 STORE(&d[CHAN_Y], 0, CHAN_Y);
2564 }
2565 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2566 STORE(&d[CHAN_Z], 0, CHAN_Z);
2567 }
2568 }
2569 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2570 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
2571 }
2572 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2573 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2574 }
2575 break;
2576
2577 case TGSI_OPCODE_RCP:
2578 exec_scalar_unary(mach, inst, micro_rcp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2579 break;
2580
2581 case TGSI_OPCODE_RSQ:
2582 exec_scalar_unary(mach, inst, micro_rsq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2583 break;
2584
2585 case TGSI_OPCODE_EXP:
2586 FETCH( &r[0], 0, CHAN_X );
2587 micro_flr( &r[1], &r[0] ); /* r1 = floor(r0) */
2588 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2589 micro_exp2( &r[2], &r[1] ); /* r2 = 2 ^ r1 */
2590 STORE( &r[2], 0, CHAN_X ); /* store r2 */
2591 }
2592 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2593 micro_sub( &r[2], &r[0], &r[1] ); /* r2 = r0 - r1 */
2594 STORE( &r[2], 0, CHAN_Y ); /* store r2 */
2595 }
2596 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2597 micro_exp2( &r[2], &r[0] ); /* r2 = 2 ^ r0 */
2598 STORE( &r[2], 0, CHAN_Z ); /* store r2 */
2599 }
2600 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2601 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2602 }
2603 break;
2604
2605 case TGSI_OPCODE_LOG:
2606 FETCH( &r[0], 0, CHAN_X );
2607 micro_abs( &r[2], &r[0] ); /* r2 = abs(r0) */
2608 micro_lg2( &r[1], &r[2] ); /* r1 = lg2(r2) */
2609 micro_flr( &r[0], &r[1] ); /* r0 = floor(r1) */
2610 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2611 STORE( &r[0], 0, CHAN_X );
2612 }
2613 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2614 micro_exp2( &r[0], &r[0] ); /* r0 = 2 ^ r0 */
2615 micro_div( &r[0], &r[2], &r[0] ); /* r0 = r2 / r0 */
2616 STORE( &r[0], 0, CHAN_Y );
2617 }
2618 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2619 STORE( &r[1], 0, CHAN_Z );
2620 }
2621 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2622 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2623 }
2624 break;
2625
2626 case TGSI_OPCODE_MUL:
2627 exec_vector_binary(mach, inst, micro_mul, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2628 break;
2629
2630 case TGSI_OPCODE_ADD:
2631 exec_vector_binary(mach, inst, micro_add, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2632 break;
2633
2634 case TGSI_OPCODE_DP3:
2635 exec_dp3(mach, inst);
2636 break;
2637
2638 case TGSI_OPCODE_DP4:
2639 exec_dp4(mach, inst);
2640 break;
2641
2642 case TGSI_OPCODE_DST:
2643 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2644 FETCH( &r[0], 0, CHAN_Y );
2645 FETCH( &r[1], 1, CHAN_Y);
2646 micro_mul(&d[CHAN_Y], &r[0], &r[1]);
2647 }
2648 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2649 FETCH(&d[CHAN_Z], 0, CHAN_Z);
2650 }
2651 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2652 FETCH(&d[CHAN_W], 1, CHAN_W);
2653 }
2654
2655 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2656 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X);
2657 }
2658 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2659 STORE(&d[CHAN_Y], 0, CHAN_Y);
2660 }
2661 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2662 STORE(&d[CHAN_Z], 0, CHAN_Z);
2663 }
2664 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2665 STORE(&d[CHAN_W], 0, CHAN_W);
2666 }
2667 break;
2668
2669 case TGSI_OPCODE_MIN:
2670 exec_vector_binary(mach, inst, micro_min, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2671 break;
2672
2673 case TGSI_OPCODE_MAX:
2674 exec_vector_binary(mach, inst, micro_max, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2675 break;
2676
2677 case TGSI_OPCODE_SLT:
2678 exec_vector_binary(mach, inst, micro_slt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2679 break;
2680
2681 case TGSI_OPCODE_SGE:
2682 exec_vector_binary(mach, inst, micro_sge, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2683 break;
2684
2685 case TGSI_OPCODE_MAD:
2686 exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2687 break;
2688
2689 case TGSI_OPCODE_SUB:
2690 exec_vector_binary(mach, inst, micro_sub, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2691 break;
2692
2693 case TGSI_OPCODE_LRP:
2694 exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2695 break;
2696
2697 case TGSI_OPCODE_CND:
2698 exec_vector_trinary(mach, inst, micro_cnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2699 break;
2700
2701 case TGSI_OPCODE_DP2A:
2702 exec_dp2a(mach, inst);
2703 break;
2704
2705 case TGSI_OPCODE_FRC:
2706 exec_vector_unary(mach, inst, micro_frc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2707 break;
2708
2709 case TGSI_OPCODE_CLAMP:
2710 exec_vector_trinary(mach, inst, micro_clamp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2711 break;
2712
2713 case TGSI_OPCODE_FLR:
2714 exec_vector_unary(mach, inst, micro_flr, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2715 break;
2716
2717 case TGSI_OPCODE_ROUND:
2718 exec_vector_unary(mach, inst, micro_rnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2719 break;
2720
2721 case TGSI_OPCODE_EX2:
2722 exec_scalar_unary(mach, inst, micro_exp2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2723 break;
2724
2725 case TGSI_OPCODE_LG2:
2726 exec_scalar_unary(mach, inst, micro_lg2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2727 break;
2728
2729 case TGSI_OPCODE_POW:
2730 FETCH(&r[0], 0, CHAN_X);
2731 FETCH(&r[1], 1, CHAN_X);
2732
2733 micro_pow( &r[0], &r[0], &r[1] );
2734
2735 FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
2736 STORE( &r[0], 0, chan_index );
2737 }
2738 break;
2739
2740 case TGSI_OPCODE_XPD:
2741 FETCH(&r[0], 0, CHAN_Y);
2742 FETCH(&r[1], 1, CHAN_Z);
2743
2744 micro_mul( &r[2], &r[0], &r[1] );
2745
2746 FETCH(&r[3], 0, CHAN_Z);
2747 FETCH(&r[4], 1, CHAN_Y);
2748
2749 micro_mul( &r[5], &r[3], &r[4] );
2750 micro_sub(&d[CHAN_X], &r[2], &r[5]);
2751
2752 FETCH(&r[2], 1, CHAN_X);
2753
2754 micro_mul( &r[3], &r[3], &r[2] );
2755
2756 FETCH(&r[5], 0, CHAN_X);
2757
2758 micro_mul( &r[1], &r[1], &r[5] );
2759 micro_sub(&d[CHAN_Y], &r[3], &r[1]);
2760
2761 micro_mul( &r[5], &r[5], &r[4] );
2762 micro_mul( &r[0], &r[0], &r[2] );
2763 micro_sub(&d[CHAN_Z], &r[5], &r[0]);
2764
2765 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2766 STORE(&d[CHAN_X], 0, CHAN_X);
2767 }
2768 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2769 STORE(&d[CHAN_Y], 0, CHAN_Y);
2770 }
2771 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2772 STORE(&d[CHAN_Z], 0, CHAN_Z);
2773 }
2774 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2775 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2776 }
2777 break;
2778
2779 case TGSI_OPCODE_ABS:
2780 exec_vector_unary(mach, inst, micro_abs, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2781 break;
2782
2783 case TGSI_OPCODE_RCC:
2784 FETCH(&r[0], 0, CHAN_X);
2785 micro_div(&r[0], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &r[0]);
2786 micro_float_clamp(&r[0], &r[0]);
2787 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2788 STORE(&r[0], 0, chan_index);
2789 }
2790 break;
2791
2792 case TGSI_OPCODE_DPH:
2793 exec_dph(mach, inst);
2794 break;
2795
2796 case TGSI_OPCODE_COS:
2797 exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2798 break;
2799
2800 case TGSI_OPCODE_DDX:
2801 exec_vector_unary(mach, inst, micro_ddx, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2802 break;
2803
2804 case TGSI_OPCODE_DDY:
2805 exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2806 break;
2807
2808 case TGSI_OPCODE_KILP:
2809 exec_kilp (mach, inst);
2810 break;
2811
2812 case TGSI_OPCODE_KIL:
2813 exec_kil (mach, inst);
2814 break;
2815
2816 case TGSI_OPCODE_PK2H:
2817 assert (0);
2818 break;
2819
2820 case TGSI_OPCODE_PK2US:
2821 assert (0);
2822 break;
2823
2824 case TGSI_OPCODE_PK4B:
2825 assert (0);
2826 break;
2827
2828 case TGSI_OPCODE_PK4UB:
2829 assert (0);
2830 break;
2831
2832 case TGSI_OPCODE_RFL:
2833 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2834 IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2835 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2836 /* r0 = dp3(src0, src0) */
2837 FETCH(&r[2], 0, CHAN_X);
2838 micro_mul(&r[0], &r[2], &r[2]);
2839 FETCH(&r[4], 0, CHAN_Y);
2840 micro_mul(&r[8], &r[4], &r[4]);
2841 micro_add(&r[0], &r[0], &r[8]);
2842 FETCH(&r[6], 0, CHAN_Z);
2843 micro_mul(&r[8], &r[6], &r[6]);
2844 micro_add(&r[0], &r[0], &r[8]);
2845
2846 /* r1 = dp3(src0, src1) */
2847 FETCH(&r[3], 1, CHAN_X);
2848 micro_mul(&r[1], &r[2], &r[3]);
2849 FETCH(&r[5], 1, CHAN_Y);
2850 micro_mul(&r[8], &r[4], &r[5]);
2851 micro_add(&r[1], &r[1], &r[8]);
2852 FETCH(&r[7], 1, CHAN_Z);
2853 micro_mul(&r[8], &r[6], &r[7]);
2854 micro_add(&r[1], &r[1], &r[8]);
2855
2856 /* r1 = 2 * r1 / r0 */
2857 micro_add(&r[1], &r[1], &r[1]);
2858 micro_div(&r[1], &r[1], &r[0]);
2859
2860 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2861 micro_mul(&r[2], &r[2], &r[1]);
2862 micro_sub(&r[2], &r[2], &r[3]);
2863 STORE(&r[2], 0, CHAN_X);
2864 }
2865 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2866 micro_mul(&r[4], &r[4], &r[1]);
2867 micro_sub(&r[4], &r[4], &r[5]);
2868 STORE(&r[4], 0, CHAN_Y);
2869 }
2870 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2871 micro_mul(&r[6], &r[6], &r[1]);
2872 micro_sub(&r[6], &r[6], &r[7]);
2873 STORE(&r[6], 0, CHAN_Z);
2874 }
2875 }
2876 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2877 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W);
2878 }
2879 break;
2880
2881 case TGSI_OPCODE_SEQ:
2882 exec_vector_binary(mach, inst, micro_seq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2883 break;
2884
2885 case TGSI_OPCODE_SFL:
2886 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2887 STORE(&mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, chan_index);
2888 }
2889 break;
2890
2891 case TGSI_OPCODE_SGT:
2892 exec_vector_binary(mach, inst, micro_sgt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2893 break;
2894
2895 case TGSI_OPCODE_SIN:
2896 exec_scalar_unary(mach, inst, micro_sin, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2897 break;
2898
2899 case TGSI_OPCODE_SLE:
2900 exec_vector_binary(mach, inst, micro_sle, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2901 break;
2902
2903 case TGSI_OPCODE_SNE:
2904 exec_vector_binary(mach, inst, micro_sne, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2905 break;
2906
2907 case TGSI_OPCODE_STR:
2908 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2909 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, chan_index);
2910 }
2911 break;
2912
2913 case TGSI_OPCODE_TEX:
2914 /* simple texture lookup */
2915 /* src[0] = texcoord */
2916 /* src[1] = sampler unit */
2917 exec_tex(mach, inst, TEX_MODIFIER_NONE);
2918 break;
2919
2920 case TGSI_OPCODE_TXB:
2921 /* Texture lookup with lod bias */
2922 /* src[0] = texcoord (src[0].w = LOD bias) */
2923 /* src[1] = sampler unit */
2924 exec_tex(mach, inst, TEX_MODIFIER_LOD_BIAS);
2925 break;
2926
2927 case TGSI_OPCODE_TXD:
2928 /* Texture lookup with explict partial derivatives */
2929 /* src[0] = texcoord */
2930 /* src[1] = d[strq]/dx */
2931 /* src[2] = d[strq]/dy */
2932 /* src[3] = sampler unit */
2933 exec_txd(mach, inst);
2934 break;
2935
2936 case TGSI_OPCODE_TXL:
2937 /* Texture lookup with explit LOD */
2938 /* src[0] = texcoord (src[0].w = LOD) */
2939 /* src[1] = sampler unit */
2940 exec_tex(mach, inst, TEX_MODIFIER_EXPLICIT_LOD);
2941 break;
2942
2943 case TGSI_OPCODE_TXP:
2944 /* Texture lookup with projection */
2945 /* src[0] = texcoord (src[0].w = projection) */
2946 /* src[1] = sampler unit */
2947 exec_tex(mach, inst, TEX_MODIFIER_PROJECTED);
2948 break;
2949
2950 case TGSI_OPCODE_UP2H:
2951 assert (0);
2952 break;
2953
2954 case TGSI_OPCODE_UP2US:
2955 assert (0);
2956 break;
2957
2958 case TGSI_OPCODE_UP4B:
2959 assert (0);
2960 break;
2961
2962 case TGSI_OPCODE_UP4UB:
2963 assert (0);
2964 break;
2965
2966 case TGSI_OPCODE_X2D:
2967 FETCH(&r[0], 1, CHAN_X);
2968 FETCH(&r[1], 1, CHAN_Y);
2969 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2970 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2971 FETCH(&r[2], 2, CHAN_X);
2972 micro_mul(&r[2], &r[2], &r[0]);
2973 FETCH(&r[3], 2, CHAN_Y);
2974 micro_mul(&r[3], &r[3], &r[1]);
2975 micro_add(&r[2], &r[2], &r[3]);
2976 FETCH(&r[3], 0, CHAN_X);
2977 micro_add(&d[CHAN_X], &r[2], &r[3]);
2978
2979 }
2980 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2981 IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2982 FETCH(&r[2], 2, CHAN_Z);
2983 micro_mul(&r[2], &r[2], &r[0]);
2984 FETCH(&r[3], 2, CHAN_W);
2985 micro_mul(&r[3], &r[3], &r[1]);
2986 micro_add(&r[2], &r[2], &r[3]);
2987 FETCH(&r[3], 0, CHAN_Y);
2988 micro_add(&d[CHAN_Y], &r[2], &r[3]);
2989
2990 }
2991 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2992 STORE(&d[CHAN_X], 0, CHAN_X);
2993 }
2994 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2995 STORE(&d[CHAN_Y], 0, CHAN_Y);
2996 }
2997 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2998 STORE(&d[CHAN_X], 0, CHAN_Z);
2999 }
3000 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
3001 STORE(&d[CHAN_Y], 0, CHAN_W);
3002 }
3003 break;
3004
3005 case TGSI_OPCODE_ARA:
3006 assert (0);
3007 break;
3008
3009 case TGSI_OPCODE_ARR:
3010 exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
3011 break;
3012
3013 case TGSI_OPCODE_BRA:
3014 assert (0);
3015 break;
3016
3017 case TGSI_OPCODE_CAL:
3018 /* skip the call if no execution channels are enabled */
3019 if (mach->ExecMask) {
3020 /* do the call */
3021
3022 /* First, record the depths of the execution stacks.
3023 * This is important for deeply nested/looped return statements.
3024 * We have to unwind the stacks by the correct amount. For a
3025 * real code generator, we could determine the number of entries
3026 * to pop off each stack with simple static analysis and avoid
3027 * implementing this data structure at run time.
3028 */
3029 mach->CallStack[mach->CallStackTop].CondStackTop = mach->CondStackTop;
3030 mach->CallStack[mach->CallStackTop].LoopStackTop = mach->LoopStackTop;
3031 mach->CallStack[mach->CallStackTop].ContStackTop = mach->ContStackTop;
3032 mach->CallStack[mach->CallStackTop].SwitchStackTop = mach->SwitchStackTop;
3033 mach->CallStack[mach->CallStackTop].BreakStackTop = mach->BreakStackTop;
3034 /* note that PC was already incremented above */
3035 mach->CallStack[mach->CallStackTop].ReturnAddr = *pc;
3036
3037 mach->CallStackTop++;
3038
3039 /* Second, push the Cond, Loop, Cont, Func stacks */
3040 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3041 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3042 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3043 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
3044 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3045 assert(mach->FuncStackTop < TGSI_EXEC_MAX_CALL_NESTING);
3046
3047 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3048 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3049 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3050 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
3051 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3052 mach->FuncStack[mach->FuncStackTop++] = mach->FuncMask;
3053
3054 /* Finally, jump to the subroutine */
3055 *pc = inst->Label.Label;
3056 }
3057 break;
3058
3059 case TGSI_OPCODE_RET:
3060 mach->FuncMask &= ~mach->ExecMask;
3061 UPDATE_EXEC_MASK(mach);
3062
3063 if (mach->FuncMask == 0x0) {
3064 /* really return now (otherwise, keep executing */
3065
3066 if (mach->CallStackTop == 0) {
3067 /* returning from main() */
3068 *pc = -1;
3069 return;
3070 }
3071
3072 assert(mach->CallStackTop > 0);
3073 mach->CallStackTop--;
3074
3075 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3076 mach->CondMask = mach->CondStack[mach->CondStackTop];
3077
3078 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3079 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3080
3081 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3082 mach->ContMask = mach->ContStack[mach->ContStackTop];
3083
3084 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3085 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3086
3087 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3088 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3089
3090 assert(mach->FuncStackTop > 0);
3091 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3092
3093 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3094
3095 UPDATE_EXEC_MASK(mach);
3096 }
3097 break;
3098
3099 case TGSI_OPCODE_SSG:
3100 exec_vector_unary(mach, inst, micro_sgn, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3101 break;
3102
3103 case TGSI_OPCODE_CMP:
3104 exec_vector_trinary(mach, inst, micro_cmp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3105 break;
3106
3107 case TGSI_OPCODE_SCS:
3108 if( IS_CHANNEL_ENABLED( *inst, CHAN_X ) || IS_CHANNEL_ENABLED( *inst, CHAN_Y ) ) {
3109 FETCH( &r[0], 0, CHAN_X );
3110 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
3111 micro_cos(&r[1], &r[0]);
3112 STORE(&r[1], 0, CHAN_X);
3113 }
3114 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
3115 micro_sin(&r[1], &r[0]);
3116 STORE(&r[1], 0, CHAN_Y);
3117 }
3118 }
3119 if( IS_CHANNEL_ENABLED( *inst, CHAN_Z ) ) {
3120 STORE( &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, CHAN_Z );
3121 }
3122 if( IS_CHANNEL_ENABLED( *inst, CHAN_W ) ) {
3123 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
3124 }
3125 break;
3126
3127 case TGSI_OPCODE_NRM:
3128 exec_nrm3(mach, inst);
3129 break;
3130
3131 case TGSI_OPCODE_NRM4:
3132 exec_nrm4(mach, inst);
3133 break;
3134
3135 case TGSI_OPCODE_DIV:
3136 assert( 0 );
3137 break;
3138
3139 case TGSI_OPCODE_DP2:
3140 exec_dp2(mach, inst);
3141 break;
3142
3143 case TGSI_OPCODE_IF:
3144 /* push CondMask */
3145 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3146 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3147 FETCH( &r[0], 0, CHAN_X );
3148 /* update CondMask */
3149 if( ! r[0].u[0] ) {
3150 mach->CondMask &= ~0x1;
3151 }
3152 if( ! r[0].u[1] ) {
3153 mach->CondMask &= ~0x2;
3154 }
3155 if( ! r[0].u[2] ) {
3156 mach->CondMask &= ~0x4;
3157 }
3158 if( ! r[0].u[3] ) {
3159 mach->CondMask &= ~0x8;
3160 }
3161 UPDATE_EXEC_MASK(mach);
3162 /* Todo: If CondMask==0, jump to ELSE */
3163 break;
3164
3165 case TGSI_OPCODE_ELSE:
3166 /* invert CondMask wrt previous mask */
3167 {
3168 uint prevMask;
3169 assert(mach->CondStackTop > 0);
3170 prevMask = mach->CondStack[mach->CondStackTop - 1];
3171 mach->CondMask = ~mach->CondMask & prevMask;
3172 UPDATE_EXEC_MASK(mach);
3173 /* Todo: If CondMask==0, jump to ENDIF */
3174 }
3175 break;
3176
3177 case TGSI_OPCODE_ENDIF:
3178 /* pop CondMask */
3179 assert(mach->CondStackTop > 0);
3180 mach->CondMask = mach->CondStack[--mach->CondStackTop];
3181 UPDATE_EXEC_MASK(mach);
3182 break;
3183
3184 case TGSI_OPCODE_END:
3185 /* halt execution */
3186 *pc = -1;
3187 break;
3188
3189 case TGSI_OPCODE_REP:
3190 assert (0);
3191 break;
3192
3193 case TGSI_OPCODE_ENDREP:
3194 assert (0);
3195 break;
3196
3197 case TGSI_OPCODE_PUSHA:
3198 assert (0);
3199 break;
3200
3201 case TGSI_OPCODE_POPA:
3202 assert (0);
3203 break;
3204
3205 case TGSI_OPCODE_CEIL:
3206 exec_vector_unary(mach, inst, micro_ceil, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3207 break;
3208
3209 case TGSI_OPCODE_I2F:
3210 exec_vector_unary(mach, inst, micro_i2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_INT);
3211 break;
3212
3213 case TGSI_OPCODE_NOT:
3214 exec_vector_unary(mach, inst, micro_not, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3215 break;
3216
3217 case TGSI_OPCODE_TRUNC:
3218 exec_vector_unary(mach, inst, micro_trunc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3219 break;
3220
3221 case TGSI_OPCODE_SHL:
3222 exec_vector_binary(mach, inst, micro_shl, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3223 break;
3224
3225 case TGSI_OPCODE_AND:
3226 exec_vector_binary(mach, inst, micro_and, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3227 break;
3228
3229 case TGSI_OPCODE_OR:
3230 exec_vector_binary(mach, inst, micro_or, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3231 break;
3232
3233 case TGSI_OPCODE_MOD:
3234 assert (0);
3235 break;
3236
3237 case TGSI_OPCODE_XOR:
3238 exec_vector_binary(mach, inst, micro_xor, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3239 break;
3240
3241 case TGSI_OPCODE_SAD:
3242 assert (0);
3243 break;
3244
3245 case TGSI_OPCODE_TXF:
3246 assert (0);
3247 break;
3248
3249 case TGSI_OPCODE_TXQ:
3250 assert (0);
3251 break;
3252
3253 case TGSI_OPCODE_EMIT:
3254 emit_vertex(mach);
3255 break;
3256
3257 case TGSI_OPCODE_ENDPRIM:
3258 emit_primitive(mach);
3259 break;
3260
3261 case TGSI_OPCODE_BGNFOR:
3262 assert(mach->LoopCounterStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3263 for (chan_index = 0; chan_index < 3; chan_index++) {
3264 FETCH( &mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[chan_index], 0, chan_index );
3265 }
3266 ++mach->LoopCounterStackTop;
3267 STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X], 0, CHAN_X);
3268 /* update LoopMask */
3269 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) {
3270 mach->LoopMask &= ~0x1;
3271 }
3272 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) {
3273 mach->LoopMask &= ~0x2;
3274 }
3275 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) {
3276 mach->LoopMask &= ~0x4;
3277 }
3278 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) {
3279 mach->LoopMask &= ~0x8;
3280 }
3281 /* TODO: if mach->LoopMask == 0, jump to end of loop */
3282 UPDATE_EXEC_MASK(mach);
3283 /* fall-through (for now) */
3284 case TGSI_OPCODE_BGNLOOP:
3285 /* push LoopMask and ContMasks */
3286 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3287 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3288 assert(mach->LoopLabelStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3289 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3290
3291 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3292 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3293 mach->LoopLabelStack[mach->LoopLabelStackTop++] = *pc - 1;
3294 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3295 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_LOOP;
3296 break;
3297
3298 case TGSI_OPCODE_ENDFOR:
3299 assert(mach->LoopCounterStackTop > 0);
3300 micro_sub(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
3301 &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y],
3302 &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C]);
3303 /* update LoopMask */
3304 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[0] <= 0.0f) {
3305 mach->LoopMask &= ~0x1;
3306 }
3307 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[1] <= 0.0f) {
3308 mach->LoopMask &= ~0x2;
3309 }
3310 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[2] <= 0.0f) {
3311 mach->LoopMask &= ~0x4;
3312 }
3313 if (mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Y].f[3] <= 0.0f) {
3314 mach->LoopMask &= ~0x8;
3315 }
3316 micro_add(&mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
3317 &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_X],
3318 &mach->LoopCounterStack[mach->LoopCounterStackTop - 1].xyzw[CHAN_Z]);
3319 assert(mach->LoopLabelStackTop > 0);
3320 inst = mach->Instructions + mach->LoopLabelStack[mach->LoopLabelStackTop - 1];
3321 STORE(&mach->LoopCounterStack[mach->LoopCounterStackTop].xyzw[CHAN_X], 0, CHAN_X);
3322 /* Restore ContMask, but don't pop */
3323 assert(mach->ContStackTop > 0);
3324 mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
3325 UPDATE_EXEC_MASK(mach);
3326 if (mach->ExecMask) {
3327 /* repeat loop: jump to instruction just past BGNLOOP */
3328 assert(mach->LoopLabelStackTop > 0);
3329 *pc = mach->LoopLabelStack[mach->LoopLabelStackTop - 1] + 1;
3330 }
3331 else {
3332 /* exit loop: pop LoopMask */
3333 assert(mach->LoopStackTop > 0);
3334 mach->LoopMask = mach->LoopStack[--mach->LoopStackTop];
3335 /* pop ContMask */
3336 assert(mach->ContStackTop > 0);
3337 mach->ContMask = mach->ContStack[--mach->ContStackTop];
3338 assert(mach->LoopLabelStackTop > 0);
3339 --mach->LoopLabelStackTop;
3340 assert(mach->LoopCounterStackTop > 0);
3341 --mach->LoopCounterStackTop;
3342
3343 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
3344 }
3345 UPDATE_EXEC_MASK(mach);
3346 break;
3347
3348 case TGSI_OPCODE_ENDLOOP:
3349 /* Restore ContMask, but don't pop */
3350 assert(mach->ContStackTop > 0);
3351 mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
3352 UPDATE_EXEC_MASK(mach);
3353 if (mach->ExecMask) {
3354 /* repeat loop: jump to instruction just past BGNLOOP */
3355 assert(mach->LoopLabelStackTop > 0);
3356 *pc = mach->LoopLabelStack[mach->LoopLabelStackTop - 1] + 1;
3357 }
3358 else {
3359 /* exit loop: pop LoopMask */
3360 assert(mach->LoopStackTop > 0);
3361 mach->LoopMask = mach->LoopStack[--mach->LoopStackTop];
3362 /* pop ContMask */
3363 assert(mach->ContStackTop > 0);
3364 mach->ContMask = mach->ContStack[--mach->ContStackTop];
3365 assert(mach->LoopLabelStackTop > 0);
3366 --mach->LoopLabelStackTop;
3367
3368 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
3369 }
3370 UPDATE_EXEC_MASK(mach);
3371 break;
3372
3373 case TGSI_OPCODE_BRK:
3374 exec_break(mach);
3375 break;
3376
3377 case TGSI_OPCODE_CONT:
3378 /* turn off cont channels for each enabled exec channel */
3379 mach->ContMask &= ~mach->ExecMask;
3380 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3381 UPDATE_EXEC_MASK(mach);
3382 break;
3383
3384 case TGSI_OPCODE_BGNSUB:
3385 /* no-op */
3386 break;
3387
3388 case TGSI_OPCODE_ENDSUB:
3389 /*
3390 * XXX: This really should be a no-op. We should never reach this opcode.
3391 */
3392
3393 assert(mach->CallStackTop > 0);
3394 mach->CallStackTop--;
3395
3396 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3397 mach->CondMask = mach->CondStack[mach->CondStackTop];
3398
3399 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3400 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3401
3402 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3403 mach->ContMask = mach->ContStack[mach->ContStackTop];
3404
3405 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3406 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3407
3408 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3409 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3410
3411 assert(mach->FuncStackTop > 0);
3412 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3413
3414 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3415
3416 UPDATE_EXEC_MASK(mach);
3417 break;
3418
3419 case TGSI_OPCODE_NOP:
3420 break;
3421
3422 case TGSI_OPCODE_BREAKC:
3423 FETCH(&r[0], 0, CHAN_X);
3424 /* update CondMask */
3425 if (r[0].u[0] && (mach->ExecMask & 0x1)) {
3426 mach->LoopMask &= ~0x1;
3427 }
3428 if (r[0].u[1] && (mach->ExecMask & 0x2)) {
3429 mach->LoopMask &= ~0x2;
3430 }
3431 if (r[0].u[2] && (mach->ExecMask & 0x4)) {
3432 mach->LoopMask &= ~0x4;
3433 }
3434 if (r[0].u[3] && (mach->ExecMask & 0x8)) {
3435 mach->LoopMask &= ~0x8;
3436 }
3437 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3438 UPDATE_EXEC_MASK(mach);
3439 break;
3440
3441 case TGSI_OPCODE_F2I:
3442 exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
3443 break;
3444
3445 case TGSI_OPCODE_IDIV:
3446 exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3447 break;
3448
3449 case TGSI_OPCODE_IMAX:
3450 exec_vector_binary(mach, inst, micro_imax, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3451 break;
3452
3453 case TGSI_OPCODE_IMIN:
3454 exec_vector_binary(mach, inst, micro_imin, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3455 break;
3456
3457 case TGSI_OPCODE_INEG:
3458 exec_vector_unary(mach, inst, micro_ineg, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3459 break;
3460
3461 case TGSI_OPCODE_ISGE:
3462 exec_vector_binary(mach, inst, micro_isge, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3463 break;
3464
3465 case TGSI_OPCODE_ISHR:
3466 exec_vector_binary(mach, inst, micro_ishr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3467 break;
3468
3469 case TGSI_OPCODE_ISLT:
3470 exec_vector_binary(mach, inst, micro_islt, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3471 break;
3472
3473 case TGSI_OPCODE_F2U:
3474 exec_vector_unary(mach, inst, micro_f2u, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
3475 break;
3476
3477 case TGSI_OPCODE_U2F:
3478 exec_vector_unary(mach, inst, micro_u2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_UINT);
3479 break;
3480
3481 case TGSI_OPCODE_UADD:
3482 exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3483 break;
3484
3485 case TGSI_OPCODE_UDIV:
3486 exec_vector_binary(mach, inst, micro_udiv, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3487 break;
3488
3489 case TGSI_OPCODE_UMAD:
3490 exec_vector_trinary(mach, inst, micro_umad, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3491 break;
3492
3493 case TGSI_OPCODE_UMAX:
3494 exec_vector_binary(mach, inst, micro_umax, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3495 break;
3496
3497 case TGSI_OPCODE_UMIN:
3498 exec_vector_binary(mach, inst, micro_umin, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3499 break;
3500
3501 case TGSI_OPCODE_UMOD:
3502 exec_vector_binary(mach, inst, micro_umod, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3503 break;
3504
3505 case TGSI_OPCODE_UMUL:
3506 exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3507 break;
3508
3509 case TGSI_OPCODE_USEQ:
3510 exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3511 break;
3512
3513 case TGSI_OPCODE_USGE:
3514 exec_vector_binary(mach, inst, micro_usge, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3515 break;
3516
3517 case TGSI_OPCODE_USHR:
3518 exec_vector_binary(mach, inst, micro_ushr, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3519 break;
3520
3521 case TGSI_OPCODE_USLT:
3522 exec_vector_binary(mach, inst, micro_uslt, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3523 break;
3524
3525 case TGSI_OPCODE_USNE:
3526 exec_vector_binary(mach, inst, micro_usne, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3527 break;
3528
3529 case TGSI_OPCODE_SWITCH:
3530 exec_switch(mach, inst);
3531 break;
3532
3533 case TGSI_OPCODE_CASE:
3534 exec_case(mach, inst);
3535 break;
3536
3537 case TGSI_OPCODE_DEFAULT:
3538 exec_default(mach);
3539 break;
3540
3541 case TGSI_OPCODE_ENDSWITCH:
3542 exec_endswitch(mach);
3543 break;
3544
3545 default:
3546 assert( 0 );
3547 }
3548 }
3549
3550
3551 #define DEBUG_EXECUTION 0
3552
3553
3554 /**
3555 * Run TGSI interpreter.
3556 * \return bitmask of "alive" quad components
3557 */
3558 uint
3559 tgsi_exec_machine_run( struct tgsi_exec_machine *mach )
3560 {
3561 uint i;
3562 int pc = 0;
3563
3564 mach->CondMask = 0xf;
3565 mach->LoopMask = 0xf;
3566 mach->ContMask = 0xf;
3567 mach->FuncMask = 0xf;
3568 mach->ExecMask = 0xf;
3569
3570 mach->Switch.mask = 0xf;
3571
3572 assert(mach->CondStackTop == 0);
3573 assert(mach->LoopStackTop == 0);
3574 assert(mach->ContStackTop == 0);
3575 assert(mach->SwitchStackTop == 0);
3576 assert(mach->BreakStackTop == 0);
3577 assert(mach->CallStackTop == 0);
3578
3579 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] = 0;
3580 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] = 0;
3581
3582 if( mach->Processor == TGSI_PROCESSOR_GEOMETRY ) {
3583 mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0] = 0;
3584 mach->Primitives[0] = 0;
3585 }
3586
3587 for (i = 0; i < QUAD_SIZE; i++) {
3588 mach->Temps[TEMP_CC_I].xyzw[TEMP_CC_C].u[i] =
3589 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_X_SHIFT) |
3590 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Y_SHIFT) |
3591 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Z_SHIFT) |
3592 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_W_SHIFT);
3593 }
3594
3595 /* execute declarations (interpolants) */
3596 for (i = 0; i < mach->NumDeclarations; i++) {
3597 exec_declaration( mach, mach->Declarations+i );
3598 }
3599
3600 {
3601 #if DEBUG_EXECUTION
3602 struct tgsi_exec_vector temps[TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS];
3603 struct tgsi_exec_vector outputs[PIPE_MAX_ATTRIBS];
3604 uint inst = 1;
3605
3606 memcpy(temps, mach->Temps, sizeof(temps));
3607 memcpy(outputs, mach->Outputs, sizeof(outputs));
3608 #endif
3609
3610 /* execute instructions, until pc is set to -1 */
3611 while (pc != -1) {
3612
3613 #if DEBUG_EXECUTION
3614 uint i;
3615
3616 tgsi_dump_instruction(&mach->Instructions[pc], inst++);
3617 #endif
3618
3619 assert(pc < (int) mach->NumInstructions);
3620 exec_instruction(mach, mach->Instructions + pc, &pc);
3621
3622 #if DEBUG_EXECUTION
3623 for (i = 0; i < TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS; i++) {
3624 if (memcmp(&temps[i], &mach->Temps[i], sizeof(temps[i]))) {
3625 uint j;
3626
3627 memcpy(&temps[i], &mach->Temps[i], sizeof(temps[i]));
3628 debug_printf("TEMP[%2u] = ", i);
3629 for (j = 0; j < 4; j++) {
3630 if (j > 0) {
3631 debug_printf(" ");
3632 }
3633 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3634 temps[i].xyzw[0].f[j], temps[i].xyzw[0].u[j],
3635 temps[i].xyzw[1].f[j], temps[i].xyzw[1].u[j],
3636 temps[i].xyzw[2].f[j], temps[i].xyzw[2].u[j],
3637 temps[i].xyzw[3].f[j], temps[i].xyzw[3].u[j]);
3638 }
3639 }
3640 }
3641 for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
3642 if (memcmp(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]))) {
3643 uint j;
3644
3645 memcpy(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]));
3646 debug_printf("OUT[%2u] = ", i);
3647 for (j = 0; j < 4; j++) {
3648 if (j > 0) {
3649 debug_printf(" ");
3650 }
3651 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3652 outputs[i].xyzw[0].f[j], outputs[i].xyzw[0].u[j],
3653 outputs[i].xyzw[1].f[j], outputs[i].xyzw[1].u[j],
3654 outputs[i].xyzw[2].f[j], outputs[i].xyzw[2].u[j],
3655 outputs[i].xyzw[3].f[j], outputs[i].xyzw[3].u[j]);
3656 }
3657 }
3658 }
3659 #endif
3660 }
3661 }
3662
3663 #if 0
3664 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3665 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
3666 /*
3667 * Scale back depth component.
3668 */
3669 for (i = 0; i < 4; i++)
3670 mach->Outputs[0].xyzw[2].f[i] *= ctx->DrawBuffer->_DepthMaxF;
3671 }
3672 #endif
3673
3674 assert(mach->CondStackTop == 0);
3675 assert(mach->LoopStackTop == 0);
3676 assert(mach->ContStackTop == 0);
3677 assert(mach->SwitchStackTop == 0);
3678 assert(mach->BreakStackTop == 0);
3679 assert(mach->CallStackTop == 0);
3680
3681 return ~mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0];
3682 }