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gallium: Remove loop register file.
[mesa.git] / src / gallium / auxiliary / tgsi / tgsi_exec.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 /**
30 * TGSI interpreter/executor.
31 *
32 * Flow control information:
33 *
34 * Since we operate on 'quads' (4 pixels or 4 vertices in parallel)
35 * flow control statements (IF/ELSE/ENDIF, LOOP/ENDLOOP) require special
36 * care since a condition may be true for some quad components but false
37 * for other components.
38 *
39 * We basically execute all statements (even if they're in the part of
40 * an IF/ELSE clause that's "not taken") and use a special mask to
41 * control writing to destination registers. This is the ExecMask.
42 * See store_dest().
43 *
44 * The ExecMask is computed from three other masks (CondMask, LoopMask and
45 * ContMask) which are controlled by the flow control instructions (namely:
46 * (IF/ELSE/ENDIF, LOOP/ENDLOOP and CONT).
47 *
48 *
49 * Authors:
50 * Michal Krol
51 * Brian Paul
52 */
53
54 #include "pipe/p_compiler.h"
55 #include "pipe/p_state.h"
56 #include "pipe/p_shader_tokens.h"
57 #include "tgsi/tgsi_dump.h"
58 #include "tgsi/tgsi_parse.h"
59 #include "tgsi/tgsi_util.h"
60 #include "tgsi_exec.h"
61 #include "util/u_memory.h"
62 #include "util/u_math.h"
63
64
65 #define FAST_MATH 1
66
67 #define TILE_TOP_LEFT 0
68 #define TILE_TOP_RIGHT 1
69 #define TILE_BOTTOM_LEFT 2
70 #define TILE_BOTTOM_RIGHT 3
71
72 static void
73 micro_abs(union tgsi_exec_channel *dst,
74 const union tgsi_exec_channel *src)
75 {
76 dst->f[0] = fabsf(src->f[0]);
77 dst->f[1] = fabsf(src->f[1]);
78 dst->f[2] = fabsf(src->f[2]);
79 dst->f[3] = fabsf(src->f[3]);
80 }
81
82 static void
83 micro_arl(union tgsi_exec_channel *dst,
84 const union tgsi_exec_channel *src)
85 {
86 dst->i[0] = (int)floorf(src->f[0]);
87 dst->i[1] = (int)floorf(src->f[1]);
88 dst->i[2] = (int)floorf(src->f[2]);
89 dst->i[3] = (int)floorf(src->f[3]);
90 }
91
92 static void
93 micro_arr(union tgsi_exec_channel *dst,
94 const union tgsi_exec_channel *src)
95 {
96 dst->i[0] = (int)floorf(src->f[0] + 0.5f);
97 dst->i[1] = (int)floorf(src->f[1] + 0.5f);
98 dst->i[2] = (int)floorf(src->f[2] + 0.5f);
99 dst->i[3] = (int)floorf(src->f[3] + 0.5f);
100 }
101
102 static void
103 micro_ceil(union tgsi_exec_channel *dst,
104 const union tgsi_exec_channel *src)
105 {
106 dst->f[0] = ceilf(src->f[0]);
107 dst->f[1] = ceilf(src->f[1]);
108 dst->f[2] = ceilf(src->f[2]);
109 dst->f[3] = ceilf(src->f[3]);
110 }
111
112 static void
113 micro_clamp(union tgsi_exec_channel *dst,
114 const union tgsi_exec_channel *src0,
115 const union tgsi_exec_channel *src1,
116 const union tgsi_exec_channel *src2)
117 {
118 dst->f[0] = src0->f[0] < src1->f[0] ? src1->f[0] : src0->f[0] > src2->f[0] ? src2->f[0] : src0->f[0];
119 dst->f[1] = src0->f[1] < src1->f[1] ? src1->f[1] : src0->f[1] > src2->f[1] ? src2->f[1] : src0->f[1];
120 dst->f[2] = src0->f[2] < src1->f[2] ? src1->f[2] : src0->f[2] > src2->f[2] ? src2->f[2] : src0->f[2];
121 dst->f[3] = src0->f[3] < src1->f[3] ? src1->f[3] : src0->f[3] > src2->f[3] ? src2->f[3] : src0->f[3];
122 }
123
124 static void
125 micro_cmp(union tgsi_exec_channel *dst,
126 const union tgsi_exec_channel *src0,
127 const union tgsi_exec_channel *src1,
128 const union tgsi_exec_channel *src2)
129 {
130 dst->f[0] = src0->f[0] < 0.0f ? src1->f[0] : src2->f[0];
131 dst->f[1] = src0->f[1] < 0.0f ? src1->f[1] : src2->f[1];
132 dst->f[2] = src0->f[2] < 0.0f ? src1->f[2] : src2->f[2];
133 dst->f[3] = src0->f[3] < 0.0f ? src1->f[3] : src2->f[3];
134 }
135
136 static void
137 micro_cnd(union tgsi_exec_channel *dst,
138 const union tgsi_exec_channel *src0,
139 const union tgsi_exec_channel *src1,
140 const union tgsi_exec_channel *src2)
141 {
142 dst->f[0] = src2->f[0] > 0.5f ? src0->f[0] : src1->f[0];
143 dst->f[1] = src2->f[1] > 0.5f ? src0->f[1] : src1->f[1];
144 dst->f[2] = src2->f[2] > 0.5f ? src0->f[2] : src1->f[2];
145 dst->f[3] = src2->f[3] > 0.5f ? src0->f[3] : src1->f[3];
146 }
147
148 static void
149 micro_cos(union tgsi_exec_channel *dst,
150 const union tgsi_exec_channel *src)
151 {
152 dst->f[0] = cosf(src->f[0]);
153 dst->f[1] = cosf(src->f[1]);
154 dst->f[2] = cosf(src->f[2]);
155 dst->f[3] = cosf(src->f[3]);
156 }
157
158 static void
159 micro_ddx(union tgsi_exec_channel *dst,
160 const union tgsi_exec_channel *src)
161 {
162 dst->f[0] =
163 dst->f[1] =
164 dst->f[2] =
165 dst->f[3] = src->f[TILE_BOTTOM_RIGHT] - src->f[TILE_BOTTOM_LEFT];
166 }
167
168 static void
169 micro_ddy(union tgsi_exec_channel *dst,
170 const union tgsi_exec_channel *src)
171 {
172 dst->f[0] =
173 dst->f[1] =
174 dst->f[2] =
175 dst->f[3] = src->f[TILE_BOTTOM_LEFT] - src->f[TILE_TOP_LEFT];
176 }
177
178 static void
179 micro_exp2(union tgsi_exec_channel *dst,
180 const union tgsi_exec_channel *src)
181 {
182 #if FAST_MATH
183 dst->f[0] = util_fast_exp2(src->f[0]);
184 dst->f[1] = util_fast_exp2(src->f[1]);
185 dst->f[2] = util_fast_exp2(src->f[2]);
186 dst->f[3] = util_fast_exp2(src->f[3]);
187 #else
188 #if DEBUG
189 /* Inf is okay for this instruction, so clamp it to silence assertions. */
190 uint i;
191 union tgsi_exec_channel clamped;
192
193 for (i = 0; i < 4; i++) {
194 if (src->f[i] > 127.99999f) {
195 clamped.f[i] = 127.99999f;
196 } else if (src->f[i] < -126.99999f) {
197 clamped.f[i] = -126.99999f;
198 } else {
199 clamped.f[i] = src->f[i];
200 }
201 }
202 src = &clamped;
203 #endif /* DEBUG */
204
205 dst->f[0] = powf(2.0f, src->f[0]);
206 dst->f[1] = powf(2.0f, src->f[1]);
207 dst->f[2] = powf(2.0f, src->f[2]);
208 dst->f[3] = powf(2.0f, src->f[3]);
209 #endif /* FAST_MATH */
210 }
211
212 static void
213 micro_flr(union tgsi_exec_channel *dst,
214 const union tgsi_exec_channel *src)
215 {
216 dst->f[0] = floorf(src->f[0]);
217 dst->f[1] = floorf(src->f[1]);
218 dst->f[2] = floorf(src->f[2]);
219 dst->f[3] = floorf(src->f[3]);
220 }
221
222 static void
223 micro_frc(union tgsi_exec_channel *dst,
224 const union tgsi_exec_channel *src)
225 {
226 dst->f[0] = src->f[0] - floorf(src->f[0]);
227 dst->f[1] = src->f[1] - floorf(src->f[1]);
228 dst->f[2] = src->f[2] - floorf(src->f[2]);
229 dst->f[3] = src->f[3] - floorf(src->f[3]);
230 }
231
232 static void
233 micro_iabs(union tgsi_exec_channel *dst,
234 const union tgsi_exec_channel *src)
235 {
236 dst->i[0] = src->i[0] >= 0 ? src->i[0] : -src->i[0];
237 dst->i[1] = src->i[1] >= 0 ? src->i[1] : -src->i[1];
238 dst->i[2] = src->i[2] >= 0 ? src->i[2] : -src->i[2];
239 dst->i[3] = src->i[3] >= 0 ? src->i[3] : -src->i[3];
240 }
241
242 static void
243 micro_ineg(union tgsi_exec_channel *dst,
244 const union tgsi_exec_channel *src)
245 {
246 dst->i[0] = -src->i[0];
247 dst->i[1] = -src->i[1];
248 dst->i[2] = -src->i[2];
249 dst->i[3] = -src->i[3];
250 }
251
252 static void
253 micro_lg2(union tgsi_exec_channel *dst,
254 const union tgsi_exec_channel *src)
255 {
256 #if FAST_MATH
257 dst->f[0] = util_fast_log2(src->f[0]);
258 dst->f[1] = util_fast_log2(src->f[1]);
259 dst->f[2] = util_fast_log2(src->f[2]);
260 dst->f[3] = util_fast_log2(src->f[3]);
261 #else
262 dst->f[0] = logf(src->f[0]) * 1.442695f;
263 dst->f[1] = logf(src->f[1]) * 1.442695f;
264 dst->f[2] = logf(src->f[2]) * 1.442695f;
265 dst->f[3] = logf(src->f[3]) * 1.442695f;
266 #endif
267 }
268
269 static void
270 micro_lrp(union tgsi_exec_channel *dst,
271 const union tgsi_exec_channel *src0,
272 const union tgsi_exec_channel *src1,
273 const union tgsi_exec_channel *src2)
274 {
275 dst->f[0] = src0->f[0] * (src1->f[0] - src2->f[0]) + src2->f[0];
276 dst->f[1] = src0->f[1] * (src1->f[1] - src2->f[1]) + src2->f[1];
277 dst->f[2] = src0->f[2] * (src1->f[2] - src2->f[2]) + src2->f[2];
278 dst->f[3] = src0->f[3] * (src1->f[3] - src2->f[3]) + src2->f[3];
279 }
280
281 static void
282 micro_mad(union tgsi_exec_channel *dst,
283 const union tgsi_exec_channel *src0,
284 const union tgsi_exec_channel *src1,
285 const union tgsi_exec_channel *src2)
286 {
287 dst->f[0] = src0->f[0] * src1->f[0] + src2->f[0];
288 dst->f[1] = src0->f[1] * src1->f[1] + src2->f[1];
289 dst->f[2] = src0->f[2] * src1->f[2] + src2->f[2];
290 dst->f[3] = src0->f[3] * src1->f[3] + src2->f[3];
291 }
292
293 static void
294 micro_mov(union tgsi_exec_channel *dst,
295 const union tgsi_exec_channel *src)
296 {
297 dst->u[0] = src->u[0];
298 dst->u[1] = src->u[1];
299 dst->u[2] = src->u[2];
300 dst->u[3] = src->u[3];
301 }
302
303 static void
304 micro_rcp(union tgsi_exec_channel *dst,
305 const union tgsi_exec_channel *src)
306 {
307 #if 0 /* for debugging */
308 assert(src->f[0] != 0.0f);
309 assert(src->f[1] != 0.0f);
310 assert(src->f[2] != 0.0f);
311 assert(src->f[3] != 0.0f);
312 #endif
313 dst->f[0] = 1.0f / src->f[0];
314 dst->f[1] = 1.0f / src->f[1];
315 dst->f[2] = 1.0f / src->f[2];
316 dst->f[3] = 1.0f / src->f[3];
317 }
318
319 static void
320 micro_rnd(union tgsi_exec_channel *dst,
321 const union tgsi_exec_channel *src)
322 {
323 dst->f[0] = floorf(src->f[0] + 0.5f);
324 dst->f[1] = floorf(src->f[1] + 0.5f);
325 dst->f[2] = floorf(src->f[2] + 0.5f);
326 dst->f[3] = floorf(src->f[3] + 0.5f);
327 }
328
329 static void
330 micro_rsq(union tgsi_exec_channel *dst,
331 const union tgsi_exec_channel *src)
332 {
333 #if 0 /* for debugging */
334 assert(src->f[0] != 0.0f);
335 assert(src->f[1] != 0.0f);
336 assert(src->f[2] != 0.0f);
337 assert(src->f[3] != 0.0f);
338 #endif
339 dst->f[0] = 1.0f / sqrtf(fabsf(src->f[0]));
340 dst->f[1] = 1.0f / sqrtf(fabsf(src->f[1]));
341 dst->f[2] = 1.0f / sqrtf(fabsf(src->f[2]));
342 dst->f[3] = 1.0f / sqrtf(fabsf(src->f[3]));
343 }
344
345 static void
346 micro_seq(union tgsi_exec_channel *dst,
347 const union tgsi_exec_channel *src0,
348 const union tgsi_exec_channel *src1)
349 {
350 dst->f[0] = src0->f[0] == src1->f[0] ? 1.0f : 0.0f;
351 dst->f[1] = src0->f[1] == src1->f[1] ? 1.0f : 0.0f;
352 dst->f[2] = src0->f[2] == src1->f[2] ? 1.0f : 0.0f;
353 dst->f[3] = src0->f[3] == src1->f[3] ? 1.0f : 0.0f;
354 }
355
356 static void
357 micro_sge(union tgsi_exec_channel *dst,
358 const union tgsi_exec_channel *src0,
359 const union tgsi_exec_channel *src1)
360 {
361 dst->f[0] = src0->f[0] >= src1->f[0] ? 1.0f : 0.0f;
362 dst->f[1] = src0->f[1] >= src1->f[1] ? 1.0f : 0.0f;
363 dst->f[2] = src0->f[2] >= src1->f[2] ? 1.0f : 0.0f;
364 dst->f[3] = src0->f[3] >= src1->f[3] ? 1.0f : 0.0f;
365 }
366
367 static void
368 micro_sgn(union tgsi_exec_channel *dst,
369 const union tgsi_exec_channel *src)
370 {
371 dst->f[0] = src->f[0] < 0.0f ? -1.0f : src->f[0] > 0.0f ? 1.0f : 0.0f;
372 dst->f[1] = src->f[1] < 0.0f ? -1.0f : src->f[1] > 0.0f ? 1.0f : 0.0f;
373 dst->f[2] = src->f[2] < 0.0f ? -1.0f : src->f[2] > 0.0f ? 1.0f : 0.0f;
374 dst->f[3] = src->f[3] < 0.0f ? -1.0f : src->f[3] > 0.0f ? 1.0f : 0.0f;
375 }
376
377 static void
378 micro_sgt(union tgsi_exec_channel *dst,
379 const union tgsi_exec_channel *src0,
380 const union tgsi_exec_channel *src1)
381 {
382 dst->f[0] = src0->f[0] > src1->f[0] ? 1.0f : 0.0f;
383 dst->f[1] = src0->f[1] > src1->f[1] ? 1.0f : 0.0f;
384 dst->f[2] = src0->f[2] > src1->f[2] ? 1.0f : 0.0f;
385 dst->f[3] = src0->f[3] > src1->f[3] ? 1.0f : 0.0f;
386 }
387
388 static void
389 micro_sin(union tgsi_exec_channel *dst,
390 const union tgsi_exec_channel *src)
391 {
392 dst->f[0] = sinf(src->f[0]);
393 dst->f[1] = sinf(src->f[1]);
394 dst->f[2] = sinf(src->f[2]);
395 dst->f[3] = sinf(src->f[3]);
396 }
397
398 static void
399 micro_sle(union tgsi_exec_channel *dst,
400 const union tgsi_exec_channel *src0,
401 const union tgsi_exec_channel *src1)
402 {
403 dst->f[0] = src0->f[0] <= src1->f[0] ? 1.0f : 0.0f;
404 dst->f[1] = src0->f[1] <= src1->f[1] ? 1.0f : 0.0f;
405 dst->f[2] = src0->f[2] <= src1->f[2] ? 1.0f : 0.0f;
406 dst->f[3] = src0->f[3] <= src1->f[3] ? 1.0f : 0.0f;
407 }
408
409 static void
410 micro_slt(union tgsi_exec_channel *dst,
411 const union tgsi_exec_channel *src0,
412 const union tgsi_exec_channel *src1)
413 {
414 dst->f[0] = src0->f[0] < src1->f[0] ? 1.0f : 0.0f;
415 dst->f[1] = src0->f[1] < src1->f[1] ? 1.0f : 0.0f;
416 dst->f[2] = src0->f[2] < src1->f[2] ? 1.0f : 0.0f;
417 dst->f[3] = src0->f[3] < src1->f[3] ? 1.0f : 0.0f;
418 }
419
420 static void
421 micro_sne(union tgsi_exec_channel *dst,
422 const union tgsi_exec_channel *src0,
423 const union tgsi_exec_channel *src1)
424 {
425 dst->f[0] = src0->f[0] != src1->f[0] ? 1.0f : 0.0f;
426 dst->f[1] = src0->f[1] != src1->f[1] ? 1.0f : 0.0f;
427 dst->f[2] = src0->f[2] != src1->f[2] ? 1.0f : 0.0f;
428 dst->f[3] = src0->f[3] != src1->f[3] ? 1.0f : 0.0f;
429 }
430
431 static void
432 micro_trunc(union tgsi_exec_channel *dst,
433 const union tgsi_exec_channel *src)
434 {
435 dst->f[0] = (float)(int)src->f[0];
436 dst->f[1] = (float)(int)src->f[1];
437 dst->f[2] = (float)(int)src->f[2];
438 dst->f[3] = (float)(int)src->f[3];
439 }
440
441
442 #define CHAN_X 0
443 #define CHAN_Y 1
444 #define CHAN_Z 2
445 #define CHAN_W 3
446
447 enum tgsi_exec_datatype {
448 TGSI_EXEC_DATA_FLOAT,
449 TGSI_EXEC_DATA_INT,
450 TGSI_EXEC_DATA_UINT
451 };
452
453 /*
454 * Shorthand locations of various utility registers (_I = Index, _C = Channel)
455 */
456 #define TEMP_0_I TGSI_EXEC_TEMP_00000000_I
457 #define TEMP_0_C TGSI_EXEC_TEMP_00000000_C
458 #define TEMP_7F_I TGSI_EXEC_TEMP_7FFFFFFF_I
459 #define TEMP_7F_C TGSI_EXEC_TEMP_7FFFFFFF_C
460 #define TEMP_80_I TGSI_EXEC_TEMP_80000000_I
461 #define TEMP_80_C TGSI_EXEC_TEMP_80000000_C
462 #define TEMP_FF_I TGSI_EXEC_TEMP_FFFFFFFF_I
463 #define TEMP_FF_C TGSI_EXEC_TEMP_FFFFFFFF_C
464 #define TEMP_1_I TGSI_EXEC_TEMP_ONE_I
465 #define TEMP_1_C TGSI_EXEC_TEMP_ONE_C
466 #define TEMP_2_I TGSI_EXEC_TEMP_TWO_I
467 #define TEMP_2_C TGSI_EXEC_TEMP_TWO_C
468 #define TEMP_128_I TGSI_EXEC_TEMP_128_I
469 #define TEMP_128_C TGSI_EXEC_TEMP_128_C
470 #define TEMP_M128_I TGSI_EXEC_TEMP_MINUS_128_I
471 #define TEMP_M128_C TGSI_EXEC_TEMP_MINUS_128_C
472 #define TEMP_KILMASK_I TGSI_EXEC_TEMP_KILMASK_I
473 #define TEMP_KILMASK_C TGSI_EXEC_TEMP_KILMASK_C
474 #define TEMP_OUTPUT_I TGSI_EXEC_TEMP_OUTPUT_I
475 #define TEMP_OUTPUT_C TGSI_EXEC_TEMP_OUTPUT_C
476 #define TEMP_PRIMITIVE_I TGSI_EXEC_TEMP_PRIMITIVE_I
477 #define TEMP_PRIMITIVE_C TGSI_EXEC_TEMP_PRIMITIVE_C
478 #define TEMP_CC_I TGSI_EXEC_TEMP_CC_I
479 #define TEMP_CC_C TGSI_EXEC_TEMP_CC_C
480 #define TEMP_3_I TGSI_EXEC_TEMP_THREE_I
481 #define TEMP_3_C TGSI_EXEC_TEMP_THREE_C
482 #define TEMP_HALF_I TGSI_EXEC_TEMP_HALF_I
483 #define TEMP_HALF_C TGSI_EXEC_TEMP_HALF_C
484 #define TEMP_R0 TGSI_EXEC_TEMP_R0
485 #define TEMP_P0 TGSI_EXEC_TEMP_P0
486
487 #define IS_CHANNEL_ENABLED(INST, CHAN)\
488 ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
489
490 #define IS_CHANNEL_ENABLED2(INST, CHAN)\
491 ((INST).Dst[1].Register.WriteMask & (1 << (CHAN)))
492
493 #define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
494 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
495 if (IS_CHANNEL_ENABLED( INST, CHAN ))
496
497 #define FOR_EACH_ENABLED_CHANNEL2(INST, CHAN)\
498 for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)\
499 if (IS_CHANNEL_ENABLED2( INST, CHAN ))
500
501
502 /** The execution mask depends on the conditional mask and the loop mask */
503 #define UPDATE_EXEC_MASK(MACH) \
504 MACH->ExecMask = MACH->CondMask & MACH->LoopMask & MACH->ContMask & MACH->Switch.mask & MACH->FuncMask
505
506
507 static const union tgsi_exec_channel ZeroVec =
508 { { 0.0, 0.0, 0.0, 0.0 } };
509
510 static const union tgsi_exec_channel OneVec = {
511 {1.0f, 1.0f, 1.0f, 1.0f}
512 };
513
514
515 /**
516 * Assert that none of the float values in 'chan' are infinite or NaN.
517 * NaN and Inf may occur normally during program execution and should
518 * not lead to crashes, etc. But when debugging, it's helpful to catch
519 * them.
520 */
521 static INLINE void
522 check_inf_or_nan(const union tgsi_exec_channel *chan)
523 {
524 assert(!util_is_inf_or_nan((chan)->f[0]));
525 assert(!util_is_inf_or_nan((chan)->f[1]));
526 assert(!util_is_inf_or_nan((chan)->f[2]));
527 assert(!util_is_inf_or_nan((chan)->f[3]));
528 }
529
530
531 #ifdef DEBUG
532 static void
533 print_chan(const char *msg, const union tgsi_exec_channel *chan)
534 {
535 debug_printf("%s = {%f, %f, %f, %f}\n",
536 msg, chan->f[0], chan->f[1], chan->f[2], chan->f[3]);
537 }
538 #endif
539
540
541 #ifdef DEBUG
542 static void
543 print_temp(const struct tgsi_exec_machine *mach, uint index)
544 {
545 const struct tgsi_exec_vector *tmp = &mach->Temps[index];
546 int i;
547 debug_printf("Temp[%u] =\n", index);
548 for (i = 0; i < 4; i++) {
549 debug_printf(" %c: { %f, %f, %f, %f }\n",
550 "XYZW"[i],
551 tmp->xyzw[i].f[0],
552 tmp->xyzw[i].f[1],
553 tmp->xyzw[i].f[2],
554 tmp->xyzw[i].f[3]);
555 }
556 }
557 #endif
558
559
560 /**
561 * Check if there's a potential src/dst register data dependency when
562 * using SOA execution.
563 * Example:
564 * MOV T, T.yxwz;
565 * This would expand into:
566 * MOV t0, t1;
567 * MOV t1, t0;
568 * MOV t2, t3;
569 * MOV t3, t2;
570 * The second instruction will have the wrong value for t0 if executed as-is.
571 */
572 boolean
573 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst)
574 {
575 uint i, chan;
576
577 uint writemask = inst->Dst[0].Register.WriteMask;
578 if (writemask == TGSI_WRITEMASK_X ||
579 writemask == TGSI_WRITEMASK_Y ||
580 writemask == TGSI_WRITEMASK_Z ||
581 writemask == TGSI_WRITEMASK_W ||
582 writemask == TGSI_WRITEMASK_NONE) {
583 /* no chance of data dependency */
584 return FALSE;
585 }
586
587 /* loop over src regs */
588 for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
589 if ((inst->Src[i].Register.File ==
590 inst->Dst[0].Register.File) &&
591 (inst->Src[i].Register.Index ==
592 inst->Dst[0].Register.Index)) {
593 /* loop over dest channels */
594 uint channelsWritten = 0x0;
595 FOR_EACH_ENABLED_CHANNEL(*inst, chan) {
596 /* check if we're reading a channel that's been written */
597 uint swizzle = tgsi_util_get_full_src_register_swizzle(&inst->Src[i], chan);
598 if (channelsWritten & (1 << swizzle)) {
599 return TRUE;
600 }
601
602 channelsWritten |= (1 << chan);
603 }
604 }
605 }
606 return FALSE;
607 }
608
609
610 /**
611 * Initialize machine state by expanding tokens to full instructions,
612 * allocating temporary storage, setting up constants, etc.
613 * After this, we can call tgsi_exec_machine_run() many times.
614 */
615 void
616 tgsi_exec_machine_bind_shader(
617 struct tgsi_exec_machine *mach,
618 const struct tgsi_token *tokens,
619 uint numSamplers,
620 struct tgsi_sampler **samplers)
621 {
622 uint k;
623 struct tgsi_parse_context parse;
624 struct tgsi_exec_labels *labels = &mach->Labels;
625 struct tgsi_full_instruction *instructions;
626 struct tgsi_full_declaration *declarations;
627 uint maxInstructions = 10, numInstructions = 0;
628 uint maxDeclarations = 10, numDeclarations = 0;
629 uint instno = 0;
630
631 #if 0
632 tgsi_dump(tokens, 0);
633 #endif
634
635 util_init_math();
636
637 mach->Tokens = tokens;
638 mach->Samplers = samplers;
639
640 k = tgsi_parse_init (&parse, mach->Tokens);
641 if (k != TGSI_PARSE_OK) {
642 debug_printf( "Problem parsing!\n" );
643 return;
644 }
645
646 mach->Processor = parse.FullHeader.Processor.Processor;
647 mach->ImmLimit = 0;
648 labels->count = 0;
649
650 declarations = (struct tgsi_full_declaration *)
651 MALLOC( maxDeclarations * sizeof(struct tgsi_full_declaration) );
652
653 if (!declarations) {
654 return;
655 }
656
657 instructions = (struct tgsi_full_instruction *)
658 MALLOC( maxInstructions * sizeof(struct tgsi_full_instruction) );
659
660 if (!instructions) {
661 FREE( declarations );
662 return;
663 }
664
665 while( !tgsi_parse_end_of_tokens( &parse ) ) {
666 uint pointer = parse.Position;
667 uint i;
668
669 tgsi_parse_token( &parse );
670 switch( parse.FullToken.Token.Type ) {
671 case TGSI_TOKEN_TYPE_DECLARATION:
672 /* save expanded declaration */
673 if (numDeclarations == maxDeclarations) {
674 declarations = REALLOC(declarations,
675 maxDeclarations
676 * sizeof(struct tgsi_full_declaration),
677 (maxDeclarations + 10)
678 * sizeof(struct tgsi_full_declaration));
679 maxDeclarations += 10;
680 }
681 if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_OUTPUT) {
682 unsigned reg;
683 for (reg = parse.FullToken.FullDeclaration.Range.First;
684 reg <= parse.FullToken.FullDeclaration.Range.Last;
685 ++reg) {
686 ++mach->NumOutputs;
687 }
688 }
689 memcpy(declarations + numDeclarations,
690 &parse.FullToken.FullDeclaration,
691 sizeof(declarations[0]));
692 numDeclarations++;
693 break;
694
695 case TGSI_TOKEN_TYPE_IMMEDIATE:
696 {
697 uint size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
698 assert( size <= 4 );
699 assert( mach->ImmLimit + 1 <= TGSI_EXEC_NUM_IMMEDIATES );
700
701 for( i = 0; i < size; i++ ) {
702 mach->Imms[mach->ImmLimit][i] =
703 parse.FullToken.FullImmediate.u[i].Float;
704 }
705 mach->ImmLimit += 1;
706 }
707 break;
708
709 case TGSI_TOKEN_TYPE_INSTRUCTION:
710 assert( labels->count < MAX_LABELS );
711
712 labels->labels[labels->count][0] = instno;
713 labels->labels[labels->count][1] = pointer;
714 labels->count++;
715
716 /* save expanded instruction */
717 if (numInstructions == maxInstructions) {
718 instructions = REALLOC(instructions,
719 maxInstructions
720 * sizeof(struct tgsi_full_instruction),
721 (maxInstructions + 10)
722 * sizeof(struct tgsi_full_instruction));
723 maxInstructions += 10;
724 }
725
726 memcpy(instructions + numInstructions,
727 &parse.FullToken.FullInstruction,
728 sizeof(instructions[0]));
729
730 numInstructions++;
731 break;
732
733 case TGSI_TOKEN_TYPE_PROPERTY:
734 break;
735
736 default:
737 assert( 0 );
738 }
739 }
740 tgsi_parse_free (&parse);
741
742 if (mach->Declarations) {
743 FREE( mach->Declarations );
744 }
745 mach->Declarations = declarations;
746 mach->NumDeclarations = numDeclarations;
747
748 if (mach->Instructions) {
749 FREE( mach->Instructions );
750 }
751 mach->Instructions = instructions;
752 mach->NumInstructions = numInstructions;
753 }
754
755
756 struct tgsi_exec_machine *
757 tgsi_exec_machine_create( void )
758 {
759 struct tgsi_exec_machine *mach;
760 uint i;
761
762 mach = align_malloc( sizeof *mach, 16 );
763 if (!mach)
764 goto fail;
765
766 memset(mach, 0, sizeof(*mach));
767
768 mach->Addrs = &mach->Temps[TGSI_EXEC_TEMP_ADDR];
769 mach->MaxGeometryShaderOutputs = TGSI_MAX_TOTAL_VERTICES;
770 mach->Predicates = &mach->Temps[TGSI_EXEC_TEMP_P0];
771
772 /* Setup constants. */
773 for( i = 0; i < 4; i++ ) {
774 mach->Temps[TEMP_0_I].xyzw[TEMP_0_C].u[i] = 0x00000000;
775 mach->Temps[TEMP_7F_I].xyzw[TEMP_7F_C].u[i] = 0x7FFFFFFF;
776 mach->Temps[TEMP_80_I].xyzw[TEMP_80_C].u[i] = 0x80000000;
777 mach->Temps[TEMP_FF_I].xyzw[TEMP_FF_C].u[i] = 0xFFFFFFFF;
778 mach->Temps[TEMP_1_I].xyzw[TEMP_1_C].f[i] = 1.0f;
779 mach->Temps[TEMP_2_I].xyzw[TEMP_2_C].f[i] = 2.0f;
780 mach->Temps[TEMP_128_I].xyzw[TEMP_128_C].f[i] = 128.0f;
781 mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C].f[i] = -128.0f;
782 mach->Temps[TEMP_3_I].xyzw[TEMP_3_C].f[i] = 3.0f;
783 mach->Temps[TEMP_HALF_I].xyzw[TEMP_HALF_C].f[i] = 0.5f;
784 }
785
786 #ifdef DEBUG
787 /* silence warnings */
788 (void) print_chan;
789 (void) print_temp;
790 #endif
791
792 return mach;
793
794 fail:
795 align_free(mach);
796 return NULL;
797 }
798
799
800 void
801 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach)
802 {
803 if (mach) {
804 FREE(mach->Instructions);
805 FREE(mach->Declarations);
806 }
807
808 align_free(mach);
809 }
810
811 static void
812 micro_add(union tgsi_exec_channel *dst,
813 const union tgsi_exec_channel *src0,
814 const union tgsi_exec_channel *src1)
815 {
816 dst->f[0] = src0->f[0] + src1->f[0];
817 dst->f[1] = src0->f[1] + src1->f[1];
818 dst->f[2] = src0->f[2] + src1->f[2];
819 dst->f[3] = src0->f[3] + src1->f[3];
820 }
821
822 static void
823 micro_div(
824 union tgsi_exec_channel *dst,
825 const union tgsi_exec_channel *src0,
826 const union tgsi_exec_channel *src1 )
827 {
828 if (src1->f[0] != 0) {
829 dst->f[0] = src0->f[0] / src1->f[0];
830 }
831 if (src1->f[1] != 0) {
832 dst->f[1] = src0->f[1] / src1->f[1];
833 }
834 if (src1->f[2] != 0) {
835 dst->f[2] = src0->f[2] / src1->f[2];
836 }
837 if (src1->f[3] != 0) {
838 dst->f[3] = src0->f[3] / src1->f[3];
839 }
840 }
841
842 static void
843 micro_float_clamp(union tgsi_exec_channel *dst,
844 const union tgsi_exec_channel *src)
845 {
846 uint i;
847
848 for (i = 0; i < 4; i++) {
849 if (src->f[i] > 0.0f) {
850 if (src->f[i] > 1.884467e+019f)
851 dst->f[i] = 1.884467e+019f;
852 else if (src->f[i] < 5.42101e-020f)
853 dst->f[i] = 5.42101e-020f;
854 else
855 dst->f[i] = src->f[i];
856 }
857 else {
858 if (src->f[i] < -1.884467e+019f)
859 dst->f[i] = -1.884467e+019f;
860 else if (src->f[i] > -5.42101e-020f)
861 dst->f[i] = -5.42101e-020f;
862 else
863 dst->f[i] = src->f[i];
864 }
865 }
866 }
867
868 static void
869 micro_lt(
870 union tgsi_exec_channel *dst,
871 const union tgsi_exec_channel *src0,
872 const union tgsi_exec_channel *src1,
873 const union tgsi_exec_channel *src2,
874 const union tgsi_exec_channel *src3 )
875 {
876 dst->f[0] = src0->f[0] < src1->f[0] ? src2->f[0] : src3->f[0];
877 dst->f[1] = src0->f[1] < src1->f[1] ? src2->f[1] : src3->f[1];
878 dst->f[2] = src0->f[2] < src1->f[2] ? src2->f[2] : src3->f[2];
879 dst->f[3] = src0->f[3] < src1->f[3] ? src2->f[3] : src3->f[3];
880 }
881
882 static void
883 micro_max(union tgsi_exec_channel *dst,
884 const union tgsi_exec_channel *src0,
885 const union tgsi_exec_channel *src1)
886 {
887 dst->f[0] = src0->f[0] > src1->f[0] ? src0->f[0] : src1->f[0];
888 dst->f[1] = src0->f[1] > src1->f[1] ? src0->f[1] : src1->f[1];
889 dst->f[2] = src0->f[2] > src1->f[2] ? src0->f[2] : src1->f[2];
890 dst->f[3] = src0->f[3] > src1->f[3] ? src0->f[3] : src1->f[3];
891 }
892
893 static void
894 micro_min(union tgsi_exec_channel *dst,
895 const union tgsi_exec_channel *src0,
896 const union tgsi_exec_channel *src1)
897 {
898 dst->f[0] = src0->f[0] < src1->f[0] ? src0->f[0] : src1->f[0];
899 dst->f[1] = src0->f[1] < src1->f[1] ? src0->f[1] : src1->f[1];
900 dst->f[2] = src0->f[2] < src1->f[2] ? src0->f[2] : src1->f[2];
901 dst->f[3] = src0->f[3] < src1->f[3] ? src0->f[3] : src1->f[3];
902 }
903
904 static void
905 micro_mul(union tgsi_exec_channel *dst,
906 const union tgsi_exec_channel *src0,
907 const union tgsi_exec_channel *src1)
908 {
909 dst->f[0] = src0->f[0] * src1->f[0];
910 dst->f[1] = src0->f[1] * src1->f[1];
911 dst->f[2] = src0->f[2] * src1->f[2];
912 dst->f[3] = src0->f[3] * src1->f[3];
913 }
914
915 #if 0
916 static void
917 micro_imul64(
918 union tgsi_exec_channel *dst0,
919 union tgsi_exec_channel *dst1,
920 const union tgsi_exec_channel *src0,
921 const union tgsi_exec_channel *src1 )
922 {
923 dst1->i[0] = src0->i[0] * src1->i[0];
924 dst1->i[1] = src0->i[1] * src1->i[1];
925 dst1->i[2] = src0->i[2] * src1->i[2];
926 dst1->i[3] = src0->i[3] * src1->i[3];
927 dst0->i[0] = 0;
928 dst0->i[1] = 0;
929 dst0->i[2] = 0;
930 dst0->i[3] = 0;
931 }
932 #endif
933
934 #if 0
935 static void
936 micro_umul64(
937 union tgsi_exec_channel *dst0,
938 union tgsi_exec_channel *dst1,
939 const union tgsi_exec_channel *src0,
940 const union tgsi_exec_channel *src1 )
941 {
942 dst1->u[0] = src0->u[0] * src1->u[0];
943 dst1->u[1] = src0->u[1] * src1->u[1];
944 dst1->u[2] = src0->u[2] * src1->u[2];
945 dst1->u[3] = src0->u[3] * src1->u[3];
946 dst0->u[0] = 0;
947 dst0->u[1] = 0;
948 dst0->u[2] = 0;
949 dst0->u[3] = 0;
950 }
951 #endif
952
953
954 #if 0
955 static void
956 micro_movc(
957 union tgsi_exec_channel *dst,
958 const union tgsi_exec_channel *src0,
959 const union tgsi_exec_channel *src1,
960 const union tgsi_exec_channel *src2 )
961 {
962 dst->u[0] = src0->u[0] ? src1->u[0] : src2->u[0];
963 dst->u[1] = src0->u[1] ? src1->u[1] : src2->u[1];
964 dst->u[2] = src0->u[2] ? src1->u[2] : src2->u[2];
965 dst->u[3] = src0->u[3] ? src1->u[3] : src2->u[3];
966 }
967 #endif
968
969 static void
970 micro_neg(
971 union tgsi_exec_channel *dst,
972 const union tgsi_exec_channel *src )
973 {
974 dst->f[0] = -src->f[0];
975 dst->f[1] = -src->f[1];
976 dst->f[2] = -src->f[2];
977 dst->f[3] = -src->f[3];
978 }
979
980 static void
981 micro_pow(
982 union tgsi_exec_channel *dst,
983 const union tgsi_exec_channel *src0,
984 const union tgsi_exec_channel *src1 )
985 {
986 #if FAST_MATH
987 dst->f[0] = util_fast_pow( src0->f[0], src1->f[0] );
988 dst->f[1] = util_fast_pow( src0->f[1], src1->f[1] );
989 dst->f[2] = util_fast_pow( src0->f[2], src1->f[2] );
990 dst->f[3] = util_fast_pow( src0->f[3], src1->f[3] );
991 #else
992 dst->f[0] = powf( src0->f[0], src1->f[0] );
993 dst->f[1] = powf( src0->f[1], src1->f[1] );
994 dst->f[2] = powf( src0->f[2], src1->f[2] );
995 dst->f[3] = powf( src0->f[3], src1->f[3] );
996 #endif
997 }
998
999 static void
1000 micro_sub(union tgsi_exec_channel *dst,
1001 const union tgsi_exec_channel *src0,
1002 const union tgsi_exec_channel *src1)
1003 {
1004 dst->f[0] = src0->f[0] - src1->f[0];
1005 dst->f[1] = src0->f[1] - src1->f[1];
1006 dst->f[2] = src0->f[2] - src1->f[2];
1007 dst->f[3] = src0->f[3] - src1->f[3];
1008 }
1009
1010 static void
1011 fetch_src_file_channel(const struct tgsi_exec_machine *mach,
1012 const uint file,
1013 const uint swizzle,
1014 const union tgsi_exec_channel *index,
1015 const union tgsi_exec_channel *index2D,
1016 union tgsi_exec_channel *chan)
1017 {
1018 uint i;
1019
1020 switch (file) {
1021 case TGSI_FILE_CONSTANT:
1022 for (i = 0; i < QUAD_SIZE; i++) {
1023 assert(index2D->i[i] >= 0 && index2D->i[i] < PIPE_MAX_CONSTANT_BUFFERS);
1024 assert(mach->Consts[index2D->i[i]]);
1025
1026 if (index->i[i] < 0) {
1027 chan->u[i] = 0;
1028 } else {
1029 const uint *p = (const uint *)mach->Consts[index2D->i[i]];
1030
1031 chan->u[i] = p[index->i[i] * 4 + swizzle];
1032 }
1033 }
1034 break;
1035
1036 case TGSI_FILE_INPUT:
1037 case TGSI_FILE_SYSTEM_VALUE:
1038 for (i = 0; i < QUAD_SIZE; i++) {
1039 /* XXX: 2D indexing */
1040 chan->u[i] = mach->Inputs[index2D->i[i] * TGSI_EXEC_MAX_INPUT_ATTRIBS + index->i[i]].xyzw[swizzle].u[i];
1041 }
1042 break;
1043
1044 case TGSI_FILE_TEMPORARY:
1045 for (i = 0; i < QUAD_SIZE; i++) {
1046 assert(index->i[i] < TGSI_EXEC_NUM_TEMPS);
1047 assert(index2D->i[i] == 0);
1048
1049 chan->u[i] = mach->Temps[index->i[i]].xyzw[swizzle].u[i];
1050 }
1051 break;
1052
1053 case TGSI_FILE_IMMEDIATE:
1054 for (i = 0; i < QUAD_SIZE; i++) {
1055 assert(index->i[i] >= 0 && index->i[i] < (int)mach->ImmLimit);
1056 assert(index2D->i[i] == 0);
1057
1058 chan->f[i] = mach->Imms[index->i[i]][swizzle];
1059 }
1060 break;
1061
1062 case TGSI_FILE_ADDRESS:
1063 for (i = 0; i < QUAD_SIZE; i++) {
1064 assert(index->i[i] >= 0);
1065 assert(index2D->i[i] == 0);
1066
1067 chan->u[i] = mach->Addrs[index->i[i]].xyzw[swizzle].u[i];
1068 }
1069 break;
1070
1071 case TGSI_FILE_PREDICATE:
1072 for (i = 0; i < QUAD_SIZE; i++) {
1073 assert(index->i[i] >= 0 && index->i[i] < TGSI_EXEC_NUM_PREDS);
1074 assert(index2D->i[i] == 0);
1075
1076 chan->u[i] = mach->Predicates[0].xyzw[swizzle].u[i];
1077 }
1078 break;
1079
1080 case TGSI_FILE_OUTPUT:
1081 /* vertex/fragment output vars can be read too */
1082 for (i = 0; i < QUAD_SIZE; i++) {
1083 assert(index->i[i] >= 0);
1084 assert(index2D->i[i] == 0);
1085
1086 chan->u[i] = mach->Outputs[index->i[i]].xyzw[swizzle].u[i];
1087 }
1088 break;
1089
1090 default:
1091 assert(0);
1092 for (i = 0; i < QUAD_SIZE; i++) {
1093 chan->u[i] = 0;
1094 }
1095 }
1096 }
1097
1098 static void
1099 fetch_source(const struct tgsi_exec_machine *mach,
1100 union tgsi_exec_channel *chan,
1101 const struct tgsi_full_src_register *reg,
1102 const uint chan_index,
1103 enum tgsi_exec_datatype src_datatype)
1104 {
1105 union tgsi_exec_channel index;
1106 union tgsi_exec_channel index2D;
1107 uint swizzle;
1108
1109 /* We start with a direct index into a register file.
1110 *
1111 * file[1],
1112 * where:
1113 * file = Register.File
1114 * [1] = Register.Index
1115 */
1116 index.i[0] =
1117 index.i[1] =
1118 index.i[2] =
1119 index.i[3] = reg->Register.Index;
1120
1121 /* There is an extra source register that indirectly subscripts
1122 * a register file. The direct index now becomes an offset
1123 * that is being added to the indirect register.
1124 *
1125 * file[ind[2].x+1],
1126 * where:
1127 * ind = Indirect.File
1128 * [2] = Indirect.Index
1129 * .x = Indirect.SwizzleX
1130 */
1131 if (reg->Register.Indirect) {
1132 union tgsi_exec_channel index2;
1133 union tgsi_exec_channel indir_index;
1134 const uint execmask = mach->ExecMask;
1135 uint i;
1136
1137 /* which address register (always zero now) */
1138 index2.i[0] =
1139 index2.i[1] =
1140 index2.i[2] =
1141 index2.i[3] = reg->Indirect.Index;
1142
1143 /* get current value of address register[swizzle] */
1144 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1145 fetch_src_file_channel(mach,
1146 reg->Indirect.File,
1147 swizzle,
1148 &index2,
1149 &ZeroVec,
1150 &indir_index);
1151
1152 /* add value of address register to the offset */
1153 index.i[0] += indir_index.i[0];
1154 index.i[1] += indir_index.i[1];
1155 index.i[2] += indir_index.i[2];
1156 index.i[3] += indir_index.i[3];
1157
1158 /* for disabled execution channels, zero-out the index to
1159 * avoid using a potential garbage value.
1160 */
1161 for (i = 0; i < QUAD_SIZE; i++) {
1162 if ((execmask & (1 << i)) == 0)
1163 index.i[i] = 0;
1164 }
1165 }
1166
1167 /* There is an extra source register that is a second
1168 * subscript to a register file. Effectively it means that
1169 * the register file is actually a 2D array of registers.
1170 *
1171 * file[3][1],
1172 * where:
1173 * [3] = Dimension.Index
1174 */
1175 if (reg->Register.Dimension) {
1176 index2D.i[0] =
1177 index2D.i[1] =
1178 index2D.i[2] =
1179 index2D.i[3] = reg->Dimension.Index;
1180
1181 /* Again, the second subscript index can be addressed indirectly
1182 * identically to the first one.
1183 * Nothing stops us from indirectly addressing the indirect register,
1184 * but there is no need for that, so we won't exercise it.
1185 *
1186 * file[ind[4].y+3][1],
1187 * where:
1188 * ind = DimIndirect.File
1189 * [4] = DimIndirect.Index
1190 * .y = DimIndirect.SwizzleX
1191 */
1192 if (reg->Dimension.Indirect) {
1193 union tgsi_exec_channel index2;
1194 union tgsi_exec_channel indir_index;
1195 const uint execmask = mach->ExecMask;
1196 uint i;
1197
1198 index2.i[0] =
1199 index2.i[1] =
1200 index2.i[2] =
1201 index2.i[3] = reg->DimIndirect.Index;
1202
1203 swizzle = tgsi_util_get_src_register_swizzle( &reg->DimIndirect, CHAN_X );
1204 fetch_src_file_channel(mach,
1205 reg->DimIndirect.File,
1206 swizzle,
1207 &index2,
1208 &ZeroVec,
1209 &indir_index);
1210
1211 index2D.i[0] += indir_index.i[0];
1212 index2D.i[1] += indir_index.i[1];
1213 index2D.i[2] += indir_index.i[2];
1214 index2D.i[3] += indir_index.i[3];
1215
1216 /* for disabled execution channels, zero-out the index to
1217 * avoid using a potential garbage value.
1218 */
1219 for (i = 0; i < QUAD_SIZE; i++) {
1220 if ((execmask & (1 << i)) == 0) {
1221 index2D.i[i] = 0;
1222 }
1223 }
1224 }
1225
1226 /* If by any chance there was a need for a 3D array of register
1227 * files, we would have to check whether Dimension is followed
1228 * by a dimension register and continue the saga.
1229 */
1230 } else {
1231 index2D.i[0] =
1232 index2D.i[1] =
1233 index2D.i[2] =
1234 index2D.i[3] = 0;
1235 }
1236
1237 swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
1238 fetch_src_file_channel(mach,
1239 reg->Register.File,
1240 swizzle,
1241 &index,
1242 &index2D,
1243 chan);
1244
1245 if (reg->Register.Absolute) {
1246 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1247 micro_abs(chan, chan);
1248 } else {
1249 micro_iabs(chan, chan);
1250 }
1251 }
1252
1253 if (reg->Register.Negate) {
1254 if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
1255 micro_neg(chan, chan);
1256 } else {
1257 micro_ineg(chan, chan);
1258 }
1259 }
1260 }
1261
1262 static void
1263 store_dest(struct tgsi_exec_machine *mach,
1264 const union tgsi_exec_channel *chan,
1265 const struct tgsi_full_dst_register *reg,
1266 const struct tgsi_full_instruction *inst,
1267 uint chan_index,
1268 enum tgsi_exec_datatype dst_datatype)
1269 {
1270 uint i;
1271 union tgsi_exec_channel null;
1272 union tgsi_exec_channel *dst;
1273 uint execmask = mach->ExecMask;
1274 int offset = 0; /* indirection offset */
1275 int index;
1276
1277 /* for debugging */
1278 if (0 && dst_datatype == TGSI_EXEC_DATA_FLOAT) {
1279 check_inf_or_nan(chan);
1280 }
1281
1282 /* There is an extra source register that indirectly subscripts
1283 * a register file. The direct index now becomes an offset
1284 * that is being added to the indirect register.
1285 *
1286 * file[ind[2].x+1],
1287 * where:
1288 * ind = Indirect.File
1289 * [2] = Indirect.Index
1290 * .x = Indirect.SwizzleX
1291 */
1292 if (reg->Register.Indirect) {
1293 union tgsi_exec_channel index;
1294 union tgsi_exec_channel indir_index;
1295 uint swizzle;
1296
1297 /* which address register (always zero for now) */
1298 index.i[0] =
1299 index.i[1] =
1300 index.i[2] =
1301 index.i[3] = reg->Indirect.Index;
1302
1303 /* get current value of address register[swizzle] */
1304 swizzle = tgsi_util_get_src_register_swizzle( &reg->Indirect, CHAN_X );
1305
1306 /* fetch values from the address/indirection register */
1307 fetch_src_file_channel(mach,
1308 reg->Indirect.File,
1309 swizzle,
1310 &index,
1311 &ZeroVec,
1312 &indir_index);
1313
1314 /* save indirection offset */
1315 offset = indir_index.i[0];
1316 }
1317
1318 switch (reg->Register.File) {
1319 case TGSI_FILE_NULL:
1320 dst = &null;
1321 break;
1322
1323 case TGSI_FILE_OUTPUT:
1324 index = mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0]
1325 + reg->Register.Index;
1326 dst = &mach->Outputs[offset + index].xyzw[chan_index];
1327 #if 0
1328 if (TGSI_PROCESSOR_GEOMETRY == mach->Processor) {
1329 fprintf(stderr, "STORING OUT[%d] mask(%d), = (", offset + index, execmask);
1330 for (i = 0; i < QUAD_SIZE; i++)
1331 if (execmask & (1 << i))
1332 fprintf(stderr, "%f, ", chan->f[i]);
1333 fprintf(stderr, ")\n");
1334 }
1335 #endif
1336 break;
1337
1338 case TGSI_FILE_TEMPORARY:
1339 index = reg->Register.Index;
1340 assert( index < TGSI_EXEC_NUM_TEMPS );
1341 dst = &mach->Temps[offset + index].xyzw[chan_index];
1342 break;
1343
1344 case TGSI_FILE_ADDRESS:
1345 index = reg->Register.Index;
1346 dst = &mach->Addrs[index].xyzw[chan_index];
1347 break;
1348
1349 case TGSI_FILE_PREDICATE:
1350 index = reg->Register.Index;
1351 assert(index < TGSI_EXEC_NUM_PREDS);
1352 dst = &mach->Predicates[index].xyzw[chan_index];
1353 break;
1354
1355 default:
1356 assert( 0 );
1357 return;
1358 }
1359
1360 if (inst->Instruction.Predicate) {
1361 uint swizzle;
1362 union tgsi_exec_channel *pred;
1363
1364 switch (chan_index) {
1365 case CHAN_X:
1366 swizzle = inst->Predicate.SwizzleX;
1367 break;
1368 case CHAN_Y:
1369 swizzle = inst->Predicate.SwizzleY;
1370 break;
1371 case CHAN_Z:
1372 swizzle = inst->Predicate.SwizzleZ;
1373 break;
1374 case CHAN_W:
1375 swizzle = inst->Predicate.SwizzleW;
1376 break;
1377 default:
1378 assert(0);
1379 return;
1380 }
1381
1382 assert(inst->Predicate.Index == 0);
1383
1384 pred = &mach->Predicates[inst->Predicate.Index].xyzw[swizzle];
1385
1386 if (inst->Predicate.Negate) {
1387 for (i = 0; i < QUAD_SIZE; i++) {
1388 if (pred->u[i]) {
1389 execmask &= ~(1 << i);
1390 }
1391 }
1392 } else {
1393 for (i = 0; i < QUAD_SIZE; i++) {
1394 if (!pred->u[i]) {
1395 execmask &= ~(1 << i);
1396 }
1397 }
1398 }
1399 }
1400
1401 switch (inst->Instruction.Saturate) {
1402 case TGSI_SAT_NONE:
1403 for (i = 0; i < QUAD_SIZE; i++)
1404 if (execmask & (1 << i))
1405 dst->i[i] = chan->i[i];
1406 break;
1407
1408 case TGSI_SAT_ZERO_ONE:
1409 for (i = 0; i < QUAD_SIZE; i++)
1410 if (execmask & (1 << i)) {
1411 if (chan->f[i] < 0.0f)
1412 dst->f[i] = 0.0f;
1413 else if (chan->f[i] > 1.0f)
1414 dst->f[i] = 1.0f;
1415 else
1416 dst->i[i] = chan->i[i];
1417 }
1418 break;
1419
1420 case TGSI_SAT_MINUS_PLUS_ONE:
1421 for (i = 0; i < QUAD_SIZE; i++)
1422 if (execmask & (1 << i)) {
1423 if (chan->f[i] < -1.0f)
1424 dst->f[i] = -1.0f;
1425 else if (chan->f[i] > 1.0f)
1426 dst->f[i] = 1.0f;
1427 else
1428 dst->i[i] = chan->i[i];
1429 }
1430 break;
1431
1432 default:
1433 assert( 0 );
1434 }
1435 }
1436
1437 #define FETCH(VAL,INDEX,CHAN)\
1438 fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
1439
1440 #define STORE(VAL,INDEX,CHAN)\
1441 store_dest(mach, VAL, &inst->Dst[INDEX], inst, CHAN, TGSI_EXEC_DATA_FLOAT)
1442
1443
1444 /**
1445 * Execute ARB-style KIL which is predicated by a src register.
1446 * Kill fragment if any of the four values is less than zero.
1447 */
1448 static void
1449 exec_kil(struct tgsi_exec_machine *mach,
1450 const struct tgsi_full_instruction *inst)
1451 {
1452 uint uniquemask;
1453 uint chan_index;
1454 uint kilmask = 0; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1455 union tgsi_exec_channel r[1];
1456
1457 /* This mask stores component bits that were already tested. */
1458 uniquemask = 0;
1459
1460 for (chan_index = 0; chan_index < 4; chan_index++)
1461 {
1462 uint swizzle;
1463 uint i;
1464
1465 /* unswizzle channel */
1466 swizzle = tgsi_util_get_full_src_register_swizzle (
1467 &inst->Src[0],
1468 chan_index);
1469
1470 /* check if the component has not been already tested */
1471 if (uniquemask & (1 << swizzle))
1472 continue;
1473 uniquemask |= 1 << swizzle;
1474
1475 FETCH(&r[0], 0, chan_index);
1476 for (i = 0; i < 4; i++)
1477 if (r[0].f[i] < 0.0f)
1478 kilmask |= 1 << i;
1479 }
1480
1481 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1482 }
1483
1484 /**
1485 * Execute NVIDIA-style KIL which is predicated by a condition code.
1486 * Kill fragment if the condition code is TRUE.
1487 */
1488 static void
1489 exec_kilp(struct tgsi_exec_machine *mach,
1490 const struct tgsi_full_instruction *inst)
1491 {
1492 uint kilmask; /* bit 0 = pixel 0, bit 1 = pixel 1, etc */
1493
1494 /* "unconditional" kil */
1495 kilmask = mach->ExecMask;
1496 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= kilmask;
1497 }
1498
1499 static void
1500 emit_vertex(struct tgsi_exec_machine *mach)
1501 {
1502 /* FIXME: check for exec mask correctly
1503 unsigned i;
1504 for (i = 0; i < QUAD_SIZE; ++i) {
1505 if ((mach->ExecMask & (1 << i)))
1506 */
1507 if (mach->ExecMask) {
1508 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] += mach->NumOutputs;
1509 mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]]++;
1510 }
1511 }
1512
1513 static void
1514 emit_primitive(struct tgsi_exec_machine *mach)
1515 {
1516 unsigned *prim_count = &mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0];
1517 /* FIXME: check for exec mask correctly
1518 unsigned i;
1519 for (i = 0; i < QUAD_SIZE; ++i) {
1520 if ((mach->ExecMask & (1 << i)))
1521 */
1522 if (mach->ExecMask) {
1523 ++(*prim_count);
1524 debug_assert((*prim_count * mach->NumOutputs) < mach->MaxGeometryShaderOutputs);
1525 mach->Primitives[*prim_count] = 0;
1526 }
1527 }
1528
1529 /*
1530 * Fetch four texture samples using STR texture coordinates.
1531 */
1532 static void
1533 fetch_texel( struct tgsi_sampler *sampler,
1534 const union tgsi_exec_channel *s,
1535 const union tgsi_exec_channel *t,
1536 const union tgsi_exec_channel *p,
1537 const union tgsi_exec_channel *c0,
1538 enum tgsi_sampler_control control,
1539 union tgsi_exec_channel *r,
1540 union tgsi_exec_channel *g,
1541 union tgsi_exec_channel *b,
1542 union tgsi_exec_channel *a )
1543 {
1544 uint j;
1545 float rgba[NUM_CHANNELS][QUAD_SIZE];
1546
1547 sampler->get_samples(sampler, s->f, t->f, p->f, c0->f, control, rgba);
1548
1549 for (j = 0; j < 4; j++) {
1550 r->f[j] = rgba[0][j];
1551 g->f[j] = rgba[1][j];
1552 b->f[j] = rgba[2][j];
1553 a->f[j] = rgba[3][j];
1554 }
1555 }
1556
1557
1558 #define TEX_MODIFIER_NONE 0
1559 #define TEX_MODIFIER_PROJECTED 1
1560 #define TEX_MODIFIER_LOD_BIAS 2
1561 #define TEX_MODIFIER_EXPLICIT_LOD 3
1562
1563
1564 static void
1565 exec_tex(struct tgsi_exec_machine *mach,
1566 const struct tgsi_full_instruction *inst,
1567 uint modifier)
1568 {
1569 const uint unit = inst->Src[1].Register.Index;
1570 union tgsi_exec_channel r[4];
1571 const union tgsi_exec_channel *lod = &ZeroVec;
1572 enum tgsi_sampler_control control;
1573 uint chan_index;
1574
1575 if (modifier != TEX_MODIFIER_NONE) {
1576 FETCH(&r[3], 0, CHAN_W);
1577 if (modifier != TEX_MODIFIER_PROJECTED) {
1578 lod = &r[3];
1579 }
1580 }
1581
1582 if (modifier == TEX_MODIFIER_EXPLICIT_LOD) {
1583 control = tgsi_sampler_lod_explicit;
1584 } else {
1585 control = tgsi_sampler_lod_bias;
1586 }
1587
1588 switch (inst->Texture.Texture) {
1589 case TGSI_TEXTURE_1D:
1590 case TGSI_TEXTURE_SHADOW1D:
1591 FETCH(&r[0], 0, CHAN_X);
1592
1593 if (modifier == TEX_MODIFIER_PROJECTED) {
1594 micro_div(&r[0], &r[0], &r[3]);
1595 }
1596
1597 fetch_texel(mach->Samplers[unit],
1598 &r[0], &ZeroVec, &ZeroVec, lod, /* S, T, P, LOD */
1599 control,
1600 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1601 break;
1602
1603 case TGSI_TEXTURE_2D:
1604 case TGSI_TEXTURE_RECT:
1605 case TGSI_TEXTURE_SHADOW2D:
1606 case TGSI_TEXTURE_SHADOWRECT:
1607 FETCH(&r[0], 0, CHAN_X);
1608 FETCH(&r[1], 0, CHAN_Y);
1609 FETCH(&r[2], 0, CHAN_Z);
1610
1611 if (modifier == TEX_MODIFIER_PROJECTED) {
1612 micro_div(&r[0], &r[0], &r[3]);
1613 micro_div(&r[1], &r[1], &r[3]);
1614 micro_div(&r[2], &r[2], &r[3]);
1615 }
1616
1617 fetch_texel(mach->Samplers[unit],
1618 &r[0], &r[1], &r[2], lod, /* S, T, P, LOD */
1619 control,
1620 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1621 break;
1622
1623 case TGSI_TEXTURE_3D:
1624 case TGSI_TEXTURE_CUBE:
1625 FETCH(&r[0], 0, CHAN_X);
1626 FETCH(&r[1], 0, CHAN_Y);
1627 FETCH(&r[2], 0, CHAN_Z);
1628
1629 if (modifier == TEX_MODIFIER_PROJECTED) {
1630 micro_div(&r[0], &r[0], &r[3]);
1631 micro_div(&r[1], &r[1], &r[3]);
1632 micro_div(&r[2], &r[2], &r[3]);
1633 }
1634
1635 fetch_texel(mach->Samplers[unit],
1636 &r[0], &r[1], &r[2], lod,
1637 control,
1638 &r[0], &r[1], &r[2], &r[3]);
1639 break;
1640
1641 default:
1642 assert(0);
1643 }
1644
1645 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1646 STORE(&r[chan_index], 0, chan_index);
1647 }
1648 }
1649
1650 static void
1651 exec_txd(struct tgsi_exec_machine *mach,
1652 const struct tgsi_full_instruction *inst)
1653 {
1654 const uint unit = inst->Src[3].Register.Index;
1655 union tgsi_exec_channel r[4];
1656 uint chan_index;
1657
1658 /*
1659 * XXX: This is fake TXD -- the derivatives are not taken into account, yet.
1660 */
1661
1662 switch (inst->Texture.Texture) {
1663 case TGSI_TEXTURE_1D:
1664 case TGSI_TEXTURE_SHADOW1D:
1665
1666 FETCH(&r[0], 0, CHAN_X);
1667
1668 fetch_texel(mach->Samplers[unit],
1669 &r[0], &ZeroVec, &ZeroVec, &ZeroVec, /* S, T, P, BIAS */
1670 tgsi_sampler_lod_bias,
1671 &r[0], &r[1], &r[2], &r[3]); /* R, G, B, A */
1672 break;
1673
1674 case TGSI_TEXTURE_2D:
1675 case TGSI_TEXTURE_RECT:
1676 case TGSI_TEXTURE_SHADOW2D:
1677 case TGSI_TEXTURE_SHADOWRECT:
1678
1679 FETCH(&r[0], 0, CHAN_X);
1680 FETCH(&r[1], 0, CHAN_Y);
1681 FETCH(&r[2], 0, CHAN_Z);
1682
1683 fetch_texel(mach->Samplers[unit],
1684 &r[0], &r[1], &r[2], &ZeroVec, /* inputs */
1685 tgsi_sampler_lod_bias,
1686 &r[0], &r[1], &r[2], &r[3]); /* outputs */
1687 break;
1688
1689 case TGSI_TEXTURE_3D:
1690 case TGSI_TEXTURE_CUBE:
1691
1692 FETCH(&r[0], 0, CHAN_X);
1693 FETCH(&r[1], 0, CHAN_Y);
1694 FETCH(&r[2], 0, CHAN_Z);
1695
1696 fetch_texel(mach->Samplers[unit],
1697 &r[0], &r[1], &r[2], &ZeroVec,
1698 tgsi_sampler_lod_bias,
1699 &r[0], &r[1], &r[2], &r[3]);
1700 break;
1701
1702 default:
1703 assert(0);
1704 }
1705
1706 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
1707 STORE(&r[chan_index], 0, chan_index);
1708 }
1709 }
1710
1711
1712 /**
1713 * Evaluate a constant-valued coefficient at the position of the
1714 * current quad.
1715 */
1716 static void
1717 eval_constant_coef(
1718 struct tgsi_exec_machine *mach,
1719 unsigned attrib,
1720 unsigned chan )
1721 {
1722 unsigned i;
1723
1724 for( i = 0; i < QUAD_SIZE; i++ ) {
1725 mach->Inputs[attrib].xyzw[chan].f[i] = mach->InterpCoefs[attrib].a0[chan];
1726 }
1727 }
1728
1729 /**
1730 * Evaluate a linear-valued coefficient at the position of the
1731 * current quad.
1732 */
1733 static void
1734 eval_linear_coef(
1735 struct tgsi_exec_machine *mach,
1736 unsigned attrib,
1737 unsigned chan )
1738 {
1739 const float x = mach->QuadPos.xyzw[0].f[0];
1740 const float y = mach->QuadPos.xyzw[1].f[0];
1741 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1742 const float dady = mach->InterpCoefs[attrib].dady[chan];
1743 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1744 mach->Inputs[attrib].xyzw[chan].f[0] = a0;
1745 mach->Inputs[attrib].xyzw[chan].f[1] = a0 + dadx;
1746 mach->Inputs[attrib].xyzw[chan].f[2] = a0 + dady;
1747 mach->Inputs[attrib].xyzw[chan].f[3] = a0 + dadx + dady;
1748 }
1749
1750 /**
1751 * Evaluate a perspective-valued coefficient at the position of the
1752 * current quad.
1753 */
1754 static void
1755 eval_perspective_coef(
1756 struct tgsi_exec_machine *mach,
1757 unsigned attrib,
1758 unsigned chan )
1759 {
1760 const float x = mach->QuadPos.xyzw[0].f[0];
1761 const float y = mach->QuadPos.xyzw[1].f[0];
1762 const float dadx = mach->InterpCoefs[attrib].dadx[chan];
1763 const float dady = mach->InterpCoefs[attrib].dady[chan];
1764 const float a0 = mach->InterpCoefs[attrib].a0[chan] + dadx * x + dady * y;
1765 const float *w = mach->QuadPos.xyzw[3].f;
1766 /* divide by W here */
1767 mach->Inputs[attrib].xyzw[chan].f[0] = a0 / w[0];
1768 mach->Inputs[attrib].xyzw[chan].f[1] = (a0 + dadx) / w[1];
1769 mach->Inputs[attrib].xyzw[chan].f[2] = (a0 + dady) / w[2];
1770 mach->Inputs[attrib].xyzw[chan].f[3] = (a0 + dadx + dady) / w[3];
1771 }
1772
1773
1774 typedef void (* eval_coef_func)(
1775 struct tgsi_exec_machine *mach,
1776 unsigned attrib,
1777 unsigned chan );
1778
1779 static void
1780 exec_declaration(struct tgsi_exec_machine *mach,
1781 const struct tgsi_full_declaration *decl)
1782 {
1783 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
1784 if (decl->Declaration.File == TGSI_FILE_INPUT ||
1785 decl->Declaration.File == TGSI_FILE_SYSTEM_VALUE) {
1786 uint first, last, mask;
1787
1788 first = decl->Range.First;
1789 last = decl->Range.Last;
1790 mask = decl->Declaration.UsageMask;
1791
1792 /* XXX we could remove this special-case code since
1793 * mach->InterpCoefs[first].a0 should already have the
1794 * front/back-face value. But we should first update the
1795 * ureg code to emit the right UsageMask value (WRITEMASK_X).
1796 * Then, we could remove the tgsi_exec_machine::Face field.
1797 */
1798 if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
1799 uint i;
1800
1801 assert(decl->Semantic.Index == 0);
1802 assert(first == last);
1803
1804 for (i = 0; i < QUAD_SIZE; i++) {
1805 mach->Inputs[first].xyzw[0].f[i] = mach->Face;
1806 }
1807 } else {
1808 eval_coef_func eval;
1809 uint i, j;
1810
1811 switch (decl->Declaration.Interpolate) {
1812 case TGSI_INTERPOLATE_CONSTANT:
1813 eval = eval_constant_coef;
1814 break;
1815
1816 case TGSI_INTERPOLATE_LINEAR:
1817 eval = eval_linear_coef;
1818 break;
1819
1820 case TGSI_INTERPOLATE_PERSPECTIVE:
1821 eval = eval_perspective_coef;
1822 break;
1823
1824 default:
1825 assert(0);
1826 return;
1827 }
1828
1829 for (j = 0; j < NUM_CHANNELS; j++) {
1830 if (mask & (1 << j)) {
1831 for (i = first; i <= last; i++) {
1832 eval(mach, i, j);
1833 }
1834 }
1835 }
1836 }
1837 }
1838 }
1839 }
1840
1841 typedef void (* micro_unary_op)(union tgsi_exec_channel *dst,
1842 const union tgsi_exec_channel *src);
1843
1844 static void
1845 exec_scalar_unary(struct tgsi_exec_machine *mach,
1846 const struct tgsi_full_instruction *inst,
1847 micro_unary_op op,
1848 enum tgsi_exec_datatype dst_datatype,
1849 enum tgsi_exec_datatype src_datatype)
1850 {
1851 unsigned int chan;
1852 union tgsi_exec_channel src;
1853 union tgsi_exec_channel dst;
1854
1855 fetch_source(mach, &src, &inst->Src[0], CHAN_X, src_datatype);
1856 op(&dst, &src);
1857 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1858 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1859 store_dest(mach, &dst, &inst->Dst[0], inst, chan, dst_datatype);
1860 }
1861 }
1862 }
1863
1864 static void
1865 exec_vector_unary(struct tgsi_exec_machine *mach,
1866 const struct tgsi_full_instruction *inst,
1867 micro_unary_op op,
1868 enum tgsi_exec_datatype dst_datatype,
1869 enum tgsi_exec_datatype src_datatype)
1870 {
1871 unsigned int chan;
1872 struct tgsi_exec_vector dst;
1873
1874 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1875 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1876 union tgsi_exec_channel src;
1877
1878 fetch_source(mach, &src, &inst->Src[0], chan, src_datatype);
1879 op(&dst.xyzw[chan], &src);
1880 }
1881 }
1882 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1883 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1884 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1885 }
1886 }
1887 }
1888
1889 typedef void (* micro_binary_op)(union tgsi_exec_channel *dst,
1890 const union tgsi_exec_channel *src0,
1891 const union tgsi_exec_channel *src1);
1892
1893 static void
1894 exec_vector_binary(struct tgsi_exec_machine *mach,
1895 const struct tgsi_full_instruction *inst,
1896 micro_binary_op op,
1897 enum tgsi_exec_datatype dst_datatype,
1898 enum tgsi_exec_datatype src_datatype)
1899 {
1900 unsigned int chan;
1901 struct tgsi_exec_vector dst;
1902
1903 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1904 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1905 union tgsi_exec_channel src[2];
1906
1907 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1908 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1909 op(&dst.xyzw[chan], &src[0], &src[1]);
1910 }
1911 }
1912 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1913 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1914 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1915 }
1916 }
1917 }
1918
1919 typedef void (* micro_trinary_op)(union tgsi_exec_channel *dst,
1920 const union tgsi_exec_channel *src0,
1921 const union tgsi_exec_channel *src1,
1922 const union tgsi_exec_channel *src2);
1923
1924 static void
1925 exec_vector_trinary(struct tgsi_exec_machine *mach,
1926 const struct tgsi_full_instruction *inst,
1927 micro_trinary_op op,
1928 enum tgsi_exec_datatype dst_datatype,
1929 enum tgsi_exec_datatype src_datatype)
1930 {
1931 unsigned int chan;
1932 struct tgsi_exec_vector dst;
1933
1934 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1935 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1936 union tgsi_exec_channel src[3];
1937
1938 fetch_source(mach, &src[0], &inst->Src[0], chan, src_datatype);
1939 fetch_source(mach, &src[1], &inst->Src[1], chan, src_datatype);
1940 fetch_source(mach, &src[2], &inst->Src[2], chan, src_datatype);
1941 op(&dst.xyzw[chan], &src[0], &src[1], &src[2]);
1942 }
1943 }
1944 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1945 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1946 store_dest(mach, &dst.xyzw[chan], &inst->Dst[0], inst, chan, dst_datatype);
1947 }
1948 }
1949 }
1950
1951 static void
1952 exec_dp3(struct tgsi_exec_machine *mach,
1953 const struct tgsi_full_instruction *inst)
1954 {
1955 unsigned int chan;
1956 union tgsi_exec_channel arg[3];
1957
1958 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1959 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1960 micro_mul(&arg[2], &arg[0], &arg[1]);
1961
1962 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
1963 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1964 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1965 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
1966 }
1967
1968 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1969 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1970 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
1971 }
1972 }
1973 }
1974
1975 static void
1976 exec_dp4(struct tgsi_exec_machine *mach,
1977 const struct tgsi_full_instruction *inst)
1978 {
1979 unsigned int chan;
1980 union tgsi_exec_channel arg[3];
1981
1982 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1983 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
1984 micro_mul(&arg[2], &arg[0], &arg[1]);
1985
1986 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
1987 fetch_source(mach, &arg[0], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
1988 fetch_source(mach, &arg[1], &inst->Src[1], chan, TGSI_EXEC_DATA_FLOAT);
1989 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
1990 }
1991
1992 for (chan = 0; chan < NUM_CHANNELS; chan++) {
1993 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
1994 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
1995 }
1996 }
1997 }
1998
1999 static void
2000 exec_dp2a(struct tgsi_exec_machine *mach,
2001 const struct tgsi_full_instruction *inst)
2002 {
2003 unsigned int chan;
2004 union tgsi_exec_channel arg[3];
2005
2006 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2007 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2008 micro_mul(&arg[2], &arg[0], &arg[1]);
2009
2010 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2011 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2012 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
2013
2014 fetch_source(mach, &arg[1], &inst->Src[2], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2015 micro_add(&arg[0], &arg[0], &arg[1]);
2016
2017 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2018 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2019 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2020 }
2021 }
2022 }
2023
2024 static void
2025 exec_dph(struct tgsi_exec_machine *mach,
2026 const struct tgsi_full_instruction *inst)
2027 {
2028 unsigned int chan;
2029 union tgsi_exec_channel arg[3];
2030
2031 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2032 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2033 micro_mul(&arg[2], &arg[0], &arg[1]);
2034
2035 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2036 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2037 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2038
2039 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2040 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Z, TGSI_EXEC_DATA_FLOAT);
2041 micro_mad(&arg[0], &arg[0], &arg[1], &arg[2]);
2042
2043 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_W, TGSI_EXEC_DATA_FLOAT);
2044 micro_add(&arg[0], &arg[0], &arg[1]);
2045
2046 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2047 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2048 store_dest(mach, &arg[0], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2049 }
2050 }
2051 }
2052
2053 static void
2054 exec_dp2(struct tgsi_exec_machine *mach,
2055 const struct tgsi_full_instruction *inst)
2056 {
2057 unsigned int chan;
2058 union tgsi_exec_channel arg[3];
2059
2060 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2061 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2062 micro_mul(&arg[2], &arg[0], &arg[1]);
2063
2064 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2065 fetch_source(mach, &arg[1], &inst->Src[1], CHAN_Y, TGSI_EXEC_DATA_FLOAT);
2066 micro_mad(&arg[2], &arg[0], &arg[1], &arg[2]);
2067
2068 for (chan = 0; chan < NUM_CHANNELS; chan++) {
2069 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2070 store_dest(mach, &arg[2], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2071 }
2072 }
2073 }
2074
2075 static void
2076 exec_nrm4(struct tgsi_exec_machine *mach,
2077 const struct tgsi_full_instruction *inst)
2078 {
2079 unsigned int chan;
2080 union tgsi_exec_channel arg[4];
2081 union tgsi_exec_channel scale;
2082
2083 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2084 micro_mul(&scale, &arg[0], &arg[0]);
2085
2086 for (chan = CHAN_Y; chan <= CHAN_W; chan++) {
2087 union tgsi_exec_channel product;
2088
2089 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2090 micro_mul(&product, &arg[chan], &arg[chan]);
2091 micro_add(&scale, &scale, &product);
2092 }
2093
2094 micro_rsq(&scale, &scale);
2095
2096 for (chan = CHAN_X; chan <= CHAN_W; chan++) {
2097 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2098 micro_mul(&arg[chan], &arg[chan], &scale);
2099 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2100 }
2101 }
2102 }
2103
2104 static void
2105 exec_nrm3(struct tgsi_exec_machine *mach,
2106 const struct tgsi_full_instruction *inst)
2107 {
2108 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {
2109 unsigned int chan;
2110 union tgsi_exec_channel arg[3];
2111 union tgsi_exec_channel scale;
2112
2113 fetch_source(mach, &arg[0], &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_FLOAT);
2114 micro_mul(&scale, &arg[0], &arg[0]);
2115
2116 for (chan = CHAN_Y; chan <= CHAN_Z; chan++) {
2117 union tgsi_exec_channel product;
2118
2119 fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
2120 micro_mul(&product, &arg[chan], &arg[chan]);
2121 micro_add(&scale, &scale, &product);
2122 }
2123
2124 micro_rsq(&scale, &scale);
2125
2126 for (chan = CHAN_X; chan <= CHAN_Z; chan++) {
2127 if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
2128 micro_mul(&arg[chan], &arg[chan], &scale);
2129 store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
2130 }
2131 }
2132 }
2133
2134 if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
2135 store_dest(mach, &OneVec, &inst->Dst[0], inst, CHAN_W, TGSI_EXEC_DATA_FLOAT);
2136 }
2137 }
2138
2139 static void
2140 exec_break(struct tgsi_exec_machine *mach)
2141 {
2142 if (mach->BreakType == TGSI_EXEC_BREAK_INSIDE_LOOP) {
2143 /* turn off loop channels for each enabled exec channel */
2144 mach->LoopMask &= ~mach->ExecMask;
2145 /* Todo: if mach->LoopMask == 0, jump to end of loop */
2146 UPDATE_EXEC_MASK(mach);
2147 } else {
2148 assert(mach->BreakType == TGSI_EXEC_BREAK_INSIDE_SWITCH);
2149
2150 mach->Switch.mask = 0x0;
2151
2152 UPDATE_EXEC_MASK(mach);
2153 }
2154 }
2155
2156 static void
2157 exec_switch(struct tgsi_exec_machine *mach,
2158 const struct tgsi_full_instruction *inst)
2159 {
2160 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
2161 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
2162
2163 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
2164 fetch_source(mach, &mach->Switch.selector, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2165 mach->Switch.mask = 0x0;
2166 mach->Switch.defaultMask = 0x0;
2167
2168 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
2169 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_SWITCH;
2170
2171 UPDATE_EXEC_MASK(mach);
2172 }
2173
2174 static void
2175 exec_case(struct tgsi_exec_machine *mach,
2176 const struct tgsi_full_instruction *inst)
2177 {
2178 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2179 union tgsi_exec_channel src;
2180 uint mask = 0;
2181
2182 fetch_source(mach, &src, &inst->Src[0], CHAN_X, TGSI_EXEC_DATA_UINT);
2183
2184 if (mach->Switch.selector.u[0] == src.u[0]) {
2185 mask |= 0x1;
2186 }
2187 if (mach->Switch.selector.u[1] == src.u[1]) {
2188 mask |= 0x2;
2189 }
2190 if (mach->Switch.selector.u[2] == src.u[2]) {
2191 mask |= 0x4;
2192 }
2193 if (mach->Switch.selector.u[3] == src.u[3]) {
2194 mask |= 0x8;
2195 }
2196
2197 mach->Switch.defaultMask |= mask;
2198
2199 mach->Switch.mask |= mask & prevMask;
2200
2201 UPDATE_EXEC_MASK(mach);
2202 }
2203
2204 static void
2205 exec_default(struct tgsi_exec_machine *mach)
2206 {
2207 uint prevMask = mach->SwitchStack[mach->SwitchStackTop - 1].mask;
2208
2209 mach->Switch.mask |= ~mach->Switch.defaultMask & prevMask;
2210
2211 UPDATE_EXEC_MASK(mach);
2212 }
2213
2214 static void
2215 exec_endswitch(struct tgsi_exec_machine *mach)
2216 {
2217 mach->Switch = mach->SwitchStack[--mach->SwitchStackTop];
2218 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
2219
2220 UPDATE_EXEC_MASK(mach);
2221 }
2222
2223 static void
2224 micro_i2f(union tgsi_exec_channel *dst,
2225 const union tgsi_exec_channel *src)
2226 {
2227 dst->f[0] = (float)src->i[0];
2228 dst->f[1] = (float)src->i[1];
2229 dst->f[2] = (float)src->i[2];
2230 dst->f[3] = (float)src->i[3];
2231 }
2232
2233 static void
2234 micro_not(union tgsi_exec_channel *dst,
2235 const union tgsi_exec_channel *src)
2236 {
2237 dst->u[0] = ~src->u[0];
2238 dst->u[1] = ~src->u[1];
2239 dst->u[2] = ~src->u[2];
2240 dst->u[3] = ~src->u[3];
2241 }
2242
2243 static void
2244 micro_shl(union tgsi_exec_channel *dst,
2245 const union tgsi_exec_channel *src0,
2246 const union tgsi_exec_channel *src1)
2247 {
2248 dst->u[0] = src0->u[0] << src1->u[0];
2249 dst->u[1] = src0->u[1] << src1->u[1];
2250 dst->u[2] = src0->u[2] << src1->u[2];
2251 dst->u[3] = src0->u[3] << src1->u[3];
2252 }
2253
2254 static void
2255 micro_and(union tgsi_exec_channel *dst,
2256 const union tgsi_exec_channel *src0,
2257 const union tgsi_exec_channel *src1)
2258 {
2259 dst->u[0] = src0->u[0] & src1->u[0];
2260 dst->u[1] = src0->u[1] & src1->u[1];
2261 dst->u[2] = src0->u[2] & src1->u[2];
2262 dst->u[3] = src0->u[3] & src1->u[3];
2263 }
2264
2265 static void
2266 micro_or(union tgsi_exec_channel *dst,
2267 const union tgsi_exec_channel *src0,
2268 const union tgsi_exec_channel *src1)
2269 {
2270 dst->u[0] = src0->u[0] | src1->u[0];
2271 dst->u[1] = src0->u[1] | src1->u[1];
2272 dst->u[2] = src0->u[2] | src1->u[2];
2273 dst->u[3] = src0->u[3] | src1->u[3];
2274 }
2275
2276 static void
2277 micro_xor(union tgsi_exec_channel *dst,
2278 const union tgsi_exec_channel *src0,
2279 const union tgsi_exec_channel *src1)
2280 {
2281 dst->u[0] = src0->u[0] ^ src1->u[0];
2282 dst->u[1] = src0->u[1] ^ src1->u[1];
2283 dst->u[2] = src0->u[2] ^ src1->u[2];
2284 dst->u[3] = src0->u[3] ^ src1->u[3];
2285 }
2286
2287 static void
2288 micro_f2i(union tgsi_exec_channel *dst,
2289 const union tgsi_exec_channel *src)
2290 {
2291 dst->i[0] = (int)src->f[0];
2292 dst->i[1] = (int)src->f[1];
2293 dst->i[2] = (int)src->f[2];
2294 dst->i[3] = (int)src->f[3];
2295 }
2296
2297 static void
2298 micro_idiv(union tgsi_exec_channel *dst,
2299 const union tgsi_exec_channel *src0,
2300 const union tgsi_exec_channel *src1)
2301 {
2302 dst->i[0] = src0->i[0] / src1->i[0];
2303 dst->i[1] = src0->i[1] / src1->i[1];
2304 dst->i[2] = src0->i[2] / src1->i[2];
2305 dst->i[3] = src0->i[3] / src1->i[3];
2306 }
2307
2308 static void
2309 micro_imax(union tgsi_exec_channel *dst,
2310 const union tgsi_exec_channel *src0,
2311 const union tgsi_exec_channel *src1)
2312 {
2313 dst->i[0] = src0->i[0] > src1->i[0] ? src0->i[0] : src1->i[0];
2314 dst->i[1] = src0->i[1] > src1->i[1] ? src0->i[1] : src1->i[1];
2315 dst->i[2] = src0->i[2] > src1->i[2] ? src0->i[2] : src1->i[2];
2316 dst->i[3] = src0->i[3] > src1->i[3] ? src0->i[3] : src1->i[3];
2317 }
2318
2319 static void
2320 micro_imin(union tgsi_exec_channel *dst,
2321 const union tgsi_exec_channel *src0,
2322 const union tgsi_exec_channel *src1)
2323 {
2324 dst->i[0] = src0->i[0] < src1->i[0] ? src0->i[0] : src1->i[0];
2325 dst->i[1] = src0->i[1] < src1->i[1] ? src0->i[1] : src1->i[1];
2326 dst->i[2] = src0->i[2] < src1->i[2] ? src0->i[2] : src1->i[2];
2327 dst->i[3] = src0->i[3] < src1->i[3] ? src0->i[3] : src1->i[3];
2328 }
2329
2330 static void
2331 micro_isge(union tgsi_exec_channel *dst,
2332 const union tgsi_exec_channel *src0,
2333 const union tgsi_exec_channel *src1)
2334 {
2335 dst->i[0] = src0->i[0] >= src1->i[0] ? -1 : 0;
2336 dst->i[1] = src0->i[1] >= src1->i[1] ? -1 : 0;
2337 dst->i[2] = src0->i[2] >= src1->i[2] ? -1 : 0;
2338 dst->i[3] = src0->i[3] >= src1->i[3] ? -1 : 0;
2339 }
2340
2341 static void
2342 micro_ishr(union tgsi_exec_channel *dst,
2343 const union tgsi_exec_channel *src0,
2344 const union tgsi_exec_channel *src1)
2345 {
2346 dst->i[0] = src0->i[0] >> src1->i[0];
2347 dst->i[1] = src0->i[1] >> src1->i[1];
2348 dst->i[2] = src0->i[2] >> src1->i[2];
2349 dst->i[3] = src0->i[3] >> src1->i[3];
2350 }
2351
2352 static void
2353 micro_islt(union tgsi_exec_channel *dst,
2354 const union tgsi_exec_channel *src0,
2355 const union tgsi_exec_channel *src1)
2356 {
2357 dst->i[0] = src0->i[0] < src1->i[0] ? -1 : 0;
2358 dst->i[1] = src0->i[1] < src1->i[1] ? -1 : 0;
2359 dst->i[2] = src0->i[2] < src1->i[2] ? -1 : 0;
2360 dst->i[3] = src0->i[3] < src1->i[3] ? -1 : 0;
2361 }
2362
2363 static void
2364 micro_f2u(union tgsi_exec_channel *dst,
2365 const union tgsi_exec_channel *src)
2366 {
2367 dst->u[0] = (uint)src->f[0];
2368 dst->u[1] = (uint)src->f[1];
2369 dst->u[2] = (uint)src->f[2];
2370 dst->u[3] = (uint)src->f[3];
2371 }
2372
2373 static void
2374 micro_u2f(union tgsi_exec_channel *dst,
2375 const union tgsi_exec_channel *src)
2376 {
2377 dst->f[0] = (float)src->u[0];
2378 dst->f[1] = (float)src->u[1];
2379 dst->f[2] = (float)src->u[2];
2380 dst->f[3] = (float)src->u[3];
2381 }
2382
2383 static void
2384 micro_uadd(union tgsi_exec_channel *dst,
2385 const union tgsi_exec_channel *src0,
2386 const union tgsi_exec_channel *src1)
2387 {
2388 dst->u[0] = src0->u[0] + src1->u[0];
2389 dst->u[1] = src0->u[1] + src1->u[1];
2390 dst->u[2] = src0->u[2] + src1->u[2];
2391 dst->u[3] = src0->u[3] + src1->u[3];
2392 }
2393
2394 static void
2395 micro_udiv(union tgsi_exec_channel *dst,
2396 const union tgsi_exec_channel *src0,
2397 const union tgsi_exec_channel *src1)
2398 {
2399 dst->u[0] = src0->u[0] / src1->u[0];
2400 dst->u[1] = src0->u[1] / src1->u[1];
2401 dst->u[2] = src0->u[2] / src1->u[2];
2402 dst->u[3] = src0->u[3] / src1->u[3];
2403 }
2404
2405 static void
2406 micro_umad(union tgsi_exec_channel *dst,
2407 const union tgsi_exec_channel *src0,
2408 const union tgsi_exec_channel *src1,
2409 const union tgsi_exec_channel *src2)
2410 {
2411 dst->u[0] = src0->u[0] * src1->u[0] + src2->u[0];
2412 dst->u[1] = src0->u[1] * src1->u[1] + src2->u[1];
2413 dst->u[2] = src0->u[2] * src1->u[2] + src2->u[2];
2414 dst->u[3] = src0->u[3] * src1->u[3] + src2->u[3];
2415 }
2416
2417 static void
2418 micro_umax(union tgsi_exec_channel *dst,
2419 const union tgsi_exec_channel *src0,
2420 const union tgsi_exec_channel *src1)
2421 {
2422 dst->u[0] = src0->u[0] > src1->u[0] ? src0->u[0] : src1->u[0];
2423 dst->u[1] = src0->u[1] > src1->u[1] ? src0->u[1] : src1->u[1];
2424 dst->u[2] = src0->u[2] > src1->u[2] ? src0->u[2] : src1->u[2];
2425 dst->u[3] = src0->u[3] > src1->u[3] ? src0->u[3] : src1->u[3];
2426 }
2427
2428 static void
2429 micro_umin(union tgsi_exec_channel *dst,
2430 const union tgsi_exec_channel *src0,
2431 const union tgsi_exec_channel *src1)
2432 {
2433 dst->u[0] = src0->u[0] < src1->u[0] ? src0->u[0] : src1->u[0];
2434 dst->u[1] = src0->u[1] < src1->u[1] ? src0->u[1] : src1->u[1];
2435 dst->u[2] = src0->u[2] < src1->u[2] ? src0->u[2] : src1->u[2];
2436 dst->u[3] = src0->u[3] < src1->u[3] ? src0->u[3] : src1->u[3];
2437 }
2438
2439 static void
2440 micro_umod(union tgsi_exec_channel *dst,
2441 const union tgsi_exec_channel *src0,
2442 const union tgsi_exec_channel *src1)
2443 {
2444 dst->u[0] = src0->u[0] % src1->u[0];
2445 dst->u[1] = src0->u[1] % src1->u[1];
2446 dst->u[2] = src0->u[2] % src1->u[2];
2447 dst->u[3] = src0->u[3] % src1->u[3];
2448 }
2449
2450 static void
2451 micro_umul(union tgsi_exec_channel *dst,
2452 const union tgsi_exec_channel *src0,
2453 const union tgsi_exec_channel *src1)
2454 {
2455 dst->u[0] = src0->u[0] * src1->u[0];
2456 dst->u[1] = src0->u[1] * src1->u[1];
2457 dst->u[2] = src0->u[2] * src1->u[2];
2458 dst->u[3] = src0->u[3] * src1->u[3];
2459 }
2460
2461 static void
2462 micro_useq(union tgsi_exec_channel *dst,
2463 const union tgsi_exec_channel *src0,
2464 const union tgsi_exec_channel *src1)
2465 {
2466 dst->u[0] = src0->u[0] == src1->u[0] ? ~0 : 0;
2467 dst->u[1] = src0->u[1] == src1->u[1] ? ~0 : 0;
2468 dst->u[2] = src0->u[2] == src1->u[2] ? ~0 : 0;
2469 dst->u[3] = src0->u[3] == src1->u[3] ? ~0 : 0;
2470 }
2471
2472 static void
2473 micro_usge(union tgsi_exec_channel *dst,
2474 const union tgsi_exec_channel *src0,
2475 const union tgsi_exec_channel *src1)
2476 {
2477 dst->u[0] = src0->u[0] >= src1->u[0] ? ~0 : 0;
2478 dst->u[1] = src0->u[1] >= src1->u[1] ? ~0 : 0;
2479 dst->u[2] = src0->u[2] >= src1->u[2] ? ~0 : 0;
2480 dst->u[3] = src0->u[3] >= src1->u[3] ? ~0 : 0;
2481 }
2482
2483 static void
2484 micro_ushr(union tgsi_exec_channel *dst,
2485 const union tgsi_exec_channel *src0,
2486 const union tgsi_exec_channel *src1)
2487 {
2488 dst->u[0] = src0->u[0] >> src1->u[0];
2489 dst->u[1] = src0->u[1] >> src1->u[1];
2490 dst->u[2] = src0->u[2] >> src1->u[2];
2491 dst->u[3] = src0->u[3] >> src1->u[3];
2492 }
2493
2494 static void
2495 micro_uslt(union tgsi_exec_channel *dst,
2496 const union tgsi_exec_channel *src0,
2497 const union tgsi_exec_channel *src1)
2498 {
2499 dst->u[0] = src0->u[0] < src1->u[0] ? ~0 : 0;
2500 dst->u[1] = src0->u[1] < src1->u[1] ? ~0 : 0;
2501 dst->u[2] = src0->u[2] < src1->u[2] ? ~0 : 0;
2502 dst->u[3] = src0->u[3] < src1->u[3] ? ~0 : 0;
2503 }
2504
2505 static void
2506 micro_usne(union tgsi_exec_channel *dst,
2507 const union tgsi_exec_channel *src0,
2508 const union tgsi_exec_channel *src1)
2509 {
2510 dst->u[0] = src0->u[0] != src1->u[0] ? ~0 : 0;
2511 dst->u[1] = src0->u[1] != src1->u[1] ? ~0 : 0;
2512 dst->u[2] = src0->u[2] != src1->u[2] ? ~0 : 0;
2513 dst->u[3] = src0->u[3] != src1->u[3] ? ~0 : 0;
2514 }
2515
2516 static void
2517 exec_instruction(
2518 struct tgsi_exec_machine *mach,
2519 const struct tgsi_full_instruction *inst,
2520 int *pc )
2521 {
2522 uint chan_index;
2523 union tgsi_exec_channel r[10];
2524 union tgsi_exec_channel d[8];
2525
2526 (*pc)++;
2527
2528 switch (inst->Instruction.Opcode) {
2529 case TGSI_OPCODE_ARL:
2530 exec_vector_unary(mach, inst, micro_arl, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
2531 break;
2532
2533 case TGSI_OPCODE_MOV:
2534 exec_vector_unary(mach, inst, micro_mov, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
2535 break;
2536
2537 case TGSI_OPCODE_LIT:
2538 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y ) || IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2539 FETCH( &r[0], 0, CHAN_X );
2540 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2541 micro_max(&d[CHAN_Y], &r[0], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2542 }
2543
2544 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2545 FETCH( &r[1], 0, CHAN_Y );
2546 micro_max( &r[1], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C] );
2547
2548 FETCH( &r[2], 0, CHAN_W );
2549 micro_min( &r[2], &r[2], &mach->Temps[TEMP_128_I].xyzw[TEMP_128_C] );
2550 micro_max( &r[2], &r[2], &mach->Temps[TEMP_M128_I].xyzw[TEMP_M128_C] );
2551 micro_pow( &r[1], &r[1], &r[2] );
2552 micro_lt(&d[CHAN_Z], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], &r[0], &r[1], &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C]);
2553 }
2554
2555 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2556 STORE(&d[CHAN_Y], 0, CHAN_Y);
2557 }
2558 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2559 STORE(&d[CHAN_Z], 0, CHAN_Z);
2560 }
2561 }
2562 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2563 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X );
2564 }
2565 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2566 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2567 }
2568 break;
2569
2570 case TGSI_OPCODE_RCP:
2571 exec_scalar_unary(mach, inst, micro_rcp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2572 break;
2573
2574 case TGSI_OPCODE_RSQ:
2575 exec_scalar_unary(mach, inst, micro_rsq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2576 break;
2577
2578 case TGSI_OPCODE_EXP:
2579 FETCH( &r[0], 0, CHAN_X );
2580 micro_flr( &r[1], &r[0] ); /* r1 = floor(r0) */
2581 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2582 micro_exp2( &r[2], &r[1] ); /* r2 = 2 ^ r1 */
2583 STORE( &r[2], 0, CHAN_X ); /* store r2 */
2584 }
2585 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2586 micro_sub( &r[2], &r[0], &r[1] ); /* r2 = r0 - r1 */
2587 STORE( &r[2], 0, CHAN_Y ); /* store r2 */
2588 }
2589 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2590 micro_exp2( &r[2], &r[0] ); /* r2 = 2 ^ r0 */
2591 STORE( &r[2], 0, CHAN_Z ); /* store r2 */
2592 }
2593 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2594 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2595 }
2596 break;
2597
2598 case TGSI_OPCODE_LOG:
2599 FETCH( &r[0], 0, CHAN_X );
2600 micro_abs( &r[2], &r[0] ); /* r2 = abs(r0) */
2601 micro_lg2( &r[1], &r[2] ); /* r1 = lg2(r2) */
2602 micro_flr( &r[0], &r[1] ); /* r0 = floor(r1) */
2603 if (IS_CHANNEL_ENABLED( *inst, CHAN_X )) {
2604 STORE( &r[0], 0, CHAN_X );
2605 }
2606 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2607 micro_exp2( &r[0], &r[0] ); /* r0 = 2 ^ r0 */
2608 micro_div( &r[0], &r[2], &r[0] ); /* r0 = r2 / r0 */
2609 STORE( &r[0], 0, CHAN_Y );
2610 }
2611 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2612 STORE( &r[1], 0, CHAN_Z );
2613 }
2614 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2615 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2616 }
2617 break;
2618
2619 case TGSI_OPCODE_MUL:
2620 exec_vector_binary(mach, inst, micro_mul, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2621 break;
2622
2623 case TGSI_OPCODE_ADD:
2624 exec_vector_binary(mach, inst, micro_add, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2625 break;
2626
2627 case TGSI_OPCODE_DP3:
2628 exec_dp3(mach, inst);
2629 break;
2630
2631 case TGSI_OPCODE_DP4:
2632 exec_dp4(mach, inst);
2633 break;
2634
2635 case TGSI_OPCODE_DST:
2636 if (IS_CHANNEL_ENABLED( *inst, CHAN_Y )) {
2637 FETCH( &r[0], 0, CHAN_Y );
2638 FETCH( &r[1], 1, CHAN_Y);
2639 micro_mul(&d[CHAN_Y], &r[0], &r[1]);
2640 }
2641 if (IS_CHANNEL_ENABLED( *inst, CHAN_Z )) {
2642 FETCH(&d[CHAN_Z], 0, CHAN_Z);
2643 }
2644 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2645 FETCH(&d[CHAN_W], 1, CHAN_W);
2646 }
2647
2648 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2649 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_X);
2650 }
2651 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2652 STORE(&d[CHAN_Y], 0, CHAN_Y);
2653 }
2654 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2655 STORE(&d[CHAN_Z], 0, CHAN_Z);
2656 }
2657 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2658 STORE(&d[CHAN_W], 0, CHAN_W);
2659 }
2660 break;
2661
2662 case TGSI_OPCODE_MIN:
2663 exec_vector_binary(mach, inst, micro_min, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2664 break;
2665
2666 case TGSI_OPCODE_MAX:
2667 exec_vector_binary(mach, inst, micro_max, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2668 break;
2669
2670 case TGSI_OPCODE_SLT:
2671 exec_vector_binary(mach, inst, micro_slt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2672 break;
2673
2674 case TGSI_OPCODE_SGE:
2675 exec_vector_binary(mach, inst, micro_sge, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2676 break;
2677
2678 case TGSI_OPCODE_MAD:
2679 exec_vector_trinary(mach, inst, micro_mad, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2680 break;
2681
2682 case TGSI_OPCODE_SUB:
2683 exec_vector_binary(mach, inst, micro_sub, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2684 break;
2685
2686 case TGSI_OPCODE_LRP:
2687 exec_vector_trinary(mach, inst, micro_lrp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2688 break;
2689
2690 case TGSI_OPCODE_CND:
2691 exec_vector_trinary(mach, inst, micro_cnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2692 break;
2693
2694 case TGSI_OPCODE_DP2A:
2695 exec_dp2a(mach, inst);
2696 break;
2697
2698 case TGSI_OPCODE_FRC:
2699 exec_vector_unary(mach, inst, micro_frc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2700 break;
2701
2702 case TGSI_OPCODE_CLAMP:
2703 exec_vector_trinary(mach, inst, micro_clamp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2704 break;
2705
2706 case TGSI_OPCODE_FLR:
2707 exec_vector_unary(mach, inst, micro_flr, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2708 break;
2709
2710 case TGSI_OPCODE_ROUND:
2711 exec_vector_unary(mach, inst, micro_rnd, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2712 break;
2713
2714 case TGSI_OPCODE_EX2:
2715 exec_scalar_unary(mach, inst, micro_exp2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2716 break;
2717
2718 case TGSI_OPCODE_LG2:
2719 exec_scalar_unary(mach, inst, micro_lg2, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2720 break;
2721
2722 case TGSI_OPCODE_POW:
2723 FETCH(&r[0], 0, CHAN_X);
2724 FETCH(&r[1], 1, CHAN_X);
2725
2726 micro_pow( &r[0], &r[0], &r[1] );
2727
2728 FOR_EACH_ENABLED_CHANNEL( *inst, chan_index ) {
2729 STORE( &r[0], 0, chan_index );
2730 }
2731 break;
2732
2733 case TGSI_OPCODE_XPD:
2734 FETCH(&r[0], 0, CHAN_Y);
2735 FETCH(&r[1], 1, CHAN_Z);
2736
2737 micro_mul( &r[2], &r[0], &r[1] );
2738
2739 FETCH(&r[3], 0, CHAN_Z);
2740 FETCH(&r[4], 1, CHAN_Y);
2741
2742 micro_mul( &r[5], &r[3], &r[4] );
2743 micro_sub(&d[CHAN_X], &r[2], &r[5]);
2744
2745 FETCH(&r[2], 1, CHAN_X);
2746
2747 micro_mul( &r[3], &r[3], &r[2] );
2748
2749 FETCH(&r[5], 0, CHAN_X);
2750
2751 micro_mul( &r[1], &r[1], &r[5] );
2752 micro_sub(&d[CHAN_Y], &r[3], &r[1]);
2753
2754 micro_mul( &r[5], &r[5], &r[4] );
2755 micro_mul( &r[0], &r[0], &r[2] );
2756 micro_sub(&d[CHAN_Z], &r[5], &r[0]);
2757
2758 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2759 STORE(&d[CHAN_X], 0, CHAN_X);
2760 }
2761 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2762 STORE(&d[CHAN_Y], 0, CHAN_Y);
2763 }
2764 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2765 STORE(&d[CHAN_Z], 0, CHAN_Z);
2766 }
2767 if (IS_CHANNEL_ENABLED( *inst, CHAN_W )) {
2768 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
2769 }
2770 break;
2771
2772 case TGSI_OPCODE_ABS:
2773 exec_vector_unary(mach, inst, micro_abs, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2774 break;
2775
2776 case TGSI_OPCODE_RCC:
2777 FETCH(&r[0], 0, CHAN_X);
2778 micro_div(&r[0], &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], &r[0]);
2779 micro_float_clamp(&r[0], &r[0]);
2780 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2781 STORE(&r[0], 0, chan_index);
2782 }
2783 break;
2784
2785 case TGSI_OPCODE_DPH:
2786 exec_dph(mach, inst);
2787 break;
2788
2789 case TGSI_OPCODE_COS:
2790 exec_scalar_unary(mach, inst, micro_cos, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2791 break;
2792
2793 case TGSI_OPCODE_DDX:
2794 exec_vector_unary(mach, inst, micro_ddx, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2795 break;
2796
2797 case TGSI_OPCODE_DDY:
2798 exec_vector_unary(mach, inst, micro_ddy, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2799 break;
2800
2801 case TGSI_OPCODE_KILP:
2802 exec_kilp (mach, inst);
2803 break;
2804
2805 case TGSI_OPCODE_KIL:
2806 exec_kil (mach, inst);
2807 break;
2808
2809 case TGSI_OPCODE_PK2H:
2810 assert (0);
2811 break;
2812
2813 case TGSI_OPCODE_PK2US:
2814 assert (0);
2815 break;
2816
2817 case TGSI_OPCODE_PK4B:
2818 assert (0);
2819 break;
2820
2821 case TGSI_OPCODE_PK4UB:
2822 assert (0);
2823 break;
2824
2825 case TGSI_OPCODE_RFL:
2826 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2827 IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2828 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2829 /* r0 = dp3(src0, src0) */
2830 FETCH(&r[2], 0, CHAN_X);
2831 micro_mul(&r[0], &r[2], &r[2]);
2832 FETCH(&r[4], 0, CHAN_Y);
2833 micro_mul(&r[8], &r[4], &r[4]);
2834 micro_add(&r[0], &r[0], &r[8]);
2835 FETCH(&r[6], 0, CHAN_Z);
2836 micro_mul(&r[8], &r[6], &r[6]);
2837 micro_add(&r[0], &r[0], &r[8]);
2838
2839 /* r1 = dp3(src0, src1) */
2840 FETCH(&r[3], 1, CHAN_X);
2841 micro_mul(&r[1], &r[2], &r[3]);
2842 FETCH(&r[5], 1, CHAN_Y);
2843 micro_mul(&r[8], &r[4], &r[5]);
2844 micro_add(&r[1], &r[1], &r[8]);
2845 FETCH(&r[7], 1, CHAN_Z);
2846 micro_mul(&r[8], &r[6], &r[7]);
2847 micro_add(&r[1], &r[1], &r[8]);
2848
2849 /* r1 = 2 * r1 / r0 */
2850 micro_add(&r[1], &r[1], &r[1]);
2851 micro_div(&r[1], &r[1], &r[0]);
2852
2853 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2854 micro_mul(&r[2], &r[2], &r[1]);
2855 micro_sub(&r[2], &r[2], &r[3]);
2856 STORE(&r[2], 0, CHAN_X);
2857 }
2858 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2859 micro_mul(&r[4], &r[4], &r[1]);
2860 micro_sub(&r[4], &r[4], &r[5]);
2861 STORE(&r[4], 0, CHAN_Y);
2862 }
2863 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2864 micro_mul(&r[6], &r[6], &r[1]);
2865 micro_sub(&r[6], &r[6], &r[7]);
2866 STORE(&r[6], 0, CHAN_Z);
2867 }
2868 }
2869 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2870 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W);
2871 }
2872 break;
2873
2874 case TGSI_OPCODE_SEQ:
2875 exec_vector_binary(mach, inst, micro_seq, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2876 break;
2877
2878 case TGSI_OPCODE_SFL:
2879 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2880 STORE(&mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, chan_index);
2881 }
2882 break;
2883
2884 case TGSI_OPCODE_SGT:
2885 exec_vector_binary(mach, inst, micro_sgt, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2886 break;
2887
2888 case TGSI_OPCODE_SIN:
2889 exec_scalar_unary(mach, inst, micro_sin, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2890 break;
2891
2892 case TGSI_OPCODE_SLE:
2893 exec_vector_binary(mach, inst, micro_sle, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2894 break;
2895
2896 case TGSI_OPCODE_SNE:
2897 exec_vector_binary(mach, inst, micro_sne, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
2898 break;
2899
2900 case TGSI_OPCODE_STR:
2901 FOR_EACH_ENABLED_CHANNEL(*inst, chan_index) {
2902 STORE(&mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, chan_index);
2903 }
2904 break;
2905
2906 case TGSI_OPCODE_TEX:
2907 /* simple texture lookup */
2908 /* src[0] = texcoord */
2909 /* src[1] = sampler unit */
2910 exec_tex(mach, inst, TEX_MODIFIER_NONE);
2911 break;
2912
2913 case TGSI_OPCODE_TXB:
2914 /* Texture lookup with lod bias */
2915 /* src[0] = texcoord (src[0].w = LOD bias) */
2916 /* src[1] = sampler unit */
2917 exec_tex(mach, inst, TEX_MODIFIER_LOD_BIAS);
2918 break;
2919
2920 case TGSI_OPCODE_TXD:
2921 /* Texture lookup with explict partial derivatives */
2922 /* src[0] = texcoord */
2923 /* src[1] = d[strq]/dx */
2924 /* src[2] = d[strq]/dy */
2925 /* src[3] = sampler unit */
2926 exec_txd(mach, inst);
2927 break;
2928
2929 case TGSI_OPCODE_TXL:
2930 /* Texture lookup with explit LOD */
2931 /* src[0] = texcoord (src[0].w = LOD) */
2932 /* src[1] = sampler unit */
2933 exec_tex(mach, inst, TEX_MODIFIER_EXPLICIT_LOD);
2934 break;
2935
2936 case TGSI_OPCODE_TXP:
2937 /* Texture lookup with projection */
2938 /* src[0] = texcoord (src[0].w = projection) */
2939 /* src[1] = sampler unit */
2940 exec_tex(mach, inst, TEX_MODIFIER_PROJECTED);
2941 break;
2942
2943 case TGSI_OPCODE_UP2H:
2944 assert (0);
2945 break;
2946
2947 case TGSI_OPCODE_UP2US:
2948 assert (0);
2949 break;
2950
2951 case TGSI_OPCODE_UP4B:
2952 assert (0);
2953 break;
2954
2955 case TGSI_OPCODE_UP4UB:
2956 assert (0);
2957 break;
2958
2959 case TGSI_OPCODE_X2D:
2960 FETCH(&r[0], 1, CHAN_X);
2961 FETCH(&r[1], 1, CHAN_Y);
2962 if (IS_CHANNEL_ENABLED(*inst, CHAN_X) ||
2963 IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2964 FETCH(&r[2], 2, CHAN_X);
2965 micro_mul(&r[2], &r[2], &r[0]);
2966 FETCH(&r[3], 2, CHAN_Y);
2967 micro_mul(&r[3], &r[3], &r[1]);
2968 micro_add(&r[2], &r[2], &r[3]);
2969 FETCH(&r[3], 0, CHAN_X);
2970 micro_add(&d[CHAN_X], &r[2], &r[3]);
2971
2972 }
2973 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y) ||
2974 IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2975 FETCH(&r[2], 2, CHAN_Z);
2976 micro_mul(&r[2], &r[2], &r[0]);
2977 FETCH(&r[3], 2, CHAN_W);
2978 micro_mul(&r[3], &r[3], &r[1]);
2979 micro_add(&r[2], &r[2], &r[3]);
2980 FETCH(&r[3], 0, CHAN_Y);
2981 micro_add(&d[CHAN_Y], &r[2], &r[3]);
2982
2983 }
2984 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
2985 STORE(&d[CHAN_X], 0, CHAN_X);
2986 }
2987 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
2988 STORE(&d[CHAN_Y], 0, CHAN_Y);
2989 }
2990 if (IS_CHANNEL_ENABLED(*inst, CHAN_Z)) {
2991 STORE(&d[CHAN_X], 0, CHAN_Z);
2992 }
2993 if (IS_CHANNEL_ENABLED(*inst, CHAN_W)) {
2994 STORE(&d[CHAN_Y], 0, CHAN_W);
2995 }
2996 break;
2997
2998 case TGSI_OPCODE_ARA:
2999 assert (0);
3000 break;
3001
3002 case TGSI_OPCODE_ARR:
3003 exec_vector_unary(mach, inst, micro_arr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
3004 break;
3005
3006 case TGSI_OPCODE_BRA:
3007 assert (0);
3008 break;
3009
3010 case TGSI_OPCODE_CAL:
3011 /* skip the call if no execution channels are enabled */
3012 if (mach->ExecMask) {
3013 /* do the call */
3014
3015 /* First, record the depths of the execution stacks.
3016 * This is important for deeply nested/looped return statements.
3017 * We have to unwind the stacks by the correct amount. For a
3018 * real code generator, we could determine the number of entries
3019 * to pop off each stack with simple static analysis and avoid
3020 * implementing this data structure at run time.
3021 */
3022 mach->CallStack[mach->CallStackTop].CondStackTop = mach->CondStackTop;
3023 mach->CallStack[mach->CallStackTop].LoopStackTop = mach->LoopStackTop;
3024 mach->CallStack[mach->CallStackTop].ContStackTop = mach->ContStackTop;
3025 mach->CallStack[mach->CallStackTop].SwitchStackTop = mach->SwitchStackTop;
3026 mach->CallStack[mach->CallStackTop].BreakStackTop = mach->BreakStackTop;
3027 /* note that PC was already incremented above */
3028 mach->CallStack[mach->CallStackTop].ReturnAddr = *pc;
3029
3030 mach->CallStackTop++;
3031
3032 /* Second, push the Cond, Loop, Cont, Func stacks */
3033 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3034 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3035 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3036 assert(mach->SwitchStackTop < TGSI_EXEC_MAX_SWITCH_NESTING);
3037 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3038 assert(mach->FuncStackTop < TGSI_EXEC_MAX_CALL_NESTING);
3039
3040 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3041 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3042 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3043 mach->SwitchStack[mach->SwitchStackTop++] = mach->Switch;
3044 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3045 mach->FuncStack[mach->FuncStackTop++] = mach->FuncMask;
3046
3047 /* Finally, jump to the subroutine */
3048 *pc = inst->Label.Label;
3049 }
3050 break;
3051
3052 case TGSI_OPCODE_RET:
3053 mach->FuncMask &= ~mach->ExecMask;
3054 UPDATE_EXEC_MASK(mach);
3055
3056 if (mach->FuncMask == 0x0) {
3057 /* really return now (otherwise, keep executing */
3058
3059 if (mach->CallStackTop == 0) {
3060 /* returning from main() */
3061 *pc = -1;
3062 return;
3063 }
3064
3065 assert(mach->CallStackTop > 0);
3066 mach->CallStackTop--;
3067
3068 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3069 mach->CondMask = mach->CondStack[mach->CondStackTop];
3070
3071 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3072 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3073
3074 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3075 mach->ContMask = mach->ContStack[mach->ContStackTop];
3076
3077 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3078 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3079
3080 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3081 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3082
3083 assert(mach->FuncStackTop > 0);
3084 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3085
3086 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3087
3088 UPDATE_EXEC_MASK(mach);
3089 }
3090 break;
3091
3092 case TGSI_OPCODE_SSG:
3093 exec_vector_unary(mach, inst, micro_sgn, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3094 break;
3095
3096 case TGSI_OPCODE_CMP:
3097 exec_vector_trinary(mach, inst, micro_cmp, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3098 break;
3099
3100 case TGSI_OPCODE_SCS:
3101 if( IS_CHANNEL_ENABLED( *inst, CHAN_X ) || IS_CHANNEL_ENABLED( *inst, CHAN_Y ) ) {
3102 FETCH( &r[0], 0, CHAN_X );
3103 if (IS_CHANNEL_ENABLED(*inst, CHAN_X)) {
3104 micro_cos(&r[1], &r[0]);
3105 STORE(&r[1], 0, CHAN_X);
3106 }
3107 if (IS_CHANNEL_ENABLED(*inst, CHAN_Y)) {
3108 micro_sin(&r[1], &r[0]);
3109 STORE(&r[1], 0, CHAN_Y);
3110 }
3111 }
3112 if( IS_CHANNEL_ENABLED( *inst, CHAN_Z ) ) {
3113 STORE( &mach->Temps[TEMP_0_I].xyzw[TEMP_0_C], 0, CHAN_Z );
3114 }
3115 if( IS_CHANNEL_ENABLED( *inst, CHAN_W ) ) {
3116 STORE( &mach->Temps[TEMP_1_I].xyzw[TEMP_1_C], 0, CHAN_W );
3117 }
3118 break;
3119
3120 case TGSI_OPCODE_NRM:
3121 exec_nrm3(mach, inst);
3122 break;
3123
3124 case TGSI_OPCODE_NRM4:
3125 exec_nrm4(mach, inst);
3126 break;
3127
3128 case TGSI_OPCODE_DIV:
3129 assert( 0 );
3130 break;
3131
3132 case TGSI_OPCODE_DP2:
3133 exec_dp2(mach, inst);
3134 break;
3135
3136 case TGSI_OPCODE_IF:
3137 /* push CondMask */
3138 assert(mach->CondStackTop < TGSI_EXEC_MAX_COND_NESTING);
3139 mach->CondStack[mach->CondStackTop++] = mach->CondMask;
3140 FETCH( &r[0], 0, CHAN_X );
3141 /* update CondMask */
3142 if( ! r[0].u[0] ) {
3143 mach->CondMask &= ~0x1;
3144 }
3145 if( ! r[0].u[1] ) {
3146 mach->CondMask &= ~0x2;
3147 }
3148 if( ! r[0].u[2] ) {
3149 mach->CondMask &= ~0x4;
3150 }
3151 if( ! r[0].u[3] ) {
3152 mach->CondMask &= ~0x8;
3153 }
3154 UPDATE_EXEC_MASK(mach);
3155 /* Todo: If CondMask==0, jump to ELSE */
3156 break;
3157
3158 case TGSI_OPCODE_ELSE:
3159 /* invert CondMask wrt previous mask */
3160 {
3161 uint prevMask;
3162 assert(mach->CondStackTop > 0);
3163 prevMask = mach->CondStack[mach->CondStackTop - 1];
3164 mach->CondMask = ~mach->CondMask & prevMask;
3165 UPDATE_EXEC_MASK(mach);
3166 /* Todo: If CondMask==0, jump to ENDIF */
3167 }
3168 break;
3169
3170 case TGSI_OPCODE_ENDIF:
3171 /* pop CondMask */
3172 assert(mach->CondStackTop > 0);
3173 mach->CondMask = mach->CondStack[--mach->CondStackTop];
3174 UPDATE_EXEC_MASK(mach);
3175 break;
3176
3177 case TGSI_OPCODE_END:
3178 /* halt execution */
3179 *pc = -1;
3180 break;
3181
3182 case TGSI_OPCODE_PUSHA:
3183 assert (0);
3184 break;
3185
3186 case TGSI_OPCODE_POPA:
3187 assert (0);
3188 break;
3189
3190 case TGSI_OPCODE_CEIL:
3191 exec_vector_unary(mach, inst, micro_ceil, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3192 break;
3193
3194 case TGSI_OPCODE_I2F:
3195 exec_vector_unary(mach, inst, micro_i2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_INT);
3196 break;
3197
3198 case TGSI_OPCODE_NOT:
3199 exec_vector_unary(mach, inst, micro_not, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3200 break;
3201
3202 case TGSI_OPCODE_TRUNC:
3203 exec_vector_unary(mach, inst, micro_trunc, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
3204 break;
3205
3206 case TGSI_OPCODE_SHL:
3207 exec_vector_binary(mach, inst, micro_shl, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3208 break;
3209
3210 case TGSI_OPCODE_AND:
3211 exec_vector_binary(mach, inst, micro_and, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3212 break;
3213
3214 case TGSI_OPCODE_OR:
3215 exec_vector_binary(mach, inst, micro_or, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3216 break;
3217
3218 case TGSI_OPCODE_MOD:
3219 assert (0);
3220 break;
3221
3222 case TGSI_OPCODE_XOR:
3223 exec_vector_binary(mach, inst, micro_xor, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3224 break;
3225
3226 case TGSI_OPCODE_SAD:
3227 assert (0);
3228 break;
3229
3230 case TGSI_OPCODE_TXF:
3231 assert (0);
3232 break;
3233
3234 case TGSI_OPCODE_TXQ:
3235 assert (0);
3236 break;
3237
3238 case TGSI_OPCODE_EMIT:
3239 emit_vertex(mach);
3240 break;
3241
3242 case TGSI_OPCODE_ENDPRIM:
3243 emit_primitive(mach);
3244 break;
3245
3246 case TGSI_OPCODE_BGNLOOP:
3247 /* push LoopMask and ContMasks */
3248 assert(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3249 assert(mach->ContStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3250 assert(mach->LoopLabelStackTop < TGSI_EXEC_MAX_LOOP_NESTING);
3251 assert(mach->BreakStackTop < TGSI_EXEC_MAX_BREAK_STACK);
3252
3253 mach->LoopStack[mach->LoopStackTop++] = mach->LoopMask;
3254 mach->ContStack[mach->ContStackTop++] = mach->ContMask;
3255 mach->LoopLabelStack[mach->LoopLabelStackTop++] = *pc - 1;
3256 mach->BreakStack[mach->BreakStackTop++] = mach->BreakType;
3257 mach->BreakType = TGSI_EXEC_BREAK_INSIDE_LOOP;
3258 break;
3259
3260 case TGSI_OPCODE_ENDLOOP:
3261 /* Restore ContMask, but don't pop */
3262 assert(mach->ContStackTop > 0);
3263 mach->ContMask = mach->ContStack[mach->ContStackTop - 1];
3264 UPDATE_EXEC_MASK(mach);
3265 if (mach->ExecMask) {
3266 /* repeat loop: jump to instruction just past BGNLOOP */
3267 assert(mach->LoopLabelStackTop > 0);
3268 *pc = mach->LoopLabelStack[mach->LoopLabelStackTop - 1] + 1;
3269 }
3270 else {
3271 /* exit loop: pop LoopMask */
3272 assert(mach->LoopStackTop > 0);
3273 mach->LoopMask = mach->LoopStack[--mach->LoopStackTop];
3274 /* pop ContMask */
3275 assert(mach->ContStackTop > 0);
3276 mach->ContMask = mach->ContStack[--mach->ContStackTop];
3277 assert(mach->LoopLabelStackTop > 0);
3278 --mach->LoopLabelStackTop;
3279
3280 mach->BreakType = mach->BreakStack[--mach->BreakStackTop];
3281 }
3282 UPDATE_EXEC_MASK(mach);
3283 break;
3284
3285 case TGSI_OPCODE_BRK:
3286 exec_break(mach);
3287 break;
3288
3289 case TGSI_OPCODE_CONT:
3290 /* turn off cont channels for each enabled exec channel */
3291 mach->ContMask &= ~mach->ExecMask;
3292 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3293 UPDATE_EXEC_MASK(mach);
3294 break;
3295
3296 case TGSI_OPCODE_BGNSUB:
3297 /* no-op */
3298 break;
3299
3300 case TGSI_OPCODE_ENDSUB:
3301 /*
3302 * XXX: This really should be a no-op. We should never reach this opcode.
3303 */
3304
3305 assert(mach->CallStackTop > 0);
3306 mach->CallStackTop--;
3307
3308 mach->CondStackTop = mach->CallStack[mach->CallStackTop].CondStackTop;
3309 mach->CondMask = mach->CondStack[mach->CondStackTop];
3310
3311 mach->LoopStackTop = mach->CallStack[mach->CallStackTop].LoopStackTop;
3312 mach->LoopMask = mach->LoopStack[mach->LoopStackTop];
3313
3314 mach->ContStackTop = mach->CallStack[mach->CallStackTop].ContStackTop;
3315 mach->ContMask = mach->ContStack[mach->ContStackTop];
3316
3317 mach->SwitchStackTop = mach->CallStack[mach->CallStackTop].SwitchStackTop;
3318 mach->Switch = mach->SwitchStack[mach->SwitchStackTop];
3319
3320 mach->BreakStackTop = mach->CallStack[mach->CallStackTop].BreakStackTop;
3321 mach->BreakType = mach->BreakStack[mach->BreakStackTop];
3322
3323 assert(mach->FuncStackTop > 0);
3324 mach->FuncMask = mach->FuncStack[--mach->FuncStackTop];
3325
3326 *pc = mach->CallStack[mach->CallStackTop].ReturnAddr;
3327
3328 UPDATE_EXEC_MASK(mach);
3329 break;
3330
3331 case TGSI_OPCODE_NOP:
3332 break;
3333
3334 case TGSI_OPCODE_BREAKC:
3335 FETCH(&r[0], 0, CHAN_X);
3336 /* update CondMask */
3337 if (r[0].u[0] && (mach->ExecMask & 0x1)) {
3338 mach->LoopMask &= ~0x1;
3339 }
3340 if (r[0].u[1] && (mach->ExecMask & 0x2)) {
3341 mach->LoopMask &= ~0x2;
3342 }
3343 if (r[0].u[2] && (mach->ExecMask & 0x4)) {
3344 mach->LoopMask &= ~0x4;
3345 }
3346 if (r[0].u[3] && (mach->ExecMask & 0x8)) {
3347 mach->LoopMask &= ~0x8;
3348 }
3349 /* Todo: if mach->LoopMask == 0, jump to end of loop */
3350 UPDATE_EXEC_MASK(mach);
3351 break;
3352
3353 case TGSI_OPCODE_F2I:
3354 exec_vector_unary(mach, inst, micro_f2i, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_FLOAT);
3355 break;
3356
3357 case TGSI_OPCODE_IDIV:
3358 exec_vector_binary(mach, inst, micro_idiv, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3359 break;
3360
3361 case TGSI_OPCODE_IMAX:
3362 exec_vector_binary(mach, inst, micro_imax, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3363 break;
3364
3365 case TGSI_OPCODE_IMIN:
3366 exec_vector_binary(mach, inst, micro_imin, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3367 break;
3368
3369 case TGSI_OPCODE_INEG:
3370 exec_vector_unary(mach, inst, micro_ineg, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3371 break;
3372
3373 case TGSI_OPCODE_ISGE:
3374 exec_vector_binary(mach, inst, micro_isge, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3375 break;
3376
3377 case TGSI_OPCODE_ISHR:
3378 exec_vector_binary(mach, inst, micro_ishr, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3379 break;
3380
3381 case TGSI_OPCODE_ISLT:
3382 exec_vector_binary(mach, inst, micro_islt, TGSI_EXEC_DATA_INT, TGSI_EXEC_DATA_INT);
3383 break;
3384
3385 case TGSI_OPCODE_F2U:
3386 exec_vector_unary(mach, inst, micro_f2u, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_FLOAT);
3387 break;
3388
3389 case TGSI_OPCODE_U2F:
3390 exec_vector_unary(mach, inst, micro_u2f, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_UINT);
3391 break;
3392
3393 case TGSI_OPCODE_UADD:
3394 exec_vector_binary(mach, inst, micro_uadd, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3395 break;
3396
3397 case TGSI_OPCODE_UDIV:
3398 exec_vector_binary(mach, inst, micro_udiv, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3399 break;
3400
3401 case TGSI_OPCODE_UMAD:
3402 exec_vector_trinary(mach, inst, micro_umad, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3403 break;
3404
3405 case TGSI_OPCODE_UMAX:
3406 exec_vector_binary(mach, inst, micro_umax, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3407 break;
3408
3409 case TGSI_OPCODE_UMIN:
3410 exec_vector_binary(mach, inst, micro_umin, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3411 break;
3412
3413 case TGSI_OPCODE_UMOD:
3414 exec_vector_binary(mach, inst, micro_umod, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3415 break;
3416
3417 case TGSI_OPCODE_UMUL:
3418 exec_vector_binary(mach, inst, micro_umul, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3419 break;
3420
3421 case TGSI_OPCODE_USEQ:
3422 exec_vector_binary(mach, inst, micro_useq, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3423 break;
3424
3425 case TGSI_OPCODE_USGE:
3426 exec_vector_binary(mach, inst, micro_usge, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3427 break;
3428
3429 case TGSI_OPCODE_USHR:
3430 exec_vector_binary(mach, inst, micro_ushr, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3431 break;
3432
3433 case TGSI_OPCODE_USLT:
3434 exec_vector_binary(mach, inst, micro_uslt, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3435 break;
3436
3437 case TGSI_OPCODE_USNE:
3438 exec_vector_binary(mach, inst, micro_usne, TGSI_EXEC_DATA_UINT, TGSI_EXEC_DATA_UINT);
3439 break;
3440
3441 case TGSI_OPCODE_SWITCH:
3442 exec_switch(mach, inst);
3443 break;
3444
3445 case TGSI_OPCODE_CASE:
3446 exec_case(mach, inst);
3447 break;
3448
3449 case TGSI_OPCODE_DEFAULT:
3450 exec_default(mach);
3451 break;
3452
3453 case TGSI_OPCODE_ENDSWITCH:
3454 exec_endswitch(mach);
3455 break;
3456
3457 default:
3458 assert( 0 );
3459 }
3460 }
3461
3462
3463 #define DEBUG_EXECUTION 0
3464
3465
3466 /**
3467 * Run TGSI interpreter.
3468 * \return bitmask of "alive" quad components
3469 */
3470 uint
3471 tgsi_exec_machine_run( struct tgsi_exec_machine *mach )
3472 {
3473 uint i;
3474 int pc = 0;
3475
3476 mach->CondMask = 0xf;
3477 mach->LoopMask = 0xf;
3478 mach->ContMask = 0xf;
3479 mach->FuncMask = 0xf;
3480 mach->ExecMask = 0xf;
3481
3482 mach->Switch.mask = 0xf;
3483
3484 assert(mach->CondStackTop == 0);
3485 assert(mach->LoopStackTop == 0);
3486 assert(mach->ContStackTop == 0);
3487 assert(mach->SwitchStackTop == 0);
3488 assert(mach->BreakStackTop == 0);
3489 assert(mach->CallStackTop == 0);
3490
3491 mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] = 0;
3492 mach->Temps[TEMP_OUTPUT_I].xyzw[TEMP_OUTPUT_C].u[0] = 0;
3493
3494 if( mach->Processor == TGSI_PROCESSOR_GEOMETRY ) {
3495 mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0] = 0;
3496 mach->Primitives[0] = 0;
3497 }
3498
3499 for (i = 0; i < QUAD_SIZE; i++) {
3500 mach->Temps[TEMP_CC_I].xyzw[TEMP_CC_C].u[i] =
3501 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_X_SHIFT) |
3502 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Y_SHIFT) |
3503 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_Z_SHIFT) |
3504 (TGSI_EXEC_CC_EQ << TGSI_EXEC_CC_W_SHIFT);
3505 }
3506
3507 /* execute declarations (interpolants) */
3508 for (i = 0; i < mach->NumDeclarations; i++) {
3509 exec_declaration( mach, mach->Declarations+i );
3510 }
3511
3512 {
3513 #if DEBUG_EXECUTION
3514 struct tgsi_exec_vector temps[TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS];
3515 struct tgsi_exec_vector outputs[PIPE_MAX_ATTRIBS];
3516 uint inst = 1;
3517
3518 memcpy(temps, mach->Temps, sizeof(temps));
3519 memcpy(outputs, mach->Outputs, sizeof(outputs));
3520 #endif
3521
3522 /* execute instructions, until pc is set to -1 */
3523 while (pc != -1) {
3524
3525 #if DEBUG_EXECUTION
3526 uint i;
3527
3528 tgsi_dump_instruction(&mach->Instructions[pc], inst++);
3529 #endif
3530
3531 assert(pc < (int) mach->NumInstructions);
3532 exec_instruction(mach, mach->Instructions + pc, &pc);
3533
3534 #if DEBUG_EXECUTION
3535 for (i = 0; i < TGSI_EXEC_NUM_TEMPS + TGSI_EXEC_NUM_TEMP_EXTRAS; i++) {
3536 if (memcmp(&temps[i], &mach->Temps[i], sizeof(temps[i]))) {
3537 uint j;
3538
3539 memcpy(&temps[i], &mach->Temps[i], sizeof(temps[i]));
3540 debug_printf("TEMP[%2u] = ", i);
3541 for (j = 0; j < 4; j++) {
3542 if (j > 0) {
3543 debug_printf(" ");
3544 }
3545 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3546 temps[i].xyzw[0].f[j], temps[i].xyzw[0].u[j],
3547 temps[i].xyzw[1].f[j], temps[i].xyzw[1].u[j],
3548 temps[i].xyzw[2].f[j], temps[i].xyzw[2].u[j],
3549 temps[i].xyzw[3].f[j], temps[i].xyzw[3].u[j]);
3550 }
3551 }
3552 }
3553 for (i = 0; i < PIPE_MAX_ATTRIBS; i++) {
3554 if (memcmp(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]))) {
3555 uint j;
3556
3557 memcpy(&outputs[i], &mach->Outputs[i], sizeof(outputs[i]));
3558 debug_printf("OUT[%2u] = ", i);
3559 for (j = 0; j < 4; j++) {
3560 if (j > 0) {
3561 debug_printf(" ");
3562 }
3563 debug_printf("(%6f %u, %6f %u, %6f %u, %6f %u)\n",
3564 outputs[i].xyzw[0].f[j], outputs[i].xyzw[0].u[j],
3565 outputs[i].xyzw[1].f[j], outputs[i].xyzw[1].u[j],
3566 outputs[i].xyzw[2].f[j], outputs[i].xyzw[2].u[j],
3567 outputs[i].xyzw[3].f[j], outputs[i].xyzw[3].u[j]);
3568 }
3569 }
3570 }
3571 #endif
3572 }
3573 }
3574
3575 #if 0
3576 /* we scale from floats in [0,1] to Zbuffer ints in sp_quad_depth_test.c */
3577 if (mach->Processor == TGSI_PROCESSOR_FRAGMENT) {
3578 /*
3579 * Scale back depth component.
3580 */
3581 for (i = 0; i < 4; i++)
3582 mach->Outputs[0].xyzw[2].f[i] *= ctx->DrawBuffer->_DepthMaxF;
3583 }
3584 #endif
3585
3586 assert(mach->CondStackTop == 0);
3587 assert(mach->LoopStackTop == 0);
3588 assert(mach->ContStackTop == 0);
3589 assert(mach->SwitchStackTop == 0);
3590 assert(mach->BreakStackTop == 0);
3591 assert(mach->CallStackTop == 0);
3592
3593 return ~mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0];
3594 }