src/gallium/auxiliary/tgsi/tgsi_exec.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 VMware, Inc.
   4  * All Rights Reserved.
   5  * Copyright 2009-2010 VMware, Inc.  All rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #ifndef TGSI_EXEC_H
  30 #define TGSI_EXEC_H
  31
  32 #include "pipe/p_compiler.h"
  33 #include "pipe/p_state.h"
  34 #include "pipe/p_shader_tokens.h"
  35
  36 #if defined __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 #define TGSI_CHAN_X 0
  41 #define TGSI_CHAN_Y 1
  42 #define TGSI_CHAN_Z 2
  43 #define TGSI_CHAN_W 3
  44
  45 #define TGSI_NUM_CHANNELS 4  /* R,G,B,A */
  46 #define TGSI_QUAD_SIZE    4  /* 4 pixel/quad */
  47
  48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
  49    for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
  50
  51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  52    ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
  53
  54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  55    if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
  56
  57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
  58    TGSI_FOR_EACH_CHANNEL( CHAN )\
  59       TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
  60
  61
  62 /**
  63   * Registers may be treated as float, signed int or unsigned int.
  64   */
  65 union tgsi_exec_channel
  66 {
  67    float    f[TGSI_QUAD_SIZE];
  68    int      i[TGSI_QUAD_SIZE];
  69    unsigned u[TGSI_QUAD_SIZE];
  70 };
  71
  72 /**
  73   * A vector[RGBA] of channels[4 pixels]
  74   */
  75 struct tgsi_exec_vector
  76 {
  77    union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
  78 };
  79
  80 /**
  81  * For fragment programs, information for computing fragment input
  82  * values from plane equation of the triangle/line.
  83  */
  84 struct tgsi_interp_coef
  85 {
  86    float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
  87    float dadx[TGSI_NUM_CHANNELS];
  88    float dady[TGSI_NUM_CHANNELS];
  89 };
  90
  91 enum tgsi_sampler_control
  92 {
  93    TGSI_SAMPLER_LOD_NONE,
  94    TGSI_SAMPLER_LOD_BIAS,
  95    TGSI_SAMPLER_LOD_EXPLICIT,
  96    TGSI_SAMPLER_LOD_ZERO,
  97    TGSI_SAMPLER_DERIVS_EXPLICIT,
  98    TGSI_SAMPLER_GATHER,
  99 };
 100
 101 /**
 102  * Information for sampling textures, which must be implemented
 103  * by code outside the TGSI executor.
 104  */
 105 struct tgsi_sampler
 106 {
 107    /** Get samples for four fragments in a quad */
 108    /* this interface contains 5 sets of channels that vary
 109     * depending on the sampler.
 110     * s - the first texture coordinate for sampling.
 111     * t - the second texture coordinate for sampling - unused for 1D,
 112           layer for 1D arrays.
 113     * r - the third coordinate for sampling for 3D, cube, cube arrays,
 114     *     layer for 2D arrays. Compare value for 1D/2D shadows.
 115     * c0 - Compare value for shadow cube and shadow 2d arrays,
 116     *      layer for cube arrays.
 117     * derivs - explicit derivatives.
 118     * offset - texel offsets
 119     * lod - lod value, except for shadow cube arrays (compare value there).
 120     */
 121    void (*get_samples)(struct tgsi_sampler *sampler,
 122                        const unsigned sview_index,
 123                        const unsigned sampler_index,
 124                        const float s[TGSI_QUAD_SIZE],
 125                        const float t[TGSI_QUAD_SIZE],
 126                        const float r[TGSI_QUAD_SIZE],
 127                        const float c0[TGSI_QUAD_SIZE],
 128                        const float c1[TGSI_QUAD_SIZE],
 129                        float derivs[3][2][TGSI_QUAD_SIZE],
 130                        const int8_t offset[3],
 131                        enum tgsi_sampler_control control,
 132                        float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 133    void (*get_dims)(struct tgsi_sampler *sampler,
 134                     const unsigned sview_index,
 135                     int level, int dims[4]);
 136    void (*get_texel)(struct tgsi_sampler *sampler,
 137                      const unsigned sview_index,
 138                      const int i[TGSI_QUAD_SIZE],
 139                      const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
 140                      const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
 141                      float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 142    void (*query_lod)(const struct tgsi_sampler *tgsi_sampler,
 143                      const unsigned sview_index,
 144                      const unsigned sampler_index,
 145                      const float s[TGSI_QUAD_SIZE],
 146                      const float t[TGSI_QUAD_SIZE],
 147                      const float p[TGSI_QUAD_SIZE],
 148                      const float c0[TGSI_QUAD_SIZE],
 149                      const enum tgsi_sampler_control control,
 150                      float mipmap[TGSI_QUAD_SIZE],
 151                      float lod[TGSI_QUAD_SIZE]);
 152 };
 153
 154 #define TGSI_EXEC_NUM_TEMPS       4096
 155 #define TGSI_EXEC_NUM_IMMEDIATES  256
 156
 157 /*
 158  * Locations of various utility registers (_I = Index, _C = Channel)
 159  */
 160 #define TGSI_EXEC_TEMP_00000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 161 #define TGSI_EXEC_TEMP_00000000_C   0
 162
 163 #define TGSI_EXEC_TEMP_7FFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 164 #define TGSI_EXEC_TEMP_7FFFFFFF_C   1
 165
 166 #define TGSI_EXEC_TEMP_80000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 167 #define TGSI_EXEC_TEMP_80000000_C   2
 168
 169 #define TGSI_EXEC_TEMP_FFFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 170 #define TGSI_EXEC_TEMP_FFFFFFFF_C   3
 171
 172 #define TGSI_EXEC_TEMP_ONE_I        (TGSI_EXEC_NUM_TEMPS + 1)
 173 #define TGSI_EXEC_TEMP_ONE_C        0
 174
 175 #define TGSI_EXEC_TEMP_TWO_I        (TGSI_EXEC_NUM_TEMPS + 1)
 176 #define TGSI_EXEC_TEMP_TWO_C        1
 177
 178 #define TGSI_EXEC_TEMP_128_I        (TGSI_EXEC_NUM_TEMPS + 1)
 179 #define TGSI_EXEC_TEMP_128_C        2
 180
 181 #define TGSI_EXEC_TEMP_MINUS_128_I  (TGSI_EXEC_NUM_TEMPS + 1)
 182 #define TGSI_EXEC_TEMP_MINUS_128_C  3
 183
 184 #define TGSI_EXEC_TEMP_KILMASK_I    (TGSI_EXEC_NUM_TEMPS + 2)
 185 #define TGSI_EXEC_TEMP_KILMASK_C    0
 186
 187 #define TGSI_EXEC_TEMP_OUTPUT_I     (TGSI_EXEC_NUM_TEMPS + 2)
 188 #define TGSI_EXEC_TEMP_OUTPUT_C     1
 189
 190 #define TGSI_EXEC_TEMP_PRIMITIVE_I  (TGSI_EXEC_NUM_TEMPS + 2)
 191 #define TGSI_EXEC_TEMP_PRIMITIVE_C  2
 192
 193 #define TGSI_EXEC_TEMP_THREE_I      (TGSI_EXEC_NUM_TEMPS + 2)
 194 #define TGSI_EXEC_TEMP_THREE_C      3
 195
 196 #define TGSI_EXEC_TEMP_HALF_I       (TGSI_EXEC_NUM_TEMPS + 3)
 197 #define TGSI_EXEC_TEMP_HALF_C       0
 198
 199 /* 4 register buffer for various purposes */
 200 #define TGSI_EXEC_TEMP_R0           (TGSI_EXEC_NUM_TEMPS + 4)
 201 #define TGSI_EXEC_NUM_TEMP_R        4
 202
 203 #define TGSI_EXEC_TEMP_ADDR         (TGSI_EXEC_NUM_TEMPS + 8)
 204
 205 /* predicate register */
 206 #define TGSI_EXEC_TEMP_P0           (TGSI_EXEC_NUM_TEMPS + 9)
 207 #define TGSI_EXEC_NUM_PREDS         1
 208
 209 #define TGSI_EXEC_NUM_TEMP_EXTRAS   10
 210
 211
 212
 213 #define TGSI_EXEC_MAX_NESTING  32
 214 #define TGSI_EXEC_MAX_COND_NESTING  TGSI_EXEC_MAX_NESTING
 215 #define TGSI_EXEC_MAX_LOOP_NESTING  TGSI_EXEC_MAX_NESTING
 216 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
 217 #define TGSI_EXEC_MAX_CALL_NESTING  TGSI_EXEC_MAX_NESTING
 218
 219 /* The maximum number of input attributes per vertex. For 2D
 220  * input register files, this is the stride between two 1D
 221  * arrays.
 222  */
 223 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 32
 224
 225 /* The maximum number of bytes per constant buffer.
 226  */
 227 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE  (4096 * sizeof(float[4]))
 228
 229 /* The maximum number of vertices per primitive */
 230 #define TGSI_MAX_PRIM_VERTICES 6
 231
 232 /* The maximum number of primitives to be generated */
 233 #define TGSI_MAX_PRIMITIVES 64
 234
 235 /* The maximum total number of vertices */
 236 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
 237
 238 #define TGSI_MAX_MISC_INPUTS 8
 239
 240 /** function call/activation record */
 241 struct tgsi_call_record
 242 {
 243    uint CondStackTop;
 244    uint LoopStackTop;
 245    uint ContStackTop;
 246    int SwitchStackTop;
 247    int BreakStackTop;
 248    uint ReturnAddr;
 249 };
 250
 251
 252 /* Switch-case block state. */
 253 struct tgsi_switch_record {
 254    uint mask;                          /**< execution mask */
 255    union tgsi_exec_channel selector;   /**< a value case statements are compared to */
 256    uint defaultMask;                   /**< non-execute mask for default case */
 257 };
 258
 259
 260 enum tgsi_break_type {
 261    TGSI_EXEC_BREAK_INSIDE_LOOP,
 262    TGSI_EXEC_BREAK_INSIDE_SWITCH
 263 };
 264
 265
 266 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
 267
 268
 269 /**
 270  * Run-time virtual machine state for executing TGSI shader.
 271  */
 272 struct tgsi_exec_machine
 273 {
 274    /* Total = program temporaries + internal temporaries
 275     */
 276    struct tgsi_exec_vector       Temps[TGSI_EXEC_NUM_TEMPS +
 277                                        TGSI_EXEC_NUM_TEMP_EXTRAS];
 278
 279    float                         Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
 280
 281    float                         ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
 282
 283    struct tgsi_exec_vector       *Inputs;
 284    struct tgsi_exec_vector       *Outputs;
 285
 286    /* System values */
 287    unsigned                      SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
 288    union tgsi_exec_channel       SystemValue[TGSI_MAX_MISC_INPUTS];
 289
 290    struct tgsi_exec_vector       *Addrs;
 291    struct tgsi_exec_vector       *Predicates;
 292
 293    struct tgsi_sampler           *Sampler;
 294
 295    unsigned                      ImmLimit;
 296
 297    const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
 298    unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
 299
 300    const struct tgsi_token       *Tokens;   /**< Declarations, instructions */
 301    unsigned                      Processor; /**< TGSI_PROCESSOR_x */
 302
 303    /* GEOMETRY processor only. */
 304    unsigned                      *Primitives;
 305    unsigned                       NumOutputs;
 306    unsigned                       MaxGeometryShaderOutputs;
 307    unsigned                       MaxOutputVertices;
 308
 309    /* FRAGMENT processor only. */
 310    const struct tgsi_interp_coef *InterpCoefs;
 311    struct tgsi_exec_vector       QuadPos;
 312    float                         Face;    /**< +1 if front facing, -1 if back facing */
 313    bool                          flatshade_color;
 314    /* Conditional execution masks */
 315    uint CondMask;  /**< For IF/ELSE/ENDIF */
 316    uint LoopMask;  /**< For BGNLOOP/ENDLOOP */
 317    uint ContMask;  /**< For loop CONT statements */
 318    uint FuncMask;  /**< For function calls */
 319    uint ExecMask;  /**< = CondMask & LoopMask */
 320
 321    /* Current switch-case state. */
 322    struct tgsi_switch_record Switch;
 323
 324    /* Current break type. */
 325    enum tgsi_break_type BreakType;
 326
 327    /** Condition mask stack (for nested conditionals) */
 328    uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
 329    int CondStackTop;
 330
 331    /** Loop mask stack (for nested loops) */
 332    uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
 333    int LoopStackTop;
 334
 335    /** Loop label stack */
 336    uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
 337    int LoopLabelStackTop;
 338
 339    /** Loop continue mask stack (see comments in tgsi_exec.c) */
 340    uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
 341    int ContStackTop;
 342
 343    /** Switch case stack */
 344    struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
 345    int SwitchStackTop;
 346
 347    enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
 348    int BreakStackTop;
 349
 350    /** Function execution mask stack (for executing subroutine code) */
 351    uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
 352    int FuncStackTop;
 353
 354    /** Function call stack for saving/restoring the program counter */
 355    struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
 356    int CallStackTop;
 357
 358    struct tgsi_full_instruction *Instructions;
 359    uint NumInstructions;
 360
 361    struct tgsi_full_declaration *Declarations;
 362    uint NumDeclarations;
 363
 364    struct tgsi_declaration_sampler_view
 365       SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
 366
 367    boolean UsedGeometryShader;
 368 };
 369
 370 struct tgsi_exec_machine *
 371 tgsi_exec_machine_create( void );
 372
 373 void
 374 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
 375
 376
 377 void
 378 tgsi_exec_machine_bind_shader(
 379    struct tgsi_exec_machine *mach,
 380    const struct tgsi_token *tokens,
 381    struct tgsi_sampler *sampler);
 382
 383 uint
 384 tgsi_exec_machine_run(
 385    struct tgsi_exec_machine *mach );
 386
 387
 388 void
 389 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
 390
 391
 392 boolean
 393 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
 394
 395
 396 extern void
 397 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
 398                                unsigned num_bufs,
 399                                const void **bufs,
 400                                const unsigned *buf_sizes);
 401
 402
 403 static inline int
 404 tgsi_exec_get_shader_param(enum pipe_shader_cap param)
 405 {
 406    switch(param) {
 407    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 408    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 409    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 410    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 411       return INT_MAX;
 412    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 413       return TGSI_EXEC_MAX_NESTING;
 414    case PIPE_SHADER_CAP_MAX_INPUTS:
 415       return TGSI_EXEC_MAX_INPUT_ATTRIBS;
 416    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 417       return 32;
 418    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 419       return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
 420    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 421       return PIPE_MAX_CONSTANT_BUFFERS;
 422    case PIPE_SHADER_CAP_MAX_TEMPS:
 423       return TGSI_EXEC_NUM_TEMPS;
 424    case PIPE_SHADER_CAP_MAX_PREDS:
 425       return TGSI_EXEC_NUM_PREDS;
 426    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 427       return 1;
 428    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 429    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 430    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 431    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 432       return 1;
 433    case PIPE_SHADER_CAP_SUBROUTINES:
 434       return 1;
 435    case PIPE_SHADER_CAP_INTEGERS:
 436       return 1;
 437    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 438       return PIPE_MAX_SAMPLERS;
 439    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 440       return PIPE_MAX_SHADER_SAMPLER_VIEWS;
 441    case PIPE_SHADER_CAP_PREFERRED_IR:
 442       return PIPE_SHADER_IR_TGSI;
 443    case PIPE_SHADER_CAP_SUPPORTED_IRS:
 444       return 1 << PIPE_SHADER_IR_TGSI;
 445    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 446       return 1;
 447    case PIPE_SHADER_CAP_DOUBLES:
 448    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 449    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 450       return 1;
 451    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 452    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 453    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 454    case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 455       return 0;
 456    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 457       return 32;
 458    }
 459    /* if we get here, we missed a shader cap above (and should have seen
 460     * a compiler warning.)
 461     */
 462    return 0;
 463 }
 464
 465 #if defined __cplusplus
 466 } /* extern "C" */
 467 #endif
 468
 469 #endif /* TGSI_EXEC_H */