src/gallium/auxiliary/util/u_cpu_detect.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 Dennis Smit
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * on the rights to use, copy, modify, merge, publish, distribute, sub
  10  * license, and/or sell copies of the Software, and to permit persons to whom
  11  * the Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
  20  * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  21  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  22  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  23  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  **************************************************************************/
  26
  27 /**
  28  * @file
  29  * CPU feature detection.
  30  *
  31  * @author Dennis Smit
  32  * @author Based on the work of Eric Anholt <anholt@FreeBSD.org>
  33  */
  34
  35 #include "pipe/p_config.h"
  36
  37 #include "u_debug.h"
  38 #include "u_cpu_detect.h"
  39
  40 #if defined(PIPE_ARCH_PPC)
  41 #if defined(PIPE_OS_APPLE)
  42 #include <sys/sysctl.h>
  43 #else
  44 #include <signal.h>
  45 #include <setjmp.h>
  46 #endif
  47 #endif
  48
  49 #if defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
  50 #include <sys/param.h>
  51 #include <sys/sysctl.h>
  52 #include <machine/cpu.h>
  53 #endif
  54
  55 #if defined(PIPE_OS_FREEBSD)
  56 #include <sys/types.h>
  57 #include <sys/sysctl.h>
  58 #endif
  59
  60 #if defined(PIPE_OS_LINUX)
  61 #include <signal.h>
  62 #endif
  63
  64 #ifdef PIPE_OS_UNIX
  65 #include <unistd.h>
  66 #endif
  67
  68 #if defined(PIPE_OS_WINDOWS)
  69 #include <windows.h>
  70 #if defined(MSVC)
  71 #include <intrin.h>
  72 #endif
  73 #endif
  74
  75
  76 DEBUG_GET_ONCE_BOOL_OPTION(dump_cpu, "GALLIUM_DUMP_CPU", FALSE)
  77
  78
  79 struct util_cpu_caps util_cpu_caps;
  80
  81 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
  82 static int has_cpuid(void);
  83 #endif
  84
  85
  86 #if defined(PIPE_ARCH_X86)
  87
  88 /* The sigill handlers */
  89 #if defined(PIPE_OS_LINUX) /*&& defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)*/
  90 static void
  91 sigill_handler_sse(int signal, struct sigcontext sc)
  92 {
  93    /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
  94     * instructions are 3 bytes long.  We must increment the instruction
  95     * pointer manually to avoid repeated execution of the offending
  96     * instruction.
  97     *
  98     * If the SIGILL is caused by a divide-by-zero when unmasked
  99     * exceptions aren't supported, the SIMD FPU status and control
 100     * word will be restored at the end of the test, so we don't need
 101     * to worry about doing it here.  Besides, we may not be able to...
 102     */
 103    sc.eip += 3;
 104
 105    util_cpu_caps.has_sse=0;
 106 }
 107
 108 static void
 109 sigfpe_handler_sse(int signal, struct sigcontext sc)
 110 {
 111    if (sc.fpstate->magic != 0xffff) {
 112       /* Our signal context has the extended FPU state, so reset the
 113        * divide-by-zero exception mask and clear the divide-by-zero
 114        * exception bit.
 115        */
 116       sc.fpstate->mxcsr |= 0x00000200;
 117       sc.fpstate->mxcsr &= 0xfffffffb;
 118    } else {
 119       /* If we ever get here, we're completely hosed.
 120       */
 121    }
 122 }
 123 #endif /* PIPE_OS_LINUX && _POSIX_SOURCE && X86_FXSR_MAGIC */
 124
 125 #if defined(PIPE_OS_WINDOWS)
 126 static LONG CALLBACK
 127 win32_sig_handler_sse(EXCEPTION_POINTERS* ep)
 128 {
 129    if(ep->ExceptionRecord->ExceptionCode==EXCEPTION_ILLEGAL_INSTRUCTION){
 130       ep->ContextRecord->Eip +=3;
 131       util_cpu_caps.has_sse=0;
 132       return EXCEPTION_CONTINUE_EXECUTION;
 133    }
 134    return EXCEPTION_CONTINUE_SEARCH;
 135 }
 136 #endif /* PIPE_OS_WINDOWS */
 137
 138 #endif /* PIPE_ARCH_X86 */
 139
 140
 141 #if defined(PIPE_ARCH_PPC) && !defined(PIPE_OS_APPLE)
 142 static jmp_buf  __lv_powerpc_jmpbuf;
 143 static volatile sig_atomic_t __lv_powerpc_canjump = 0;
 144
 145 static void
 146 sigill_handler(int sig)
 147 {
 148    if (!__lv_powerpc_canjump) {
 149       signal (sig, SIG_DFL);
 150       raise (sig);
 151    }
 152
 153    __lv_powerpc_canjump = 0;
 154    longjmp(__lv_powerpc_jmpbuf, 1);
 155 }
 156 #endif
 157
 158 #if defined(PIPE_ARCH_PPC)
 159 static void
 160 check_os_altivec_support(void)
 161 {
 162 #if defined(PIPE_OS_APPLE)
 163    int sels[2] = {CTL_HW, HW_VECTORUNIT};
 164    int has_vu = 0;
 165    int len = sizeof (has_vu);
 166    int err;
 167
 168    err = sysctl(sels, 2, &has_vu, &len, NULL, 0);
 169
 170    if (err == 0) {
 171       if (has_vu != 0) {
 172          util_cpu_caps.has_altivec = 1;
 173       }
 174    }
 175 #else /* !PIPE_OS_APPLE */
 176    /* not on Apple/Darwin, do it the brute-force way */
 177    /* this is borrowed from the libmpeg2 library */
 178    signal(SIGILL, sigill_handler);
 179    if (setjmp(__lv_powerpc_jmpbuf)) {
 180       signal(SIGILL, SIG_DFL);
 181    } else {
 182       __lv_powerpc_canjump = 1;
 183
 184       __asm __volatile
 185          ("mtspr 256, %0\n\t"
 186           "vand %%v0, %%v0, %%v0"
 187           :
 188           : "r" (-1));
 189
 190       signal(SIGILL, SIG_DFL);
 191       util_cpu_caps.has_altivec = 1;
 192    }
 193 #endif /* !PIPE_OS_APPLE */
 194 }
 195 #endif /* PIPE_ARCH_PPC */
 196
 197 /* If we're running on a processor that can do SSE, let's see if we
 198  * are allowed to or not.  This will catch 2.4.0 or later kernels that
 199  * haven't been configured for a Pentium III but are running on one,
 200  * and RedHat patched 2.2 kernels that have broken exception handling
 201  * support for user space apps that do SSE.
 202  */
 203 #if defined(PIPE_ARCH_X86) || defined (PIPE_ARCH_X86_64)
 204 static void
 205 check_os_katmai_support(void)
 206 {
 207 #if defined(PIPE_ARCH_X86)
 208 #if defined(PIPE_OS_FREEBSD)
 209    int has_sse=0, ret;
 210    int len = sizeof (has_sse);
 211
 212    ret = sysctlbyname("hw.instruction_sse", &has_sse, &len, NULL, 0);
 213    if (ret || !has_sse)
 214       util_cpu_caps.has_sse=0;
 215
 216 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
 217    int has_sse, has_sse2, ret, mib[2];
 218    int varlen;
 219
 220    mib[0] = CTL_MACHDEP;
 221    mib[1] = CPU_SSE;
 222    varlen = sizeof (has_sse);
 223
 224    ret = sysctl(mib, 2, &has_sse, &varlen, NULL, 0);
 225    if (ret < 0 || !has_sse) {
 226       util_cpu_caps.has_sse = 0;
 227    } else {
 228       util_cpu_caps.has_sse = 1;
 229    }
 230
 231    mib[1] = CPU_SSE2;
 232    varlen = sizeof (has_sse2);
 233    ret = sysctl(mib, 2, &has_sse2, &varlen, NULL, 0);
 234    if (ret < 0 || !has_sse2) {
 235       util_cpu_caps.has_sse2 = 0;
 236    } else {
 237       util_cpu_caps.has_sse2 = 1;
 238    }
 239    util_cpu_caps.has_sse = 0; /* FIXME ?!?!? */
 240
 241 #elif defined(PIPE_OS_WINDOWS)
 242    LPTOP_LEVEL_EXCEPTION_FILTER exc_fil;
 243    if (util_cpu_caps.has_sse) {
 244       exc_fil = SetUnhandledExceptionFilter(win32_sig_handler_sse);
 245 #if defined(PIPE_CC_GCC)
 246       __asm __volatile ("xorps %xmm0, %xmm0");
 247 #elif defined(PIPE_CC_MSVC)
 248       __asm {
 249           xorps xmm0, xmm0        /* executing SSE instruction */
 250       }
 251 #else
 252 #error Unsupported compiler
 253 #endif
 254       SetUnhandledExceptionFilter(exc_fil);
 255    }
 256 #elif defined(PIPE_OS_LINUX)
 257    struct sigaction saved_sigill;
 258    struct sigaction saved_sigfpe;
 259
 260    /* Save the original signal handlers.
 261    */
 262    sigaction(SIGILL, NULL, &saved_sigill);
 263    sigaction(SIGFPE, NULL, &saved_sigfpe);
 264
 265    signal(SIGILL, (void (*)(int))sigill_handler_sse);
 266    signal(SIGFPE, (void (*)(int))sigfpe_handler_sse);
 267
 268    /* Emulate test for OSFXSR in CR4.  The OS will set this bit if it
 269     * supports the extended FPU save and restore required for SSE.  If
 270     * we execute an SSE instruction on a PIII and get a SIGILL, the OS
 271     * doesn't support Streaming SIMD Exceptions, even if the processor
 272     * does.
 273     */
 274    if (util_cpu_caps.has_sse) {
 275       __asm __volatile ("xorps %xmm1, %xmm0");
 276    }
 277
 278    /* Emulate test for OSXMMEXCPT in CR4.  The OS will set this bit if
 279     * it supports unmasked SIMD FPU exceptions.  If we unmask the
 280     * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
 281     * doesn't support unmasked SIMD FPU exceptions.  If we get a SIGFPE
 282     * as expected, we're okay but we need to clean up after it.
 283     *
 284     * Are we being too stringent in our requirement that the OS support
 285     * unmasked exceptions?  Certain RedHat 2.2 kernels enable SSE by
 286     * setting CR4.OSFXSR but don't support unmasked exceptions.  Win98
 287     * doesn't even support them.  We at least know the user-space SSE
 288     * support is good in kernels that do support unmasked exceptions,
 289     * and therefore to be safe I'm going to leave this test in here.
 290     */
 291    if (util_cpu_caps.has_sse) {
 292       /* test_os_katmai_exception_support(); */
 293    }
 294
 295    /* Restore the original signal handlers.
 296    */
 297    sigaction(SIGILL, &saved_sigill, NULL);
 298    sigaction(SIGFPE, &saved_sigfpe, NULL);
 299
 300 #else
 301    /* We can't use POSIX signal handling to test the availability of
 302     * SSE, so we disable it by default.
 303     */
 304    util_cpu_caps.has_sse = 0;
 305 #endif /* __linux__ */
 306 #endif
 307
 308 #if defined(PIPE_ARCH_X86_64)
 309    util_cpu_caps.has_sse = 1;
 310 #endif
 311 }
 312
 313
 314 static int has_cpuid(void)
 315 {
 316 #if defined(PIPE_ARCH_X86)
 317 #if defined(PIPE_OS_GCC)
 318    int a, c;
 319
 320    __asm __volatile
 321       ("pushf\n"
 322        "popl %0\n"
 323        "movl %0, %1\n"
 324        "xorl $0x200000, %0\n"
 325        "push %0\n"
 326        "popf\n"
 327        "pushf\n"
 328        "popl %0\n"
 329        : "=a" (a), "=c" (c)
 330        :
 331        : "cc");
 332
 333    return a != c;
 334 #else
 335    /* FIXME */
 336    return 1;
 337 #endif
 338 #elif defined(PIPE_ARCH_X86_64)
 339    return 1;
 340 #else
 341    return 0;
 342 #endif
 343 }
 344
 345
 346 /**
 347  * @sa cpuid.h included in gcc-4.3 onwards.
 348  * @sa http://msdn.microsoft.com/en-us/library/hskdteyh.aspx
 349  */
 350 static INLINE void
 351 cpuid(uint32_t ax, uint32_t *p)
 352 {
 353 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
 354    __asm __volatile (
 355      "xchgl %%ebx, %1\n\t"
 356      "cpuid\n\t"
 357      "xchgl %%ebx, %1"
 358      : "=a" (p[0]),
 359        "=S" (p[1]),
 360        "=c" (p[2]),
 361        "=d" (p[3])
 362      : "0" (ax)
 363    );
 364 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
 365    __asm __volatile (
 366      "cpuid\n\t"
 367      : "=a" (p[0]),
 368        "=b" (p[1]),
 369        "=c" (p[2]),
 370        "=d" (p[3])
 371      : "0" (ax)
 372    );
 373 #elif defined(PIPE_CC_MSVC)
 374    __cpuid(p, ax);
 375 #else
 376    p[0] = 0;
 377    p[1] = 0;
 378    p[2] = 0;
 379    p[3] = 0;
 380 #endif
 381 }
 382 #endif /* X86 or X86_64 */
 383
 384 void
 385 util_cpu_detect(void)
 386 {
 387    static boolean util_cpu_detect_initialized = FALSE;
 388
 389    if(util_cpu_detect_initialized)
 390       return;
 391
 392    memset(&util_cpu_caps, 0, sizeof util_cpu_caps);
 393
 394    /* Count the number of CPUs in system */
 395 #if defined(PIPE_OS_WINDOWS)
 396    {
 397       SYSTEM_INFO system_info;
 398       GetSystemInfo(&system_info);
 399       util_cpu_caps.nr_cpus = system_info.dwNumberOfProcessors;
 400    }
 401 #elif defined(PIPE_OS_UNIX) && defined(_SC_NPROCESSORS_ONLN)
 402    util_cpu_caps.nr_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 403    if (util_cpu_caps.nr_cpus == -1)
 404       util_cpu_caps.nr_cpus = 1;
 405 #elif defined(PIPE_OS_BSD)
 406    {
 407       int mib[2], ncpu;
 408       int len;
 409
 410       mib[0] = CTL_HW;
 411       mib[1] = HW_NCPU;
 412
 413       len = sizeof (ncpu);
 414       sysctl(mib, 2, &ncpu, &len, NULL, 0);
 415       util_cpu_caps.nr_cpus = ncpu;
 416    }
 417 #else
 418    util_cpu_caps.nr_cpus = 1;
 419 #endif
 420
 421 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
 422    if (has_cpuid()) {
 423       uint32_t regs[4];
 424       uint32_t regs2[4];
 425
 426       util_cpu_caps.cacheline = 32;
 427
 428       /* Get max cpuid level */
 429       cpuid(0x00000000, regs);
 430
 431       if (regs[0] >= 0x00000001) {
 432          unsigned int cacheline;
 433
 434          cpuid (0x00000001, regs2);
 435
 436          util_cpu_caps.x86_cpu_type = (regs2[0] >> 8) & 0xf;
 437          if (util_cpu_caps.x86_cpu_type == 0xf)
 438              util_cpu_caps.x86_cpu_type = 8 + ((regs2[0] >> 20) & 255); /* use extended family (P4, IA64) */
 439
 440          /* general feature flags */
 441          util_cpu_caps.has_tsc    = (regs2[3] & (1 << 8  )) >>  8; /* 0x0000010 */
 442          util_cpu_caps.has_mmx    = (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
 443          util_cpu_caps.has_sse    = (regs2[3] & (1 << 25 )) >> 25; /* 0x2000000 */
 444          util_cpu_caps.has_sse2   = (regs2[3] & (1 << 26 )) >> 26; /* 0x4000000 */
 445          util_cpu_caps.has_sse3   = (regs2[2] & (1));          /* 0x0000001 */
 446          util_cpu_caps.has_ssse3  = (regs2[2] & (1 << 9 )) >> 9;   /* 0x0000020 */
 447          util_cpu_caps.has_sse4_1 = (regs2[2] & (1 << 19)) >> 19;
 448          util_cpu_caps.has_mmx2   = util_cpu_caps.has_sse; /* SSE cpus supports mmxext too */
 449
 450          cacheline = ((regs2[1] >> 8) & 0xFF) * 8;
 451          if (cacheline > 0)
 452             util_cpu_caps.cacheline = cacheline;
 453       }
 454
 455       cpuid(0x80000000, regs);
 456
 457       if (regs[0] >= 0x80000001) {
 458
 459          cpuid(0x80000001, regs2);
 460
 461          util_cpu_caps.has_mmx  |= (regs2[3] & (1 << 23 )) >> 23; /* 0x0800000 */
 462          util_cpu_caps.has_mmx2 |= (regs2[3] & (1 << 22 )) >> 22; /* 0x400000 */
 463          util_cpu_caps.has_3dnow    = (regs2[3] & (1 << 31 )) >> 31; /* 0x80000000 */
 464          util_cpu_caps.has_3dnow_ext = (regs2[3] & (1 << 30 )) >> 30;
 465       }
 466
 467       if (regs[0] >= 0x80000006) {
 468          cpuid(0x80000006, regs2);
 469          util_cpu_caps.cacheline = regs2[2] & 0xFF;
 470       }
 471
 472       if (util_cpu_caps.has_sse)
 473          check_os_katmai_support();
 474
 475       if (!util_cpu_caps.has_sse) {
 476          util_cpu_caps.has_sse2 = 0;
 477          util_cpu_caps.has_sse3 = 0;
 478          util_cpu_caps.has_ssse3 = 0;
 479          util_cpu_caps.has_sse4_1 = 0;
 480       }
 481    }
 482 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
 483
 484 #if defined(PIPE_ARCH_PPC)
 485    check_os_altivec_support();
 486 #endif /* PIPE_ARCH_PPC */
 487
 488 #ifdef DEBUG
 489    if (debug_get_option_dump_cpu()) {
 490       debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps.nr_cpus);
 491
 492       debug_printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps.x86_cpu_type);
 493       debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps.cacheline);
 494
 495       debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps.has_tsc);
 496       debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps.has_mmx);
 497       debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps.has_mmx2);
 498       debug_printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps.has_sse);
 499       debug_printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps.has_sse2);
 500       debug_printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps.has_sse3);
 501       debug_printf("util_cpu_caps.has_ssse3 = %u\n", util_cpu_caps.has_ssse3);
 502       debug_printf("util_cpu_caps.has_sse4_1 = %u\n", util_cpu_caps.has_sse4_1);
 503       debug_printf("util_cpu_caps.has_3dnow = %u\n", util_cpu_caps.has_3dnow);
 504       debug_printf("util_cpu_caps.has_3dnow_ext = %u\n", util_cpu_caps.has_3dnow_ext);
 505       debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps.has_altivec);
 506    }
 507 #endif
 508
 509    util_cpu_detect_initialized = TRUE;
 510 }