47eeeecfc74e4cd98a8320ffaa684d7ae20909f8
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_context.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 * Christian Gmeiner <christian.gmeiner@gmail.com>
26 */
27
28 #include "etnaviv_context.h"
29
30 #include "etnaviv_blend.h"
31 #include "etnaviv_clear_blit.h"
32 #include "etnaviv_compiler.h"
33 #include "etnaviv_debug.h"
34 #include "etnaviv_emit.h"
35 #include "etnaviv_fence.h"
36 #include "etnaviv_query.h"
37 #include "etnaviv_query_hw.h"
38 #include "etnaviv_rasterizer.h"
39 #include "etnaviv_resource.h"
40 #include "etnaviv_screen.h"
41 #include "etnaviv_shader.h"
42 #include "etnaviv_state.h"
43 #include "etnaviv_surface.h"
44 #include "etnaviv_texture.h"
45 #include "etnaviv_transfer.h"
46 #include "etnaviv_translate.h"
47 #include "etnaviv_zsa.h"
48
49 #include "pipe/p_context.h"
50 #include "pipe/p_state.h"
51 #include "util/u_blitter.h"
52 #include "util/u_helpers.h"
53 #include "util/u_memory.h"
54 #include "util/u_prim.h"
55 #include "util/u_upload_mgr.h"
56
57 #include "hw/common.xml.h"
58
59 static void
60 etna_context_destroy(struct pipe_context *pctx)
61 {
62 struct etna_context *ctx = etna_context(pctx);
63
64 if (ctx->dummy_rt)
65 etna_bo_del(ctx->dummy_rt);
66
67 util_copy_framebuffer_state(&ctx->framebuffer_s, NULL);
68
69 if (ctx->primconvert)
70 util_primconvert_destroy(ctx->primconvert);
71
72 if (ctx->blitter)
73 util_blitter_destroy(ctx->blitter);
74
75 if (pctx->stream_uploader)
76 u_upload_destroy(pctx->stream_uploader);
77
78 if (ctx->stream)
79 etna_cmd_stream_del(ctx->stream);
80
81 slab_destroy_child(&ctx->transfer_pool);
82
83 if (ctx->in_fence_fd != -1)
84 close(ctx->in_fence_fd);
85
86 FREE(pctx);
87 }
88
89 /* Update render state where needed based on draw operation */
90 static void
91 etna_update_state_for_draw(struct etna_context *ctx, const struct pipe_draw_info *info)
92 {
93 /* Handle primitive restart:
94 * - If not an indexed draw, we don't care about the state of the primitive restart bit.
95 * - Otherwise, set the bit in INDEX_STREAM_CONTROL in the index buffer state
96 * accordingly
97 * - If the value of the INDEX_STREAM_CONTROL register changed due to this, or
98 * primitive restart is enabled and the restart index changed, mark the index
99 * buffer state as dirty
100 */
101
102 if (info->index_size) {
103 uint32_t new_control = ctx->index_buffer.FE_INDEX_STREAM_CONTROL;
104
105 if (info->primitive_restart)
106 new_control |= VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
107 else
108 new_control &= ~VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
109
110 if (ctx->index_buffer.FE_INDEX_STREAM_CONTROL != new_control ||
111 (info->primitive_restart && ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX != info->restart_index)) {
112 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = new_control;
113 ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX = info->restart_index;
114 ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
115 }
116 }
117 }
118
119 static bool
120 etna_get_vs(struct etna_context *ctx, struct etna_shader_key key)
121 {
122 const struct etna_shader_variant *old = ctx->shader.vs;
123
124 ctx->shader.vs = etna_shader_variant(ctx->shader.bind_vs, key, &ctx->debug);
125
126 if (!ctx->shader.vs)
127 return false;
128
129 if (old != ctx->shader.vs)
130 ctx->dirty |= ETNA_DIRTY_SHADER;
131
132 return true;
133 }
134
135 static bool
136 etna_get_fs(struct etna_context *ctx, struct etna_shader_key key)
137 {
138 const struct etna_shader_variant *old = ctx->shader.fs;
139
140 ctx->shader.fs = etna_shader_variant(ctx->shader.bind_fs, key, &ctx->debug);
141
142 if (!ctx->shader.fs)
143 return false;
144
145 if (old != ctx->shader.fs)
146 ctx->dirty |= ETNA_DIRTY_SHADER;
147
148 return true;
149 }
150
151 static void
152 etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
153 {
154 struct etna_context *ctx = etna_context(pctx);
155 struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
156 uint32_t draw_mode;
157 unsigned i;
158
159 if (!info->count_from_stream_output && !info->indirect &&
160 !info->primitive_restart &&
161 !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
162 return;
163
164 if (ctx->vertex_elements == NULL || ctx->vertex_elements->num_elements == 0)
165 return; /* Nothing to do */
166
167 if (!(ctx->prim_hwsupport & (1 << info->mode))) {
168 struct primconvert_context *primconvert = ctx->primconvert;
169 util_primconvert_save_rasterizer_state(primconvert, ctx->rasterizer);
170 util_primconvert_draw_vbo(primconvert, info);
171 return;
172 }
173
174 int prims = u_decomposed_prims_for_vertices(info->mode, info->count);
175 if (unlikely(prims <= 0)) {
176 DBG("Invalid draw primitive mode=%i or no primitives to be drawn", info->mode);
177 return;
178 }
179
180 draw_mode = translate_draw_mode(info->mode);
181 if (draw_mode == ETNA_NO_MATCH) {
182 BUG("Unsupported draw mode");
183 return;
184 }
185
186 /* Upload a user index buffer. */
187 unsigned index_offset = 0;
188 struct pipe_resource *indexbuf = NULL;
189
190 if (info->index_size) {
191 indexbuf = info->has_user_indices ? NULL : info->index.resource;
192 if (info->has_user_indices &&
193 !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset)) {
194 BUG("Index buffer upload failed.");
195 return;
196 }
197 /* Add start to index offset, when rendering indexed */
198 index_offset += info->start * info->index_size;
199
200 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = etna_resource(indexbuf)->bo;
201 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
202 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ;
203 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = translate_index_size(info->index_size);
204
205 if (!ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
206 BUG("Unsupported or no index buffer");
207 return;
208 }
209 } else {
210 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = 0;
211 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = 0;
212 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = 0;
213 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 0;
214 }
215 ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
216
217 struct etna_shader_key key = {};
218 if (pfb->cbufs[0])
219 key.frag_rb_swap = !!translate_rs_format_rb_swap(pfb->cbufs[0]->format);
220
221 if (!etna_get_vs(ctx, key) || !etna_get_fs(ctx, key)) {
222 BUG("compiled shaders are not okay");
223 return;
224 }
225
226 /* Update any derived state */
227 if (!etna_state_update(ctx))
228 return;
229
230 /*
231 * Figure out the buffers/features we need:
232 */
233 if (etna_depth_enabled(ctx))
234 resource_written(ctx, pfb->zsbuf->texture);
235
236 if (etna_stencil_enabled(ctx))
237 resource_written(ctx, pfb->zsbuf->texture);
238
239 for (i = 0; i < pfb->nr_cbufs; i++) {
240 struct pipe_resource *surf;
241
242 if (!pfb->cbufs[i])
243 continue;
244
245 surf = pfb->cbufs[i]->texture;
246 resource_written(ctx, surf);
247 }
248
249 /* Mark constant buffers as being read */
250 resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].buffer);
251 resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].buffer);
252
253 /* Mark VBOs as being read */
254 for (i = 0; i < ctx->vertex_buffer.count; i++) {
255 assert(!ctx->vertex_buffer.vb[i].is_user_buffer);
256 resource_read(ctx, ctx->vertex_buffer.vb[i].buffer.resource);
257 }
258
259 /* Mark index buffer as being read */
260 resource_read(ctx, indexbuf);
261
262 /* Mark textures as being read */
263 for (i = 0; i < PIPE_MAX_SAMPLERS; i++)
264 if (ctx->sampler_view[i])
265 resource_read(ctx, ctx->sampler_view[i]->texture);
266
267 list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
268 resource_written(ctx, hq->prsc);
269
270 ctx->stats.prims_emitted += u_reduced_prims_for_vertices(info->mode, info->count);
271 ctx->stats.draw_calls++;
272
273 /* Update state for this draw operation */
274 etna_update_state_for_draw(ctx, info);
275
276 /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */
277 etna_emit_state(ctx);
278
279 if (ctx->specs.halti >= 2) {
280 /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */
281 etna_draw_instanced(ctx->stream, info->index_size, draw_mode, 1,
282 info->count, info->index_size ? info->index_bias : info->start);
283 } else {
284 if (info->index_size)
285 etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims, info->index_bias);
286 else
287 etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
288 }
289
290 if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) {
291 /* Stall the FE after every draw operation. This allows better
292 * debug of GPU hang conditions, as the FE will indicate which
293 * draw op has caused the hang. */
294 etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);
295 }
296
297 if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL))
298 pctx->flush(pctx, NULL, 0);
299
300 if (ctx->framebuffer_s.cbufs[0])
301 etna_resource(ctx->framebuffer_s.cbufs[0]->texture)->seqno++;
302 if (ctx->framebuffer_s.zsbuf)
303 etna_resource(ctx->framebuffer_s.zsbuf->texture)->seqno++;
304 if (info->index_size && indexbuf != info->index.resource)
305 pipe_resource_reference(&indexbuf, NULL);
306 }
307
308 static void
309 etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
310 enum pipe_flush_flags flags)
311 {
312 struct etna_context *ctx = etna_context(pctx);
313 int out_fence_fd = -1;
314
315 list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
316 etna_hw_query_suspend(hq, ctx);
317
318 etna_cmd_stream_flush2(ctx->stream, ctx->in_fence_fd,
319 (flags & PIPE_FLUSH_FENCE_FD) ? &out_fence_fd :
320 NULL);
321
322 list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
323 etna_hw_query_resume(hq, ctx);
324
325 if (fence)
326 *fence = etna_fence_create(pctx, out_fence_fd);
327 }
328
329 static void
330 etna_cmd_stream_reset_notify(struct etna_cmd_stream *stream, void *priv)
331 {
332 struct etna_context *ctx = priv;
333 struct etna_screen *screen = ctx->screen;
334
335 etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL);
336 etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001);
337 /* blob sets this to 0x40000031 on GC7000, seems to make no difference,
338 * but keep it in mind if depth behaves strangely. */
339 etna_set_state(stream, VIVS_RA_EARLY_DEPTH, 0x00000031);
340 etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x34000001);
341 etna_set_state(stream, VIVS_PA_FLAGS, 0x00000000); /* blob sets ZCONVERT_BYPASS on GC3000+, this messes up z for us */
342 etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A80, 0x38a01404);
343 etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
344 etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x00000000);
345 etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x00007000);
346 etna_set_state(stream, VIVS_PE_STENCIL_CONFIG_EXT2, 0x00000000);
347 etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000);
348
349 /* There is no HALTI0 specific state */
350 if (ctx->specs.halti >= 1) { /* Only on HALTI1+ */
351 etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x00000808);
352 }
353 if (ctx->specs.halti >= 2) { /* Only on HALTI2+ */
354 etna_set_state(stream, VIVS_RA_UNK00E0C, 0x00000000);
355 }
356 if (ctx->specs.halti >= 3) { /* Only on HALTI3+ */
357 etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210);
358 }
359 if (ctx->specs.halti >= 4) { /* Only on HALTI4+ */
360 etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fffffff & 0xf70fffff & 0xfff6ffff &
361 0xffff6fff & 0xfffff6ff & 0xffffff7f);
362 etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x00000000);
363 }
364 if (ctx->specs.halti >= 5) { /* Only on HALTI5+ */
365 etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x00000001);
366 etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x00000002);
367 etna_set_state(stream, VIVS_FE_HALTI5_UNK007C4, 0x00000000);
368 etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x00000000);
369 etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x00000020);
370 etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING);
371 } else { /* Only on pre-HALTI5 */
372 etna_set_state(stream, VIVS_GL_UNK03834, 0x00000000);
373 etna_set_state(stream, VIVS_GL_UNK03838, 0x00000000);
374 etna_set_state(stream, VIVS_GL_UNK03854, 0x00000000);
375 }
376
377 if (!ctx->specs.use_blt) {
378 /* Enable SINGLE_BUFFER for resolve, if supported */
379 etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(ctx->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
380 }
381
382 ctx->dirty = ~0L;
383 ctx->dirty_sampler_views = ~0L;
384
385 /*
386 * Go through all _resources_ associated with this _screen_, pending
387 * in this _context_ and mark them as not pending in this _context_
388 * anymore, since they were just flushed.
389 */
390 mtx_lock(&screen->lock);
391 set_foreach(screen->used_resources, entry) {
392 struct etna_resource *rsc = (struct etna_resource *)entry->key;
393
394 _mesa_set_remove_key(rsc->pending_ctx, ctx);
395 }
396 mtx_unlock(&screen->lock);
397 }
398
399 static void
400 etna_set_debug_callback(struct pipe_context *pctx,
401 const struct pipe_debug_callback *cb)
402 {
403 struct etna_context *ctx = etna_context(pctx);
404
405 if (cb)
406 ctx->debug = *cb;
407 else
408 memset(&ctx->debug, 0, sizeof(ctx->debug));
409 }
410
411 struct pipe_context *
412 etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
413 {
414 struct etna_context *ctx = CALLOC_STRUCT(etna_context);
415 struct etna_screen *screen;
416 struct pipe_context *pctx;
417
418 if (ctx == NULL)
419 return NULL;
420
421 pctx = &ctx->base;
422 pctx->priv = ctx;
423 pctx->screen = pscreen;
424 pctx->stream_uploader = u_upload_create_default(pctx);
425 if (!pctx->stream_uploader)
426 goto fail;
427 pctx->const_uploader = pctx->stream_uploader;
428
429 screen = etna_screen(pscreen);
430 ctx->stream = etna_cmd_stream_new(screen->pipe, 0x2000, &etna_cmd_stream_reset_notify, ctx);
431 if (ctx->stream == NULL)
432 goto fail;
433
434 /* context ctxate setup */
435 ctx->specs = screen->specs;
436 ctx->screen = screen;
437 /* need some sane default in case state tracker doesn't set some state: */
438 ctx->sample_mask = 0xffff;
439
440 /* Set sensible defaults for state */
441 etna_cmd_stream_reset_notify(ctx->stream, ctx);
442
443 ctx->in_fence_fd = -1;
444
445 pctx->destroy = etna_context_destroy;
446 pctx->draw_vbo = etna_draw_vbo;
447 pctx->flush = etna_flush;
448 pctx->set_debug_callback = etna_set_debug_callback;
449 pctx->create_fence_fd = etna_create_fence_fd;
450 pctx->fence_server_sync = etna_fence_server_sync;
451
452 /* creation of compile states */
453 pctx->create_blend_state = etna_blend_state_create;
454 pctx->create_rasterizer_state = etna_rasterizer_state_create;
455 pctx->create_depth_stencil_alpha_state = etna_zsa_state_create;
456
457 etna_clear_blit_init(pctx);
458 etna_query_context_init(pctx);
459 etna_state_init(pctx);
460 etna_surface_init(pctx);
461 etna_shader_init(pctx);
462 etna_texture_init(pctx);
463 etna_transfer_init(pctx);
464
465 ctx->blitter = util_blitter_create(pctx);
466 if (!ctx->blitter)
467 goto fail;
468
469 /* Generate the bitmask of supported draw primitives. */
470 ctx->prim_hwsupport = 1 << PIPE_PRIM_POINTS |
471 1 << PIPE_PRIM_LINES |
472 1 << PIPE_PRIM_LINE_STRIP |
473 1 << PIPE_PRIM_TRIANGLES |
474 1 << PIPE_PRIM_TRIANGLE_STRIP |
475 1 << PIPE_PRIM_TRIANGLE_FAN;
476
477 if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, LINE_LOOP))
478 ctx->prim_hwsupport |= 1 << PIPE_PRIM_LINE_LOOP;
479
480 ctx->primconvert = util_primconvert_create(pctx, ctx->prim_hwsupport);
481 if (!ctx->primconvert)
482 goto fail;
483
484 slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
485 list_inithead(&ctx->active_hw_queries);
486
487 /* create dummy RT buffer, used when rendering with no color buffer */
488 ctx->dummy_rt = etna_bo_new(ctx->screen->dev, 64 * 64 * 4,
489 DRM_ETNA_GEM_CACHE_WC);
490 if (!ctx->dummy_rt)
491 goto fail;
492
493 ctx->dummy_rt_reloc.bo = ctx->dummy_rt;
494 ctx->dummy_rt_reloc.offset = 0;
495 ctx->dummy_rt_reloc.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE;
496
497 return pctx;
498
499 fail:
500 pctx->destroy(pctx);
501
502 return NULL;
503 }